alpha-elf.s

alpha-elf.x:     file format elf64-alpha


Disassembly of section .text:

00000001200000e8 <null>:
   1200000e8:	01 80 fa 6b 	ret

00000001200000ec <return_zero>:
   1200000ec:	00 04 ff 47 	clr	v0
   1200000f0:	01 80 fa 6b 	ret

00000001200000f4 <return_one>:
   1200000f4:	01 00 1f 20 	lda	v0,1
   1200000f8:	01 80 fa 6b 	ret

00000001200000fc <return_intsize>:
   1200000fc:	04 00 1f 20 	lda	v0,4
   120000100:	01 80 fa 6b 	ret

0000000120000104 <return_pointersize>:
   120000104:	08 00 1f 20 	lda	v0,8
   120000108:	01 80 fa 6b 	ret

000000012000010c <return_short>:
   12000010c:	ee ff 1f 20 	lda	v0,-18
   120000110:	01 80 fa 6b 	ret

0000000120000114 <return_long>:
   120000114:	fc 3f 1f 24 	ldah	v0,16380
   120000118:	73 b7 00 20 	lda	v0,-18573(v0)
   12000011c:	40 14 00 40 	s4addq	v0,0,v0
   120000120:	01 80 fa 6b 	ret

0000000120000124 <return_arg1>:
   120000124:	00 04 f0 47 	mov	a0,v0
   120000128:	01 80 fa 6b 	ret

000000012000012c <return_arg2>:
   12000012c:	00 04 f1 47 	mov	a1,v0
   120000130:	01 80 fa 6b 	ret

0000000120000134 <inc>:
   120000134:	00 30 00 42 	addl	a0,0x1,v0
   120000138:	01 80 fa 6b 	ret

000000012000013c <add>:
   12000013c:	00 00 11 42 	addl	a0,a1,v0
   120000140:	01 80 fa 6b 	ret

0000000120000144 <add3>:
   120000144:	11 00 11 42 	addl	a0,a1,a1
   120000148:	00 00 32 42 	addl	a1,a2,v0
   12000014c:	01 80 fa 6b 	ret

0000000120000150 <load>:
   120000150:	00 00 10 a0 	ldl	v0,0(a0)
   120000154:	00 00 e0 43 	sextl	v0,v0
   120000158:	01 80 fa 6b 	ret

000000012000015c <store>:
   12000015c:	ff 00 3f 20 	lda	t0,255
   120000160:	00 00 30 b0 	stl	t0,0(a0)
   120000164:	01 80 fa 6b 	ret

0000000120000168 <load_long>:
   120000168:	00 00 10 a4 	ldq	v0,0(a0)
   12000016c:	01 80 fa 6b 	ret

0000000120000170 <store_long>:
   120000170:	dc 1f 3f 24 	ldah	t0,8156
   120000174:	53 97 21 20 	lda	t0,-26797(t0)
   120000178:	41 16 20 40 	s8addq	t0,0,t0
   12000017c:	00 00 30 b4 	stq	t0,0(a0)
   120000180:	01 80 fa 6b 	ret

0000000120000184 <member>:
   120000184:	01 00 3f 20 	lda	t0,1
   120000188:	04 00 30 b0 	stl	t0,4(a0)
   12000018c:	08 00 10 a0 	ldl	v0,8(a0)
   120000190:	01 80 fa 6b 	ret

0000000120000194 <get_global>:
   120000194:	02 00 bb 27 	ldah	gp,2(t12)
   120000198:	04 85 bd 23 	lda	gp,-31484(gp)
   12000019c:	00 80 3d a4 	ldq	t0,-32768(gp)
   1200001a0:	00 00 01 a0 	ldl	v0,0(t0)
   1200001a4:	01 80 fa 6b 	ret

00000001200001a8 <set_global>:
   1200001a8:	02 00 bb 27 	ldah	gp,2(t12)
   1200001ac:	f0 84 bd 23 	lda	gp,-31504(gp)
   1200001b0:	00 80 3d a4 	ldq	t0,-32768(gp)
   1200001b4:	00 00 01 b2 	stl	a0,0(t0)
   1200001b8:	01 80 fa 6b 	ret

00000001200001bc <set_stack>:
   1200001bc:	f0 ff de 23 	lda	sp,-16(sp)
   1200001c0:	fe 00 3f 20 	lda	t0,254
   1200001c4:	00 00 3e b0 	stl	t0,0(sp)
   1200001c8:	ff 00 3f 20 	lda	t0,255
   1200001cc:	04 00 3e b0 	stl	t0,4(sp)
   1200001d0:	10 00 de 23 	lda	sp,16(sp)
   1200001d4:	01 80 fa 6b 	ret

00000001200001d8 <use_stack>:
   1200001d8:	f0 ff de 23 	lda	sp,-16(sp)
   1200001dc:	fe 00 3f 20 	lda	t0,254
   1200001e0:	00 00 3e b0 	stl	t0,0(sp)
   1200001e4:	ff 00 3f 20 	lda	t0,255
   1200001e8:	04 00 3e b0 	stl	t0,4(sp)
   1200001ec:	00 00 1e a0 	ldl	v0,0(sp)
   1200001f0:	04 00 3e a0 	ldl	t0,4(sp)
   1200001f4:	00 00 01 40 	addl	v0,t0,v0
   1200001f8:	10 00 de 23 	lda	sp,16(sp)
   1200001fc:	01 80 fa 6b 	ret

0000000120000200 <call_null>:
   120000200:	02 00 bb 27 	ldah	gp,2(t12)
   120000204:	98 84 bd 23 	lda	gp,-31592(gp)
   120000208:	f0 ff de 23 	lda	sp,-16(sp)
   12000020c:	00 00 5e b7 	stq	ra,0(sp)
   120000210:	fd ff 5f d3 	bsr	ra,120000208 <call_null+0x8>
   120000214:	00 00 5e a7 	ldq	ra,0(sp)
   120000218:	10 00 de 23 	lda	sp,16(sp)
   12000021c:	01 80 fa 6b 	ret

0000000120000220 <call_simple>:
   120000220:	02 00 bb 27 	ldah	gp,2(t12)
   120000224:	78 84 bd 23 	lda	gp,-31624(gp)
   120000228:	f0 ff de 23 	lda	sp,-16(sp)
   12000022c:	00 00 5e b7 	stq	ra,0(sp)
   120000230:	fe 00 1f 22 	lda	a0,254
   120000234:	bb ff 5f d3 	bsr	ra,120000124 <return_arg1>
   120000238:	00 30 00 40 	addl	v0,0x1,v0
   12000023c:	00 00 5e a7 	ldq	ra,0(sp)
   120000240:	10 00 de 23 	lda	sp,16(sp)
   120000244:	01 80 fa 6b 	ret

0000000120000248 <call_complex>:
   120000248:	02 00 bb 27 	ldah	gp,2(t12)
   12000024c:	50 84 bd 23 	lda	gp,-31664(gp)
   120000250:	f0 ff de 23 	lda	sp,-16(sp)
   120000254:	00 00 5e b7 	stq	ra,0(sp)
   120000258:	08 00 3e b5 	stq	s0,8(sp)
   12000025c:	09 04 f1 47 	mov	a1,s0
   120000260:	10 04 f1 47 	mov	a1,a0
   120000264:	af ff 5f d3 	bsr	ra,120000124 <return_arg1>
   120000268:	00 80 3d a4 	ldq	t0,-32768(gp)
   12000026c:	00 00 01 b0 	stl	v0,0(t0)
   120000270:	00 04 e9 47 	mov	s0,v0
   120000274:	00 00 5e a7 	ldq	ra,0(sp)
   120000278:	08 00 3e a5 	ldq	s0,8(sp)
   12000027c:	10 00 de 23 	lda	sp,16(sp)
   120000280:	01 80 fa 6b 	ret

0000000120000284 <call_pointer>:
   120000284:	02 00 bb 27 	ldah	gp,2(t12)
   120000288:	14 84 bd 23 	lda	gp,-31724(gp)
   12000028c:	f0 ff de 23 	lda	sp,-16(sp)
   120000290:	00 00 5e b7 	stq	ra,0(sp)
   120000294:	01 00 7f 27 	ldah	t12,1
   120000298:	d0 fe 7b 23 	lda	t12,-304(t12)
   12000029c:	00 40 5b 6b 	jsr	ra,(t12),1200002a0 <call_pointer+0x1c>
   1200002a0:	02 00 ba 27 	ldah	gp,2(ra)
   1200002a4:	f8 83 bd 23 	lda	gp,-31752(gp)
   1200002a8:	00 00 5e a7 	ldq	ra,0(sp)
   1200002ac:	10 00 de 23 	lda	sp,16(sp)
   1200002b0:	01 80 fa 6b 	ret

00000001200002b4 <condition>:
   1200002b4:	02 00 00 e6 	beq	a0,1200002c0 <condition+0xc>
   1200002b8:	0a 00 3f 20 	lda	t0,10
   1200002bc:	00 00 30 b0 	stl	t0,0(a0)
   1200002c0:	00 04 ff 47 	clr	v0
   1200002c4:	01 80 fa 6b 	ret

00000001200002c8 <loop>:
   1200002c8:	00 04 ff 47 	clr	v0
   1200002cc:	05 00 00 ee 	ble	a0,1200002e4 <loop+0x1c>
   1200002d0:	01 04 ff 47 	clr	t0
   1200002d4:	00 00 20 40 	addl	t0,v0,v0
   1200002d8:	01 30 20 40 	addl	t0,0x1,t0
   1200002dc:	a2 05 30 40 	cmpeq	t0,a0,t1
   1200002e0:	fc ff 5f e4 	beq	t1,1200002d4 <loop+0xc>
   1200002e4:	01 80 fa 6b 	ret

00000001200002e8 <main>:
   1200002e8:	00 04 ff 47 	clr	v0
   1200002ec:	01 80 fa 6b 	ret