Created
July 17, 2019 05:30
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Vivado Tcl Scripts
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update_compile_order -fileset sources_1 | |
reset_run impl_1 | |
reset_run synth_1 | |
launch_runs -jobs 2 impl_1 -to_step write_bitstream | |
wait_on_run impl_1 | |
exit |
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update_compile_order -fileset sources_1 | |
# If IP cores are used | |
if { [llength [get_ips]] != 0} { | |
upgrade_ip [get_ips] | |
foreach ip [get_ips] { | |
create_ip_run [get_ips $ip] | |
} | |
set ip_runs [get_runs -filter {SRCSET != sources_1 && IS_SYNTHESIS && STATUS != "synth_design Complete!"}] | |
if { [llength $ip_runs] != 0} { | |
launch_runs -quiet -jobs 2 {*}$ip_runs | |
foreach r $ip_runs { | |
wait_on_run $r | |
} | |
} | |
} | |
exit |
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#!/bin/bash | |
VIVADO_PATH=/path/to/your/vivado | |
PROJECT_NAME=your_project_name | |
export SIMULATION=your_simulation_set_name | |
${VIVADO_PATH} -mode tcl -source scripts/generate_all_ips.tcl ${PROJECT_NAME}.xpr | |
${VIVADO_PATH} -mode tcl -source scripts/run_simulation.tcl ${PROJECT_NAME}.xpr | |
${VIVADO_PATH} -mode tcl -source scripts/build_project.tcl ${PROJECT_NAME}.xpr |
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update_compile_order -fileset sources_1 | |
set simulations [get_fileset $env(SIMULATION)] | |
if { [llength simulations] != 0} { | |
foreach sim $simulations { | |
update_compile_order -fileset $sim | |
launch_simulation -simset $sim | |
# make simulation complete | |
run all | |
} | |
} | |
exit |
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