partial.patch

+    //case MVM_OP_cmp_u :
     case MVM_OP_cmp_i : {
         MVMint32 reg_a = ins->operands[0].reg.orig;
         MVMint32 reg_b = ins->operands[1].reg.orig;
@@ -1485,9 +1506,16 @@ void MVM_jit_emit_primitive(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJ
         | cmp TMP1, WORK[reg_c];
         /* copy the right comparison bit to the lower byte of the rax
            register */
-        | setg TMP2b;
+        fprintf(stderr, "o = %d, cmp_i = %d\n", ins->info->opcode, MVM_OP_cmp_i);
+        if (ins->info->opcode == MVM_OP_cmp_i)
+            | setg TMP2b;
+        else
+            | setg TMP2b;
         | movzx TMP2, TMP2b;
-        | setl TMP3b;
+        if (ins->info->opcode == MVM_OP_cmp_i)
+            | setl TMP3b;
+        else
+            | setl TMP3b;
         | movzx TMP3, TMP3b;
         | sub TMP2, TMP3;
         | mov WORK[reg_a], TMP2;