Skip to content

Instantly share code, notes, and snippets.

@MrVan

MrVan/RTL Loader for mips

Last active December 16, 2015 18:49
Show Gist options
  • Star 0 You must be signed in to star a gist
  • Fork 0 You must be signed in to fork a gist
  • Save MrVan/5480356 to your computer and use it in GitHub Desktop.
Save MrVan/5480356 to your computer and use it in GitHub Desktop.
Download ZIP
A basic implementation, supporting 3 reloc types now.
Raw
RTL Loader for mips
From fa4544466e266551b3f8f3afe98a9d468d18351f Mon Sep 17 00:00:00 2001
From: Peng Fan <van.freenix@gmail.com>
Date: Mon, 29 Apr 2013 16:27:22 +0800
Subject: [PATCH] 1st mips
---
.gitignore | 1 +
a.sh | 6 +
b.sh | 5 +
c.sh | 5 +
d.sh | 2 +
libbsd/include/arch/mips/machine/ansi.h | 67 +++
libbsd/include/arch/mips/machine/asm.h | 618 ++++++++++++++++++++++++
libbsd/include/arch/mips/machine/cdefs.h | 76 +++
libbsd/include/arch/mips/machine/elf_machdep.h | 196 ++++++++
libbsd/include/arch/mips/machine/int_types.h | 79 +++
rtems.py | 2 +
rtl-elf.c | 2 +
rtl-mdreloc-mips.c | 156 ++++++
rtl-rap.c | 1 +
rtl-sym.c | 3 +-
wscript | 14 +-
xa.c | 8 +
17 files changed, 1238 insertions(+), 3 deletions(-)
create mode 100755 a.sh
create mode 100755 b.sh
create mode 100755 c.sh
create mode 100644 d.sh
create mode 100644 libbsd/include/arch/mips/machine/ansi.h
create mode 100644 libbsd/include/arch/mips/machine/asm.h
create mode 100644 libbsd/include/arch/mips/machine/cdefs.h
create mode 100644 libbsd/include/arch/mips/machine/elf_machdep.h
create mode 100644 libbsd/include/arch/mips/machine/int_types.h
create mode 100644 rtl-mdreloc-mips.c
diff --git a/.gitignore b/.gitignore
index 60089a0..4d195ca 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,3 +1,4 @@
.lock-waf*
build
*.pyc
+./*.sh
diff --git a/a.sh b/a.sh
new file mode 100755
index 0000000..0ab1466
--- /dev/null
+++ b/a.sh
@@ -0,0 +1,6 @@
+#!/bin/sh
+waf configure --rtems=/opt/rtems-4.11 --rtems-tools=/opt/rtems-4.11 --rtems-archs=mips
+waf
+cd build/arm-rtemseabi4.11-tiny6410
+arm-rtemseabi4.11-objcopy -O binary -S rtld rtld.bin
+cd -
diff --git a/b.sh b/b.sh
new file mode 100755
index 0000000..fb5b3dd
--- /dev/null
+++ b/b.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+cd build/arm-rtemseabi4.11-tiny6410
+arm-rtemseabi4.11-objcopy -O binary -S rtld rtld.bin
+arm-rtemseabi4.11-objdump -d rtld > rtld.s
+cd -
diff --git a/c.sh b/c.sh
new file mode 100755
index 0000000..f35f90b
--- /dev/null
+++ b/c.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+gdb /opt/rtems-4.11/bin/rtems-ld
+set args --base build/arm-rtemseabi4.11-tiny6410/rtld.prelink --entry my_main --cc /opt/rtems-4.11/bin/arm-rtemseabi4.11-gcc build/arm-rtemseabi4.11-tiny6410/xa.c.8.o build/arm-rtemseabi4.11-tiny6410/x-long-name-to-create-gnu-extension-in-archive.c.8.o -o /home/freenix/work/gsoc/rtems/rtl/mytarget/build/arm-rtemseabi4.11-tiny6410/x.rap -Wl,-Bstatic
+
+/opt/rtems-4.11/bin/rtems-ld -v --base build/arm-rtemseabi4.11-tiny6410/rtld.prelink --entry my_main --cc /opt/rtems-4.11/bin/arm-rtemseabi4.11-gcc build/arm-rtemseabi4.11-tiny6410/xa.c.8.o build/arm-rtemseabi4.11-tiny6410/x-long-name-to-create-gnu-extension-in-archive.c.8.o -o /home/freenix/work/gsoc/rtems/rtl/mytarget/build/arm-rtemseabi4.11-tiny6410/x.rap -Wl,-Bstatic
diff --git a/d.sh b/d.sh
new file mode 100644
index 0000000..4d7a15c
--- /dev/null
+++ b/d.sh
@@ -0,0 +1,2 @@
+#!/bin/sh
+/opt/rtems-4.11/bin/rtems-ld -v --base rtld.prelink --entry my_main --cc /opt/rtems-4.11/bin/mips-rtems4.11-gcc xa.c.8.o x-long-name-to-create-gnu-extension-in-archive.c.8.o -o /home/freenix/work/gsoc/rtems/rtl/mytarget/build/mips-rtems4.11-jmr3904/x.rap -Wl,-Bstatic > 1
diff --git a/libbsd/include/arch/mips/machine/ansi.h b/libbsd/include/arch/mips/machine/ansi.h
new file mode 100644
index 0000000..463cbd3
--- /dev/null
+++ b/libbsd/include/arch/mips/machine/ansi.h
@@ -0,0 +1,67 @@
+/* $NetBSD: ansi.h,v 1.28 2011/07/17 20:54:43 joerg Exp $ */
+
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)ansi.h 8.2 (Berkeley) 1/4/94
+ */
+
+#ifndef _ANSI_H_
+#define _ANSI_H_
+
+#include <sys/cdefs.h>
+#include <machine/int_types.h>
+
+/*
+ * Types which are fundamental to the implementation and may appear in
+ * more than one standard header are defined here. Standard headers
+ * then use:
+ * #ifdef _BSD_SIZE_T_
+ * typedef _BSD_SIZE_T_ size_t;
+ * #undef _BSD_SIZE_T_
+ * #endif
+ */
+#define _BSD_CLOCK_T_ unsigned long /* clock() */
+#ifndef __mips_o32
+#define _BSD_PTRDIFF_T_ long /* ptr1 - ptr2 */
+#define _BSD_SIZE_T_ unsigned long /* sizeof() */
+#define _BSD_SSIZE_T_ long /* byte count or error */
+#else
+#define _BSD_PTRDIFF_T_ int /* ptr1 - ptr2 */
+#define _BSD_SIZE_T_ unsigned int /* sizeof() */
+#define _BSD_SSIZE_T_ int /* byte count or error */
+#endif /* !__mips_o32 */
+#define _BSD_TIME_T_ __int64_t /* time() */
+#define _BSD_CLOCKID_T_ int /* clockid_t */
+#define _BSD_TIMER_T_ int /* timer_t */
+#define _BSD_SUSECONDS_T_ int /* suseconds_t */
+#define _BSD_USECONDS_T_ unsigned int /* useconds_t */
+#define _BSD_WCHAR_T_ int /* wchar_t */
+#define _BSD_WINT_T_ int /* wint_t */
+
+#endif /* _ANSI_H_ */
diff --git a/libbsd/include/arch/mips/machine/asm.h b/libbsd/include/arch/mips/machine/asm.h
new file mode 100644
index 0000000..f3aba2c
--- /dev/null
+++ b/libbsd/include/arch/mips/machine/asm.h
@@ -0,0 +1,618 @@
+/* $NetBSD: asm.h,v 1.46 2011/11/10 00:37:38 joerg Exp $ */
+
+/*
+ * Copyright (c) 1992, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Ralph Campbell.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93
+ */
+
+/*
+ * machAsmDefs.h --
+ *
+ * Macros used when writing assembler programs.
+ *
+ * Copyright (C) 1989 Digital Equipment Corporation.
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose and without fee is hereby granted,
+ * provided that the above copyright notice appears in all copies.
+ * Digital Equipment Corporation makes no representations about the
+ * suitability of this software for any purpose. It is provided "as is"
+ * without express or implied warranty.
+ *
+ * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h,
+ * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL)
+ */
+
+#ifndef _MIPS_ASM_H
+#define _MIPS_ASM_H
+
+#include <sys/cdefs.h> /* for API selection */
+#include <mips/regdef.h>
+
+/*
+ * Define -pg profile entry code.
+ * Must always be noreorder, must never use a macro instruction
+ * Final addiu to t9 must always equal the size of this _KERN_MCOUNT
+ */
+#define _KERN_MCOUNT \
+ .set push; \
+ .set noreorder; \
+ .set noat; \
+ subu sp,sp,16; \
+ sw t9,12(sp); \
+ move AT,ra; \
+ lui t9,%hi(_mcount); \
+ addiu t9,t9,%lo(_mcount); \
+ jalr t9; \
+ nop; \
+ lw t9,4(sp); \
+ addiu sp,sp,8; \
+ addiu t9,t9,40; \
+ .set pop;
+
+#ifdef GPROF
+#define MCOUNT _KERN_MCOUNT
+#else
+#define MCOUNT
+#endif
+
+#ifdef USE_AENT
+#define AENT(x) \
+ .aent x, 0
+#else
+#define AENT(x)
+#endif
+
+/*
+ * WEAK_ALIAS: create a weak alias.
+ */
+#define WEAK_ALIAS(alias,sym) \
+ .weak alias; \
+ alias = sym
+/*
+ * STRONG_ALIAS: create a strong alias.
+ */
+#define STRONG_ALIAS(alias,sym) \
+ .globl alias; \
+ alias = sym
+
+/*
+ * WARN_REFERENCES: create a warning if the specified symbol is referenced.
+ */
+#define WARN_REFERENCES(sym,msg) \
+ .pushsection __CONCAT(.gnu.warning.,sym); \
+ .ascii msg; \
+ .popsection
+
+/*
+ * STATIC_LEAF_NOPROFILE
+ * No profilable local leaf routine.
+ */
+#define STATIC_LEAF_NOPROFILE(x) \
+ .ent _C_LABEL(x), 0; \
+_C_LABEL(x): ; \
+ .frame sp, 0, ra
+
+/*
+ * LEAF_NOPROFILE
+ * No profilable leaf routine.
+ */
+#define LEAF_NOPROFILE(x) \
+ .globl _C_LABEL(x); \
+ STATIC_LEAF_NOPROFILE(x)
+
+/*
+ * STATIC_LEAF
+ * Declare a local leaf function.
+ */
+#define STATIC_LEAF(x) \
+ STATIC_LEAF_NOPROFILE(x); \
+ MCOUNT
+
+/*
+ * LEAF
+ * A leaf routine does
+ * - call no other function,
+ * - never use any register that callee-saved (S0-S8), and
+ * - not use any local stack storage.
+ */
+#define LEAF(x) \
+ LEAF_NOPROFILE(x); \
+ MCOUNT
+
+/*
+ * STATIC_XLEAF
+ * declare alternate entry to a static leaf routine
+ */
+#define STATIC_XLEAF(x) \
+ AENT (_C_LABEL(x)); \
+_C_LABEL(x):
+
+/*
+ * XLEAF
+ * declare alternate entry to leaf routine
+ */
+#define XLEAF(x) \
+ .globl _C_LABEL(x); \
+ STATIC_XLEAF(x)
+
+/*
+ * STATIC_NESTED_NOPROFILE
+ * No profilable local nested routine.
+ */
+#define STATIC_NESTED_NOPROFILE(x, fsize, retpc) \
+ .ent _C_LABEL(x), 0; \
+_C_LABEL(x): ; \
+ .frame sp, fsize, retpc
+
+/*
+ * NESTED_NOPROFILE
+ * No profilable nested routine.
+ */
+#define NESTED_NOPROFILE(x, fsize, retpc) \
+ .globl _C_LABEL(x); \
+ STATIC_NESTED_NOPROFILE(x, fsize, retpc)
+
+/*
+ * NESTED
+ * A function calls other functions and needs
+ * therefore stack space to save/restore registers.
+ */
+#define NESTED(x, fsize, retpc) \
+ NESTED_NOPROFILE(x, fsize, retpc); \
+ MCOUNT
+
+/*
+ * STATIC_NESTED
+ * No profilable local nested routine.
+ */
+#define STATIC_NESTED(x, fsize, retpc) \
+ STATIC_NESTED_NOPROFILE(x, fsize, retpc); \
+ MCOUNT
+
+/*
+ * XNESTED
+ * declare alternate entry point to nested routine.
+ */
+#define XNESTED(x) \
+ .globl _C_LABEL(x); \
+ AENT (_C_LABEL(x)); \
+_C_LABEL(x):
+
+/*
+ * END
+ * Mark end of a procedure.
+ */
+#define END(x) \
+ .end _C_LABEL(x); \
+ .size _C_LABEL(x), . - _C_LABEL(x)
+
+/*
+ * IMPORT -- import external symbol
+ */
+#define IMPORT(sym, size) \
+ .extern _C_LABEL(sym),size
+
+/*
+ * EXPORT -- export definition of symbol
+ */
+#define EXPORT(x) \
+ .globl _C_LABEL(x); \
+_C_LABEL(x):
+
+/*
+ * VECTOR
+ * exception vector entrypoint
+ * XXX: regmask should be used to generate .mask
+ */
+#define VECTOR(x, regmask) \
+ .ent _C_LABEL(x),0; \
+ EXPORT(x); \
+
+#define VECTOR_END(x) \
+ EXPORT(__CONCAT(x,_end)); \
+ END(x); \
+ .org _C_LABEL(x) + 0x80
+
+/*
+ * Macros to panic and printf from assembly language.
+ */
+#define PANIC(msg) \
+ PTR_LA a0, 9f; \
+ jal _C_LABEL(panic); \
+ nop; \
+ MSG(msg)
+
+#define PRINTF(msg) \
+ PTR_LA a0, 9f; \
+ jal _C_LABEL(printf); \
+ nop; \
+ MSG(msg)
+
+#define MSG(msg) \
+ .rdata; \
+9: .asciiz msg; \
+ .text
+
+#define ASMSTR(str) \
+ .asciiz str; \
+ .align 3
+
+#define RCSID(name) .pushsection ".ident"; .asciz name; .popsection
+
+/*
+ * XXX retain dialects XXX
+ */
+#define ALEAF(x) XLEAF(x)
+#define NLEAF(x) LEAF_NOPROFILE(x)
+#define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc)
+#define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc)
+
+#if defined(__mips_o32)
+#define SZREG 4
+#else
+#define SZREG 8
+#endif
+
+#if defined(__mips_o32) || defined(__mips_o64)
+#define ALSK 7 /* stack alignment */
+#define ALMASK -7 /* stack alignment */
+#define SZFPREG 4
+#define FP_L lwc1
+#define FP_S swc1
+#else
+#define ALSK 15 /* stack alignment */
+#define ALMASK -15 /* stack alignment */
+#define SZFPREG 8
+#define FP_L ldc1
+#define FP_S sdc1
+#endif
+
+/*
+ * standard callframe {
+ * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64)
+ * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1)
+ * register_t cf_gp; global pointer (only on n32 and n64)
+ * register_t cf_sp; frame pointer
+ * register_t cf_ra; return address
+ * };
+ */
+#if defined(__mips_o32) || defined(__mips_o64)
+#define CALLFRAME_SIZ (SZREG * (4 + 2))
+#define CALLFRAME_S0 0
+#elif defined(__mips_n32) || defined(__mips_n64)
+#define CALLFRAME_SIZ (SZREG * 4)
+#define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG)
+#endif
+#ifndef _KERNEL
+#define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG)
+#endif
+#define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG)
+#define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG)
+
+/*
+ * While it would be nice to be compatible with the SGI
+ * REG_L and REG_S macros, because they do not take parameters, it
+ * is impossible to use them with the _MIPS_SIM_ABIX32 model.
+ *
+ * These macros hide the use of mips3 instructions from the
+ * assembler to prevent the assembler from generating 64-bit style
+ * ABI calls.
+ */
+#if _MIPS_SZPTR == 32
+#define PTR_ADD add
+#define PTR_ADDI addi
+#define PTR_ADDU addu
+#define PTR_ADDIU addiu
+#define PTR_SUB subu
+#define PTR_SUBI subi
+#define PTR_SUBU subu
+#define PTR_SUBIU subu
+#define PTR_L lw
+#define PTR_LA la
+#define PTR_S sw
+#define PTR_SLL sll
+#define PTR_SLLV sllv
+#define PTR_SRL srl
+#define PTR_SRLV srlv
+#define PTR_SRA sra
+#define PTR_SRAV srav
+#define PTR_LL ll
+#define PTR_SC sc
+#define PTR_WORD .word
+#define PTR_SCALESHIFT 2
+#else /* _MIPS_SZPTR == 64 */
+#define PTR_ADD dadd
+#define PTR_ADDI daddi
+#define PTR_ADDU daddu
+#define PTR_ADDIU daddiu
+#define PTR_SUB dsubu
+#define PTR_SUBI dsubi
+#define PTR_SUBU dsubu
+#define PTR_SUBIU dsubu
+#define PTR_L ld
+#define PTR_LA dla
+#define PTR_S sd
+#define PTR_SLL dsll
+#define PTR_SLLV dsllv
+#define PTR_SRL dsrl
+#define PTR_SRLV dsrlv
+#define PTR_SRA dsra
+#define PTR_SRAV dsrav
+#define PTR_LL lld
+#define PTR_SC scd
+#define PTR_WORD .dword
+#define PTR_SCALESHIFT 3
+#endif /* _MIPS_SZPTR == 64 */
+
+#if _MIPS_SZINT == 32
+#define INT_ADD add
+#define INT_ADDI addi
+#define INT_ADDU addu
+#define INT_ADDIU addiu
+#define INT_SUB subu
+#define INT_SUBI subi
+#define INT_SUBU subu
+#define INT_SUBIU subu
+#define INT_L lw
+#define INT_LA la
+#define INT_S sw
+#define INT_SLL sll
+#define INT_SLLV sllv
+#define INT_SRL srl
+#define INT_SRLV srlv
+#define INT_SRA sra
+#define INT_SRAV srav
+#define INT_LL ll
+#define INT_SC sc
+#define INT_WORD .word
+#define INT_SCALESHIFT 2
+#else
+#define INT_ADD dadd
+#define INT_ADDI daddi
+#define INT_ADDU daddu
+#define INT_ADDIU daddiu
+#define INT_SUB dsubu
+#define INT_SUBI dsubi
+#define INT_SUBU dsubu
+#define INT_SUBIU dsubu
+#define INT_L ld
+#define INT_LA dla
+#define INT_S sd
+#define INT_SLL dsll
+#define INT_SLLV dsllv
+#define INT_SRL dsrl
+#define INT_SRLV dsrlv
+#define INT_SRA dsra
+#define INT_SRAV dsrav
+#define INT_LL lld
+#define INT_SC scd
+#define INT_WORD .dword
+#define INT_SCALESHIFT 3
+#endif
+
+#if _MIPS_SZLONG == 32
+#define LONG_ADD add
+#define LONG_ADDI addi
+#define LONG_ADDU addu
+#define LONG_ADDIU addiu
+#define LONG_SUB subu
+#define LONG_SUBI subi
+#define LONG_SUBU subu
+#define LONG_SUBIU subu
+#define LONG_L lw
+#define LONG_LA la
+#define LONG_S sw
+#define LONG_SLL sll
+#define LONG_SLLV sllv
+#define LONG_SRL srl
+#define LONG_SRLV srlv
+#define LONG_SRA sra
+#define LONG_SRAV srav
+#define LONG_LL ll
+#define LONG_SC sc
+#define LONG_WORD .word
+#define LONG_SCALESHIFT 2
+#else
+#define LONG_ADD dadd
+#define LONG_ADDI daddi
+#define LONG_ADDU daddu
+#define LONG_ADDIU daddiu
+#define LONG_SUB dsubu
+#define LONG_SUBI dsubi
+#define LONG_SUBU dsubu
+#define LONG_SUBIU dsubu
+#define LONG_L ld
+#define LONG_LA dla
+#define LONG_S sd
+#define LONG_SLL dsll
+#define LONG_SLLV dsllv
+#define LONG_SRL dsrl
+#define LONG_SRLV dsrlv
+#define LONG_SRA dsra
+#define LONG_SRAV dsrav
+#define LONG_LL lld
+#define LONG_SC scd
+#define LONG_WORD .dword
+#define LONG_SCALESHIFT 3
+#endif
+
+#if SZREG == 4
+#define REG_L lw
+#define REG_S sw
+#define REG_LI li
+#define REG_ADDU addu
+#define REG_SLL sll
+#define REG_SLLV sllv
+#define REG_SRL srl
+#define REG_SRLV srlv
+#define REG_SRA sra
+#define REG_SRAV srav
+#define REG_LL ll
+#define REG_SC sc
+#define REG_SCALESHIFT 2
+#else
+#define REG_L ld
+#define REG_S sd
+#define REG_LI dli
+#define REG_ADDU daddu
+#define REG_SLL dsll
+#define REG_SLLV dsllv
+#define REG_SRL dsrl
+#define REG_SRLV dsrlv
+#define REG_SRA dsra
+#define REG_SRAV dsrav
+#define REG_LL lld
+#define REG_SC scd
+#define REG_SCALESHIFT 3
+#endif
+
+#if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \
+ _MIPS_ISA == _MIPS_ISA_MIPS32
+#define MFC0 mfc0
+#define MTC0 mtc0
+#endif
+#if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \
+ _MIPS_ISA == _MIPS_ISA_MIPS64
+#define MFC0 dmfc0
+#define MTC0 dmtc0
+#endif
+
+#if defined(__mips_o32) || defined(__mips_o64)
+
+#ifdef __ABICALLS__
+#define CPRESTORE(r) .cprestore r
+#define CPLOAD(r) .cpload r
+#else
+#define CPRESTORE(r) /* not needed */
+#define CPLOAD(r) /* not needed */
+#endif
+
+#define SETUP_GP \
+ .set push; \
+ .set noreorder; \
+ .cpload t9; \
+ .set pop
+#define SETUP_GPX(r) \
+ .set push; \
+ .set noreorder; \
+ move r,ra; /* save old ra */ \
+ bal 7f; \
+ nop; \
+ 7: .cpload ra; \
+ move ra,r; \
+ .set pop
+#define SETUP_GPX_L(r,lbl) \
+ .set push; \
+ .set noreorder; \
+ move r,ra; /* save old ra */ \
+ bal lbl; \
+ nop; \
+ lbl: .cpload ra; \
+ move ra,r; \
+ .set pop
+#define SAVE_GP(x) .cprestore x
+
+#define SETUP_GP64(a,b) /* n32/n64 specific */
+#define SETUP_GP64_R(a,b) /* n32/n64 specific */
+#define SETUP_GPX64(a,b) /* n32/n64 specific */
+#define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */
+#define RESTORE_GP64 /* n32/n64 specific */
+#define USE_ALT_CP(a) /* n32/n64 specific */
+#endif /* __mips_o32 || __mips_o64 */
+
+#if defined(__mips_o32) || defined(__mips_o64)
+#define REG_PROLOGUE .set push
+#define REG_EPILOGUE .set pop
+#endif
+#if defined(__mips_n32) || defined(__mips_n64)
+#define REG_PROLOGUE .set push ; .set mips3
+#define REG_EPILOGUE .set pop
+#endif
+
+#if defined(__mips_n32) || defined(__mips_n64)
+#define SETUP_GP /* o32 specific */
+#define SETUP_GPX(r) /* o32 specific */
+#define SETUP_GPX_L(r,lbl) /* o32 specific */
+#define SAVE_GP(x) /* o32 specific */
+#define SETUP_GP64(a,b) .cpsetup $25, a, b
+#define SETUP_GPX64(a,b) \
+ .set push; \
+ move b,ra; \
+ .set noreorder; \
+ bal 7f; \
+ nop; \
+ 7: .set pop; \
+ .cpsetup ra, a, 7b; \
+ move ra,b
+#define SETUP_GPX64_L(a,b,c) \
+ .set push; \
+ move b,ra; \
+ .set noreorder; \
+ bal c; \
+ nop; \
+ c: .set pop; \
+ .cpsetup ra, a, c; \
+ move ra,b
+#define RESTORE_GP64 .cpreturn
+#define USE_ALT_CP(a) .cplocal a
+#endif /* __mips_n32 || __mips_n64 */
+
+/*
+ * The DYNAMIC_STATUS_MASK option adds an additional masking operation
+ * when updating the hardware interrupt mask in the status register.
+ *
+ * This is useful for platforms that need to at run-time mask
+ * interrupts based on motherboard configuration or to handle
+ * slowly clearing interrupts.
+ *
+ * XXX this is only currently implemented for mips3.
+ */
+#ifdef MIPS_DYNAMIC_STATUS_MASK
+#define DYNAMIC_STATUS_MASK(sr,scratch) \
+ lw scratch, mips_dynamic_status_mask; \
+ and sr, sr, scratch
+
+#define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \
+ ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \
+ DYNAMIC_STATUS_MASK(sr,scratch1)
+#else
+#define DYNAMIC_STATUS_MASK(sr,scratch)
+#define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1)
+#endif
+
+/* See lock_stubs.S. */
+#define LOG2_MIPS_LOCK_RAS_SIZE 8
+#define MIPS_LOCK_RAS_SIZE 256 /* 16 bytes left over */
+
+#define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off)
+
+#endif /* _MIPS_ASM_H */
diff --git a/libbsd/include/arch/mips/machine/cdefs.h b/libbsd/include/arch/mips/machine/cdefs.h
new file mode 100644
index 0000000..3bf2d9a
--- /dev/null
+++ b/libbsd/include/arch/mips/machine/cdefs.h
@@ -0,0 +1,76 @@
+/* $NetBSD: cdefs.h,v 1.14 2012/01/20 14:08:06 joerg Exp $ */
+
+/*
+ * Copyright (c) 1995 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
+ * School of Computer Science
+ * Carnegie Mellon University
+ * Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#ifndef _MIPS_CDEFS_H_
+#define _MIPS_CDEFS_H_
+
+/*
+ * These are depreciated. Use __mips_{o32,o64,n32,n64} instead.
+ */
+/* MIPS Subprogram Interface Model */
+#define _MIPS_SIM_ABIX32 4 /* 64 bit safe, ILP32 o32 model */
+#define _MIPS_SIM_ABI64 3
+#define _MIPS_SIM_NABI32 2 /* 64bit safe, ILP32 n32 model */
+#define _MIPS_SIM_ABI32 1
+
+#define _MIPS_BSD_API_LP32 _MIPS_SIM_ABI32
+#define _MIPS_BSD_API_LP32_64CLEAN _MIPS_SIM_ABIX32
+#define _MIPS_BSD_API_LP64 _MIPS_SIM_ABI64
+
+#define _MIPS_BSD_API_O32 _MIPS_SIM_ABI32
+#define _MIPS_BSD_API_O64 _MIPS_SIM_ABIX32
+#define _MIPS_BSD_API_N32 _MIPS_SIM_NABI32
+#define _MIPS_BSD_API_N64 _MIPS_SIM_ABI64
+
+#define _MIPS_SIM_NEWABI_P(abi) ((abi) == _MIPS_SIM_NABI32 || \
+ (abi) == _MIPS_SIM_ABI64)
+
+#define _MIPS_SIM_LP64_P(abi) ((abi) == _MIPS_SIM_ABIX32 || \
+ (abi) == _MIPS_SIM_ABI64)
+
+#if defined(__mips_n64)
+#define _MIPS_BSD_API _MIPS_BSD_API_N64
+#elif defined(__mips_n32)
+#define _MIPS_BSD_API _MIPS_BSD_API_N32
+#elif defined(__mips_o64)
+#define _MIPS_BSD_API _MIPS_BSD_API_O64
+#else
+#define _MIPS_BSD_API _MIPS_BSD_API_O32
+#endif
+
+#define _MIPS_ISA_MIPS1 1
+#define _MIPS_ISA_MIPS2 2
+#define _MIPS_ISA_MIPS3 3
+#define _MIPS_ISA_MIPS4 4
+#define _MIPS_ISA_MIPS32 5
+#define _MIPS_ISA_MIPS64 6
+
+#define __ALIGNBYTES 7
+
+#endif /* !_MIPS_CDEFS_H_ */
diff --git a/libbsd/include/arch/mips/machine/elf_machdep.h b/libbsd/include/arch/mips/machine/elf_machdep.h
new file mode 100644
index 0000000..d27d431
--- /dev/null
+++ b/libbsd/include/arch/mips/machine/elf_machdep.h
@@ -0,0 +1,196 @@
+/* $NetBSD: elf_machdep.h,v 1.15 2011/03/15 07:39:22 matt Exp $ */
+
+#ifndef _MIPS_ELF_MACHDEP_H_
+#define _MIPS_ELF_MACHDEP_H_
+
+#ifdef _LP64
+#define ARCH_ELFSIZE 64 /* MD native binary size */
+#else
+#define ARCH_ELFSIZE 32 /* MD native binary size */
+#endif
+
+#if ELFSIZE == 32
+#define ELF32_MACHDEP_ID_CASES \
+ case EM_MIPS: \
+ break;
+
+#define ELF32_MACHDEP_ID EM_MIPS
+#elif ELFSIZE == 64
+#define ELF64_MACHDEP_ID_CASES \
+ case EM_MIPS: \
+ break;
+
+#define ELF64_MACHDEP_ID EM_MIPS
+#endif
+
+/* mips relocs. */
+
+#define R_MIPS_NONE 0
+#define R_MIPS_16 1
+#define R_MIPS_32 2
+#define R_MIPS_REL32 3
+#define R_MIPS_REL R_MIPS_REL32
+#define R_MIPS_26 4
+#define R_MIPS_HI16 5 /* high 16 bits of symbol value */
+#define R_MIPS_LO16 6 /* low 16 bits of symbol value */
+#define R_MIPS_GPREL16 7 /* GP-relative reference */
+#define R_MIPS_LITERAL 8 /* Reference to literal section */
+#define R_MIPS_GOT16 9 /* Reference to global offset table */
+#define R_MIPS_GOT R_MIPS_GOT16
+#define R_MIPS_PC16 10 /* 16 bit PC relative reference */
+#define R_MIPS_CALL16 11 /* 16 bit call thru glbl offset tbl */
+#define R_MIPS_CALL R_MIPS_CALL16
+#define R_MIPS_GPREL32 12
+
+/* 13, 14, 15 are not defined at this point. */
+#define R_MIPS_UNUSED1 13
+#define R_MIPS_UNUSED2 14
+#define R_MIPS_UNUSED3 15
+
+/*
+ * The remaining relocs are apparently part of the 64-bit Irix ELF ABI.
+ */
+#define R_MIPS_SHIFT5 16
+#define R_MIPS_SHIFT6 17
+
+#define R_MIPS_64 18
+#define R_MIPS_GOT_DISP 19
+#define R_MIPS_GOT_PAGE 20
+#define R_MIPS_GOT_OFST 21
+#define R_MIPS_GOT_HI16 22
+#define R_MIPS_GOT_LO16 23
+#define R_MIPS_SUB 24
+#define R_MIPS_INSERT_A 25
+#define R_MIPS_INSERT_B 26
+#define R_MIPS_DELETE 27
+#define R_MIPS_HIGHER 28
+#define R_MIPS_HIGHEST 29
+#define R_MIPS_CALL_HI16 30
+#define R_MIPS_CALL_LO16 31
+#define R_MIPS_SCN_DISP 32
+#define R_MIPS_REL16 33
+#define R_MIPS_ADD_IMMEDIATE 34
+#define R_MIPS_PJUMP 35
+#define R_MIPS_RELGOT 36
+#define R_MIPS_JALR 37
+/* TLS relocations */
+
+#define R_MIPS_TLS_DTPMOD32 38 /* Module number 32 bit */
+#define R_MIPS_TLS_DTPREL32 39 /* Module-relative offset 32 bit */
+#define R_MIPS_TLS_DTPMOD64 40 /* Module number 64 bit */
+#define R_MIPS_TLS_DTPREL64 41 /* Module-relative offset 64 bit */
+#define R_MIPS_TLS_GD 42 /* 16 bit GOT offset for GD */
+#define R_MIPS_TLS_LDM 43 /* 16 bit GOT offset for LDM */
+#define R_MIPS_TLS_DTPREL_HI16 44 /* Module-relative offset, high 16 bits */
+#define R_MIPS_TLS_DTPREL_LO16 45 /* Module-relative offset, low 16 bits */
+#define R_MIPS_TLS_GOTTPREL 46 /* 16 bit GOT offset for IE */
+#define R_MIPS_TLS_TPREL32 47 /* TP-relative offset, 32 bit */
+#define R_MIPS_TLS_TPREL64 48 /* TP-relative offset, 64 bit */
+#define R_MIPS_TLS_TPREL_HI16 49 /* TP-relative offset, high 16 bits */
+#define R_MIPS_TLS_TPREL_LO16 50 /* TP-relative offset, low 16 bits */
+
+#define R_MIPS_max 51
+
+#define R_TYPE(name) __CONCAT(R_MIPS_,name)
+
+#define R_MIPS16_min 100
+#define R_MIPS16_26 100
+#define R_MIPS16_GPREL 101
+#define R_MIPS16_GOT16 102
+#define R_MIPS16_CALL16 103
+#define R_MIPS16_HI16 104
+#define R_MIPS16_LO16 105
+#define R_MIPS16_max 106
+
+
+/* mips dynamic tags */
+
+#define DT_MIPS_RLD_VERSION 0x70000001
+#define DT_MIPS_TIME_STAMP 0x70000002
+#define DT_MIPS_ICHECKSUM 0x70000003
+#define DT_MIPS_IVERSION 0x70000004
+#define DT_MIPS_FLAGS 0x70000005
+#define DT_MIPS_BASE_ADDRESS 0x70000006
+#define DT_MIPS_CONFLICT 0x70000008
+#define DT_MIPS_LIBLIST 0x70000009
+#define DT_MIPS_CONFLICTNO 0x7000000b
+#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* number of local got ents */
+#define DT_MIPS_LIBLISTNO 0x70000010
+#define DT_MIPS_SYMTABNO 0x70000011 /* number of .dynsym entries */
+#define DT_MIPS_UNREFEXTNO 0x70000012
+#define DT_MIPS_GOTSYM 0x70000013 /* first dynamic sym in got */
+#define DT_MIPS_HIPAGENO 0x70000014
+#define DT_MIPS_RLD_MAP 0x70000016 /* address of loader map */
+
+/*
+ * ELF Flags
+ */
+#define EF_MIPS_PIC 0x00000002 /* Contains PIC code */
+#define EF_MIPS_CPIC 0x00000004 /* STD PIC calling sequence */
+#define EF_MIPS_ABI2 0x00000020 /* N32 */
+
+#define EF_MIPS_ARCH_ASE 0x0f000000 /* Architectural extensions */
+#define EF_MIPS_ARCH_MDMX 0x08000000 /* MDMX multimedia extension */
+#define EF_MIPS_ARCH_M16 0x04000000 /* MIPS-16 ISA extensions */
+
+#define EF_MIPS_ARCH 0xf0000000 /* Architecture field */
+#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code */
+#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code */
+#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code */
+#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code */
+#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code */
+#define EF_MIPS_ARCH_32 0x50000000 /* -mips32 code */
+#define EF_MIPS_ARCH_64 0x60000000 /* -mips64 code */
+#define EF_MIPS_ARCH_32R2 0x70000000 /* -mips32r2 code */
+#define EF_MIPS_ARCH_64R2 0x80000000 /* -mips64r2 code */
+
+#define EF_MIPS_ABI 0x0000f000
+#define EF_MIPS_ABI_O32 0x00001000
+#define EF_MIPS_ABI_O64 0x00002000
+#define EF_MIPS_ABI_EABI32 0x00003000
+#define EF_MIPS_ABI_EABI64 0x00004000
+
+#if defined(__MIPSEB__)
+#define ELF32_MACHDEP_ENDIANNESS ELFDATA2MSB
+#define ELF64_MACHDEP_ENDIANNESS ELFDATA2MSB
+#elif defined(__MIPSEL__)
+#define ELF32_MACHDEP_ENDIANNESS ELFDATA2LSB
+#define ELF64_MACHDEP_ENDIANNESS ELFDATA2LSB
+#elif !defined(HAVE_NBTOOL_CONFIG_H)
+#error neither __MIPSEL__ nor __MIPSEB__ are defined.
+#endif
+
+#ifdef _KERNEL
+#ifdef _KERNEL_OPT
+#include "opt_compat_netbsd.h"
+#endif
+#ifdef COMPAT_16
+/*
+ * Up to 1.6, the ELF dynamic loader (ld.elf_so) was not relocatable.
+ * Tell the kernel ELF exec code not to try relocating the interpreter
+ * for dynamically-linked ELF binaries.
+ */
+#define ELF_INTERP_NON_RELOCATABLE
+#endif /* COMPAT_16 */
+
+/*
+ * We need to be able to include the ELF header so we can pick out the
+ * ABI being used.
+ */
+#ifdef ELFSIZE
+#define ELF_MD_PROBE_FUNC ELFNAME2(mips_netbsd,probe)
+#define ELF_MD_COREDUMP_SETUP ELFNAME2(coredump,setup)
+#endif
+
+struct exec_package;
+
+int mips_netbsd_elf32_probe(struct lwp *, struct exec_package *, void *, char *,
+ vaddr_t *);
+void coredump_elf32_setup(struct lwp *, void *);
+
+int mips_netbsd_elf64_probe(struct lwp *, struct exec_package *, void *, char *,
+ vaddr_t *);
+void coredump_elf64_setup(struct lwp *, void *);
+#endif /* _KERNEL */
+
+#endif /* _MIPS_ELF_MACHDEP_H_ */
diff --git a/libbsd/include/arch/mips/machine/int_types.h b/libbsd/include/arch/mips/machine/int_types.h
new file mode 100644
index 0000000..20ea31d
--- /dev/null
+++ b/libbsd/include/arch/mips/machine/int_types.h
@@ -0,0 +1,79 @@
+/* $NetBSD: int_types.h,v 1.11 2009/12/14 00:46:04 matt Exp $ */
+
+/*-
+ * Copyright (c) 1992, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Ralph Campbell.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * from: @(#)types.h 8.3 (Berkeley) 1/5/94
+ */
+
+#ifndef _MIPS_INT_TYPES_H_
+#define _MIPS_INT_TYPES_H_
+
+#include <sys/cdefs.h>
+
+/*
+ * 7.18.1 Integer types
+ */
+
+/* 7.18.1.1 Exact-width integer types */
+
+typedef signed char __int8_t;
+typedef unsigned char __uint8_t;
+typedef short int __int16_t;
+typedef unsigned short int __uint16_t;
+typedef int __int32_t;
+typedef unsigned int __uint32_t;
+#ifdef __COMPILER_INT64__
+typedef __COMPILER_INT64__ __int64_t;
+typedef __COMPILER_UINT64__ __uint64_t;
+#elif defined(_LP64)
+typedef long int __int64_t;
+typedef unsigned long int __uint64_t;
+#else
+/* LONGLONG */
+typedef long long int __int64_t;
+/* LONGLONG */
+typedef unsigned long long int __uint64_t;
+#endif
+
+#define __BIT_TYPES_DEFINED__
+
+/* 7.18.1.4 Integer types capable of holding object pointers */
+
+#ifndef __mips_o32
+typedef long int __intptr_t;
+typedef unsigned long int __uintptr_t;
+#else
+typedef int __intptr_t;
+typedef unsigned int __uintptr_t;
+#endif
+
+#endif /* !_MIPS_INT_TYPES_H_ */
diff --git a/rtems.py b/rtems.py
index 5558f84..cb1954c 100644
--- a/rtems.py
+++ b/rtems.py
@@ -172,6 +172,8 @@ def tweaks(conf, arch_bsp):
conf.env.OBJCOPY_FLAGS = ['-O', 'elf32-littlenios2']
elif conf.env.RTEMS_ARCH in ['arm']:
conf.env.OBJCOPY_FLAGS = ['-I', 'binary', '-O', 'elf32-littlearm']
+ elif conf.env.RTEMS_ARCH in ['mips']:
+ conf.env.OBJCOPY_FLAGS = ['-I', 'binary', '-O', 'elf32-bigmips'] #freenix
else:
conf.env.OBJCOPY_FLAGS = ['-O', 'elf32-' + conf.env.RTEMS_ARCH]
diff --git a/rtl-elf.c b/rtl-elf.c
index fb2a9ae..df4aae5 100644
--- a/rtl-elf.c
+++ b/rtl-elf.c
@@ -76,6 +76,7 @@ rtems_rtl_elf_find_symbol (rtems_rtl_obj_t* obj,
rtems_rtl_obj_sym_t* symbol = rtems_rtl_symbol_global_find (symname);
if (!symbol)
{
+ printf("__func__ %x\n", __func__);
rtems_rtl_set_error (EINVAL, "global symbol not found: %s", symname);
return false;
}
@@ -375,6 +376,7 @@ rtems_rtl_elf_symbols (rtems_rtl_obj_t* obj,
&symbol, sizeof (symbol)))
return false;
+ printf("name %s\n", symbol.st_name);
off = obj->ooffset + strtab->offset + symbol.st_name;
len = RTEMS_RTL_ELF_STRING_MAX;
diff --git a/rtl-mdreloc-mips.c b/rtl-mdreloc-mips.c
new file mode 100644
index 0000000..1613a76
--- /dev/null
+++ b/rtl-mdreloc-mips.c
@@ -0,0 +1,156 @@
+/*
+ * Taken from NetBSD and stripped of the relocations not needed on RTEMS.
+ */
+
+/* $NetBSD: mdreloc.c,v 1.33 2010/01/14 12:12:07 skrll Exp $ */
+
+#include <sys/cdefs.h>
+
+#include <errno.h>
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+
+#include <rtl.h>
+#include "rtl-elf.h"
+#include "rtl-error.h"
+#include <rtl-trace.h>
+
+
+bool
+rtems_rtl_elf_rel_resolve_sym (Elf_Word type)
+{
+ return true;
+}
+
+bool
+rtems_rtl_elf_relocate_rela (const rtems_rtl_obj_t* obj,
+ const Elf_Rela* rela,
+ const rtems_rtl_obj_sect_t* sect,
+ const char* symname,
+ const Elf_Byte syminfo,
+ const Elf_Word symvalue)
+{
+ printf("__func__ %s\n", __func__);
+ rtems_rtl_set_error (EINVAL, "rela type record not supported");
+ return false;
+}
+
+bool
+rtems_rtl_elf_relocate_rel (const rtems_rtl_obj_t* obj,
+ const Elf_Rel* rel,
+ const rtems_rtl_obj_sect_t* sect,
+ const char* symname,
+ const Elf_Byte syminfo,
+ const Elf_Word symvalue)
+{
+ Elf_Addr *where;
+ Elf_Addr tmp;
+ Elf_Addr addend = (Elf_Addr)0;
+ Elf_Word symidx;
+ Elf_Addr addr;
+
+ static Elf32_Addr *where_hi16;
+ static Elf_Addr ahl;
+
+ where = (Elf_Addr *)(sect->base + rel->r_offset);
+ addend = *where;
+
+#if 0
+ printf("__func__ %s type %d symname %s symvalue %x where 0x%08x\n", __func__, ELF_R_TYPE(rel->r_info), symname, symvalue, where);
+ int i = 16;
+ for (i = 0; i<16; i++)
+ {
+ printf("0x%08x\n", *((int*)symvalue+i));
+ }
+ symidx = ELF_R_SYM(rel->r_info);
+#endif
+
+ switch (ELF_R_TYPE(rel->r_info)) {
+ case R_MIPS_NONE:
+ break;
+#if 0
+ case R_MIPS_16:
+ break;
+ case R_MIPS_32: /* S + A */
+
+ break;
+ case R_MIPS_REL32:
+ break;
+#endif
+ case R_MIPS_26:
+ addr = symvalue;
+
+ addend &= 0x03ffffff;
+ /*
+ * Addendum for .rela R_MIPS_26 is not shifted right
+ */
+ addend <<= 2;
+
+ addr += ((Elf_Addr)where & 0xf0000000) | addend;
+ addr >>= 2;
+
+ *where &= ~0x03ffffff;
+ *where |= addr & 0x03ffffff;
+ break;
+ case R_MIPS_HI16:
+ /* Note:_gp_disp should be fixed in future*/
+ /*external: ((ALH + S) - (short)(AHL + S)) >> 16 */
+ /*local : ((ALH + S) - (short)(AHL + S)) >> 16 */
+ /*_gp_disp: ((AHL+ GP - P) - (short) (AHL + GP -P)) >> 16 */
+ ahl = addend << 16;
+ where_hi16 = where;
+
+ break;
+ case R_MIPS_LO16:
+ ahl += (int16_t)addend;
+ //addr = lookup(lf, symidx, 1);
+ addr = symvalue;
+ if (addr == 0)
+ return (-1);
+
+ addend &= 0xffff0000;
+ addend |= (uint16_t)(ahl + addr);
+ *where = addend;
+
+ addend = *where_hi16;
+ addend &= 0xffff0000;
+ addend |= ((ahl + addr) - (int16_t)(ahl + addr)) >> 16;
+ *where_hi16 = addend;
+
+ break;
+#if 0
+ case R_MIPS_GPREL16:
+ return false;
+ break;
+ case R_MIPS_LITERAL:
+ return false;
+ break;
+ case R_MIPS_GOT16:
+ return false;
+ break;
+ case R_MIPS_PC16:
+ return false;
+ break;
+ case R_MIPS_CALL:
+ return false;
+ break;
+ case R_MIPS_GPREL32:
+ return false;
+ break;
+#endif
+ default:
+ printf ("rtl: reloc unknown: sym = %lu, type = %lu, offset = %p, "
+ "contents = %p\n",
+ ELF_R_SYM(rel->r_info), (uint32_t) ELF_R_TYPE(rel->r_info),
+ (void *)rel->r_offset, (void *)*where);
+ rtems_rtl_set_error (EINVAL,
+ "%s: Unsupported relocation type %ld "
+ "in non-PLT relocations",
+ sect->name, (uint32_t) ELF_R_TYPE(rel->r_info));
+ return false;
+ }
+
+ return true;
+}
+
diff --git a/rtl-rap.c b/rtl-rap.c
index efe2362..eeb234e 100644
--- a/rtl-rap.c
+++ b/rtl-rap.c
@@ -363,6 +363,7 @@ rtems_rtl_rap_relocate (rtems_rtl_rap_t* rap, rtems_rtl_obj_t* obj)
if (!symbol)
{
+ printf("__func__ %s\n", __func__);
rtems_rtl_set_error (EINVAL, "global symbol not found: %s", symname);
free (symname_buffer);
return false;
diff --git a/rtl-sym.c b/rtl-sym.c
index 0e29693..c0fdb1a 100644
--- a/rtl-sym.c
+++ b/rtl-sym.c
@@ -208,9 +208,10 @@ rtems_rtl_symbol_obj_find (rtems_rtl_obj_t* obj, const char* name)
* Check the object file's symbols first. If not found search the
* global symbol table.
*/
- for (s = 0, sym = obj->global_table; s < obj->global_syms; ++s, ++sym)
+ for (s = 0, sym = obj->global_table; s < obj->global_syms; ++s, ++sym) {
if (strcmp (name, sym->name) == 0)
return sym;
+ }
return rtems_rtl_symbol_global_find (name);
}
diff --git a/wscript b/wscript
index 9f9417a..3d3db7a 100644
--- a/wscript
+++ b/wscript
@@ -66,6 +66,16 @@ def build(bld):
includes = bld.includes,
defines = bld.defines,
source = ['bspinit.c'])
+ #
+ # The MIPS 32 freenix
+ #
+ if arch == 'mips':
+ bld.defines += ['ELFSIZE=32']
+ bld(target = 'bspinit',
+ features = 'c',
+ includes = bld.includes,
+ defines = bld.defines,
+ source = ['bspinit.c'])
bld(target = 'x',
features = 'c cstlib',
@@ -145,7 +155,7 @@ def build(bld):
#
bld(target = 'fs-root.tar',
source = ['shell-init', 'libx.a'],
- rule = 'tar cf - ${SRC} > ${TGT}')
+ rule = 'tar --format=ustar -cf ${TGT} ${SRC}')
bld.objects(name = 'rootfs.prelink',
target = 'fs-root-tarfile.o',
source = 'fs-root.tar',
@@ -189,7 +199,7 @@ def build(bld):
bld(target = 'fs-root.tar',
name = 'fs',
source = ['shell-init', 'libx.a', 'x.rap'] + raps,
- rule = 'tar cf - ${SRC} > ${TGT}')
+ rule = 'tar --format=ustar -cf ${TGT} ${SRC} ')
bld.objects(name = 'rootfs',
target = 'fs-root-tarfile.o',
source = 'fs-root.tar',
diff --git a/xa.c b/xa.c
index 20c927b..93ebfdf 100644
--- a/xa.c
+++ b/xa.c
@@ -9,3 +9,11 @@ hello (void)
{
x_writeln ("hello world");
}
+
+int rtems(int argc, char **argv)
+{
+ hello();
+ printf("mips rtems hmm\n");
+ z_writeln(argc, argv);
+ return 0;
+}
--
1.7.10.4
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment