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Created November 7, 2022 11:15
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mt7622-6-1.log
[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[ 0.000000] Linux version 6.1-rc2 (nick@coolnew) (aarch64-openwrt-linux-musl-gcc (OpenWrt GCC 11.3.0 r21070+1-a3da858ab0) 11.3.0, GNU ld (GNU Binutils) 2.37) #0 SMP Sun Nov 6 16:32:42 2022
[ 0.000000] Machine model: Bananapi BPI-R64
[ 0.000000] Zone ranges:
[ 0.000000] DMA [mem 0x0000000040000000-0x000000007fffffff]
[ 0.000000] DMA32 empty
[ 0.000000] Normal empty
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000040000000-0x0000000042ffffff]
[ 0.000000] node 0: [mem 0x0000000043000000-0x000000004302ffff]
[ 0.000000] node 0: [mem 0x0000000043030000-0x000000007fffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000007fffffff]
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.1 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
[ 0.000000] psci: SMC Calling Convention v1.2
[ 0.000000] percpu: Embedded 17 pages/cpu s30312 r8192 d31128 u69632
[ 0.000000] pcpu-alloc: s30312 r8192 d31128 u69632 alloc=17*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1
[ 0.000000] Detected VIPT I-cache on CPU0
[ 0.000000] CPU features: kernel page table isolation disabled by kernel configuration
[ 0.000000] CPU features: detected: ARM erratum 843419
[ 0.000000] CPU features: detected: ARM erratum 845719
[ 0.000000] alternatives: applying boot alternatives
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 258048
[ 0.000000] Kernel command line: root=/dev/mmcblk1p65
[ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Memory: 1015508K/1048576K available (8448K kernel code, 896K rwdata, 2284K rodata, 448K init, 291K bss, 33068K reserved, 0K cma-reserved)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[ 0.000000] rcu: Hierarchical RCU implementation.
[ 0.000000] Tracing variant of Tasks RCU enabled.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[ 0.000000] Root IRQ handler: gic_handle_irq
[ 0.000000] GIC: Using split EOI/Deactivate mode
[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[ 0.000000] arch_timer: cp15 timer(s) running at 12.50MHz (phys).
[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2e2049cda, max_idle_ns: 440795202628 ns
[ 0.000001] sched_clock: 56 bits at 13MHz, resolution 80ns, wraps every 4398046511080ns
[ 0.000232] Calibrating delay loop (skipped), value calculated using timer frequency.. 25.00 BogoMIPS (lpj=125000)
[ 0.000241] pid_max: default: 32768 minimum: 301
[ 0.000359] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
[ 0.000371] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
[ 0.001437] cblist_init_generic: Setting adjustable number of callback queues.
[ 0.001450] cblist_init_generic: Setting shift to 1 and lim to 1.
[ 0.001562] rcu: Hierarchical SRCU implementation.
[ 0.001566] rcu: Max phase no-delay instances is 1000.
[ 0.001691] dyndbg: Ignore empty _ddebug table in a CONFIG_DYNAMIC_DEBUG_CORE build
[ 0.002053] smp: Bringing up secondary CPUs ...
[ 0.002389] Detected VIPT I-cache on CPU1
[ 0.002397] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x00000000bebc20, CPU1: 0x00000000000000
[ 0.002419] CPU features: Unsupported CPU feature variation detected.
[ 0.002501] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
[ 0.002571] smp: Brought up 1 node, 2 CPUs
[ 0.002576] SMP: Total of 2 processors activated.
[ 0.002580] CPU features: detected: 32-bit EL0 Support
[ 0.002583] CPU features: detected: CRC32 instructions
[ 0.002616] CPU: All CPU(s) started at EL2
[ 0.002619] alternatives: applying system-wide alternatives
[ 0.006500] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[ 0.006519] futex hash table entries: 512 (order: 3, 32768 bytes, linear)
[ 0.006609] pinctrl core: initialized pinctrl subsystem
[ 0.007190] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[ 0.007487] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
[ 0.007515] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
[ 0.007540] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[ 0.007949] thermal_sys: Registered thermal governor 'fair_share'
[ 0.007953] thermal_sys: Registered thermal governor 'bang_bang'
[ 0.007956] thermal_sys: Registered thermal governor 'step_wise'
[ 0.007958] thermal_sys: Registered thermal governor 'user_space'
[ 0.008017] ASID allocator initialised with 65536 entries
[ 0.008373] pstore: Registered ramoops as persistent store backend
[ 0.008377] ramoops: using 0x10000@0x42ff0000, ecc: 0
[ 0.019666] gpio-499 (asm_sel): hogged as output/high
[ 0.028889] cryptd: max_cpu_qlen set to 1000
[ 0.030108] SCSI subsystem initialized
[ 0.030295] libata version 3.00 loaded.
[ 0.031149] clocksource: Switched to clocksource arch_sys_counter
[ 0.031718] NET: Registered PF_INET protocol family
[ 0.031869] IP idents hash table entries: 16384 (order: 5, 131072 bytes, linear)
[ 0.032656] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
[ 0.032678] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.032691] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
[ 0.032746] TCP bind hash table entries: 8192 (order: 6, 262144 bytes, linear)
[ 0.032994] TCP: Hash tables configured (established 8192 bind 8192)
[ 0.033147] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
[ 0.033174] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
[ 0.033326] NET: Registered PF_UNIX/PF_LOCAL protocol family
[ 0.033357] PCI: CLS 0 bytes, default 64
[ 0.034282] workingset: timestamp_bits=46 max_order=18 bucket_order=0
[ 0.037148] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 0.037158] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[ 0.075157] mt-pmic-pwrap 10001000.pwrap: unexpected interrupt int=0x1
[ 0.090992] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
[ 0.092014] printk: console [ttyS0] disabled
[ 0.112215] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 118, base_baud = 1562500) is a ST16650V2
[ 0.729283] printk: console [ttyS0] enabled
[ 0.734434] 1100c000.serial: ttyS1 at MMIO 0x1100c000 (irq = 119, base_baud = 17499995) is a MediaTek BTIF
[ 0.744270] serial serial0: tty port ttyS1 registered
[ 0.750027] mtk_rng 1020f000.rng: registered RNG driver
[ 0.750195] random: crng init done
[ 0.762074] loop: module loaded
[ 0.765728] mtk-ecc 1100e000.ecc: probed
[ 0.771933] spi-nand spi1.0: Winbond SPI NAND was found.
[ 0.777254] spi-nand spi1.0: 128 MiB, block size: 128 KiB, page size: 2048, OOB size: 64
[ 0.785423] mtk-snand 1100d000.spi: ECC strength: 4 bits per 512 bytes
[ 0.792212] 3 fixed-partitions partitions found on MTD device spi1.0
[ 0.798569] Creating 3 MTD partitions on "spi1.0":
[ 0.803371] 0x000000000000-0x000000080000 : "bl2"
[ 0.809045] 0x000000080000-0x000000280000 : "fip"
[ 0.816291] 0x000000280000-0x000008000000 : "ubi"
[ 0.967825] mtk_soc_eth 1b100000.ethernet eth0: mediatek frame engine at 0xffffffc009200000, irq 125
[ 0.977067] mtk_soc_eth 1b100000.ethernet: generated random MAC address f2:1d:9b:51:60:0a
[ 0.985588] mtk_soc_eth 1b100000.ethernet eth1: mediatek frame engine at 0xffffffc009200000, irq 125
[ 0.995433] i2c_dev: i2c /dev entries driver
[ 1.002355] mtk-wdt 10212000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
[ 1.012992] NET: Registered PF_INET6 protocol family
[ 1.013569] mtk-msdc 11240000.mmc: Got CD GPIO
[ 1.020091] Segment Routing with IPv6
[ 1.026136] In-situ OAM (IOAM) with IPv6
[ 1.030125] NET: Registered PF_PACKET protocol family
[ 1.035383] 8021q: 802.1Q VLAN Support v1.8
[ 1.041035] pstore: Using crash dump compression: deflate
[ 1.055565] ------------[ cut here ]------------
[ 1.060204] Kernel BUG at regulator_check_voltage+0xb0/0xf0 [verbose debug info unavailable]
[ 1.062418] mtk-pcie 1a143000.pcie: host bridge /pcie@1a143000 ranges:
[ 1.068656] Internal error: Oops - BUG: 00000000f2000800 [#1] SMP
[ 1.075248] mtk-pcie 1a143000.pcie: Parsing ranges property...
[ 1.081257] Modules linked in:
[ 1.081264] CPU: 1 PID: 328 Comm: kworker/1:7 Tainted: G S 6.1-rc2 #0
[ 1.087088] mtk-pcie 1a143000.pcie: MEM 0x0020000000..0x0027ffffff -> 0x0020000000
[ 1.090126] Hardware name: Bananapi BPI-R64 (DT)
[ 1.110541] Workqueue: events dbs_work_handler
[ 1.114988] pstate: 20000005 (nzCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[ 1.121944] pc : regulator_check_voltage+0xb0/0xf0
[ 1.126728] lr : regulator_set_voltage_unlocked+0x88/0x110
[ 1.129638] mmc1: host does not support reading read-only switch, assuming write-enable
[ 1.132207] sp : ffffffc00956bb30
[ 1.132209] x29: ffffffc00956bb30 x28: ffffff8000efb400 x27: 0000000000000024
[ 1.132219] x26: 00000000001312d0 x25: 0000000000118c30 x24: 00000000001312d0
[ 1.132227] x23: 0000000000149970
[ 1.146036] mmc1: new high speed SDHC card at address e624
[ 1.150642] x22: ffffff800038f800
[ 1.159192] mmcblk1: mmc1:e624 SL16G 14.8 GiB
[ 1.161068] x21: ffffff8000efb100
[ 1.161072] x20: 00000000001312d0
[ 1.175424] GPT:partition_entry_array_crc32 values don't match: 0xa0b5ce6d != 0xab54d286
[ 1.177757] x19: 0000000000000000 x18: 00000000799b2550
[ 1.181067] GPT:Primary header thinks Alt. header is not at the end of the disk.
[ 1.189143] x17: 0000000000000003 x16: 0000000000000001 x15: 0000000000000000
[ 1.189151] x14: 0000000000000000 x13: 0000000000000146 x12: 00000000fa83b2da
[ 1.189159] x11: 000000000000013d x10: 0000000000000850
[ 1.194472] GPT:305184 != 31116287
[ 1.201842] x9 : ffffffc00956b910
[ 1.201846] x8 : ffffff8000b9edf0 x7 : 0000000000000001
[ 1.208970] GPT:Alternate GPT header not at the end of the disk.
[ 1.216092] x6 : 00000000001312d0
[ 1.216095] x5 : 0000000000118c30 x4 : 0000000000000000 x3 : 0000000000000000
[ 1.216103] x2 : ffffffc00956bb68 x1 : ffffffc00956bb6c
[ 1.221321] GPT:305184 != 31116287
[ 1.224706] x0 : ffffff800038f800
[ 1.228095] GPT: Use GNU Parted to correct GPT errors.
[ 1.233307]
[ 1.233309] Call trace:
[ 1.233312] regulator_check_voltage+0xb0/0xf0
[ 1.242680] FIT: Selected configuration: "config-mt7622-bananapi-bpi-r64-pcie1" (OpenWrt bananapi_bpi-r64 with mt7622-bananapi-bpi-r64-pcie1)
[ 1.242694] regulator_set_voltage+0x3c/0x64
[ 1.249831] FIT: kernel sub-image 0x00001000..0x0052fd0a "kernel-1" (ARM64 OpenWrt Linux-6.1-rc2)
[ 1.255030] mtk_cpufreq_voltage_tracking+0x11c/0x26c
[ 1.255039] mtk_cpufreq_set_target+0x1c4/0x350
[ 1.258444] FIT: flat_dt sub-image 0x00530000..0x005380c5 "fdt-1" (ARM64 OpenWrt bananapi_bpi-r64 device tree blob)
[ 1.261820] __cpufreq_driver_target+0x2f4/0x674
[ 1.261826] od_dbs_update+0xb8/0x19c
[ 1.266969] FIT: flat_dt sub-image 0x00539000..0x0053911a "fdt-mt7622-bananapi-bpi-r64-pcie1" (ARM64 OpenWrt bananapi_bpi-r64 device tree overlay mt7622-bananapi-bpi-r64-pcie1)
[ 1.268431] dbs_work_handler+0x3c/0x7c
[ 1.270883] FIT: flat_dt sub-image 0x0053a000..0x0053a20f "fdt-mt7622-bananapi-bpi-r64-sata" (ARM64 OpenWrt bananapi_bpi-r64 device tree overlay mt7622-bananapi-bpi-r64-sata)
[ 1.275297] process_one_work+0x200/0x3a0
[ 1.287998] FIT: filesystem sub-image 0x0053b000..0x00859fff "rootfs-1" (ARM64 OpenWrt bananapi_bpi-r64 rootfs)
[ 1.292237] worker_thread+0x170/0x4c0
[ 1.292244] kthread+0xd4/0xe0
[ 1.302066] FIT: selecting configured loadable "rootfs-1" to be root filesystem
[ 1.307092] ret_from_fork+0x10/0x20
[ 1.311631] mmcblk1: p1 p2 p3 p4 p5 p6 p65(rootfs-1) p66(rootfs_data) p128
[ 1.322903] Code: 6b04001f 54fffe6b 2a0003e4 17fffff3 (d4210000)
[ 1.413322] ---[ end trace 0000000000000000 ]---
[ 1.420707] Kernel panic - not syncing: Oops - BUG: Fatal exception
[ 1.426969] SMP: stopping secondary CPUs
[ 1.430886] Kernel Offset: disabled
[ 1.434365] CPU features: 0x00000,00c00000,0000400b
[ 1.439235] Memory Limit: none
[ 1.444948] Rebooting in 1 seconds..
@dangowrt
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dangowrt commented Nov 7, 2022

drivers/regulator/core.c:

414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  420) /* Platform voltage constraint check */
d22b85a1b97d1 (Dmitry Osipenko            2019-06-24 00:08:32 +0300  421) int regulator_check_voltage(struct regulator_dev *rdev,
d22b85a1b97d1 (Dmitry Osipenko            2019-06-24 00:08:32 +0300  422)                           int *min_uV, int *max_uV)
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  423) {
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  424)       BUG_ON(*min_uV > *max_uV);

So this is the BUG which triggers apparently

414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  425) 
8a34e979f684a (WEN Pingbo                 2016-04-23 15:11:05 +0800  426)       if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_VOLTAGE)) {
7ebcf26c39205 (Stephen Boyd               2015-09-16 12:10:26 -0700  427)               rdev_err(rdev, "voltage operation not allowed\n");
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  428)               return -EPERM;
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  429)       }
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  430) 
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  431)       if (*max_uV > rdev->constraints->max_uV)
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  432)               *max_uV = rdev->constraints->max_uV;
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  433)       if (*min_uV < rdev->constraints->min_uV)
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  434)               *min_uV = rdev->constraints->min_uV;
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  435) 
89f425ed5bf3d (Mark Brown                 2011-07-12 11:20:37 +0900  436)       if (*min_uV > *max_uV) {
89f425ed5bf3d (Mark Brown                 2011-07-12 11:20:37 +0900  437)               rdev_err(rdev, "unsupportable voltage range: %d-%duV\n",
54abd335fda86 (Mark Brown                 2011-07-21 15:07:37 +0100  438)                        *min_uV, *max_uV);
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  439)               return -EINVAL;
89f425ed5bf3d (Mark Brown                 2011-07-12 11:20:37 +0900  440)       }
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  441) 
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  442)       return 0;
414c70cb91c44 (Liam Girdwood              2008-04-30 15:59:04 +0100  443) }

According to the call trace above, the function got called by mtk_cpufreq_voltage_tracking:

1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800  78) static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_dvfs_info *info,
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800  79)                                     int new_vproc)
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800  80) {
ead858bd128d4 drivers/cpufreq/mediatek-cpufreq.c (Rex-BC Chen                2022-05-05 19:52:19 +0800  81)     const struct mtk_cpufreq_platform_data *soc_data = info->soc_data;
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800  82)     struct regulator *proc_reg = info->proc_reg;
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800  83)     struct regulator *sram_reg = info->sram_reg;
4aef4aeaf1dd4 drivers/cpufreq/mediatek-cpufreq.c (Rex-BC Chen                2022-04-22 15:52:28 +0800  84)     int pre_vproc, pre_vsram, new_vsram, vsram, vproc, ret;
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800  85)     int retry = info->vtrack_max;
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800  86) 
4aef4aeaf1dd4 drivers/cpufreq/mediatek-cpufreq.c (Rex-BC Chen                2022-04-22 15:52:28 +0800  87)     pre_vproc = regulator_get_voltage(proc_reg);
4aef4aeaf1dd4 drivers/cpufreq/mediatek-cpufreq.c (Rex-BC Chen                2022-04-22 15:52:28 +0800  88)     if (pre_vproc < 0) {
9acc0f7a6edd8 drivers/cpufreq/mediatek-cpufreq.c (Rex-BC Chen                2022-04-22 15:52:27 +0800  89)             dev_err(info->cpu_dev,
4aef4aeaf1dd4 drivers/cpufreq/mediatek-cpufreq.c (Rex-BC Chen                2022-04-22 15:52:28 +0800  90)                     "invalid Vproc value: %d\n", pre_vproc);
4aef4aeaf1dd4 drivers/cpufreq/mediatek-cpufreq.c (Rex-BC Chen                2022-04-22 15:52:28 +0800  91)             return pre_vproc;
40be4c3ccbf40 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-11-29 16:31:37 +0800  92)     }
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800  93) 
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800  94)     pre_vsram = regulator_get_voltage(sram_reg);
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800  95)     if (pre_vsram < 0) {
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800  96)             dev_err(info->cpu_dev, "invalid Vsram value: %d\n", pre_vsram);
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800  97)             return pre_vsram;
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800  98)     }
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800  99) 
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 100)     new_vsram = clamp(new_vproc + soc_data->min_volt_shift,
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 101)                       soc_data->sram_min_volt, soc_data->sram_max_volt);
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 102) 
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 103)     do {
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 104)             if (pre_vproc <= new_vproc) {
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 105)                     vsram = clamp(pre_vproc + soc_data->max_volt_shift,
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 106)                                   soc_data->sram_min_volt, new_vsram);
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 107)                     ret = regulator_set_voltage(sram_reg, vsram,
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 108)                                                 soc_data->sram_max_volt);
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 109) 
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 110)                     if (ret)
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 111)                             return ret;
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 112) 
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 113)                     if (vsram == soc_data->sram_max_volt ||
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 114)                         new_vsram == soc_data->sram_min_volt)
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 115)                             vproc = new_vproc;
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 116)                     else
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 117)                             vproc = vsram - soc_data->min_volt_shift;
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 118) 
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 119)                     ret = regulator_set_voltage(proc_reg, vproc,
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 120)                                                 soc_data->proc_max_volt);
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 121)                     if (ret) {
4aef4aeaf1dd4 drivers/cpufreq/mediatek-cpufreq.c (Rex-BC Chen                2022-04-22 15:52:28 +0800 122)                             regulator_set_voltage(sram_reg, pre_vsram,
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 123)                                                   soc_data->sram_max_volt);
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 124)                             return ret;
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 125)                     }
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 126)             } else if (pre_vproc > new_vproc) {
ead858bd128d4 drivers/cpufreq/mediatek-cpufreq.c (Rex-BC Chen                2022-05-05 19:52:19 +0800 127)                     vproc = max(new_vproc,
ead858bd128d4 drivers/cpufreq/mediatek-cpufreq.c (Rex-BC Chen                2022-05-05 19:52:19 +0800 128)                                 pre_vsram - soc_data->max_volt_shift);
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 129)                     ret = regulator_set_voltage(proc_reg, vproc,
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 130)                                                 soc_data->proc_max_volt);
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 131)                     if (ret)
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 132)                             return ret;
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 133) 
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 134)                     if (vproc == new_vproc)
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 135)                             vsram = new_vsram;
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 136)                     else
ead858bd128d4 drivers/cpufreq/mediatek-cpufreq.c (Rex-BC Chen                2022-05-05 19:52:19 +0800 137)                             vsram = max(new_vsram,
ead858bd128d4 drivers/cpufreq/mediatek-cpufreq.c (Rex-BC Chen                2022-05-05 19:52:19 +0800 138)                                         vproc + soc_data->min_volt_shift);
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 139) 
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 140)                     ret = regulator_set_voltage(sram_reg, vsram,
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 141)                                                 soc_data->sram_max_volt);
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 142)                     if (ret) {
4aef4aeaf1dd4 drivers/cpufreq/mediatek-cpufreq.c (Rex-BC Chen                2022-04-22 15:52:28 +0800 143)                             regulator_set_voltage(proc_reg, pre_vproc,
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 144)                                                   soc_data->proc_max_volt);
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 145)                             return ret;
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 146)                     }
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 147)             }
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 148) 
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 149)             pre_vproc = vproc;
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 150)             pre_vsram = vsram;
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 151) 
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 152)             if (--retry < 0) {
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 153)                     dev_err(info->cpu_dev,
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 154)                             "over loop count, failed to set voltage\n");
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 155)                     return -EINVAL;
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 156)             }
6a17b3876bc83 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei Chang              2022-05-05 19:52:20 +0800 157)     } while (vproc != new_vproc || vsram != new_vsram);
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 158) 
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 159)     return 0;
1453863fb02a1 drivers/cpufreq/mt8173-cpufreq.c   (Pi-Cheng Chen              2015-08-19 10:05:06 +0800 160) }

So here there is only one call to regulator_check_voltage() which has been added recently:

commit 6a17b3876bc8303612d7ad59ecf7cbc0db418bcd
Author: Jia-Wei Chang <jia-wei.chang@mediatek.com>
Date:   Thu May 5 19:52:20 2022 +0800

    cpufreq: mediatek: Refine mtk_cpufreq_voltage_tracking()
    
    Because the difference of sram and proc should in a range of min_volt_shift
    and max_volt_shift. We need to adjust the sram and proc step by step.
    
    We replace VOLT_TOL (voltage tolerance) with the platform data and update the
    logic to determine the voltage boundary and invoking regulator_set_voltage.
    
    - Use 'sram_min_volt' and 'sram_max_volt' to determine the voltage boundary
      of sram regulator.
    - Use (sram_min_volt - min_volt_shift) and 'proc_max_volt' to determine the
      voltage boundary of vproc regulator.
    
    Moreover, to prevent infinite loop when tracking voltage, we calculate the
    maximum value for each platform data.
    We assume min voltage is 0 and tracking target voltage using
    min_volt_shift for each iteration.
    The retry_max is 3 times of expeted iteration count.
    
    Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com>
    Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
    Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
    Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>

@PolynomialDivision
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Wow thanks! I will immediately try to revert the patch and test again. :)

@PolynomialDivision
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@dangowrt Thanks a lot. Reverting the commit fixes the bug and banana pi r64 runs now on openwrt 6.1rc2 :) . See:
PolynomialDivision/openwrt@1df941d

@dangowrt
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dangowrt commented Nov 8, 2022

Very nice! Please also report the problem with this patch to the original authors and upstream mailing lists (linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Project_Global_Chrome_Upstream_Group@mediatek.com)

@PolynomialDivision
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Done. :)

@frank-w
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frank-w commented Nov 30, 2022 •
edited

Any new state here?

Mainline discussion shows that it is no openwrt specific problem:

http://lists.infradead.org/pipermail/linux-arm-kernel/2022-November/788416.html

Maybe you can try print the values which causing the bug (i guess max is calculated the wrong way)

https://forum.banana-pi.org/t/banana-pi-r64-trying-to-bump-openwrt-kernel-to-6-1/14189/5?u=frank-w

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