Created
March 21, 2012 00:08
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msp430fr5750 - messing with fram as ram
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/* Default linker script, for normal executables */ | |
OUTPUT_FORMAT("elf32-msp430") | |
OUTPUT_ARCH("msp430") | |
INCLUDE memory.x | |
INCLUDE periph.x | |
SECTIONS | |
{ | |
/* Read-only sections, merged into text segment. */ | |
.hash : { *(.hash) } | |
.dynsym : { *(.dynsym) } | |
.dynstr : { *(.dynstr) } | |
.gnu.version : { *(.gnu.version) } | |
.gnu.version_d : { *(.gnu.version_d) } | |
.gnu.version_r : { *(.gnu.version_r) } | |
.rel.init : { *(.rel.init) } | |
.rela.init : { *(.rela.init) } | |
.rel.text : | |
{ | |
*(.rel.text) | |
*(.rel.text.*) | |
*(.rel.gnu.linkonce.t*) | |
} | |
.rela.text : | |
{ | |
*(.rela.text) | |
*(.rela.text.*) | |
*(.rela.gnu.linkonce.t*) | |
} | |
.rel.fini : { *(.rel.fini) } | |
.rela.fini : { *(.rela.fini) } | |
.rel.rodata : | |
{ | |
*(.rel.rodata) | |
*(.rel.rodata.*) | |
*(.rel.gnu.linkonce.r*) | |
} | |
.rela.rodata : | |
{ | |
*(.rela.rodata) | |
*(.rela.rodata.*) | |
*(.rela.gnu.linkonce.r*) | |
} | |
.rel.data : | |
{ | |
*(.rel.data) | |
*(.rel.data.*) | |
*(.rel.gnu.linkonce.d*) | |
} | |
.rela.data : | |
{ | |
*(.rela.data) | |
*(.rela.data.*) | |
*(.rela.gnu.linkonce.d*) | |
} | |
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.rela.ctors : { *(.rela.ctors) } | |
.rel.dtors : { *(.rel.dtors) } | |
.rela.dtors : { *(.rela.dtors) } | |
.rel.got : { *(.rel.got) } | |
.rela.got : { *(.rela.got) } | |
.rel.bss : { *(.rel.bss) } | |
.rela.bss : { *(.rela.bss) } | |
.rel.plt : { *(.rel.plt) } | |
.rela.plt : { *(.rela.plt) } | |
/* Internal text space. */ | |
.text : | |
{ | |
. = ALIGN(2); | |
KEEP(*(.init)) | |
KEEP(*(.init0)) /* Start here after reset. */ | |
KEEP(*(.init1)) /* User definable. */ | |
KEEP(*(.init2)) /* Initialize stack. */ | |
KEEP(*(.init3)) /* Initialize hardware, user definable. */ | |
KEEP(*(.init4)) /* Copy data to .data, clear bss. */ | |
KEEP(*(.init5)) /* User definable. */ | |
KEEP(*(.init6)) /* C++ constructors. */ | |
KEEP(*(.init7)) /* User definable. */ | |
KEEP(*(.init8)) /* User definable. */ | |
KEEP(*(.init9)) /* Call main(). */ | |
KEEP(*(.fini9)) /* Falls into here after main(). User definable. */ | |
KEEP(*(.fini8)) /* User definable. */ | |
KEEP(*(.fini7)) /* User definable. */ | |
KEEP(*(.fini6)) /* C++ destructors. */ | |
KEEP(*(.fini5)) /* User definable. */ | |
KEEP(*(.fini4)) /* User definable. */ | |
KEEP(*(.fini3)) /* User definable. */ | |
KEEP(*(.fini2)) /* User definable. */ | |
KEEP(*(.fini1)) /* User definable. */ | |
KEEP(*(.fini0)) /* Infinite loop after program termination. */ | |
KEEP(*(.fini)) | |
. = ALIGN(2); | |
__ctors_start = . ; | |
KEEP(*(.ctors)) | |
__ctors_end = . ; | |
__dtors_start = . ; | |
KEEP(*(.dtors)) | |
__dtors_end = . ; | |
. = ALIGN(2); | |
*(.text) | |
. = ALIGN(2); | |
*(.text.*) | |
} > REGION_TEXT | |
.rodata : | |
{ | |
. = ALIGN(2); | |
*(.rodata .rodata.* .gnu.linkonce.r.*) | |
. = ALIGN(2); | |
} > REGION_TEXT | |
_etext = .; /* Past last read-only (loadable) segment */ | |
.data : | |
{ | |
. = ALIGN(2); | |
PROVIDE (__data_start = .) ; | |
*(.data) | |
*(SORT_BY_ALIGNMENT(.data.*)) | |
. = ALIGN(2); | |
*(.gnu.linkonce.d*) | |
. = ALIGN(2); | |
_edata = . ; | |
} > REGION_DATA AT > REGION_TEXT | |
PROVIDE (__data_load_start = LOADADDR(.data) ); | |
PROVIDE (__data_size = SIZEOF(.data) ); | |
.bss : | |
{ | |
PROVIDE (__bss_start = .) ; | |
*(.bss) | |
*(SORT_BY_ALIGNMENT(.bss.*)) | |
*(COMMON) | |
PROVIDE (__bss_end = .) ; | |
_end = . ; | |
} > REGION_DATA | |
PROVIDE (__bss_size = SIZEOF(.bss) ); | |
.noinit : | |
{ | |
PROVIDE (__noinit_start = .) ; | |
*(.noinit) | |
*(.noinit.*) | |
*(COMMON) | |
PROVIDE (__noinit_end = .) ; | |
_end = . ; | |
} > REGION_DATA | |
.framdata : | |
{ | |
PROVIDE (__fram_start = .) ; | |
*(.framram) | |
*(.framram.*) | |
PROVIDE (__fram_end = .) ; | |
} > REGION_SLOWDATA | |
PROVIDE (__fram_size = SIZEOF(.framdata) ); | |
/* Information memory. */ | |
.infomem : | |
{ | |
*(.infomem) | |
. = ALIGN(2); | |
*(.infomem.*) | |
} > infomem | |
.infomemnobits : | |
{ | |
. = ALIGN(2); | |
*(.infomemnobits) | |
. = ALIGN(2); | |
*(.infomemnobits.*) | |
} > infomem | |
.vectors : | |
{ | |
PROVIDE (__vectors_start = .) ; | |
KEEP(*(.vectors*)) | |
_vectors_end = . ; | |
} > vectors | |
.fartext : | |
{ | |
. = ALIGN(2); | |
*(.fartext) | |
. = ALIGN(2); | |
*(.fartext.*) | |
_efartext = .; | |
} > REGION_FAR_ROM | |
/* Stabs for profiling information*/ | |
.profiler 0 : { *(.profiler) } | |
/* Stabs debugging sections. */ | |
.stab 0 : { *(.stab) } | |
.stabstr 0 : { *(.stabstr) } | |
.stab.excl 0 : { *(.stab.excl) } | |
.stab.exclstr 0 : { *(.stab.exclstr) } | |
.stab.index 0 : { *(.stab.index) } | |
.stab.indexstr 0 : { *(.stab.indexstr) } | |
.comment 0 : { *(.comment) } | |
/* DWARF debug sections. | |
Symbols in the DWARF debugging sections are relative to the beginning | |
of the section so we begin them at 0. */ | |
/* DWARF 1 */ | |
.debug 0 : { *(.debug) } | |
.line 0 : { *(.line) } | |
/* GNU DWARF 1 extensions */ | |
.debug_srcinfo 0 : { *(.debug_srcinfo) } | |
.debug_sfnames 0 : { *(.debug_sfnames) } | |
/* DWARF 1.1 and DWARF 2 */ | |
.debug_aranges 0 : { *(.debug_aranges) } | |
.debug_pubnames 0 : { *(.debug_pubnames) } | |
/* DWARF 2 */ | |
.debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } | |
.debug_abbrev 0 : { *(.debug_abbrev) } | |
.debug_line 0 : { *(.debug_line) } | |
.debug_frame 0 : { *(.debug_frame) } | |
.debug_str 0 : { *(.debug_str) } | |
.debug_loc 0 : { *(.debug_loc) } | |
.debug_macinfo 0 : { *(.debug_macinfo) } | |
/* DWARF 3 */ | |
.debug_pubtypes 0 : { *(.debug_pubtypes) } | |
.debug_ranges 0 : { *(.debug_ranges) } | |
PROVIDE (__stack = ORIGIN(ram) + LENGTH(ram)); | |
PROVIDE (__data_start_rom = _etext); | |
PROVIDE (__data_end_rom = _etext + SIZEOF (.data)); | |
} |
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//****************************************************************************** | |
// MSP430FR57x Demo - Toggle P1.0 using software | |
// | |
// Description: Toggle P1.0 using software. | |
// ACLK = n/a, MCLK = SMCLK = TACLK = default DCO = ~625 KHz | |
// | |
// MSP430FR5739 | |
// --------------- | |
// /|\| | | |
// | | | | |
// --|RST | | |
// | | | |
// | P1.0|-->LED | |
// | |
// Priya Thanigai | |
// Texas Instruments Inc. | |
// August 2010 | |
// Built with IAR Embedded Workbench Version: 5.10 & Code Composer Studio V4.0 | |
// compile with: | |
// msp430-gcc -Os -g -Wno-main -Wall -mmcu=msp430fr5739 MSP430FR57xx_01.c -Wl,-Map=a.map -L. -Wl,-Tframasram.x | |
//****************************************************************************** | |
#include <msp430.h> | |
#include <string.h> | |
#include <stdint.h> | |
#include <stdlib.h> | |
__attribute((section(".framram"))) char buff1[4096]; | |
__attribute((section(".framram"))) char buff2[4096]; | |
__attribute((section(".framram"))) char buff3[4096]; | |
char buff4[100] = { "0" }; | |
void main(void) | |
{ | |
WDTCTL = WDTPW + WDTHOLD; // Stop WDT | |
PJDIR |= BIT0; | |
PJOUT |= BIT0; | |
while(1) | |
{ | |
strcpy(buff1,"asdvasdfasdf\n"); | |
strcpy(buff2,"123456789\n"); | |
strcpy(buff3,"zzzzzzzz\n"); | |
PJOUT ^= BIT0; | |
__delay_cycles(100000); | |
} | |
} |
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MEMORY { | |
sfr : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */ | |
peripheral_8bit : ORIGIN = 0x0010, LENGTH = 0x00f0 /* END=0x0100, size 240 */ | |
peripheral_16bit : ORIGIN = 0x0100, LENGTH = 0x0100 /* END=0x0200, size 256 */ | |
bsl : ORIGIN = 0x1000, LENGTH = 0x0200 /* END=0x1200, size 512 */ | |
infomem : ORIGIN = 0x1800, LENGTH = 0x0100 /* END=0x1900, size 256 */ | |
infob : ORIGIN = 0x1800, LENGTH = 0x0080 /* END=0x1880, size 128 */ | |
infoa : ORIGIN = 0x1880, LENGTH = 0x0080 /* END=0x1900, size 128 */ | |
framram (wx) : ORIGIN = 0xc600, LENGTH = 0x3980 /* END=0xff80, size 14720 */ | |
ram (wx) : ORIGIN = 0x1c00, LENGTH = 0x0400 /* END=0x2000, size 1K */ | |
rom (rx) : ORIGIN = 0xc200, LENGTH = 0x0400 /* END=0xff80, size 1K */ | |
vectors : ORIGIN = 0xff80, LENGTH = 0x0080 /* END=0x10000, size 128 */ | |
/* Remaining banks are absent */ | |
infoc : ORIGIN = 0x0000, LENGTH = 0x0000 | |
infod : ORIGIN = 0x0000, LENGTH = 0x0000 | |
far_rom : ORIGIN = 0x00000000, LENGTH = 0x00000000 | |
} | |
REGION_ALIAS("REGION_TEXT", rom); | |
REGION_ALIAS("REGION_DATA", ram); | |
REGION_ALIAS("REGION_SLOWDATA", framram); | |
REGION_ALIAS("REGION_FAR_ROM", far_rom); | |
/* rom (rx) : ORIGIN = 0xc200, LENGTH = 0x3d80 /* END=0xff80, size 15744 */ | |
/* ram (wx) : ORIGIN = 0x1c00, LENGTH = 0x0400 /* END=0x2000, size 1K */ |
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