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@RickKimball RickKimball/buildit.sh
Last active Aug 29, 2015

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weaklinkings
#!/bin/bash
set -x
set -e
#export LU="-Wl,-uTimer0_A0_Handler -Wl,-umain"
export CFLAGS="-I. -mmcu=msp430f5529 -Os -fdata-sections -ffunction-sections"
export LU="-Wl,-uTimer0_A0_Handler,-umain,--gc-section"
export LDFLAGS="-L . -lintr"
rm -f libintr.a
msp430-g++ ${CFLAGS} -c defintr.cpp main.cpp
msp430-ar rvf libintr.a defintr.o main.o
msp430-g++ ${CFLAGS} -DUSR_ISR=0 user.cpp -c -o user1.o
msp430-gcc ${CFLAGS} user1.o ${LU} ${LDFLAGS} -o user_with_def.elf
msp430-g++ ${CFLAGS} -DUSR_ISR=1 user.cpp -c -o user2.o
msp430-gcc ${CFLAGS} user2.o ${LU} ${LDFLAGS} -o user_with_user.elf
msp430-objdump -hCS user_with_def.elf >user_with_def.lss
msp430-objdump -hCS user_with_user.elf >user_with_user.lss
echo "try: diff user_with_def.lss user_with_user.lss"
#!/bin/bash
rm -f defintr.o main.o user1.o user2.o user_with_def.elf user_with_user.elf libintr.a
#include <msp430.h>
#include <stdint.h>
#include "intr.h"
void Timer0_A0_Handler(void)
{
P1OUT |= BIT6;
}
#include <msp430.h>
#ifdef __cplusplus
extern "C" {
#endif
__attribute__((weak, interrupt(TIMER0_A0_VECTOR)))
void Timer0_A0_Handler(void);
#ifdef __cplusplus
}
#endif
#include <msp430.h>
extern void setup(void);
extern void loop(void);
#ifdef __cplusplus
extern "C" {
#endif
volatile void Timer0_A0_Handler(void) __attribute__((interrupt(TIMER0_A0_VECTOR)));
#ifdef __cplusplus
}
#endif
int main(void)
{
volatile void (*ptr)() = Timer0_A0_Handler;
ptr = ptr;
setup();
while(1) {
loop();
}
}
#include <msp430.h>
#include <intr.h>
#ifdef __cplusplus
extern "C" {
extern void setup(void);
extern void loop(void);
}
{
// default handler
P1OUT |= BIT0;
}
#include <msp430.h>
#ifdef __cplusplus
extern "C" {
#endif
void Timer0_A0_Handler(void) __attribute__((interrupt(TIMER0_A0_VECTOR)));
#ifdef __cplusplus
}
#endif
#if defined(USR_ISR) && USR_ISR == 1
void Timer0_A0_Handler(void)
{
// default handler
P1OUT |= BIT0;
}
#endif
void setup(void)
{
#if defined(USR_ISR) && USR_ISR == 1
(void)Timer0_A0_Handler;
P1DIR |= BIT0;
#else
P1DIR |= BIT6;
#endif
}
void loop(void)
{
while(1) {
LPM1;
}
}
user_with_def.elf: file format elf32-msp430
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 0000006e 00004400 00004400 00000094 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .noinit 00000002 00002400 0000446e 00000102 2**1
ALLOC
2 .vectors 00000080 0000ff80 0000ff80 00000102 2**0
CONTENTS, ALLOC, LOAD, READONLY, CODE
3 .debug_aranges 00000078 00000000 00000000 00000184 2**2
CONTENTS, READONLY, DEBUGGING
4 .debug_info 000002e8 00000000 00000000 000001fc 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 00000078 00000000 00000000 000004e4 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000207 00000000 00000000 0000055c 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00004400 <__watchdog_support>:
4400: 55 42 5c 01 mov.b &0x015c,r5
4404: 35 d0 08 5a bis #23048, r5 ;#0x5a08
4408: 82 45 00 24 mov r5, &0x2400
0000440c <__init_stack>:
440c: 31 40 00 44 mov #17408, r1 ;#0x4400
00004410 <__do_copy_data>:
4410: 3f 40 00 00 mov #0, r15 ;#0x0000
4414: 0f 93 tst r15
4416: 08 24 jz $+18 ;abs 0x4428
4418: 92 42 00 24 mov &0x2400,&0x015c
441c: 5c 01
441e: 2f 83 decd r15
4420: 9f 4f 6e 44 mov 17518(r15),9216(r15);0x446e(r15), 0x2400(r15)
4424: 00 24
4426: f8 23 jnz $-14 ;abs 0x4418
00004428 <__do_clear_bss>:
4428: 3f 40 00 00 mov #0, r15 ;#0x0000
442c: 0f 93 tst r15
442e: 07 24 jz $+16 ;abs 0x443e
4430: 92 42 00 24 mov &0x2400,&0x015c
4434: 5c 01
4436: 1f 83 dec r15
4438: cf 43 00 24 mov.b #0, 9216(r15);r3 As==00, 0x2400(r15)
443c: f9 23 jnz $-12 ;abs 0x4430
0000443e <main>:
443e: b0 12 52 44 call #0x4452
4442: b0 12 5a 44 call #0x445a
4446: fd 3f jmp $-4 ;abs 0x4442
00004448 <__stop_progExec__>:
4448: 32 d0 f0 00 bis #240, r2 ;#0x00f0
444c: fd 3f jmp $-4 ;abs 0x4448
0000444e <__ctors_end>:
444e: 30 40 6c 44 br #0x446c
00004452 <setup()>:
4452: f2 d0 40 00 bis.b #64, &0x0204 ;#0x0040
4456: 04 02
4458: 30 41 ret
0000445a <loop()>:
445a: 32 d0 50 00 bis #80, r2 ;#0x0050
445e: fd 3f jmp $-4 ;abs 0x445a
00004460 <Timer0_A0_Handler>:
4460: 0f 12 push r15
4462: f2 d0 40 00 bis.b #64, &0x0202 ;#0x0040
4466: 02 02
4468: 3f 41 pop r15
446a: 00 13 reti
0000446c <_unexpected_>:
446c: 00 13 reti
Disassembly of section .vectors:
0000ff80 <__ivtbl_64>:
ff80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
ff90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
ffa0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
ffb0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
ffc0: 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 NDNDNDNDNDNDNDND
ffd0: 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 NDNDNDNDNDNDNDND
ffe0: 4e 44 4e 44 4e 44 4e 44 4e 44 60 44 4e 44 4e 44 NDNDNDNDND`DNDND
fff0: 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 00 44 NDNDNDNDNDNDND.D
user_with_user.elf: file format elf32-msp430
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 0000006a 00004400 00004400 00000094 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .noinit 00000002 00002400 0000446a 000000fe 2**1
ALLOC
2 .vectors 00000080 0000ff80 0000ff80 000000fe 2**0
CONTENTS, ALLOC, LOAD, READONLY, CODE
3 .debug_aranges 00000078 00000000 00000000 00000180 2**2
CONTENTS, READONLY, DEBUGGING
4 .debug_info 000002e8 00000000 00000000 000001f8 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 00000078 00000000 00000000 000004e0 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000207 00000000 00000000 00000558 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00004400 <__watchdog_support>:
4400: 55 42 5c 01 mov.b &0x015c,r5
4404: 35 d0 08 5a bis #23048, r5 ;#0x5a08
4408: 82 45 00 24 mov r5, &0x2400
0000440c <__init_stack>:
440c: 31 40 00 44 mov #17408, r1 ;#0x4400
00004410 <__do_copy_data>:
4410: 3f 40 00 00 mov #0, r15 ;#0x0000
4414: 0f 93 tst r15
4416: 08 24 jz $+18 ;abs 0x4428
4418: 92 42 00 24 mov &0x2400,&0x015c
441c: 5c 01
441e: 2f 83 decd r15
4420: 9f 4f 6a 44 mov 17514(r15),9216(r15);0x446a(r15), 0x2400(r15)
4424: 00 24
4426: f8 23 jnz $-14 ;abs 0x4418
00004428 <__do_clear_bss>:
4428: 3f 40 00 00 mov #0, r15 ;#0x0000
442c: 0f 93 tst r15
442e: 07 24 jz $+16 ;abs 0x443e
4430: 92 42 00 24 mov &0x2400,&0x015c
4434: 5c 01
4436: 1f 83 dec r15
4438: cf 43 00 24 mov.b #0, 9216(r15);r3 As==00, 0x2400(r15)
443c: f9 23 jnz $-12 ;abs 0x4430
0000443e <main>:
443e: b0 12 5c 44 call #0x445c
4442: b0 12 62 44 call #0x4462
4446: fd 3f jmp $-4 ;abs 0x4442
00004448 <__stop_progExec__>:
4448: 32 d0 f0 00 bis #240, r2 ;#0x00f0
444c: fd 3f jmp $-4 ;abs 0x4448
0000444e <__ctors_end>:
444e: 30 40 68 44 br #0x4468
00004452 <Timer0_A0_Handler>:
4452: 0f 12 push r15
4454: d2 d3 02 02 bis.b #1, &0x0202 ;r3 As==01
4458: 3f 41 pop r15
445a: 00 13 reti
0000445c <setup()>:
445c: d2 d3 04 02 bis.b #1, &0x0204 ;r3 As==01
4460: 30 41 ret
00004462 <loop()>:
4462: 32 d0 50 00 bis #80, r2 ;#0x0050
4466: fd 3f jmp $-4 ;abs 0x4462
00004468 <_unexpected_>:
4468: 00 13 reti
Disassembly of section .vectors:
0000ff80 <__ivtbl_64>:
ff80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
ff90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
ffa0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
ffb0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
ffc0: 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 NDNDNDNDNDNDNDND
ffd0: 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 NDNDNDNDNDNDNDND
ffe0: 4e 44 4e 44 4e 44 4e 44 4e 44 52 44 4e 44 4e 44 NDNDNDNDNDRDNDND
fff0: 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 4e 44 00 44 NDNDNDNDNDNDND.D
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