Created
May 28, 2015 14:30
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issue #54 patch
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diff --git a/STM32F1/cores/maple/ext_interrupts.h b/STM32F1/cores/maple/ext_interrupts.h | |
index ce1ca03..a406868 100644 | |
--- a/STM32F1/cores/maple/ext_interrupts.h | |
+++ b/STM32F1/cores/maple/ext_interrupts.h | |
@@ -106,7 +106,7 @@ void detachInterrupt(uint8 pin); | |
* | |
* @see noInterrupts() | |
*/ | |
-static __always_inline void interrupts() { | |
+static inline __always_inline void interrupts() { | |
nvic_globalirq_enable(); | |
} | |
@@ -120,7 +120,7 @@ static __always_inline void interrupts() { | |
* | |
* @see interrupts() | |
*/ | |
-static __always_inline void noInterrupts() { | |
+static inline __always_inline void noInterrupts() { | |
nvic_globalirq_disable(); | |
} | |
diff --git a/STM32F1/cores/maple/libmaple/exti.c b/STM32F1/cores/maple/libmaple/exti.c | |
index f8ee8c3..402bec6 100644 | |
--- a/STM32F1/cores/maple/libmaple/exti.c | |
+++ b/STM32F1/cores/maple/libmaple/exti.c | |
@@ -250,7 +250,7 @@ void __irq_exti15_10(void) { | |
* won't actually be cleared in time and the ISR will fire again. To | |
* compensate, this function NOPs for 2 cycles after clearing the | |
* pending bits to ensure it takes effect. */ | |
-static __always_inline void clear_pending_msk(uint32 exti_msk) { | |
+static inline __always_inline void clear_pending_msk(uint32 exti_msk) { | |
EXTI_BASE->PR = exti_msk; | |
asm volatile("nop"); | |
asm volatile("nop"); | |
@@ -258,7 +258,7 @@ static __always_inline void clear_pending_msk(uint32 exti_msk) { | |
/* This dispatch routine is for non-multiplexed EXTI lines only; i.e., | |
* it doesn't check EXTI_PR. */ | |
-static __always_inline void dispatch_single_exti(uint32 exti) { | |
+static inline __always_inline void dispatch_single_exti(uint32 exti) { | |
voidArgumentFuncPtr handler = exti_channels[exti].handler; | |
if (!handler) { | |
@@ -270,7 +270,7 @@ static __always_inline void dispatch_single_exti(uint32 exti) { | |
} | |
/* Dispatch routine for EXTIs which share an IRQ. */ | |
-static __always_inline void dispatch_extis(uint32 start, uint32 stop) { | |
+static inline __always_inline void dispatch_extis(uint32 start, uint32 stop) { | |
uint32 pr = EXTI_BASE->PR; | |
uint32 handled_msk = 0; | |
uint32 exti; | |
diff --git a/STM32F1/system/libmaple/dma_private.h b/STM32F1/system/libmaple/dma_private.h | |
index 82f5fc1..225e1c4 100644 | |
--- a/STM32F1/system/libmaple/dma_private.h | |
+++ b/STM32F1/system/libmaple/dma_private.h | |
@@ -37,7 +37,7 @@ | |
/* Wrap this in an ifdef to shut up GCC. (We provide DMA_GET_HANDLER | |
* in the series support files, which need dma_irq_handler().) */ | |
#ifdef DMA_GET_HANDLER | |
-static __always_inline void dma_irq_handler(dma_dev *dev, dma_tube tube) { | |
+static inline __always_inline void dma_irq_handler(dma_dev *dev, dma_tube tube) { | |
dma_clear_isr_bits(dev, tube); /* in case handler doesn't */ | |
void (*handler)(void) = DMA_GET_HANDLER(dev, tube); | |
if (handler) { | |
diff --git a/STM32F1/system/libmaple/include/libmaple/libmaple_types.h b/STM32F1/system/libmaple/include/libmaple/libmaple_types.h | |
index 882a910..191a4fa 100644 | |
--- a/STM32F1/system/libmaple/include/libmaple/libmaple_types.h | |
+++ b/STM32F1/system/libmaple/include/libmaple/libmaple_types.h | |
@@ -57,8 +57,12 @@ typedef void (*voidArgumentFuncPtr)(void *); | |
#define __packed __attribute__((__packed__)) | |
#define __deprecated __attribute__((__deprecated__)) | |
#define __weak __attribute__((weak)) | |
-#define __always_inline inline __attribute__((always_inline)) | |
+#ifndef __always_inline | |
+#define __always_inline __attribute__((always_inline)) | |
+#endif | |
+#ifndef __used | |
#define __unused __attribute__((unused)) | |
+#endif | |
#ifndef NULL | |
#define NULL 0 | |
diff --git a/STM32F1/system/libmaple/include/libmaple/nvic.h b/STM32F1/system/libmaple/include/libmaple/nvic.h | |
index 4642363..69d9a91 100644 | |
--- a/STM32F1/system/libmaple/include/libmaple/nvic.h | |
+++ b/STM32F1/system/libmaple/include/libmaple/nvic.h | |
@@ -109,14 +109,14 @@ void nvic_sys_reset(); | |
/** | |
* Enables interrupts and configurable fault handlers (clear PRIMASK). | |
*/ | |
-static __always_inline void nvic_globalirq_enable() { | |
+static inline __always_inline void nvic_globalirq_enable() { | |
asm volatile("cpsie i"); | |
} | |
/** | |
* Disable interrupts and configurable fault handlers (set PRIMASK). | |
*/ | |
-static __always_inline void nvic_globalirq_disable() { | |
+static inline __always_inline void nvic_globalirq_disable() { | |
asm volatile("cpsid i"); | |
} | |
diff --git a/STM32F1/system/libmaple/include/libmaple/usb_cdcacm.h b/STM32F1/system/libmaple/include/libmaple/usb_cdcacm.h | |
index 13e1bac..62c9181 100644 | |
--- a/STM32F1/system/libmaple/include/libmaple/usb_cdcacm.h | |
+++ b/STM32F1/system/libmaple/include/libmaple/usb_cdcacm.h | |
@@ -169,7 +169,7 @@ int usb_cdcacm_get_n_data_bits(void); /* bDataBits */ | |
void usb_cdcacm_set_hooks(unsigned hook_flags, void (*hook)(unsigned, void*)); | |
-static __always_inline void usb_cdcacm_remove_hooks(unsigned hook_flags) { | |
+static inline __always_inline void usb_cdcacm_remove_hooks(unsigned hook_flags) { | |
usb_cdcacm_set_hooks(hook_flags, 0); | |
} | |
diff --git a/STM32F1/system/libmaple/stm32f1/include/series/gpio.h b/STM32F1/system/libmaple/stm32f1/include/series/gpio.h | |
index 04376fe..aff639b 100644 | |
--- a/STM32F1/system/libmaple/stm32f1/include/series/gpio.h | |
+++ b/STM32F1/system/libmaple/stm32f1/include/series/gpio.h | |
@@ -484,7 +484,7 @@ typedef exti_num afio_exti_num; | |
/** | |
* @brief Deprecated. Use exti_select(exti, port) instead. | |
*/ | |
-static __always_inline void afio_exti_select(exti_num exti, exti_cfg port) { | |
+static inline __always_inline void afio_exti_select(exti_num exti, exti_cfg port) { | |
exti_select(exti, port); | |
} | |
diff --git a/STM32F1/system/libmaple/stm32f1/include/series/spi.h b/STM32F1/system/libmaple/stm32f1/include/series/spi.h | |
index d288a0c..ec4821c 100644 | |
--- a/STM32F1/system/libmaple/stm32f1/include/series/spi.h | |
+++ b/STM32F1/system/libmaple/stm32f1/include/series/spi.h | |
@@ -75,7 +75,7 @@ extern void spi_config_gpios(struct spi_dev*, uint8, | |
* @brief Deprecated. Use spi_config_gpios() instead. | |
* @see spi_config_gpios() | |
*/ | |
-static __always_inline void spi_gpio_cfg(uint8 as_master, | |
+static inline __always_inline void spi_gpio_cfg(uint8 as_master, | |
struct gpio_dev *nss_dev, | |
uint8 nss_bit, | |
struct gpio_dev *comm_dev, | |
diff --git a/STM32F1/system/libmaple/stm32f2/include/series/dma.h b/STM32F1/system/libmaple/stm32f2/include/series/dma.h | |
index 43bd1a2..56725e5 100644 | |
--- a/STM32F1/system/libmaple/stm32f2/include/series/dma.h | |
+++ b/STM32F1/system/libmaple/stm32f2/include/series/dma.h | |
@@ -707,7 +707,7 @@ void dma_set_mem_n_addr(dma_dev *dev, dma_tube tube, int n, | |
* @param tube Tube whose memory 0 address to set | |
* @param addr Address to use as memory 0 | |
*/ | |
-static __always_inline void | |
+static inline __always_inline void | |
dma_set_mem0_addr(dma_dev *dev, dma_tube tube, __io void *addr) { | |
dma_set_mem_n_addr(dev, tube, 0, addr); | |
} | |
@@ -720,13 +720,13 @@ dma_set_mem0_addr(dma_dev *dev, dma_tube tube, __io void *addr) { | |
* @param tube Tube whose memory 1 address to set | |
* @param addr Address to use as memory 1 | |
*/ | |
-static __always_inline void | |
+static inline __always_inline void | |
dma_set_mem1_addr(dma_dev *dev, dma_tube tube, __io void *addr) { | |
dma_set_mem_n_addr(dev, tube, 1, addr); | |
} | |
/* Assume the user means SM0AR in a non-double-buffered configuration. */ | |
-static __always_inline void | |
+static inline __always_inline void | |
dma_set_mem_addr(dma_dev *dev, dma_tube tube, __io void *addr) { | |
dma_set_mem0_addr(dev, tube, addr); | |
} | |
@@ -743,7 +743,7 @@ static inline dma_xfer_size dma_get_per_size(dma_dev *dev, dma_tube tube) { | |
void dma_enable_fifo(dma_dev *dev, dma_tube tube); | |
void dma_disable_fifo(dma_dev *dev, dma_tube tube); | |
-static __always_inline int dma_is_fifo_enabled(dma_dev *dev, dma_tube tube) { | |
+static inline __always_inline int dma_is_fifo_enabled(dma_dev *dev, dma_tube tube) { | |
return dma_tube_regs(dev, tube)->SFCR & DMA_SFCR_DMDIS; | |
} | |
@@ -769,7 +769,7 @@ static __always_inline int dma_is_fifo_enabled(dma_dev *dev, dma_tube tube) { | |
* I can't imagine why ST didn't just use a byte for each group. The | |
* bits fit, and it would have made functions like these simpler and | |
* faster. Oh well. */ | |
-static __always_inline uint32 _dma_sr_fcr_shift(dma_tube tube) { | |
+static inline __always_inline uint32 _dma_sr_fcr_shift(dma_tube tube) { | |
switch (tube) { | |
case DMA_S0: /* fall through */ | |
case DMA_S4: | |
diff --git a/STM32F1/system/libmaple/timer_private.h b/STM32F1/system/libmaple/timer_private.h | |
index 320c636..55e2caf 100644 | |
--- a/STM32F1/system/libmaple/timer_private.h | |
+++ b/STM32F1/system/libmaple/timer_private.h | |
@@ -121,7 +121,7 @@ | |
* line may be shared with another timer. For example, the timer 1 | |
* update interrupt shares an IRQ line with the timer 10 interrupt on | |
* STM32F1 (XL-density), STM32F2, and STM32F4. */ | |
-static __always_inline void dispatch_single_irq(timer_dev *dev, | |
+static inline __always_inline void dispatch_single_irq(timer_dev *dev, | |
timer_interrupt_id iid, | |
uint32 irq_mask) { | |
timer_bas_reg_map *regs = (dev->regs).bas; | |
@@ -145,15 +145,15 @@ static __always_inline void dispatch_single_irq(timer_dev *dev, | |
} \ | |
} while (0) | |
-static __always_inline void dispatch_adv_brk(timer_dev *dev) { | |
+static inline __always_inline void dispatch_adv_brk(timer_dev *dev) { | |
dispatch_single_irq(dev, TIMER_BREAK_INTERRUPT, TIMER_SR_BIF); | |
} | |
-static __always_inline void dispatch_adv_up(timer_dev *dev) { | |
+static inline __always_inline void dispatch_adv_up(timer_dev *dev) { | |
dispatch_single_irq(dev, TIMER_UPDATE_INTERRUPT, TIMER_SR_UIF); | |
} | |
-static __always_inline void dispatch_adv_trg_com(timer_dev *dev) { | |
+static inline __always_inline void dispatch_adv_trg_com(timer_dev *dev) { | |
timer_adv_reg_map *regs = (dev->regs).adv; | |
uint32 dsr = regs->DIER & regs->SR; | |
void (**hs)(void) = dev->handlers; | |
@@ -168,7 +168,7 @@ static __always_inline void dispatch_adv_trg_com(timer_dev *dev) { | |
regs->SR &= ~handled; | |
} | |
-static __always_inline void dispatch_adv_cc(timer_dev *dev) { | |
+static inline __always_inline void dispatch_adv_cc(timer_dev *dev) { | |
timer_adv_reg_map *regs = (dev->regs).adv; | |
uint32 dsr = regs->DIER & regs->SR; | |
void (**hs)(void) = dev->handlers; | |
@@ -182,7 +182,7 @@ static __always_inline void dispatch_adv_cc(timer_dev *dev) { | |
regs->SR &= ~handled; | |
} | |
-static __always_inline void dispatch_general(timer_dev *dev) { | |
+static inline __always_inline void dispatch_general(timer_dev *dev) { | |
timer_gen_reg_map *regs = (dev->regs).gen; | |
uint32 dsr = regs->DIER & regs->SR; | |
void (**hs)(void) = dev->handlers; | |
@@ -200,7 +200,7 @@ static __always_inline void dispatch_general(timer_dev *dev) { | |
/* On F1 (XL-density), F2, and F4, TIM9 and TIM12 are restricted | |
* general-purpose timers with update, CC1, CC2, and TRG interrupts. */ | |
-static __always_inline void dispatch_tim_9_12(timer_dev *dev) { | |
+static inline __always_inline void dispatch_tim_9_12(timer_dev *dev) { | |
timer_gen_reg_map *regs = (dev->regs).gen; | |
uint32 dsr = regs->DIER & regs->SR; | |
void (**hs)(void) = dev->handlers; | |
@@ -216,7 +216,7 @@ static __always_inline void dispatch_tim_9_12(timer_dev *dev) { | |
/* On F1 (XL-density), F2, and F4, timers 10, 11, 13, and 14 are | |
* restricted general-purpose timers with update and CC1 interrupts. */ | |
-static __always_inline void dispatch_tim_10_11_13_14(timer_dev *dev) { | |
+static inline __always_inline void dispatch_tim_10_11_13_14(timer_dev *dev) { | |
timer_gen_reg_map *regs = (dev->regs).gen; | |
uint32 dsr = regs->DIER & regs->SR; | |
void (**hs)(void) = dev->handlers; | |
@@ -228,7 +228,7 @@ static __always_inline void dispatch_tim_10_11_13_14(timer_dev *dev) { | |
regs->SR &= ~handled; | |
} | |
-static __always_inline void dispatch_basic(timer_dev *dev) { | |
+static inline __always_inline void dispatch_basic(timer_dev *dev) { | |
dispatch_single_irq(dev, TIMER_UPDATE_INTERRUPT, TIMER_SR_UIF); | |
} | |
diff --git a/STM32F1/system/libmaple/usart_private.h b/STM32F1/system/libmaple/usart_private.h | |
index 8e8e11b..da5de34 100644 | |
--- a/STM32F1/system/libmaple/usart_private.h | |
+++ b/STM32F1/system/libmaple/usart_private.h | |
@@ -37,7 +37,7 @@ | |
#include <libmaple/ring_buffer.h> | |
#include <libmaple/usart.h> | |
-static __always_inline void usart_irq(ring_buffer *rb, usart_reg_map *regs) { | |
+static inline __always_inline void usart_irq(ring_buffer *rb, usart_reg_map *regs) { | |
#ifdef USART_SAFE_INSERT | |
/* If the buffer is full and the user defines USART_SAFE_INSERT, | |
* ignore new bytes. */ | |
diff --git a/STM32F3/cores/maple/libmaple/dma_private.h b/STM32F3/cores/maple/libmaple/dma_private.h | |
index b25ded2..c53a0e5 100644 | |
--- a/STM32F3/cores/maple/libmaple/dma_private.h | |
+++ b/STM32F3/cores/maple/libmaple/dma_private.h | |
@@ -37,7 +37,7 @@ | |
/* Wrap this in an ifdef to shut up GCC. (We provide DMA_GET_HANDLER | |
* in the series support files, which need dma_irq_handler().) */ | |
#ifdef DMA_GET_HANDLER | |
-static __always_inline void dma_irq_handler(dma_dev *dev, dma_tube tube) { | |
+static inline __always_inline void dma_irq_handler(dma_dev *dev, dma_tube tube) { | |
void (*handler)(void) = DMA_GET_HANDLER(dev, tube); | |
if (handler) { | |
handler(); | |
diff --git a/STM32F3/cores/maple/libmaple/exti.c b/STM32F3/cores/maple/libmaple/exti.c | |
index c35072c..1ecf324 100644 | |
--- a/STM32F3/cores/maple/libmaple/exti.c | |
+++ b/STM32F3/cores/maple/libmaple/exti.c | |
@@ -251,7 +251,7 @@ void __irq_exti15_10(void) { | |
* won't actually be cleared in time and the ISR will fire again. To | |
* compensate, this function NOPs for 2 cycles after clearing the | |
* pending bits to ensure it takes effect. */ | |
-static __always_inline void clear_pending_msk(uint32 exti_msk) { | |
+static inline __always_inline void clear_pending_msk(uint32 exti_msk) { | |
EXTI_BASE->PR = exti_msk; | |
asm volatile("nop"); | |
asm volatile("nop"); | |
@@ -259,7 +259,7 @@ static __always_inline void clear_pending_msk(uint32 exti_msk) { | |
/* This dispatch routine is for non-multiplexed EXTI lines only; i.e., | |
* it doesn't check EXTI_PR. */ | |
-static __always_inline void dispatch_single_exti(uint32 exti) { | |
+static inline __always_inline void dispatch_single_exti(uint32 exti) { | |
voidArgumentFuncPtr handler = exti_channels[exti].handler; | |
if (!handler) { | |
@@ -271,7 +271,7 @@ static __always_inline void dispatch_single_exti(uint32 exti) { | |
} | |
/* Dispatch routine for EXTIs which share an IRQ. */ | |
-static __always_inline void dispatch_extis(uint32 start, uint32 stop) { | |
+static inline __always_inline void dispatch_extis(uint32 start, uint32 stop) { | |
uint32 pr = EXTI_BASE->PR; | |
uint32 handled_msk = 0; | |
uint32 exti; | |
diff --git a/STM32F3/cores/maple/libmaple/include/libmaple/libmaple_types.h b/STM32F3/cores/maple/libmaple/include/libmaple/libmaple_types.h | |
index 60dd2ff..9fdde1f 100644 | |
--- a/STM32F3/cores/maple/libmaple/include/libmaple/libmaple_types.h | |
+++ b/STM32F3/cores/maple/libmaple/include/libmaple/libmaple_types.h | |
@@ -55,8 +55,12 @@ typedef void (*voidArgumentFuncPtr)(void *); | |
#define __packed __attribute__((__packed__)) | |
#define __deprecated __attribute__((__deprecated__)) | |
#define __weak __attribute__((weak)) | |
-#define __always_inline inline __attribute__((always_inline)) | |
+#ifndef __always_inline | |
+#define __always_inline __attribute__((always_inline)) | |
+#endif | |
+#ifndef __used | |
#define __unused __attribute__((unused)) | |
+#endif | |
#ifndef NULL | |
#define NULL 0 | |
diff --git a/STM32F3/cores/maple/libmaple/include/libmaple/nvic.h b/STM32F3/cores/maple/libmaple/include/libmaple/nvic.h | |
index ffe385d..6b580f6 100644 | |
--- a/STM32F3/cores/maple/libmaple/include/libmaple/nvic.h | |
+++ b/STM32F3/cores/maple/libmaple/include/libmaple/nvic.h | |
@@ -107,14 +107,14 @@ void nvic_sys_reset(); | |
/** | |
* Enables interrupts and configurable fault handlers (clear PRIMASK). | |
*/ | |
-static __always_inline void nvic_globalirq_enable() { | |
+static inline __always_inline void nvic_globalirq_enable() { | |
asm volatile("cpsie i"); | |
} | |
/** | |
* Disable interrupts and configurable fault handlers (set PRIMASK). | |
*/ | |
-static __always_inline void nvic_globalirq_disable() { | |
+static inline __always_inline void nvic_globalirq_disable() { | |
asm volatile("cpsid i"); | |
} | |
diff --git a/STM32F3/cores/maple/libmaple/include/libmaple/usb_cdcacm.h b/STM32F3/cores/maple/libmaple/include/libmaple/usb_cdcacm.h | |
index 5fe832c..b21069b 100644 | |
--- a/STM32F3/cores/maple/libmaple/include/libmaple/usb_cdcacm.h | |
+++ b/STM32F3/cores/maple/libmaple/include/libmaple/usb_cdcacm.h | |
@@ -168,7 +168,7 @@ int usb_cdcacm_get_n_data_bits(void); /* bDataBits */ | |
void usb_cdcacm_set_hooks(unsigned hook_flags, void (*hook)(unsigned, void*)); | |
-static __always_inline void usb_cdcacm_remove_hooks(unsigned hook_flags) { | |
+static inline __always_inline void usb_cdcacm_remove_hooks(unsigned hook_flags) { | |
usb_cdcacm_set_hooks(hook_flags, 0); | |
} | |
diff --git a/STM32F3/cores/maple/libmaple/stm32f3/f3_adc.c b/STM32F3/cores/maple/libmaple/stm32f3/f3_adc.c | |
index 79fcd51..047d4f5 100644 | |
--- a/STM32F3/cores/maple/libmaple/stm32f3/f3_adc.c | |
+++ b/STM32F3/cores/maple/libmaple/stm32f3/f3_adc.c | |
@@ -378,7 +378,7 @@ void _adc_enable_dev_irq(const adc_dev *dev) { | |
} | |
/* IRQ handler for adc_attach_interrupt() */ | |
-static __always_inline void adc_irq(const adc_dev *dev) { | |
+static inline __always_inline void adc_irq(const adc_dev *dev) { | |
adc_private_data *priv = dev->priv; | |
uint32 irq_flags = dev->regs->ISR & priv->handler_flags; | |
diff --git a/STM32F3/cores/maple/libmaple/stm32f3/f3_usart.c b/STM32F3/cores/maple/libmaple/stm32f3/f3_usart.c | |
index 4d466b3..72449a5 100644 | |
--- a/STM32F3/cores/maple/libmaple/stm32f3/f3_usart.c | |
+++ b/STM32F3/cores/maple/libmaple/stm32f3/f3_usart.c | |
@@ -176,7 +176,7 @@ gpio_af usart_get_af(usart_dev *dev) { | |
* Interrupt handlers. | |
*/ | |
-static __always_inline void usart_irq(ring_buffer *rb, usart_reg_map *regs) { | |
+static inline __always_inline void usart_irq(ring_buffer *rb, usart_reg_map *regs) { | |
#ifdef USART_SAFE_INSERT | |
/* If the buffer is full and the user defines USART_SAFE_INSERT, | |
* ignore new bytes. */ | |
diff --git a/STM32F3/cores/maple/libmaple/timer_private.h b/STM32F3/cores/maple/libmaple/timer_private.h | |
index 320c636..55e2caf 100644 | |
--- a/STM32F3/cores/maple/libmaple/timer_private.h | |
+++ b/STM32F3/cores/maple/libmaple/timer_private.h | |
@@ -121,7 +121,7 @@ | |
* line may be shared with another timer. For example, the timer 1 | |
* update interrupt shares an IRQ line with the timer 10 interrupt on | |
* STM32F1 (XL-density), STM32F2, and STM32F4. */ | |
-static __always_inline void dispatch_single_irq(timer_dev *dev, | |
+static inline __always_inline void dispatch_single_irq(timer_dev *dev, | |
timer_interrupt_id iid, | |
uint32 irq_mask) { | |
timer_bas_reg_map *regs = (dev->regs).bas; | |
@@ -145,15 +145,15 @@ static __always_inline void dispatch_single_irq(timer_dev *dev, | |
} \ | |
} while (0) | |
-static __always_inline void dispatch_adv_brk(timer_dev *dev) { | |
+static inline __always_inline void dispatch_adv_brk(timer_dev *dev) { | |
dispatch_single_irq(dev, TIMER_BREAK_INTERRUPT, TIMER_SR_BIF); | |
} | |
-static __always_inline void dispatch_adv_up(timer_dev *dev) { | |
+static inline __always_inline void dispatch_adv_up(timer_dev *dev) { | |
dispatch_single_irq(dev, TIMER_UPDATE_INTERRUPT, TIMER_SR_UIF); | |
} | |
-static __always_inline void dispatch_adv_trg_com(timer_dev *dev) { | |
+static inline __always_inline void dispatch_adv_trg_com(timer_dev *dev) { | |
timer_adv_reg_map *regs = (dev->regs).adv; | |
uint32 dsr = regs->DIER & regs->SR; | |
void (**hs)(void) = dev->handlers; | |
@@ -168,7 +168,7 @@ static __always_inline void dispatch_adv_trg_com(timer_dev *dev) { | |
regs->SR &= ~handled; | |
} | |
-static __always_inline void dispatch_adv_cc(timer_dev *dev) { | |
+static inline __always_inline void dispatch_adv_cc(timer_dev *dev) { | |
timer_adv_reg_map *regs = (dev->regs).adv; | |
uint32 dsr = regs->DIER & regs->SR; | |
void (**hs)(void) = dev->handlers; | |
@@ -182,7 +182,7 @@ static __always_inline void dispatch_adv_cc(timer_dev *dev) { | |
regs->SR &= ~handled; | |
} | |
-static __always_inline void dispatch_general(timer_dev *dev) { | |
+static inline __always_inline void dispatch_general(timer_dev *dev) { | |
timer_gen_reg_map *regs = (dev->regs).gen; | |
uint32 dsr = regs->DIER & regs->SR; | |
void (**hs)(void) = dev->handlers; | |
@@ -200,7 +200,7 @@ static __always_inline void dispatch_general(timer_dev *dev) { | |
/* On F1 (XL-density), F2, and F4, TIM9 and TIM12 are restricted | |
* general-purpose timers with update, CC1, CC2, and TRG interrupts. */ | |
-static __always_inline void dispatch_tim_9_12(timer_dev *dev) { | |
+static inline __always_inline void dispatch_tim_9_12(timer_dev *dev) { | |
timer_gen_reg_map *regs = (dev->regs).gen; | |
uint32 dsr = regs->DIER & regs->SR; | |
void (**hs)(void) = dev->handlers; | |
@@ -216,7 +216,7 @@ static __always_inline void dispatch_tim_9_12(timer_dev *dev) { | |
/* On F1 (XL-density), F2, and F4, timers 10, 11, 13, and 14 are | |
* restricted general-purpose timers with update and CC1 interrupts. */ | |
-static __always_inline void dispatch_tim_10_11_13_14(timer_dev *dev) { | |
+static inline __always_inline void dispatch_tim_10_11_13_14(timer_dev *dev) { | |
timer_gen_reg_map *regs = (dev->regs).gen; | |
uint32 dsr = regs->DIER & regs->SR; | |
void (**hs)(void) = dev->handlers; | |
@@ -228,7 +228,7 @@ static __always_inline void dispatch_tim_10_11_13_14(timer_dev *dev) { | |
regs->SR &= ~handled; | |
} | |
-static __always_inline void dispatch_basic(timer_dev *dev) { | |
+static inline __always_inline void dispatch_basic(timer_dev *dev) { | |
dispatch_single_irq(dev, TIMER_UPDATE_INTERRUPT, TIMER_SR_UIF); | |
} | |
diff --git a/STM32F3/cores/maple/wirish/ext_interrupts.h b/STM32F3/cores/maple/wirish/ext_interrupts.h | |
index ce1ca03..a406868 100644 | |
--- a/STM32F3/cores/maple/wirish/ext_interrupts.h | |
+++ b/STM32F3/cores/maple/wirish/ext_interrupts.h | |
@@ -106,7 +106,7 @@ void detachInterrupt(uint8 pin); | |
* | |
* @see noInterrupts() | |
*/ | |
-static __always_inline void interrupts() { | |
+static inline __always_inline void interrupts() { | |
nvic_globalirq_enable(); | |
} | |
@@ -120,7 +120,7 @@ static __always_inline void interrupts() { | |
* | |
* @see interrupts() | |
*/ | |
-static __always_inline void noInterrupts() { | |
+static inline __always_inline void noInterrupts() { | |
nvic_globalirq_disable(); | |
} | |
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