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@SopaXorzTaker SopaXorzTaker/ePS6800.py

Last active Aug 26, 2016
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ePS6800 disassembler
#!/usr/bin/env python3
import sys
"""
This is a disassembler for Elan ePS6800 microcontrollers,
intended for educational purposes only.
The author assumes no liability or responsibility for the use of this software.
In some jurisdictions, disassembling or reverse-engineering code without permission might be illegal.
Public Domain
"""
if len(sys.argv) != 2:
print("Usage: %s <infile.rom>", argv[0])
exit(1)
with open(sys.argv[1], "rb") as infile:
while True:
offset = infile.tell()
nibble = []
try:
for _ in range(4):
nibble.append(ord(infile.read(1))&0xF)
except TypeError:
break
# Word addressing
print("%04x: %01x%01x%01x%01x " % (offset // 4,
nibble[0], nibble[1], nibble[2], nibble[3]), end="")
if nibble[0] == 0:
if nibble[1] == 0:
if nibble[2] == 0:
if nibble[3] == 0:
print("NOP")
elif nibble[3] == 1:
print("WDTC")
elif nibble[3] == 2:
print("SLEP")
else:
print("<invalid>")
else:
address_nibble = []
for _ in range(4):
address_nibble.append(ord(infile.read(1))&0xF)
address = (nibble[3]&1)<<16
address |= address_nibble[0]<<12
address |= address_nibble[1]<<8
address |= address_nibble[2]<<4
address |= address_nibble[3]
#print("(%01x%01x%01x%01x) " % (address_nibble[0], address_nibble[1],
# address_nibble[2], address_nibble[3]), end="")
if nibble[2] == 2:
print("LJMP %03xh" % address)
elif nibble[2] == 3:
print("LCALL %03xh" % address)
else:
print("<invalid> %03xh" % address)
else:
reg = (nibble[2]<<4) | nibble[3]
if nibble[1] == 1:
print("SFR4 r%02xh" % reg)
elif nibble[1] == 2:
print("OR A, r%02xh" % reg)
elif nibble[1] == 3:
print("OR r%02xh, A" % reg)
elif nibble[1] == 4:
print("AND A, r%02xh" % reg)
elif nibble[1] == 5:
print("AND r%02xh, A" % reg)
elif nibble[1] == 6:
print("XOR A, r%02xh" % reg)
elif nibble[1] == 7:
print("XOR r%02xh, A" % reg)
elif nibble[1] == 8:
print("COMA r%02xh" % reg)
elif nibble[1] == 9:
print("COM r%02xh" % reg)
elif nibble[1] == 10:
print("RRCA r%02xh" % reg)
elif nibble[1] == 11:
print("RRC r%02xh" % reg)
elif nibble[1] == 12:
print("RLCA r%02xh" % reg)
elif nibble[1] == 13:
print("RLC r%02xh" % reg)
elif nibble[1] == 14:
print("SWAPA r%02xh" % reg)
elif nibble[1] == 15:
print("SWAP r%02xh" % reg)
elif nibble[0] == 1:
reg = (nibble[2]<<4) | nibble[3]
if nibble[1] == 0:
print("ADD A, r%02xh" % reg)
elif nibble[1] == 1:
print("ADD r%02xh, A" % reg)
elif nibble[1] == 2:
print("ADC A, r%02xh" % reg)
elif nibble[1] == 3:
print("ADC r%02xh, A" % reg)
elif nibble[1] == 4:
print("ADDDC A, r%02xh" % reg)
elif nibble[1] == 5:
print("ADDDC r%02xh, A" % reg)
elif nibble[1] == 6:
print("SUB A, r%02xh" % reg)
elif nibble[1] == 7:
print("SUB r%02xh, A" % reg)
elif nibble[1] == 8:
print("SUBB A, r%02xh" % reg)
elif nibble[1] == 9:
print("SUBB r%02xh, A" % reg)
elif nibble[1] == 10:
print("SUBDB A, r%02xh" % reg)
elif nibble[1] == 11:
print("SUBDB r%02xh, A" % reg)
elif nibble[1] == 12:
print("INCA r%02xh" % reg)
elif nibble[1] == 13:
print("INC r%02xh" % reg)
elif nibble[1] == 14:
print("DECA r%02xh" % reg)
elif nibble[1] == 15:
print("DEC r%02xh" % reg)
elif nibble[0] == 2:
reg = (nibble[2]<<4) | nibble[3]
if nibble[1] == 0:
print("MOV A, r%02xh" % reg)
elif nibble[1] == 1:
print("MOV r%02xh, A" % reg)
elif nibble[1] == 2:
print("SHRA r%02xh" % reg)
elif nibble[1] == 3:
print("SHLA r%02xh" % reg)
elif nibble[1] == 4:
print("CLR r%02xh" % reg)
elif nibble[1] == 5:
print("TEST r%02xh" % reg)
elif nibble[1] == 6:
print("MOVL r%02xh, A" % reg)
elif nibble[1] == 7:
print("RPT r%02xh" % reg)
elif nibble[1] == 8:
print("MOVH r%02xh, A" % reg)
elif nibble[1] == 9:
print("MOVL A, r%02xh" % reg)
elif nibble[1] == 10:
print("MOVH A, r%02xh" % reg)
elif nibble[1] == 11:
if reg == 255:
print("RETI")
elif reg == 254:
print("RET")
else:
print("<invalid>")
else:
i = nibble[1]
if i == 15:
print("TBRD A, r%02xh" % reg)
else:
print("TBRD %d, r%02xh" % (i, reg))
elif nibble[0] == 3:
address = (nibble[1]<<8) | (nibble[2]<<4) | nibble[3]
print("S0CALL %03xh" % address)
elif nibble[0] == 4:
k = (nibble[2]<<4) | nibble[3]
address = 0
if nibble[1] in [7, 8, 9]:
address_nibble = []
for _ in range(4):
address_nibble.append(ord(infile.read(1))&0xF)
address |= address_nibble[0]<<12
address |= address_nibble[1]<<8
address |= address_nibble[2]<<4
address |= address_nibble[3]
#print("(%01x%01x%01x%01x) " % (address_nibble[0], address_nibble[1],
# address_nibble[2], address_nibble[3]), end="")
if nibble[1] == 0:
print("TBPTL #%02xh" % k)
elif nibble[1] == 1:
print("TBPTM #%02xh" % k)
elif nibble[1] == 2:
print("TBPTH #%02xh" % k)
elif nibble[1] == 3:
print("BANK #%02xh" % k)
elif nibble[1] == 4:
print("OR A, #%02xh" % k)
elif nibble[1] == 5:
print("AND A, #%02xh" % k)
elif nibble[1] == 6:
print("XOR A, #%02xh" % k)
elif nibble[1] == 7:
print("JGE A, #%02xh, %04xh" % (k, address))
elif nibble[1] == 8:
print("JLE A, #%02xh, %04xh" % (k, address))
elif nibble[1] == 9:
print("JE A, #%02xh, %04xh" % (k, address))
elif nibble[1] == 10:
print("ADD A, #%02xh" % k)
elif nibble[1] == 11:
print("ADC A, #%02xh" % k)
elif nibble[1] == 12:
print("SUB A, #%02xh" % k)
elif nibble[1] == 13:
print("SUBB A, #%02xh" % k)
elif nibble[1] == 14:
print("MOV A, #%02xh" % k)
elif nibble[1] == 15:
print("SFL4 r%02xh" % k)
elif nibble[0] == 5:
r = (nibble[2]<<4) | nibble[3]
address = 0
if nibble[1] not in [2, 3, 4]:
address_nibble = []
for _ in range(4):
address_nibble.append(ord(infile.read(1))&0xF)
address |= address_nibble[0]<<12
address |= address_nibble[1]<<8
address |= address_nibble[2]<<4
address |= address_nibble[3]
#print("(%01x%01x%01x%01x) " % (address_nibble[0], address_nibble[1],
# address_nibble[2], address_nibble[3]), end="")
if nibble[1] == 0:
print("JDNZ A, r%02xh, %04xh" % (r, address))
elif nibble[1] == 1:
print("JDNZ r%02xh, %04xh" % (r, address))
elif nibble[1] == 2:
print("EXL r%02xh" % r)
elif nibble[1] == 3:
print("EXH r%02xh" % r)
elif nibble[1] == 4:
print("EX r%02xh" % r)
elif nibble[1] == 5:
print("JGE A, r%02xh, %04xh" % (r, address))
elif nibble[1] == 6:
print("JLE A, r%02xh, %04xh" % (r, address))
elif nibble[1] == 7:
print("JEE A, r%02xh, %04xh" % (r, address))
else:
b = nibble[1]&7
print("JBC r%02xh, %1d, %04xh" % (r, b, address))
elif nibble[0] == 6:
r = (nibble[2]<<4) | nibble[3]
b = nibble[1]&7
address = 0
if not (nibble[1]&8):
address_nibble = []
for _ in range(4):
address_nibble.append(ord(infile.read(1))&0xF)
address |= address_nibble[0]<<12
address |= address_nibble[1]<<8
address |= address_nibble[2]<<4
address |= address_nibble[3]
#print("(%01x%01x%01x%01x) " % (address_nibble[0], address_nibble[1],
# address_nibble[2], address_nibble[3]), end="")
print("JBS r%02xh, %1d, %04xh" % (r, b, address))
else:
print("BC r%02xh, %1d" % (r, b))
elif nibble[0] == 7:
r = (nibble[2]<<4) | nibble[3]
b = nibble[1]&7
if not (nibble[1]&8):
print("BS r%02xh, %1d" % (r, b))
else:
print("BTG r%02xh, %1d" % (r, b))
elif nibble[0]&14 == 8:
r = (nibble[2]<<4) | nibble[3]
p = ((nibble[0]&1)<<4) | nibble[1]
print("MOVRP p%02xh, r%02xh" % (p, r))
elif nibble[0]&14 == 10:
r = (nibble[2]<<4) | nibble[3]
p = ((nibble[0]&1)<<4) | nibble[1]
print("MOVPR r%02xh, p%02xh" % (r, p))
elif nibble[0]&14 == 12:
address = ((nibble[0]&1)<<12) | (nibble[1]<<8) | (nibble[2]<<4) | nibble[0]
print("SJMP %04xh" % address)
elif nibble[0]&14 == 14:
address = ((nibble[0]&1)<<12) | (nibble[1]<<8) | (nibble[2]<<4) | nibble[0]
print("SCALL %04xh" % address)
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