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January 13, 2018 10:23
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MSP430FR231x LPM3.5
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#include <msp430.h> | |
void initGpio(void); | |
int main(void) | |
{ | |
WDTCTL = WDTPW | WDTHOLD; // Stop WDT | |
initGpio(); // Configure GPIO | |
// Initialize XT1 32kHz crystal | |
P2SEL1 |= BIT6 | BIT7; // P2.6~P2.7: crystal pins | |
do | |
{ | |
CSCTL7 &= ~(XT1OFFG | DCOFFG); // Clear XT1 and DCO fault flag | |
SFRIFG1 &= ~OFIFG; | |
} while (SFRIFG1 & OFIFG); // Test oscillator fault flag | |
// First determine whether we are coming out of an LPMx.5 or a regular RESET. | |
if (SYSRSTIV == SYSRSTIV_LPM5WU) // When woken up from LPM3.5, reinit | |
{ | |
// If MCU wakes up from LPM3.5, re-init and then return to LPM3.5 again. | |
// Restore P1OUT value from backup RAM memory, keep P1OUT after LPMx.5 reset | |
P1OUT = *(unsigned int *)BKMEM_BASE; | |
__enable_interrupt(); // The RTC interrupt should trigger now... | |
} | |
else | |
{ | |
// Device powered up from a cold start. | |
// It configures the device and puts the device into LPM3.5 | |
// Configure backup memory | |
*(unsigned int *)BKMEM_BASE = 0; | |
// Configure RTC | |
// Interrupt and reset happen every 1024/32768 * 32 = 1 sec. | |
RTCMOD = (32)-1; | |
RTCCTL = RTCSS__XT1CLK | RTCSR |RTCPS__1024; | |
RTCCTL |= RTCIE; | |
// Store P1OUT value in backup memory register before enter LPM3.5 | |
*(unsigned int *)BKMEM_BASE = P1OUT; | |
} | |
// Enter LPM3.5 mode with interrupts enabled. Note that this operation does | |
// not return. The LPM3.5 will exit through a RESET event, resulting in a | |
// re-start of the code. | |
PMMCTL0_H = PMMPW_H; // Open PMM Registers for write | |
PMMCTL0_L |= PMMREGOFF; // and set PMMREGOFF | |
__bis_SR_register(LPM3_bits | GIE); | |
__no_operation(); | |
return 0; | |
} | |
void initGpio(void) | |
{ | |
P1DIR = 0xFF; P2DIR = 0xFF; | |
P1REN = 0xFF; P2REN = 0xFF; | |
P1OUT = 0x00; P2OUT = 0x00; | |
// Disable the GPIO power-on default high-impedance mode | |
// to activate previously configured port settings | |
PM5CTL0 &= ~LOCKLPM5; | |
} | |
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) | |
#pragma vector = RTC_VECTOR | |
__interrupt void RTC_ISR(void) | |
#elif defined(__GNUC__) | |
void __attribute__ ((interrupt(RTC_VECTOR))) RTC_ISR (void) | |
#else | |
#error Compiler not supported! | |
#endif | |
{ | |
switch(__even_in_range(RTCIV, RTCIV_RTCIF)) | |
{ | |
case RTCIV_NONE : break; // No interrupt pending | |
case RTCIV_RTCIF: // RTC Overflow | |
// Toggle P1.6 | |
P1OUT ^= BIT6; | |
// Store P1OUT value in backup memory register | |
*(unsigned int *)BKMEM_BASE = P1OUT; | |
break; | |
default: break; | |
} | |
} |
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