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gistfile1.txt
nested_struct_array_dynamic_index_fragment.shader_test - MESA_SHADER_VERTEX shader: 9 inst, 0 loops, 0:0 spills:fills
shader: MESA_SHADER_FRAGMENT
source_blake3: {0x902052f5, 0xa35b8bc9, 0x48a41bda, 0x3b8c92d3, 0x5a939f02, 0x704810c1, 0x5af66f4a, 0x917629a3}
name: GLSL1
label: nested_struct_array_dynamic_index_fragment.shader_test
next_stage: MESA_SHADER_FRAGMENT
inputs_read: 32
outputs_written: 2
subgroup_size: 1
bit_sizes_float: 0x20
bit_sizes_int: 0x21
flrp_lowered: true
inputs: 1
outputs: 1
uniforms: 9
decl_var uniform INTERP_MODE_NONE none mediump int ui_zero (0, 0, 0)
decl_var uniform INTERP_MODE_NONE none mediump int ui_one (1, 1, 0)
decl_var uniform INTERP_MODE_NONE none mediump int ui_two (2, 2, 0)
decl_var uniform INTERP_MODE_NONE none mediump float uf_two (3, 3, 0)
decl_var uniform INTERP_MODE_NONE none mediump float uf_three (4, 4, 0)
decl_var uniform INTERP_MODE_NONE none mediump float uf_four (5, 5, 0)
decl_var uniform INTERP_MODE_NONE none mediump float uf_half (6, 6, 0)
decl_var uniform INTERP_MODE_NONE none mediump float uf_third (7, 7, 0)
decl_var uniform INTERP_MODE_NONE none mediump float uf_fourth (8, 8, 0)
decl_var shader_in INTERP_MODE_SMOOTH none mediump vec4 VARYING_SLOT_VAR0 (VARYING_SLOT_VAR0.xyzw, 0, 0)
decl_var shader_out INTERP_MODE_NONE none mediump vec4 gl_FragColor (FRAG_RESULT_COLOR.xyzw, 0, 0)
decl_function main () (entrypoint)
impl main {
block b0: // preds:
32 %119 = @decl_reg (num_components=4, num_array_elems=0, bit_size=32, divergent=1)
32 %112 = @decl_reg (num_components=4, num_array_elems=0, bit_size=32, divergent=1)
32 %110 = @decl_reg (num_components=2, num_array_elems=0, bit_size=32, divergent=0)
32 %108 = @decl_reg (num_components=2, num_array_elems=0, bit_size=32, divergent=0)
32 %236 = load_const (0x00000000)
32 %154 = @load_uniform (%236 (0x0)) (base=1, range=1, dest_type=int32) // ui_one
32x2 %287 = load_const (0xbf800000, 0x3f800000) = (-1.000000, 1.000000)
32x2 %12 = fadd %154.xx, %287 (-1.000000, 1.000000)
32 %235 = load_const (0x00000000)
32 %153 = @load_uniform (%235 (0x0)) (base=1, range=1, dest_type=int32) // ui_one
32x2 %288 = load_const (0x3f800000, 0x40000000) = (1.000000, 2.000000)
32x2 %14 = slt %153.xx, %288 (1.000000, 2.000000)
32 %15 = mov %14.x
32x3 %294 = load_const (0x3f800000, 0x3f800000, 0x40000000) = (1.000000, 1.000000, 2.000000)
32x3 %17 = slt %12.xyy, %294 (1.000000, 1.000000, 2.000000)
32 %268 = load_const (0x00000000)
32x4 %202 = @load_input (%268 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x4 %18 = fcsel %17.xxxx, %202, %202.zwxy
32 %269 = load_const (0x00000000)
32x4 %207 = @load_input (%269 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x4 %113 = fcsel %17.xxxx, %207.xxxx, %207.yyyy
@store_reg (%113, %112) (base=0, wrmask=x, legacy_fsat=0)
32 %270 = load_const (0x00000000)
32x4 %208 = @load_input (%270 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x4 %114 = fcsel %17.xxxx, %208.zzzz, %208.wwww
@store_reg (%114, %112) (base=0, wrmask=y, legacy_fsat=0)
32 %271 = load_const (0x00000000)
32x4 %209 = @load_input (%271 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x4 %115 = fcsel %17.zzzz, %209.xxxx, %209.yyyy
@store_reg (%115, %112) (base=0, wrmask=z, legacy_fsat=0)
32 %272 = load_const (0x00000000)
32x4 %210 = @load_input (%272 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x4 %116 = fcsel %17.zzzz, %210.yyyy, %210.wwww
@store_reg (%116, %112) (base=0, wrmask=w, legacy_fsat=0)
32x4 %117 = @load_reg (%112) (base=0, legacy_fabs=0, legacy_fneg=0)
32x2 %25 = fcsel %14.yy, %18.zw, %117.xy
32x2 %26 = fcsel %14.xx, %18.xy, %25
32 %234 = load_const (0x00000000)
32 %135 = @load_uniform (%234 (0x0)) (base=0, range=1, dest_type=int32) // ui_zero
32 %225 = load_const (0x3f800000 = 1.000000)
32 %27 = fadd %135, %225 (1.000000)
// succs: b1 b2
if %15 {
block b1: // preds: b0
32 %296 = load_const (0x00000000)
32 %161 = @load_uniform (%296 (0x0)) (base=2, range=1, dest_type=int32) // ui_two
32x2 %297 = load_const (0x3f800000, 0x40000000) = (1.000000, 2.000000)
32x2 %29 = slt %161.xx, %297 (1.000000, 2.000000)
32 %298 = load_const (0x3f800000 = 1.000000)
32 %30 = slt %27, %298 (1.000000)
32 %299 = load_const (0x00000000)
32x4 %211 = @load_input (%299 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x4 %31 = fcsel %30.xxxx, %211, %211.zwxy
32 %300 = load_const (0x00000000)
32x4 %212 = @load_input (%300 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x2 %32 = fcsel %30.xx, %212.xz, %212.yw
32x2 %33 = fcsel %29.yy, %31.zw, %32
32x2 %34 = fcsel %29.xx, %31.xy, %33
@store_reg (%34, %110) (base=0, wrmask=xy, legacy_fsat=0)
// succs: b3
} else {
block b2: // preds: b0
32 %301 = load_const (0x00000000)
32 %162 = @load_uniform (%301 (0x0)) (base=2, range=1, dest_type=int32) // ui_two
32x2 %302 = load_const (0x3f800000, 0x40000000) = (1.000000, 2.000000)
32x2 %35 = slt %162.xx, %302 (1.000000, 2.000000)
32 %303 = load_const (0x3f800000 = 1.000000)
32 %36 = slt %27, %303 (1.000000)
32 %304 = load_const (0x00000000)
32x4 %213 = @load_input (%304 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x4 %37 = fcsel %36.xxxx, %213.xxzz, %213.yyww
32 %305 = load_const (0x00000000)
32x4 %214 = @load_input (%305 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x2 %38 = fcsel %36.xx, %214.yx, %214.wz
32x2 %39 = fcsel %35.yy, %37.zw, %38
32x2 %40 = fcsel %35.xx, %37.xy, %39
@store_reg (%40, %110) (base=0, wrmask=xy, legacy_fsat=0)
// succs: b3
}
block b3: // preds: b1 b2
32x2 %111 = @load_reg (%110) (base=0, legacy_fabs=0, legacy_fneg=0)
32 %42 = fadd %26.x, %111.y
32 %306 = load_const (0x00000000)
32 %163 = @load_uniform (%306 (0x0)) (base=6, range=1, dest_type=float32) // uf_half
32x4 %120 = fmul %42.xxxx, %163.xxxx
@store_reg (%120, %119) (base=0, wrmask=x, legacy_fsat=0)
32 %308 = load_const (0x00000000)
32 %164 = @load_uniform (%308 (0x0)) (base=2, range=1, dest_type=int32) // ui_two
32x2 %307 = load_const (0xc0000000, 0xbf800000) = (-2.000000, -1.000000)
32x2 %45 = fadd %164.xx, %307 (-2.000000, -1.000000)
32x4 %309 = load_const (0x3f800000, 0x3f800000, 0x40000000, 0x3f800000) = (1.000000, 1.000000, 2.000000, 1.000000)
32x4 %47 = slt %45.yxxx, %309 (1.000000, 1.000000, 2.000000, 1.000000)
32 %48 = mov %47.x
// succs: b4 b5
if %48 {
block b4: // preds: b3
32 %310 = load_const (0x00000000)
32 %165 = @load_uniform (%310 (0x0)) (base=0, range=1, dest_type=int32) // ui_zero
32 %311 = load_const (0x3f800000 = 1.000000)
32 %49 = slt %165, %311 (1.000000)
32 %312 = load_const (0x00000000)
32x4 %215 = @load_input (%312 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x4 %50 = fcsel %49.xxxx, %215, %215.zwxy
32 %313 = load_const (0x00000000)
32x4 %216 = @load_input (%313 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x2 %51 = fcsel %49.xx, %216.xz, %216.yw
32x2 %52 = fcsel %47.zz, %50.zw, %51
32x2 %53 = fcsel %47.yy, %50.xy, %52
@store_reg (%53, %108) (base=0, wrmask=xy, legacy_fsat=0)
// succs: b6
} else {
block b5: // preds: b3
32 %314 = load_const (0x00000000)
32 %166 = @load_uniform (%314 (0x0)) (base=0, range=1, dest_type=int32) // ui_zero
32 %315 = load_const (0x3f800000 = 1.000000)
32 %54 = slt %166, %315 (1.000000)
32 %316 = load_const (0x00000000)
32x4 %217 = @load_input (%316 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x4 %55 = fcsel %54.xxxx, %217.xxzz, %217.yyww
32 %317 = load_const (0x40000000 = 2.000000)
32 %56 = slt %45.x, %317 (2.000000)
32 %318 = load_const (0x00000000)
32x4 %218 = @load_input (%318 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x2 %57 = fcsel %54.xx, %218.yx, %218.wz
32x2 %58 = fcsel %56.xx, %55.zw, %57
32x2 %59 = fcsel %47.ww, %55.xy, %58
@store_reg (%59, %108) (base=0, wrmask=xy, legacy_fsat=0)
// succs: b6
}
block b6: // preds: b4 b5
32 %319 = load_const (0x00000000)
32 %167 = @load_uniform (%319 (0x0)) (base=2, range=1, dest_type=int32) // ui_two
32x2 %320 = load_const (0x3f800000, 0x40000000) = (1.000000, 2.000000)
32x2 %61 = slt %167.xx, %320 (1.000000, 2.000000)
32 %321 = load_const (0x00000000)
32 %168 = @load_uniform (%321 (0x0)) (base=7, range=1, dest_type=float32) // uf_third
32 %322 = load_const (0x00000000)
32 %169 = @load_uniform (%322 (0x0)) (base=8, range=1, dest_type=float32) // uf_fourth
32 %62 = fcsel %61.y, %168, %169
32 %323 = load_const (0x00000000)
32 %170 = @load_uniform (%323 (0x0)) (base=6, range=1, dest_type=float32) // uf_half
32 %63 = fcsel %61.x, %170, %62
32x2 %109 = @load_reg (%108) (base=0, legacy_fabs=0, legacy_fneg=0)
32 %64 = fmul %109.y, %63
32 %324 = load_const (0x00000000)
32 %171 = @load_uniform (%324 (0x0)) (base=8, range=1, dest_type=float32) // uf_fourth
32 %325 = load_const (0x00000000)
32 %172 = @load_uniform (%325 (0x0)) (base=5, range=1, dest_type=float32) // uf_four
32 %65 = fcsel %14.x, %171, %172
32x4 %121 = fmul %64.xxxx, %65.xxxx
@store_reg (%121, %119) (base=0, wrmask=y, legacy_fsat=0)
32 %326 = load_const (0x00000000)
32 %173 = @load_uniform (%326 (0x0)) (base=0, range=1, dest_type=int32) // ui_zero
32 %327 = load_const (0x3f800000 = 1.000000)
32 %67 = slt %173, %327 (1.000000)
32x4 %118 = @load_reg (%112) (base=0, legacy_fabs=0, legacy_fneg=0)
32 %328 = load_const (0x00000000)
32x4 %219 = @load_input (%328 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x2 %68 = fcsel %17.yy, %219.zw, %118.zw
32 %329 = load_const (0x00000000)
32x4 %220 = @load_input (%329 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x2 %69 = fcsel %17.zz, %220.ww, %220.wz
32 %330 = load_const (0x00000000)
32x4 %221 = @load_input (%330 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x2 %70 = fcsel %17.yy, %221.yy, %69
32x2 %71 = fcsel %67.xx, %68, %70
32 %331 = load_const (0x00000000)
32 %174 = @load_uniform (%331 (0x0)) (base=1, range=1, dest_type=int32) // ui_one
32 %72 = fmul %174, %174
32x2 %332 = load_const (0x3f800000, 0x40000000) = (1.000000, 2.000000)
32x2 %73 = slt %72.xx, %332 (1.000000, 2.000000)
32 %333 = load_const (0x00000000)
32x4 %222 = @load_input (%333 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x2 %74 = fcsel %73.yy, %222.zw, %222.xz
32 %334 = load_const (0x00000000)
32x4 %223 = @load_input (%334 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32x2 %75 = fcsel %73.xx, %223.xy, %74
32 %76 = fadd %71.y, %75.y
32 %335 = load_const (0x00000000)
32x4 %224 = @load_input (%335 (0x0)) (base=0, range=1, component=0, dest_type=float32, io location=VARYING_SLOT_VAR0 slots=1 mediump) // VARYING_SLOT_VAR0
32 %77 = fcsel %14.x, %224.x, %224.w
32 %78 = fadd %76, %77
32 %336 = load_const (0x00000000)
32 %175 = @load_uniform (%336 (0x0)) (base=1, range=1, dest_type=int32) // ui_one
32 %125 = fneg %175
32 %337 = load_const (0x00000000)
32 %176 = @load_uniform (%337 (0x0)) (base=2, range=1, dest_type=int32) // ui_two
32 %80 = fadd %176, %125
32x2 %338 = load_const (0x3f800000, 0x40000000) = (1.000000, 2.000000)
32x2 %81 = slt %80.xx, %338 (1.000000, 2.000000)
32 %339 = load_const (0x00000000)
32 %177 = @load_uniform (%339 (0x0)) (base=7, range=1, dest_type=float32) // uf_third
32 %340 = load_const (0x00000000)
32 %178 = @load_uniform (%340 (0x0)) (base=8, range=1, dest_type=float32) // uf_fourth
32 %82 = fcsel %81.y, %177, %178
32 %341 = load_const (0x00000000)
32 %179 = @load_uniform (%341 (0x0)) (base=6, range=1, dest_type=float32) // uf_half
32 %83 = fcsel %81.x, %179, %82
32x4 %122 = fmul %78.xxxx, %83.xxxx
@store_reg (%122, %119) (base=0, wrmask=z, legacy_fsat=0)
32 %342 = load_const (0x00000000)
32 %180 = @load_uniform (%342 (0x0)) (base=0, range=1, dest_type=int32) // ui_zero
32 %343 = load_const (0x00000000)
32 %181 = @load_uniform (%343 (0x0)) (base=1, range=1, dest_type=int32) // ui_one
32 %85 = fcsel %67, %180, %181
32 %344 = load_const (0x00000000)
32 %182 = @load_uniform (%344 (0x0)) (base=0, range=1, dest_type=int32) // ui_zero
32 %126 = fneg %182
32 %345 = load_const (0x00000000)
32 %183 = @load_uniform (%345 (0x0)) (base=1, range=1, dest_type=int32) // ui_one
32 %88 = fadd %183, %126
32 %346 = load_const (0x3f800000 = 1.000000)
32 %89 = slt %88, %346 (1.000000)
32 %347 = load_const (0x00000000)
32 %184 = @load_uniform (%347 (0x0)) (base=4, range=1, dest_type=float32) // uf_three
32 %348 = load_const (0x00000000)
32 %185 = @load_uniform (%348 (0x0)) (base=5, range=1, dest_type=float32) // uf_four
32 %90 = fcsel %61.y, %184, %185
32 %349 = load_const (0x00000000)
32 %186 = @load_uniform (%349 (0x0)) (base=3, range=1, dest_type=float32) // uf_two
32 %91 = fcsel %61.x, %186, %90
32 %92 = fcsel %89, %63, %91
32 %93 = fadd %85, %92
32 %350 = load_const (0x00000000)
32 %187 = @load_uniform (%350 (0x0)) (base=0, range=1, dest_type=int32) // ui_zero
32 %351 = load_const (0x00000000)
32 %188 = @load_uniform (%351 (0x0)) (base=1, range=1, dest_type=int32) // ui_one
32 %94 = fadd %187, %188
32 %352 = load_const (0x3f800000 = 1.000000)
32 %95 = slt %94, %352 (1.000000)
32 %353 = load_const (0x00000000)
32 %189 = @load_uniform (%353 (0x0)) (base=4, range=1, dest_type=float32) // uf_three
32 %354 = load_const (0x00000000)
32 %190 = @load_uniform (%354 (0x0)) (base=5, range=1, dest_type=float32) // uf_four
32 %96 = fcsel %81.y, %189, %190
32 %355 = load_const (0x00000000)
32 %191 = @load_uniform (%355 (0x0)) (base=3, range=1, dest_type=float32) // uf_two
32 %97 = fcsel %81.x, %191, %96
32 %98 = fcsel %95, %83, %97
32 %99 = fneg %98
32x4 %123 = fadd %93.xxxx, %99.xxxx
@store_reg (%123, %119) (base=0, wrmask=w, legacy_fsat=0)
32x4 %124 = @load_reg (%119) (base=0, legacy_fabs=0, legacy_fneg=0)
32 %356 = load_const (0x00000000)
@store_output (%124, %356 (0x0)) (base=0, range=1, wrmask=xyzw, component=0, src_type=float32, io location=FRAG_RESULT_COLOR slots=1 mediump, xfb(), xfb2()) // gl_FragColor
// succs: b7
block b7:
}
========prog========
*** block 0, successors: 1 2
$0000.x = const (0.000000) // NIR: ssa236
$0004.x = const (0.000000) // NIR: ssa235
$0011.x = const (0.000000) // NIR: ssa268
$0014.x = const (0.000000) // NIR: ssa269
$0017.x = const (0.000000) // NIR: ssa270
$0020.x = const (0.000000) // NIR: ssa271
($0022) reg_112.z = select $0010.zzzz, $0021.xxxx, $0021.yyyy // NIR: reg112
$0010.xyz = lt $0003.xyyw, $0009 // NIR: ssa17
$0003.xy = add $0001.xxzw, $0002 // NIR: ssa12
$0001.x = ld_uni 1 // NIR: ssa154
$0002.xy = const (-1.000000, 1.000000) // NIR: ssa287
$0009.xyz = const (1.000000, 1.000000, 2.000000) // NIR: ssa294
$0021 = ld_var 0 // NIR: ssa209
$0023.x = const (0.000000) // NIR: ssa272
($0025) reg_112.w = select $0010.zzzz, $0024.yyyy, $0024.wwww // NIR: reg112
+ $0010.xyz = lt $0003.xyyw, $0009 // NIR: ssa17
$0024 = ld_var 0 // NIR: ssa210
$0028.xy = select $0007.xxxx, $0013, $0027 // NIR: ssa26
$0007.xy = lt $0005.xxzw, $0006 // NIR: ssa14
$0005.x = ld_uni 1 // NIR: ssa153
$0006.xy = const (1.000000, 2.000000) // NIR: ssa288
$0013 = select $0010.xxxx, $0012, $0012.zwxy // NIR: ssa18
+ $0010.xyz = lt $0003.xyyw, $0009 // NIR: ssa17
$0012 = ld_var 0 // NIR: ssa202
$0027.xy = select $0007.yyxx, $0013.zwzw, reg_112 // NIR: ssa25
+ $0007.xy = lt $0005.xxzw, $0006 // NIR: ssa14
+ $0013 = select $0010.xxxx, $0012, $0012.zwxy // NIR: ssa18
($0016) reg_112.x = select $0010.xxxx, $0015.xxxx, $0015.yyyy // NIR: reg112
+ $0010.xyz = lt $0003.xyyw, $0009 // NIR: ssa17
$0015 = ld_var 0 // NIR: ssa207
($0019) reg_112.y = select $0010.xxxx, $0018.zzzz, $0018.wwww // NIR: reg112
+ $0010.xyz = lt $0003.xyyw, $0009 // NIR: ssa17
$0018 = ld_var 0 // NIR: ssa208
$0029.x = const (0.000000) // NIR: ssa234
$0032.x = add $0030.xxxx, $0031.xxxx // NIR: ssa27
$0030.x = ld_uni 0 // NIR: ssa135
$0031.x = const (1.000000) // NIR: ssa225
branch if (!$0008.xxxx) block_2 // NIR: new
$0008.x = mov $0007.xxxx // NIR: ssa15
+ $0007.xy = lt $0005.xxzw, $0006 // NIR: ssa14
*** block 1, successors: 3
$0034.x = const (0.000000) // NIR: ssa296
$0040.x = const (0.000000) // NIR: ssa299
$0043.x = const (0.000000) // NIR: ssa300
($0047) reg_110.xy = select $0037.xxxx, $0042, $0046 // NIR: reg110
$0037.xy = lt $0035.xxzw, $0036 // NIR: ssa29
$0035.x = ld_uni 2 // NIR: ssa161
$0036.xy = const (1.000000, 2.000000) // NIR: ssa297
$0042 = select $0039.xxxx, $0041, $0041.zwxy // NIR: ssa31
$0039.x = lt $0032.xxxx, $0038.xxxx // NIR: ssa30
$0038.x = const (1.000000) // NIR: ssa298
$0041 = ld_var 0 // NIR: ssa211
$0046.xy = select $0037.yyxx, $0042.zwzw, $0045 // NIR: ssa33
+ $0037.xy = lt $0035.xxzw, $0036 // NIR: ssa29
+ $0042 = select $0039.xxxx, $0041, $0041.zwxy // NIR: ssa31
$0045.xy = select $0039.xxxx, $0044.xzzw, $0044.ywzw // NIR: ssa32
+ $0039.x = lt $0032.xxxx, $0038.xxxx // NIR: ssa30
$0044 = ld_var 0 // NIR: ssa212
branch block_3 // NIR: new
*** block 2, successors: 3
$0049.x = const (0.000000) // NIR: ssa301
$0055.x = const (0.000000) // NIR: ssa304
$0058.x = const (0.000000) // NIR: ssa305
($0062) reg_110.xy = select $0052.xxxx, $0057, $0061 // NIR: reg110
$0052.xy = lt $0050.xxzw, $0051 // NIR: ssa35
$0050.x = ld_uni 2 // NIR: ssa162
$0051.xy = const (1.000000, 2.000000) // NIR: ssa302
$0057 = select $0054.xxxx, $0056.xxzz, $0056.yyww // NIR: ssa37
$0054.x = lt $0032.xxxx, $0053.xxxx // NIR: ssa36
$0053.x = const (1.000000) // NIR: ssa303
$0056 = ld_var 0 // NIR: ssa213
$0061.xy = select $0052.yyxx, $0057.zwzw, $0060 // NIR: ssa39
+ $0052.xy = lt $0050.xxzw, $0051 // NIR: ssa35
+ $0057 = select $0054.xxxx, $0056.xxzz, $0056.yyww // NIR: ssa37
$0060.xy = select $0054.xxxx, $0059.yxzw, $0059.wzzw // NIR: ssa38
+ $0054.x = lt $0032.xxxx, $0053.xxxx // NIR: ssa36
$0059 = ld_var 0 // NIR: ssa214
*** block 3, successors: 4 5
$0065.x = const (0.000000) // NIR: ssa306
($0067) reg_119.x = mul $0064.xxxx, $0066.xxxx // NIR: reg119
$0064.x = add $0028.xxxx, reg_110.yxxx // NIR: ssa42
$0066.x = ld_uni 6 // NIR: ssa163
$0068.x = const (0.000000) // NIR: ssa308
branch if (!$0074.xxxx) block_5 // NIR: new
$0074.x = mov $0073.xxxx // NIR: ssa48
$0073 = lt $0071.yxxx, $0072 // NIR: ssa47
$0071.xy = add $0069.xxzw, $0070 // NIR: ssa45
$0069.x = ld_uni 2 // NIR: ssa164
$0070.xy = const (-2.000000, -1.000000) // NIR: ssa307
$0072 = const (1.000000, 1.000000, 2.000000, 1.000000) // NIR: ssa309
*** block 4, successors: 6
$0076.x = const (0.000000) // NIR: ssa310
$0080.x = const (0.000000) // NIR: ssa312
$0083.x = const (0.000000) // NIR: ssa313
($0087) reg_108.xy = select $0073.yyxx, $0082, $0086 // NIR: reg108
$0082 = select $0079.xxxx, $0081, $0081.zwxy // NIR: ssa50
$0079.x = lt $0077.xxxx, $0078.xxxx // NIR: ssa49
$0077.x = ld_uni 0 // NIR: ssa165
$0078.x = const (1.000000) // NIR: ssa311
$0081 = ld_var 0 // NIR: ssa215
$0086.xy = select $0073.zzxx, $0082.zwzw, $0085 // NIR: ssa52
+ $0082 = select $0079.xxxx, $0081, $0081.zwxy // NIR: ssa50
$0085.xy = select $0079.xxxx, $0084.xzzw, $0084.ywzw // NIR: ssa51
+ $0079.x = lt $0077.xxxx, $0078.xxxx // NIR: ssa49
$0084 = ld_var 0 // NIR: ssa216
branch block_6 // NIR: new
*** block 5, successors: 6
$0089.x = const (0.000000) // NIR: ssa314
$0093.x = const (0.000000) // NIR: ssa316
$0098.x = const (0.000000) // NIR: ssa318
($0102) reg_108.xy = select $0073.wwxx, $0095, $0101 // NIR: reg108
$0095 = select $0092.xxxx, $0094.xxzz, $0094.yyww // NIR: ssa55
$0092.x = lt $0090.xxxx, $0091.xxxx // NIR: ssa54
$0090.x = ld_uni 0 // NIR: ssa166
$0091.x = const (1.000000) // NIR: ssa315
$0094 = ld_var 0 // NIR: ssa217
$0101.xy = select $0097.xxxx, $0095.zwzw, $0100 // NIR: ssa58
$0097.x = lt $0071.xxxx, $0096.xxxx // NIR: ssa56
$0096.x = const (2.000000) // NIR: ssa317
+ $0095 = select $0092.xxxx, $0094.xxzz, $0094.yyww // NIR: ssa55
$0100.xy = select $0092.xxxx, $0099.yxzw, $0099.wzzw // NIR: ssa57
+ $0092.x = lt $0090.xxxx, $0091.xxxx // NIR: ssa54
$0099 = ld_var 0 // NIR: ssa218
*** block 6, stop
$0103.x = const (0.000000) // NIR: ssa319
$0107.x = const (0.000000) // NIR: ssa321
$0109.x = const (0.000000) // NIR: ssa322
$0112.x = const (0.000000) // NIR: ssa323
$0117.x = const (0.000000) // NIR: ssa324
$0119.x = const (0.000000) // NIR: ssa325
$0123.x = const (0.000000) // NIR: ssa326
$0128.x = const (0.000000) // NIR: ssa328
$0131.x = const (0.000000) // NIR: ssa329
$0134.x = const (0.000000) // NIR: ssa330
$0138.x = const (0.000000) // NIR: ssa331
$0143.x = const (0.000000) // NIR: ssa333
$0146.x = const (0.000000) // NIR: ssa334
$0150.x = const (0.000000) // NIR: ssa335
$0154.x = const (0.000000) // NIR: ssa336
$0157.x = const (0.000000) // NIR: ssa337
$0162.x = const (0.000000) // NIR: ssa339
$0164.x = const (0.000000) // NIR: ssa340
$0167.x = const (0.000000) // NIR: ssa341
$0171.x = const (0.000000) // NIR: ssa342
$0173.x = const (0.000000) // NIR: ssa343
$0176.x = const (0.000000) // NIR: ssa344
$0179.x = const (0.000000) // NIR: ssa345
$0184.x = const (0.000000) // NIR: ssa347
$0186.x = const (0.000000) // NIR: ssa348
$0189.x = const (0.000000) // NIR: ssa349
$0194.x = const (0.000000) // NIR: ssa350
$0196.x = const (0.000000) // NIR: ssa351
$0201.x = const (0.000000) // NIR: ssa353
$0203.x = const (0.000000) // NIR: ssa354
$0206.x = const (0.000000) // NIR: ssa355
$0213.x = const (0.000000) // NIR: ssa356
$0214 = mov reg_119 // NIR: new
($0122) reg_119.y = mul $0116.xxxx, $0121.xxxx // NIR: reg119
$0116.x = mul reg_108.yxxx, $0114.xxxx // NIR: ssa64
$0114.x = select $0106.xxxx, $0113.xxxx, $0111.xxxx // NIR: ssa63
$0106.xy = lt $0104.xxzw, $0105 // NIR: ssa61
$0104.x = ld_uni 2 // NIR: ssa167
$0105.xy = const (1.000000, 2.000000) // NIR: ssa320
$0113.x = ld_uni 6 // NIR: ssa170
$0111.x = select $0106.yxxx, $0108, $0110 // NIR: ssa62
+ $0106.xy = lt $0104.xxzw, $0105 // NIR: ssa61
$0108.x = ld_uni 7 // NIR: ssa168
$0110.x = ld_uni 8 // NIR: ssa169
$0121.x = select $0007.xxxx, $0118, $0120 // NIR: ssa65
$0118.x = ld_uni 8 // NIR: ssa171
$0120.x = ld_uni 5 // NIR: ssa172
($0170) reg_119.z = mul $0153.xxxx, $0169.xxxx // NIR: reg119
$0153.x = add $0149.xxxx, $0152.xxxx // NIR: ssa78
$0149.x = add $0137.yxxx, $0148.yxxx // NIR: ssa76
$0137.xy = select $0126.xxxx, $0130, $0136 // NIR: ssa71
$0126.x = lt $0124.xxxx, $0125.xxxx // NIR: ssa67
$0124.x = ld_uni 0 // NIR: ssa173
$0125.x = const (1.000000) // NIR: ssa327
$0130.xy = select $0010.yyxx, $0129.zwzw, reg_112.zwzw // NIR: ssa68
$0129 = ld_var 0 // NIR: ssa219
$0136.xy = select $0010.yyxx, $0135.yyzw, $0133 // NIR: ssa70
$0135 = ld_var 0 // NIR: ssa221
$0133.xy = select $0010.zzxx, $0132.wwzw, $0132.wzzw // NIR: ssa69
$0132 = ld_var 0 // NIR: ssa220
$0148.xy = select $0142.xxxx, $0147, $0145 // NIR: ssa75
$0142.xy = lt $0140.xxzw, $0141 // NIR: ssa73
$0140.x = mul $0139.xxxx, $0139.xxxx // NIR: ssa72
$0139.x = ld_uni 1 // NIR: ssa174
$0141.xy = const (1.000000, 2.000000) // NIR: ssa332
$0147 = ld_var 0 // NIR: ssa223
$0145.xy = select $0142.yyxx, $0144.zwzw, $0144.xzzw // NIR: ssa74
+ $0142.xy = lt $0140.xxzw, $0141 // NIR: ssa73
$0144 = ld_var 0 // NIR: ssa222
$0152.x = select $0007.xxxx, $0151, $0151.wyzw // NIR: ssa77
$0151 = ld_var 0 // NIR: ssa224
$0169.x = select $0161.xxxx, $0168.xxxx, $0166.xxxx // NIR: ssa83
$0161.xy = lt $0159.xxzw, $0160 // NIR: ssa81
$0159.x = add $0158.xxxx, $0156 // NIR: ssa80
$0158.x = ld_uni 2 // NIR: ssa176
$0156.x = neg $0155.xxxx // NIR: ssa125
$0155.x = ld_uni 1 // NIR: ssa175
$0160.xy = const (1.000000, 2.000000) // NIR: ssa338
$0168.x = ld_uni 6 // NIR: ssa179
$0166.x = select $0161.yxxx, $0163, $0165 // NIR: ssa82
+ $0161.xy = lt $0159.xxzw, $0160 // NIR: ssa81
$0163.x = ld_uni 7 // NIR: ssa177
$0165.x = ld_uni 8 // NIR: ssa178
($0211) reg_119.w = add $0193.xxxx, $0210.xxxx // NIR: reg119
$0193.x = add $0175.xxxx, $0192.xxxx // NIR: ssa93
$0175.x = select $0126.xxxx, $0172, $0174 // NIR: ssa85
+ $0126.x = lt $0124.xxxx, $0125.xxxx // NIR: ssa67
$0172.x = ld_uni 0 // NIR: ssa180
$0174.x = ld_uni 1 // NIR: ssa181
$0192.x = select $0183.xxxx, $0114, $0191 // NIR: ssa92
$0183.x = lt $0181.xxxx, $0182.xxxx // NIR: ssa89
$0181.x = add $0180.xxxx, $0178 // NIR: ssa88
$0180.x = ld_uni 1 // NIR: ssa183
$0178.x = neg $0177.xxxx // NIR: ssa126
$0177.x = ld_uni 0 // NIR: ssa182
$0182.x = const (1.000000) // NIR: ssa346
+ $0114.x = select $0106.xxxx, $0113.xxxx, $0111.xxxx // NIR: ssa63
$0191.x = select $0106.xxxx, $0190.xxxx, $0188.xxxx // NIR: ssa91
+ $0106.xy = lt $0104.xxzw, $0105 // NIR: ssa61
$0190.x = ld_uni 3 // NIR: ssa186
$0188.x = select $0106.yxxx, $0185, $0187 // NIR: ssa90
+ $0106.xy = lt $0104.xxzw, $0105 // NIR: ssa61
$0185.x = ld_uni 4 // NIR: ssa184
$0187.x = ld_uni 5 // NIR: ssa185
$0210.x = neg $0209.xxxx // NIR: ssa99
$0209.x = select $0200.xxxx, $0169, $0208 // NIR: ssa98
$0200.x = lt $0198.xxxx, $0199.xxxx // NIR: ssa95
$0198.x = add $0195.xxxx, $0197.xxxx // NIR: ssa94
$0195.x = ld_uni 0 // NIR: ssa187
$0197.x = ld_uni 1 // NIR: ssa188
$0199.x = const (1.000000) // NIR: ssa352
+ $0169.x = select $0161.xxxx, $0168.xxxx, $0166.xxxx // NIR: ssa83
$0208.x = select $0161.xxxx, $0207.xxxx, $0205.xxxx // NIR: ssa97
+ $0161.xy = lt $0159.xxzw, $0160 // NIR: ssa81
$0207.x = ld_uni 3 // NIR: ssa191
$0205.x = select $0161.yxxx, $0202, $0204 // NIR: ssa96
+ $0161.xy = lt $0159.xxzw, $0160 // NIR: ssa81
$0202.x = ld_uni 4 // NIR: ssa189
$0204.x = ld_uni 5 // NIR: ssa190
====================
ppir_lower_prog()
ppir_add_order_deps()
ppir_add_write_after_read_deps()
========prog========
*** block 0, successors: 1 2
branch if ($0008.xxxx == ^const0 ($0222).xxxx) block_2 // NIR: new
$0008.x = mov $0007.xxxx // NIR: ssa15
$0007.xy = gt ^const0 ($0006), ^uniform ($0005).xxzw // NIR: ssa14
($0005) ^uniform = ld_uni 1 // NIR: ssa153
($0006) ^const0 = const (1.000000, 2.000000) // NIR: ssa288
($0222) ^const0 = const (0.000000) // NIR: new
$0032.x = add ^uniform ($0030).xxxx, ^const0 ($0031).xxxx // NIR: ssa27
($0030) ^uniform = ld_uni 0 // NIR: ssa135
($0031) ^const0 = const (1.000000) // NIR: ssa225
$0028.xy = select ^fmul ($0221).xxxx, $0013, $0027 // NIR: ssa26
($0221) ^fmul = mov $0007.xxxx // NIR: new
+ $0007.xy = gt ^const0 ($0006), ^uniform ($0005).xxzw // NIR: ssa14
$0013 = select ^fmul ($0215).xxxx, $0012, $0012.zwxy // NIR: ssa18
($0215) ^fmul = mov $0010.xxxx // NIR: new
$0010.xyz = gt ^const0 ($0009), $0003.xyyw // NIR: ssa17
$0003.xy = add ^uniform ($0001).xxzw, ^const0 ($0002) // NIR: ssa12
($0001) ^uniform = ld_uni 1 // NIR: ssa154
($0002) ^const0 = const (-1.000000, 1.000000) // NIR: ssa287
($0009) ^const0 = const (1.000000, 1.000000, 2.000000) // NIR: ssa294
$0012 = ld_var 0 // NIR: ssa202
$0027.xy = select ^fmul ($0220).yyxx, $0013.zwzw, reg_112 // NIR: ssa25
($0220) ^fmul = mov $0007.yxxx // NIR: new
+ $0007.xy = gt ^const0 ($0006), ^uniform ($0005).xxzw // NIR: ssa14
+ $0013 = select ^fmul ($0215).xxxx, $0012, $0012.zwxy // NIR: ssa18
($0016) reg_112.x = select ^fmul ($0216).xxxx, $0015.xxxx, $0015.yyyy // NIR: reg112
($0216) ^fmul = mov $0010.xxxx // NIR: new
+ $0010.xyz = gt ^const0 ($0009), $0003.xyyw // NIR: ssa17
$0015 = ld_var 0 // NIR: ssa207
($0019) reg_112.y = select ^fmul ($0217).xxxx, $0018.zzzz, $0018.wwww // NIR: reg112
($0217) ^fmul = mov $0010.xxxx // NIR: new
+ $0010.xyz = gt ^const0 ($0009), $0003.xyyw // NIR: ssa17
$0018 = ld_var 0 // NIR: ssa208
($0025) reg_112.w = select ^fmul ($0219).zzzz, $0024.yyyy, $0024.wwww // NIR: reg112
($0219) ^fmul = mov $0010.zxxx // NIR: new
+ $0010.xyz = gt ^const0 ($0009), $0003.xyyw // NIR: ssa17
$0024 = ld_var 0 // NIR: ssa210
($0022) reg_112.z = select ^fmul ($0218).zzzz, $0021.xxxx, $0021.yyyy // NIR: reg112
($0218) ^fmul = mov $0010.zxxx // NIR: new
+ $0010.xyz = gt ^const0 ($0009), $0003.xyyw // NIR: ssa17
$0021 = ld_var 0 // NIR: ssa209
*** block 1, successors: 3
branch block_3 // NIR: new
($0047) reg_110.xy = select ^fmul ($0226).xxxx, $0042, $0046 // NIR: reg110
($0226) ^fmul = mov $0037.xxxx // NIR: new
$0037.xy = gt ^const0 ($0036), ^uniform ($0035).xxzw // NIR: ssa29
($0035) ^uniform = ld_uni 2 // NIR: ssa161
($0036) ^const0 = const (1.000000, 2.000000) // NIR: ssa297
$0042 = select ^fmul ($0223).xxxx, $0041, $0041.zwxy // NIR: ssa31
($0223) ^fmul = mov $0039.xxxx // NIR: new
$0039.x = gt ^const0 ($0038).xxxx, $0032.xxxx // NIR: ssa30
($0038) ^const0 = const (1.000000) // NIR: ssa298
$0041 = ld_var 0 // NIR: ssa211
$0046.xy = select ^fmul ($0225).yyxx, $0042.zwzw, $0045 // NIR: ssa33
($0225) ^fmul = mov $0037.yxxx // NIR: new
+ $0037.xy = gt ^const0 ($0036), ^uniform ($0035).xxzw // NIR: ssa29
+ $0042 = select ^fmul ($0223).xxxx, $0041, $0041.zwxy // NIR: ssa31
$0045.xy = select ^fmul ($0224).xxxx, $0044.xzzw, $0044.ywzw // NIR: ssa32
($0224) ^fmul = mov $0039.xxxx // NIR: new
+ $0039.x = gt ^const0 ($0038).xxxx, $0032.xxxx // NIR: ssa30
$0044 = ld_var 0 // NIR: ssa212
*** block 2, successors: 3
($0062) reg_110.xy = select ^fmul ($0230).xxxx, $0057, $0061 // NIR: reg110
($0230) ^fmul = mov $0052.xxxx // NIR: new
$0052.xy = gt ^const0 ($0051), ^uniform ($0050).xxzw // NIR: ssa35
($0050) ^uniform = ld_uni 2 // NIR: ssa162
($0051) ^const0 = const (1.000000, 2.000000) // NIR: ssa302
$0057 = select ^fmul ($0227).xxxx, $0056.xxzz, $0056.yyww // NIR: ssa37
($0227) ^fmul = mov $0054.xxxx // NIR: new
$0054.x = gt ^const0 ($0053).xxxx, $0032.xxxx // NIR: ssa36
($0053) ^const0 = const (1.000000) // NIR: ssa303
$0056 = ld_var 0 // NIR: ssa213
$0061.xy = select ^fmul ($0229).yyxx, $0057.zwzw, $0060 // NIR: ssa39
($0229) ^fmul = mov $0052.yxxx // NIR: new
+ $0052.xy = gt ^const0 ($0051), ^uniform ($0050).xxzw // NIR: ssa35
+ $0057 = select ^fmul ($0227).xxxx, $0056.xxzz, $0056.yyww // NIR: ssa37
$0060.xy = select ^fmul ($0228).xxxx, $0059.yxzw, $0059.wzzw // NIR: ssa38
($0228) ^fmul = mov $0054.xxxx // NIR: new
+ $0054.x = gt ^const0 ($0053).xxxx, $0032.xxxx // NIR: ssa36
$0059 = ld_var 0 // NIR: ssa214
*** block 3, successors: 4 5
branch if ($0074.xxxx == ^const0 ($0231).xxxx) block_5 // NIR: new
$0074.x = mov $0073.xxxx // NIR: ssa48
$0073 = gt ^const0 ($0072), $0071.yxxx // NIR: ssa47
$0071.xy = add ^uniform ($0069).xxzw, ^const0 ($0070) // NIR: ssa45
($0069) ^uniform = ld_uni 2 // NIR: ssa164
($0070) ^const0 = const (-2.000000, -1.000000) // NIR: ssa307
($0072) ^const0 = const (1.000000, 1.000000, 2.000000, 1.000000) // NIR: ssa309
($0231) ^const0 = const (0.000000) // NIR: new
($0067) reg_119.x = mul $0064.xxxx, ^uniform ($0066).xxxx // NIR: reg119
$0064.x = add $0028.xxxx, reg_110.yxxx // NIR: ssa42
($0066) ^uniform = ld_uni 6 // NIR: ssa163
*** block 4, successors: 6
branch block_6 // NIR: new
($0087) reg_108.xy = select ^fmul ($0235).yyxx, $0082, $0086 // NIR: reg108
$0082 = select ^fmul ($0232).xxxx, $0081, $0081.zwxy // NIR: ssa50
($0232) ^fmul = mov $0079.xxxx // NIR: new
$0079.x = gt ^const0 ($0078).xxxx, ^uniform ($0077).xxxx // NIR: ssa49
($0077) ^uniform = ld_uni 0 // NIR: ssa165
($0078) ^const0 = const (1.000000) // NIR: ssa311
$0081 = ld_var 0 // NIR: ssa215
$0086.xy = select ^fmul ($0234).zzxx, $0082.zwzw, $0085 // NIR: ssa52
+ $0082 = select ^fmul ($0232).xxxx, $0081, $0081.zwxy // NIR: ssa50
$0085.xy = select ^fmul ($0233).xxxx, $0084.xzzw, $0084.ywzw // NIR: ssa51
($0233) ^fmul = mov $0079.xxxx // NIR: new
+ $0079.x = gt ^const0 ($0078).xxxx, ^uniform ($0077).xxxx // NIR: ssa49
$0084 = ld_var 0 // NIR: ssa216
($0234) ^fmul = mov $0073.zxxx // NIR: new
($0235) ^fmul = mov $0073.yxxx // NIR: new
*** block 5, successors: 6
($0102) reg_108.xy = select ^fmul ($0238).wwxx, $0095, $0101 // NIR: reg108
$0095 = select ^fmul ($0236).xxxx, $0094.xxzz, $0094.yyww // NIR: ssa55
($0236) ^fmul = mov $0092.xxxx // NIR: new
$0092.x = gt ^const0 ($0091).xxxx, ^uniform ($0090).xxxx // NIR: ssa54
($0090) ^uniform = ld_uni 0 // NIR: ssa166
($0091) ^const0 = const (1.000000) // NIR: ssa315
$0094 = ld_var 0 // NIR: ssa217
$0101.xy = select ^fmul ($0097).xxxx, $0095.zwzw, $0100 // NIR: ssa58
($0097) ^fmul = gt ^const0 ($0096).xxxx, $0071.xxxx // NIR: ssa56
($0096) ^const0 = const (2.000000) // NIR: ssa317
+ $0095 = select ^fmul ($0236).xxxx, $0094.xxzz, $0094.yyww // NIR: ssa55
$0100.xy = select ^fmul ($0237).xxxx, $0099.yxzw, $0099.wzzw // NIR: ssa57
($0237) ^fmul = mov $0092.xxxx // NIR: new
+ $0092.x = gt ^const0 ($0091).xxxx, ^uniform ($0090).xxxx // NIR: ssa54
$0099 = ld_var 0 // NIR: ssa218
($0238) ^fmul = mov $0073.wxxx // NIR: new
*** block 6, stop
($0122) reg_119.y = mul $0116.xxxx, $0121.xxxx // NIR: reg119
$0116.x = mul reg_108.yxxx, $0114.xxxx // NIR: ssa64
$0114.x = select ^fmul ($0240).xxxx, ^uniform ($0113).xxxx, $0111.xxxx // NIR: ssa63
($0240) ^fmul = mov $0106.xxxx // NIR: new
$0106.xy = gt ^const0 ($0105), ^uniform ($0104).xxzw // NIR: ssa61
($0104) ^uniform = ld_uni 2 // NIR: ssa167
($0105) ^const0 = const (1.000000, 2.000000) // NIR: ssa320
($0113) ^uniform = ld_uni 6 // NIR: ssa170
$0111.x = select ^fmul ($0239).yxxx, ^uniform ($0108), ^uniform ($0110) // NIR: ssa62
($0239) ^fmul = mov $0106.yxxx // NIR: new
+ $0106.xy = gt ^const0 ($0105), ^uniform ($0104).xxzw // NIR: ssa61
($0108) ^uniform = ld_uni 7 // NIR: ssa168
($0110) ^uniform = ld_uni 8 // NIR: ssa169
$0121.x = select ^fmul ($0241).xxxx, ^uniform ($0118), ^uniform ($0120) // NIR: ssa65
($0118) ^uniform = ld_uni 8 // NIR: ssa171
($0120) ^uniform = ld_uni 5 // NIR: ssa172
($0241) ^fmul = mov $0007.xxxx // NIR: new
($0170) reg_119.z = mul $0153.xxxx, $0169.xxxx // NIR: reg119
$0153.x = add $0149.xxxx, $0152.xxxx // NIR: ssa78
$0149.x = add $0137.yxxx, $0148.yxxx // NIR: ssa76
$0137.xy = select ^fmul ($0245).xxxx, $0130, $0136 // NIR: ssa71
($0245) ^fmul = mov $0126.xxxx // NIR: new
$0126.x = gt ^const0 ($0125).xxxx, ^uniform ($0124).xxxx // NIR: ssa67
($0124) ^uniform = ld_uni 0 // NIR: ssa173
($0125) ^const0 = const (1.000000) // NIR: ssa327
$0130.xy = select ^fmul ($0242).yyxx, $0129.zwzw, reg_112.zwzw // NIR: ssa68
$0129 = ld_var 0 // NIR: ssa219
($0242) ^fmul = mov $0010.yxxx // NIR: new
$0136.xy = select ^fmul ($0244).yyxx, $0135.yyzw, $0133 // NIR: ssa70
$0135 = ld_var 0 // NIR: ssa221
$0133.xy = select ^fmul ($0243).zzxx, $0132.wwzw, $0132.wzzw // NIR: ssa69
$0132 = ld_var 0 // NIR: ssa220
($0243) ^fmul = mov $0010.zxxx // NIR: new
($0244) ^fmul = mov $0010.yxxx // NIR: new
$0148.xy = select ^fmul ($0247).xxxx, $0147, $0145 // NIR: ssa75
($0247) ^fmul = mov $0142.xxxx // NIR: new
$0142.xy = gt ^const0 ($0141), $0140.xxzw // NIR: ssa73
$0140.x = mul ^uniform ($0139).xxxx, ^uniform ($0139).xxxx // NIR: ssa72
($0139) ^uniform = ld_uni 1 // NIR: ssa174
($0141) ^const0 = const (1.000000, 2.000000) // NIR: ssa332
$0147 = ld_var 0 // NIR: ssa223
$0145.xy = select ^fmul ($0246).yyxx, $0144.zwzw, $0144.xzzw // NIR: ssa74
($0246) ^fmul = mov $0142.yxxx // NIR: new
+ $0142.xy = gt ^const0 ($0141), $0140.xxzw // NIR: ssa73
$0144 = ld_var 0 // NIR: ssa222
$0152.x = select ^fmul ($0248).xxxx, $0151, $0151.wyzw // NIR: ssa77
$0151 = ld_var 0 // NIR: ssa224
($0248) ^fmul = mov $0007.xxxx // NIR: new
$0169.x = select ^fmul ($0250).xxxx, ^uniform ($0168).xxxx, $0166.xxxx // NIR: ssa83
($0250) ^fmul = mov $0161.xxxx // NIR: new
$0161.xy = gt ^const0 ($0160), $0159.xxzw // NIR: ssa81
$0159.x = add ^uniform ($0158).xxxx, -^uniform ($0155).xxxx // NIR: ssa80
($0158) ^uniform = ld_uni 2 // NIR: ssa176
($0155) ^uniform = ld_uni 1 // NIR: ssa175
($0160) ^const0 = const (1.000000, 2.000000) // NIR: ssa338
($0168) ^uniform = ld_uni 6 // NIR: ssa179
$0166.x = select ^fmul ($0249).yxxx, ^uniform ($0163), ^uniform ($0165) // NIR: ssa82
($0249) ^fmul = mov $0161.yxxx // NIR: new
+ $0161.xy = gt ^const0 ($0160), $0159.xxzw // NIR: ssa81
($0163) ^uniform = ld_uni 7 // NIR: ssa177
($0165) ^uniform = ld_uni 8 // NIR: ssa178
($0211) reg_119.w = add $0193.xxxx, -$0209.xxxx // NIR: reg119
$0193.x = add $0175.xxxx, $0192.xxxx // NIR: ssa93
$0175.x = select ^fmul ($0251).xxxx, ^uniform ($0172), ^uniform ($0174) // NIR: ssa85
($0251) ^fmul = mov $0126.xxxx // NIR: new
+ $0126.x = gt ^const0 ($0125).xxxx, ^uniform ($0124).xxxx // NIR: ssa67
($0172) ^uniform = ld_uni 0 // NIR: ssa180
($0174) ^uniform = ld_uni 1 // NIR: ssa181
$0192.x = select ^fmul ($0183).xxxx, $0114, $0191 // NIR: ssa92
($0183) ^fmul = gt ^const0 ($0182).xxxx, $0181.xxxx // NIR: ssa89
$0181.x = add ^uniform ($0180).xxxx, -^uniform ($0177).xxxx // NIR: ssa88
($0180) ^uniform = ld_uni 1 // NIR: ssa183
($0177) ^uniform = ld_uni 0 // NIR: ssa182
($0182) ^const0 = const (1.000000) // NIR: ssa346
+ $0114.x = select ^fmul ($0240).xxxx, ^uniform ($0113).xxxx, $0111.xxxx // NIR: ssa63
$0191.x = select ^fmul ($0253).xxxx, ^uniform ($0190).xxxx, $0188.xxxx // NIR: ssa91
($0253) ^fmul = mov $0106.xxxx // NIR: new
+ $0106.xy = gt ^const0 ($0105), ^uniform ($0104).xxzw // NIR: ssa61
($0190) ^uniform = ld_uni 3 // NIR: ssa186
$0188.x = select ^fmul ($0252).yxxx, ^uniform ($0185), ^uniform ($0187) // NIR: ssa90
($0252) ^fmul = mov $0106.yxxx // NIR: new
+ $0106.xy = gt ^const0 ($0105), ^uniform ($0104).xxzw // NIR: ssa61
($0185) ^uniform = ld_uni 4 // NIR: ssa184
($0187) ^uniform = ld_uni 5 // NIR: ssa185
$0209.x = select ^fmul ($0200).xxxx, $0169, $0208 // NIR: ssa98
($0200) ^fmul = gt ^const0 ($0199).xxxx, $0198.xxxx // NIR: ssa95
$0198.x = add ^uniform ($0195).xxxx, ^uniform ($0197).xxxx // NIR: ssa94
($0195) ^uniform = ld_uni 0 // NIR: ssa187
($0197) ^uniform = ld_uni 1 // NIR: ssa188
($0199) ^const0 = const (1.000000) // NIR: ssa352
+ $0169.x = select ^fmul ($0250).xxxx, ^uniform ($0168).xxxx, $0166.xxxx // NIR: ssa83
$0208.x = select ^fmul ($0255).xxxx, ^uniform ($0207).xxxx, $0205.xxxx // NIR: ssa97
($0255) ^fmul = mov $0161.xxxx // NIR: new
+ $0161.xy = gt ^const0 ($0160), $0159.xxzw // NIR: ssa81
($0207) ^uniform = ld_uni 3 // NIR: ssa191
$0205.x = select ^fmul ($0254).yxxx, ^uniform ($0202), ^uniform ($0204) // NIR: ssa96
($0254) ^fmul = mov $0161.yxxx // NIR: new
+ $0161.xy = gt ^const0 ($0160), $0159.xxzw // NIR: ssa81
($0202) ^uniform = ld_uni 4 // NIR: ssa189
($0204) ^uniform = ld_uni 5 // NIR: ssa190
====================
ppir: node_to_instr create move 256 for load 120
ppir: node_to_instr create move 257 for load 174
ppir: node_to_instr create move 258 for load 197
ppir: node_to_instr create move 259 for load 177
ppir: node_to_instr create move 260 for load 165
ppir: node_to_instr create move 261 for load 204
ppir: node_to_instr create move 262 for load 110
ppir: node_to_instr create move 263 for load 187
ppir: node_to_instr create move 264 for load 155
======ppir instr list======
vary texl unif vmul smul vadd sadd comb stor brch const0|1
-------block 0-------
000: null null null null null null 8 null null 33 0.000000 |
001: null null 30 null null null 32 null null null 1.000000 |
002: null null null null 221 28 null null null null |
003: 24 null null null 219 null 25 null null null |
004: 21 null null null 218 null 22 null null null |
005: null null null null 220 27 null null null null |
006: 12 null null null 215 13 null null null null |
007: 15 null null null 216 null 16 null null null |
008: 18 null null null 217 null 19 null null null |
009: null null 5 7 null null null null null null 1.000000 2.000000 |
010: null null null 10 null null null null null null 1.000000 2.000000 |
011: null null 1 null null 3 null null null null -1.000000 1.000000 |
-------block 1-------
012: null null null null 226 47 null null null 48 |
013: null null null null 225 46 null null null null |
014: 41 null null null 223 42 null null null null |
015: 44 null null null 224 45 null null null null |
016: null null 35 37 null null null null null null 1.000000 2.000000 |
017: null null null null 39 null null null null null 1.000000 |
-------block 2-------
018: null null null null 230 62 null null null null |
019: null null null null 229 61 null null null null |
020: 56 null null null 227 57 null null null null |
021: 59 null null null 228 60 null null null null |
022: null null 50 52 null null null null null null 1.000000 2.000000 |
023: null null null null 54 null null null null null 1.000000 |
-------block 3-------
024: null null null null null null 74 null null 75 0.000000 |
025: null null 66 null null null 64 67 null null |
026: null null null 73 null null null null null null 1.000000 2.000000 |
027: null null 69 null null 71 null null null null -2.000000 -1.000000 |
-------block 4-------
028: null null null null 235 87 null null null 88 |
029: null null null null 234 86 null null null null |
030: 81 null null null 232 82 null null null null |
031: 84 null null null 233 85 null null null null |
032: null null 77 null 79 null null null null null 1.000000 |
-------block 5-------
033: null null null null 238 102 null null null null |
034: null null null null 97 101 null null null null 2.000000 |
035: 94 null null null 236 95 null null null null |
036: 99 null null null 237 100 null null null null |
037: null null 90 null 92 null null null null null 1.000000 |
-------block 6-------
038: null null null 170 116 null 211 122 null null |
039: null null 118 null 241 null 121 null null null |
040: null null 120 null null null 256 null null null |
041: null null null null null null 153 null null null |
042: null null null null null null 149 null null null |
043: 151 null null null 248 null 152 null null null |
044: null null null null 245 137 null null null null |
045: 147 null null null 247 148 null null null null |
046: 129 null null null 242 130 null null null null |
047: 135 null null null 244 136 null null null null |
048: 144 null null null 246 145 null null null null |
049: 132 null null null 243 133 null null null null |
050: null null null 142 null null null null null null 1.000000 2.000000 |
051: null null 139 null null null null 140 null null |
052: null null null null null null 193 null null null |
053: null null null null 200 null 209 null null null 1.000000 |
054: null null 172 null 251 null 175 null null null |
055: null null null null 183 null 192 null null null 1.000000 |
056: null null 168 null 250 null 169 null null null |
057: null null 207 null 255 null 208 null null null |
058: null null 195 null null null 198 null null null |
059: null null 124 null 126 null null null null null 1.000000 |
060: null null 113 null 240 null 114 null null null |
061: null null 190 null 253 null 191 null null null |
062: null null 180 null null null 181 null null null |
063: null null 163 null 249 null 166 null null null |
064: null null 202 null 254 null 205 null null null |
065: null null 108 null 239 null 111 null null null |
066: null null 185 null 252 null 188 null null null |
067: null null null 161 null null null null null null 1.000000 2.000000 |
068: null null 104 106 null null null null null null 1.000000 2.000000 |
069: null null 158 null null null 159 null null null |
070: null null 174 null null null 257 null null null |
071: null null 197 null null null 258 null null null |
072: null null 177 null null null 259 null null null |
073: null null 165 null null null 260 null null null |
074: null null 204 null null null 261 null null null |
075: null null 110 null null null 262 null null null |
076: null null 187 null null null 263 null null null |
077: null null 155 null null null 264 null null null |
===========================
======ppir instr depend======
-------block 0-------
[0[9][1][2[9][6[10[11]]][5[9][+6][7[+10]][8[+10]]]][3[+10]][4[+10]]]
-------block 1-------
[12[16][14[17]][13[16][+14][15[17]]]]
-------block 2-------
[18[22][20[23]][19[22][+20][21[23]]]]
-------block 3-------
[24[26[27]][25]]
-------block 4-------
[28[30[32]][29[+30][31[32]]]]
-------block 5-------
[33[35[37]][34[+35][36[37]]]]
-------block 6-------
[38[41[42[44[59][46][47[49]]][45[50[51]][48[+50]]]][43]][56[67[69[77]]][63[+67][73]]][60[68][65[68][75]]][52[54[59][70]][55[62[72]][+60][61[68][66[68][76]]]]][53[58[71]][+56][57[+67][64[+67][74]]]][39[40]]]
=============================
ppir: spilled register 0/93, num_components: 4
ppir: spilled register 1/93, num_components: 4
======ppir regalloc result======
011: (1|60|) (3|0|60 48)
010: (10|4|48 0)
006: (12|0|) (215|68|4) (13|12|68 0 0)
085: (277|60|) (278|8|60)
007: (15|0|) (216|68|4) (16|8|68 0 0) (279||8)
086: (280|60|) (281|8|60)
008: (18|0|) (217|68|4) (19|8|68 0 0) (282||8)
009: (5|60|) (7|2|48 60)
005: (289|60|) (220|68|2) (27|0|68 12 60)
002: (221|68|2) (28|0|68 12 0)
088: (286|60|) (287|8|60)
003: (24|12|) (219|68|4) (25|8|68 12 12) (288||8)
087: (283|60|) (284|8|60)
004: (21|12|) (218|68|4) (22|8|68 12 12) (285||8)
001: (30|60|) (32|8|60 48)
000: (8|7|2) (33||7 48)
017: (39|7|48 8)
014: (41|12|) (223|68|7) (42|8|68 12 12)
015: (44|12|) (224|68|7) (45|16|68 12 12)
016: (35|60|) (37|12|48 60)
013: (225|68|12) (46|14|68 8 16)
012: (226|68|12) (47|12|68 8 14) (48||)
023: (54|7|48 8)
020: (56|12|) (227|68|7) (57|8|68 12 12)
021: (59|12|) (228|68|7) (60|16|68 12 12)
022: (50|60|) (52|12|48 60)
019: (229|68|12) (61|14|68 8 16)
018: (230|68|12) (62|12|68 8 14)
078: (265|60|) (266|8|60)
025: (66|60|) (64|7|0 12) (67|8|7 60)
079: (267||8)
027: (69|60|) (71|0|60 48)
026: (73|8|48 0)
024: (74|7|8) (75||7 48)
032: (77|60|) (79|0|48 60)
030: (81|12|) (232|68|0) (82|16|68 12 12)
031: (84|12|) (233|68|0) (85|20|68 12 12)
029: (234|68|8) (86|0|68 16 20)
028: (235|68|8) (87|0|68 16 0) (88||)
037: (90|60|) (92|7|48 60)
035: (94|16|) (236|68|7) (95|12|68 16 16)
036: (99|20|) (237|68|7) (100|16|68 20 20)
034: (97|68|48 0) (101|0|68 12 16)
033: (238|68|8) (102|0|68 12 0)
068: (104|60|) (106|8|48 60)
075: (110|60|) (262|12|60)
065: (108|60|) (239|68|8) (111|7|68 60 12)
060: (113|60|) (240|68|8) (114|7|68 60 7)
076: (187|60|) (263|12|60)
066: (185|60|) (252|68|8) (188|10|68 60 12)
061: (190|60|) (253|68|8) (191|9|68 60 10)
072: (177|60|) (259|8|60)
062: (180|60|) (181|8|60 8)
055: (183|68|48 8) (192|9|68 7 9)
059: (124|60|) (126|15|48 60)
070: (174|60|) (257|8|60)
054: (172|60|) (251|68|15) (175|8|68 60 8)
052: (193|14|8 9)
046: (129|16|) (290|60|) (242|68|4) (130|8|68 16 60)
049: (132|16|) (243|68|4) (133|10|68 16 16)
047: (135|16|) (244|68|4) (136|12|68 16 10)
044: (245|68|15) (137|4|68 8 12)
051: (139|60|) (140|6|60 60)
050: (142|8|48 6)
048: (144|16|) (246|68|8) (145|10|68 16 16)
045: (147|16|) (247|68|8) (148|12|68 16 10)
042: (149|4|4 12)
043: (151|8|) (248|68|2) (152|5|68 8 8)
041: (153|5|4 5)
073: (165|60|) (260|8|60)
077: (155|60|) (264|4|60)
069: (158|60|) (159|4|60 4)
067: (161|9|48 4)
063: (163|60|) (249|68|9) (166|4|68 60 8)
056: (168|60|) (250|68|9) (169|6|68 60 4)
074: (204|60|) (261|4|60)
064: (202|60|) (254|68|9) (205|4|68 60 4)
057: (207|60|) (255|68|9) (208|8|68 60 4)
071: (197|60|) (258|4|60)
058: (195|60|) (198|4|60 4)
053: (200|68|48 4) (209|12|68 6 8)
040: (120|60|) (256|4|60)
039: (118|60|) (241|68|2) (121|3|68 60 4)
080: (268|60|) (269|8|60)
082: (271|60|) (272|8|60)
083: (274|60|) (275|8|60)
038: (170|8|5 6) (116|2|0 7) (211|8|14 12) (122|8|2 3) (273||8)
084: (276||8)
081: (270||8)
--------------------------
======ppir output regs======
OUTPUT_COLOR0: $2
--------------------------
========ppir codegen========
011 (@ 0): 022a1206 02000800 261c1e00 80000600 00078017 00000000
load.u 1, add.v1 $0.xy ^uniform.xxzw ^const0.xyxx, const0 -1.000000 1.000000 0.000000 0.000000
010 (@ 6): 022a0405 1350010c 01e00347 00000200 00000000
gt.v0 $1.xyz ^const0.xxyx $0.xyyw, const0 1.000000 2.000000 0.000000 0.000000
006 (@ 11): 02201885 f0003c60 f8000010 31380e40 000005cf
load.v $0 0, mov.s0 $1.x, sel.v1 $3 $0 $0.zwxy
085 (@ 16): 02301204 fc000803 001c9fff 000f9e40
load.t -2, mov.v1 $2 ^uniform
007 (@ 20): 0220a886 f0003c60 f8000010 ae480100 fe7e0441 000000ff
load.v $0 0, mov.s0 $1.x, sel.s1 $2.x $0.x $0.y, store.t -2 $2
086 (@ 26): 02301204 fc000803 001c9fff 000f9e40
load.t -2, mov.v1 $2 ^uniform
008 (@ 30): 0230a886 f0003c60 f8000010 ae490302 fe7e0441 000000ff
load.v $0 0, mov.s0 $1.x, sel.s1 $2.y $0.z $0.w, store.t -2 $2
009 (@ 36): 022a0606 02000800 07881800 c0069800 00040003 00000000
load.u 1, gt.v0 $0.zw ^const0.xxxy ^uniform.xxxx, const0 1.000000 2.000000 0.000000 0.000000
005 (@ 42): 02201a05 fc000803 000007ff c9e771fc 0002e181
load.t -2, mov.s0 $0.w, sel.v1 $0.xy $3.zwzw ^uniform
002 (@ 47): 02201804 fe000002 c0e40390 00000170
mov.s0 $0.z, sel.v1 $0.xy $3 $0
088 (@ 51): 02301204 fc000803 001c9fff 000f9e40
load.t -2, mov.v1 $2 ^uniform
003 (@ 55): 0220a886 f3003c60 f8000018 ae4b0f0d fe7e0441 000000ff
load.v $3 0, mov.s0 $1.z, sel.s1 $2.w $3.y $3.w, store.t -2 $2
087 (@ 61): 02301204 fc000803 001c9fff 000f9e40
load.t -2, mov.v1 $2 ^uniform
004 (@ 65): 0230a886 f3003c60 f8000018 ae4a0d0c fe7e0441 000000ff
load.v $3 0, mov.s0 $1.z, sel.s1 $2.z $3.x $3.y, store.t -2 $2
001 (@ 71): 023a2206 00000800 90607800 003c0000 00000000 00000000
load.u 0, add.s1 $2.x ^uniform.x ^const0.x, const0 1.000000 0.000000 0.000000 0.000000
000 (@ 77): 02232007 3e470002 00010f80 00002500 00000020 00000000
00000000
mov.s1 $1.w $0.z, branch.eq $1.w ^const0.x 114, const0 0.000000 0.000000 0.000000 0.000000
017 (@ 84): 022a0804 1a470830 00000f00 00000000
gt.s0 $1.w ^const0.x $2.x, const0 1.000000 0.000000 0.000000 0.000000
014 (@ 88): 02281885 f3003c60 f800001c 2138ce43 000005cf
load.v $3 0, mov.s0 $1.w, sel.v1 $2 $3 $3.zwxy
015 (@ 93): 02301885 f3003c60 f800001c 43b4ce83 000005c3
load.v $3 0, mov.s0 $1.w, sel.v1 $4.xy $3.xzzw $3.ywzw
016 (@ 98): 02220606 04000800 07809800 c0068667 00040003 00000000
load.u 2, gt.v0 $3.xy ^const0.xyxx ^uniform.xxzw, const0 1.000000 2.000000 0.000000 0.000000
013 (@ 104): 02301804 be00000d 0c404380 00000173
mov.s0 $3.y, sel.v1 $3.zw $2.xxzw $4.xxxy
012 (@ 108): 02211806 be00000c cc4e3390 1c000170 01100000 00010000
mov.s0 $3.x, sel.v1 $3.xy $2 $3.zwxy, branch 142
023 (@ 114): 022a0804 1a470830 00000f00 00000000
gt.s0 $1.w ^const0.x $2.x, const0 1.000000 0.000000 0.000000 0.000000
020 (@ 118): 02281885 f3003c60 f800001c 23d4ca03 000005cf
load.v $3 0, mov.s0 $1.w, sel.v1 $2 $3.xxzz $3.yyww
021 (@ 123): 02301885 f3003c60 f800001c 43acce13 000005c3
load.v $3 0, mov.s0 $1.w, sel.v1 $4.xy $3.yxzw $3.wzzw
022 (@ 128): 02220606 04000800 07809800 c0068667 00040003 00000000
load.u 2, gt.v0 $3.xy ^const0.xyxx ^uniform.xxzw, const0 1.000000 2.000000 0.000000 0.000000
019 (@ 134): 02201804 be00000d 0c404380 00000173
mov.s0 $3.y, sel.v1 $3.zw $2.xxzw $4.xxxy
018 (@ 138): 02201804 be00000c cc4e3390 00000170
mov.s0 $3.x, sel.v1 $3.xy $2 $3.zwxy
078 (@ 142): 02281204 fe000803 001c9fff 000f9e40
load.t -1, mov.v1 $2 ^uniform
025 (@ 146): 02186205 0c000800 8e1a0000 473c0300 00000008
load.u 6, add.s1 $1.w $0.x $3.y, mul.s2 $2.x $1.w ^uniform.xxxx
079 (@ 151): 02308003 fefc0883 000001ff
store.t -1 $2
027 (@ 154): 022a1206 04000800 261c1e00 00000600 00178018 00000000
load.u 2, add.v1 $0.xy ^uniform.xxzw ^const0.xyxx, const0 -2.000000 -1.000000 0.000000 0.000000
026 (@ 160): 023a0405 2004010c 01e0034f 00000200 00000000
gt.v0 $2 ^const0.xxyx $0.yxxx, const0 1.000000 2.000000 0.000000 0.000000
024 (@ 165): 02332007 3e470008 00010f80 00002100 00000030 00000000
00000000
mov.s1 $1.w $2.x, branch.eq $1.w ^const0.x 198, const0 0.000000 0.000000 0.000000 0.000000
032 (@ 172): 022a0a06 00000800 80786000 001e0034 00000000 00000000
load.u 0, gt.s0 $0.x ^const0.x ^uniform.x, const0 1.000000 0.000000 0.000000 0.000000
030 (@ 178): 02281885 f3003c60 f8000000 4138ce43 000005cf
load.v $3 0, mov.s0 $0.x, sel.v1 $4 $3 $3.zwxy
031 (@ 183): 02201885 f3003c60 f8000000 53b4ce83 000005c3
load.v $3 0, mov.s0 $0.x, sel.v1 $5.xy $3.xzzw $3.ywzw
029 (@ 188): 02301804 3e00000a c0e453b9 00000170
mov.s0 $2.z, sel.v1 $0.xy $4.zwzw $5
028 (@ 192): 02311806 3e000009 c0e40391 1c000170 01000000 00018000
mov.s0 $2.y, sel.v1 $0.xy $4 $0, branch 224
037 (@ 198): 022a0a06 00000800 8e786000 001e0034 00000000 00000000
load.u 0, gt.s0 $1.w ^const0.x ^uniform.x, const0 1.000000 0.000000 0.000000 0.000000
035 (@ 204): 02281885 f4003c60 f800001c 33d50a04 000005cf
load.v $4 0, mov.s0 $1.w, sel.v1 $3 $4.xxzz $4.yyww
036 (@ 209): 02301885 f5003c60 f800001c 43ad4e15 000005c3
load.v $5 0, mov.s0 $1.w, sel.v1 $4.xy $5.yxzw $5.wzzw
034 (@ 214): 02221806 da000030 c0e443b8 01000170 00000000 00000000
gt.s0 ^const0.x $0.x, sel.v1 $0.xy $3.zwzw $4, const0 2.000000 0.000000 0.000000 0.000000
033 (@ 220): 02301804 fe00000b c0e40390 00000170
mov.s0 $2.w, sel.v1 $0.xy $3 $0
068 (@ 224): 02220606 04000800 07809800 c0068647 00040003 00000000
load.u 2, gt.v0 $2.xy ^const0.xyxx ^uniform.xxzw, const0 1.000000 2.000000 0.000000 0.000000
075 (@ 230): 02282204 10000800 98007800 0000007c
load.u 8, mov.s1 $3.x ^uniform.x
065 (@ 234): 02282a05 0e000800 00001200 23861e7c 00000017
load.u 7, mov.s0 $2.y, sel.s1 $1.w ^uniform.x $3.x
060 (@ 239): 02202a05 0c000800 00001000 23839e7c 00000017
load.u 6, mov.s0 $2.x, sel.s1 $1.w ^uniform.x $1.w
076 (@ 244): 02282204 0a000800 98007800 0000007c
load.u 5, mov.s1 $3.x ^uniform.x
066 (@ 248): 02282a05 08000800 00001200 25061e7c 00000017
load.u 4, mov.s0 $2.y, sel.s1 $2.z ^uniform.x $3.x
061 (@ 253): 02202a05 06000800 00001000 24851e7c 00000017
load.u 3, mov.s0 $2.x, sel.s1 $2.y ^uniform.x $2.z
072 (@ 258): 02202204 00000800 90007800 0000007c
load.u 0, mov.s1 $2.x ^uniform.x
062 (@ 262): 02282204 02000800 91107800 00000000
load.u 1, add.s1 $2.x ^uniform.x -$2.x
055 (@ 266): 02322805 da000830 0b924241 00000780 00000000
gt.s0 ^const0.x $2.x, sel.s1 $2.y $1.w $2.y, const0 1.000000 0.000000 0.000000 0.000000
059 (@ 271): 02220a06 00000800 9e786000 001e0034 00000000 00000000
load.u 0, gt.s0 $3.w ^const0.x ^uniform.x, const0 1.000000 0.000000 0.000000 0.000000
070 (@ 277): 02282204 02000800 90007800 0000007c
load.u 1, mov.s1 $2.x ^uniform.x
054 (@ 281): 02102a05 00000800 00001e00 24041e7c 00000017
load.u 0, mov.s0 $3.w, sel.s1 $2.x ^uniform.x $2.x
052 (@ 286): 02302002 004e0908
add.s1 $3.z $2.x $2.y
046 (@ 288): 02281a86 f4003c60 f000200c 00002fff 779dc9f0 000b8647
load.v $4 0, load.t -2, mov.s0 $1.y, sel.v1 $2.xy $4.zwzw ^uniform.zwzw
049 (@ 294): 02281885 f4003c60 f8000018 22c10f04 000005cc
load.v $4 0, mov.s0 $1.z, sel.v1 $2.zw $4.xxww $4.xxwz
047 (@ 299): 02201885 f4003c60 f8000014 31388e54 000005c3
load.v $4 0, mov.s0 $1.y, sel.v1 $3.xy $4.yyzw $2.zwxy
044 (@ 304): 02201804 be00000f c4e43390 00000170
mov.s0 $3.w, sel.v1 $1.xy $2 $3
051 (@ 308): 02284204 02000800 78780600 0000000a
load.u 1, mul.s2 $1.z ^uniform.x ^uniform.xxxx
050 (@ 312): 022a0405 2128404c 01e00343 00000200 00000000
gt.v0 $2.xy ^const0.xyxx $1.zzxy, const0 1.000000 2.000000 0.000000 0.000000
048 (@ 317): 02281885 f4003c60 f8000024 22010e04 000005cc
load.v $4 0, mov.s0 $2.y, sel.v1 $2.zw $4.xxzw $4.xxxz
045 (@ 322): 02101885 f4003c60 f8000020 31388e44 000005c3
load.v $4 0, mov.s0 $2.x, sel.v1 $3.xy $4 $2.zwxy
042 (@ 327): 02202002 00440d05
add.s1 $1.x $1.y $3.y
043 (@ 329): 02102884 f2003c60 f8000008 2e450b08
load.v $2 0, mov.s0 $0.z, sel.s1 $1.y $2.x $2.w
041 (@ 333): 02202002 00450504
add.s1 $1.y $1.x $1.y
073 (@ 335): 02202204 10000800 90007800 0000007c
load.u 8, mov.s1 $2.x ^uniform.x
077 (@ 339): 02202204 02000800 88007800 0000007c
load.u 1, mov.s1 $1.x ^uniform.x
069 (@ 343): 02282204 04000800 89087800 00000000
load.u 2, add.s1 $1.x ^uniform.x -$1.x
067 (@ 347): 022a0405 2200410c 01e00346 00000200 00000000
gt.v0 $2.yz ^const0.xxyx $1.xxxz, const0 1.000000 2.000000 0.000000 0.000000
063 (@ 352): 02282a05 0e000800 00001400 22041e7c 00000017
load.u 7, mov.s0 $2.z, sel.s1 $1.x ^uniform.x $2.x
056 (@ 357): 02202a05 0c000800 00001200 23021e7c 00000017
load.u 6, mov.s0 $2.y, sel.s1 $1.z ^uniform.x $1.x
074 (@ 362): 02282204 0a000800 88007800 0000007c
load.u 5, mov.s1 $1.x ^uniform.x
064 (@ 366): 02282a05 08000800 00001400 22021e7c 00000017
load.u 4, mov.s0 $2.z, sel.s1 $1.x ^uniform.x $1.x
057 (@ 371): 02202a05 06000800 00001200 24021e7c 00000017
load.u 3, mov.s0 $2.y, sel.s1 $2.x ^uniform.x $1.x
071 (@ 376): 02202204 02000800 88007800 0000007c
load.u 1, mov.s1 $1.x ^uniform.x
058 (@ 380): 02282204 00000800 88087800 00000000
load.u 0, add.s1 $1.x ^uniform.x $1.x
053 (@ 384): 02222805 9a000430 0b930201 00000780 00000000
gt.s0 ^const0.x $1.x, sel.s1 $3.x $1.z $2.x, const0 1.000000 0.000000 0.000000 0.000000
040 (@ 389): 02282204 0a000800 88007800 0000007c
load.u 5, mov.s1 $1.x ^uniform.x
039 (@ 393): 02202a05 10000800 00000400 21821e7c 00000017
load.u 8, mov.s0 $0.z, sel.s1 $0.w ^uniform.x $1.x
080 (@ 398): 02201204 fe000803 001c9fff 000f9e40
load.t -1, mov.v1 $2 ^uniform
082 (@ 402): 02201204 fe000803 001c9fff 000f9e40
load.t -1, mov.v1 $2 ^uniform
083 (@ 406): 02381204 fe000803 001c9fff 000f9e40
load.t -1, mov.v1 $2 ^uniform
038 (@ 410): 0218ec07 22a84551 10380804 97181c02 8203ff00 bf0220c8
00007fff
mul.v0 $2.z $1.yyyy $1.zzzz, mul.s0 $0.z $0.y $1.w, add.s1 $2.w $3.z -$3.x, mul.s2 $2.y $0.z $0.wwww, store.t -1 $2
084 (@ 417): 02188003 fefc0883 000001ff
store.t -1 $2
081 (@ 420): 00008023 fefc0883 000001ff
store.t -1 $2, stop
-----------------------
nested_struct_array_dynamic_index_fragment.shader_test - MESA_SHADER_FRAGMENT shader: 89 inst, 0 loops, 8:10 spills:fills
Thread 0 took 0.25 seconds and compiled 2 shaders (not including SIMD16) with 1 GL context switches
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