device_def.c

/*
 * AT25SF081.hpp
 *
 *  Created on: Dec 3, 2015
 *  This is a header file that defines the SPI protocol for communicating with the AT25sf081-SSHD-B
 */

#ifndef AT25SF081_HPP_
#define AT25SF081_HPP_

//Opcodes
////Read
#define FASTEST_READ_ARRY 0x1B //3 ADDR, 2 DUMMY, 1+ DATA
#define FASTER_READ_ARRAY 0x0B //3 ADDR, 1 DUMMY, 1+ DATA
#define READ_ARRAY      0x03 //3 ADDR, 0 DUMMY, 1+ DATA

////Erase
//For Block erase commands, !CS must be deasserted after command.
//Status register can then be checked for 'Busy'
//Erase errors will be indicated in the EPE bit of the Status Register
#define BLOCK_ERASE_4K  0x20 //3 ADDR, 0 DUMMY, 0 DATA
#define BLOCK_ERASE_32K 0x52 //3 ADDR, 0 DUMMY, 0 DATA
#define BLOCK_ERASE_64K 0xD8 //3 ADDR, 0 DUMMY, 0 DATA
#define CHIP_ERASE      0x60 //0 ADDR, 0 DUMMY, 0 DATA //Both Commands are Interchangeable
#define CHIP_ERASE_ALT      0xC7 //0 ADDR, 0 DUMMY, 0 DATA //Both Commands are Interchangeable

////Write_Protect
//Write enable / disable must be followed by !CS deassertion
#define WRITE_ENABLE    0x06 //0 ADDR, 0 DUMMY, 0 DATA
#define WRITE_DISABLE   0x04 //0 ADDR, 0 DUMMY, 0 DATA

////Byte / Page Program
#define PROGRAM    0x02 //3 ADDR, 0 DUMMY, 1+ DATA.  Data must be erased before programming.  ADDR must be 256 byte boundary
                                                   //After programming check the Status register for 'Busy'
                                                   //Programming errors will be indicated in EPE bit of Status Register

////Sector Protect
#define PROTECT_SECTOR 0x36 //3 ADDR, 0 DUMMY, 0 DATA
#define UNPROTECT_SECTOR 0x39 //3 ADDR, 0 DUMMY, 0 DATA
#define READ_SECTOR_PROTECT 0x3C //3 ADDR, 0 DUMMY, 1 DATA

#define SECTOR_LOCKDOWN 0x33 //3 ADDR, 0 DUMMY, 1 DATA
#define FREEZE_SECTOR_LOCKDOWN_STATE 0x34//3 ADDR, 0 DUMMY, 1 DATA
#define READ_SECTOR_LOCKDOWN 0x35//3 ADDR, 0 DUMMY, 1 DATA

////Status Register
#define READ_SR   0x05 //0 ADDR, 0 DUMMY, 1 DATA
#define READ_ID    0x9F

#define WRITE_SR1   0x01 //0 ADDR, 0 DUMMY, 1 DATA
#define WRITE_SR2   0x31 //0 ADDR, 0 DUMMY, 1 DATA
//#define WRITE_SR_VOLATILE 0x50
////Power-Down
#define DEEP_POWER_DOWN 0xB9 //0 ADDR, 0 DUMMY, 0 DATA
#define RESUME_FROM_DEEP_POWER_DOWN 0xAB //0 ADDR, 0 DUMMY, 0 DATA

////Reset
#define RESET 0xF0 //0 ADDR, 0 DUMMY, 1 DATA

//Data Types
typedef union {
  U8 data[6];
  struct {
    U32 opcode  :  8;
    U32 address : 24;
    U32 reserved : 16;
  };
}FlashCommand;



#endif /* AT25SF081_HPP_ */