SBAir3 device tree

/dts-v1/;

/ {
	#address-cells = <0x1>;
	#size-cells = <0x1>;
	model = "HISILICON HI6950 board based on udp";
	compatible = "hisilicon,hi6950";
	interrupt-parent = <0x1>;

	testcase-data {

		phandle-tests {

			provider0 {
				#phandle-cells = <0x0>;
				linux,phandle = <0x5>;
				phandle = <0x5>;
			};

			provider1 {
				#phandle-cells = <0x1>;
				linux,phandle = <0x2>;
				phandle = <0x2>;
			};

			provider2 {
				#phandle-cells = <0x2>;
				linux,phandle = <0x3>;
				phandle = <0x3>;
			};

			provider3 {
				#phandle-cells = <0x3>;
				linux,phandle = <0x4>;
				phandle = <0x4>;
			};

			consumer-a {
				phandle-list = <0x2 0x1 0x3 0x2 0x0 0x0 0x4 0x4 0x4 0x3 0x3 0x5 0x64 0x5 0x2 0x7>;
				phandle-list-names = "first", "second", "third";
				phandle-list-bad-phandle = <0xbc614e 0x0 0x0>;
				phandle-list-bad-args = <0x3 0x1 0x0 0x4 0x0>;
				empty-property;
				unterminated-string = <0x40414243>;
			};
		};
	};

	clocks@0 {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;
		status_reg_offset = <0xc>;

		clk@0 {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0xfdad680>;
			clock-output-names = "apb_pclk";
			linux,phandle = <0x2b>;
			phandle = <0x2b>;
		};

		tcxo {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x124f800>;
			clock-output-names = "tcxo";
			linux,phandle = <0x9>;
			phandle = <0x9>;
		};

		sleep {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x8000>;
			clock-output-names = "sleep";
		};

		ahb {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x7270e00>;
			clock-output-names = "ahb";
			linux,phandle = <0x7>;
			phandle = <0x7>;
		};

		ahb2apb {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x7270e00>;
			clock-output-names = "ahb2apb";
			linux,phandle = <0x6>;
			phandle = <0x6>;
		};

		axi2apb {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x7ed6b40>;
			clock-output-names = "axi2apb";
			linux,phandle = <0xb>;
			phandle = <0xb>;
		};

		axi2ahb {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0xfdad680>;
			clock-output-names = "axi2ahb";
			linux,phandle = <0xd>;
			phandle = <0xd>;
		};

		peri_24m {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x16e3600>;
			clock-output-names = "peri_24m";
		};

		sys_sleep_1hz {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x1>;
			clock-output-names = "sys_sleep_1hz";
			linux,phandle = <0x8>;
			phandle = <0x8>;
		};

		peri_48m {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x2dc6c00>;
			clock-output-names = "peri_48m";
			linux,phandle = <0xc>;
			phandle = <0xc>;
		};

		peri_64m {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x3d09000>;
			clock-output-names = "peri_64m";
			linux,phandle = <0xe>;
			phandle = <0xe>;
		};

		abb_wpll {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0xea60fa0>;
			clock-output-names = "abb_wpll";
		};

		peripll_foutpost {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = "98p";
			clock-output-names = "peripll_foutpost";
			linux,phandle = <0xf>;
			phandle = <0xf>;
		};

		hifi_pll {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x2ee00000>;
			clock-output-names = "hifi_pll";
			linux,phandle = <0x12>;
			phandle = <0x12>;
		};

		sio_zsi_clk {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x2ed9688>;
			clock-output-names = "sio_zsi_clk";
			linux,phandle = <0x21>;
			phandle = <0x21>;
		};

		dsp_pll {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x2faf0800>;
			clock-output-names = "dsp_pll";
		};

		gmac_positive_clk {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x7735940>;
			clock-output-names = "gmac_positive_clk";
			linux,phandle = <0x22>;
			phandle = <0x22>;
		};

		gmac_negative_clk {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x7735940>;
			clock-output-names = "gmac_negative_clk";
			linux,phandle = <0x23>;
			phandle = <0x23>;
		};

		ao_crg@20000000 {
			compatible = "hisilicon,clk-ao-crg";
			reg = <0x20000000 0x1000>;
			status = "ok";

			bc_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x80000000>;
				clock-output-names = "usb_bc_clk";
				linux,phandle = <0x47>;
				phandle = <0x47>;
			};

			bbpon_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x40000000>;
				clock-output-names = "bbpon_clk";
			};

			gpio1_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x20000000>;
				clock-output-names = "gpio1_clk";
			};

			ao_dbg_pclk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x8000000>;
				clock-output-names = "ao_dbg_pclk";
			};

			bootrom_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x7>;
				hisilicon,hisi-clkgate = <0x0 0x4000000>;
				clock-output-names = "bootrom_clk";
			};

			ios_ao_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x2000000>;
				clock-output-names = "ios_ao_clk";
			};

			rtc_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x8>;
				hisilicon,hisi-clkgate = <0x0 0x1000000>;
				clock-output-names = "rtc_clk";
			};

			tm7_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x4000>;
				clock-output-names = "tm7_clk";
			};

			tm6_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x2000>;
				clock-output-names = "tm6_clk";
			};

			tm5_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x1000>;
				clock-output-names = "tm5_clk";
			};

			tm4_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x800>;
				clock-output-names = "tm4_clk";
			};

			tm3_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x400>;
				clock-output-names = "tm3_clk";
			};

			tm2_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x200>;
				clock-output-names = "tm2_clk";
			};

			tm1_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x100>;
				clock-output-names = "tm1_clk";
			};

			tm0_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x80>;
				clock-output-names = "tm0_clk";
			};

			efuse_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x20>;
				clock-output-names = "efuse_clk";
			};

			watchdog_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x10>;
				clock-output-names = "watchdog_clk";
			};

			gpio0_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x6>;
				hisilicon,hisi-clkgate = <0x0 0x1>;
				clock-output-names = "gpio0_clk";
			};
		};

		pd_crg@90000000 {
			compatible = "hisilicon,clk-pd-crg";
			reg = <0x90000000 0x1000>;
			status = "ok";

			usb_pll {
				compatible = "hisilicon,pll_ctrl_by_ap";
				#clock-cells = <0x0>;
				clocks = <0x9>;
				clock-frequency = <0x1dcd6500>;
				usb_pll_mask = <0x3e00 0x2c>;
				usb_pll_ctrl = <0x244 0x0 0x9 0x1f>;
				clock-output-names = "usb_pll";
				linux,phandle = <0xa>;
				phandle = <0xa>;
			};

			usbpll_125m {
				compatible = "fixed-factor-clock";
				#clock-cells = <0x0>;
				clocks = <0xa>;
				clock-div = <0x4>;
				clock-mult = <0x1>;
				clock-output-names = "usbpll_125m";
				linux,phandle = <0x27>;
				phandle = <0x27>;
			};

			usbpll_100m {
				compatible = "fixed-factor-clock";
				#clock-cells = <0x0>;
				clocks = <0xa>;
				clock-div = <0x5>;
				clock-mult = <0x1>;
				clock-output-names = "usbpll_100m";
				linux,phandle = <0x11>;
				phandle = <0x11>;
			};

			rsa_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x0 0x80000000>;
				clock-output-names = "rsa_clk";
			};

			gpio3_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x0 0x40000000>;
				clock-output-names = "gpio3_clk";
			};

			i2c0_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xc>;
				hisilicon,hisi-clkgate = <0x0 0x20000000>;
				clock-output-names = "i2c0_clk";
			};

			i2c1_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xc>;
				hisilicon,hisi-clkgate = <0x0 0x8000000>;
				clock-output-names = "i2c1_clk";
			};

			dw_ssi1_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xc>;
				hisilicon,hisi-clkgate = <0x0 0x4000000>;
				clock-output-names = "dw_ssi1_clk";
			};

			ipcm_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				hisilicon,hisi-clkgate = <0x0 0x2000000>;
				clock-output-names = "ipcm_clk";
			};

			pwm0_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x0 0x800000>;
				clock-output-names = "pwm0_clk";
			};

			pwm1_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x0 0x400000>;
				clock-output-names = "pwm1_clk";
			};

			ios_pd_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x0 0x200000>;
				clock-output-names = "ios_pd_clk";
			};

			edmac_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				hisilicon,hisi-clkgate = <0x0 0x100000>;
				clock-output-names = "edmac_clk";
			};

			emi_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				hisilicon,hisi-clkgate = <0x0 0x80000>;
				clock-output-names = "emi_clk";
			};

			hs_uart_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xe>;
				hisilicon,hisi-clkgate = <0x0 0x40000>;
				clock-output-names = "hs_uart_clk";
			};

			nandc_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				no_pm_log;
				hisilicon,hisi-clkgate = <0x0 0x20000>;
				clock-output-names = "nandc_clk";
			};

			rsracc_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				hisilicon,hisi-clkgate = <0x0 0x10000>;
				clock-output-names = "rsracc_clk";
			};

			dw_ssi0_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xc>;
				hisilicon,hisi-clkgate = <0x0 0x8000>;
				clock-output-names = "dw_ssi0_clk";
			};

			pmussi1_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x0 0x4000>;
				clock-output-names = "pmussi1_clk";
			};

			pmussi0_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x0 0x2000>;
				clock-output-names = "pmussi0_clk";
			};

			hkadcssi_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x0 0x1000>;
				clock-output-names = "hkadcssi_clk";
			};

			clk_gate_socp {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				hisilicon,hisi-clkgate = <0x0 0x800>;
				clock-output-names = "socp_clk";
			};

			ipf_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				hisilicon,hisi-clkgate = <0x0 0x100>;
				clock-output-names = "ipf_clk";
			};

			psam_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				hisilicon,hisi-clkgate = <0x0 0x80>;
				clock-output-names = "psam_aclk";
			};

			spe_div {
				compatible = "hisilicon,hisi-clk-div";
				#clock-cells = <0x0>;
				clocks = <0xf>;
				hisilicon,clkdiv-table = <0xf 0x3 0x0>;
				hisilicon,clkdiv = <0x108 0xf0000000>;
				clock-output-names = "spe_div";
				linux,phandle = <0x10>;
				phandle = <0x10>;
			};

			spe_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x10>;
				hisilicon,hisi-clkgate = <0x0 0x40>;
				clock-output-names = "spe_clk";
				linux,phandle = <0x4a>;
				phandle = <0x4a>;
			};

			pcie1_phy_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x11>;
				hisilicon,hisi-clkgate = <0x10 0x40000000>;
				clock-output-names = "pcie1_phy_clk";
			};

			pcie0_phy_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x11>;
				hisilicon,hisi-clkgate = <0x10 0x20000000>;
				clock-output-names = "pcie0_phy_clk";
			};

			pcie0_ctrl_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				hisilicon,hisi-clkgate = <0x10 0x18000000>;
				clock-output-names = "pcie0_ctrl_clk";
			};

			sysctrl_pcie_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x10 0x4000000>;
				clock-output-names = "sysctrl_pcie_clk";
			};

			sdcc_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				hisilicon,hisi-clkgate = <0x10 0x1000000>;
				clock-output-names = "sdcc_clk";
			};

			clk_mux_mmc1_refclk {
				compatible = "hisilicon,hisi-clk-mux";
				#clock-cells = <0x0>;
				clocks = <0xf 0x12>;
				hisilicon,clkmux-reg = <0x108 0x20000>;
				clock-output-names = "mux_mmc1_refclk";
				linux,phandle = <0x13>;
				phandle = <0x13>;
			};

			clk_gate_mmc1_refclk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x13>;
				hisilicon,hisi-clkgate = <0x10 0x400000>;
				clock-output-names = "mmc1_refclk";
				linux,phandle = <0x14>;
				phandle = <0x14>;
			};

			clk_div_mmc1_phase {
				compatible = "hisilicon,hisi-clk-div";
				#clock-cells = <0x0>;
				clocks = <0x14>;
				hisilicon,clkdiv-table = <0x8 0x1 0x1>;
				hisilicon,clkdiv = <0x108 0x700000>;
				en_ref_before_set_div;
				clock-output-names = "mmc1_phase_div_clk";
				linux,phandle = <0x15>;
				phandle = <0x15>;
			};

			clk_gate_mmc1_phase {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x15>;
				hisilicon,hisi-clkgate = <0x10 0x100000>;
				clock-output-names = "mmc1_phase_clk";
				linux,phandle = <0x41>;
				phandle = <0x41>;
			};

			clk_div_mmc1 {
				compatible = "hisilicon,hisi-clk-div";
				#clock-cells = <0x0>;
				clocks = <0x15>;
				hisilicon,clkdiv-table = <0x20 0x1 0x1>;
				hisilicon,clkdiv = <0x108 0x1f000>;
				en_ref_before_set_div;
				clock-output-names = "mmc1_div_clk";
				linux,phandle = <0x16>;
				phandle = <0x16>;
			};

			clk_gate_mmc1 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x16>;
				hisilicon,hisi-clkgate = <0x10 0x40000>;
				clock-output-names = "mmc1_clk";
				linux,phandle = <0x42>;
				phandle = <0x42>;
			};

			clk_mux_mmc0_refclk {
				compatible = "hisilicon,hisi-clk-mux";
				#clock-cells = <0x0>;
				clocks = <0xf 0x12>;
				hisilicon,clkmux-reg = <0x108 0x20>;
				clock-output-names = "mux_mmc0_refclk";
				linux,phandle = <0x17>;
				phandle = <0x17>;
			};

			clk_gate_mmc0_refclk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x17>;
				hisilicon,hisi-clkgate = <0x10 0x200000>;
				clock-output-names = "mmc0_refclk";
				linux,phandle = <0x18>;
				phandle = <0x18>;
			};

			clk_div_mmc0_phase {
				compatible = "hisilicon,hisi-clk-div";
				#clock-cells = <0x0>;
				clocks = <0x18>;
				hisilicon,clkdiv-table = <0x8 0x1 0x1>;
				hisilicon,clkdiv = <0x108 0x700>;
				en_ref_before_set_div;
				clock-output-names = "mmc0_phase_div_clk";
				linux,phandle = <0x19>;
				phandle = <0x19>;
			};

			clk_gate_mmc0_phase {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x19>;
				hisilicon,hisi-clkgate = <0x10 0x80000>;
				clock-output-names = "mmc0_phase_clk";
				linux,phandle = <0x3e>;
				phandle = <0x3e>;
			};

			clk_div_mmc0 {
				compatible = "hisilicon,hisi-clk-div";
				#clock-cells = <0x0>;
				clocks = <0x19>;
				hisilicon,clkdiv-table = <0x20 0x1 0x1>;
				hisilicon,clkdiv = <0x108 0x1f>;
				en_ref_before_set_div;
				clock-output-names = "mmc0_div_clk";
				linux,phandle = <0x1a>;
				phandle = <0x1a>;
			};

			clk_gate_mmc0 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x1a>;
				hisilicon,hisi-clkgate = <0x10 0x20000>;
				clock-output-names = "mmc0_clk";
				linux,phandle = <0x3f>;
				phandle = <0x3f>;
			};

			clk_gate_pcie1_ctrl {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				hisilicon,hisi-clkgate = <0x10 0x18000>;
				clock-output-names = "pcie1_ctrl_clk";
			};

			clk_gate_usbotg {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				hisilicon,hisi-clkgate = <0x10 0x2000>;
				clock-output-names = "usbotg_clk";
				linux,phandle = <0x46>;
				phandle = <0x46>;
			};

			clk_gate_gpio2 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x10 0x4>;
				clock-output-names = "gpio2_clk";
			};

			clk_gate_uart2 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xc>;
				hisilicon,hisi-clkgate = <0x10 0x2>;
				clock-output-names = "uart2_clk";
				linux,phandle = <0x2d>;
				phandle = <0x2d>;
			};

			gate_zsi_sio_hifi {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x12>;
				hisilicon,hisi-clkgate = <0x30 0x1000000>;
				clock-output-names = "gate_zsi_sio_hifi";
				linux,phandle = <0x1b>;
				phandle = <0x1b>;
			};

			div_zsi_sio_hifi {
				compatible = "hisilicon,hisi-clk-div";
				#clock-cells = <0x0>;
				clocks = <0x1b>;
				hisilicon,clkdiv-table = <0x10 0x1 0x1>;
				hisilicon,clkdiv = <0x100 0xf0000000>;
				clock-output-names = "div_zsi_sio_hifi";
				linux,phandle = <0x1e>;
				phandle = <0x1e>;
			};

			clk_gate_abb_scpll {
				compatible = "hisilicon,hard_vote_to_mdm_pll";
				#clock-cells = <0x0>;
				clock-frequency = <0x2ee0000>;
				en_dis_offset_bit = <0x468 0x0>;
				lock_offset_bit = <0x624 0x0>;
				clock-output-names = "vote_abb_scpll";
				linux,phandle = <0x1c>;
				phandle = <0x1c>;
			};

			gate_zsi_sio_abb_scpll {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x1c>;
				hisilicon,hisi-clkgate = <0x30 0x800000>;
				clock-output-names = "sio_zsi_refclk";
				linux,phandle = <0x1d>;
				phandle = <0x1d>;
			};

			mux_zsi_sio_refclk {
				compatible = "hisilicon,hisi-clk-mux";
				#clock-cells = <0x0>;
				clocks = <0x1d 0x1e>;
				hisilicon,clkmux-reg = <0x140 0x80000000>;
				clock-output-names = "mux_zsi_sio_refclk";
				linux,phandle = <0x1f>;
				phandle = <0x1f>;
			};

			gate_zsi {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x1f>;
				hisilicon,hisi-clkgate = <0x20 0x4000>;
				clock-output-names = "zsi_clk";
			};

			clk_div_sio_bclk {
				compatible = "hisilicon,hisi-clk-div";
				#clock-cells = <0x0>;
				clocks = <0x1f>;
				hisilicon,clkdiv-table = <0xffff 0x1 0x0>;
				hisilicon,clkdiv = <0x100 0xffff>;
				clock-output-names = "sio_bclk";
				linux,phandle = <0x20>;
				phandle = <0x20>;
			};

			clk_div_sio {
				compatible = "hisilicon,hisi-clk-div";
				#clock-cells = <0x0>;
				clocks = <0x20>;
				hisilicon,clkdiv-table = <0xfff 0x1 0x0>;
				hisilicon,clkdiv = <0x100 0xfff0000>;
				clock-output-names = "sio_syncclk";
			};

			clk_gate_sio {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x21>;
				hisilicon,hisi-clkgate = <0x20 0x20000000>;
				clock-output-names = "sio_clk";
			};

			clk_gate_gpio12 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x20 0x1000>;
				clock-output-names = "gpio12_clk";
			};

			clk_gate_gpio11 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x20 0x800>;
				clock-output-names = "gpio11_clk";
			};

			clk_gate_gpio10 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x20 0x400>;
				clock-output-names = "gpio10_clk";
			};

			clk_gate_gpio9 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x20 0x200>;
				clock-output-names = "gpio9_clk";
			};

			clk_gate_gpio8 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x20 0x100>;
				clock-output-names = "gpio8_clk";
			};

			clk_gate_gpio7 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x20 0x80>;
				clock-output-names = "gpio7_clk";
			};

			clk_gate_gpio6 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x20 0x40>;
				clock-output-names = "gpio6_clk";
			};

			clk_gate_gpio5 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x20 0x20>;
				clock-output-names = "gpio5_clk";
			};

			clk_gate_gpio4 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xb>;
				hisilicon,hisi-clkgate = <0x20 0x10>;
				clock-output-names = "gpio4_clk";
			};

			clk_gate_uart0 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xc>;
				hisilicon,hisi-clkgate = <0x20 0x2>;
				clock-output-names = "uart0_clk";
				linux,phandle = <0x2a>;
				phandle = <0x2a>;
			};

			clk_gate_gmac_aclk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				hisilicon,hisi-clkgate = <0x30 0x400000>;
				clock-output-names = "gmac_aclk";
				linux,phandle = <0x39>;
				phandle = <0x39>;
			};

			clk_gate_gmac_switch {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xd>;
				hisilicon,hisi-clkgate = <0x30 0x200000>;
				clock-output-names = "gmac_switch_clk";
				linux,phandle = <0x3a>;
				phandle = <0x3a>;
			};

			clk_mux_gmac_gtx {
				compatible = "hisilicon,hisi-clk-mux";
				#clock-cells = <0x0>;
				clocks = <0x22 0x23>;
				hisilicon,clkmux-reg = <0x140 0x800000>;
				clock-output-names = "mux_gmac_gtx_clk";
				linux,phandle = <0x24>;
				phandle = <0x24>;
			};

			clk_gate_gmac_gtx {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x24>;
				hisilicon,hisi-clkgate = <0x30 0x100000>;
				clock-output-names = "gmac_gtx_clk";
				linux,phandle = <0x3b>;
				phandle = <0x3b>;
			};

			clk_mux_gmac_tx {
				compatible = "hisilicon,hisi-clk-mux";
				#clock-cells = <0x0>;
				clocks = <0x22 0x23>;
				hisilicon,clkmux-reg = <0x140 0x400000>;
				clock-output-names = "mux_gmac_tx_clk";
				linux,phandle = <0x25>;
				phandle = <0x25>;
			};

			clk_gate_gmac_tx {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x25>;
				hisilicon,hisi-clkgate = <0x30 0x80000>;
				clock-output-names = "gmac_tx_clk";
				linux,phandle = <0x3c>;
				phandle = <0x3c>;
			};

			clk_mux_gmac_rx {
				compatible = "hisilicon,hisi-clk-mux";
				#clock-cells = <0x0>;
				clocks = <0x22 0x23>;
				hisilicon,clkmux-reg = <0x140 0x200000>;
				clock-output-names = "mux_gmac_rx_clk";
				linux,phandle = <0x26>;
				phandle = <0x26>;
			};

			clk_gate_gmac_rx {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x26>;
				hisilicon,hisi-clkgate = <0x30 0x40000>;
				clock-output-names = "gmac_rx_clk";
				linux,phandle = <0x3d>;
				phandle = <0x3d>;
			};

			clk_gate_gmac_refclk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x27>;
				hisilicon,hisi-clkgate = <0x30 0x20000>;
				clock-output-names = "gmac_refclk";
			};

			clk_gate_uart1 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xc>;
				hisilicon,hisi-clkgate = <0x30 0x8000>;
				clock-output-names = "uart1_clk";
				linux,phandle = <0x2c>;
				phandle = <0x2c>;
			};
		};

		mdm_crg@80200000 {
			compatible = "hisilicon,clk-modem-crg";
			reg = <0x80200000 0x1000>;
			status = "ok";

			clk_gate_cipher_refclk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xf>;
				hisilicon,hisi-clkgate = <0x0 0x40000000>;
				clock-output-names = "cipher_refclk";
				linux,phandle = <0x28>;
				phandle = <0x28>;
			};

			clk_div_psacc_clk {
				compatible = "hisilicon,hisi-clk-div";
				#clock-cells = <0x0>;
				clocks = <0x28>;
				hisilicon,clkdiv-table = <0xf 0x3 0x0>;
				hisilicon,clkdiv = <0x44 0xf0000000>;
				clock-output-names = "psacc_clk_div";
				linux,phandle = <0x29>;
				phandle = <0x29>;
			};

			cipher_clk {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0x29>;
				hisilicon,hisi-clkgate = <0x0 0x20000>;
				clock-output-names = "cipher_clk";
			};

			clk_gate_uart3 {
				compatible = "hisilicon,hisi-clk-gate";
				#clock-cells = <0x0>;
				clocks = <0xe>;
				hisilicon,hisi-clkgate = <0x0 0x8000>;
				clock-output-names = "uart3_clk";
				linux,phandle = <0x2e>;
				phandle = <0x2e>;
			};
		};
	};

	chosen {
		bootargs = "root=/dev/ram0 rw console=ttyAMA0,115200 console=uw_tty0,115200 androidboot.hardware=hi6950_cpe loglevel=5 rdinit=/init mem=143m";
		linux,initrd-start = <0x0>;
		linux,initrd-end = <0x0>;
	};

	aliases {
		mshc0 = "/dwmmc0@910fc000";
		mshc1 = "/dwmmc1@910fd000";
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x0>;
	};

	ipc1@9101E000 {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		compatible = "hisilicon,ipc_balong_app";
		reg = <0x9101e000 0x1000>;
		interrupts = <0x0 0x0 0x4 0x0 0x1 0x4>;
		status = "ok";
		linux,phandle = <0x30>;
		phandle = <0x30>;
	};

	regulator@0xFFFFFFFF {
		compatible = "hisilicon,regulator_balong";
		regulator_name = "regulator_balong";

		regulator_balong@0 {
			compatible = "regulator-type1";
			regulator_type = <0x0>;
			regulator_name = "LDO9_VCC";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0xd>;
			hisilicon,hisi_pmic_type = "pmic";
			hisilicon,hisi_regulator_consumer = "LDO9-vcc";
			hisilicon,hisi_regulator_voltage = <0x1ab3f0 0x325aa0>;
			hisilicon,hisi_regulator_ops_mask = <0x9>;
			linux,phandle = <0x44>;
			phandle = <0x44>;
		};

		regulator_balong@7 {
			compatible = "regulator-type1";
			regulator_type = <0x0>;
			regulator_name = "LDO16_VCC";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x14>;
			hisilicon,hisi_pmic_type = "pmic";
			hisilicon,hisi_regulator_consumer = "LDO16-vcc";
			hisilicon,hisi_regulator_voltage = <0x1ab3f0 0x2dc6c0>;
			hisilicon,hisi_regulator_ops_mask = <0x9>;
			linux,phandle = <0x45>;
			phandle = <0x45>;
		};

		regulator_balong@9 {
			compatible = "regulator-type1";
			regulator_type = <0x0>;
			regulator_name = "LDO17_VCC";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x15>;
			hisilicon,hisi_pmic_type = "pmic";
			hisilicon,hisi_regulator_consumer = "LDO17-vcc";
			hisilicon,hisi_regulator_voltage = <0x27ac40 0x325aa0>;
			hisilicon,hisi_regulator_ops_mask = <0x9>;
		};

		regulator_balong@11 {
			compatible = "regulator-type1";
			regulator_type = <0x0>;
			regulator_name = "LDO04_VCC";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x9>;
			hisilicon,hisi_pmic_type = "pmic";
			hisilicon,hisi_regulator_consumer = "EFUSE-vcc";
			hisilicon,hisi_regulator_voltage = <0x19f0a0 0x1cfde0>;
			hisilicon,hisi_regulator_ops_mask = <0x9>;
		};

		regulator_balong@12 {
			compatible = "regulator-type1";
			regulator_type = <0x0>;
			regulator_name = "LDO13_VCC";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x11>;
			hisilicon,hisi_pmic_type = "pmic";
			hisilicon,hisi_regulator_consumer = "LDO13-vcc";
			hisilicon,hisi_regulator_voltage = <0x1ab3f0 0x325aa0>;
			hisilicon,hisi_regulator_ops_mask = <0x9>;
		};

		regulator_balong_dr@1 {
			compatible = "regulator-type1";
			regulator_type = <0x1>;
			regulator_name = "DR1_VCC";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x0>;
			hisilicon,hisi_pmic_type = "pmic_dr";
			hisilicon,hisi_regulator_consumer = "Balong_dr1";
			hisilicon,hisi_regulator_nvoltage = <0x8>;
			hisilicon,hisi_regulator_voltage = <0xbb8 0x5dc0>;
			hisilicon,hisi_regulator_current = <0xbb8 0x5dc0>;
			hisilicon,hisi_regulator_ops_mask = <0xb>;
		};

		regulator_balong_dr@2 {
			compatible = "regulator-type1";
			regulator_type = <0x1>;
			regulator_name = "DR2_VCC";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x1>;
			hisilicon,hisi_pmic_type = "pmic_dr";
			hisilicon,hisi_regulator_consumer = "Balong_dr2";
			hisilicon,hisi_regulator_nvoltage = <0x8>;
			hisilicon,hisi_regulator_voltage = <0xbb8 0x5dc0>;
			hisilicon,hisi_regulator_current = <0xbb8 0x5dc0>;
			hisilicon,hisi_regulator_ops_mask = <0xb>;
		};

		regulator_balong_dr@3 {
			compatible = "regulator-type1";
			regulator_type = <0x1>;
			regulator_name = "DR3_VCC";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x2>;
			hisilicon,hisi_pmic_type = "pmic_dr";
			hisilicon,hisi_regulator_consumer = "Balong_dr3";
			hisilicon,hisi_regulator_nvoltage = <0x8>;
			hisilicon,hisi_regulator_voltage = <0x3e8 0x1194>;
			hisilicon,hisi_regulator_current = <0x3e8 0x1194>;
			hisilicon,hisi_regulator_ops_mask = <0xb>;
		};

		regulator_balong_dr@4 {
			compatible = "regulator-type1";
			regulator_type = <0x1>;
			regulator_name = "DR4_VCC";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x3>;
			hisilicon,hisi_pmic_type = "pmic_dr";
			hisilicon,hisi_regulator_consumer = "Balong_dr4";
			hisilicon,hisi_regulator_nvoltage = <0x8>;
			hisilicon,hisi_regulator_voltage = <0x3e8 0x1194>;
			hisilicon,hisi_regulator_current = <0x3e8 0x1194>;
			hisilicon,hisi_regulator_ops_mask = <0xb>;
		};

		regulator_balong_dr@5 {
			compatible = "regulator-type1";
			regulator_type = <0x1>;
			regulator_name = "DR5_VCC";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x4>;
			hisilicon,hisi_pmic_type = "pmic_dr";
			hisilicon,hisi_regulator_consumer = "Balong_dr5";
			hisilicon,hisi_regulator_nvoltage = <0x8>;
			hisilicon,hisi_regulator_voltage = <0x3e8 0x1194>;
			hisilicon,hisi_regulator_current = <0x3e8 0x1194>;
			hisilicon,hisi_regulator_ops_mask = <0xb>;
		};

		regulator_balong_mtcmos@0 {
			compatible = "regulator-type1";
			regulator_type = <0x0>;
			regulator_name = "mtcmos0";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x0>;
			hisilicon,hisi_pmic_type = "dummy_pmic";
			hisilicon,hisi_regulator_consumer = "sd_mtcmos-vcc", "sd_mmc0_mtcmos-vcc";
			hisilicon,hisi_regulator_ops_mask = <0x8>;
			linux,phandle = <0x43>;
			phandle = <0x43>;
		};

		regulator_balong_mtcmos@1 {
			compatible = "regulator-type1";
			regulator_type = <0x0>;
			regulator_name = "mtcmos_usb";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x0>;
			hisilicon,hisi_pmic_type = "dummy_pmic";
			hisilicon,hisi_regulator_consumer = "dwc3_usb-vcc", "hsic_pd-vcc", "pcie_mtcmos-vcc", "hsic_pmu-vcc", "pcie_phy-vcc", "hsic_phy_vdd-vcc", "gmac-vcc";
			hisilicon,hisi_regulator_ops_mask = <0x8>;
		};

		regulator_balong_adp@1 {
			compatible = "regulator-type1";
			regulator_type = <0x0>;
			regulator_name = "adp1_VCC";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x2>;
			hisilicon,hisi_pmic_type = "dummy_pmic";
			hisilicon,hisi_regulator_consumer = "SD_DR-vcc", "SD_IO_M-vcc", "hsic_phy_avdd-vcc", "HKADC-vcc";
			hisilicon,hisi_regulator_voltage = <0xbb8 0x325aa0>;
			hisilicon,hisi_regulator_ops_mask = <0xb>;
			linux,phandle = <0x40>;
			phandle = <0x40>;
		};

		regulator_balong_adp@2 {
			compatible = "regulator-type1";
			regulator_type = <0x0>;
			regulator_name = "adp2_VCC";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x2>;
			hisilicon,hisi_pmic_type = "dummy_pmic";
			hisilicon,hisi_regulator_consumer = "adp-vcc";
			hisilicon,hisi_regulator_voltage = <0xbb8 0x5dc0>;
			hisilicon,hisi_regulator_ops_mask = <0xb>;
		};

		regulator_balong_test@1 {
			compatible = "regulator_balong_test";
			regulator_type = <0x0>;
			regulator_name = "regulator_test";
			regulator_supply = "adp2_VCC";
			regulator_usecount_valid = <0x1>;
			hisilicon,hisi_regulator_id = <0x756>;
			hisilicon,hisi_pmic_type = "dummy_pmic";
			hisilicon,hisi_regulator_consumer = "regulator_test-vcc";
			hisilicon,hisi_regulator_voltage = <0xbb8 0x5dc0>;
			hisilicon,hisi_regulator_voltage_test = <0xbb8 0x2ee0 0x5dc0 0x3e8 0x9c40>;
			hisilicon,hisi_regulator_ops_mask = <0xb>;
		};
	};

	regulator_mtcmos@0xFFFFFFFF {
		compatible = "hisilicon,regulator_balong_mtcmos";
		regulator_name = "regulator_balong_mtcmos";
		hisilicon,hisi_regulator_mtcmos_count = <0x1>;

		regulator_mtcmos_0@0 {
			compatible = "regulator_mtcmos_usb";
			hisilicon,mtcmos_id = <0x0>;
			hisilicon,mtcmos_addr = <0x90000000>;
			mtcmos_en_offset = <0xc18 0xc>;
			mtcmos_dis_offset = <0xc1c 0xc>;
			clk_en_offset = <0xc 0xc>;
			clk_dis_offset = <0x10 0xc>;
			srs_en_offset = <0x6c 0x5>;
			srs_dis_offset = <0x70 0x5>;
			ios_en_offset = <0xc10 0xc>;
			ios_dis_offset = <0xc14 0xc>;
			mtcmos_stat_offset = <0xe04 0xc>;
		};
	};

	sysctrl_app {
		compatible = "hisilicon,sysctrl_app";
		reg = <0x20000000 0x1000 0x90000000 0x1000 0x80200000 0x1000>;
		reg_sum = <0x3>;
	};

	get_system_status {
		compatible = "hisilicon,get_system_status";
		system_status_ctrl = <0x474 0x478 0x5a5a5a5a 0xa5a5a5a5>;
	};

	hwadp {
		compatible = "hisilicon,hardware_adapt";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;

		cicom0 {
			compatible = "hisilicon,cicom0";
			reg = <0x80440000 0x1000>;
			ip_type = <0x1>;
		};

		cicom1 {
			compatible = "hisilicon,cicom1";
			reg = <0x80441000 0x1000>;
			ip_type = <0x2>;
		};

		hdlc_framer {
			compatible = "hisilicon,hdlc_framer";
			reg = <0x91001000 0x1000>;
			ip_type = <0x3>;
		};

		bbpmaster {
			compatible = "hisilicon,bbpmaster";
			reg = <0x81900000 0x0>;
			ip_type = <0x4>;
		};

		ahb {
			compatible = "hisilicon,ahb";
			reg = <0x40034000 0x0>;
			ip_type = <0x7>;
			status = "disable";
		};

		wbbp {
			compatible = "hisilicon,wbbp";
			reg = <0x81900000 0x0>;
			ip_type = <0x8>;
		};

		wbbp_drx {
			compatible = "hisilicon,wbbp_drx";
			reg = <0x20008000 0x0>;
			ip_type = <0x9>;
		};

		gbbp {
			compatible = "hisilicon,gbbp";
			reg = <0x81800000 0x0>;
			ip_type = <0xa>;
		};

		gbbp_drx {
			compatible = "hisilicon,gbbp_drx";
			reg = <0x20008800 0x0>;
			ip_type = <0xb>;
		};

		gbbp1 {
			compatible = "hisilicon,gbbp1";
			reg = <0x0 0x0>;
			ip_type = <0xc>;
			status = "disable";
		};

		gbbp_drx1 {
			compatible = "hisilicon,gbbp_drx1";
			reg = <0x0 0x0>;
			ip_type = <0xd>;
			status = "disable";
		};

		sysctrl {
			compatible = "hisilicon,sysctrl";
			reg = <0x20000000 0x0>;
			ip_type = <0xf>;
			status = "disable";
		};

		sysctrl_pd {
			compatible = "hisilicon,sysctrl_pd";
			reg = <0x90000000 0x0>;
			ip_type = <0x10>;
			status = "disable";
		};

		sysctrl_mdm {
			compatible = "hisilicon,sysctrl_mdm";
			reg = <0x80200000 0x0>;
			ip_type = <0x11>;
			status = "disable";
		};

		ctu {
			compatible = "hisilicon,ctu";
			reg = <0x81f80000 0x0>;
			ip_type = <0x12>;
		};

		tdssys {
			compatible = "hisilicon,tdssys";
			reg = <0x81d00000 0x0>;
			ip_type = <0x13>;
		};

		upacc {
			compatible = "hisilicon,upacc";
			reg = <0x80453000 0x1000>;
			ip_type = <0x1e>;
		};

		harq {
			compatible = "hisilicon,harq";
			reg = <0xea000000 0x1000>;
			ip_type = <0x1f>;
			status = "disable";
		};

		peri_sysctrl {
			compatible = "hisilicon,peri_sysctrl";
			reg = <0xea000000 0x1000>;
			ip_type = <0x20>;
			status = "disable";
		};

		hdlc_deframer_int {
			compatible = "hisilicon,hdlc_deframer_int";
			interrupts = <0x0 0x19 0x4>;
			int_type = <0xc>;
		};

		hdlc_framer_int {
			compatible = "hisilicon,hdlc_framer_int";
			interrupts = <0x0 0x18 0x4>;
			int_type = <0xd>;
		};
	};

	cache_l2x0@0x3FF00000 {
		compatible = "arm,pl310-cache";
		reg = <0x3ff00000 0x100000>;
		status = "ok";
	};

	edma@0x90003000 {
		compatible = "hisilicon,edma1";
		reg = <0x90003000 0x1000>;
		interrupts = <0x0 0x96 0x4>;
		clk_name = "edmac_clk";
		status = "ok";
		linux,phandle = <0x31>;
		phandle = <0x31>;
	};

	cipher@80452000 {
		compatible = "hisilicon,cipher";
		reg = <0x80452000 0x1000>;
		interrupts = <0x0 0x29 0x4>;
		clkrate = <0x1312d000>;
		clk_switch = <0x1>;
	};

	balong_timer_app {
		compatible = "hisilicon,timer_device";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;

		timer0_app@20017000 {
			request_id = <0x1>;
			timer_name = "acpu softtimer wake";
			reg = <0x20017000 0x1000>;
			interrupts = <0x0 0x2d 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x1>;
			need_adp_connect_isr = <0x0>;
			status = "ok";
		};

		timer1_app@20017020 {
			request_id = <0x2>;
			timer_name = "ccpu softtimer wake";
			reg = <0x20017020 0x1000>;
			interrupts = <0x0 0x2e 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x1>;
			need_adp_connect_isr = <0x0>;
			status = "disabled";
		};

		timer2_app@20018000 {
			request_id = <0x13>;
			timer_name = "acpu osa";
			reg = <0x20018000 0x1000>;
			interrupts = <0x0 0x2f 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x1>;
			need_adp_connect_isr = <0x1>;
			status = "ok";
		};

		timer3_app@20018020 {
			request_id = <0x14>;
			timer_name = "ccpu osa";
			reg = <0x20018020 0x1000>;
			interrupts = <0x0 0x30 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x1>;
			need_adp_connect_isr = <0x1>;
			status = "disabled";
		};

		timer4_app@20019000 {
			request_id = <0x0>;
			timer_name = "ccpu dsp_drx_prot";
			reg = <0x20019000 0x1000>;
			interrupts = <0x0 0x31 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x1>;
			need_adp_connect_isr = <0x1>;
			status = "disabled";
		};

		timer5_app@20019020 {
			request_id = <0x18>;
			timer_name = "ccpu drx";
			reg = <0x20019020 0x1000>;
			interrupts = <0x0 0x32 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x1>;
			status = "disabled";
		};

		timer6_app@2001A000 {
			request_id = <0x19>;
			timer_name = "acpu om";
			reg = <0x2001a000 0x1000>;
			interrupts = <0x0 0x33 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x1>;
			status = "ok";
		};

		timer7_app@2001A000 {
			request_id = <0xa>;
			timer_name = "m3 softtimer";
			reg = <0x2001a020 0x1000>;
			interrupts = <0x0 0x34 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "disabled";
		};

		timer8_app@2001B000 {
			request_id = <0x8>;
			timer_name = "acpu softtimer nowake";
			reg = <0x2001b000 0x1000>;
			interrupts = <0x0 0x35 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "ok";
		};

		timer9_app@2001B020 {
			request_id = <0x3>;
			timer_name = "acpu wdt";
			reg = <0x2001b020 0x1000>;
			interrupts = <0x0 0x36 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "ok";
		};

		timer10_app@2001C000 {
			request_id = <0xe>;
			timer_name = "acpu systimer";
			reg = <0x2001c000 0x1000>;
			interrupts = <0x0 0x37 0x4>;
			clock-frequency = <0x124f800>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "ok";
		};

		timer11_app@2001C020 {
			request_id = <0x12>;
			timer_name = "hifi timer1";
			reg = <0x2001c020 0x1000>;
			interrupts = <0x0 0x38 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "ok";
			linux,phandle = <0x33>;
			phandle = <0x33>;
		};

		timer12_app@2001D000 {
			request_id = <0xf>;
			timer_name = "acpu source timer";
			reg = <0x2001d000 0x1000>;
			interrupts = <0x0 0x39 0x4>;
			clock-frequency = <0x124f800>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "ok";
		};

		timer13_app@2001D020 {
			request_id = <0xb>;
			timer_name = "hifi timer2";
			reg = <0x2001d020 0x1000>;
			interrupts = <0x0 0x3a 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "ok";
			linux,phandle = <0x34>;
			phandle = <0x34>;
		};

		timer14_app@2001E000 {
			request_id;
			timer_name = [00];
			reg = <0x2001e000 0x1000>;
			interrupts = <0x0 0x3b 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "disabled";
		};

		timer15_app@2001E020 {
			request_id = <0x10>;
			timer_name = "acpu view";
			reg = <0x2001e020 0x1000>;
			interrupts = <0x0 0x3c 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x0>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x1>;
			status = "ok";
		};

		timer0_mdm_non_ao@80206000 {
			request_id;
			timer_name = [00];
			reg = <0x80206000 0x1000>;
			interrupts = <0x0 0x66 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x1>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "disabled";
		};

		timer1_mdm_non_ao@80206020 {
			request_id;
			timer_name = [00];
			reg = <0x80206020 0x1000>;
			interrupts = <0x0 0x67 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x1>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "disabled";
		};

		timer16_mdm_non_ao@8020E000 {
			request_id;
			timer_name = [00];
			reg = <0x8020e000 0x1000>;
			interrupts = <0x0 0x68 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x1>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "disabled";
		};

		timer17_mdm_non_ao@8020E020 {
			request_id;
			timer_name = [00];
			reg = <0x8020e020 0x1000>;
			interrupts = <0x0 0x69 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x1>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "disabled";
		};

		timer18_mdm_non_ao@8020F000 {
			request_id;
			timer_name = [00];
			reg = <0x8020f000 0x1000>;
			interrupts = <0x0 0x6a 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x1>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "disabled";
		};

		timer19_mdm_non_ao@8020F020 {
			request_id;
			timer_name = [00];
			reg = <0x8020f020 0x1000>;
			interrupts = <0x0 0x6b 0x4>;
			clock-frequency = <0x7ffc>;
			sr_flag = <0x1>;
			periphid = <0xa000>;
			wakesrc = <0x0>;
			need_adp_connect_isr = <0x0>;
			status = "disabled";
		};
	};

	timerslice@0x20000000 {
		compatible = "hisilicon,timer_slice";
		reg = <0x20000000 0x1000>;
		offset = <0x614 0x618>;
		increase_count_flag = <0x1>;
		clock-frequency = <0x7ffc>;
		need_map = <0x1>;
		status = "ok";
		linux,phandle = <0x32>;
		phandle = <0x32>;
	};

	timer_stamp@0x2001B000 {
		compatible = "hisilicon,timer_stamp";
		reg = <0x2001b000 0x1000>;
		offset = <0x24 0x28>;
		increase_count_flag = <0x0>;
		clock-frequency = <0x7ffc>;
		need_map = <0x1>;
		status = "ok";
	};

	hrttimer_app@80220000 {
		compatible = "hisilicon,hrttimer_slice";
		reg = <0x80220000 0x2000>;
		offset = <0x8 0xc>;
		increase_count_flag = <0x1>;
		clock-frequency = <0x124f800>;
		sr_flag = <0x1>;
		need_map = <0x1>;
		status = "ok";
	};

	softtimer_type_support {
		compatible = "hisilicon,softtimer_support_type";
		support_wake = <0x1>;
		support_unwake = <0x1>;
		wake-frequency = <0x7ffc>;
		unwake-frequency = <0x7ffc>;
		status = "ok";
	};

	pm_app {
		compatible = "hisilicon,app_a9_boot_addr";
		boot_offset = <0x400>;
		remap_size_offset = <0x408>;
		boot_offset_sysctrl = <0x1>;
		status = "ok";
	};

	wakesrc_interrupt {
		compatible = "hisilicon,wakesrc_int";

		socp0 {
			index = <0x0>;
			wakesource_name = "socp0";
			interrupt = <0x8e>;
			status = "ok";
		};

		uart0 {
			index = <0x1>;
			wakesource_name = "uart0";
			interrupt = <0x3c>;
			status = "ok";
		};
	};

	watchdog_m3@20010000 {
		compatible = "hisilicon,watchdog_m3";
		reg = <0x20001000 0x1000>;
		interrupts = <0x0 0x5 0x4>;
		status = "ok";
	};

	watchdog_mdm@0x80201000 {
		compatible = "hisilicon,watchdog_mdm";
		reg = <0x80201000 0x1000>;
		interrupts = <0x0 0xbc 0x4>;
		status = "ok";
	};

	icc_channels_app {
		compatible = "hisilicon,icc_balong_app";

		icc_channels_sddr_app {
			ref = "sddr";
			plus_size = <0x14>;

			icc_channel_drv {
				ch_name = "DRV";
				cfg = <0x0 0x3 0x1000 0x1f 0x6 0x32 0x1>;
				status = "ok";
			};

			icc_channel_rfile {
				ch_name = "RFILE";
				cfg = <0x1 0x3 0x1000 0x1f 0x6 0x14 0x1>;
				status = "ok";
			};

			icc_channel_nv {
				ch_name = "NV";
				cfg = <0x2 0x3 0x1000 0x1f 0x6 0x14 0x1>;
				status = "ok";
			};

			icc_channel_guom0 {
				ch_name = "GUOM0";
				cfg = <0x3 0x3 0x4000 0x1f 0x6 0x14 0x1>;
				status = "ok";
			};

			icc_channel_guom1 {
				ch_name = "GUOM1";
				cfg = <0x4 0x3 0x0 0x1f 0x6 0x14 0x1>;
				status = "ok";
			};

			icc_channel_guom2 {
				ch_name = "GUOM2";
				cfg = <0x5 0x3 0x0 0x1f 0x6 0x14 0x1>;
				status = "ok";
			};

			icc_channel_guom3 {
				ch_name = "GUOM3";
				cfg = <0x6 0x3 0x0 0x1f 0x6 0x14 0x1>;
				status = "ok";
			};

			icc_channel_guom4 {
				ch_name = "GUOM4";
				cfg = <0x7 0x3 0x20000 0x1f 0x6 0x14 0x1>;
				status = "ok";
			};

			icc_channel_guom5 {
				ch_name = "GUOM5";
				cfg = <0x8 0x3 0x0 0x1f 0x6 0x14 0x1>;
				status = "ok";
			};

			icc_channel_cshell {
				ch_name = "CSHELL";
				cfg = <0x9 0x3 0x2000 0x1f 0x6 0x14 0x1>;
				status = "ok";
			};

			icc_channel_panrpc {
				ch_name = "PANRPC";
				cfg = <0xa 0x3 0x1000 0x1f 0x6 0x14 0x1>;
				status = "ok";
			};
		};

		icc_channels_sram_app {
			ref = "sram";

			icc_channel_amcore {
				ch_name = "A-M";
				cfg = <0xd 0x3 0x200 0x1d 0x6 0x14 0x1>;
				status = "ok";
			};
		};
	};

	cpufreq@0xFFFFFFFF {
		compatible = "hisilicon,cpufreq_balong";

		cpufreq_balong@0 {
			compatible = "cpufreq_balong_acore";
			cpufreq_freq_count = <0x9>;
			cpufreq_cpu_frequence = <0x6f 0x85 0xa6 0xc8 0x10a 0x14d 0x190 0x320 0x42a>;
			cpufreq_ddr_frequence = <0x6f 0x85 0xa6 0xc8 0x10a 0x14d 0x190 0x1c2 0x215>;
		};
	};

	spi@0 {
		compatible = "hisilicon,spi_app";
		reg = <0x9001e000 0x1000>;
		interrupts = <0x0 0x3f 0x4>;
		id = <0x0>;
		status = "ok";
	};

	spi@1 {
		compatible = "hisilicon,spi_app";
		reg = <0x9001f000 0x1000>;
		interrupts = <0x0 0x40 0x4>;
		id = <0x1>;
		status = "ok";
	};

	i2c0@90022000 {
		compatible = "hisilicon,designware-i2c";
		reg = <0x90022000 0x1000>;
		interrupts = <0x0 0x4f 0x4>;
		id = <0x0>;
		status = "okay";
	};

	i2c1@90023000 {
		compatible = "hisilicon,designware-i2c";
		reg = <0x90023000 0x1000>;
		interrupts = <0x0 0x54 0x4>;
		id = <0x1>;
		status = "okay";
	};

	nandc@0x9102b000 {
		compatible = "hisilicon,balong-nandc";
		reg = <0x9102b000 0x1000 0x93000000 0x2800>;
		interrupts = <0x0 0x4a 0x4>;
		status = "okay";
	};

	efuse@20007000 {
		compatible = "hisilicon,efuse_balong_app";
		reg = <0x20007000 0x1000>;
		status = "ok";
	};

	audio@8990 {
		compatible = "hisilicon,audio_balong_app";
		type = "wm8990";
		addr = <0x1a>;
		i2c_num = <0x1>;
		status = "ok";
	};

	amba {
		compatible = "arm,amba-bus";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		interrupt-parent = <0x1>;
		ranges;

		gpio@2003F000 {
			compatible = "arm,pl061", "arm,primecell", "arm,primecell0";
			arm,primecell-periphid = <0x41061>;
			linux,gpio-base = <0x0>;
			reg = <0x2003f000 0x1000>;
			interrupts = <0x0 0x82 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "okay";
		};

		gpio@20040000 {
			compatible = "arm,pl061", "arm,primecell", "arm,primecell1";
			arm,primecell-periphid = <0x41061>;
			linux,gpio-base = <0x8>;
			reg = <0x20040000 0x1000>;
			interrupts = <0x0 0x83 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "okay";
		};

		gpio@9002B000 {
			compatible = "arm,pl061", "arm,primecell", "arm,primecell2";
			arm,primecell-periphid = <0x41061>;
			linux,gpio-base = <0x10>;
			reg = <0x9002b000 0x1000>;
			interrupts = <0x0 0x84 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "okay";
		};

		gpio@9002c000 {
			compatible = "arm,pl061", "arm,primecell", "arm,primecell3";
			arm,primecell-periphid = <0x41061>;
			linux,gpio-base = <0x18>;
			reg = <0x9002c000 0x1000>;
			interrupts = <0x0 0x85 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "okay";
		};

		gpio@9002D000 {
			compatible = "arm,pl061", "arm,primecell", "arm,primecell4";
			arm,primecell-periphid = <0x41061>;
			linux,gpio-base = <0x20>;
			reg = <0x9002d000 0x1000>;
			interrupts = <0x0 0x86 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "okay";
		};

		gpio@9002E000 {
			compatible = "arm,pl061", "arm,primecell", "arm,primecell5";
			arm,primecell-periphid = <0x41061>;
			linux,gpio-base = <0x28>;
			reg = <0x9002e000 0x1000>;
			interrupts = <0x0 0x87 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "okay";
		};

		gpio@9002F000 {
			compatible = "arm,pl061", "arm,primecell", "arm,primecell6";
			arm,primecell-periphid = <0x41061>;
			linux,gpio-base = <0x30>;
			reg = <0x9002f000 0x1000>;
			interrupts = <0x0 0x88 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "okay";
		};

		gpio@90030000 {
			compatible = "arm,pl061", "arm,primecell", "arm,primecell7";
			arm,primecell-periphid = <0x41061>;
			linux,gpio-base = <0x38>;
			reg = <0x90030000 0x1000>;
			interrupts = <0x0 0x89 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "okay";
		};

		gpio@90031000 {
			compatible = "arm,pl061", "arm,primecell", "arm,primecell8";
			arm,primecell-periphid = <0x41061>;
			linux,gpio-base = <0x40>;
			reg = <0x90031000 0x1000>;
			interrupts = <0x0 0x8a 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "okay";
		};

		gpio@90032000 {
			compatible = "arm,pl061", "arm,primecell", "arm,primecell9";
			arm,primecell-periphid = <0x41061>;
			linux,gpio-base = <0x48>;
			reg = <0x90032000 0x1000>;
			interrupts = <0x0 0x8b 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "okay";
		};

		gpio@90033000 {
			compatible = "arm,pl061", "arm,primecell", "arm,primecell10";
			arm,primecell-periphid = <0x41061>;
			linux,gpio-base = <0x50>;
			reg = <0x90033000 0x1000>;
			interrupts = <0x0 0x8c 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "okay";
		};

		gpio@90034000 {
			compatible = "arm,pl061", "arm,primecell", "arm,primecell11";
			arm,primecell-periphid = <0x41061>;
			linux,gpio-base = <0x58>;
			reg = <0x90034000 0x1000>;
			interrupts = <0x0 0x8d 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "okay";
		};

		gpio@90035000 {
			compatible = "arm,pl061", "arm,primecell", "arm,primecell12";
			arm,primecell-periphid = <0x41061>;
			linux,gpio-base = <0x60>;
			reg = <0x90035000 0x1000>;
			interrupts = <0x0 0x8e 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "okay";
		};

		rtc@20005000 {
			compatible = "arm,pl031", "arm,primecell";
			arm,primecell-periphid = <0x41031>;
			reg = <0x20005000 0x1000>;
			interrupts = <0x0 0x4 0x4>;
			status = "okay";
		};

		uart@90024000 {
			compatible = "arm,pl011", "arm,primecell";
			arm,primecell-periphid = <0x41011>;
			reg = <0x90024000 0x1000>;
			interrupts = <0x0 0x46 0x4>;
			clocks = <0x2a 0x2b>;
			clock-names = "uart0_clk", "apb_pclk";
			status = "okay";
		};

		uart@90025000 {
			compatible = "arm,pl011", "arm,primecell";
			arm,primecell-periphid = <0x41011>;
			reg = <0x90025000 0x1000>;
			interrupts = <0x0 0x47 0x4>;
			clocks = <0x2c 0x2b>;
			clock-names = "uart1_clk", "apb_pclk";
			status = "okay";
		};

		uart@90026000 {
			compatible = "arm,pl011", "arm,primecell";
			arm,primecell-periphid = <0x41011>;
			reg = <0x90026000 0x1000>;
			interrupts = <0x0 0x48 0x4>;
			clocks = <0x2d 0x2b>;
			clock-names = "uart2_clk", "apb_pclk";
			status = "okay";
		};

		uart@80203000 {
			compatible = "arm,pl011", "arm,primecell";
			arm,primecell-periphid = <0x41011>;
			reg = <0x80203000 0x1000>;
			interrupts = <0x0 0x49 0x4>;
			clocks = <0x2e 0x2b>;
			clock-names = "uart3_clk", "apb_pclk";
			status = "okay";
		};

		uart_at@90024000 {
			compatible = "arm,pl011", "arm,primecell";
			arm,primecell-periphid = <0x41011>;
			reg = <0x90024000 0x1000>;
			interrupts = <0x0 0x46 0x4>;
			clock-name = "uart0_clk";
			baud-rate = <0x1c200>;
			fifo-depth = <0x40>;
			status = "okay";
		};
	};

	gpio_ex@0 {
		compatible = "hisilicon,gpio_ex_balong_app";
		type = "pca9574";
		reg_addr = <0x21>;
		i2c_num = <0x0>;
		gpio_base = <0x80>;
		invert = <0x0>;
		irq_base = <0xffffffff>;
		status = "ok";
	};

	gpio_ex@1 {
		compatible = "hisilicon,gpio_ex_balong_app";
		type = "pca9574";
		reg_addr = <0x20>;
		i2c_num = <0x0>;
		gpio_base = <0x88>;
		invert = <0x0>;
		irq_base = <0xffffffff>;
		status = "ok";
	};

	sio@91033000 {
		compatible = "hisilicon,sio_app";
		reg = <0x91033000 0x1000>;
		master_mode = <0x90000418 0x3 0x3>;
		sio_zsi = <0x90000418 0x2 0x2>;
		sio_cnt = <0x9000011c 0x0 0xb>;
		status = "ok";
	};

	slic {
		compatible = "hisilicon,slic_app";
		gpio_num = <0x0>;
		status = "ok";
	};

	pcie_balong {
		compatible = "hisilicon,pcie_balong";
		vendor_id = <0x19e5>;
		device_id = <0x6921>;
		sc_addr = <0x90100000 0x1000>;
		clock_sc_id = "sysctrl_pcie_clk";

		pcie_balong@0x98000000 {
			compatible = "hisilicon,pcie_balong_0";
			pcie_cfg = <0xa8000000>;
			pcie_data = <0x98000000>;
			device_cfg_size = <0x1000000>;
			device_io_size = <0x1000000>;
			device_mem_size = <0x8000000>;
			int_link_down = <0xc0>;
			int_dma = <0xc1>;
			int_pm = <0xc2>;
			int_radm_a = <0xc3>;
			int_radm_b = <0xc4>;
			int_radm_c = <0xc5>;
			int_radm_d = <0xc6>;
			int_msi = <0xc4>;
			gpio_perst = <0x58>;
			regulator_id = "pcie_mtcmos-vcc";
			clock_core_id = "pcie0_ctrl_clk";
			clock_aux_id = [00];
			clock_phy_id = "pcie0_phy_clk";
			phy_assert_reset = <0x9000006c 0xf 0x1>;
			phy_deassert_reset = <0x90000070 0xf 0x1>;
			core_assert_reset = <0x9000006c 0xe 0x1>;
			core_deassert_reset = <0x90000070 0xe 0x1>;
			status = "ok";
		};

		pcie_balong@0xA8010000 {
			compatible = "hisilicon,pcie_balong_1";
			pcie_cfg = <0xb8010000>;
			pcie_data = <0xa8010000>;
			device_cfg_size = <0x1000000>;
			device_io_size = <0x1000000>;
			device_mem_size = <0x8000000>;
			int_link_down = <0xc7>;
			int_dma = <0xc8>;
			int_pm = <0xc9>;
			int_radm_a = <0xca>;
			int_radm_b = <0xcb>;
			int_radm_c = <0xcc>;
			int_radm_d = <0xcd>;
			int_msi = <0xcb>;
			gpio_perst = <0x56>;
			regulator_id = "pcie_mtcmos-vcc";
			clock_core_id = "pcie1_ctrl_clk";
			clock_aux_id = [00];
			clock_phy_id = "pcie1_phy_clk";
			phy_assert_reset = <0x9000006c 0xd 0x1>;
			phy_deassert_reset = <0x90000070 0xd 0x1>;
			core_assert_reset = <0x9000006c 0xc 0x1>;
			core_deassert_reset = <0x90000070 0xc 0x1>;
			status = "ok";
		};
	};

	pwm0@balong {
		compatible = "hisilicon,pwm_balong_app";
		reg = <0x90029000 0x1000>;
		status = "ok";
	};

	pwm1@balong {
		compatible = "hisilicon,pwm_balong_app";
		reg = <0x9002a000 0x1000>;
		status = "ok";
	};

	emi@9102C000 {
		compatible = "hisilicon,emi_balong_app";
		reg = <0x9102c000 0x1000>;
		mem = <0x9102d000>;
		emi_srst_en = <0x90000000 0x60 0x19 0x19>;
		emi_srst_dis = <0x90000000 0x64 0x19 0x19>;
		ebi_normal_mode = <0x90000000 0x83c 0x0 0x0>;
		status = "ok";
	};

	lcd {
		compatible = "hisilicon,lcd_balong_app";
		gpio = <0x10 0x11 0x12>;
		lcd_rst_n = <0x90000000 0x418 0x0 0x0>;
		emi_sel = <0x90000000 0x418 0x1 0x1>;
		status = "okay";
	};

	bbp_tds_addr {
		reg = <0x81d00000 0x2000>;
		linux,phandle = <0x35>;
		phandle = <0x35>;
	};

	hifi {
		compatible = "hisilicon,hifi_app";
		socp_node = <0x2f>;
		ipc_node = <0x30>;
		edma_node = <0x31>;
		bbptimer_node = <0x32>;
		timer0_node = <0x33>;
		timer1_node = <0x34>;
		bbp_node = <0x35>;
		hifi_pll_en = <0x90000220 0x0 0x0>;
		hifi_pll_status = <0x90000220 0x1f 0x1f>;
		hifi_runstall = <0x90000414 0x1 0x1>;
		hifi_mtcmos_en = <0x0 0x0 0x0>;
		hifi_mtcmos_rdy = <0x0 0x0 0x0>;
		hifi_iso_en = <0x0 0x0 0x0>;
		hifi_iso_dis = <0x0 0x0 0x0>;
		hifi_mtcmos_dis = <0x0 0x0 0x0>;
		hifi_clk_en = <0x90000020 0x1f 0x1f>;
		hifi_dbg_clk_en = <0x90000020 0x1e 0x1e>;
		hifi_clk_dis = <0x90000024 0x1f 0x1f>;
		hifi_dbg_clk_dis = <0x90000024 0x1e 0x1e>;
		hifi_core_srst_en = <0x9000006c 0x12 0x12>;
		hifi_core_srst_dis = <0x90000070 0x12 0x12>;
		hifi_pd_srst_en = <0x9000006c 0x13 0x13>;
		hifi_pd_srst_dis = <0x90000070 0x13 0x13>;
		hifi_dbg_srst_en = <0x9000006c 0x14 0x14>;
		hifi_dbg_srst_dis = <0x90000070 0x14 0x14>;
		status = "ok";
	};

	sysboot {
		compatible = "hisilicon,sysboot_balong";
		reboot = <0x20000404 0x0 0x1 0x0>;
		power_down = <0x20000404 0x1 0x1 0x0>;
		status = "ok";
	};

	pinctrl@90002000 {
		compatible = "hisilicon,pinctrl_balong";
		reg = <0x90002000 0x1000>;
		mmc_bug = <0x1>;
		status = "okay";
	};

	pmic_volt_app {
		compatible = "hisilicon,pmic_volt_app";
		pmic_volt_num = <0x0 0x23>;

		pmic_volt_table@pmic_volt_table {
			compatible = "hisilicon,pmic_volt_table";

			buck0 {
				volt_id = <0x0>;
				volt_name = "buck0";
				reg_ctrl = <0x98 0x1 0x98 0x1 0x98 0x1 0x99 0xf>;
				voltage_nums = <0x10>;
				voltage_table = <0xaae60 0xb1008 0xb71b0 0xbd358 0xc0df0 0xc3500 0xc5c10 0xc96a8 0xcaa30 0xcf850 0xd59f8 0xdbba0 0xe1d48 0xe7ef0 0xee098 0xf4240>;
				off_on_delay = <0x4e20>;
			};

			buck4 {
				volt_id = <0x4>;
				volt_name = "buck4";
				reg_ctrl = <0xa0 0x1 0xa0 0x1 0xa0 0x1 0xa1 0xf>;
				voltage_nums = <0x10>;
				voltage_table = <0xaae60 0xb1008 0xb71b0 0xbd358 0xc0df0 0xc3500 0xc5c10 0xc96a8 0xcaa30 0xcf850 0xd59f8 0xdbba0 0xe1d48 0xe7ef0 0xee098 0xf4240>;
				off_on_delay = <0x4e20>;
			};

			ldo0 {
				volt_id = <0x5>;
				volt_name = "ldo0_2";
				reg_ctrl = <0x5a 0x1 0x5a 0x1 0x5a 0x1 0x5b 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x927c0 0x9eb10 0xaae60 0xb71b0 0xbd358 0xc3500 0xc96a8 0xcf850>;
				off_on_delay = <0x4e20>;
			};

			ldo1 {
				volt_id = <0x6>;
				volt_name = "ldo1";
				reg_ctrl = <0x5c 0x1 0x5c 0x1 0x5c 0x1 0x5d 0xf>;
				voltage_nums = <0x10>;
				voltage_table = <0xf4240 0x100590 0x10c8e0 0x118c30 0x124f80 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620 0x13fd30 0x142440 0x144b50 0x147260 0x16e360>;
				off_on_delay = <0x4e20>;
			};

			ldo2 {
				volt_id = <0x7>;
				volt_name = "ldo2";
				reg_ctrl = <0x5e 0x1 0x5e 0x1 0x5e 0x1 0x5f 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x19f0a0 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0>;
				off_on_delay = <0x4e20>;
			};

			ldo3 {
				volt_id = <0x8>;
				volt_name = "ldo3";
				reg_ctrl = <0x60 0x1 0x60 0x1 0x60 0x1 0x61 0xf>;
				voltage_nums = <0x10>;
				voltage_table = <0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e22d8 0x1e8480 0x1ee628 0x1f47d0 0x1fa978 0x200b20 0x206cc8 0x20ce70 0x2191c0>;
				off_on_delay = <0x4e20>;
			};

			ldo4 {
				volt_id = <0x9>;
				volt_name = "ldo4";
				reg_ctrl = <0x62 0x1 0x62 0x1 0x62 0x1 0x63 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x19f0a0 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0>;
				off_on_delay = <0x4e20>;
			};

			ldo5 {
				volt_id = <0xa>;
				volt_name = "ldo5";
				reg_ctrl = <0x64 0x1 0x64 0x1 0x64 0x1 0x65 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x19f0a0 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1cfde0 0x1dc130>;
				off_on_delay = <0x4e20>;
			};

			ldo7 {
				volt_id = <0xb>;
				volt_name = "ldo7";
				reg_ctrl = <0x66 0x1 0x66 0x1 0x66 0x1 0x67 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x19f0a0 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1cfde0 0x1dc130>;
				off_on_delay = <0x4e20>;
			};

			ldo8 {
				volt_id = <0xc>;
				volt_name = "ldo8";
				reg_ctrl = <0x68 0x1 0x68 0x1 0x68 0x1 0x69 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x19f0a0 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1cfde0 0x1dc130>;
				off_on_delay = <0x4e20>;
			};

			ldo9 {
				volt_id = <0xd>;
				volt_name = "ldo9";
				reg_ctrl = <0x6a 0x1 0x6a 0x1 0x6a 0x1 0x6b 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x1ab3f0 0x1b7740 0x1bd8e8 0x2ab980 0x2b7cd0 0x2d0370 0x2dc6c0 0x325aa0>;
				off_on_delay = <0x4e20>;
			};

			ldo10 {
				volt_id = <0xe>;
				volt_name = "ldo10";
				reg_ctrl = <0x6c 0x1 0x6c 0x1 0x6c 0x1 0x6d 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x2f4d60 0x3010b0 0x30d400 0x325aa0 0x325aa0 0x325aa0 0x325aa0 0x325aa0>;
				off_on_delay = <0x4e20>;
			};

			ldo11 {
				volt_id = <0xf>;
				volt_name = "ldo11";
				reg_ctrl = <0x6e 0x1 0x6e 0x1 0x6e 0x1 0x6f 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x1ab3f0 0x1b7740 0x1bd8e8 0x2ab980 0x2b7cd0 0x2d0370 0x2dc6c0 0x325aa0>;
				off_on_delay = <0x4e20>;
			};

			ldo12 {
				volt_id = <0x10>;
				volt_name = "ldo12";
				reg_ctrl = <0x70 0x1 0x70 0x1 0x70 0x1 0x71 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x1ab3f0 0x1b7740 0x1bd8e8 0x2ab980 0x2b7cd0 0x2d0370 0x2dc6c0 0x325aa0>;
				off_on_delay = <0x4e20>;
			};

			ldo13 {
				volt_id = <0x11>;
				volt_name = "ldo13";
				reg_ctrl = <0x72 0x1 0x72 0x1 0x72 0x1 0x73 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x1ab3f0 0x1b7740 0x1bd8e8 0x2ab980 0x2b7cd0 0x2d0370 0x2dc6c0 0x325aa0>;
				off_on_delay = <0x4e20>;
			};

			ldo14 {
				volt_id = <0x12>;
				volt_name = "ldo14";
				reg_ctrl = <0x74 0x1 0x74 0x1 0x74 0x1 0x75 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x1ab3f0 0x1b7740 0x1bd8e8 0x2ab980 0x2b7cd0 0x2d0370 0x2dc6c0 0x325aa0>;
				off_on_delay = <0x4e20>;
			};

			ldo15 {
				volt_id = <0x13>;
				volt_name = "ldo15";
				reg_ctrl = <0x76 0x1 0x76 0x1 0x76 0x1 0x77 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x1ab3f0 0x1b7740 0x249f00 0x27ac40 0x2932e0 0x2b7cd0 0x2d0370 0x2dc6c0>;
				off_on_delay = <0x4e20>;
			};

			ldo16 {
				volt_id = <0x14>;
				volt_name = "ldo16";
				reg_ctrl = <0x78 0x1 0x78 0x1 0x78 0x1 0x79 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x1ab3f0 0x1b7740 0x249f00 0x27ac40 0x2932e0 0x2b7cd0 0x2d0370 0x2dc6c0>;
				off_on_delay = <0x4e20>;
			};

			ldo17 {
				volt_id = <0x15>;
				volt_name = "ldo17";
				reg_ctrl = <0x7a 0x1 0x7a 0x1 0x7a 0x1 0x7b 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x27ac40 0x2932e0 0x2ab980 0x2b7cd0 0x2dc6c0 0x2f4d60 0x30d400 0x325aa0>;
				off_on_delay = <0x4e20>;
			};

			ldo19 {
				volt_id = <0x16>;
				volt_name = "ldo19";
				reg_ctrl = <0x7c 0x1 0x7c 0x1 0x7c 0x1 0x7d 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x1b7740 0x27ac40 0x2932e0 0x29f630 0x2ab980 0x2b7cd0 0x2c4020 0x2dc6c0>;
				off_on_delay = <0x4e20>;
			};

			ldo20 {
				volt_id = <0x17>;
				volt_name = "ldo20";
				reg_ctrl = <0x7e 0x1 0x7e 0x1 0x7e 0x1 0x7f 0xf>;
				voltage_nums = <0x10>;
				voltage_table = <0xc3500 0xcf850 0xdbba0 0xe7ef0 0xf4240 0x100590 0x10c8e0 0x124f80 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620 0x13fd30 0x142440>;
				off_on_delay = <0x4e20>;
			};

			ldo21 {
				volt_id = <0x18>;
				volt_name = "ldo21";
				reg_ctrl = <0x80 0x1 0x80 0x1 0x80 0x1 0x81 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x19f0a0 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0>;
				off_on_delay = <0x4e20>;
			};

			ldo22 {
				volt_id = <0x19>;
				volt_name = "ldo22";
				reg_ctrl = <0x82 0x1 0x82 0x1 0x82 0x1 0x83 0xf>;
				voltage_nums = <0x10>;
				voltage_table = <0xf4240 0x100590 0x10c8e0 0x118c30 0x124f80 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620 0x13fd30 0x142440 0x144b50 0x147260 0x16e360>;
				off_on_delay = <0x4e20>;
			};

			ldo23 {
				volt_id = <0x1a>;
				volt_name = "ldo23";
				reg_ctrl = <0x84 0x1 0x84 0x1 0x84 0x1 0x85 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x27ac40 0x2932e0 0x2ab980 0x2c4020 0x2dc6c0 0x2f4d60 0x30d400 0x325aa0>;
				off_on_delay = <0x4e20>;
			};

			ldo24 {
				volt_id = <0x1b>;
				volt_name = "ldo24";
				reg_ctrl = <0x86 0x1 0x86 0x1 0x86 0x1 0x87 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x27ac40 0x2932e0 0x2ab980 0x2b7cd0 0x2dc6c0 0x2f4d60 0x30d400 0x325aa0>;
				off_on_delay = <0x4e20>;
			};

			ldo25 {
				volt_id = <0x1c>;
				volt_name = "ldo25";
				reg_ctrl = <0x88 0x1 0x88 0x1 0x88 0x1 0x89 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x16e360 0x1b7740 0x249f00 0x2625a0 0x27ac40 0x2932e0 0x2b7cd0 0x2dc6c0>;
				off_on_delay = <0x4e20>;
			};

			ldo26 {
				volt_id = <0x1d>;
				volt_name = "ldo26";
				reg_ctrl = <0x8a 0x1 0x8a 0x1 0x8a 0x1 0x8b 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x16e360 0x17a6b0 0x186a00 0x192d50 0x19f0a0 0x1ab3f0 0x1b7740 0x1c3a90>;
				off_on_delay = <0x4e20>;
			};

			ldo27 {
				volt_id = <0x1e>;
				volt_name = "ldo27";
				reg_ctrl = <0x8c 0x1 0x8c 0x1 0x8c 0x1 0x8d 0xf>;
				voltage_nums = <0x10>;
				voltage_table = <0x2191c0 0x225510 0x231860 0x23dbb0 0x243d58 0x249f00 0x2500a8 0x256250 0x25c3f8 0x2625a0 0x26e8f0 0x27ac40 0x286f90 0x2932e0 0x2ab980 0x2b7cd0>;
				off_on_delay = <0x4e20>;
			};

			ldo28 {
				volt_id = <0x1f>;
				volt_name = "ldo28";
				reg_ctrl = <0x8e 0x1 0x8e 0x1 0x8e 0x1 0x8f 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x19f0a0 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0>;
				off_on_delay = <0x4e20>;
			};

			ldo29 {
				volt_id = <0x20>;
				volt_name = "ldo29";
				reg_ctrl = <0x90 0x1 0x90 0x1 0x90 0x1 0x91 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0xf4240 0x100590 0x10c8e0 0x124f80 0x1312d0 0x13d620 0x16e360 0x17a6b0>;
				off_on_delay = <0x4e20>;
			};

			ldo30 {
				volt_id = <0x21>;
				volt_name = "ldo30";
				reg_ctrl = <0x92 0x1 0x92 0x1 0x92 0x1 0x93 0xf>;
				voltage_nums = <0x10>;
				voltage_table = <0xaae60 0xb1008 0xb71b0 0xbd358 0xc0df0 0xc3500 0xc5c10 0xc96a8 0xcaa30 0xcf850 0xd59f8 0xdbba0 0xe1d48 0xe7ef0 0xee098 0xf4240>;
				off_on_delay = <0x4e20>;
			};

			ldo31 {
				volt_id = <0x22>;
				volt_name = "ldo31";
				reg_ctrl = <0x94 0x1 0x94 0x1 0x94 0x1 0x95 0x7>;
				voltage_nums = <0x8>;
				voltage_table = <0x2625a0 0x27ac40 0x2932e0 0x2ab980 0x2c4020 0x2dc6c0 0x2f4d60 0x30d400>;
				off_on_delay = <0x4e20>;
			};

			ldo32 {
				volt_id = <0x23>;
				volt_name = "ldo32";
				reg_ctrl = <0x96 0x1 0x96 0x1 0x96 0x1 0x97 0xf>;
				voltage_nums = <0x10>;
				voltage_table = <0xc3500 0xcf850 0xdbba0 0xe7ef0 0xf4240 0x100590 0x10c8e0 0x124f80 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620 0x13fd30 0x142440>;
				off_on_delay = <0x4e20>;
			};
		};

		pmic_volt_linear@pmic_volt_linear {
			compatible = "hisilicon,pmic_volt_linear";

			buck1 {
				volt_id = <0x1>;
				volt_name = "buck1";
				reg_ctrl = <0x9a 0x1 0x9a 0x1 0x9a 0x1 0x9b 0xf>;
				voltage_nums = <0x10>;
				voltage_base_step = <0xe1d48 0x61a8>;
				off_on_delay = <0x4e20>;
			};

			buck2 {
				volt_id = <0x2>;
				volt_name = "buck2";
				reg_ctrl = <0x9c 0x1 0x9c 0x1 0x9c 0x1 0x9d 0xf>;
				voltage_nums = <0x10>;
				voltage_base_step = <0x149970 0x61a8>;
				off_on_delay = <0x4e20>;
			};

			buck3 {
				volt_id = <0x3>;
				volt_name = "buck3";
				reg_ctrl = <0x9e 0x1 0x9e 0x1 0x9e 0x1 0x9f 0xf>;
				voltage_nums = <0x10>;
				voltage_base_step = <0x1b7740 0xc350>;
				off_on_delay = <0x4e20>;
			};
		};

		pmic_volt_const@pmic_volt_const {
			compatible = "hisilicon,pmic_volt_const";
		};

		pmic_volt_lastnode@pmic_volt_lastnode {
			compatible = "hisilicon,pmic_volt_lastnode";
		};
	};

	pmic_exc {
		compatible = "hisilicon,pmic_exc_app";
		#address-cells = <0x1>;
		data_width = <0x8>;
		ranges;
		status = "ok";

		pmic_pro {
			compatible = "hisilicon,pmic_exc_pro";
			ocp_reon = <0x0>;
			ocp_rst = <0x0>;
			otp_rst = <0x0>;
			otp_off_num = <0x0>;
		};

		pmic_ocp {
			compatible = "hisilicon,pmic_exc_ocp";
			interrupt-parent = <0x36>;
			interrupts = <0x8 0x0>;
			interrupt-names = "ocp";

			ocp_a0@ocp_0x124 {
				ocp_addr = <0x124>;
				ocp_id = <0x7 0x6 0x5 0x4 0x3 0x2 0x1 0x0>;
				ocp_name = "ocp_ldo2", "ocp_ldo1", "ocp_ldo0_2", "ocp_buck4", "ocp_buck3", "ocp_buck2", "ocp_buck1", "ocp_buck0";
			};

			ocp_a1@ocp_0x125 {
				ocp_addr = <0x125>;
				ocp_id = <0xf 0xe 0xd 0xc 0xb 0xa 0x9 0x8>;
				ocp_name = "ocp_ldo11", "ocp_ldo10", "ocp_ldo9", "ocp_ldo8", "ocp_ldo7", "ocp_ldo5", "ocp_ldo4", "ocp_ldo3";
			};

			ocp_a2@ocp_0x126 {
				ocp_addr = <0x126>;
				ocp_id = <0x17 0x16 0x15 0x14 0x13 0x12 0x11 0x10>;
				ocp_name = "ocp_ldo20", "ocp_ldo19", "ocp_ldo17", "ocp_ldo16", "ocp_ldo15", "ocp_ldo14", "ocp_ldo13", "ocp_ldo12";
			};

			ocp_a3@ocp_0x127 {
				ocp_addr = <0x127>;
				ocp_id = <0x1f 0x1e 0x1d 0x1c 0x1b 0x1a 0x19 0x18>;
				ocp_name = "ocp_ldo28", "ocp_ldo27", "ocp_ldo26", "ocp_ldo25", "ocp_ldo24", "ocp_ldo23", "ocp_ldo22", "ocp_ldo21";
			};

			ocp_a4@ocp_0x128 {
				ocp_addr = <0x128>;
				ocp_id = <0xff 0xff 0xff 0xff 0x23 0x22 0x21 0x20>;
				ocp_name = "ocp_classd", "reserved", "reserved", "reserved", "ocp_ldo32", "ocp_ldo31", "ocp_ldo30", "ocp_ldo29";
			};

			ocp_a5@ocp_0x129 {
				ocp_addr = <0x129>;
				ocp_id = <0x4 0x3 0x2 0x1 0x0 0xff 0xff 0xff>;
				ocp_name = "scp_buck4", "scp_buck3", "scp_buck2", "scp_buck1", "scp_buck0", "reserved", "reserved", "reserved";
			};
		};

		pmic_ocp_modem {
			compatible = "hisilicon,pmic_ocp_modem";

			ldo14@ldo14 {
				id = <0x12>;
			};

			ldo3@ldo3 {
				id = <0x8>;
			};

			ldo22@ldo22 {
				id = <0x19>;
			};

			ldo1@ldo1 {
				id = <0x6>;
			};

			ldo12@ldo12 {
				id = <0x10>;
			};

			ldo11@ldo11 {
				id = <0xf>;
			};
		};

		pmic_otp {
			compatible = "hisilicon,pmic_exc_otp";
			interrupt-parent = <0x36>;
			interrupts = <0xf 0x0>;
			interrupt-names = "otp";
			otp_info = <0xf 0xaa 0x30 0x3 0x4>;
		};

		pmic_uvp {
			compatible = "hisilicon,pmic_exc_uvp";
			interrupt-parent = <0x36>;
			interrupts = <0xb 0x0>;
			interrupt-names = "uvp";
			uvp_info = <0xb 0xc2 0xf 0xe 0x0>;
		};

		pmic_record {
			compatible = "hisilicon,pmic_exc_record";

			record_a0@record_0x11a {
				record_addr = <0x11a>;
				inacceptable_event = <0xff>;
				record_name = "ocp_ldo2", "ocp_ldo1", "ocp_ldo0_2", "ocp_buck4", "ocp_buck3", "ocp_buck2", "ocp_buck1", "ocp_buck0";
			};

			record_a1@record_0x11b {
				record_addr = <0x11b>;
				inacceptable_event = <0xff>;
				record_name = "ocp_ldo11", "ocp_ldo10", "ocp_ldo9", "ocp_ldo8", "ocp_ldo7", "ocp_ldo5", "ocp_ldo4", "ocp_ldo3";
			};

			record_a2@record_0x11c {
				record_addr = <0x11c>;
				inacceptable_event = <0xff>;
				record_name = "ocp_ldo20", "ocp_ldo19", "ocp_ldo17", "ocp_ldo16", "ocp_ldo15", "ocp_ldo14", "ocp_ldo13", "ocp_ldo12";
			};

			record_a3@record_0x11d {
				record_addr = <0x11d>;
				inacceptable_event = <0xff>;
				record_name = "ocp_ldo28", "ocp_ldo27", "ocp_ldo26", "ocp_ldo25", "ocp_ldo24", "ocp_ldo23", "ocp_ldo22", "ocp_ldo21";
			};

			record_a4@record_0x11e {
				record_addr = <0x11e>;
				inacceptable_event = <0xf1>;
				record_name = "ocp_classd", "reserved", "reserved", "reserved", "ocp_ldo32", "ocp_ldo31", "ocp_ldo30", "ocp_ldo29";
			};

			record_a5@record_0x11f {
				record_addr = <0x11f>;
				inacceptable_event = <0x1f>;
				record_name = "scp_buck4", "scp_buck3", "scp_buck2", "scp_buck1", "scp_buck0", "reserved", "reserved", "reserved";
			};

			record_a6@record_0x12a {
				record_addr = <0x12a>;
				inacceptable_event = <0x0>;
				record_name = "press8s_restart", "pwrhold_shutdown", "press8s_shutdown", "pwrhold_pwrup", "alarm_pwrup", "vbus_pwrup", "press500ms_pwrup", "fast_pwrup";
			};

			record_a7@record_0x12b {
				record_addr = <0x12b>;
				inacceptable_event = <0xb0>;
				record_name = "tcxo_sel_r", "dcxo_sel_r", "dcxo_sel_f", "vsys_vcoin_sel", "smpl", "core_io_vld_f", "reserved", "sys_nrst_1s";
			};
		};
	};

	pmic_rtc {
		compatible = "arm,rtc_pmu";
		alarm_num = <0x1>;
		rtc_reg = <0x12c 0x134 0x138>;
		rst_reg = <0x104 0x22>;
		clk_reg = <0xfff 0x1>;
		status = "ok";
	};

	rtc@a0 {
		compatible = "hisilicon,pmic_rtc_alarm0";
		id_index = <0x0>;
		interrupt-parent = <0x36>;
		interrupts = <0x3 0x0>;
		interrupt-names = "alarm";
		base = <0x130>;
		status = "ok";
	};

	pmic_dr_ap {
		compatible = "hisilicon,pmic_dr_app";
		pmic_dr_num = <0x1 0x5>;

		pmic_dr1@pmic_dr1 {
			dr_id = <0x0>;
			dr_name = "dr1";
			reg_ctrl = <0xb2 0x0 0xb6 0x7>;
			current_nums = <0x8>;
			current_table = <0xbb8 0x1770 0x2328 0x2ee0 0x3a98 0x4650 0x5208 0x5dc0>;
			fla_ctrl = <0xad 0x0 0xad 0x1 0xae 0x7a12 0xaf 0x1e85>;
			bre_ctrl = <0xb3 0x0 0xb3 0x1 0xb4 0x8 0x7 0x4 0x7 0x0 0xb5 0x8 0x7 0x0 0x7 0x4>;
			bre_onofftime_table = <0x1 0xfa 0x1f4 0x3e8 0x7d0 0xfa0 0xfa0 0xc350>;
			bre_risefalltime_table = <0x0 0xfa 0x1f4 0x3e8 0x7d0 0x9c4 0xbb8 0xfa0>;
			start_del_ctrl = <0x0 0x0 0x0 0x0>;
		};

		pmic_dr2@pmic_dr2 {
			dr_id = <0x1>;
			dr_name = "dr2";
			reg_ctrl = <0xb2 0x1 0xb7 0x7>;
			current_nums = <0x8>;
			current_table = <0xbb8 0x1770 0x2328 0x2ee0 0x3a98 0x4650 0x5208 0x5dc0>;
			fla_ctrl = <0xad 0x2 0xad 0x3 0xae 0x7a12 0xaf 0x1e85>;
			bre_ctrl = <0xb3 0x4 0xb3 0x5 0xb4 0x8 0x7 0x4 0x7 0x0 0xb5 0x8 0x7 0x0 0x7 0x4>;
			bre_onofftime_table = <0x1 0xfa 0x1f4 0x3e8 0x7d0 0xfa0 0xfa0 0xc350>;
			bre_risefalltime_table = <0x0 0xfa 0x1f4 0x3e8 0x7d0 0x9c4 0xbb8 0xfa0>;
			start_del_ctrl = <0x0 0x0 0x0 0x0>;
		};

		pmic_dr3@pmic_dr3 {
			dr_id = <0x2>;
			dr_name = "dr3";
			reg_ctrl = <0xb2 0x2 0xba 0x7>;
			current_nums = <0x8>;
			current_table = <0x3e8 0x5dc 0x7d0 0x9c4 0xbb8 0xdac 0xfa0 0x1194>;
			fla_ctrl = <0xac 0x0 0xac 0x1 0xb0 0x7a12 0xb1 0x1e85>;
			bre_ctrl = <0xb8 0x0 0x0 0x0 0xc0 0xb 0xf 0x4 0xf 0x0 0xc1 0x8 0x7 0x0 0x7 0x4>;
			bre_onofftime_table = <0x0 0x1f4 0x3e8 0x7d0 0xfa0 0x1770 0x1f40 0x2ee0 0x36b0 0x3e80 0xc350>;
			bre_risefalltime_table = <0x0 0xfa 0x1f4 0x3e8 0x7d0 0x9c4 0xbb8 0xfa0>;
			start_del_ctrl = <0xbb 0x7d 0x0 0x8000>;
		};

		pmic_dr4@pmic_dr4 {
			dr_id = <0x3>;
			dr_name = "dr4";
			reg_ctrl = <0xb2 0x3 0xbc 0x7>;
			current_nums = <0x8>;
			current_table = <0x3e8 0x5dc 0x7d0 0x9c4 0xbb8 0xdac 0xfa0 0x1194>;
			fla_ctrl = <0xac 0x2 0xac 0x3 0xb0 0x7a12 0xb1 0x1e85>;
			bre_ctrl = <0xb8 0x1 0x0 0x0 0xc0 0xb 0xf 0x4 0xf 0x0 0xc1 0x8 0x7 0x0 0x7 0x4>;
			bre_onofftime_table = <0x0 0x1f4 0x3e8 0x7d0 0xfa0 0x1770 0x1f40 0x2ee0 0x36b0 0x3e80 0xc350>;
			bre_risefalltime_table = <0x0 0xfa 0x1f4 0x3e8 0x7d0 0x9c4 0xbb8 0xfa0>;
			start_del_ctrl = <0xbd 0x7d 0x0 0x8000>;
		};

		pmic_dr5@pmic_dr5 {
			dr_id = <0x4>;
			dr_name = "dr5";
			reg_ctrl = <0xb2 0x4 0xbe 0x7>;
			current_nums = <0x8>;
			current_table = <0x3e8 0x5dc 0x7d0 0x9c4 0xbb8 0xdac 0xfa0 0x1194>;
			fla_ctrl = <0xac 0x4 0xac 0x5 0xb0 0x7a12 0xb1 0x1e85>;
			bre_ctrl = <0xb8 0x2 0x0 0x0 0xc0 0xb 0xf 0x4 0xf 0x0 0xc1 0x8 0x7 0x0 0x7 0x4>;
			bre_onofftime_table = <0x0 0x1f4 0x3e8 0x7d0 0xfa0 0x1770 0x1f40 0x2ee0 0x36b0 0x3e80 0xc350>;
			bre_risefalltime_table = <0x0 0xfa 0x1f4 0x3e8 0x7d0 0x9c4 0xbb8 0xfa0>;
			start_del_ctrl = <0xbf 0x7d 0x0 0x8000>;
		};
	};

	coul_app@0 {
		compatible = "hisilicon,coul_app";
		interrupts;
		coul_int = <0x14b 0x14c 0x4 0x121 0x9>;
		soft_rst_n = <0x1ac 0x0 0x7>;
		coul_ctrl_onoff_reg = <0x151 0x7 0x7>;
		calibration_ctrl = <0x151 0x6 0x6>;
		eco_filter_time = <0x151 0x4 0x5>;
		reflash_value_ctrl = <0x151 0x3 0x3>;
		eco_ctrl = <0x151 0x0 0x2>;
		eco_reflash_time = <0x152 0x0 0x7>;
		cl_in = <0x157 0x158 0x159 0x15a>;
		cl_out = <0x153 0x154 0x155 0x156>;
		chg_timer = <0x15b 0x15c 0x15d 0x15e>;
		load_timer = <0x15f 0x160 0x161 0x162>;
		cl_int = <0x163 0x164 0x165 0x166>;
		v_int = <0x167 0x168>;
		offset_current = <0x169 0x16a>;
		offset_voltage = <0x16b 0x16c>;
		v_ocv_data = <0x16d 0x16e>;
		i_ocv_data = <0x16f 0x170>;
		v_out_pre0 = <0x179 0x17a>;
		current_pre0 = <0x18d 0x18e>;
		status = "ok";
	};

	comm_32k@0 {
		compatible = "hisilicon,pmic_comm_32k";

		32k_bt@32k_bt {
			id = <0x0>;
			32k_ctrl = <0xcc 0x1>;
		};

		32k_gps@32k_gps {
			id = <0x1>;
			32k_ctrl = <0xcc 0x2>;
		};
	};

	comm_codec@0 {
		compatible = "hisilicon,pmic_comm_xo";

		xo_codec@xo_codec {
			id = <0x0>;
			xo_ctrl = <0x10a 0x0>;
		};

		xo_wifibt@xo_wifibt {
			id = <0x1>;
			xo_ctrl = <0x10a 0x2>;
		};
	};

	pmic@0x9001a000 {
		compatible = "hisilicon,pmu_pmic_app";
		reg = <0x9001a000 0x1000>;
		interrupts = <0x0 0x5f 0x4>;
		irq_data_width = <0x8>;
		arrys = <0x4 0x4 0x6>;
		irq_reg = <0x120 0x121 0x122 0x123>;
		irq_mask_reg = <0xe1 0xe2 0xe3 0xe4>;
		ocp_irq_reg = <0x124 0x125 0x126 0x127 0x128 0x129>;
		irq_special = <0x3 0x1 0x5 0xf 0x10 0x0 0xc0 0x6 0x7>;
		status = "ok";
		linux,phandle = <0x36>;
		phandle = <0x36>;
	};

	pmic_sft@0x81fe0000 {
		compatible = "hisilicon,pmu_pmicsft_app";
		reg = <0x81fe0000 0x1000>;
		interrupts = <0x0 0x7f 0x4>;
		status = "ok";
	};

	pmu_balong_test_app {
		compatible = "hisilicon,pmu_balong_test_app";

		pmu_pmic_test@0xe19cf000 {
			compatible = "hisilicon,pmu_pmic_test";

			test_buck0 {
				volt_id = <0x0>;
				volt_name = "buck0";
				test_flag = <0x0 0x0>;
			};

			test_buck1 {
				volt_id = <0x1>;
				volt_name = "buck1";
				test_flag = <0x0 0x0>;
			};

			test_buck2 {
				volt_id = <0x2>;
				volt_name = "buck2";
				test_flag = <0x0 0x0>;
			};

			test_buck3 {
				volt_id = <0x3>;
				volt_name = "buck3";
				test_flag = <0x0 0x0>;
			};

			test_buck4 {
				volt_id = <0x4>;
				volt_name = "buck4";
				test_flag = <0x0 0x0>;
			};

			test_ldo0 {
				volt_id = <0x5>;
				volt_name = "ldo0_2";
				test_flag = <0x0 0x0>;
			};

			test_ldo1 {
				volt_id = <0x6>;
				volt_name = "ldo1";
				test_flag = <0x1 0x1>;
			};

			test_ldo2 {
				volt_id = <0x7>;
				volt_name = "ldo2";
				test_flag = <0x0 0x0>;
			};

			test_ldo3 {
				volt_id = <0x8>;
				volt_name = "ldo3";
				test_flag = <0x1 0x1>;
			};

			test_ldo4 {
				volt_id = <0x9>;
				volt_name = "ldo4";
				test_flag = <0x1 0x1>;
			};

			test_ldo5 {
				volt_id = <0xa>;
				volt_name = "ldo5";
				test_flag = <0x0 0x0>;
			};

			test_ldo7 {
				volt_id = <0xb>;
				volt_name = "ldo7";
				test_flag = <0x0 0x0>;
			};

			test_ldo8 {
				volt_id = <0xc>;
				volt_name = "ldo8";
				test_flag = <0x1 0x1>;
			};

			test_ldo9 {
				volt_id = <0xd>;
				volt_name = "ldo9";
				test_flag = <0x1 0x1>;
			};

			test_ldo10 {
				volt_id = <0xe>;
				volt_name = "ldo10";
				test_flag = <0x0 0x0>;
			};

			test_ldo11 {
				volt_id = <0xf>;
				volt_name = "ldo11";
				test_flag = <0x1 0x1>;
			};

			test_ldo12 {
				volt_id = <0x10>;
				volt_name = "ldo12";
				test_flag = <0x1 0x1>;
			};

			test_ldo13 {
				volt_id = <0x11>;
				volt_name = "ldo13";
				test_flag = <0x1 0x1>;
			};

			test_ldo14 {
				volt_id = <0x12>;
				volt_name = "ldo14";
				test_flag = <0x1 0x1>;
			};

			test_ldo15 {
				volt_id = <0x13>;
				volt_name = "ldo15";
				test_flag = <0x1 0x1>;
			};

			test_ldo16 {
				volt_id = <0x14>;
				volt_name = "ldo16";
				test_flag = <0x1 0x1>;
			};

			test_ldo17 {
				volt_id = <0x15>;
				volt_name = "ldo17";
				test_flag = <0x1 0x1>;
			};

			test_ldo19 {
				volt_id = <0x16>;
				volt_name = "ldo19";
				test_flag = <0x1 0x1>;
			};

			test_ldo20 {
				volt_id = <0x17>;
				volt_name = "ldo20";
				test_flag = <0x1 0x1>;
			};

			test_ldo21 {
				volt_id = <0x18>;
				volt_name = "ldo21";
				test_flag = <0x1 0x1>;
			};

			test_ldo22 {
				volt_id = <0x19>;
				volt_name = "ldo22";
				test_flag = <0x1 0x1>;
			};

			test_ldo23 {
				volt_id = <0x1a>;
				volt_name = "ldo23";
				test_flag = <0x0 0x0>;
			};

			test_ldo24 {
				volt_id = <0x1b>;
				volt_name = "ldo24";
				test_flag = <0x1 0x1>;
			};

			test_ldo25 {
				volt_id = <0x1c>;
				volt_name = "ldo25";
				test_flag = <0x1 0x1>;
			};

			test_ldo26 {
				volt_id = <0x1d>;
				volt_name = "ldo26";
				test_flag = <0x0 0x0>;
			};

			test_ldo27 {
				volt_id = <0x1e>;
				volt_name = "ldo27";
				test_flag = <0x0 0x0>;
			};

			test_ldo28 {
				volt_id = <0x1f>;
				volt_name = "ldo28";
				test_flag = <0x1 0x1>;
			};

			test_ldo29 {
				volt_id = <0x20>;
				volt_name = "ldo29";
				test_flag = <0x1 0x1>;
			};

			test_ldo30 {
				volt_id = <0x21>;
				volt_name = "ldo30";
				test_flag = <0x0 0x0>;
			};

			test_ldo31 {
				volt_id = <0x22>;
				volt_name = "ldo31";
				test_flag = <0x1 0x1>;
			};

			test_ldo32 {
				volt_id = <0x23>;
				volt_name = "ldo32";
				test_flag = <0x1 0x1>;
			};
		};
	};

	rsa@0x90004000 {
		compatible = "hisilicon,rsa";
		reg = <0x90004000 0x1000>;
		status = "ok";
	};

	gpio_keys {
		compatible = "balong_gpio_key";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		autorepeat = <0x0>;

		button@1 {
			label = "WPS key";
			linux,code = <0x8b>;
			linux,input-type = <0x1>;
			active-low = <0x0>;
			gpio-num = <0x6>;
			debounce-interval = <0x14>;
			gpio-key,wakeup = <0x1>;
		};

		button@2 {
			label = "reset key";
			linux,code = <0xc2>;
			linux,input-type = <0x1>;
			active-low = <0x0>;
			gpio-num = <0x4>;
			debounce-interval = <0x14>;
			gpio-key,wakeup = <0x1>;
		};

		button@3 {
			label = "LEVEL key";
			linux,code = <0xee>;
			linux,input-type = <0x1>;
			active-low = <0x0>;
			gpio-num = <0x5>;
			debounce-interval = <0x14>;
			gpio-key,wakeup = <0x1>;
		};
	};

	dsp@49000000 {
		compatible = "hisilicon,dsp_balong_dtcm";
		bbe16_pd_clk_stat = <0x80200000 0x8 0x0 0x0>;
		bbe16_core_clk_stat = <0x80200000 0x8 0x1 0x1>;
		bbe16_pd_srst_stat = <0x80200000 0x28 0x0 0x0>;
		bbe16_core_srst_stat = <0x80200000 0x28 0x1 0x1>;
		bbe16_mtcmos_rdy_stat = <0x80200000 0xe04 0x1 0x1>;
		bbe16_iso_ctrl_stat = <0x80200000 0xc14 0x1 0x1>;
		status = "ok";
	};

	socp1@91000000 {
		compatible = "hisilicon,socp_balong_app";
		reg = <0x91000000 0x1000>;
		interrupts = <0x0 0xe 0x4>;
		dst_chan_cfg = <0x0 0x200000 0x0 0x0>;
		status = "ok";
		linux,phandle = <0x2f>;
		phandle = <0x2f>;
	};

	smntn_app@0x45700000 {
		compatible = "hisilicon,smntn_app";
		reg = <0x45700000 0x100000>;
	};

	smntn_type {
		compatible = "hisilicon,smntn_type";
		product_type = "MBB";
	};

	coresight {
		compatible = "arm,coresight";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;

		etf@90483000 {
			compatible = "arm,coresight-tmc";
			reg = <0x90483000 0x1000>;
			coresight-id = <0x0>;
			coresight-name = "coresight-etf-cp";
			coresight-nr-inports = <0x1>;
			linux,phandle = <0x37>;
			phandle = <0x37>;
		};

		tmc@90483000 {
			compatible = "arm,tmc-cp";
			reg = <0x90483000 0x1000>;
		};

		etf@904C2000 {
			compatible = "arm,coresight-tmc";
			reg = <0x904c2000 0x1000>;
			coresight-id = <0x1>;
			coresight-name = "coresight-etf-ap";
			coresight-nr-inports = <0x1>;
			coresight-default-sink;
			linux,phandle = <0x38>;
			phandle = <0x38>;
		};

		tmc@904C2000 {
			compatible = "arm,tmc-ap";
			reg = <0x904c2000 0x1000>;
		};

		ptm@904BC000 {
			compatible = "arm,coresight-etm";
			reg = <0x904bc000 0x1000>;
			coresight-id = <0x2>;
			coresight-name = "coresight-ptm-cp";
			coresight-nr-inports = <0x0>;
			coresight-outports = <0x0>;
			coresight-child-list = <0x37>;
			coresight-child-ports = <0x0>;
		};

		ptm@904FC000 {
			compatible = "arm,coresight-etm";
			reg = <0x904fc000 0x1000>;
			coresight-id = <0x3>;
			coresight-name = "coresight-ptm-ap";
			coresight-nr-inports = <0x0>;
			coresight-outports = <0x0>;
			coresight-child-list = <0x38>;
			coresight-child-ports = <0x0>;
		};
	};

	sim@0 {
		compatible = "hisilicon,sim0_ap";
		sim0_hpd_low = <0x1b>;
		sim0_hpd_high = <0x1a>;
		sim0_hpd_fall = <0x19>;
		sim0_hpd_raise = <0x18>;
		sim0_gpio = <0x7>;
		status = "ok";
	};

	modem_etb {
		compatible = "coresight,modem-etb";
		reg = <0x90483000 0x1000>;
	};

	modem_etm {
		compatible = "coresight,modem-etm";
		reg = <0x904bc000 0x1000>;
	};

	gmac0@90104000 {
		compatible = "hisilicon,dwmac";
		reg = <0x90104000 0x4000>;
		interrupts = <0x0 0xae 0x4 0x0 0xaf 0x4 0x0 0xb1 0x4>;
		interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
		clocks = <0x39 0x3a 0x3b 0x3c 0x3d>;
		clock-names = "gmac_aclk", "gmac_switch_clk", "gmac_gtx_clk", "gmac_tx_clk", "gmac_rx_clk";
		mac-address = [00 00 00 00 00 00];
		phy-mode = "rgmii";
		gmac_srst_dis = <0x90000070 0xb 0xb>;
	};

	ipf1@91003000 {
		compatible = "hisilicon,ipf_balong_app";
		reg = <0x91003000 0x1000>;
		interrupts = <0x0 0xd 0x4>;
		status = "ok";
	};

	dwmmc0@910fc000 {
		compatible = "hisilicon,hi6950-dw-mshc";
		is_support = <0x0>;
		reg = <0x910fc000 0x1000>;
		interrupts = <0x0 0x4b 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		mmc-type = "sdio";
		mmc-idx = <0x0>;
		clocks = <0x12 0x17 0x3e 0x3f>;
		clock-names = "parent", "mux", "biu", "ciu";
		vmmc-supply = <0x40>;
		num-slots = <0x1>;
		sd_mtcmos-vcc-supply = <0x40>;
		delay-chain-select-bits = <0x2>;
		shift-step-select-bits = <0x5>;
		shift-step-select-vaild-bits = <0x3>;
		max-frequency = <0x8f0d180>;
		mmc0_srst_en = <0x9000006c 0x6 0x6>;
		mmc0_srst_dis = <0x90000070 0x6 0x6>;
		mmc0_sample_sel = <0x90000114 0x8 0xe>;
		mmc0_clk_bypass = <0x90000114 0x7 0x7>;
		mmc0_ctrl = <0x90000114 0x0 0xf>;
		mmc0_sample_tuning_enable = <0x90000800 0x4 0x4>;
		mmc_msc = <0x20000458 0x10 0x10>;
		broken-cd;

		slot@0 {
			reg = <0x0>;
			bus-width = <0x4>;
			disable-wp;
		};
	};

	dwmmc1@910fd000 {
		compatible = "hisilicon,hi6950-dw-mshc";
		is_support = <0x1>;
		reg = <0x910fd000 0x1000>;
		interrupts = <0x0 0x4c 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		mmc-type = "sd";
		mmc-idx = <0x1>;
		clocks = <0x12 0x13 0x41 0x42>;
		clock-names = "parent", "mux", "biu", "ciu";
		card-detect-delay = <0x12c>;
		num-slots = <0x1>;
		sd_mtcmos-vcc-supply = <0x43>;
		sd_io-vcc-supply = <0x44>;
		vmmc-supply = <0x45>;
		delay-chain-select-bits = <0x2>;
		shift-step-select-bits = <0x5>;
		shift-step-select-vaild-bits = <0x4>;
		max-frequency = <0xbebc200>;
		mmc1_srst_en = <0x9000006c 0x7 0x7>;
		mmc1_srst_dis = <0x90000070 0x7 0x7>;
		mmc1_sample_sel = <0x90000114 0x18 0x1e>;
		mmc1_clk_bypass = <0x90000114 0x17 0x17>;
		mmc1_ctrl = <0x90000114 0x10 0x1f>;
		mmc1_sample_tuning_enable = <0x90000800 0x5 0x5>;
		mmc_msc = <0x20000458 0x10 0x10>;
		cd-gpio = <0x3>;
		cd-vol = <0x0>;

		slot@0 {
			reg = <0x0>;
			bus-width = <0x4>;
			disable-wp;
		};
	};

	psam1@91040000 {
		compatible = "hisilicon,psam_balong_app";
		reg = <0x91040000 0x10000>;
		interrupts = <0x0 0xb5 0x4>;
		status = "ok";
	};

	slave@910FF000 {
		compatible = "hisilicon,slave_balong_app";
		reg = <0x910ff000 0x1000>;
		interrupts = <0x0 0x4e 0x4>;
		mmc_msc = <0x20000458 0x10 0x10>;
		status = "ok";
	};

	usb3@0x20000434 {
		compatible = "hisilicon,usb3";
		reg = <0x20000434 0x7>;
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		clocks = <0x46 0x47>;
		clock-names = "usb_core_aclk", "bcctrl_aclk";
		ranges;
		usb_phy_ctrl0_vbusvldextsel = <0x20000434 0x1 0x1>;
		usb_phy_ctrl0_vbusvldext = <0x20000434 0x2 0x2>;
		usb_phy_ctrl0_test_powerdown_hsp = <0x20000434 0x7 0x7>;
		usb_phy_ctrl0_test_powerdown_ssp = <0x20000434 0x8 0x8>;
		usb_phy_ctrl0_ref_ssp_en = <0x20000434 0x1f 0x1f>;
		usb_phy_ctrl1_ssc_en = <0x20000438 0x1 0x1 0x1 0x0>;
		usb_phy_ctrl1_usb3phy_idpullup = <0x20000438 0x10 0x10 0x1 0x1>;
		usb_phy_ctrl2_txpreempamptune = <0x2000043c 0xf 0x10 0x1 0x3>;
		usb_phy_ctrl2_los_bias = <0x2000043c 0x1a 0x1c 0x1 0x3>;
		usb_phy_ctrl3_los_level4_3 = <0x20000440 0x0 0x1 0x1 0x1>;
		usb_phy_ctrl3_pcs_tx_deemph_3p5db = <0x20000440 0x2 0x7 0x1 0x15>;
		usb_phy_ctrl3_pcs_tx_deemph_6db = <0x20000440 0x8 0xd 0x1 0x20>;
		usb_phy_ctrl3_pcs_tx_swing_full = <0x20000440 0xe 0x14 0x1 0x71>;
		usb_phy_ctrl3_lane0_tx_term_offset = <0x20000440 0x15 0x19 0x1 0x0>;
		usb_phy_ctrl3_tx_vboost_lvl = <0x20000440 0x1a 0x1c 0x1 0x7>;
		usb_phy_ctrl4 = <0x20000444 0x0 0x1f>;
		usb3_phy_state_cr_ack = <0x20000440 0x10 0x10>;
		usb3_phy_state_cr_data_out = <0x2000063c 0x0 0xf>;
		usb_controller_ctrl0_usb3_pm_power_state_requset = <0x20000448 0xe 0xf>;
		usb_controller_ctrl0_usb3_pmu_iddig_override = <0x20000448 0x14 0x14>;
		usb_controller_ctrl0_usb3_pmu_avalid_override = <0x20000448 0x15 0x15>;
		usb_controller_ctrl0_usb3_pmu_bvalid_override = <0x20000448 0x16 0x16>;
		usb_controller_ctrl0_usb3_pmu_vbusvalid_override = <0x20000448 0x17 0x17>;
		usb_controller_ctrl0_usb3_pmu_powerpresent_override = <0x20000448 0x19 0x19>;
		usb_controller_ctrl0_usb3_pmu_iddig_override_en = <0x20000448 0x1a 0x1a>;
		usb_controller_ctrl0_usb3_pmu_avalid_override_en = <0x20000448 0x1b 0x1b>;
		usb_controller_ctrl0_usb3_pmu_bvalid_override_en = <0x20000448 0x1c 0x1c>;
		usb_controller_ctrl0_usb3_pmu_vbusvalid_override_en = <0x20000448 0x1d 0x1d>;
		usb_controller_ctrl0_usb3_pmu_powerpresent_override_en = <0x20000448 0x1f 0x1f>;
		usb_controller_ctrl1 = <0x2000044c 0x0 0x1f>;
		usb_controller_ctrl2 = <0x20000450 0x0 0x1f>;
		usb3_pmu_current_power_state_u3pmu = <0x20000640 0x12 0x13>;
		usb3_pmu_current_power_state_u2pmu = <0x20000640 0x10 0x11>;
		usb3_connect_state_u3pmu = <0x20000640 0x0 0x1>;
		usb3_connect_state_u2pmu = <0x20000640 0x0 0x0>;
		usbphy_vcc_srst_dis = <0x20000064 0x16 0x16>;
		usbotg_ctrl_srst_dis = <0x20000064 0x17 0x17>;
		usbctrl_vaux_srst_dis = <0x20000064 0x18 0x18>;
		usbctrl_vcc_srst_dis = <0x20000064 0x19 0x19>;
		usbctrl_vcc_srst_en = <0x20000060 0x19 0x19>;
		usbctrl_vaux_srst_en = <0x20000060 0x18 0x18>;
		usbotg_ctrl_srst_en = <0x20000060 0x17 0x17>;
		usbphy_vcc_srst_en = <0x20000060 0x16 0x16>;

		dwc3@0x91100000 {
			compatible = "synopsys,dwc3";
			reg = <0x91100000 0x100000>;
			interrupts = <0x0 0x7e 0x4 0x0 0x43 0x4>;
			interrupt-names = "usb_irq", "usb_pme_irq";
			usb-phy = <0x48 0x49>;
		};
	};

	usb2phy {
		compatible = "synopsys,usb2phy";
		linux,phandle = <0x48>;
		phandle = <0x48>;
	};

	usb3phy {
		compatible = "synopsys,usb3phy";
		linux,phandle = <0x49>;
		phandle = <0x49>;
	};

	otg@0x9110cc00 {
		compatible = "synopsys,dwc3_otg3";
		interrupts = <0x0 0x60 0x4>;
	};

	bcctrl@0x20013000 {
		compatible = "hisilicon,bcctrl";
		reg = <0x20013000 0x10000>;
		interrupts = <0x0 0x63 0x4>;
		bc_srst_dis = <0x20000064 0x15 0x15>;
	};

	spe@91004000 {
		compatible = "hisilicon,spe";
		reg = <0x91004000 0x4000>;
		interrupts = <0x0 0xb7 0x4>;
		interrupt-names = "spe_irq";
		clocks = <0x4a>;
		clock-names = "spe_clk";
		status = "ok";
		spe_fre_grade_max = <0x8>;
		spe_dfs_interval = <0x32>;
		spe_dfs_freq_grade0 = <0xa 0x5 0xf>;
		spe_dfs_freq_grade1 = <0x1e 0x16 0x26>;
		spe_dfs_freq_grade2 = <0x50 0x41 0x5f>;
		spe_dfs_freq_grade3 = <0x82 0x69 0x9b>;
		spe_dfs_freq_grade4 = <0xc8 0xaf 0xe1>;
		spe_dfs_freq_grade5 = <0x118 0xfa 0x136>;
		spe_dfs_freq_grade6 = <0x168 0x14a 0x186>;
		spe_dfs_freq_grade7 = <0x1f4 0x1d6 0x212>;
		spe_dfs_freq_grade8 = <0x258 0x23a 0x276>;
		spe_pd_crg_srsten3_spe_srst_en = <0x90000078 0x1b 0x1b>;
		spe_pd_crg_srstdis3_spe_srst_dis = <0x9000007c 0x1b 0x1b>;
	};

	hsuart_app@9102e000 {
		compatible = "hisilicon,hsuart_app";
		reg = <0x9102e000 0x1000>;
		interrupts = <0x0 0x45 0x4>;
		hsuart_clk = <0x2dc6c00>;
		status = "ok";
	};

	gpio-leds {
		compatible = "gpio-leds";

		gpio-power-green {
			compatible = "power_led:green";
			label = "power_led:green";
			gpios = <0x5a 0x0>;
			default-state = "off";
			linux,default-trigger = "timer";
		};

		gpio-power-red {
			compatible = "power_led:red";
			label = "power_led:red";
			gpios = <0x5b 0x0>;
			default-state = "on";
			linux,default-trigger = "timer";
		};

		gpio-wifi {
			compatible = "wifi_led:green";
			label = "wifi_led:green";
			gpios = <0x2f 0x0>;
			default-state = "on";
			linux,default-trigger = "timer";
		};

		gpio-sim-green {
			compatible = "sim_led:green";
			label = "sim_led:green";
			gpios = <0x20 0x0>;
			default-state = "on";
			linux,default-trigger = "timer";
		};

		gpio-sim-red {
			compatible = "sim_led:red";
			label = "sim_led:red";
			gpios = <0x26 0x0>;
			default-state = "off";
			linux,default-trigger = "timer";
		};

		gpio-lte-green {
			compatible = "lte_led:green";
			label = "lte_led:green";
			gpios = <0x1f 0x0>;
			default-state = "on";
			linux,default-trigger = "timer";
		};

		gpio-lte-red {
			compatible = "lte_led:red";
			label = "lte_led:red";
			gpios = <0x21 0x0>;
			default-state = "off";
			linux,default-trigger = "timer";
		};

		gpio-led-status {
			compatible = "status_led:green";
			label = "status_led:green";
			gpios = <0x27 0x0>;
			default-state = "on";
			linux,default-trigger = "timer";
		};
	};

	dr-leds {
		compatible = "dr-leds";

		dr-signal1 {
			compatible = "signal1_led:red";
			label = "signal1_led:red";
			drs = <0x1>;
			default-state = "off";
			linux,default-brightness = <0x5a>;
			linux,default-trigger = "timer";
		};

		dr-signal2 {
			compatible = "signal1_led:blue";
			label = "signal1_led:blue";
			drs = <0x2>;
			default-state = "on";
			linux,default-brightness = <0x1e>;
			linux,default-trigger = "timer";
		};

		dr-signal3 {
			compatible = "signal2_led:blue";
			label = "signal2_led:blue";
			drs = <0x4>;
			default-state = "on";
			linux,default-brightness = <0xaa>;
			linux,default-trigger = "timer";
		};

		dr-signal4 {
			compatible = "signal3_led:blue";
			label = "signal3_led:blue";
			drs = <0x3>;
			default-state = "on";
			linux,default-brightness = <0xaa>;
			linux,default-trigger = "timer";
		};
	};

	board_info {
		hisi,boardid = <0x0 0x4 0x0 0x0>;
		hisi,boardname = "hi6950_udp";
		hw,public;
	};

	cache-controller {
		compatible = "arm,pl310-cache";
		reg = <0x4ff00000 0x1000>;
	};

	interrupt-controller@3FE00000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <0x3>;
		interrupt-controller;
		reg = <0x3fe01000 0x1000 0x3fe00100 0x100>;
		linux,phandle = <0x1>;
		phandle = <0x1>;
	};

	timer10@2001c000 {
		compatible = "hisi,ce-timer";
		interrupt-parent = <0x1>;
		interrupts = <0x0 0x37 0x4>;
		reg = <0x2001c000 0x1000>;
		clock-frequency = <0x124f800>;
	};

	timer12@2001d000 {
		compatible = "hisi,cs-timer";
		reg = <0x2001d000 0x1000>;
		clock-frequency = <0x124f800>;
	};
};