Chisel + Circt test with args

ChiselArgs.scala

//> using scala "2.13.8"
//> using lib "edu.berkeley.cs::chisel3::3.5.4"
//> using lib "com.sifive::chisel-circt::0.6.0"
//> using plugin "edu.berkeley.cs:::chisel3-plugin::3.5.4"

import chisel3._
import circt.stage.ChiselStage
import chisel3.stage.ChiselGeneratorAnnotation

class FooBundle extends Bundle {
  val a = Input(Bool())
  val b = Output(Bool())
}

class Foo extends RawModule {
  val a = IO(new FooBundle)
  val b = IO(Flipped(new FooBundle))
  b <> a
}

object Main extends App {
  val chiselArgs =
  Array(
    "--target",
    "systemverilog",
    "--target-dir",
    "generated",
  )
  (new ChiselStage).execute(
    chiselArgs,
    Seq(ChiselGeneratorAnnotation(() => new Foo))
  )
}