- Declaring a clock domain:
self.clock_domains.cd_mycd = ClockDomain()
- Referencing a clock domain:
self.sync.mycd += []
ClockSignal("mycd")
- Requesting an I/O signal:
platform.request("clk12")
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PREFIX=/path/to/install | |
FPGA_ROOT=/root/of/repos | |
NUM_JOBS=4 | |
# If non-zero, enable sscache optimizations. Need to set CC and CXX as well. | |
SCCACHE=0 | |
CC=gcc | |
CXX=g++ | |
# If non-zero, use chipdbs built on another machine. |
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dnl http://mbreen.com/m4.html#toc19 | |
define(`LQ',`changequote(<,>)`dnl' | |
changequote`'')dnl | |
define(`RQ',`changequote(<,>)dnl` | |
'changequote`'')dnl | |
define(`for',`ifelse($#,0,``$0'',`ifelse(eval($2<=$3),1, | |
`pushdef(`$1',$2)$4`'popdef(`$1')$0(`$1',incr($2),$3,`$4')')')')dnl | |
define(`foreach',`ifelse(eval($#>2),1, | |
`pushdef(`$1',`$3')$2`'popdef(`$1')dnl | |
`'ifelse(eval($#>3),1,`$0(`$1',`$2',shift(shift(shift($@))))')')')dnl |
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#!/usr/bin/env python3 | |
from migen import * | |
from migen.build.platforms import icestick | |
class Rot(Module): | |
def __init__(self): | |
self.clk_freq = 12000000 | |
self.ready = Signal() | |
self.rot = Signal(4) |
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[package] | |
name = "take-api" | |
version = "0.1.0" | |
authors = ["William D. Jones <thor0505@comcast.net>"] | |
edition = "2018" | |
[dependencies] | |
bare-metal = {version = "0.2.5", optional = true } | |
[dependencies.msp430-rt] |
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import asyncio | |
import atexit | |
from quamash import QEventLoop, QtGui, QtCore | |
from pyqtgraph import dockarea # Will import PyQt5.QtGui.QApplication | |
class MainWindow(QtGui.QMainWindow): | |
def __init__(self, app, server): | |
QtGui.QMainWindow.__init__(self) |
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# Generated by Yosys 0.8+29 (git sha1 d86ea6ba, x86_64-w64-mingw32-g++ 7.3.0 -Os) | |
autoidx 712 | |
attribute \cells_not_processed 1 | |
attribute \src "boneless.v:3" | |
module \boneless_formal | |
attribute \src "boneless.v:155" | |
wire $0$formal$boneless.v:161$14_CHECK[0:0]$116 | |
attribute \src "boneless.v:155" | |
wire $0$formal$boneless.v:161$14_EN[0:0]$117 | |
attribute \src "boneless.v:161" |
Z
- Is the result zero?S
- Is the top bit of the result set?C
- Did a borrow not occur (see Subtraction on the 6502)?- For architectures with a true borrow flag, invert the
C
bit.
- For architectures with a true borrow flag, invert the
V
- Does the result ofa - b
fit within signed 16-bit range?
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CFLAGS= | |
CPPFLAGS= | |
LDFLAGS= | |
LIBS= | |
RM=rm | |
RMFLAGS=-f | |
INSTALL=install | |
i2ceprog: i2ceprog.c |
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