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Daniel Estévez daniestevez

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daniestevez / last_chunk.grc
Created January 14, 2024 08:18
Mistery FSK signal demodulator
options:
parameters:
author: daniel
catch_exceptions: 'True'
category: '[GRC Hier Blocks]'
cmake_opt: ''
comment: ''
copyright: ''
description: ''
gen_cmake: 'On'
@daniestevez
daniestevez / tea.v
Created July 13, 2023 09:43
Verilog implementation of the Tiny Encryption Algorithm
//
// Copyright (c) 2021 - Daniel Estevez <daniel@destevez.net>
//
// TEA
//
// Verilog implementation of the Tiny Encryption Algorithm
//
`timescale 1ns / 1ps
`default_nettype none
@daniestevez
daniestevez / euclid.grc
Created July 1, 2023 21:44
EUCLID GNU Radio decoder
options:
parameters:
author: Daniel Estevez
catch_exceptions: 'True'
category: '[GRC Hier Blocks]'
cmake_opt: ''
comment: ''
copyright: ''
description: ''
gen_cmake: 'On'
@daniestevez
daniestevez / euclid.script
Created July 1, 2023 20:47
EUCLID GMAT
%General Mission Analysis Tool(GMAT) Script
%Created: 2023-07-01 22:42:05
%----------------------------------------
%---------- Spacecraft
%----------------------------------------
Create Spacecraft Euclid;
GMAT Euclid.DateFormat = UTCGregorian;
@daniestevez
daniestevez / gr_affinity_bug.py
Created February 28, 2023 17:21
Test script for GNU Radio bug: Setting processor affinity of hier_block2 with message ports segfaults
#!/usr/bin/env python3
from gnuradio import gr, blocks
import pmt
import argparse
import signal
import sys
@daniestevez
daniestevez / ad9361_overclock.c
Last active February 19, 2023 20:14
AD9361 overclock snippet
/// Rx Enable and Filter Control register:
/// - Rx Enable = 1
/// The ad9361_en_dis_rx function sets this bit. This bit
/// determines if the receiver is enabled. Setting the bit enables the
/// receiver signal path. Clearing the bit disables the receiver.
/// - RHB3 Enable and Decimation[1:0] = 0b01
/// See note in 0x002[D5:D4]. These bits set the decimation of the
/// first filtering stage after the ADC per Table 4.
/// 00 Decimate by 1, no filtering
/// 01 Decimate by 2 (half-band filter)
@daniestevez
daniestevez / ring_oscillator.json
Created February 12, 2023 09:22
SiliWiz designs
{
"version": 1,
"app": "siliwiz",
"timestamp": 1676193636,
"rects": [
{ "x": 14.4, "y": 2, "height": 390, "width": 382, "layer": "p substrate" },
{ "x": 17.4, "y": 4, "height": 31, "width": 366, "layer": "n well" },
{ "x": 18.4, "y": 262, "height": 30, "width": 368, "layer": "n well" },
{ "x": 51.4, "y": 44, "height": 14, "width": 33, "layer": "n diffusion" },
{ "x": 334.4, "y": 42, "height": 14, "width": 39, "layer": "n diffusion" },
@daniestevez
daniestevez / recording_selection.txt
Created January 5, 2023 15:33
Selection of CAMRAS Artemis I Orion IQ recordings
camras-2022_11_30_19_18_07_2216.500MHz_5.0Msps_ci16_le.png
camras-2022_11_30_19_19_10_2216.500MHz_5.0Msps_ci16_le.png
camras-2022_12_08_15_46_46_2216.500MHz_4.5Msps_ci16_le.png
camras-2022_12_08_16_37_42_2216.500MHz_4.5Msps_ci16_le.png
camras-2022_12_10_21_01_30_2216.500MHz_4.5Msps_ci16_le.png
@daniestevez
daniestevez / plot_spectrum.py
Created January 3, 2023 18:19
Plot spectrum of SigMF recordings
#!/usr/bin/env python3
import json
import pathlib
import numpy as np
import matplotlib.pyplot as plt
def main():
@daniestevez
daniestevez / phase_ear.grc
Created November 30, 2022 20:53
Ear phase resonance experiment GNU Radio flowgraph (see https://mastodon.social/@bert_hubert@fosstodon.org/109433771761220909)
options:
parameters:
author: Daniel Estevez
catch_exceptions: 'True'
category: '[GRC Hier Blocks]'
cmake_opt: ''
comment: ''
copyright: ''
description: ''
gen_cmake: 'On'