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make output for coreboot amd pistachio
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CC romstage.inc | |
In file included from src/mainboard/amd/pistachio/romstage.c:37:0: | |
src/southbridge/amd/sb600/early_setup.c:180:21: error: macro "hard_reset" passed 1 arguments, but takes just 0 | |
void hard_reset(void) | |
^ | |
src/southbridge/amd/sb600/early_setup.c:181:1: error: expected '=', ',', ';', 'asm' or '__attribute__' before '{' token | |
{ | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:89:0: error: "DTL_TCL_MASK" redefined [-Werror] | |
#define DTL_TCL_MASK 7 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:60:0: note: this is the location of the previous definition | |
#define DTL_TCL_MASK 0x7 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:93:0: error: "DTL_TRCD_SHIFT" redefined [-Werror] | |
#define DTL_TRCD_SHIFT 4 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:74:0: note: this is the location of the previous definition | |
#define DTL_TRCD_SHIFT 12 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:94:0: error: "DTL_TRCD_MASK" redefined [-Werror] | |
#define DTL_TRCD_MASK 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:75:0: note: this is the location of the previous definition | |
#define DTL_TRCD_MASK 0x7 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:95:0: error: "DTL_TRCD_BASE" redefined [-Werror] | |
#define DTL_TRCD_BASE 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:76:0: note: this is the location of the previous definition | |
#define DTL_TRCD_BASE 0 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:96:0: error: "DTL_TRCD_MIN" redefined [-Werror] | |
#define DTL_TRCD_MIN 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:77:0: note: this is the location of the previous definition | |
#define DTL_TRCD_MIN 2 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:98:0: error: "DTL_TRP_SHIFT" redefined [-Werror] | |
#define DTL_TRP_SHIFT 8 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:89:0: note: this is the location of the previous definition | |
#define DTL_TRP_SHIFT 24 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:99:0: error: "DTL_TRP_MASK" redefined [-Werror] | |
#define DTL_TRP_MASK 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:90:0: note: this is the location of the previous definition | |
#define DTL_TRP_MASK 0x7 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:100:0: error: "DTL_TRP_BASE" redefined [-Werror] | |
#define DTL_TRP_BASE 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:91:0: note: this is the location of the previous definition | |
#define DTL_TRP_BASE 0 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:101:0: error: "DTL_TRP_MIN" redefined [-Werror] | |
#define DTL_TRP_MIN 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:92:0: note: this is the location of the previous definition | |
#define DTL_TRP_MIN 2 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:108:0: error: "DTL_TRAS_SHIFT" redefined [-Werror] | |
#define DTL_TRAS_SHIFT 12 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:84:0: note: this is the location of the previous definition | |
#define DTL_TRAS_SHIFT 20 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:110:0: error: "DTL_TRAS_BASE" redefined [-Werror] | |
#define DTL_TRAS_BASE 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:86:0: note: this is the location of the previous definition | |
#define DTL_TRAS_BASE 0 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:112:0: error: "DTL_TRAS_MAX" redefined [-Werror] | |
#define DTL_TRAS_MAX 18 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:88:0: note: this is the location of the previous definition | |
#define DTL_TRAS_MAX 15 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:113:0: error: "DTL_TRC_SHIFT" redefined [-Werror] | |
#define DTL_TRC_SHIFT 16 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:64:0: note: this is the location of the previous definition | |
#define DTL_TRC_SHIFT 4 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:115:0: error: "DTL_TRC_BASE" redefined [-Werror] | |
#define DTL_TRC_BASE 11 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:66:0: note: this is the location of the previous definition | |
#define DTL_TRC_BASE 7 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:116:0: error: "DTL_TRC_MIN" redefined [-Werror] | |
#define DTL_TRC_MIN 11 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:67:0: note: this is the location of the previous definition | |
#define DTL_TRC_MIN 7 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:117:0: error: "DTL_TRC_MAX" redefined [-Werror] | |
#define DTL_TRC_MAX 26 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:68:0: note: this is the location of the previous definition | |
#define DTL_TRC_MAX 22 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:118:0: error: "DTL_TWR_SHIFT" redefined [-Werror] | |
#define DTL_TWR_SHIFT 20 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:94:0: note: this is the location of the previous definition | |
#define DTL_TWR_SHIFT 28 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:119:0: error: "DTL_TWR_MASK" redefined [-Werror] | |
#define DTL_TWR_MASK 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:95:0: note: this is the location of the previous definition | |
#define DTL_TWR_MASK 0x1 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:120:0: error: "DTL_TWR_BASE" redefined [-Werror] | |
#define DTL_TWR_BASE 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:96:0: note: this is the location of the previous definition | |
#define DTL_TWR_BASE 2 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:121:0: error: "DTL_TWR_MIN" redefined [-Werror] | |
#define DTL_TWR_MIN 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:97:0: note: this is the location of the previous definition | |
#define DTL_TWR_MIN 2 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:122:0: error: "DTL_TWR_MAX" redefined [-Werror] | |
#define DTL_TWR_MAX 6 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:98:0: note: this is the location of the previous definition | |
#define DTL_TWR_MAX 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:123:0: error: "DTL_TRRD_SHIFT" redefined [-Werror] | |
#define DTL_TRRD_SHIFT 22 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:79:0: note: this is the location of the previous definition | |
#define DTL_TRRD_SHIFT 16 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:124:0: error: "DTL_TRRD_MASK" redefined [-Werror] | |
#define DTL_TRRD_MASK 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:80:0: note: this is the location of the previous definition | |
#define DTL_TRRD_MASK 0x7 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:125:0: error: "DTL_TRRD_BASE" redefined [-Werror] | |
#define DTL_TRRD_BASE 2 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:81:0: note: this is the location of the previous definition | |
#define DTL_TRRD_BASE 0 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:127:0: error: "DTL_TRRD_MAX" redefined [-Werror] | |
#define DTL_TRRD_MAX 5 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:83:0: note: this is the location of the previous definition | |
#define DTL_TRRD_MAX 4 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:145:0: error: "DTH_TWTR_SHIFT" redefined [-Werror] | |
#define DTH_TWTR_SHIFT 8 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:101:0: note: this is the location of the previous definition | |
#define DTH_TWTR_SHIFT 0 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:146:0: error: "DTH_TWTR_MASK" redefined [-Werror] | |
#define DTH_TWTR_MASK 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:102:0: note: this is the location of the previous definition | |
#define DTH_TWTR_MASK 0x1 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:147:0: error: "DTH_TWTR_BASE" redefined [-Werror] | |
#define DTH_TWTR_BASE 0 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:103:0: note: this is the location of the previous definition | |
#define DTH_TWTR_BASE 1 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:149:0: error: "DTH_TWTR_MAX" redefined [-Werror] | |
#define DTH_TWTR_MAX 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:105:0: note: this is the location of the previous definition | |
#define DTH_TWTR_MAX 2 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:165:0: error: "DTH_TREF_SHIFT" redefined [-Werror] | |
#define DTH_TREF_SHIFT 16 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:111:0: note: this is the location of the previous definition | |
#define DTH_TREF_SHIFT 8 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:166:0: error: "DTH_TREF_MASK" redefined [-Werror] | |
#define DTH_TREF_MASK 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:112:0: note: this is the location of the previous definition | |
#define DTH_TREF_MASK 0x1f | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:196:0: error: "DCL_UnBuffDimm" redefined [-Werror] | |
#define DCL_UnBuffDimm (1<<16) | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:141:0: note: this is the location of the previous definition | |
#define DCL_UnBuffDimm (1<<18) | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:197:0: error: "DCL_DimmEccEn" redefined [-Werror] | |
#define DCL_DimmEccEn (1<<19) | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:140:0: note: this is the location of the previous definition | |
#define DCL_DimmEccEn (1<<17) | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:444:0: error: "NBCAP_MEMCLK_200MHZ" redefined [-Werror] | |
#define NBCAP_MEMCLK_200MHZ 3 | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:230:0: note: this is the location of the previous definition | |
#define NBCAP_MEMCLK_200MHZ 0 | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:488:8: error: redefinition of 'struct link_pair_st' | |
struct link_pair_st { | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:242:8: note: originally defined here | |
struct link_pair_st { | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:498:8: error: redefinition of 'struct sys_info' | |
struct sys_info { | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:29:0: | |
src/northbridge/amd/amdk8/raminit.h:14:8: note: originally defined here | |
struct sys_info; | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:31:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/f.h:522:24: error: conflicting types for 'sysinfo_car' | |
extern struct sys_info sysinfo_car; | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:266:24: note: previous declaration of 'sysinfo_car' was here | |
extern struct sys_info sysinfo_car; | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:50:0: | |
src/northbridge/amd/amdk8/raminit_f.c:45:17: error: conflicting types for 'sysinfo_car' | |
struct sys_info sysinfo_car CAR_GLOBAL; | |
^ | |
In file included from src/northbridge/amd/amdk8/amdk8.h:11:0, | |
from src/northbridge/amd/amdk8/setup_resource_map.c:1, | |
from src/mainboard/amd/pistachio/romstage.c:35: | |
src/northbridge/amd/amdk8/pre_f.h:266:24: note: previous declaration of 'sysinfo_car' was here | |
extern struct sys_info sysinfo_car; | |
^ | |
In file included from src/northbridge/amd/amdk8/raminit_f.c:2903:0, | |
from src/mainboard/amd/pistachio/romstage.c:50: | |
src/northbridge/amd/amdk8/raminit_f_dqs.c: In function 'TrainRcvrEn': | |
src/northbridge/amd/amdk8/raminit_f_dqs.c:515:5: error: "K8_REV_F_SUPPORT_F0_F1_WORKAROUND" is not defined [-Werror=undef] | |
#if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1 | |
^ | |
src/northbridge/amd/amdk8/raminit_f_dqs.c:537:5: error: "K8_REV_F_SUPPORT_F0_F1_WORKAROUND" is not defined [-Werror=undef] | |
#if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1 | |
^ | |
src/northbridge/amd/amdk8/raminit_f_dqs.c:825:5: error: "K8_REV_F_SUPPORT_F0_F1_WORKAROUND" is not defined [-Werror=undef] | |
#if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1 | |
^ | |
src/northbridge/amd/amdk8/raminit_f_dqs.c: At top level: | |
src/northbridge/amd/amdk8/raminit_f_dqs.c:1538:5: error: "K8_REV_F_SUPPORT_F0_F1_WORKAROUND" is not defined [-Werror=undef] | |
#if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1 | |
^ | |
src/northbridge/amd/amdk8/raminit_f_dqs.c:1903:5: error: "K8_REV_F_SUPPORT_F0_F1_WORKAROUND" is not defined [-Werror=undef] | |
#if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1 | |
^ | |
src/northbridge/amd/amdk8/raminit_f_dqs.c: In function 'dqs_timing': | |
src/northbridge/amd/amdk8/raminit_f_dqs.c:1940:5: error: "K8_REV_F_SUPPORT_F0_F1_WORKAROUND" is not defined [-Werror=undef] | |
#if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1 | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:50:0: | |
src/northbridge/amd/amdk8/raminit_f.c: In function 'sdram_enable': | |
src/northbridge/amd/amdk8/raminit_f.c:3023:5: error: "K8_REV_F_SUPPORT_F0_F1_WORKAROUND" is not defined [-Werror=undef] | |
#if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1 | |
^ | |
src/northbridge/amd/amdk8/raminit_f.c:3063:37: error: passing argument 3 of 'exit_from_self' from incompatible pointer type [-Werror] | |
exit_from_self(controllers, ctrl, sysinfo); | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:29:0: | |
src/northbridge/amd/amdk8/raminit.h:15:6: note: expected 'struct sys_info *' but argument is of type 'struct sys_info *' | |
void exit_from_self(int controllers, const struct mem_controller *ctrl, struct sys_info *sysinfo); | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:50:0: | |
src/northbridge/amd/amdk8/raminit_f.c:3091:5: error: "K8_REV_F_SUPPORT_F0_F1_WORKAROUND" is not defined [-Werror=undef] | |
#if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1 | |
^ | |
src/northbridge/amd/amdk8/raminit_f.c:3136:5: error: "K8_REV_F_SUPPORT_F0_F1_WORKAROUND" is not defined [-Werror=undef] | |
#if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1 | |
^ | |
src/northbridge/amd/amdk8/raminit_f.c:3191:8: error: "K8_REV_F_SUPPORT_F0_F1_WORKAROUND" is not defined [-Werror=undef] | |
#if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1 | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:51:0: | |
src/northbridge/amd/amdk8/coherent_ht.c: In function 'coherent_ht_finalize': | |
src/northbridge/amd/amdk8/coherent_ht.c:1600:2: error: implicit declaration of function 'read_option' [-Werror=implicit-function-declaration] | |
if (read_option(multi_core, 0) == 0) { /* multi_core */ | |
^ | |
src/northbridge/amd/amdk8/coherent_ht.c:1600:18: error: 'multi_core' undeclared (first use in this function) | |
if (read_option(multi_core, 0) == 0) { /* multi_core */ | |
^ | |
src/northbridge/amd/amdk8/coherent_ht.c:1600:18: note: each undeclared identifier is reported only once for each function it appears in | |
In file included from src/mainboard/amd/pistachio/romstage.c:52:0: | |
src/lib/generic_sdram.c: In function 'sdram_initialize': | |
src/lib/generic_sdram.c:18:3: error: too few arguments to function 'sdram_set_registers' | |
sdram_set_registers(ctrl + i); | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:50:0: | |
src/northbridge/amd/amdk8/raminit_f.c:98:13: note: declared here | |
static void sdram_set_registers(const struct mem_controller *ctrl, struct sys_info *sysinfo) | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:52:0: | |
src/lib/generic_sdram.c:29:17: error: too few arguments to function 'sdram_set_spd_registers' | |
sdram_set_spd_registers(ctrl + i); | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:50:0: | |
src/northbridge/amd/amdk8/raminit_f.c:2832:13: note: declared here | |
static void sdram_set_spd_registers(const struct mem_controller *ctrl, | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:52:0: | |
src/lib/generic_sdram.c:43:2: error: too few arguments to function 'sdram_enable' | |
sdram_enable(controllers, ctrl); | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:50:0: | |
src/northbridge/amd/amdk8/raminit_f.c:3017:13: note: declared here | |
static void sdram_enable(int controllers, const struct mem_controller *ctrl, | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:54:0: | |
src/cpu/amd/dualcore/dualcore.c: In function 'start_other_cores': | |
src/cpu/amd/dualcore/dualcore.c:52:18: error: 'multi_core' undeclared (first use in this function) | |
if (read_option(multi_core, 0)) { | |
^ | |
In file included from src/cpu/amd/model_fxx/init_cpus.c:1:0, | |
from src/mainboard/amd/pistachio/romstage.c:55: | |
src/cpu/amd/car/post_cache_as_ram.c: At top level: | |
src/cpu/amd/car/post_cache_as_ram.c:14:3: error: #error "You need to set CONFIG_RAMTOP greater than 1M" | |
#error "You need to set CONFIG_RAMTOP greater than 1M" | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:55:0: | |
src/cpu/amd/model_fxx/init_cpus.c: In function 'for_each_ap': | |
src/cpu/amd/model_fxx/init_cpus.c:30:18: error: 'multi_core' undeclared (first use in this function) | |
read_option(multi_core, 0) != 0) { // 0 means multi core | |
^ | |
src/mainboard/amd/pistachio/romstage.c: In function 'cache_as_ram_main': | |
src/mainboard/amd/pistachio/romstage.c:77:16: error: too many arguments to function 'init_cpus' | |
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:55:0: | |
src/cpu/amd/model_fxx/init_cpus.c:201:12: note: declared here | |
static u32 init_cpus(u32 cpu_init_detectedx) | |
^ | |
src/mainboard/amd/pistachio/romstage.c:106:2: error: too many arguments to function 'ht_setup_chains_x' | |
ht_setup_chains_x(sysinfo); | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:49:0: | |
src/northbridge/amd/amdk8/incoherent_ht.c:695:12: note: declared here | |
static int ht_setup_chains_x(void) | |
^ | |
src/mainboard/amd/pistachio/romstage.c:122:3: error: implicit declaration of function 'enable_fid_change' [-Werror=implicit-function-declaration] | |
enable_fid_change(); | |
^ | |
src/mainboard/amd/pistachio/romstage.c:124:3: error: implicit declaration of function 'init_fidvid_bsp' [-Werror=implicit-function-declaration] | |
init_fidvid_bsp(bsp_apicid); | |
^ | |
src/mainboard/amd/pistachio/romstage.c:136:2: error: implicit declaration of function 'optimize_link_incoherent_ht' [-Werror=implicit-function-declaration] | |
needs_reset |= optimize_link_incoherent_ht(sysinfo); | |
^ | |
src/mainboard/amd/pistachio/romstage.c:156:2: error: too many arguments to function 'sdram_initialize' | |
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:52:0: | |
src/lib/generic_sdram.c:7:6: note: declared here | |
void sdram_initialize(int controllers, const struct mem_controller *ctrl) | |
^ | |
In file included from src/mainboard/amd/pistachio/romstage.c:37:0: | |
src/mainboard/amd/pistachio/romstage.c: At top level: | |
src/southbridge/amd/sb600/early_setup.c:107:12: error: 'get_sbdn' defined but not used [-Werror=unused-function] | |
static u32 get_sbdn(u32 bus) | |
^ | |
cc1: all warnings being treated as errors | |
make: *** [build/mainboard/amd/pistachio/romstage.pre.inc] Error 1 |
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