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Utterly overdriven

Ignacio Sanchez Gines drhelius

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Utterly overdriven
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@jacobsebek
jacobsebek / tone_gen.c
Last active January 5, 2024 20:14
SDL2 tone generator
#include <SDL.h> // The SDL library
#include <math.h> // sin, fmod
#include <stdio.h> // printf
#define BUFFER_DURATION 1 // Length of the buffer in seconds
#define FREQUENCY 48000 // Samples per second
#define BUFFER_LEN (BUFFER_DURATION*FREQUENCY) // Samples in the buffer
void play_buffer(void*, unsigned char*, int);
@dnozay
dnozay / _Jenkins+Script+Console.md
Last active April 10, 2024 06:11
jenkins groovy scripts collection.
@JagCesar
JagCesar / .travis.yml
Last active April 29, 2016 15:26 — forked from johanneswuerbach/.travis.yml
Deploy to Testflight using Travis-CI
language: objective-c
before_script:
- chmod +x scripts/travis/add-key.sh
- chmod +x scripts/travis/remove-key.sh
- chmod +x scripts/travis/testflight.sh
- ./scripts/travis/add-key.sh
script: xctool -workspace [Workspace name].xcworkspace -scheme '[Scheme to use]' -configuration [Build configuration name] -sdk iphoneos7.1 CONFIGURATION_BUILD_DIR='~/build/' build
after_success:
- ./scripts/travis/testflight.sh
after_script:
MEMPTR, esoteric register of the ZiLOG Z80 CPU.
by Boo-boo (first and draft English translation by Vladimir Kladov)
As it is known, after the instruction BIT n,(HL) execution, bits 3 and 5 of the flag register become containing values that is not documented in the official documentation at all. Actually these bits are copied from the bits 11 and 13 of the internal register pair of Z80 CPU, which is used for 16-bit operations, and in most cases to handle addresses. This is usual practice for processors having 8-bits data bus working with 16-bits data.
It is not known why and how these bits of the internal buffer register are copied to the flags register though. At least Sean Young in the "Undocumented Z80 Documented" refers to that phenomenon (http://www.myquest.nl/z80undocumented/) and a bit more info can be found in the Z80 description of another "nocash" project (http://www.work.de/nocash/zxdocs.htm) where such register pair is called as MEMPTR. Unfortunately until now attemts to crack the algorithm se
@drhelius
drhelius / MBC3 RTC save format
Last active December 20, 2015 03:49
MBC3 RTC save format
MBC3 RTC save format
the RTC data is appended after the sav file, 44 or 48 bytes. you can detect its presence by the save data being 44 or 48 bytes bigger than the cart's ram size, or 44 or 48 bytes bigger than a multiple of 8192.
old VBA (from 2005) saves the 44 bytes version, and can load both the 44 and 48 bytes version.
VBA-M saves the 48 bytes version, and can *only* load the 48 bytes version.
one should load both types, and always save the 48 bytes version.
@drhelius
drhelius / Game Boy Boot ROM Disassembly
Last active November 20, 2023 18:34
Game Boy Boot ROM Disassembly
LD SP,$fffe ; $0000 Setup Stack
XOR A ; $0003 Zero the memory from $8000-$9FFF (VRAM)
LD HL,$9fff ; $0004
Addr_0007:
LD (HL-),A ; $0007
BIT 7,H ; $0008
JR NZ, Addr_0007 ; $000a
LD HL,$ff26 ; $000c Setup Audio
@drhelius
drhelius / GameBoy Color Boot ROM Disassembly
Last active March 1, 2024 10:30
GameBoy Color Boot ROM Disassembly
; GameBoy Color Boot ROM Disassembly
; Dumped by Costis
; Commenting by Randy Mongenel (Duo)
; WORK-IN-PROGRESS VERSION 09-27-2009
; ===========================================================================
; Segment type: Pure code
SECTION "ROM", CODE
@drhelius
drhelius / Gameboy ROM headers
Last active August 15, 2023 21:48
Gameboy ROM headers
1.01 - Added some new licensees, fixed some
descriptions.
v1.00 - Initial release.
_______________
This information was taken and compiled from Martin Korth's
NO$GMB emulator. Best viewed in DOS EDIT.
Every Gameboy ROM header starts off at the HEX offset 0134.
@drhelius
drhelius / Game Boy MBC 3
Last active January 4, 2017 08:10
Memory Bank Controller (MBC) 3 for GameBoy Information
Memory Bank Controller (MBC) 3 for GameBoy Information
by bRILLO hEAD, 1-Jan-98
The MBC3 is a memory controller for some GameBoy carts
@drhelius
drhelius / Gameboy's video hardware
Last active April 5, 2018 02:05
Gameboy's video hardware
Nitty Gritty Gameboy Cycle Timing
---------------------------------
A document about the down and dirty timing of the Gameboy's video hardware.
Written by: Kevin Horton
Version: 0.01 (preliminary)
My findings here are based on the original DMG, Super Gameboy, and GB