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April 22, 2018 22:46
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| /* | |
| ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio | |
| Licensed under the Apache License, Version 2.0 (the "License"); | |
| you may not use this file except in compliance with the License. | |
| You may obtain a copy of the License at | |
| http://www.apache.org/licenses/LICENSE-2.0 | |
| Unless required by applicable law or agreed to in writing, software | |
| distributed under the License is distributed on an "AS IS" BASIS, | |
| WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |
| See the License for the specific language governing permissions and | |
| limitations under the License. | |
| */ | |
| #pragma once | |
| /* | |
| * IO pins assignments. | |
| */ | |
| #define PA00 0U | |
| #define PA01 1U | |
| #define PA02 2U | |
| #define PA03 3U | |
| #define PA04 4U | |
| #define PA05 5U | |
| #define PA06 6U | |
| #define PA07 7U | |
| #define PA08 8U | |
| #define PA09 9U | |
| #define PA10 10U | |
| #define PA11 11U | |
| #define PA12 12U | |
| #define PA13 13U | |
| #define PA14 14U | |
| #define PA15 15U | |
| #define PB00 0U | |
| #define PB01 1U | |
| #define PB02 2U | |
| #define PB03 3U | |
| #define PB04 4U | |
| #define PB05 5U | |
| #define PB06 6U | |
| #define PB07 7U | |
| #define PB08 8U | |
| #define PB09 9U | |
| #define PB10 10U | |
| #define PB11 11U | |
| #define PB12 12U | |
| #define PB13 13U | |
| #define PB14 14U | |
| #define PB15 15U | |
| #define PC00 0U | |
| #define PC01 1U | |
| #define PC02 2U | |
| #define PC03 3U | |
| #define PC04 4U | |
| #define PC05 5U | |
| #define PC06 6U | |
| #define PC07 7U | |
| #define PC08 8U | |
| #define PC09 9U | |
| #define PC10 10U | |
| #define PC11 11U | |
| #define PC12 12U | |
| #define PC13 13U | |
| #define PC14 14U | |
| #define PC15 15U | |
| #define PD00 0U | |
| #define PD01 1U | |
| #define PD02 2U | |
| #define PD03 3U | |
| #define PD04 4U | |
| #define PD05 5U | |
| #define PD06 6U | |
| #define PD07 7U | |
| #define PD08 8U | |
| #define PD09 9U | |
| #define PD10 10U | |
| #define PD11 11U | |
| #define PD12 12U | |
| #define PD13 13U | |
| #define PD14 14U | |
| #define PD15 15U | |
| #define PE00 0U | |
| #define PE01 1U | |
| #define PE02 2U | |
| #define PE03 3U | |
| #define PE04 4U | |
| #define PE05 5U | |
| #define PE06 6U | |
| #define PE07 7U | |
| #define PE08 8U | |
| #define PE09 9U | |
| #define PE10 10U | |
| #define PE11 11U | |
| #define PE12 12U | |
| #define PE13 13U | |
| #define PE14 14U | |
| #define PE15 15U | |
| /* | |
| * IO lines assignments. | |
| */ | |
| /* | |
| * I/O ports initial setup, this configuration is established soon after reset | |
| * in the initialization code. | |
| * Please refer to the STM32 Reference Manual for details. | |
| */ | |
| #define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) | |
| #define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) | |
| #define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) | |
| #define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) | |
| #define PIN_ODR_LEVEL_LOW(n) (0U << (n)) | |
| #define PIN_ODR_LEVEL_HIGH(n) (1U << (n)) | |
| #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) | |
| #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) | |
| #define PIN_OSPEED_SPEED_VERYLOW(n) (0U << ((n) * 2U)) | |
| #define PIN_OSPEED_SPEED_LOW(n) (1U << ((n) * 2U)) | |
| #define PIN_OSPEED_SPEED_MEDIUM(n) (2U << ((n) * 2U)) | |
| #define PIN_OSPEED_SPEED_HIGH(n) (3U << ((n) * 2U)) | |
| #define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) | |
| #define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) | |
| #define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) | |
| #define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) | |
| #define VAL_GPIOA_MODER (PIN_MODE_INPUT(PA00) | \ | |
| PIN_MODE_INPUT(PA01) | \ | |
| PIN_MODE_INPUT(PA02) | \ | |
| PIN_MODE_INPUT(PA03) | \ | |
| PIN_MODE_INPUT(PA04) | \ | |
| PIN_MODE_INPUT(PA05) | \ | |
| PIN_MODE_INPUT(PA06) | \ | |
| PIN_MODE_INPUT(PA07) | \ | |
| PIN_MODE_INPUT(PA08) | \ | |
| PIN_MODE_INPUT(PA09) | \ | |
| PIN_MODE_INPUT(PA10) | \ | |
| PIN_MODE_INPUT(PA11) | \ | |
| PIN_MODE_INPUT(PA12) | \ | |
| PIN_MODE_INPUT(PA13) | \ | |
| PIN_MODE_INPUT(PA14) | \ | |
| PIN_MODE_INPUT(PA15)) | |
| #define VAL_GPIOA_OTYPER (PIN_OTYPE_OPENDRAIN(PA00) | \ | |
| PIN_OTYPE_OPENDRAIN(PA01) | \ | |
| PIN_OTYPE_OPENDRAIN(PA02) | \ | |
| PIN_OTYPE_OPENDRAIN(PA03) | \ | |
| PIN_OTYPE_OPENDRAIN(PA04) | \ | |
| PIN_OTYPE_OPENDRAIN(PA05) | \ | |
| PIN_OTYPE_OPENDRAIN(PA06) | \ | |
| PIN_OTYPE_OPENDRAIN(PA07) | \ | |
| PIN_OTYPE_OPENDRAIN(PA08) | \ | |
| PIN_OTYPE_OPENDRAIN(PA09) | \ | |
| PIN_OTYPE_OPENDRAIN(PA10) | \ | |
| PIN_OTYPE_OPENDRAIN(PA11) | \ | |
| PIN_OTYPE_OPENDRAIN(PA12) | \ | |
| PIN_OTYPE_OPENDRAIN(PA13) | \ | |
| PIN_OTYPE_OPENDRAIN(PA14) | \ | |
| PIN_OTYPE_OPENDRAIN(PA15)) | |
| #define VAL_GPIOA_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PA00) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA01) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA02) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA03) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA04) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA05) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA06) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA07) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA08) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA09) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA10) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA11) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA12) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA13) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA14) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PA15)) | |
| #define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLDOWN(PA00) | \ | |
| PIN_PUPDR_PULLDOWN(PA01) | \ | |
| PIN_PUPDR_PULLDOWN(PA02) | \ | |
| PIN_PUPDR_PULLDOWN(PA03) | \ | |
| PIN_PUPDR_PULLDOWN(PA04) | \ | |
| PIN_PUPDR_PULLDOWN(PA05) | \ | |
| PIN_PUPDR_PULLDOWN(PA06) | \ | |
| PIN_PUPDR_PULLDOWN(PA07) | \ | |
| PIN_PUPDR_PULLDOWN(PA08) | \ | |
| PIN_PUPDR_PULLDOWN(PA09) | \ | |
| PIN_PUPDR_PULLDOWN(PA10) | \ | |
| PIN_PUPDR_PULLDOWN(PA11) | \ | |
| PIN_PUPDR_PULLDOWN(PA12) | \ | |
| PIN_PUPDR_PULLDOWN(PA13) | \ | |
| PIN_PUPDR_PULLDOWN(PA14) | \ | |
| PIN_PUPDR_PULLDOWN(PA15)) | |
| #define VAL_GPIOA_ODR (PIN_ODR_LEVEL_HIGH(PA00) | \ | |
| PIN_ODR_LEVEL_HIGH(PA01) | \ | |
| PIN_ODR_LEVEL_HIGH(PA02) | \ | |
| PIN_ODR_LEVEL_HIGH(PA03) | \ | |
| PIN_ODR_LEVEL_HIGH(PA04) | \ | |
| PIN_ODR_LEVEL_HIGH(PA05) | \ | |
| PIN_ODR_LEVEL_HIGH(PA06) | \ | |
| PIN_ODR_LEVEL_HIGH(PA07) | \ | |
| PIN_ODR_LEVEL_HIGH(PA08) | \ | |
| PIN_ODR_LEVEL_HIGH(PA09) | \ | |
| PIN_ODR_LEVEL_HIGH(PA10) | \ | |
| PIN_ODR_LEVEL_HIGH(PA11) | \ | |
| PIN_ODR_LEVEL_HIGH(PA12) | \ | |
| PIN_ODR_LEVEL_HIGH(PA13) | \ | |
| PIN_ODR_LEVEL_HIGH(PA14) | \ | |
| PIN_ODR_LEVEL_HIGH(PA15)) | |
| #define VAL_GPIOA_AFRL (PIN_AFIO_AF(PA00, 0) | \ | |
| PIN_AFIO_AF(PA01, 0) | \ | |
| PIN_AFIO_AF(PA02, 0) | \ | |
| PIN_AFIO_AF(PA03, 0) | \ | |
| PIN_AFIO_AF(PA04, 0) | \ | |
| PIN_AFIO_AF(PA05, 0) | \ | |
| PIN_AFIO_AF(PA06, 0) | \ | |
| PIN_AFIO_AF(PA07, 0)) | |
| #define VAL_GPIOA_AFRH (PIN_AFIO_AF(PA08, 0) | \ | |
| PIN_AFIO_AF(PA09, 0) | \ | |
| PIN_AFIO_AF(PA10, 0) | \ | |
| PIN_AFIO_AF(PA11, 0) | \ | |
| PIN_AFIO_AF(PA12, 0) | \ | |
| PIN_AFIO_AF(PA13, 0) | \ | |
| PIN_AFIO_AF(PA14, 0) | \ | |
| PIN_AFIO_AF(PA15, 0)) | |
| #define VAL_GPIOB_MODER (PIN_MODE_INPUT(PB00) | \ | |
| PIN_MODE_INPUT(PB01) | \ | |
| PIN_MODE_INPUT(PB02) | \ | |
| PIN_MODE_INPUT(PB03) | \ | |
| PIN_MODE_INPUT(PB04) | \ | |
| PIN_MODE_INPUT(PB05) | \ | |
| PIN_MODE_INPUT(PB06) | \ | |
| PIN_MODE_INPUT(PB07) | \ | |
| PIN_MODE_INPUT(PB08) | \ | |
| PIN_MODE_INPUT(PB09) | \ | |
| PIN_MODE_INPUT(PB10) | \ | |
| PIN_MODE_INPUT(PB11) | \ | |
| PIN_MODE_INPUT(PB12) | \ | |
| PIN_MODE_INPUT(PB13) | \ | |
| PIN_MODE_INPUT(PB14) | \ | |
| PIN_MODE_INPUT(PB15)) | |
| #define VAL_GPIOB_OTYPER (PIN_OTYPE_OPENDRAIN(PB00) | \ | |
| PIN_OTYPE_OPENDRAIN(PB01) | \ | |
| PIN_OTYPE_OPENDRAIN(PB02) | \ | |
| PIN_OTYPE_OPENDRAIN(PB03) | \ | |
| PIN_OTYPE_OPENDRAIN(PB04) | \ | |
| PIN_OTYPE_OPENDRAIN(PB05) | \ | |
| PIN_OTYPE_OPENDRAIN(PB06) | \ | |
| PIN_OTYPE_OPENDRAIN(PB07) | \ | |
| PIN_OTYPE_OPENDRAIN(PB08) | \ | |
| PIN_OTYPE_OPENDRAIN(PB09) | \ | |
| PIN_OTYPE_OPENDRAIN(PB10) | \ | |
| PIN_OTYPE_OPENDRAIN(PB11) | \ | |
| PIN_OTYPE_OPENDRAIN(PB12) | \ | |
| PIN_OTYPE_OPENDRAIN(PB13) | \ | |
| PIN_OTYPE_OPENDRAIN(PB14) | \ | |
| PIN_OTYPE_OPENDRAIN(PB15)) | |
| #define VAL_GPIOB_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PB00) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB01) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB02) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB03) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB04) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB05) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB06) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB07) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB08) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB09) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB10) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB11) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB12) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB13) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB14) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PB15)) | |
| #define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLDOWN(PB00) | \ | |
| PIN_PUPDR_PULLDOWN(PB01) | \ | |
| PIN_PUPDR_PULLDOWN(PB02) | \ | |
| PIN_PUPDR_PULLDOWN(PB03) | \ | |
| PIN_PUPDR_PULLDOWN(PB04) | \ | |
| PIN_PUPDR_PULLDOWN(PB05) | \ | |
| PIN_PUPDR_PULLDOWN(PB06) | \ | |
| PIN_PUPDR_PULLDOWN(PB07) | \ | |
| PIN_PUPDR_PULLDOWN(PB08) | \ | |
| PIN_PUPDR_PULLDOWN(PB09) | \ | |
| PIN_PUPDR_PULLDOWN(PB10) | \ | |
| PIN_PUPDR_PULLDOWN(PB11) | \ | |
| PIN_PUPDR_PULLDOWN(PB12) | \ | |
| PIN_PUPDR_PULLDOWN(PB13) | \ | |
| PIN_PUPDR_PULLDOWN(PB14) | \ | |
| PIN_PUPDR_PULLDOWN(PB15)) | |
| #define VAL_GPIOB_ODR (PIN_ODR_LEVEL_HIGH(PB00) | \ | |
| PIN_ODR_LEVEL_HIGH(PB01) | \ | |
| PIN_ODR_LEVEL_HIGH(PB02) | \ | |
| PIN_ODR_LEVEL_HIGH(PB03) | \ | |
| PIN_ODR_LEVEL_HIGH(PB04) | \ | |
| PIN_ODR_LEVEL_HIGH(PB05) | \ | |
| PIN_ODR_LEVEL_HIGH(PB06) | \ | |
| PIN_ODR_LEVEL_HIGH(PB07) | \ | |
| PIN_ODR_LEVEL_HIGH(PB08) | \ | |
| PIN_ODR_LEVEL_HIGH(PB09) | \ | |
| PIN_ODR_LEVEL_HIGH(PB10) | \ | |
| PIN_ODR_LEVEL_HIGH(PB11) | \ | |
| PIN_ODR_LEVEL_HIGH(PB12) | \ | |
| PIN_ODR_LEVEL_HIGH(PB13) | \ | |
| PIN_ODR_LEVEL_HIGH(PB14) | \ | |
| PIN_ODR_LEVEL_HIGH(PB15)) | |
| #define VAL_GPIOB_AFRL (PIN_AFIO_AF(PB00, 0) | \ | |
| PIN_AFIO_AF(PB01, 0) | \ | |
| PIN_AFIO_AF(PB02, 0) | \ | |
| PIN_AFIO_AF(PB03, 0) | \ | |
| PIN_AFIO_AF(PB04, 0) | \ | |
| PIN_AFIO_AF(PB05, 0) | \ | |
| PIN_AFIO_AF(PB06, 0) | \ | |
| PIN_AFIO_AF(PB07, 0)) | |
| #define VAL_GPIOB_AFRH (PIN_AFIO_AF(PB08, 0) | \ | |
| PIN_AFIO_AF(PB09, 0) | \ | |
| PIN_AFIO_AF(PB10, 0) | \ | |
| PIN_AFIO_AF(PB11, 0) | \ | |
| PIN_AFIO_AF(PB12, 0) | \ | |
| PIN_AFIO_AF(PB13, 0) | \ | |
| PIN_AFIO_AF(PB14, 0) | \ | |
| PIN_AFIO_AF(PB15, 0)) | |
| #define VAL_GPIOC_MODER (PIN_MODE_INPUT(PC00) | \ | |
| PIN_MODE_INPUT(PC01) | \ | |
| PIN_MODE_INPUT(PC02) | \ | |
| PIN_MODE_INPUT(PC03) | \ | |
| PIN_MODE_INPUT(PC04) | \ | |
| PIN_MODE_INPUT(PC05) | \ | |
| PIN_MODE_INPUT(PC06) | \ | |
| PIN_MODE_INPUT(PC07) | \ | |
| PIN_MODE_INPUT(PC08) | \ | |
| PIN_MODE_INPUT(PC09) | \ | |
| PIN_MODE_INPUT(PC10) | \ | |
| PIN_MODE_INPUT(PC11) | \ | |
| PIN_MODE_INPUT(PC12) | \ | |
| PIN_MODE_INPUT(PC13) | \ | |
| PIN_MODE_INPUT(PC14) | \ | |
| PIN_MODE_INPUT(PC15)) | |
| #define VAL_GPIOC_OTYPER (PIN_OTYPE_OPENDRAIN(PC00) | \ | |
| PIN_OTYPE_OPENDRAIN(PC01) | \ | |
| PIN_OTYPE_OPENDRAIN(PC02) | \ | |
| PIN_OTYPE_OPENDRAIN(PC03) | \ | |
| PIN_OTYPE_OPENDRAIN(PC04) | \ | |
| PIN_OTYPE_OPENDRAIN(PC05) | \ | |
| PIN_OTYPE_OPENDRAIN(PC06) | \ | |
| PIN_OTYPE_OPENDRAIN(PC07) | \ | |
| PIN_OTYPE_OPENDRAIN(PC08) | \ | |
| PIN_OTYPE_OPENDRAIN(PC09) | \ | |
| PIN_OTYPE_OPENDRAIN(PC10) | \ | |
| PIN_OTYPE_OPENDRAIN(PC11) | \ | |
| PIN_OTYPE_OPENDRAIN(PC12) | \ | |
| PIN_OTYPE_OPENDRAIN(PC13) | \ | |
| PIN_OTYPE_OPENDRAIN(PC14) | \ | |
| PIN_OTYPE_OPENDRAIN(PC15)) | |
| #define VAL_GPIOC_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PC00) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC01) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC02) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC03) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC04) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC05) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC06) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC07) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC08) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC09) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC10) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC11) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC12) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC13) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC14) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PC15)) | |
| #define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLDOWN(PC00) | \ | |
| PIN_PUPDR_PULLDOWN(PC01) | \ | |
| PIN_PUPDR_PULLDOWN(PC02) | \ | |
| PIN_PUPDR_PULLDOWN(PC03) | \ | |
| PIN_PUPDR_PULLDOWN(PC04) | \ | |
| PIN_PUPDR_PULLDOWN(PC05) | \ | |
| PIN_PUPDR_PULLDOWN(PC06) | \ | |
| PIN_PUPDR_PULLDOWN(PC07) | \ | |
| PIN_PUPDR_PULLDOWN(PC08) | \ | |
| PIN_PUPDR_PULLDOWN(PC09) | \ | |
| PIN_PUPDR_PULLDOWN(PC10) | \ | |
| PIN_PUPDR_PULLDOWN(PC11) | \ | |
| PIN_PUPDR_PULLDOWN(PC12) | \ | |
| PIN_PUPDR_PULLDOWN(PC13) | \ | |
| PIN_PUPDR_PULLDOWN(PC14) | \ | |
| PIN_PUPDR_PULLDOWN(PC15)) | |
| #define VAL_GPIOC_ODR (PIN_ODR_LEVEL_HIGH(PC00) | \ | |
| PIN_ODR_LEVEL_HIGH(PC01) | \ | |
| PIN_ODR_LEVEL_HIGH(PC02) | \ | |
| PIN_ODR_LEVEL_HIGH(PC03) | \ | |
| PIN_ODR_LEVEL_HIGH(PC04) | \ | |
| PIN_ODR_LEVEL_HIGH(PC05) | \ | |
| PIN_ODR_LEVEL_HIGH(PC06) | \ | |
| PIN_ODR_LEVEL_HIGH(PC07) | \ | |
| PIN_ODR_LEVEL_HIGH(PC08) | \ | |
| PIN_ODR_LEVEL_HIGH(PC09) | \ | |
| PIN_ODR_LEVEL_HIGH(PC10) | \ | |
| PIN_ODR_LEVEL_HIGH(PC11) | \ | |
| PIN_ODR_LEVEL_HIGH(PC12) | \ | |
| PIN_ODR_LEVEL_HIGH(PC13) | \ | |
| PIN_ODR_LEVEL_HIGH(PC14) | \ | |
| PIN_ODR_LEVEL_HIGH(PC15)) | |
| #define VAL_GPIOC_AFRL (PIN_AFIO_AF(PC00, 0) | \ | |
| PIN_AFIO_AF(PC01, 0) | \ | |
| PIN_AFIO_AF(PC02, 0) | \ | |
| PIN_AFIO_AF(PC03, 0) | \ | |
| PIN_AFIO_AF(PC04, 0) | \ | |
| PIN_AFIO_AF(PC05, 0) | \ | |
| PIN_AFIO_AF(PC06, 0) | \ | |
| PIN_AFIO_AF(PC07, 0)) | |
| #define VAL_GPIOC_AFRH (PIN_AFIO_AF(PC08, 0) | \ | |
| PIN_AFIO_AF(PC09, 0) | \ | |
| PIN_AFIO_AF(PC10, 0) | \ | |
| PIN_AFIO_AF(PC11, 0) | \ | |
| PIN_AFIO_AF(PC12, 0) | \ | |
| PIN_AFIO_AF(PC13, 0) | \ | |
| PIN_AFIO_AF(PC14, 0) | \ | |
| PIN_AFIO_AF(PC15, 0)) | |
| #define VAL_GPIOD_MODER (PIN_MODE_INPUT(PD00) | \ | |
| PIN_MODE_INPUT(PD01) | \ | |
| PIN_MODE_INPUT(PD02) | \ | |
| PIN_MODE_INPUT(PD03) | \ | |
| PIN_MODE_INPUT(PD04) | \ | |
| PIN_MODE_INPUT(PD05) | \ | |
| PIN_MODE_INPUT(PD06) | \ | |
| PIN_MODE_INPUT(PD07) | \ | |
| PIN_MODE_INPUT(PD08) | \ | |
| PIN_MODE_INPUT(PD09) | \ | |
| PIN_MODE_INPUT(PD10) | \ | |
| PIN_MODE_INPUT(PD11) | \ | |
| PIN_MODE_INPUT(PD12) | \ | |
| PIN_MODE_INPUT(PD13) | \ | |
| PIN_MODE_INPUT(PD14) | \ | |
| PIN_MODE_INPUT(PD15)) | |
| #define VAL_GPIOD_OTYPER (PIN_OTYPE_OPENDRAIN(PD00) | \ | |
| PIN_OTYPE_OPENDRAIN(PD01) | \ | |
| PIN_OTYPE_OPENDRAIN(PD02) | \ | |
| PIN_OTYPE_OPENDRAIN(PD03) | \ | |
| PIN_OTYPE_OPENDRAIN(PD04) | \ | |
| PIN_OTYPE_OPENDRAIN(PD05) | \ | |
| PIN_OTYPE_OPENDRAIN(PD06) | \ | |
| PIN_OTYPE_OPENDRAIN(PD07) | \ | |
| PIN_OTYPE_OPENDRAIN(PD08) | \ | |
| PIN_OTYPE_OPENDRAIN(PD09) | \ | |
| PIN_OTYPE_OPENDRAIN(PD10) | \ | |
| PIN_OTYPE_OPENDRAIN(PD11) | \ | |
| PIN_OTYPE_OPENDRAIN(PD12) | \ | |
| PIN_OTYPE_OPENDRAIN(PD13) | \ | |
| PIN_OTYPE_OPENDRAIN(PD14) | \ | |
| PIN_OTYPE_OPENDRAIN(PD15)) | |
| #define VAL_GPIOD_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PD00) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD01) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD02) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD03) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD04) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD05) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD06) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD07) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD08) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD09) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD10) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD11) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD12) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD13) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD14) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PD15)) | |
| #define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLDOWN(PD00) | \ | |
| PIN_PUPDR_PULLDOWN(PD01) | \ | |
| PIN_PUPDR_PULLDOWN(PD02) | \ | |
| PIN_PUPDR_PULLDOWN(PD03) | \ | |
| PIN_PUPDR_PULLDOWN(PD04) | \ | |
| PIN_PUPDR_PULLDOWN(PD05) | \ | |
| PIN_PUPDR_PULLDOWN(PD06) | \ | |
| PIN_PUPDR_PULLDOWN(PD07) | \ | |
| PIN_PUPDR_PULLDOWN(PD08) | \ | |
| PIN_PUPDR_PULLDOWN(PD09) | \ | |
| PIN_PUPDR_PULLDOWN(PD10) | \ | |
| PIN_PUPDR_PULLDOWN(PD11) | \ | |
| PIN_PUPDR_PULLDOWN(PD12) | \ | |
| PIN_PUPDR_PULLDOWN(PD13) | \ | |
| PIN_PUPDR_PULLDOWN(PD14) | \ | |
| PIN_PUPDR_PULLDOWN(PD15)) | |
| #define VAL_GPIOD_ODR (PIN_ODR_LEVEL_HIGH(PD00) | \ | |
| PIN_ODR_LEVEL_HIGH(PD01) | \ | |
| PIN_ODR_LEVEL_HIGH(PD02) | \ | |
| PIN_ODR_LEVEL_HIGH(PD03) | \ | |
| PIN_ODR_LEVEL_HIGH(PD04) | \ | |
| PIN_ODR_LEVEL_HIGH(PD05) | \ | |
| PIN_ODR_LEVEL_HIGH(PD06) | \ | |
| PIN_ODR_LEVEL_HIGH(PD07) | \ | |
| PIN_ODR_LEVEL_HIGH(PD08) | \ | |
| PIN_ODR_LEVEL_HIGH(PD09) | \ | |
| PIN_ODR_LEVEL_HIGH(PD10) | \ | |
| PIN_ODR_LEVEL_HIGH(PD11) | \ | |
| PIN_ODR_LEVEL_HIGH(PD12) | \ | |
| PIN_ODR_LEVEL_HIGH(PD13) | \ | |
| PIN_ODR_LEVEL_HIGH(PD14) | \ | |
| PIN_ODR_LEVEL_HIGH(PD15)) | |
| #define VAL_GPIOD_AFRL (PIN_AFIO_AF(PD00, 0) | \ | |
| PIN_AFIO_AF(PD01, 0) | \ | |
| PIN_AFIO_AF(PD02, 0) | \ | |
| PIN_AFIO_AF(PD03, 0) | \ | |
| PIN_AFIO_AF(PD04, 0) | \ | |
| PIN_AFIO_AF(PD05, 0) | \ | |
| PIN_AFIO_AF(PD06, 0) | \ | |
| PIN_AFIO_AF(PD07, 0)) | |
| #define VAL_GPIOD_AFRH (PIN_AFIO_AF(PD08, 0) | \ | |
| PIN_AFIO_AF(PD09, 0) | \ | |
| PIN_AFIO_AF(PD10, 0) | \ | |
| PIN_AFIO_AF(PD11, 0) | \ | |
| PIN_AFIO_AF(PD12, 0) | \ | |
| PIN_AFIO_AF(PD13, 0) | \ | |
| PIN_AFIO_AF(PD14, 0) | \ | |
| PIN_AFIO_AF(PD15, 0)) | |
| #define VAL_GPIOE_MODER (PIN_MODE_INPUT(PE00) | \ | |
| PIN_MODE_INPUT(PE01) | \ | |
| PIN_MODE_INPUT(PE02) | \ | |
| PIN_MODE_INPUT(PE03) | \ | |
| PIN_MODE_INPUT(PE04) | \ | |
| PIN_MODE_INPUT(PE05) | \ | |
| PIN_MODE_INPUT(PE06) | \ | |
| PIN_MODE_INPUT(PE07) | \ | |
| PIN_MODE_INPUT(PE08) | \ | |
| PIN_MODE_INPUT(PE09) | \ | |
| PIN_MODE_INPUT(PE10) | \ | |
| PIN_MODE_INPUT(PE11) | \ | |
| PIN_MODE_INPUT(PE12) | \ | |
| PIN_MODE_INPUT(PE13) | \ | |
| PIN_MODE_INPUT(PE14) | \ | |
| PIN_MODE_INPUT(PE15)) | |
| #define VAL_GPIOE_OTYPER (PIN_OTYPE_OPENDRAIN(PE00) | \ | |
| PIN_OTYPE_OPENDRAIN(PE01) | \ | |
| PIN_OTYPE_OPENDRAIN(PE02) | \ | |
| PIN_OTYPE_OPENDRAIN(PE03) | \ | |
| PIN_OTYPE_OPENDRAIN(PE04) | \ | |
| PIN_OTYPE_OPENDRAIN(PE05) | \ | |
| PIN_OTYPE_OPENDRAIN(PE06) | \ | |
| PIN_OTYPE_OPENDRAIN(PE07) | \ | |
| PIN_OTYPE_OPENDRAIN(PE08) | \ | |
| PIN_OTYPE_OPENDRAIN(PE09) | \ | |
| PIN_OTYPE_OPENDRAIN(PE10) | \ | |
| PIN_OTYPE_OPENDRAIN(PE11) | \ | |
| PIN_OTYPE_OPENDRAIN(PE12) | \ | |
| PIN_OTYPE_OPENDRAIN(PE13) | \ | |
| PIN_OTYPE_OPENDRAIN(PE14) | \ | |
| PIN_OTYPE_OPENDRAIN(PE15)) | |
| #define VAL_GPIOE_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PE00) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE01) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE02) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE03) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE04) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE05) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE06) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE07) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE08) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE09) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE10) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE11) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE12) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE13) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE14) | \ | |
| PIN_OSPEED_SPEED_VERYLOW(PE15)) | |
| #define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLDOWN(PE00) | \ | |
| PIN_PUPDR_PULLDOWN(PE01) | \ | |
| PIN_PUPDR_PULLDOWN(PE02) | \ | |
| PIN_PUPDR_PULLDOWN(PE03) | \ | |
| PIN_PUPDR_PULLDOWN(PE04) | \ | |
| PIN_PUPDR_PULLDOWN(PE05) | \ | |
| PIN_PUPDR_PULLDOWN(PE06) | \ | |
| PIN_PUPDR_PULLDOWN(PE07) | \ | |
| PIN_PUPDR_PULLDOWN(PE08) | \ | |
| PIN_PUPDR_PULLDOWN(PE09) | \ | |
| PIN_PUPDR_PULLDOWN(PE10) | \ | |
| PIN_PUPDR_PULLDOWN(PE11) | \ | |
| PIN_PUPDR_PULLDOWN(PE12) | \ | |
| PIN_PUPDR_PULLDOWN(PE13) | \ | |
| PIN_PUPDR_PULLDOWN(PE14) | \ | |
| PIN_PUPDR_PULLDOWN(PE15)) | |
| #define VAL_GPIOE_ODR (PIN_ODR_LEVEL_HIGH(PE00) | \ | |
| PIN_ODR_LEVEL_HIGH(PE01) | \ | |
| PIN_ODR_LEVEL_HIGH(PE02) | \ | |
| PIN_ODR_LEVEL_HIGH(PE03) | \ | |
| PIN_ODR_LEVEL_HIGH(PE04) | \ | |
| PIN_ODR_LEVEL_HIGH(PE05) | \ | |
| PIN_ODR_LEVEL_HIGH(PE06) | \ | |
| PIN_ODR_LEVEL_HIGH(PE07) | \ | |
| PIN_ODR_LEVEL_HIGH(PE08) | \ | |
| PIN_ODR_LEVEL_HIGH(PE09) | \ | |
| PIN_ODR_LEVEL_HIGH(PE10) | \ | |
| PIN_ODR_LEVEL_HIGH(PE11) | \ | |
| PIN_ODR_LEVEL_HIGH(PE12) | \ | |
| PIN_ODR_LEVEL_HIGH(PE13) | \ | |
| PIN_ODR_LEVEL_HIGH(PE14) | \ | |
| PIN_ODR_LEVEL_HIGH(PE15)) | |
| #define VAL_GPIOE_AFRL (PIN_AFIO_AF(PE00, 0) | \ | |
| PIN_AFIO_AF(PE01, 0) | \ | |
| PIN_AFIO_AF(PE02, 0) | \ | |
| PIN_AFIO_AF(PE03, 0) | \ | |
| PIN_AFIO_AF(PE04, 0) | \ | |
| PIN_AFIO_AF(PE05, 0) | \ | |
| PIN_AFIO_AF(PE06, 0) | \ | |
| PIN_AFIO_AF(PE07, 0)) | |
| #define VAL_GPIOE_AFRH (PIN_AFIO_AF(PE08, 0) | \ | |
| PIN_AFIO_AF(PE09, 0) | \ | |
| PIN_AFIO_AF(PE10, 0) | \ | |
| PIN_AFIO_AF(PE11, 0) | \ | |
| PIN_AFIO_AF(PE12, 0) | \ | |
| PIN_AFIO_AF(PE13, 0) | \ | |
| PIN_AFIO_AF(PE14, 0) | \ | |
| PIN_AFIO_AF(PE15, 0)) | |
| #if !defined(_FROM_ASM_) | |
| #ifdef __cplusplus | |
| extern "C" { | |
| #endif | |
| void boardInit(void); | |
| #ifdef __cplusplus | |
| } | |
| #endif | |
| #endif /* _FROM_ASM_ */ |
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