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December 4, 2020 02:45
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/* | |
* File: main.c | |
* Author: Dr. Rubén Estrada Marmolejo | |
hetpro-store.com/TUTORIALES | |
Compilador: XC8 | |
* | |
* Created on September 10, 2020, 11:54 AM | |
*/ | |
#include <xc.h> | |
#include <stdio.h> | |
#include <stdarg.h> | |
#include <string.h> | |
#define _XTAL_FREQ 8000000 //8 millones de oscilaciones por segundo | |
// CONFIG1L | |
#pragma config PLLDIV = 1 | |
#pragma config CPUDIV = OSC1_PLL2// System Clock Postscaler Selection bits ([Primary Oscillator Src: /1][96 MHz PLL Src: /2]) | |
#pragma config USBDIV = 2 // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes from the 96 MHz PLL divided by 2) | |
// CONFIG1H | |
#pragma config FOSC = INTOSC_EC // Oscillator Selection bits (Internal oscillator, XT used by USB (INTXT)) | |
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled) | |
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled) | |
// CONFIG2L | |
#pragma config PWRT = ON // Power-up Timer Enable bit (PWRT enabled) | |
#pragma config BOR = OFF // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software) | |
#pragma config BORV = 0 // Brown-out Reset Voltage bits (Maximum setting 4.59V) | |
#pragma config VREGEN = OFF // USB Voltage Regulator Enable bit (USB voltage regulator disabled) | |
// CONFIG2H | |
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit)) | |
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768) | |
// CONFIG3H | |
#pragma config CCP2MX = OFF // CCP2 MUX bit (CCP2 input/output is multiplexed with RB3) | |
#pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset) | |
#pragma config LPT1OSC = OFF // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation) | |
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled) | |
// CONFIG4L | |
#pragma config STVREN = OFF // Stack Full/Underflow Reset Enable bit (Stack full/underflow will not cause Reset) | |
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled) | |
#pragma config ICPRT = OFF // Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit (ICPORT disabled) | |
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode)) | |
// CONFIG5L | |
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected) | |
#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected) | |
#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected) | |
#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected) | |
// CONFIG5H | |
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected) | |
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM is not code-protected) | |
// CONFIG6L | |
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected) | |
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected) | |
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected) | |
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected) | |
// CONFIG6H | |
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected) | |
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected) | |
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM is not write-protected) | |
// CONFIG7L | |
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks) | |
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks) | |
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks) | |
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks) | |
// CONFIG7H | |
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks) | |
// #pragma config statements should precede project file includes. | |
// Use project enums instead of #define for ON and OFF. | |
void configuraPWM(){ | |
//Configura frecuencia del PWM a 488Hz | |
PR2 = 0xFF; | |
//Configura el Ciclo de Trabajo al 50% | |
CCPR1L = 0x02; | |
CCP1CONbits.DC1B0 = 0; | |
CCP1CONbits.DC1B1 = 0; | |
//Configura el pin RC2 como salida para el PWM1 | |
TRISCbits.RC2 = 0; | |
//Configura la pre-escala de 16 | |
T2CONbits.T2CKPS = 3; | |
//Configura el funcionamiento como PWM | |
CCP1CONbits.CCP1M0 = 1; | |
CCP1CONbits.CCP1M1 = 1; | |
CCP1CONbits.CCP1M2 = 1; | |
CCP1CONbits.CCP1M3 = 1; | |
//LImpia el registro del TImer2 que guarda la cuenta | |
TMR2 = 0; | |
//Activa el funcionamiento del TImer2 | |
T2CONbits.TMR2ON = 1; | |
} | |
void main(void) { | |
//COnfiguracion del osciladorinterno 8Mhz | |
OSCCON = 0b01110010; | |
configuraPWM(); | |
while(1){ | |
//Inicia ciclo infinito | |
//Fin ciclo infinito | |
} | |
/* | |
for(;;){ | |
} | |
* | |
*/ | |
return; | |
} | |
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