C code
double __attribute__((pcs("aapcs"))) f2d(float f) {
return (double)f;
}
double __attribute__((pcs("aapcs-vfp"))) __hard_f2d(float f){
return (double)f;
}
| Modules.addCached("DSD6OLED",function(){ | |
| //modified SSD1306, 128x32 but needs 0xda,0x12 | |
| // commands sent when initialising the display | |
| var initCmds = new Uint8Array([ | |
| 0xAe, // 0 disp off | |
| 0xD5, // 1 clk div | |
| 0x80, // 2 suggested ratio | |
| 0xA8, 31, // 3 set multiplex, height-1 | |
| 0xD3,0x0, // 5 display offset | |
| 0x40, // 7 start line |
| first console: | |
| pi@raspberrypi:~ $ sudo openocd -d2 -f interface/stlink.cfg -f target/nrf52.cfg | |
| Open On-Chip Debugger 0.10.0+dev-00637-gb3ed97a4 (2019-01-03-22:45) | |
| Licensed under GNU GPL v2 | |
| For bug reports, read | |
| http://openocd.org/doc/doxygen/bugs.html | |
| debug_level: 2 | |
| Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'. | |
| Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD |
| //manual watchdog pinging mode is dangerous for Espruino Web IDE upload with 'reset() before upload' enabled | |
| //you can brick your device with partial upload caused by watchdog reboot in the middle of upload | |
| //E.enableWatchdog(6, false); | |
| //var wdint=setInterval(function(){if(!BTN1.read())E.kickWatchdog();},1000); | |
| var log=console.log; | |
| Modules.addCached("HX03WLCD",function(){ | |
| // commands sent when initialising the display | |
| var initCmds = new Uint8Array([ | |
| 0xAE, // 0 disp off | |
| 0xD5, // 1 clk div |
| void LCD_Init(void) | |
| { | |
| GPIO_CfgPinOutput(5); | |
| GPIO_CfgPinOutput(6); | |
| GPIO_CfgPinOutput(0x1d); | |
| GPIO_CfgPinOutput(0x10); | |
| _DAT_5000050c = 0x10000; /* clear D16 */ | |
| GPIO_ConfOutput4_28(); | |
| D4_PulseZero50ms(); |
| // https://www.espruino.com/Reference#l_NRF_setServices | |
| // https://github.com/gfwilliams/workshop-thingy52/blob/master/step5.md | |
| // http://forum.espruino.com/conversations/322805/ | |
| var atf={}; | |
| var user=""; | |
| atf.USER=function(p,t){ | |
| if(p){ | |
| user=p; | |
| } |
| // https://github.com/gfwilliams/EspruinoCompiler/issues/10 | |
| // https://www.espruino.com/service/compiler => http://127.0.0.1:32766 | |
| // old compile.js: var cflags = "-mlittle-endian -mthumb -mcpu=cortex-m3 -mfix-cortex-m3-ldrd -mthumb-interwork -mfloat-abi=soft "; | |
| // new: var cflags = "-mlittle-endian -mthumb -mcpu=cortex-m4 -mthumb-interwork -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant -Wdouble-promotion -Wfloat-conversion "; | |
| // | |
| // power drain fix | |
| // https://devzone.nordicsemi.com/f/nordic-q-a/15243/high-power-consumption-when-using-fpu | |
| // https://devzone.nordicsemi.com/f/nordic-q-a/12433/fpu-divide-by-0-and-high-current-consumption | |
| // https://infocenter.nordicsemi.com/index.jsp?topic=%2Ferrata_nRF52832_EngC%2FERR%2FnRF52832%2FEngineeringC%2Flatest%2Fanomaly_832_87.html&anchor=anomaly_832_87 |
| function mandelCompJS(x,y) { | |
| "compiled"; | |
| var Xr = 0; | |
| var Xi = 0; | |
| var i = 0; | |
| var Cr=(4*x/64)-2; | |
| var Ci=(4*y/64)-2; | |
| while ((i<32) & ((Xr*Xr+Xi*Xi)<4)) { | |
| var t=Xr*Xr - Xi*Xi + Cr; | |
| Xi=2*Xr*Xi+Ci; |
| diff --git a/make/family/NRF52.make b/make/family/NRF52.make | |
| index 725cb55d..90bd9b69 100644 | |
| --- a/make/family/NRF52.make | |
| +++ b/make/family/NRF52.make | |
| @@ -46,6 +46,7 @@ NRF5X_SDK=11 | |
| NRF5X_SDK_11=1 | |
| NRF5X_SDK_PATH=$(ROOT)/targetlibs/nrf5x_11 | |
| DEFINES += -DNRF_SD_BLE_API_VERSION=2 | |
| +DEFINES += -D__HEAP_SIZE=0 -D__STACK_SIZE=0x2600 -D__STARTUP_CLEAR_BSS | |
| SOFTDEVICE = $(SOFTDEVICE_PATH)/hex/s132_nrf52_2.0.0_softdevice.hex |
C code
double __attribute__((pcs("aapcs"))) f2d(float f) {
return (double)f;
}
double __attribute__((pcs("aapcs-vfp"))) __hard_f2d(float f){
return (double)f;
}
| diff -Naur Next186_SoC.orig/186Code/BIOS/bootload_BIOS_SD/bootstrap.asm Next186_SoC/186Code/BIOS/bootload_BIOS_SD/bootstrap.asm | |
| --- Next186_SoC.orig/186Code/BIOS/bootload_BIOS_SD/bootstrap.asm 2016-09-26 14:42:28.401003600 +0200 | |
| +++ Next186_SoC/186Code/BIOS/bootload_BIOS_SD/bootstrap.asm 2018-02-14 22:57:25.033245500 +0100 | |
| @@ -95,32 +95,29 @@ | |
| call sdinit_ | |
| test ax, ax | |
| jz short RS232 | |
| - mov dx, ax | |
| + mov dx, ax ; first try to read bios from end of card | |
| shr dx, 6 |