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Performance Comparisons
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===-------------------------------------------------------------------------=== | |
... Pass execution timing report ... | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 16.4864 seconds (16.5020 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
4.2652 ( 26.2%) 0.0666 ( 31.7%) 4.3318 ( 26.3%) 4.3366 ( 26.3%) ModuleInlinerWrapperPass | |
4.2395 ( 26.0%) 0.0660 ( 31.4%) 4.3055 ( 26.1%) 4.3103 ( 26.1%) DevirtSCCRepeatedPass | |
2.9063 ( 17.9%) 0.0275 ( 13.1%) 2.9339 ( 17.8%) 2.9366 ( 17.8%) DSEPass | |
2.4880 ( 15.3%) 0.0003 ( 0.1%) 2.4883 ( 15.1%) 2.4904 ( 15.1%) SLPVectorizerPass | |
0.9361 ( 5.8%) 0.0159 ( 7.6%) 0.9520 ( 5.8%) 0.9525 ( 5.8%) InstCombinePass | |
0.1898 ( 1.2%) 0.0050 ( 2.4%) 0.1949 ( 1.2%) 0.1950 ( 1.2%) GVN | |
0.1860 ( 1.1%) 0.0006 ( 0.3%) 0.1866 ( 1.1%) 0.1869 ( 1.1%) SROA | |
0.1091 ( 0.7%) 0.0024 ( 1.1%) 0.1115 ( 0.7%) 0.1116 ( 0.7%) EarlyCSEPass | |
0.0988 ( 0.6%) 0.0022 ( 1.1%) 0.1010 ( 0.6%) 0.1010 ( 0.6%) MemorySSAAnalysis | |
0.0772 ( 0.5%) 0.0019 ( 0.9%) 0.0791 ( 0.5%) 0.0791 ( 0.5%) CorrelatedValuePropagationPass | |
0.0683 ( 0.4%) 0.0013 ( 0.6%) 0.0696 ( 0.4%) 0.0695 ( 0.4%) SimplifyCFGPass | |
0.0476 ( 0.3%) 0.0008 ( 0.4%) 0.0483 ( 0.3%) 0.0483 ( 0.3%) LICMPass | |
0.0407 ( 0.2%) 0.0008 ( 0.4%) 0.0415 ( 0.3%) 0.0415 ( 0.3%) MemCpyOptPass | |
0.0319 ( 0.2%) 0.0036 ( 1.7%) 0.0355 ( 0.2%) 0.0355 ( 0.2%) InlinerPass | |
0.0331 ( 0.2%) 0.0000 ( 0.0%) 0.0331 ( 0.2%) 0.0331 ( 0.2%) CalledValuePropagationPass | |
0.0321 ( 0.2%) 0.0005 ( 0.2%) 0.0326 ( 0.2%) 0.0326 ( 0.2%) LoopVectorizePass | |
0.0321 ( 0.2%) 0.0000 ( 0.0%) 0.0321 ( 0.2%) 0.0321 ( 0.2%) IPSCCPPass | |
0.0298 ( 0.2%) 0.0012 ( 0.6%) 0.0310 ( 0.2%) 0.0310 ( 0.2%) BlockFrequencyAnalysis | |
0.0278 ( 0.2%) 0.0006 ( 0.3%) 0.0284 ( 0.2%) 0.0284 ( 0.2%) SCCPPass | |
0.0223 ( 0.1%) 0.0005 ( 0.2%) 0.0228 ( 0.1%) 0.0229 ( 0.1%) BDCEPass | |
0.0221 ( 0.1%) 0.0000 ( 0.0%) 0.0221 ( 0.1%) 0.0222 ( 0.1%) GlobalOptPass | |
0.0204 ( 0.1%) 0.0007 ( 0.3%) 0.0211 ( 0.1%) 0.0211 ( 0.1%) ADCEPass | |
0.0199 ( 0.1%) 0.0008 ( 0.4%) 0.0207 ( 0.1%) 0.0207 ( 0.1%) BranchProbabilityAnalysis | |
0.0192 ( 0.1%) 0.0012 ( 0.6%) 0.0204 ( 0.1%) 0.0204 ( 0.1%) JumpThreadingPass | |
0.0192 ( 0.1%) 0.0013 ( 0.6%) 0.0204 ( 0.1%) 0.0204 ( 0.1%) PostOrderFunctionAttrsPass | |
0.0190 ( 0.1%) 0.0006 ( 0.3%) 0.0196 ( 0.1%) 0.0195 ( 0.1%) DominatorTreeAnalysis | |
0.0165 ( 0.1%) 0.0009 ( 0.4%) 0.0174 ( 0.1%) 0.0175 ( 0.1%) IndVarSimplifyPass | |
0.0164 ( 0.1%) 0.0009 ( 0.4%) 0.0172 ( 0.1%) 0.0172 ( 0.1%) AAManager | |
0.0165 ( 0.1%) 0.0000 ( 0.0%) 0.0165 ( 0.1%) 0.0165 ( 0.1%) LoopUnrollPass | |
0.0158 ( 0.1%) 0.0002 ( 0.1%) 0.0160 ( 0.1%) 0.0160 ( 0.1%) TailCallElimPass | |
0.0151 ( 0.1%) 0.0000 ( 0.0%) 0.0151 ( 0.1%) 0.0151 ( 0.1%) CallGraphAnalysis | |
0.0134 ( 0.1%) 0.0005 ( 0.2%) 0.0139 ( 0.1%) 0.0139 ( 0.1%) ReassociatePass | |
0.0136 ( 0.1%) 0.0001 ( 0.0%) 0.0136 ( 0.1%) 0.0136 ( 0.1%) InstSimplifyPass | |
0.0122 ( 0.1%) 0.0003 ( 0.1%) 0.0125 ( 0.1%) 0.0125 ( 0.1%) Float2IntPass | |
0.0116 ( 0.1%) 0.0003 ( 0.1%) 0.0119 ( 0.1%) 0.0119 ( 0.1%) LCSSAPass | |
0.0109 ( 0.1%) 0.0006 ( 0.3%) 0.0115 ( 0.1%) 0.0115 ( 0.1%) LoopSimplifyPass | |
0.0100 ( 0.1%) 0.0004 ( 0.2%) 0.0104 ( 0.1%) 0.0104 ( 0.1%) LoopDistributePass | |
0.0100 ( 0.1%) 0.0001 ( 0.1%) 0.0102 ( 0.1%) 0.0101 ( 0.1%) VectorCombinePass | |
0.0084 ( 0.1%) 0.0004 ( 0.2%) 0.0089 ( 0.1%) 0.0089 ( 0.1%) PostDominatorTreeAnalysis | |
0.0082 ( 0.1%) 0.0000 ( 0.0%) 0.0082 ( 0.0%) 0.0082 ( 0.0%) RequireAnalysisPass<llvm::GlobalsAA, llvm::Module> | |
0.0082 ( 0.1%) 0.0000 ( 0.0%) 0.0082 ( 0.0%) 0.0082 ( 0.0%) GlobalsAA | |
0.0077 ( 0.0%) 0.0004 ( 0.2%) 0.0081 ( 0.0%) 0.0081 ( 0.0%) LoopAnalysis | |
0.0077 ( 0.0%) 0.0000 ( 0.0%) 0.0077 ( 0.0%) 0.0077 ( 0.0%) ReversePostOrderFunctionAttrsPass | |
0.0068 ( 0.0%) 0.0002 ( 0.1%) 0.0070 ( 0.0%) 0.0070 ( 0.0%) LoopFullUnrollPass | |
0.0062 ( 0.0%) 0.0003 ( 0.2%) 0.0065 ( 0.0%) 0.0065 ( 0.0%) LoopRotatePass | |
0.0058 ( 0.0%) 0.0000 ( 0.0%) 0.0058 ( 0.0%) 0.0058 ( 0.0%) PromotePass | |
0.0056 ( 0.0%) 0.0000 ( 0.0%) 0.0056 ( 0.0%) 0.0056 ( 0.0%) CGProfilePass | |
0.0049 ( 0.0%) 0.0002 ( 0.1%) 0.0051 ( 0.0%) 0.0051 ( 0.0%) ScalarEvolutionAnalysis | |
0.0047 ( 0.0%) 0.0004 ( 0.2%) 0.0050 ( 0.0%) 0.0050 ( 0.0%) BasicAA | |
0.0047 ( 0.0%) 0.0001 ( 0.1%) 0.0048 ( 0.0%) 0.0048 ( 0.0%) LoopInstSimplifyPass | |
0.0042 ( 0.0%) 0.0000 ( 0.0%) 0.0042 ( 0.0%) 0.0043 ( 0.0%) LoopSinkPass | |
0.0040 ( 0.0%) 0.0000 ( 0.0%) 0.0040 ( 0.0%) 0.0040 ( 0.0%) LowerConstantIntrinsicsPass | |
0.0033 ( 0.0%) 0.0000 ( 0.0%) 0.0033 ( 0.0%) 0.0033 ( 0.0%) InjectTLIMappings | |
0.0026 ( 0.0%) 0.0000 ( 0.0%) 0.0027 ( 0.0%) 0.0027 ( 0.0%) TargetLibraryAnalysis | |
0.0026 ( 0.0%) 0.0000 ( 0.0%) 0.0027 ( 0.0%) 0.0027 ( 0.0%) LoopLoadEliminationPass | |
0.0026 ( 0.0%) 0.0000 ( 0.0%) 0.0026 ( 0.0%) 0.0026 ( 0.0%) TargetIRAnalysis | |
0.0025 ( 0.0%) 0.0000 ( 0.0%) 0.0025 ( 0.0%) 0.0025 ( 0.0%) DivRemPairsPass | |
0.0024 ( 0.0%) 0.0001 ( 0.0%) 0.0024 ( 0.0%) 0.0024 ( 0.0%) LibCallsShrinkWrapPass | |
0.0023 ( 0.0%) 0.0000 ( 0.0%) 0.0023 ( 0.0%) 0.0023 ( 0.0%) LowerExpectIntrinsicPass | |
0.0019 ( 0.0%) 0.0000 ( 0.0%) 0.0020 ( 0.0%) 0.0020 ( 0.0%) AssumptionAnalysis | |
0.0019 ( 0.0%) 0.0000 ( 0.0%) 0.0019 ( 0.0%) 0.0019 ( 0.0%) LoopAccessAnalysis | |
0.0018 ( 0.0%) 0.0000 ( 0.0%) 0.0018 ( 0.0%) 0.0018 ( 0.0%) GlobalDCEPass | |
0.0016 ( 0.0%) 0.0002 ( 0.1%) 0.0018 ( 0.0%) 0.0018 ( 0.0%) MemoryDependenceAnalysis | |
0.0015 ( 0.0%) 0.0001 ( 0.1%) 0.0017 ( 0.0%) 0.0017 ( 0.0%) LoopIdiomRecognizePass | |
0.0013 ( 0.0%) 0.0000 ( 0.0%) 0.0013 ( 0.0%) 0.0013 ( 0.0%) AnnotationRemarksPass | |
0.0011 ( 0.0%) 0.0001 ( 0.0%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) DemandedBitsAnalysis | |
0.0010 ( 0.0%) 0.0001 ( 0.0%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) FunctionAnalysisManagerCGSCCProxy | |
0.0010 ( 0.0%) 0.0001 ( 0.0%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) LazyValueAnalysis | |
0.0010 ( 0.0%) 0.0001 ( 0.0%) 0.0010 ( 0.0%) 0.0011 ( 0.0%) RequireAnalysisPass<llvm::OptimizationRemarkEmitterAnalysis, llvm::Function> | |
0.0010 ( 0.0%) 0.0000 ( 0.0%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) OptimizationRemarkEmitterAnalysis | |
0.0010 ( 0.0%) 0.0000 ( 0.0%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) ScopedNoAliasAA | |
0.0009 ( 0.0%) 0.0000 ( 0.0%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) LoopDeletionPass | |
0.0009 ( 0.0%) 0.0000 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) TypeBasedAA | |
0.0009 ( 0.0%) 0.0000 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) ConstantMergePass | |
0.0007 ( 0.0%) 0.0001 ( 0.0%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) MergedLoadStoreMotionPass | |
0.0007 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0008 ( 0.0%) CoroSplitPass | |
0.0007 ( 0.0%) 0.0000 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) InferFunctionAttrsPass | |
0.0007 ( 0.0%) 0.0000 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) CoroCleanupPass | |
0.0006 ( 0.0%) 0.0000 ( 0.0%) 0.0006 ( 0.0%) 0.0006 ( 0.0%) CoroEarlyPass | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0006 ( 0.0%) 0.0006 ( 0.0%) OpenMPOptCGSCCPass | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0006 ( 0.0%) 0.0006 ( 0.0%) SpeculativeExecutionPass | |
0.0005 ( 0.0%) 0.0000 ( 0.0%) 0.0006 ( 0.0%) 0.0006 ( 0.0%) LoopSimplifyCFGPass | |
0.0006 ( 0.0%) 0.0000 ( 0.0%) 0.0006 ( 0.0%) 0.0006 ( 0.0%) WarnMissedTransformationsPass | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0006 ( 0.0%) 0.0006 ( 0.0%) CoroElidePass | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0005 ( 0.0%) 0.0005 ( 0.0%) PhiValuesAnalysis | |
0.0005 ( 0.0%) 0.0000 ( 0.0%) 0.0005 ( 0.0%) 0.0005 ( 0.0%) AlignmentFromAssumptionsPass | |
0.0005 ( 0.0%) 0.0000 ( 0.0%) 0.0005 ( 0.0%) 0.0005 ( 0.0%) InvalidateAnalysisPass<llvm::AAManager> | |
0.0004 ( 0.0%) 0.0000 ( 0.0%) 0.0004 ( 0.0%) 0.0004 ( 0.0%) DeadArgumentEliminationPass | |
0.0003 ( 0.0%) 0.0000 ( 0.0%) 0.0003 ( 0.0%) 0.0003 ( 0.0%) LazyCallGraphAnalysis | |
0.0002 ( 0.0%) 0.0000 ( 0.0%) 0.0002 ( 0.0%) 0.0002 ( 0.0%) SimpleLoopUnswitchPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) EliminateAvailableExternallyPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) RelLookupTableConverterPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) OpenMPOptPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Annotation2MetadataPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) RequireAnalysisPass<llvm::ProfileSummaryAnalysis, llvm::Module> | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) ForceFunctionAttrsPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) ProfileSummaryAnalysis | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) InlineAdvisorAnalysis | |
16.2764 (100.0%) 0.2100 (100.0%) 16.4864 (100.0%) 16.5020 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
Miscellaneous Ungrouped Timers | |
===-------------------------------------------------------------------------=== | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
41.6670 (100.0%) 0.6126 (100.0%) 42.2797 (100.0%) 42.3174 (100.0%) Code Generation Time | |
41.6670 (100.0%) 0.6126 (100.0%) 42.2797 (100.0%) 42.3174 (100.0%) Total | |
1 warning generated. | |
===-------------------------------------------------------------------------=== | |
Register Allocation | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 0.7989 seconds (0.7990 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.5513 ( 77.0%) 0.0615 ( 74.3%) 0.6127 ( 76.7%) 0.6137 ( 76.8%) Evict | |
0.0909 ( 12.7%) 0.0127 ( 15.3%) 0.1036 ( 13.0%) 0.1025 ( 12.8%) Spiller | |
0.0411 ( 5.7%) 0.0063 ( 7.6%) 0.0475 ( 5.9%) 0.0473 ( 5.9%) Global Splitting | |
0.0314 ( 4.4%) 0.0021 ( 2.5%) 0.0335 ( 4.2%) 0.0338 ( 4.2%) Local Splitting | |
0.0014 ( 0.2%) 0.0002 ( 0.2%) 0.0016 ( 0.2%) 0.0017 ( 0.2%) Seed Live Regs | |
0.7162 (100.0%) 0.0827 (100.0%) 0.7989 (100.0%) 0.7990 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
Instruction Selection and Scheduling | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 29.0561 seconds (29.0780 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
19.5378 ( 67.4%) 0.0179 ( 31.8%) 19.5557 ( 67.3%) 19.5704 ( 67.3%) DAG Combining 1 | |
4.9935 ( 17.2%) 0.0089 ( 15.9%) 5.0024 ( 17.2%) 5.0065 ( 17.2%) DAG Combining 2 | |
2.1517 ( 7.4%) 0.0038 ( 6.8%) 2.1555 ( 7.4%) 2.1571 ( 7.4%) DAG Combining after legalize types | |
2.0510 ( 7.1%) 0.0054 ( 9.6%) 2.0564 ( 7.1%) 2.0580 ( 7.1%) Instruction Scheduling | |
0.1266 ( 0.4%) 0.0083 ( 14.8%) 0.1349 ( 0.5%) 0.1350 ( 0.5%) Instruction Selection | |
0.0443 ( 0.2%) 0.0045 ( 8.0%) 0.0488 ( 0.2%) 0.0488 ( 0.2%) Instruction Creation | |
0.0448 ( 0.2%) 0.0033 ( 5.9%) 0.0481 ( 0.2%) 0.0480 ( 0.2%) DAG Legalization | |
0.0258 ( 0.1%) 0.0028 ( 4.9%) 0.0285 ( 0.1%) 0.0285 ( 0.1%) Type Legalization | |
0.0208 ( 0.1%) 0.0007 ( 1.2%) 0.0215 ( 0.1%) 0.0215 ( 0.1%) Vector Legalization | |
0.0033 ( 0.0%) 0.0006 ( 1.1%) 0.0039 ( 0.0%) 0.0039 ( 0.0%) Instruction Scheduling Cleanup | |
0.0002 ( 0.0%) 0.0000 ( 0.0%) 0.0002 ( 0.0%) 0.0002 ( 0.0%) DAG Combining after legalize vectors | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Type Legalization 2 | |
28.9999 (100.0%) 0.0562 (100.0%) 29.0561 (100.0%) 29.0780 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
... Pass execution timing report ... | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 34.3212 seconds (34.3494 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
29.3676 ( 86.8%) 0.0812 ( 16.3%) 29.4488 ( 85.8%) 29.4717 ( 85.8%) X86 DAG->DAG Instruction Selection | |
2.1985 ( 6.5%) 0.0071 ( 1.4%) 2.2056 ( 6.4%) 2.2091 ( 6.4%) Machine Instruction Scheduler | |
1.0677 ( 3.2%) 0.1224 ( 24.6%) 1.1901 ( 3.5%) 1.1910 ( 3.5%) Greedy Register Allocator | |
0.4182 ( 1.2%) 0.1887 ( 37.9%) 0.6069 ( 1.8%) 0.6074 ( 1.8%) X86 Assembly Printer | |
0.1916 ( 0.6%) 0.0011 ( 0.2%) 0.1927 ( 0.6%) 0.1928 ( 0.6%) Stack Slot Coloring | |
0.0600 ( 0.2%) 0.0116 ( 2.3%) 0.0717 ( 0.2%) 0.0716 ( 0.2%) CodeGen Prepare | |
0.0266 ( 0.1%) 0.0015 ( 0.3%) 0.0280 ( 0.1%) 0.0280 ( 0.1%) X86 Byte/Word Instruction Fixup | |
0.0243 ( 0.1%) 0.0030 ( 0.6%) 0.0273 ( 0.1%) 0.0273 ( 0.1%) Live Variable Analysis | |
0.0217 ( 0.1%) 0.0035 ( 0.7%) 0.0252 ( 0.1%) 0.0252 ( 0.1%) Simple Register Coalescing | |
0.0188 ( 0.1%) 0.0025 ( 0.5%) 0.0213 ( 0.1%) 0.0213 ( 0.1%) Live Interval Analysis | |
0.0195 ( 0.1%) 0.0015 ( 0.3%) 0.0210 ( 0.1%) 0.0210 ( 0.1%) Machine Copy Propagation Pass | |
0.0197 ( 0.1%) 0.0014 ( 0.3%) 0.0210 ( 0.1%) 0.0210 ( 0.1%) Prologue/Epilogue Insertion & Frame Finalization | |
0.0147 ( 0.0%) 0.0012 ( 0.2%) 0.0159 ( 0.0%) 0.0159 ( 0.0%) ReachingDefAnalysis | |
0.0144 ( 0.0%) 0.0014 ( 0.3%) 0.0158 ( 0.0%) 0.0157 ( 0.0%) Virtual Register Rewriter | |
0.0137 ( 0.0%) 0.0020 ( 0.4%) 0.0157 ( 0.0%) 0.0157 ( 0.0%) Machine Common Subexpression Elimination | |
0.0145 ( 0.0%) 0.0010 ( 0.2%) 0.0155 ( 0.0%) 0.0155 ( 0.0%) Machine Copy Propagation Pass #2 | |
0.0093 ( 0.0%) 0.0023 ( 0.5%) 0.0116 ( 0.0%) 0.0115 ( 0.0%) Constant Hoisting | |
0.0100 ( 0.0%) 0.0010 ( 0.2%) 0.0110 ( 0.0%) 0.0110 ( 0.0%) Peephole Optimizations | |
0.0089 ( 0.0%) 0.0014 ( 0.3%) 0.0103 ( 0.0%) 0.0103 ( 0.0%) Two-Address instruction pass | |
0.0093 ( 0.0%) 0.0006 ( 0.1%) 0.0100 ( 0.0%) 0.0100 ( 0.0%) Early Machine Loop Invariant Code Motion | |
0.0091 ( 0.0%) 0.0008 ( 0.2%) 0.0100 ( 0.0%) 0.0099 ( 0.0%) Eliminate PHI nodes for register allocation | |
0.0065 ( 0.0%) 0.0030 ( 0.6%) 0.0095 ( 0.0%) 0.0095 ( 0.0%) Loop Strength Reduction | |
0.0054 ( 0.0%) 0.0039 ( 0.8%) 0.0093 ( 0.0%) 0.0094 ( 0.0%) ObjC ARC contraction | |
0.0078 ( 0.0%) 0.0008 ( 0.2%) 0.0087 ( 0.0%) 0.0087 ( 0.0%) Control Flow Optimizer | |
0.0062 ( 0.0%) 0.0023 ( 0.5%) 0.0085 ( 0.0%) 0.0085 ( 0.0%) Expand Atomic instructions | |
0.0073 ( 0.0%) 0.0008 ( 0.2%) 0.0081 ( 0.0%) 0.0081 ( 0.0%) Live Range Shrink | |
0.0071 ( 0.0%) 0.0008 ( 0.2%) 0.0078 ( 0.0%) 0.0078 ( 0.0%) Remove dead machine instructions | |
0.0066 ( 0.0%) 0.0008 ( 0.2%) 0.0074 ( 0.0%) 0.0074 ( 0.0%) Branch Probability Basic Block Placement | |
0.0059 ( 0.0%) 0.0008 ( 0.2%) 0.0067 ( 0.0%) 0.0067 ( 0.0%) Machine code sinking | |
0.0056 ( 0.0%) 0.0007 ( 0.1%) 0.0063 ( 0.0%) 0.0063 ( 0.0%) Slot index numbering #2 | |
0.0052 ( 0.0%) 0.0010 ( 0.2%) 0.0062 ( 0.0%) 0.0062 ( 0.0%) Free MachineFunction | |
0.0055 ( 0.0%) 0.0005 ( 0.1%) 0.0061 ( 0.0%) 0.0061 ( 0.0%) X86 Execution Dependency Fix | |
0.0046 ( 0.0%) 0.0013 ( 0.3%) 0.0059 ( 0.0%) 0.0059 ( 0.0%) Branch Probability Analysis | |
0.0039 ( 0.0%) 0.0016 ( 0.3%) 0.0055 ( 0.0%) 0.0055 ( 0.0%) Canonicalize Freeze Instructions in Loops | |
0.0044 ( 0.0%) 0.0005 ( 0.1%) 0.0049 ( 0.0%) 0.0049 ( 0.0%) Remove dead machine instructions #2 | |
0.0043 ( 0.0%) 0.0005 ( 0.1%) 0.0048 ( 0.0%) 0.0047 ( 0.0%) Merge disjoint stack slots | |
0.0037 ( 0.0%) 0.0008 ( 0.2%) 0.0045 ( 0.0%) 0.0045 ( 0.0%) Branch Probability Analysis #2 | |
0.0041 ( 0.0%) 0.0004 ( 0.1%) 0.0045 ( 0.0%) 0.0045 ( 0.0%) Machine Loop Invariant Code Motion | |
0.0039 ( 0.0%) 0.0003 ( 0.1%) 0.0043 ( 0.0%) 0.0043 ( 0.0%) Slot index numbering | |
0.0034 ( 0.0%) 0.0008 ( 0.2%) 0.0042 ( 0.0%) 0.0042 ( 0.0%) Expand memcmp() to load/stores | |
0.0034 ( 0.0%) 0.0007 ( 0.1%) 0.0041 ( 0.0%) 0.0041 ( 0.0%) Lower AMX type for load/store | |
0.0031 ( 0.0%) 0.0009 ( 0.2%) 0.0041 ( 0.0%) 0.0041 ( 0.0%) Dominator Tree Construction #2 | |
0.0036 ( 0.0%) 0.0003 ( 0.1%) 0.0039 ( 0.0%) 0.0039 ( 0.0%) BreakFalseDeps | |
0.0030 ( 0.0%) 0.0008 ( 0.2%) 0.0039 ( 0.0%) 0.0038 ( 0.0%) Induction Variable Users | |
0.0032 ( 0.0%) 0.0006 ( 0.1%) 0.0039 ( 0.0%) 0.0038 ( 0.0%) Machine InstCombiner | |
0.0027 ( 0.0%) 0.0009 ( 0.2%) 0.0036 ( 0.0%) 0.0036 ( 0.0%) Block Frequency Analysis | |
0.0027 ( 0.0%) 0.0009 ( 0.2%) 0.0036 ( 0.0%) 0.0036 ( 0.0%) Post-Dominator Tree Construction | |
0.0028 ( 0.0%) 0.0007 ( 0.1%) 0.0035 ( 0.0%) 0.0035 ( 0.0%) Lower constant intrinsics | |
0.0029 ( 0.0%) 0.0006 ( 0.1%) 0.0034 ( 0.0%) 0.0034 ( 0.0%) MachinePostDominator Tree Construction | |
0.0029 ( 0.0%) 0.0005 ( 0.1%) 0.0034 ( 0.0%) 0.0034 ( 0.0%) MachinePostDominator Tree Construction #2 | |
0.0030 ( 0.0%) 0.0004 ( 0.1%) 0.0034 ( 0.0%) 0.0034 ( 0.0%) X86 LEA Optimize | |
0.0030 ( 0.0%) 0.0004 ( 0.1%) 0.0034 ( 0.0%) 0.0034 ( 0.0%) MachineDominator Tree Construction #7 | |
0.0027 ( 0.0%) 0.0003 ( 0.1%) 0.0030 ( 0.0%) 0.0030 ( 0.0%) X86 cmov Conversion | |
0.0025 ( 0.0%) 0.0005 ( 0.1%) 0.0030 ( 0.0%) 0.0030 ( 0.0%) Partially inline calls to library functions | |
0.0027 ( 0.0%) 0.0003 ( 0.1%) 0.0030 ( 0.0%) 0.0030 ( 0.0%) X86 LEA Fixup | |
0.0025 ( 0.0%) 0.0005 ( 0.1%) 0.0030 ( 0.0%) 0.0029 ( 0.0%) Machine Block Frequency Analysis #3 | |
0.0024 ( 0.0%) 0.0005 ( 0.1%) 0.0029 ( 0.0%) 0.0029 ( 0.0%) Machine Block Frequency Analysis | |
0.0023 ( 0.0%) 0.0006 ( 0.1%) 0.0029 ( 0.0%) 0.0029 ( 0.0%) Post-Dominator Tree Construction #2 | |
0.0022 ( 0.0%) 0.0007 ( 0.1%) 0.0029 ( 0.0%) 0.0028 ( 0.0%) Scalar Evolution Analysis | |
0.0025 ( 0.0%) 0.0004 ( 0.1%) 0.0029 ( 0.0%) 0.0028 ( 0.0%) MachinePostDominator Tree Construction #3 | |
0.0023 ( 0.0%) 0.0005 ( 0.1%) 0.0027 ( 0.0%) 0.0027 ( 0.0%) Replace intrinsics with calls to vector library | |
0.0024 ( 0.0%) 0.0003 ( 0.1%) 0.0027 ( 0.0%) 0.0027 ( 0.0%) Check CFA info and insert CFI instructions if needed | |
0.0023 ( 0.0%) 0.0003 ( 0.1%) 0.0026 ( 0.0%) 0.0026 ( 0.0%) Finalize ISel and expand pseudo-instructions | |
0.0022 ( 0.0%) 0.0004 ( 0.1%) 0.0026 ( 0.0%) 0.0026 ( 0.0%) MachineDominator Tree Construction | |
0.0023 ( 0.0%) 0.0002 ( 0.0%) 0.0025 ( 0.0%) 0.0026 ( 0.0%) Post-RA pseudo instruction expansion pass | |
0.0021 ( 0.0%) 0.0004 ( 0.1%) 0.0025 ( 0.0%) 0.0025 ( 0.0%) Machine Block Frequency Analysis #4 | |
0.0020 ( 0.0%) 0.0004 ( 0.1%) 0.0024 ( 0.0%) 0.0024 ( 0.0%) Expand vector predication intrinsics | |
0.0020 ( 0.0%) 0.0005 ( 0.1%) 0.0024 ( 0.0%) 0.0024 ( 0.0%) Interleaved Access Pass | |
0.0020 ( 0.0%) 0.0005 ( 0.1%) 0.0024 ( 0.0%) 0.0024 ( 0.0%) X86 Partial Reduction | |
0.0020 ( 0.0%) 0.0004 ( 0.1%) 0.0024 ( 0.0%) 0.0024 ( 0.0%) Scalarize Masked Memory Intrinsics | |
0.0021 ( 0.0%) 0.0003 ( 0.1%) 0.0024 ( 0.0%) 0.0024 ( 0.0%) MachineDominator Tree Construction #9 | |
0.0021 ( 0.0%) 0.0002 ( 0.0%) 0.0024 ( 0.0%) 0.0024 ( 0.0%) X86 pseudo instruction expansion pass | |
0.0020 ( 0.0%) 0.0004 ( 0.1%) 0.0023 ( 0.0%) 0.0023 ( 0.0%) Shrink Wrapping analysis | |
0.0020 ( 0.0%) 0.0003 ( 0.1%) 0.0023 ( 0.0%) 0.0023 ( 0.0%) Machine Dominance Frontier Construction | |
0.0019 ( 0.0%) 0.0004 ( 0.1%) 0.0023 ( 0.0%) 0.0023 ( 0.0%) Expand reduction intrinsics | |
0.0019 ( 0.0%) 0.0003 ( 0.1%) 0.0022 ( 0.0%) 0.0022 ( 0.0%) Machine Block Frequency Analysis #5 | |
0.0019 ( 0.0%) 0.0003 ( 0.1%) 0.0023 ( 0.0%) 0.0022 ( 0.0%) Tile Register Pre-configure | |
0.0016 ( 0.0%) 0.0006 ( 0.1%) 0.0022 ( 0.0%) 0.0022 ( 0.0%) Natural Loop Information | |
0.0014 ( 0.0%) 0.0008 ( 0.2%) 0.0022 ( 0.0%) 0.0022 ( 0.0%) Dominator Tree Construction | |
0.0019 ( 0.0%) 0.0003 ( 0.1%) 0.0022 ( 0.0%) 0.0022 ( 0.0%) MachineDominator Tree Construction #8 | |
0.0019 ( 0.0%) 0.0003 ( 0.1%) 0.0022 ( 0.0%) 0.0022 ( 0.0%) X86 Fixup SetCC | |
0.0019 ( 0.0%) 0.0002 ( 0.0%) 0.0021 ( 0.0%) 0.0021 ( 0.0%) X86 Lower Tile Copy | |
0.0018 ( 0.0%) 0.0002 ( 0.0%) 0.0020 ( 0.0%) 0.0020 ( 0.0%) X86 Optimize Call Frame | |
0.0018 ( 0.0%) 0.0002 ( 0.0%) 0.0020 ( 0.0%) 0.0020 ( 0.0%) Debug Variable Analysis | |
0.0016 ( 0.0%) 0.0004 ( 0.1%) 0.0021 ( 0.0%) 0.0020 ( 0.0%) Dominator Tree Construction #3 | |
0.0018 ( 0.0%) 0.0002 ( 0.0%) 0.0020 ( 0.0%) 0.0020 ( 0.0%) Live Stack Slot Analysis | |
0.0016 ( 0.0%) 0.0003 ( 0.1%) 0.0019 ( 0.0%) 0.0019 ( 0.0%) X86 EFLAGS copy lowering | |
0.0016 ( 0.0%) 0.0003 ( 0.1%) 0.0019 ( 0.0%) 0.0019 ( 0.0%) MachineDominator Tree Construction #5 | |
0.0016 ( 0.0%) 0.0003 ( 0.1%) 0.0019 ( 0.0%) 0.0019 ( 0.0%) Live Register Matrix | |
0.0016 ( 0.0%) 0.0003 ( 0.1%) 0.0019 ( 0.0%) 0.0019 ( 0.0%) Machine Natural Loop Construction | |
0.0014 ( 0.0%) 0.0005 ( 0.1%) 0.0018 ( 0.0%) 0.0018 ( 0.0%) Canonicalize natural loops | |
0.0015 ( 0.0%) 0.0003 ( 0.1%) 0.0018 ( 0.0%) 0.0018 ( 0.0%) MachineDominator Tree Construction #2 | |
0.0015 ( 0.0%) 0.0003 ( 0.1%) 0.0018 ( 0.0%) 0.0018 ( 0.0%) MachineDominator Tree Construction #4 | |
0.0015 ( 0.0%) 0.0003 ( 0.1%) 0.0018 ( 0.0%) 0.0018 ( 0.0%) Machine Natural Loop Construction #4 | |
0.0014 ( 0.0%) 0.0003 ( 0.1%) 0.0017 ( 0.0%) 0.0017 ( 0.0%) Machine Block Frequency Analysis #2 | |
0.0014 ( 0.0%) 0.0003 ( 0.1%) 0.0017 ( 0.0%) 0.0017 ( 0.0%) MachineDominator Tree Construction #6 | |
0.0013 ( 0.0%) 0.0003 ( 0.1%) 0.0016 ( 0.0%) 0.0016 ( 0.0%) MachineDominator Tree Construction #3 | |
0.0014 ( 0.0%) 0.0002 ( 0.0%) 0.0016 ( 0.0%) 0.0016 ( 0.0%) X86 Avoid Store Forwarding Blocks | |
0.0013 ( 0.0%) 0.0003 ( 0.1%) 0.0016 ( 0.0%) 0.0016 ( 0.0%) Machine Natural Loop Construction #3 | |
0.0013 ( 0.0%) 0.0002 ( 0.1%) 0.0016 ( 0.0%) 0.0016 ( 0.0%) PostRA Machine Sink | |
0.0013 ( 0.0%) 0.0002 ( 0.0%) 0.0015 ( 0.0%) 0.0015 ( 0.0%) Machine Natural Loop Construction #5 | |
0.0013 ( 0.0%) 0.0002 ( 0.0%) 0.0015 ( 0.0%) 0.0015 ( 0.0%) Early Tail Duplication | |
0.0012 ( 0.0%) 0.0003 ( 0.1%) 0.0015 ( 0.0%) 0.0015 ( 0.0%) Natural Loop Information #5 | |
0.0011 ( 0.0%) 0.0004 ( 0.1%) 0.0015 ( 0.0%) 0.0015 ( 0.0%) Natural Loop Information #2 | |
0.0011 ( 0.0%) 0.0004 ( 0.1%) 0.0015 ( 0.0%) 0.0015 ( 0.0%) Merge contiguous icmps into a memcmp | |
0.0011 ( 0.0%) 0.0003 ( 0.1%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Function Alias Analysis Results #2 | |
0.0011 ( 0.0%) 0.0003 ( 0.1%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Remove unreachable machine basic blocks | |
0.0010 ( 0.0%) 0.0003 ( 0.1%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Natural Loop Information #4 | |
0.0012 ( 0.0%) 0.0002 ( 0.0%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Tail Duplication | |
0.0012 ( 0.0%) 0.0002 ( 0.0%) 0.0013 ( 0.0%) 0.0013 ( 0.0%) Process Implicit Definitions | |
0.0012 ( 0.0%) 0.0002 ( 0.0%) 0.0013 ( 0.0%) 0.0013 ( 0.0%) Optimize machine instruction PHIs | |
0.0011 ( 0.0%) 0.0002 ( 0.0%) 0.0013 ( 0.0%) 0.0013 ( 0.0%) Machine Natural Loop Construction #2 | |
0.0010 ( 0.0%) 0.0003 ( 0.1%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Exception handling preparation | |
0.0010 ( 0.0%) 0.0003 ( 0.1%) 0.0013 ( 0.0%) 0.0012 ( 0.0%) Function Alias Analysis Results #3 | |
0.0009 ( 0.0%) 0.0003 ( 0.1%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Natural Loop Information #3 | |
0.0009 ( 0.0%) 0.0003 ( 0.1%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Basic Alias Analysis (stateless AA impl) #2 | |
0.0009 ( 0.0%) 0.0003 ( 0.1%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Remove unreachable blocks from the CFG | |
0.0009 ( 0.0%) 0.0002 ( 0.0%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) Machine Trace Metrics | |
0.0008 ( 0.0%) 0.0002 ( 0.0%) 0.0010 ( 0.0%) 0.0011 ( 0.0%) Spill Code Placement Analysis | |
0.0008 ( 0.0%) 0.0002 ( 0.0%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Post RA top-down list latency scheduler | |
0.0008 ( 0.0%) 0.0002 ( 0.0%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Insert stack protectors | |
0.0007 ( 0.0%) 0.0002 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Basic Alias Analysis (stateless AA impl) #4 | |
0.0006 ( 0.0%) 0.0004 ( 0.1%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Basic Alias Analysis (stateless AA impl) | |
0.0008 ( 0.0%) 0.0002 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Bundle Machine CFG Edges | |
0.0007 ( 0.0%) 0.0002 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Lazy Branch Probability Analysis #2 | |
0.0007 ( 0.0%) 0.0002 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Bundle Machine CFG Edges #2 | |
0.0007 ( 0.0%) 0.0002 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Lazy Branch Probability Analysis | |
0.0007 ( 0.0%) 0.0002 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) X86 Indirect Branch Tracking | |
0.0007 ( 0.0%) 0.0001 ( 0.0%) 0.0008 ( 0.0%) 0.0009 ( 0.0%) Virtual Register Map | |
0.0007 ( 0.0%) 0.0001 ( 0.0%) 0.0008 ( 0.0%) 0.0009 ( 0.0%) Local Dynamic TLS Access Clean-up | |
0.0005 ( 0.0%) 0.0003 ( 0.1%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Function Alias Analysis Results | |
0.0006 ( 0.0%) 0.0002 ( 0.0%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Basic Alias Analysis (stateless AA impl) #3 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Live DEBUG_VALUE analysis | |
0.0006 ( 0.0%) 0.0002 ( 0.0%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Expand indirectbr instructions | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0008 ( 0.0%) Tile Register Configure | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Insert fentry calls | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0008 ( 0.0%) Early If-Conversion | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 FP Stackifier | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Insert XRay ops | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Machine Optimization Remark Emitter | |
0.0005 ( 0.0%) 0.0002 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Block Frequency Analysis | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Domain Reassignment Pass | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Detect Dead Lanes | |
0.0006 ( 0.0%) 0.0002 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Machine Optimization Remark Emitter #3 | |
0.0005 ( 0.0%) 0.0002 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Block Frequency Analysis #2 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Indirect Thunks | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Fixup Statepoint Caller Saved | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Atom pad short functions | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Implement the 'patchable-function' attribute | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) StackMap Liveness Analysis | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Local Stack Slot Allocation | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Rename Disconnected Subregister Components | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Machine Optimization Remark Emitter #2 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 speculative load hardening | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 PIC Global Base Reg Initialization | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #3 | |
0.0005 ( 0.0%) 0.0002 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lower AMX intrinsics | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Insert Cache Prefetches | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Load Value Injection (LVI) Load Hardening | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Contiguously Lay Out Funclets | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #7 | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #8 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Remove Redundant DEBUG_VALUE analysis | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0006 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Safe Stack instrumentation pass | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 WinAlloca Expander | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Discriminate Memory Operands | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Analyze Machine Code For Garbage Collection | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #6 | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Compressing EVEX instrs to VEX encoding when possible | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #4 | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Speculative Execution Side Effect Suppression | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #2 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #5 | |
0.0005 ( 0.0%) 0.0002 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Shadow Stack GC Lowering | |
0.0005 ( 0.0%) 0.0002 ( 0.0%) 0.0006 ( 0.0%) 0.0007 ( 0.0%) Lower Garbage Collection Instructions | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #9 | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0006 ( 0.0%) 0.0007 ( 0.0%) X86 vzeroupper inserter | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Load Value Injection (LVI) Ret-Hardening | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0006 ( 0.0%) 0.0007 ( 0.0%) X86 insert wait instruction | |
0.0001 ( 0.0%) 0.0000 ( 0.0%) 0.0001 ( 0.0%) 0.0001 ( 0.0%) Assumption Cache Tracker | |
0.0001 ( 0.0%) 0.0000 ( 0.0%) 0.0001 ( 0.0%) 0.0001 ( 0.0%) Pre-ISel Intrinsic Lowering | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Scoped NoAlias Alias Analysis | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Target Library Information | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Profile summary info | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Target Pass Configuration | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Type-Based Alias Analysis | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Target Transform Information | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Machine Branch Probability Analysis | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Machine Module Information | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Create Garbage Collector Module Metadata | |
33.8233 (100.0%) 0.4979 (100.0%) 34.3212 (100.0%) 34.3494 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
DWARF Emission | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 0.2734 seconds (0.2736 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.0941 ( 50.1%) 0.0428 ( 50.0%) 0.1370 ( 50.1%) 0.1374 ( 50.2%) Debug Info Emission | |
0.0936 ( 49.9%) 0.0429 ( 50.0%) 0.1364 ( 49.9%) 0.1362 ( 49.8%) DWARF Exception Writer | |
0.1877 (100.0%) 0.0857 (100.0%) 0.2734 (100.0%) 0.2736 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
Clang front-end time report | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 42.3613 seconds (42.3992 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
41.7484 (100.0%) 0.6130 (100.0%) 42.3613 (100.0%) 42.3992 (100.0%) Clang front-end timer | |
41.7484 (100.0%) 0.6130 (100.0%) 42.3613 (100.0%) 42.3992 (100.0%) Total |
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===-------------------------------------------------------------------------=== | |
... Pass execution timing report ... | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 1.0782 seconds (1.0801 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.2562 ( 26.4%) 0.0232 ( 21.5%) 0.2794 ( 25.9%) 0.2800 ( 25.9%) ModuleInlinerWrapperPass | |
0.2450 ( 25.3%) 0.0225 ( 20.9%) 0.2675 ( 24.8%) 0.2682 ( 24.8%) DevirtSCCRepeatedPass | |
0.1048 ( 10.8%) 0.0128 ( 11.9%) 0.1176 ( 10.9%) 0.1179 ( 10.9%) EarlyCSEPass | |
0.1024 ( 10.6%) 0.0103 ( 9.5%) 0.1127 ( 10.5%) 0.1128 ( 10.4%) SROA | |
0.0528 ( 5.4%) 0.0011 ( 1.1%) 0.0539 ( 5.0%) 0.0540 ( 5.0%) InstCombinePass | |
0.0302 ( 3.1%) 0.0036 ( 3.3%) 0.0337 ( 3.1%) 0.0338 ( 3.1%) IPSCCPPass | |
0.0288 ( 3.0%) 0.0000 ( 0.0%) 0.0288 ( 2.7%) 0.0289 ( 2.7%) CalledValuePropagationPass | |
0.0115 ( 1.2%) 0.0020 ( 1.8%) 0.0134 ( 1.2%) 0.0135 ( 1.2%) AAManager | |
0.0110 ( 1.1%) 0.0014 ( 1.3%) 0.0124 ( 1.1%) 0.0124 ( 1.1%) PostOrderFunctionAttrsPass | |
0.0078 ( 0.8%) 0.0037 ( 3.4%) 0.0115 ( 1.1%) 0.0115 ( 1.1%) LoopDistributePass | |
0.0066 ( 0.7%) 0.0030 ( 2.8%) 0.0096 ( 0.9%) 0.0096 ( 0.9%) LoopVectorizePass | |
0.0075 ( 0.8%) 0.0018 ( 1.7%) 0.0093 ( 0.9%) 0.0094 ( 0.9%) SimplifyCFGPass | |
0.0076 ( 0.8%) 0.0008 ( 0.8%) 0.0084 ( 0.8%) 0.0084 ( 0.8%) MemorySSAAnalysis | |
0.0061 ( 0.6%) 0.0017 ( 1.6%) 0.0078 ( 0.7%) 0.0078 ( 0.7%) DominatorTreeAnalysis | |
0.0051 ( 0.5%) 0.0014 ( 1.3%) 0.0065 ( 0.6%) 0.0065 ( 0.6%) LoopSimplifyPass | |
0.0043 ( 0.4%) 0.0018 ( 1.6%) 0.0061 ( 0.6%) 0.0061 ( 0.6%) BlockFrequencyAnalysis | |
0.0051 ( 0.5%) 0.0000 ( 0.0%) 0.0051 ( 0.5%) 0.0051 ( 0.5%) GlobalOptPass | |
0.0022 ( 0.2%) 0.0028 ( 2.6%) 0.0050 ( 0.5%) 0.0049 ( 0.5%) PromotePass | |
0.0043 ( 0.4%) 0.0004 ( 0.4%) 0.0047 ( 0.4%) 0.0048 ( 0.4%) GVN | |
0.0035 ( 0.4%) 0.0005 ( 0.5%) 0.0041 ( 0.4%) 0.0041 ( 0.4%) BasicAA | |
0.0035 ( 0.4%) 0.0005 ( 0.4%) 0.0039 ( 0.4%) 0.0039 ( 0.4%) JumpThreadingPass | |
0.0028 ( 0.3%) 0.0012 ( 1.1%) 0.0039 ( 0.4%) 0.0039 ( 0.4%) BranchProbabilityAnalysis | |
0.0026 ( 0.3%) 0.0012 ( 1.1%) 0.0038 ( 0.3%) 0.0037 ( 0.3%) ScalarEvolutionAnalysis | |
0.0033 ( 0.3%) 0.0004 ( 0.4%) 0.0037 ( 0.3%) 0.0037 ( 0.3%) ADCEPass | |
0.0029 ( 0.3%) 0.0008 ( 0.8%) 0.0037 ( 0.3%) 0.0037 ( 0.3%) PostDominatorTreeAnalysis | |
0.0021 ( 0.2%) 0.0008 ( 0.8%) 0.0029 ( 0.3%) 0.0029 ( 0.3%) Float2IntPass | |
0.0023 ( 0.2%) 0.0002 ( 0.2%) 0.0025 ( 0.2%) 0.0025 ( 0.2%) DSEPass | |
0.0023 ( 0.2%) 0.0002 ( 0.2%) 0.0025 ( 0.2%) 0.0025 ( 0.2%) InlinerPass | |
0.0023 ( 0.2%) 0.0002 ( 0.2%) 0.0025 ( 0.2%) 0.0025 ( 0.2%) CorrelatedValuePropagationPass | |
0.0019 ( 0.2%) 0.0005 ( 0.4%) 0.0024 ( 0.2%) 0.0024 ( 0.2%) LCSSAPass | |
0.0017 ( 0.2%) 0.0005 ( 0.4%) 0.0022 ( 0.2%) 0.0022 ( 0.2%) TargetIRAnalysis | |
0.0022 ( 0.2%) 0.0000 ( 0.0%) 0.0022 ( 0.2%) 0.0022 ( 0.2%) RequireAnalysisPass<llvm::GlobalsAA, llvm::Module> | |
0.0021 ( 0.2%) 0.0000 ( 0.0%) 0.0021 ( 0.2%) 0.0021 ( 0.2%) GlobalsAA | |
0.0020 ( 0.2%) 0.0000 ( 0.0%) 0.0020 ( 0.2%) 0.0020 ( 0.2%) CallGraphAnalysis | |
0.0016 ( 0.2%) 0.0004 ( 0.3%) 0.0019 ( 0.2%) 0.0020 ( 0.2%) LoopAnalysis | |
0.0013 ( 0.1%) 0.0006 ( 0.6%) 0.0019 ( 0.2%) 0.0019 ( 0.2%) AssumptionAnalysis | |
0.0016 ( 0.2%) 0.0002 ( 0.2%) 0.0019 ( 0.2%) 0.0019 ( 0.2%) BDCEPass | |
0.0014 ( 0.1%) 0.0004 ( 0.4%) 0.0018 ( 0.2%) 0.0017 ( 0.2%) TargetLibraryAnalysis | |
0.0017 ( 0.2%) 0.0001 ( 0.1%) 0.0017 ( 0.2%) 0.0017 ( 0.2%) MemCpyOptPass | |
0.0014 ( 0.1%) 0.0002 ( 0.2%) 0.0016 ( 0.2%) 0.0016 ( 0.2%) MemoryDependenceAnalysis | |
0.0016 ( 0.2%) 0.0000 ( 0.0%) 0.0016 ( 0.1%) 0.0016 ( 0.1%) GlobalDCEPass | |
0.0014 ( 0.1%) 0.0002 ( 0.1%) 0.0016 ( 0.1%) 0.0016 ( 0.1%) ReassociatePass | |
0.0015 ( 0.1%) 0.0000 ( 0.0%) 0.0015 ( 0.1%) 0.0015 ( 0.1%) LICMPass | |
0.0013 ( 0.1%) 0.0001 ( 0.1%) 0.0014 ( 0.1%) 0.0014 ( 0.1%) SCCPPass | |
0.0009 ( 0.1%) 0.0003 ( 0.3%) 0.0013 ( 0.1%) 0.0013 ( 0.1%) SLPVectorizerPass | |
0.0008 ( 0.1%) 0.0002 ( 0.2%) 0.0010 ( 0.1%) 0.0010 ( 0.1%) DemandedBitsAnalysis | |
0.0009 ( 0.1%) 0.0001 ( 0.1%) 0.0010 ( 0.1%) 0.0010 ( 0.1%) LazyValueAnalysis | |
0.0008 ( 0.1%) 0.0001 ( 0.1%) 0.0009 ( 0.1%) 0.0010 ( 0.1%) FunctionAnalysisManagerCGSCCProxy | |
0.0007 ( 0.1%) 0.0002 ( 0.2%) 0.0009 ( 0.1%) 0.0009 ( 0.1%) RequireAnalysisPass<llvm::OptimizationRemarkEmitterAnalysis, llvm::Function> | |
0.0008 ( 0.1%) 0.0001 ( 0.1%) 0.0009 ( 0.1%) 0.0009 ( 0.1%) OptimizationRemarkEmitterAnalysis | |
0.0007 ( 0.1%) 0.0001 ( 0.1%) 0.0009 ( 0.1%) 0.0009 ( 0.1%) ScopedNoAliasAA | |
0.0008 ( 0.1%) 0.0001 ( 0.1%) 0.0009 ( 0.1%) 0.0009 ( 0.1%) TailCallElimPass | |
0.0007 ( 0.1%) 0.0001 ( 0.1%) 0.0009 ( 0.1%) 0.0009 ( 0.1%) TypeBasedAA | |
0.0006 ( 0.1%) 0.0002 ( 0.2%) 0.0008 ( 0.1%) 0.0008 ( 0.1%) LowerConstantIntrinsicsPass | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) LowerExpectIntrinsicPass | |
0.0007 ( 0.1%) 0.0000 ( 0.0%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) CGProfilePass | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) VectorCombinePass | |
0.0006 ( 0.1%) 0.0001 ( 0.1%) 0.0006 ( 0.1%) 0.0007 ( 0.1%) CoroSplitPass | |
0.0004 ( 0.0%) 0.0002 ( 0.2%) 0.0006 ( 0.1%) 0.0006 ( 0.1%) CoroEarlyPass | |
0.0004 ( 0.0%) 0.0002 ( 0.2%) 0.0006 ( 0.1%) 0.0006 ( 0.1%) LoopUnrollPass | |
0.0004 ( 0.0%) 0.0002 ( 0.2%) 0.0006 ( 0.1%) 0.0006 ( 0.1%) InstSimplifyPass | |
0.0004 ( 0.0%) 0.0002 ( 0.2%) 0.0006 ( 0.1%) 0.0006 ( 0.1%) LoopLoadEliminationPass | |
0.0004 ( 0.0%) 0.0002 ( 0.2%) 0.0006 ( 0.1%) 0.0006 ( 0.1%) CoroCleanupPass | |
0.0005 ( 0.1%) 0.0001 ( 0.1%) 0.0006 ( 0.1%) 0.0006 ( 0.1%) OpenMPOptCGSCCPass | |
0.0005 ( 0.0%) 0.0001 ( 0.1%) 0.0005 ( 0.1%) 0.0006 ( 0.1%) SpeculativeExecutionPass | |
0.0004 ( 0.0%) 0.0002 ( 0.1%) 0.0005 ( 0.1%) 0.0005 ( 0.0%) LoopSinkPass | |
0.0005 ( 0.0%) 0.0001 ( 0.1%) 0.0005 ( 0.0%) 0.0005 ( 0.0%) CoroElidePass | |
0.0004 ( 0.0%) 0.0001 ( 0.1%) 0.0005 ( 0.0%) 0.0005 ( 0.0%) MergedLoadStoreMotionPass | |
0.0003 ( 0.0%) 0.0002 ( 0.1%) 0.0005 ( 0.0%) 0.0005 ( 0.0%) DivRemPairsPass | |
0.0005 ( 0.0%) 0.0001 ( 0.1%) 0.0005 ( 0.0%) 0.0005 ( 0.0%) LibCallsShrinkWrapPass | |
0.0004 ( 0.0%) 0.0001 ( 0.0%) 0.0005 ( 0.0%) 0.0005 ( 0.0%) PhiValuesAnalysis | |
0.0003 ( 0.0%) 0.0002 ( 0.2%) 0.0005 ( 0.0%) 0.0005 ( 0.0%) AlignmentFromAssumptionsPass | |
0.0005 ( 0.1%) 0.0000 ( 0.0%) 0.0005 ( 0.0%) 0.0005 ( 0.0%) InvalidateAnalysisPass<llvm::AAManager> | |
0.0003 ( 0.0%) 0.0001 ( 0.1%) 0.0005 ( 0.0%) 0.0005 ( 0.0%) InjectTLIMappings | |
0.0003 ( 0.0%) 0.0001 ( 0.1%) 0.0005 ( 0.0%) 0.0005 ( 0.0%) WarnMissedTransformationsPass | |
0.0005 ( 0.0%) 0.0000 ( 0.0%) 0.0005 ( 0.0%) 0.0005 ( 0.0%) AnnotationRemarksPass | |
0.0004 ( 0.0%) 0.0000 ( 0.0%) 0.0004 ( 0.0%) 0.0004 ( 0.0%) IndVarSimplifyPass | |
0.0003 ( 0.0%) 0.0000 ( 0.0%) 0.0003 ( 0.0%) 0.0003 ( 0.0%) DeadArgumentEliminationPass | |
0.0003 ( 0.0%) 0.0000 ( 0.0%) 0.0003 ( 0.0%) 0.0003 ( 0.0%) LazyCallGraphAnalysis | |
0.0001 ( 0.0%) 0.0000 ( 0.0%) 0.0001 ( 0.0%) 0.0001 ( 0.0%) ReversePostOrderFunctionAttrsPass | |
0.0001 ( 0.0%) 0.0000 ( 0.0%) 0.0001 ( 0.0%) 0.0001 ( 0.0%) LoopInstSimplifyPass | |
0.0001 ( 0.0%) 0.0000 ( 0.0%) 0.0001 ( 0.0%) 0.0001 ( 0.0%) LoopFullUnrollPass | |
0.0001 ( 0.0%) 0.0000 ( 0.0%) 0.0001 ( 0.0%) 0.0001 ( 0.0%) ConstantMergePass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) InferFunctionAttrsPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) LoopDeletionPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) EliminateAvailableExternallyPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) LoopSimplifyCFGPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) LoopIdiomRecognizePass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) RelLookupTableConverterPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) LoopRotatePass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) OpenMPOptPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) SimpleLoopUnswitchPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Annotation2MetadataPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) RequireAnalysisPass<llvm::ProfileSummaryAnalysis, llvm::Module> | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) ForceFunctionAttrsPass | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) ProfileSummaryAnalysis | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) InlineAdvisorAnalysis | |
0.9703 (100.0%) 0.1079 (100.0%) 1.0782 (100.0%) 1.0801 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
Miscellaneous Ungrouped Timers | |
===-------------------------------------------------------------------------=== | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.9769 (100.0%) 0.2063 (100.0%) 1.1832 (100.0%) 1.1848 (100.0%) Code Generation Time | |
0.9769 (100.0%) 0.2063 (100.0%) 1.1832 (100.0%) 1.1848 (100.0%) Total | |
1 warning generated. | |
===-------------------------------------------------------------------------=== | |
Register Allocation | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 0.0006 seconds (0.0006 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.0003 ( 65.6%) 0.0001 (100.0%) 0.0004 ( 73.5%) 0.0004 ( 73.8%) Seed Live Regs | |
0.0002 ( 34.4%) 0.0000 ( 0.0%) 0.0002 ( 26.5%) 0.0002 ( 26.2%) Evict | |
0.0004 (100.0%) 0.0001 (100.0%) 0.0006 (100.0%) 0.0006 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
Instruction Selection and Scheduling | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 0.2426 seconds (0.2429 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.2164 ( 93.7%) 0.0076 ( 64.2%) 0.2240 ( 92.3%) 0.2242 ( 92.3%) DAG Combining 1 | |
0.0035 ( 1.5%) 0.0010 ( 8.3%) 0.0045 ( 1.8%) 0.0044 ( 1.8%) Instruction Selection | |
0.0031 ( 1.4%) 0.0007 ( 5.5%) 0.0038 ( 1.6%) 0.0038 ( 1.6%) DAG Combining 2 | |
0.0028 ( 1.2%) 0.0009 ( 7.4%) 0.0036 ( 1.5%) 0.0036 ( 1.5%) Instruction Scheduling | |
0.0018 ( 0.8%) 0.0007 ( 5.7%) 0.0025 ( 1.0%) 0.0025 ( 1.0%) Instruction Creation | |
0.0010 ( 0.4%) 0.0003 ( 2.8%) 0.0014 ( 0.6%) 0.0013 ( 0.6%) DAG Legalization | |
0.0008 ( 0.4%) 0.0003 ( 2.4%) 0.0011 ( 0.5%) 0.0011 ( 0.5%) Type Legalization | |
0.0007 ( 0.3%) 0.0002 ( 1.7%) 0.0009 ( 0.4%) 0.0009 ( 0.4%) Vector Legalization | |
0.0005 ( 0.2%) 0.0002 ( 1.8%) 0.0007 ( 0.3%) 0.0007 ( 0.3%) Instruction Scheduling Cleanup | |
0.0002 ( 0.1%) 0.0000 ( 0.2%) 0.0003 ( 0.1%) 0.0003 ( 0.1%) DAG Combining after legalize types | |
0.2309 (100.0%) 0.0118 (100.0%) 0.2426 (100.0%) 0.2429 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
... Pass execution timing report ... | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 0.4851 seconds (0.4851 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.2466 ( 62.5%) 0.0209 ( 23.1%) 0.2676 ( 55.2%) 0.2678 ( 55.2%) X86 DAG->DAG Instruction Selection | |
0.0171 ( 4.3%) 0.0059 ( 6.6%) 0.0230 ( 4.7%) 0.0231 ( 4.8%) X86 Assembly Printer | |
0.0056 ( 1.4%) 0.0014 ( 1.6%) 0.0070 ( 1.4%) 0.0070 ( 1.4%) Machine Instruction Scheduler | |
0.0036 ( 0.9%) 0.0018 ( 2.0%) 0.0055 ( 1.1%) 0.0054 ( 1.1%) CodeGen Prepare | |
0.0033 ( 0.8%) 0.0013 ( 1.5%) 0.0046 ( 0.9%) 0.0046 ( 0.9%) Greedy Register Allocator | |
0.0024 ( 0.6%) 0.0011 ( 1.2%) 0.0035 ( 0.7%) 0.0035 ( 0.7%) Simple Register Coalescing | |
0.0022 ( 0.6%) 0.0011 ( 1.2%) 0.0033 ( 0.7%) 0.0033 ( 0.7%) Live Variable Analysis | |
0.0016 ( 0.4%) 0.0008 ( 0.9%) 0.0024 ( 0.5%) 0.0024 ( 0.5%) Prologue/Epilogue Insertion & Frame Finalization | |
0.0014 ( 0.4%) 0.0008 ( 0.8%) 0.0022 ( 0.4%) 0.0021 ( 0.4%) Scalar Evolution Analysis | |
0.0014 ( 0.4%) 0.0007 ( 0.8%) 0.0021 ( 0.4%) 0.0021 ( 0.4%) ReachingDefAnalysis | |
0.0014 ( 0.3%) 0.0007 ( 0.8%) 0.0021 ( 0.4%) 0.0021 ( 0.4%) Post-Dominator Tree Construction | |
0.0013 ( 0.3%) 0.0006 ( 0.6%) 0.0019 ( 0.4%) 0.0019 ( 0.4%) X86 Byte/Word Instruction Fixup | |
0.0012 ( 0.3%) 0.0007 ( 0.7%) 0.0019 ( 0.4%) 0.0019 ( 0.4%) Block Frequency Analysis | |
0.0013 ( 0.3%) 0.0006 ( 0.6%) 0.0019 ( 0.4%) 0.0019 ( 0.4%) Live Interval Analysis | |
0.0012 ( 0.3%) 0.0006 ( 0.7%) 0.0019 ( 0.4%) 0.0018 ( 0.4%) MachinePostDominator Tree Construction | |
0.0012 ( 0.3%) 0.0007 ( 0.7%) 0.0019 ( 0.4%) 0.0018 ( 0.4%) Branch Probability Analysis | |
0.0013 ( 0.3%) 0.0006 ( 0.6%) 0.0018 ( 0.4%) 0.0018 ( 0.4%) Machine Common Subexpression Elimination | |
0.0013 ( 0.3%) 0.0005 ( 0.5%) 0.0018 ( 0.4%) 0.0018 ( 0.4%) Machine Copy Propagation Pass | |
0.0011 ( 0.3%) 0.0006 ( 0.7%) 0.0017 ( 0.4%) 0.0017 ( 0.4%) MachinePostDominator Tree Construction #2 | |
0.0010 ( 0.3%) 0.0006 ( 0.6%) 0.0016 ( 0.3%) 0.0016 ( 0.3%) Dominator Tree Construction #2 | |
0.0011 ( 0.3%) 0.0005 ( 0.6%) 0.0017 ( 0.3%) 0.0016 ( 0.3%) Peephole Optimizations | |
0.0012 ( 0.3%) 0.0004 ( 0.4%) 0.0016 ( 0.3%) 0.0016 ( 0.3%) Early Machine Loop Invariant Code Motion | |
0.0011 ( 0.3%) 0.0005 ( 0.6%) 0.0016 ( 0.3%) 0.0016 ( 0.3%) Machine Block Frequency Analysis | |
0.0010 ( 0.3%) 0.0006 ( 0.6%) 0.0016 ( 0.3%) 0.0016 ( 0.3%) Free MachineFunction | |
0.0010 ( 0.3%) 0.0005 ( 0.6%) 0.0016 ( 0.3%) 0.0016 ( 0.3%) Machine InstCombiner | |
0.0010 ( 0.3%) 0.0005 ( 0.6%) 0.0015 ( 0.3%) 0.0015 ( 0.3%) Shrink Wrapping analysis | |
0.0010 ( 0.2%) 0.0005 ( 0.5%) 0.0015 ( 0.3%) 0.0015 ( 0.3%) MachineDominator Tree Construction | |
0.0009 ( 0.2%) 0.0005 ( 0.5%) 0.0014 ( 0.3%) 0.0014 ( 0.3%) Post-Dominator Tree Construction #2 | |
0.0009 ( 0.2%) 0.0005 ( 0.5%) 0.0014 ( 0.3%) 0.0014 ( 0.3%) Function Alias Analysis Results #2 | |
0.0009 ( 0.2%) 0.0005 ( 0.5%) 0.0014 ( 0.3%) 0.0014 ( 0.3%) MachinePostDominator Tree Construction #3 | |
0.0009 ( 0.2%) 0.0005 ( 0.5%) 0.0014 ( 0.3%) 0.0014 ( 0.3%) Merge contiguous icmps into a memcmp | |
0.0009 ( 0.2%) 0.0005 ( 0.5%) 0.0014 ( 0.3%) 0.0014 ( 0.3%) Machine Block Frequency Analysis #3 | |
0.0009 ( 0.2%) 0.0004 ( 0.5%) 0.0014 ( 0.3%) 0.0014 ( 0.3%) Two-Address instruction pass | |
0.0009 ( 0.2%) 0.0004 ( 0.5%) 0.0014 ( 0.3%) 0.0013 ( 0.3%) Live Range Shrink | |
0.0009 ( 0.2%) 0.0004 ( 0.5%) 0.0013 ( 0.3%) 0.0013 ( 0.3%) Remove dead machine instructions | |
0.0009 ( 0.2%) 0.0004 ( 0.5%) 0.0013 ( 0.3%) 0.0013 ( 0.3%) Control Flow Optimizer | |
0.0009 ( 0.2%) 0.0004 ( 0.5%) 0.0013 ( 0.3%) 0.0013 ( 0.3%) Lower constant intrinsics | |
0.0009 ( 0.2%) 0.0004 ( 0.4%) 0.0013 ( 0.3%) 0.0013 ( 0.3%) X86 Execution Dependency Fix | |
0.0009 ( 0.2%) 0.0004 ( 0.5%) 0.0013 ( 0.3%) 0.0013 ( 0.3%) MachineDominator Tree Construction #7 | |
0.0008 ( 0.2%) 0.0004 ( 0.5%) 0.0013 ( 0.3%) 0.0013 ( 0.3%) Constant Hoisting | |
0.0009 ( 0.2%) 0.0004 ( 0.5%) 0.0013 ( 0.3%) 0.0012 ( 0.3%) Expand memcmp() to load/stores | |
0.0008 ( 0.2%) 0.0004 ( 0.5%) 0.0012 ( 0.2%) 0.0012 ( 0.2%) Branch Probability Analysis #2 | |
0.0008 ( 0.2%) 0.0004 ( 0.5%) 0.0012 ( 0.3%) 0.0012 ( 0.2%) Natural Loop Information | |
0.0008 ( 0.2%) 0.0003 ( 0.4%) 0.0012 ( 0.2%) 0.0012 ( 0.2%) Virtual Register Rewriter | |
0.0008 ( 0.2%) 0.0004 ( 0.5%) 0.0012 ( 0.2%) 0.0012 ( 0.2%) Finalize ISel and expand pseudo-instructions | |
0.0008 ( 0.2%) 0.0004 ( 0.4%) 0.0012 ( 0.2%) 0.0012 ( 0.2%) Machine Natural Loop Construction | |
0.0007 ( 0.2%) 0.0004 ( 0.5%) 0.0011 ( 0.2%) 0.0012 ( 0.2%) MachineDominator Tree Construction #8 | |
0.0007 ( 0.2%) 0.0004 ( 0.5%) 0.0011 ( 0.2%) 0.0012 ( 0.2%) Expand Atomic instructions | |
0.0008 ( 0.2%) 0.0004 ( 0.4%) 0.0012 ( 0.2%) 0.0012 ( 0.2%) Function Alias Analysis Results #3 | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0011 ( 0.2%) 0.0012 ( 0.2%) Machine Block Frequency Analysis #4 | |
0.0008 ( 0.2%) 0.0004 ( 0.4%) 0.0012 ( 0.2%) 0.0011 ( 0.2%) Live Register Matrix | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0011 ( 0.2%) 0.0011 ( 0.2%) Basic Alias Analysis (stateless AA impl) #2 | |
0.0008 ( 0.2%) 0.0003 ( 0.4%) 0.0011 ( 0.2%) 0.0011 ( 0.2%) Machine Copy Propagation Pass #2 | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0011 ( 0.2%) 0.0011 ( 0.2%) Machine Block Frequency Analysis #5 | |
0.0007 ( 0.2%) 0.0003 ( 0.4%) 0.0011 ( 0.2%) 0.0011 ( 0.2%) Machine code sinking | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0011 ( 0.2%) 0.0011 ( 0.2%) Machine Natural Loop Construction #4 | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0011 ( 0.2%) 0.0011 ( 0.2%) X86 EFLAGS copy lowering | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0011 ( 0.2%) 0.0011 ( 0.2%) Exception handling preparation | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0011 ( 0.2%) 0.0011 ( 0.2%) Remove dead machine instructions #2 | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0010 ( 0.2%) 0.0011 ( 0.2%) Slot index numbering | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0010 ( 0.2%) 0.0011 ( 0.2%) MachineDominator Tree Construction #4 | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) Dominator Tree Construction #3 | |
0.0007 ( 0.2%) 0.0003 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) MachineDominator Tree Construction #3 | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) MachineDominator Tree Construction #5 | |
0.0006 ( 0.2%) 0.0004 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) Partially inline calls to library functions | |
0.0007 ( 0.2%) 0.0003 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) MachineDominator Tree Construction #6 | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) MachineDominator Tree Construction #9 | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) MachineDominator Tree Construction #2 | |
0.0007 ( 0.2%) 0.0004 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) Remove unreachable blocks from the CFG | |
0.0007 ( 0.2%) 0.0003 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) Machine Loop Invariant Code Motion | |
0.0007 ( 0.2%) 0.0003 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) Post-RA pseudo instruction expansion pass | |
0.0006 ( 0.2%) 0.0003 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) Machine Dominance Frontier Construction | |
0.0007 ( 0.2%) 0.0003 ( 0.3%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) Slot index numbering #2 | |
0.0007 ( 0.2%) 0.0003 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) Eliminate PHI nodes for register allocation | |
0.0007 ( 0.2%) 0.0003 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) Spill Code Placement Analysis | |
0.0006 ( 0.2%) 0.0003 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) Lower AMX type for load/store | |
0.0006 ( 0.2%) 0.0003 ( 0.3%) 0.0009 ( 0.2%) 0.0010 ( 0.2%) BreakFalseDeps | |
0.0006 ( 0.2%) 0.0003 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) Machine Trace Metrics | |
0.0006 ( 0.2%) 0.0003 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) X86 cmov Conversion | |
0.0006 ( 0.2%) 0.0003 ( 0.3%) 0.0009 ( 0.2%) 0.0010 ( 0.2%) Machine Block Frequency Analysis #2 | |
0.0006 ( 0.2%) 0.0003 ( 0.4%) 0.0009 ( 0.2%) 0.0010 ( 0.2%) Tile Register Pre-configure | |
0.0006 ( 0.2%) 0.0003 ( 0.4%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) X86 pseudo instruction expansion pass | |
0.0006 ( 0.2%) 0.0003 ( 0.4%) 0.0009 ( 0.2%) 0.0010 ( 0.2%) Machine Natural Loop Construction #3 | |
0.0010 ( 0.2%) 0.0000 ( 0.0%) 0.0010 ( 0.2%) 0.0010 ( 0.2%) Dominator Tree Construction | |
0.0006 ( 0.2%) 0.0003 ( 0.3%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) X86 LEA Optimize | |
0.0006 ( 0.2%) 0.0003 ( 0.4%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) Remove unreachable machine basic blocks | |
0.0006 ( 0.2%) 0.0003 ( 0.4%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) Canonicalize natural loops | |
0.0006 ( 0.1%) 0.0003 ( 0.4%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) Scalarize Masked Memory Intrinsics | |
0.0006 ( 0.2%) 0.0003 ( 0.3%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) Insert stack protectors | |
0.0006 ( 0.2%) 0.0003 ( 0.3%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) X86 LEA Fixup | |
0.0006 ( 0.1%) 0.0003 ( 0.3%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) Natural Loop Information #5 | |
0.0006 ( 0.2%) 0.0003 ( 0.4%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) Post RA top-down list latency scheduler | |
0.0006 ( 0.1%) 0.0003 ( 0.4%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) Natural Loop Information #4 | |
0.0006 ( 0.1%) 0.0003 ( 0.3%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) Machine Natural Loop Construction #2 | |
0.0006 ( 0.1%) 0.0003 ( 0.3%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) Lazy Branch Probability Analysis | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) Interleaved Access Pass | |
0.0006 ( 0.1%) 0.0003 ( 0.3%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) X86 Optimize Call Frame | |
0.0006 ( 0.1%) 0.0003 ( 0.3%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) Basic Alias Analysis (stateless AA impl) #4 | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0009 ( 0.2%) Natural Loop Information #3 | |
0.0006 ( 0.2%) 0.0003 ( 0.3%) 0.0009 ( 0.2%) 0.0009 ( 0.2%) Branch Probability Basic Block Placement | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0009 ( 0.2%) Replace intrinsics with calls to vector library | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0009 ( 0.2%) Natural Loop Information #2 | |
0.0008 ( 0.2%) 0.0000 ( 0.0%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) Function Alias Analysis Results | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0009 ( 0.2%) 0.0008 ( 0.2%) Machine Natural Loop Construction #5 | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) Expand vector predication intrinsics | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) Lazy Branch Probability Analysis #2 | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) Expand reduction intrinsics | |
0.0008 ( 0.2%) 0.0000 ( 0.0%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) Basic Alias Analysis (stateless AA impl) | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) Expand indirectbr instructions | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) Early Tail Duplication | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) PostRA Machine Sink | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) X86 Avoid Store Forwarding Blocks | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) X86 Indirect Branch Tracking | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) X86 Partial Reduction | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) Virtual Register Map | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) Basic Alias Analysis (stateless AA impl) #3 | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) Tail Duplication | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0007 ( 0.2%) 0.0008 ( 0.2%) Debug Variable Analysis | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) X86 Fixup SetCC | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0008 ( 0.2%) Stack Slot Coloring | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0007 ( 0.2%) Local Dynamic TLS Access Clean-up | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0007 ( 0.2%) 0.0007 ( 0.2%) Merge disjoint stack slots | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0007 ( 0.2%) 0.0007 ( 0.2%) Bundle Machine CFG Edges | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0008 ( 0.2%) 0.0007 ( 0.2%) Live Stack Slot Analysis | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0007 ( 0.2%) 0.0007 ( 0.2%) Early If-Conversion | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.2%) X86 PIC Global Base Reg Initialization | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.2%) 0.0007 ( 0.1%) Tile Register Configure | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Insert fentry calls | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Machine Optimization Remark Emitter | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.2%) 0.0007 ( 0.1%) Process Implicit Definitions | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) X86 Lower Tile Copy | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0007 ( 0.2%) 0.0007 ( 0.1%) Live DEBUG_VALUE analysis | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) X86 Atom pad short functions | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Lazy Block Frequency Analysis | |
0.0005 ( 0.1%) 0.0002 ( 0.2%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) X86 Domain Reassignment Pass | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Local Stack Slot Allocation | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Insert XRay ops | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) X86 Indirect Thunks | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Detect Dead Lanes | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Rename Disconnected Subregister Components | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Machine Optimization Remark Emitter #3 | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.2%) 0.0007 ( 0.1%) Optimize machine instruction PHIs | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Compressing EVEX instrs to VEX encoding when possible | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Lazy Machine Block Frequency Analysis #5 | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) StackMap Liveness Analysis | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0006 ( 0.1%) 0.0007 ( 0.1%) X86 Load Value Injection (LVI) Ret-Hardening | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Contiguously Lay Out Funclets | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Machine Optimization Remark Emitter #2 | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Bundle Machine CFG Edges #2 | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) X86 FP Stackifier | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) X86 WinAlloca Expander | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Lazy Machine Block Frequency Analysis #4 | |
0.0007 ( 0.2%) 0.0000 ( 0.0%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) ObjC ARC contraction | |
0.0004 ( 0.1%) 0.0003 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) X86 Insert Cache Prefetches | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) X86 speculative load hardening | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Analyze Machine Code For Garbage Collection | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Fixup Statepoint Caller Saved | |
0.0005 ( 0.1%) 0.0002 ( 0.2%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Lazy Block Frequency Analysis #2 | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Implement the 'patchable-function' attribute | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0006 ( 0.1%) 0.0007 ( 0.1%) Remove Redundant DEBUG_VALUE analysis | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Check CFA info and insert CFI instructions if needed | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) X86 Speculative Execution Side Effect Suppression | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Lazy Machine Block Frequency Analysis #8 | |
0.0004 ( 0.1%) 0.0003 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Lazy Machine Block Frequency Analysis #9 | |
0.0005 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Lazy Machine Block Frequency Analysis #3 | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) X86 Discriminate Memory Operands | |
0.0005 ( 0.1%) 0.0003 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Lazy Machine Block Frequency Analysis | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Safe Stack instrumentation pass | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Shadow Stack GC Lowering | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Lazy Machine Block Frequency Analysis #2 | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Lazy Machine Block Frequency Analysis #7 | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0006 ( 0.1%) 0.0007 ( 0.1%) Lower Garbage Collection Instructions | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) X86 vzeroupper inserter | |
0.0005 ( 0.1%) 0.0002 ( 0.2%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Lazy Machine Block Frequency Analysis #6 | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) X86 Load Value Injection (LVI) Load Hardening | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0006 ( 0.1%) 0.0007 ( 0.1%) X86 insert wait instruction | |
0.0004 ( 0.1%) 0.0002 ( 0.3%) 0.0007 ( 0.1%) 0.0007 ( 0.1%) Lower AMX intrinsics | |
0.0004 ( 0.1%) 0.0000 ( 0.0%) 0.0004 ( 0.1%) 0.0004 ( 0.1%) Loop Strength Reduction | |
0.0001 ( 0.0%) 0.0000 ( 0.0%) 0.0001 ( 0.0%) 0.0001 ( 0.0%) Induction Variable Users | |
0.0001 ( 0.0%) 0.0000 ( 0.0%) 0.0001 ( 0.0%) 0.0001 ( 0.0%) Assumption Cache Tracker | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Canonicalize Freeze Instructions in Loops | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Pre-ISel Intrinsic Lowering | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Type-Based Alias Analysis | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Profile summary info | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Machine Module Information | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Target Transform Information | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Target Library Information | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Target Pass Configuration | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Machine Branch Probability Analysis | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Create Garbage Collector Module Metadata | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Scoped NoAlias Alias Analysis | |
0.3946 (100.0%) 0.0905 (100.0%) 0.4851 (100.0%) 0.4851 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
DWARF Emission | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 0.0121 seconds (0.0122 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.0046 ( 51.1%) 0.0016 ( 52.0%) 0.0062 ( 51.3%) 0.0063 ( 51.5%) Debug Info Emission | |
0.0044 ( 48.9%) 0.0015 ( 48.0%) 0.0059 ( 48.7%) 0.0059 ( 48.5%) DWARF Exception Writer | |
0.0091 (100.0%) 0.0030 (100.0%) 0.0121 (100.0%) 0.0122 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
Clang front-end time report | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 1.1974 seconds (1.1991 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.9909 (100.0%) 0.2064 (100.0%) 1.1974 (100.0%) 1.1991 (100.0%) Clang front-end timer | |
0.9909 (100.0%) 0.2064 (100.0%) 1.1974 (100.0%) 1.1991 (100.0%) Total |
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===-------------------------------------------------------------------------=== | |
... Pass execution timing report ... | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 71.4629 seconds (71.5074 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
54.2873 ( 78.0%) 0.0896 ( 4.7%) 54.3769 ( 76.1%) 54.4116 ( 76.1%) X86 DAG->DAG Instruction Selection | |
6.3938 ( 9.2%) 0.8703 ( 46.0%) 7.2640 ( 10.2%) 7.2680 ( 10.2%) Greedy Register Allocator | |
4.5139 ( 6.5%) 0.0052 ( 0.3%) 4.5191 ( 6.3%) 4.5217 ( 6.3%) Machine Instruction Scheduler | |
2.3262 ( 3.3%) 0.0054 ( 0.3%) 2.3315 ( 3.3%) 2.3330 ( 3.3%) Stack Slot Coloring | |
1.0420 ( 1.5%) 0.8404 ( 44.5%) 1.8824 ( 2.6%) 1.8837 ( 2.6%) X86 Assembly Printer | |
0.0861 ( 0.1%) 0.0014 ( 0.1%) 0.0874 ( 0.1%) 0.0876 ( 0.1%) X86 Byte/Word Instruction Fixup | |
0.0712 ( 0.1%) 0.0011 ( 0.1%) 0.0723 ( 0.1%) 0.0724 ( 0.1%) Prologue/Epilogue Insertion & Frame Finalization | |
0.0575 ( 0.1%) 0.0011 ( 0.1%) 0.0586 ( 0.1%) 0.0587 ( 0.1%) Virtual Register Rewriter | |
0.0506 ( 0.1%) 0.0013 ( 0.1%) 0.0518 ( 0.1%) 0.0519 ( 0.1%) Machine Copy Propagation Pass | |
0.0468 ( 0.1%) 0.0008 ( 0.0%) 0.0476 ( 0.1%) 0.0477 ( 0.1%) Machine Copy Propagation Pass #2 | |
0.0415 ( 0.1%) 0.0034 ( 0.2%) 0.0449 ( 0.1%) 0.0449 ( 0.1%) Live Variable Analysis | |
0.0383 ( 0.1%) 0.0014 ( 0.1%) 0.0397 ( 0.1%) 0.0397 ( 0.1%) ReachingDefAnalysis | |
0.0302 ( 0.0%) 0.0075 ( 0.4%) 0.0377 ( 0.1%) 0.0376 ( 0.1%) CodeGen Prepare | |
0.0347 ( 0.0%) 0.0018 ( 0.1%) 0.0365 ( 0.1%) 0.0365 ( 0.1%) Live Interval Analysis | |
0.0312 ( 0.0%) 0.0017 ( 0.1%) 0.0329 ( 0.0%) 0.0329 ( 0.0%) Early Machine Loop Invariant Code Motion | |
0.0262 ( 0.0%) 0.0017 ( 0.1%) 0.0279 ( 0.0%) 0.0279 ( 0.0%) Peephole Optimizations | |
0.0264 ( 0.0%) 0.0011 ( 0.1%) 0.0275 ( 0.0%) 0.0276 ( 0.0%) Control Flow Optimizer | |
0.0213 ( 0.0%) 0.0002 ( 0.0%) 0.0215 ( 0.0%) 0.0215 ( 0.0%) Machine Loop Invariant Code Motion | |
0.0193 ( 0.0%) 0.0020 ( 0.1%) 0.0212 ( 0.0%) 0.0212 ( 0.0%) Machine Common Subexpression Elimination | |
0.0168 ( 0.0%) 0.0044 ( 0.2%) 0.0212 ( 0.0%) 0.0212 ( 0.0%) Free MachineFunction | |
0.0167 ( 0.0%) 0.0015 ( 0.1%) 0.0182 ( 0.0%) 0.0182 ( 0.0%) Simple Register Coalescing | |
0.0169 ( 0.0%) 0.0011 ( 0.1%) 0.0180 ( 0.0%) 0.0179 ( 0.0%) Remove dead machine instructions | |
0.0171 ( 0.0%) 0.0006 ( 0.0%) 0.0177 ( 0.0%) 0.0177 ( 0.0%) Slot index numbering #2 | |
0.0162 ( 0.0%) 0.0011 ( 0.1%) 0.0173 ( 0.0%) 0.0173 ( 0.0%) Live Range Shrink | |
0.0148 ( 0.0%) 0.0003 ( 0.0%) 0.0150 ( 0.0%) 0.0150 ( 0.0%) BreakFalseDeps | |
0.0135 ( 0.0%) 0.0015 ( 0.1%) 0.0150 ( 0.0%) 0.0149 ( 0.0%) Two-Address instruction pass | |
0.0138 ( 0.0%) 0.0005 ( 0.0%) 0.0142 ( 0.0%) 0.0143 ( 0.0%) X86 Execution Dependency Fix | |
0.0107 ( 0.0%) 0.0026 ( 0.1%) 0.0133 ( 0.0%) 0.0132 ( 0.0%) Module Verifier | |
0.0095 ( 0.0%) 0.0002 ( 0.0%) 0.0096 ( 0.0%) 0.0096 ( 0.0%) X86 Lower Tile Copy | |
0.0089 ( 0.0%) 0.0007 ( 0.0%) 0.0096 ( 0.0%) 0.0096 ( 0.0%) Remove dead machine instructions #2 | |
0.0093 ( 0.0%) 0.0002 ( 0.0%) 0.0095 ( 0.0%) 0.0095 ( 0.0%) X86 LEA Fixup | |
0.0084 ( 0.0%) 0.0009 ( 0.0%) 0.0093 ( 0.0%) 0.0093 ( 0.0%) Branch Probability Basic Block Placement | |
0.0088 ( 0.0%) 0.0005 ( 0.0%) 0.0093 ( 0.0%) 0.0093 ( 0.0%) Slot index numbering | |
0.0086 ( 0.0%) 0.0002 ( 0.0%) 0.0088 ( 0.0%) 0.0088 ( 0.0%) Post-RA pseudo instruction expansion pass | |
0.0066 ( 0.0%) 0.0015 ( 0.1%) 0.0081 ( 0.0%) 0.0081 ( 0.0%) Module Verifier #2 | |
0.0076 ( 0.0%) 0.0003 ( 0.0%) 0.0079 ( 0.0%) 0.0078 ( 0.0%) Live Stack Slot Analysis | |
0.0068 ( 0.0%) 0.0004 ( 0.0%) 0.0071 ( 0.0%) 0.0071 ( 0.0%) MachineDominator Tree Construction #7 | |
0.0065 ( 0.0%) 0.0005 ( 0.0%) 0.0070 ( 0.0%) 0.0070 ( 0.0%) X86 LEA Optimize | |
0.0067 ( 0.0%) 0.0003 ( 0.0%) 0.0070 ( 0.0%) 0.0070 ( 0.0%) Check CFA info and insert CFI instructions if needed | |
0.0060 ( 0.0%) 0.0002 ( 0.0%) 0.0062 ( 0.0%) 0.0062 ( 0.0%) X86 pseudo instruction expansion pass | |
0.0052 ( 0.0%) 0.0006 ( 0.0%) 0.0058 ( 0.0%) 0.0058 ( 0.0%) Machine code sinking | |
0.0053 ( 0.0%) 0.0005 ( 0.0%) 0.0057 ( 0.0%) 0.0057 ( 0.0%) Merge disjoint stack slots | |
0.0054 ( 0.0%) 0.0002 ( 0.0%) 0.0055 ( 0.0%) 0.0055 ( 0.0%) Debug Variable Analysis | |
0.0049 ( 0.0%) 0.0005 ( 0.0%) 0.0054 ( 0.0%) 0.0054 ( 0.0%) Eliminate PHI nodes for register allocation | |
0.0045 ( 0.0%) 0.0004 ( 0.0%) 0.0049 ( 0.0%) 0.0049 ( 0.0%) Machine InstCombiner | |
0.0035 ( 0.0%) 0.0009 ( 0.0%) 0.0045 ( 0.0%) 0.0044 ( 0.0%) Branch Probability Analysis | |
0.0041 ( 0.0%) 0.0003 ( 0.0%) 0.0044 ( 0.0%) 0.0044 ( 0.0%) Finalize ISel and expand pseudo-instructions | |
0.0041 ( 0.0%) 0.0003 ( 0.0%) 0.0044 ( 0.0%) 0.0044 ( 0.0%) X86 Optimize Call Frame | |
0.0037 ( 0.0%) 0.0003 ( 0.0%) 0.0040 ( 0.0%) 0.0040 ( 0.0%) X86 cmov Conversion | |
0.0031 ( 0.0%) 0.0008 ( 0.0%) 0.0039 ( 0.0%) 0.0039 ( 0.0%) Block Frequency Analysis | |
0.0031 ( 0.0%) 0.0008 ( 0.0%) 0.0040 ( 0.0%) 0.0039 ( 0.0%) Post-Dominator Tree Construction | |
0.0037 ( 0.0%) 0.0003 ( 0.0%) 0.0040 ( 0.0%) 0.0039 ( 0.0%) X86 Fixup SetCC | |
0.0035 ( 0.0%) 0.0005 ( 0.0%) 0.0040 ( 0.0%) 0.0039 ( 0.0%) MachinePostDominator Tree Construction #2 | |
0.0032 ( 0.0%) 0.0006 ( 0.0%) 0.0038 ( 0.0%) 0.0038 ( 0.0%) MachinePostDominator Tree Construction | |
0.0033 ( 0.0%) 0.0003 ( 0.0%) 0.0035 ( 0.0%) 0.0035 ( 0.0%) Live Register Matrix | |
0.0028 ( 0.0%) 0.0007 ( 0.0%) 0.0035 ( 0.0%) 0.0035 ( 0.0%) Branch Probability Analysis #2 | |
0.0031 ( 0.0%) 0.0003 ( 0.0%) 0.0035 ( 0.0%) 0.0034 ( 0.0%) Tile Register Pre-configure | |
0.0027 ( 0.0%) 0.0006 ( 0.0%) 0.0033 ( 0.0%) 0.0033 ( 0.0%) Post-Dominator Tree Construction #2 | |
0.0027 ( 0.0%) 0.0004 ( 0.0%) 0.0032 ( 0.0%) 0.0032 ( 0.0%) MachinePostDominator Tree Construction #3 | |
0.0028 ( 0.0%) 0.0003 ( 0.0%) 0.0031 ( 0.0%) 0.0032 ( 0.0%) X86 EFLAGS copy lowering | |
0.0025 ( 0.0%) 0.0006 ( 0.0%) 0.0031 ( 0.0%) 0.0031 ( 0.0%) Constant Hoisting | |
0.0026 ( 0.0%) 0.0005 ( 0.0%) 0.0031 ( 0.0%) 0.0030 ( 0.0%) Machine Block Frequency Analysis | |
0.0027 ( 0.0%) 0.0004 ( 0.0%) 0.0030 ( 0.0%) 0.0030 ( 0.0%) Machine Block Frequency Analysis #3 | |
0.0025 ( 0.0%) 0.0004 ( 0.0%) 0.0029 ( 0.0%) 0.0029 ( 0.0%) MachineDominator Tree Construction | |
0.0024 ( 0.0%) 0.0006 ( 0.0%) 0.0029 ( 0.0%) 0.0029 ( 0.0%) Expand Atomic instructions | |
0.0024 ( 0.0%) 0.0003 ( 0.0%) 0.0027 ( 0.0%) 0.0027 ( 0.0%) MachineDominator Tree Construction #9 | |
0.0023 ( 0.0%) 0.0003 ( 0.0%) 0.0026 ( 0.0%) 0.0027 ( 0.0%) Machine Block Frequency Analysis #4 | |
0.0020 ( 0.0%) 0.0005 ( 0.0%) 0.0025 ( 0.0%) 0.0025 ( 0.0%) Natural Loop Information | |
0.0023 ( 0.0%) 0.0002 ( 0.0%) 0.0025 ( 0.0%) 0.0025 ( 0.0%) X86 Avoid Store Forwarding Blocks | |
0.0023 ( 0.0%) 0.0002 ( 0.0%) 0.0025 ( 0.0%) 0.0025 ( 0.0%) Process Implicit Definitions | |
0.0021 ( 0.0%) 0.0003 ( 0.0%) 0.0025 ( 0.0%) 0.0024 ( 0.0%) Shrink Wrapping analysis | |
0.0021 ( 0.0%) 0.0003 ( 0.0%) 0.0024 ( 0.0%) 0.0024 ( 0.0%) Machine Block Frequency Analysis #5 | |
0.0021 ( 0.0%) 0.0003 ( 0.0%) 0.0024 ( 0.0%) 0.0024 ( 0.0%) MachineDominator Tree Construction #8 | |
0.0021 ( 0.0%) 0.0003 ( 0.0%) 0.0024 ( 0.0%) 0.0024 ( 0.0%) Machine Dominance Frontier Construction | |
0.0021 ( 0.0%) 0.0003 ( 0.0%) 0.0024 ( 0.0%) 0.0024 ( 0.0%) MachineDominator Tree Construction #4 | |
0.0019 ( 0.0%) 0.0005 ( 0.0%) 0.0024 ( 0.0%) 0.0023 ( 0.0%) Dominator Tree Construction | |
0.0019 ( 0.0%) 0.0004 ( 0.0%) 0.0023 ( 0.0%) 0.0023 ( 0.0%) Dominator Tree Construction #2 | |
0.0018 ( 0.0%) 0.0005 ( 0.0%) 0.0023 ( 0.0%) 0.0022 ( 0.0%) Scalar Evolution Analysis | |
0.0018 ( 0.0%) 0.0003 ( 0.0%) 0.0021 ( 0.0%) 0.0021 ( 0.0%) MachineDominator Tree Construction #5 | |
0.0018 ( 0.0%) 0.0003 ( 0.0%) 0.0020 ( 0.0%) 0.0021 ( 0.0%) Machine Natural Loop Construction | |
0.0017 ( 0.0%) 0.0003 ( 0.0%) 0.0020 ( 0.0%) 0.0020 ( 0.0%) MachineDominator Tree Construction #2 | |
0.0016 ( 0.0%) 0.0004 ( 0.0%) 0.0020 ( 0.0%) 0.0020 ( 0.0%) Expand memcmp() to load/stores | |
0.0017 ( 0.0%) 0.0002 ( 0.0%) 0.0019 ( 0.0%) 0.0019 ( 0.0%) Machine Natural Loop Construction #4 | |
0.0015 ( 0.0%) 0.0004 ( 0.0%) 0.0019 ( 0.0%) 0.0019 ( 0.0%) Lower constant intrinsics | |
0.0016 ( 0.0%) 0.0003 ( 0.0%) 0.0019 ( 0.0%) 0.0019 ( 0.0%) Machine Block Frequency Analysis #2 | |
0.0015 ( 0.0%) 0.0003 ( 0.0%) 0.0018 ( 0.0%) 0.0018 ( 0.0%) Natural Loop Information #5 | |
0.0015 ( 0.0%) 0.0003 ( 0.0%) 0.0018 ( 0.0%) 0.0018 ( 0.0%) MachineDominator Tree Construction #3 | |
0.0016 ( 0.0%) 0.0002 ( 0.0%) 0.0018 ( 0.0%) 0.0018 ( 0.0%) MachineDominator Tree Construction #6 | |
0.0014 ( 0.0%) 0.0003 ( 0.0%) 0.0017 ( 0.0%) 0.0017 ( 0.0%) Lower AMX type for load/store | |
0.0014 ( 0.0%) 0.0002 ( 0.0%) 0.0017 ( 0.0%) 0.0017 ( 0.0%) Machine Natural Loop Construction #3 | |
0.0014 ( 0.0%) 0.0003 ( 0.0%) 0.0017 ( 0.0%) 0.0017 ( 0.0%) Natural Loop Information #4 | |
0.0014 ( 0.0%) 0.0002 ( 0.0%) 0.0016 ( 0.0%) 0.0017 ( 0.0%) Early Tail Duplication | |
0.0014 ( 0.0%) 0.0002 ( 0.0%) 0.0016 ( 0.0%) 0.0016 ( 0.0%) Machine Natural Loop Construction #5 | |
0.0012 ( 0.0%) 0.0003 ( 0.0%) 0.0016 ( 0.0%) 0.0016 ( 0.0%) Natural Loop Information #2 | |
0.0014 ( 0.0%) 0.0002 ( 0.0%) 0.0016 ( 0.0%) 0.0016 ( 0.0%) PostRA Machine Sink | |
0.0012 ( 0.0%) 0.0003 ( 0.0%) 0.0014 ( 0.0%) 0.0015 ( 0.0%) Basic Alias Analysis (stateless AA impl) | |
0.0011 ( 0.0%) 0.0003 ( 0.0%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Merge contiguous icmps into a memcmp | |
0.0011 ( 0.0%) 0.0003 ( 0.0%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Partially inline calls to library functions | |
0.0012 ( 0.0%) 0.0002 ( 0.0%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Machine Natural Loop Construction #2 | |
0.0012 ( 0.0%) 0.0002 ( 0.0%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Remove unreachable machine basic blocks | |
0.0011 ( 0.0%) 0.0003 ( 0.0%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Function Alias Analysis Results | |
0.0012 ( 0.0%) 0.0002 ( 0.0%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Tail Duplication | |
0.0011 ( 0.0%) 0.0003 ( 0.0%) 0.0014 ( 0.0%) 0.0013 ( 0.0%) Natural Loop Information #3 | |
0.0010 ( 0.0%) 0.0003 ( 0.0%) 0.0013 ( 0.0%) 0.0013 ( 0.0%) Canonicalize natural loops | |
0.0010 ( 0.0%) 0.0003 ( 0.0%) 0.0013 ( 0.0%) 0.0013 ( 0.0%) Remove unreachable blocks from the CFG | |
0.0010 ( 0.0%) 0.0002 ( 0.0%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Function Alias Analysis Results #2 | |
0.0010 ( 0.0%) 0.0003 ( 0.0%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Interleaved Access Pass | |
0.0010 ( 0.0%) 0.0002 ( 0.0%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) Spill Code Placement Analysis | |
0.0009 ( 0.0%) 0.0002 ( 0.0%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) Exception handling preparation | |
0.0009 ( 0.0%) 0.0002 ( 0.0%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) Replace intrinsics with calls to vector library | |
0.0008 ( 0.0%) 0.0002 ( 0.0%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Scalarize Masked Memory Intrinsics | |
0.0009 ( 0.0%) 0.0001 ( 0.0%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Post RA top-down list latency scheduler | |
0.0008 ( 0.0%) 0.0002 ( 0.0%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Expand vector predication intrinsics | |
0.0008 ( 0.0%) 0.0002 ( 0.0%) 0.0009 ( 0.0%) 0.0010 ( 0.0%) Expand reduction intrinsics | |
0.0007 ( 0.0%) 0.0002 ( 0.0%) 0.0009 ( 0.0%) 0.0010 ( 0.0%) X86 Partial Reduction | |
0.0008 ( 0.0%) 0.0002 ( 0.0%) 0.0009 ( 0.0%) 0.0010 ( 0.0%) Basic Alias Analysis (stateless AA impl) #3 | |
0.0008 ( 0.0%) 0.0002 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Machine Trace Metrics | |
0.0008 ( 0.0%) 0.0002 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Insert stack protectors | |
0.0008 ( 0.0%) 0.0001 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Bundle Machine CFG Edges | |
0.0008 ( 0.0%) 0.0001 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Virtual Register Map | |
0.0008 ( 0.0%) 0.0001 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Bundle Machine CFG Edges #2 | |
0.0007 ( 0.0%) 0.0002 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Lazy Branch Probability Analysis | |
0.0007 ( 0.0%) 0.0002 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Lazy Branch Probability Analysis #2 | |
0.0007 ( 0.0%) 0.0001 ( 0.0%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) X86 Indirect Branch Tracking | |
0.0007 ( 0.0%) 0.0001 ( 0.0%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Optimize machine instruction PHIs | |
0.0007 ( 0.0%) 0.0001 ( 0.0%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Local Dynamic TLS Access Clean-up | |
0.0006 ( 0.0%) 0.0002 ( 0.0%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Basic Alias Analysis (stateless AA impl) #2 | |
0.0007 ( 0.0%) 0.0001 ( 0.0%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) X86 FP Stackifier | |
0.0007 ( 0.0%) 0.0001 ( 0.0%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Live DEBUG_VALUE analysis | |
0.0007 ( 0.0%) 0.0001 ( 0.0%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Tile Register Configure | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0008 ( 0.0%) Early If-Conversion | |
0.0006 ( 0.0%) 0.0002 ( 0.0%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Expand indirectbr instructions | |
0.0007 ( 0.0%) 0.0001 ( 0.0%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Insert XRay ops | |
0.0007 ( 0.0%) 0.0001 ( 0.0%) 0.0008 ( 0.0%) 0.0007 ( 0.0%) Machine Optimization Remark Emitter | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Insert fentry calls | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Block Frequency Analysis | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Block Frequency Analysis #2 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Atom pad short functions | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Machine Optimization Remark Emitter #2 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Machine Optimization Remark Emitter #3 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) StackMap Liveness Analysis | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Rename Disconnected Subregister Components | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Domain Reassignment Pass | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Local Stack Slot Allocation | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Contiguously Lay Out Funclets | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 speculative load hardening | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Detect Dead Lanes | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Fixup Statepoint Caller Saved | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Indirect Thunks | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Discriminate Memory Operands | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Implement the 'patchable-function' attribute | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Shadow Stack GC Lowering | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Load Value Injection (LVI) Load Hardening | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Analyze Machine Code For Garbage Collection | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 PIC Global Base Reg Initialization | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #4 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #5 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #6 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Compressing EVEX instrs to VEX encoding when possible | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Speculative Execution Side Effect Suppression | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Insert Cache Prefetches | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #2 | |
0.0005 ( 0.0%) 0.0002 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Loop Strength Reduction | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lower AMX intrinsics | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #9 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 WinAlloca Expander | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Remove Redundant DEBUG_VALUE analysis | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0006 ( 0.0%) 0.0007 ( 0.0%) X86 Load Value Injection (LVI) Ret-Hardening | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #8 | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Safe Stack instrumentation pass | |
0.0005 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lower Garbage Collection Instructions | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #3 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #7 | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 vzeroupper inserter | |
0.0006 ( 0.0%) 0.0001 ( 0.0%) 0.0007 ( 0.0%) 0.0006 ( 0.0%) X86 insert wait instruction | |
0.0003 ( 0.0%) 0.0001 ( 0.0%) 0.0004 ( 0.0%) 0.0004 ( 0.0%) Induction Variable Users | |
0.0002 ( 0.0%) 0.0001 ( 0.0%) 0.0003 ( 0.0%) 0.0003 ( 0.0%) Canonicalize Freeze Instructions in Loops | |
0.0000 ( 0.0%) 0.0002 ( 0.0%) 0.0002 ( 0.0%) 0.0002 ( 0.0%) Assumption Cache Tracker | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Pre-ISel Intrinsic Lowering | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Create Garbage Collector Module Metadata | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Target Pass Configuration | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Profile summary info | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Scoped NoAlias Alias Analysis | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Machine Module Information | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Type-Based Alias Analysis | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Target Library Information | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Target Transform Information | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Machine Branch Probability Analysis | |
69.5731 (100.0%) 1.8898 (100.0%) 71.4629 (100.0%) 71.5074 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
DWARF Emission | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 0.8532 seconds (0.8551 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.2365 ( 50.3%) 0.1923 ( 50.3%) 0.4289 ( 50.3%) 0.4298 ( 50.3%) Debug Info Emission | |
0.2342 ( 49.7%) 0.1902 ( 49.7%) 0.4244 ( 49.7%) 0.4254 ( 49.7%) DWARF Exception Writer | |
0.4707 (100.0%) 0.3825 (100.0%) 0.8532 (100.0%) 0.8551 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
LLVM IR Parsing | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 0.0801 seconds (0.0802 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.0789 (100.0%) 0.0011 (100.0%) 0.0801 (100.0%) 0.0802 (100.0%) Parse IR | |
0.0789 (100.0%) 0.0011 (100.0%) 0.0801 (100.0%) 0.0802 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
Register Allocation | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 4.9884 seconds (4.9915 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
3.9855 ( 90.8%) 0.5286 ( 88.5%) 4.5141 ( 90.5%) 4.5193 ( 90.5%) Evict | |
0.3326 ( 7.6%) 0.0568 ( 9.5%) 0.3894 ( 7.8%) 0.3850 ( 7.7%) Spiller | |
0.0648 ( 1.5%) 0.0110 ( 1.8%) 0.0758 ( 1.5%) 0.0781 ( 1.6%) Local Splitting | |
0.0040 ( 0.1%) 0.0010 ( 0.2%) 0.0050 ( 0.1%) 0.0050 ( 0.1%) Global Splitting | |
0.0040 ( 0.1%) 0.0001 ( 0.0%) 0.0041 ( 0.1%) 0.0041 ( 0.1%) Seed Live Regs | |
4.3908 (100.0%) 0.5976 (100.0%) 4.9884 (100.0%) 4.9915 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
Instruction Selection and Scheduling | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 54.0687 seconds (54.1021 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
20.9142 ( 38.7%) 0.0252 ( 38.1%) 20.9393 ( 38.7%) 20.9522 ( 38.7%) DAG Combining 1 | |
19.2429 ( 35.6%) 0.0089 ( 13.4%) 19.2518 ( 35.6%) 19.2639 ( 35.6%) DAG Combining 2 | |
8.3751 ( 15.5%) 0.0057 ( 8.6%) 8.3807 ( 15.5%) 8.3858 ( 15.5%) Instruction Scheduling | |
4.8631 ( 9.0%) 0.0034 ( 5.1%) 4.8665 ( 9.0%) 4.8697 ( 9.0%) DAG Combining after legalize types | |
0.3462 ( 0.6%) 0.0090 ( 13.7%) 0.3552 ( 0.7%) 0.3553 ( 0.7%) Instruction Selection | |
0.0972 ( 0.2%) 0.0056 ( 8.4%) 0.1027 ( 0.2%) 0.1027 ( 0.2%) Instruction Creation | |
0.0986 ( 0.2%) 0.0037 ( 5.6%) 0.1022 ( 0.2%) 0.1023 ( 0.2%) DAG Legalization | |
0.0522 ( 0.1%) 0.0033 ( 5.0%) 0.0555 ( 0.1%) 0.0555 ( 0.1%) Type Legalization | |
0.0083 ( 0.0%) 0.0007 ( 1.0%) 0.0090 ( 0.0%) 0.0090 ( 0.0%) Vector Legalization | |
0.0049 ( 0.0%) 0.0008 ( 1.2%) 0.0057 ( 0.0%) 0.0057 ( 0.0%) Instruction Scheduling Cleanup | |
54.0026 (100.0%) 0.0661 (100.0%) 54.0687 (100.0%) 54.1021 (100.0%) Total |
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===-------------------------------------------------------------------------=== | |
... Pass execution timing report ... | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 71.8206 seconds (71.8677 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
71.3659 ( 99.5%) 0.0297 ( 26.5%) 71.3956 ( 99.4%) 71.4427 ( 99.4%) X86 DAG->DAG Instruction Selection | |
0.1065 ( 0.1%) 0.0103 ( 9.2%) 0.1168 ( 0.2%) 0.1169 ( 0.2%) Greedy Register Allocator | |
0.0422 ( 0.1%) 0.0171 ( 15.2%) 0.0593 ( 0.1%) 0.0594 ( 0.1%) X86 Assembly Printer | |
0.0432 ( 0.1%) 0.0022 ( 1.9%) 0.0454 ( 0.1%) 0.0454 ( 0.1%) Machine Instruction Scheduler | |
0.0057 ( 0.0%) 0.0023 ( 2.0%) 0.0080 ( 0.0%) 0.0079 ( 0.0%) CodeGen Prepare | |
0.0033 ( 0.0%) 0.0010 ( 0.8%) 0.0043 ( 0.0%) 0.0042 ( 0.0%) Prologue/Epilogue Insertion & Frame Finalization | |
0.0032 ( 0.0%) 0.0009 ( 0.8%) 0.0041 ( 0.0%) 0.0041 ( 0.0%) Live Variable Analysis | |
0.0030 ( 0.0%) 0.0009 ( 0.8%) 0.0039 ( 0.0%) 0.0039 ( 0.0%) Simple Register Coalescing | |
0.0027 ( 0.0%) 0.0011 ( 0.9%) 0.0037 ( 0.0%) 0.0037 ( 0.0%) Module Verifier | |
0.0026 ( 0.0%) 0.0007 ( 0.6%) 0.0034 ( 0.0%) 0.0034 ( 0.0%) X86 Byte/Word Instruction Fixup | |
0.0021 ( 0.0%) 0.0006 ( 0.5%) 0.0027 ( 0.0%) 0.0027 ( 0.0%) ReachingDefAnalysis | |
0.0019 ( 0.0%) 0.0005 ( 0.4%) 0.0024 ( 0.0%) 0.0024 ( 0.0%) Live Interval Analysis | |
0.0018 ( 0.0%) 0.0005 ( 0.4%) 0.0023 ( 0.0%) 0.0023 ( 0.0%) Peephole Optimizations | |
0.0019 ( 0.0%) 0.0005 ( 0.4%) 0.0023 ( 0.0%) 0.0023 ( 0.0%) Machine Common Subexpression Elimination | |
0.0018 ( 0.0%) 0.0004 ( 0.4%) 0.0022 ( 0.0%) 0.0022 ( 0.0%) Machine Copy Propagation Pass | |
0.0016 ( 0.0%) 0.0006 ( 0.5%) 0.0022 ( 0.0%) 0.0021 ( 0.0%) Scalar Evolution Analysis | |
0.0015 ( 0.0%) 0.0006 ( 0.6%) 0.0021 ( 0.0%) 0.0021 ( 0.0%) Module Verifier #2 | |
0.0017 ( 0.0%) 0.0003 ( 0.3%) 0.0021 ( 0.0%) 0.0021 ( 0.0%) Stack Slot Coloring | |
0.0015 ( 0.0%) 0.0006 ( 0.5%) 0.0021 ( 0.0%) 0.0021 ( 0.0%) Post-Dominator Tree Construction | |
0.0016 ( 0.0%) 0.0004 ( 0.3%) 0.0020 ( 0.0%) 0.0020 ( 0.0%) Machine Copy Propagation Pass #2 | |
0.0014 ( 0.0%) 0.0006 ( 0.5%) 0.0020 ( 0.0%) 0.0020 ( 0.0%) Block Frequency Analysis | |
0.0014 ( 0.0%) 0.0006 ( 0.5%) 0.0020 ( 0.0%) 0.0020 ( 0.0%) Branch Probability Analysis | |
0.0014 ( 0.0%) 0.0005 ( 0.4%) 0.0019 ( 0.0%) 0.0019 ( 0.0%) MachinePostDominator Tree Construction | |
0.0013 ( 0.0%) 0.0006 ( 0.5%) 0.0019 ( 0.0%) 0.0019 ( 0.0%) Free MachineFunction | |
0.0013 ( 0.0%) 0.0005 ( 0.4%) 0.0018 ( 0.0%) 0.0018 ( 0.0%) MachinePostDominator Tree Construction #2 | |
0.0013 ( 0.0%) 0.0004 ( 0.3%) 0.0017 ( 0.0%) 0.0017 ( 0.0%) Two-Address instruction pass | |
0.0013 ( 0.0%) 0.0005 ( 0.4%) 0.0017 ( 0.0%) 0.0017 ( 0.0%) Shrink Wrapping analysis | |
0.0014 ( 0.0%) 0.0004 ( 0.3%) 0.0017 ( 0.0%) 0.0017 ( 0.0%) Live Range Shrink | |
0.0012 ( 0.0%) 0.0004 ( 0.4%) 0.0017 ( 0.0%) 0.0017 ( 0.0%) Machine Block Frequency Analysis | |
0.0013 ( 0.0%) 0.0003 ( 0.3%) 0.0017 ( 0.0%) 0.0017 ( 0.0%) Virtual Register Rewriter | |
0.0012 ( 0.0%) 0.0005 ( 0.4%) 0.0016 ( 0.0%) 0.0016 ( 0.0%) Constant Hoisting | |
0.0013 ( 0.0%) 0.0004 ( 0.3%) 0.0016 ( 0.0%) 0.0016 ( 0.0%) Remove dead machine instructions | |
0.0013 ( 0.0%) 0.0003 ( 0.3%) 0.0016 ( 0.0%) 0.0016 ( 0.0%) Early Machine Loop Invariant Code Motion | |
0.0012 ( 0.0%) 0.0003 ( 0.3%) 0.0016 ( 0.0%) 0.0016 ( 0.0%) Expand Atomic instructions | |
0.0011 ( 0.0%) 0.0004 ( 0.4%) 0.0016 ( 0.0%) 0.0016 ( 0.0%) MachineDominator Tree Construction | |
0.0011 ( 0.0%) 0.0004 ( 0.4%) 0.0015 ( 0.0%) 0.0015 ( 0.0%) Machine InstCombiner | |
0.0011 ( 0.0%) 0.0004 ( 0.4%) 0.0015 ( 0.0%) 0.0015 ( 0.0%) Post-Dominator Tree Construction #2 | |
0.0010 ( 0.0%) 0.0004 ( 0.3%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Machine Block Frequency Analysis #3 | |
0.0011 ( 0.0%) 0.0004 ( 0.3%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Merge disjoint stack slots | |
0.0010 ( 0.0%) 0.0004 ( 0.3%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) MachinePostDominator Tree Construction #3 | |
0.0010 ( 0.0%) 0.0004 ( 0.4%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Basic Alias Analysis (stateless AA impl) | |
0.0010 ( 0.0%) 0.0004 ( 0.4%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Branch Probability Analysis #2 | |
0.0010 ( 0.0%) 0.0003 ( 0.3%) 0.0014 ( 0.0%) 0.0014 ( 0.0%) Control Flow Optimizer | |
0.0009 ( 0.0%) 0.0004 ( 0.4%) 0.0013 ( 0.0%) 0.0013 ( 0.0%) Merge contiguous icmps into a memcmp | |
0.0010 ( 0.0%) 0.0003 ( 0.3%) 0.0013 ( 0.0%) 0.0013 ( 0.0%) X86 Execution Dependency Fix | |
0.0009 ( 0.0%) 0.0004 ( 0.3%) 0.0013 ( 0.0%) 0.0013 ( 0.0%) Lower constant intrinsics | |
0.0009 ( 0.0%) 0.0004 ( 0.3%) 0.0013 ( 0.0%) 0.0013 ( 0.0%) Function Alias Analysis Results | |
0.0009 ( 0.0%) 0.0003 ( 0.3%) 0.0013 ( 0.0%) 0.0013 ( 0.0%) MachineDominator Tree Construction #7 | |
0.0009 ( 0.0%) 0.0004 ( 0.3%) 0.0012 ( 0.0%) 0.0013 ( 0.0%) Natural Loop Information | |
0.0009 ( 0.0%) 0.0003 ( 0.3%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Machine Natural Loop Construction | |
0.0009 ( 0.0%) 0.0004 ( 0.3%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Expand memcmp() to load/stores | |
0.0009 ( 0.0%) 0.0003 ( 0.3%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Machine Block Frequency Analysis #4 | |
0.0009 ( 0.0%) 0.0003 ( 0.2%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Slot index numbering #2 | |
0.0009 ( 0.0%) 0.0003 ( 0.3%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Finalize ISel and expand pseudo-instructions | |
0.0009 ( 0.0%) 0.0003 ( 0.3%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Machine code sinking | |
0.0009 ( 0.0%) 0.0003 ( 0.2%) 0.0011 ( 0.0%) 0.0012 ( 0.0%) Remove dead machine instructions #2 | |
0.0009 ( 0.0%) 0.0003 ( 0.3%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Live Register Matrix | |
0.0009 ( 0.0%) 0.0003 ( 0.3%) 0.0012 ( 0.0%) 0.0012 ( 0.0%) Slot index numbering | |
0.0008 ( 0.0%) 0.0003 ( 0.3%) 0.0011 ( 0.0%) 0.0012 ( 0.0%) Function Alias Analysis Results #2 | |
0.0008 ( 0.0%) 0.0003 ( 0.3%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) Check CFA info and insert CFI instructions if needed | |
0.0008 ( 0.0%) 0.0003 ( 0.3%) 0.0012 ( 0.0%) 0.0011 ( 0.0%) Machine Block Frequency Analysis #5 | |
0.0008 ( 0.0%) 0.0003 ( 0.3%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) Machine Natural Loop Construction #4 | |
0.0008 ( 0.0%) 0.0003 ( 0.3%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) X86 EFLAGS copy lowering | |
0.0009 ( 0.0%) 0.0003 ( 0.3%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) BreakFalseDeps | |
0.0008 ( 0.0%) 0.0003 ( 0.3%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) MachineDominator Tree Construction #8 | |
0.0008 ( 0.0%) 0.0003 ( 0.3%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) Remove unreachable blocks from the CFG | |
0.0008 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0011 ( 0.0%) Eliminate PHI nodes for register allocation | |
0.0008 ( 0.0%) 0.0003 ( 0.2%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) X86 LEA Optimize | |
0.0008 ( 0.0%) 0.0003 ( 0.3%) 0.0011 ( 0.0%) 0.0011 ( 0.0%) X86 pseudo instruction expansion pass | |
0.0008 ( 0.0%) 0.0003 ( 0.3%) 0.0010 ( 0.0%) 0.0011 ( 0.0%) MachineDominator Tree Construction #5 | |
0.0008 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0011 ( 0.0%) MachineDominator Tree Construction #9 | |
0.0008 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Post-RA pseudo instruction expansion pass | |
0.0007 ( 0.0%) 0.0003 ( 0.3%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Exception handling preparation | |
0.0008 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Machine Dominance Frontier Construction | |
0.0007 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) MachineDominator Tree Construction #3 | |
0.0008 ( 0.0%) 0.0003 ( 0.3%) 0.0011 ( 0.0%) 0.0010 ( 0.0%) Dominator Tree Construction | |
0.0007 ( 0.0%) 0.0003 ( 0.3%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Partially inline calls to library functions | |
0.0008 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Tile Register Pre-configure | |
0.0007 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Lower AMX type for load/store | |
0.0007 ( 0.0%) 0.0003 ( 0.3%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) MachineDominator Tree Construction #2 | |
0.0007 ( 0.0%) 0.0003 ( 0.3%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Dominator Tree Construction #2 | |
0.0007 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) MachineDominator Tree Construction #6 | |
0.0007 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Spill Code Placement Analysis | |
0.0007 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Natural Loop Information #5 | |
0.0007 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) MachineDominator Tree Construction #4 | |
0.0007 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Canonicalize natural loops | |
0.0007 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Machine Block Frequency Analysis #2 | |
0.0007 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Remove unreachable machine basic blocks | |
0.0007 ( 0.0%) 0.0003 ( 0.2%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Machine Natural Loop Construction #3 | |
0.0006 ( 0.0%) 0.0003 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Natural Loop Information #4 | |
0.0007 ( 0.0%) 0.0002 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Machine Loop Invariant Code Motion | |
0.0007 ( 0.0%) 0.0003 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Insert stack protectors | |
0.0007 ( 0.0%) 0.0003 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Interleaved Access Pass | |
0.0006 ( 0.0%) 0.0003 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Natural Loop Information #2 | |
0.0006 ( 0.0%) 0.0003 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Post RA top-down list latency scheduler | |
0.0006 ( 0.0%) 0.0003 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Natural Loop Information #3 | |
0.0006 ( 0.0%) 0.0003 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Scalarize Masked Memory Intrinsics | |
0.0007 ( 0.0%) 0.0002 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Branch Probability Basic Block Placement | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Machine Natural Loop Construction #5 | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0009 ( 0.0%) X86 cmov Conversion | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) X86 Optimize Call Frame | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Machine Trace Metrics | |
0.0007 ( 0.0%) 0.0002 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Machine Natural Loop Construction #2 | |
0.0006 ( 0.0%) 0.0003 ( 0.2%) 0.0009 ( 0.0%) 0.0009 ( 0.0%) Basic Alias Analysis (stateless AA impl) #3 | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0009 ( 0.0%) Replace intrinsics with calls to vector library | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0009 ( 0.0%) Lazy Branch Probability Analysis | |
0.0006 ( 0.0%) 0.0003 ( 0.2%) 0.0009 ( 0.0%) 0.0008 ( 0.0%) Expand vector predication intrinsics | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Lazy Branch Probability Analysis #2 | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) PostRA Machine Sink | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) X86 Fixup SetCC | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) X86 LEA Fixup | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) X86 Avoid Store Forwarding Blocks | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Early Tail Duplication | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Expand reduction intrinsics | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) X86 Indirect Branch Tracking | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Live Stack Slot Analysis | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Debug Variable Analysis | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) X86 Partial Reduction | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Virtual Register Map | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) X86 Lower Tile Copy | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Local Dynamic TLS Access Clean-up | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Basic Alias Analysis (stateless AA impl) #2 | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0008 ( 0.0%) Tail Duplication | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0008 ( 0.0%) Tile Register Configure | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Process Implicit Definitions | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Expand indirectbr instructions | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Early If-Conversion | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Domain Reassignment Pass | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0007 ( 0.0%) Bundle Machine CFG Edges | |
0.0006 ( 0.0%) 0.0002 ( 0.2%) 0.0008 ( 0.0%) 0.0007 ( 0.0%) Live DEBUG_VALUE analysis | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Machine Optimization Remark Emitter | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Atom pad short functions | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Indirect Thunks | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Insert XRay ops | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Optimize machine instruction PHIs | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Insert fentry calls | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Insert Cache Prefetches | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Block Frequency Analysis | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Fixup Statepoint Caller Saved | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 PIC Global Base Reg Initialization | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Block Frequency Analysis #2 | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Local Stack Slot Allocation | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Machine Optimization Remark Emitter #3 | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 speculative load hardening | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 FP Stackifier | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Rename Disconnected Subregister Components | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) StackMap Liveness Analysis | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Contiguously Lay Out Funclets | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 WinAlloca Expander | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Bundle Machine CFG Edges #2 | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #9 | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Analyze Machine Code For Garbage Collection | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Load Value Injection (LVI) Load Hardening | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Implement the 'patchable-function' attribute | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Remove Redundant DEBUG_VALUE analysis | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Detect Dead Lanes | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #3 | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Machine Optimization Remark Emitter #2 | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Discriminate Memory Operands | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Safe Stack instrumentation pass | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #5 | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Load Value Injection (LVI) Ret-Hardening | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Compressing EVEX instrs to VEX encoding when possible | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0006 ( 0.0%) 0.0007 ( 0.0%) Lower AMX intrinsics | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #2 | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #7 | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 insert wait instruction | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #8 | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) X86 Speculative Execution Side Effect Suppression | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #4 | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Shadow Stack GC Lowering | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lazy Machine Block Frequency Analysis #6 | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0006 ( 0.0%) 0.0007 ( 0.0%) X86 vzeroupper inserter | |
0.0005 ( 0.0%) 0.0002 ( 0.2%) 0.0007 ( 0.0%) 0.0007 ( 0.0%) Lower Garbage Collection Instructions | |
0.0002 ( 0.0%) 0.0000 ( 0.0%) 0.0002 ( 0.0%) 0.0002 ( 0.0%) Assumption Cache Tracker | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Loop Strength Reduction | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Induction Variable Users | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Pre-ISel Intrinsic Lowering | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Canonicalize Freeze Instructions in Loops | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Scoped NoAlias Alias Analysis | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Target Transform Information | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Target Pass Configuration | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Type-Based Alias Analysis | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Machine Branch Probability Analysis | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Target Library Information | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Create Garbage Collector Module Metadata | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Machine Module Information | |
0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) 0.0000 ( 0.0%) Profile summary info | |
71.7082 (100.0%) 0.1123 (100.0%) 71.8206 (100.0%) 71.8677 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
DWARF Emission | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 0.0288 seconds (0.0288 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.0109 ( 50.7%) 0.0036 ( 49.6%) 0.0145 ( 50.4%) 0.0145 ( 50.5%) Debug Info Emission | |
0.0106 ( 49.3%) 0.0036 ( 50.4%) 0.0143 ( 49.6%) 0.0143 ( 49.5%) DWARF Exception Writer | |
0.0216 (100.0%) 0.0072 (100.0%) 0.0288 (100.0%) 0.0288 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
LLVM IR Parsing | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 0.0176 seconds (0.0176 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.0174 (100.0%) 0.0002 (100.0%) 0.0176 (100.0%) 0.0176 (100.0%) Parse IR | |
0.0174 (100.0%) 0.0002 (100.0%) 0.0176 (100.0%) 0.0176 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
Register Allocation | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 0.0779 seconds (0.0780 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
0.0653 ( 91.4%) 0.0059 ( 91.2%) 0.0712 ( 91.4%) 0.0713 ( 91.5%) Evict | |
0.0040 ( 5.6%) 0.0004 ( 5.7%) 0.0043 ( 5.6%) 0.0043 ( 5.5%) Spiller | |
0.0010 ( 1.4%) 0.0000 ( 0.0%) 0.0010 ( 1.3%) 0.0010 ( 1.3%) Global Splitting | |
0.0008 ( 1.1%) 0.0001 ( 1.5%) 0.0009 ( 1.2%) 0.0009 ( 1.2%) Local Splitting | |
0.0003 ( 0.5%) 0.0001 ( 1.7%) 0.0005 ( 0.6%) 0.0005 ( 0.6%) Seed Live Regs | |
0.0715 (100.0%) 0.0064 (100.0%) 0.0779 (100.0%) 0.0780 (100.0%) Total | |
===-------------------------------------------------------------------------=== | |
Instruction Selection and Scheduling | |
===-------------------------------------------------------------------------=== | |
Total Execution Time: 71.3547 seconds (71.4017 wall clock) | |
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- | |
71.2751 ( 99.9%) 0.0124 ( 68.6%) 71.2875 ( 99.9%) 71.3345 ( 99.9%) DAG Combining 1 | |
0.0312 ( 0.0%) 0.0011 ( 6.2%) 0.0324 ( 0.0%) 0.0324 ( 0.0%) DAG Combining 2 | |
0.0110 ( 0.0%) 0.0010 ( 5.3%) 0.0120 ( 0.0%) 0.0120 ( 0.0%) Instruction Scheduling | |
0.0098 ( 0.0%) 0.0016 ( 8.8%) 0.0114 ( 0.0%) 0.0114 ( 0.0%) Instruction Selection | |
0.0035 ( 0.0%) 0.0007 ( 4.0%) 0.0043 ( 0.0%) 0.0043 ( 0.0%) Instruction Creation | |
0.0021 ( 0.0%) 0.0004 ( 2.2%) 0.0025 ( 0.0%) 0.0025 ( 0.0%) DAG Legalization | |
0.0014 ( 0.0%) 0.0003 ( 1.8%) 0.0017 ( 0.0%) 0.0017 ( 0.0%) Type Legalization | |
0.0012 ( 0.0%) 0.0001 ( 0.6%) 0.0013 ( 0.0%) 0.0013 ( 0.0%) DAG Combining after legalize types | |
0.0007 ( 0.0%) 0.0002 ( 1.3%) 0.0010 ( 0.0%) 0.0010 ( 0.0%) Vector Legalization | |
0.0006 ( 0.0%) 0.0002 ( 1.1%) 0.0008 ( 0.0%) 0.0008 ( 0.0%) Instruction Scheduling Cleanup | |
71.3366 (100.0%) 0.0181 (100.0%) 71.3547 (100.0%) 71.4017 (100.0%) Total |
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; ModuleID = 'main' | |
source_filename = "main" | |
%CONSTANTS_MATH = type { float, float, float, float, float, float, float, float, float, [13 x i32] } | |
%CONSTANTS_PHYS = type { float, float, float, float, float, float } | |
%CONSTANTS_LANGUAGE = type { i16, i16, [21 x [11 x i8]], [21 x [3 x i8]], [36 x [11 x i8]], [36 x [4 x i8]], [48 x [4 x i8]] } | |
%CONSTANTS_SETUP = type { i8, [4 x [254 x i8]], [12 x i16], [9 x float] } | |
%CONSTANTS_LOCATION = type { i16, i16, [5 x i16] } | |
%CALENDAR = type { i64, i64, i64, i64, i16, i16, i16, i16, i16, i8, i8, [6 x i8], i16, float, float, i64, i64, i64, float, float, float, i8, i8, [31 x i8], i16 } | |
%COMPLEX = type { float, float } | |
%ESR_DATA = type { i8, [11 x i8], i64, i64, [8 x i8] } | |
%FRACTION = type { i16, i16 } | |
%HOLIDAY_DATA = type { [31 x i8], i8, i8, i8 } | |
%REAL2 = type { float, float } | |
%SDT = type { i16, i16, i16, i16, i16, i16, i16, i16 } | |
%TIMER_EVENT = type { i8, i8, i8, i64, i64, i8, i8, i64 } | |
%VECTOR_3 = type { float, float, float } | |
%DRIVER_1_interface = type { i8, i64, i8, i8, i8, i8, %TON_interface, i8 } | |
%TON_interface = type { i8, i64, i8, i64, i8, i64 } | |
%DRIVER_4_interface = type { i8, i64, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, %DRIVER_1_interface, %DRIVER_1_interface, %DRIVER_1_interface, %DRIVER_1_interface } | |
%DRIVER_4C_interface = type { i8, i8, i64, [7 x i8], i16, i8, i8, i8, i8, %TON_interface, i8 } | |
%FLOW_CONTROL_interface = type { i8, i8, i8, i8, i64, i64, i8, i8, %TP_1D_interface } | |
%TP_1D_interface = type { i8, i64, i64, i8, i8, i8, i64, i64, i8 } | |
%FT_Profile_interface = type { float, float, float, i8, float, i64, float, i64, float, i64, float, i64, float, i64, float, i64, float, i64, float, float, i8, i64, i64, i8, i8, i64, i64, i64, float, float, float } | |
%INC_DEC_interface = type { i8, i8, i8, i8, i16, i8, i8, i8, i8, i8, i8 } | |
%INTERLOCK_interface = type { i8, i8, i64, i8, i8, %TOF_interface, %TOF_interface } | |
%TOF_interface = type { i8, i64, i8, i64, i8, i64 } | |
%INTERLOCK_4_interface = type { i8, i8, i8, i8, i8, i16, i8, i8, i8, i8, i8, i16 } | |
%MANUAL_1_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 } | |
%MANUAL_2_interface = type { i8, i8, i8, i8, i8, i8, i8 } | |
%MANUAL_4_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i16, i8 } | |
%PARSET_interface = type { i8, i8, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i64, float, float, float, float, [16 x float], float, float, float, float, i32, i32, i8, i8, i8 } | |
%PARSET2_interface = type { float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i64, float, float, float, float, %PARSET_interface, i8 } | |
%SIGNAL_interface = type { i8, i8, i64, i8, i32, i8, i8 } | |
%SIGNAL_4_interface = type { i8, i8, i8, i8, i64, i8, i8, i8, i8, i8, %SIGNAL_interface } | |
%SRAMP_interface = type { float, float, float, float, float, float, float, i8, float, float, %TC_S_interface, i8 } | |
%TC_S_interface = type { float, i8, i32, i32 } | |
%TUNE_interface = type { i8, i8, i8, i8, float, float, float, float, float, i64, i64, float, float, float, i32, i32, i32, i16, i8, float, float, float, float } | |
%TUNE2_interface = type { i8, i8, i8, i8, i8, i8, float, float, float, float, float, float, i64, float, float, float, i32, i32, i16, i8, float, float, float } | |
%CONTROL_SET1_interface = type { float, float, i8, i8, float, float, float, float, float, float, float, float, float, float, float } | |
%CONTROL_SET2_interface = type { float, float, float, i8, i8, float, float, float, float, float, float, float, float, float, float, float, float } | |
%CTRL_OUT_interface = type { float, float, float, float, float, i8, float, i8 } | |
%CTRL_PI_interface = type { float, float, float, float, float, i8, i8, float, float, float, float, float, float, i8, %FT_PIWL_interface, %CTRL_OUT_interface } | |
%FT_PIWL_interface = type { float, float, float, float, float, i8, float, i8, i8, i32, float, i32, float, float, float } | |
%CTRL_PID_interface = type { float, float, float, float, float, i8, i8, float, float, float, float, float, float, float, i8, %FT_PIDWL_interface, %CTRL_OUT_interface } | |
%FT_PIDWL_interface = type { float, float, float, float, float, float, i8, float, i8, %FT_PIWL_interface, %FT_DERIV_interface } | |
%FT_DERIV_interface = type { float, float, i8, float, float, i32, i32, i8, float } | |
%CTRL_PWM_interface = type { float, float, i8, float, i8, %PWM_DC_interface } | |
%PWM_DC_interface = type { float, float, i8, %CLK_PRG_interface, %TP_X_interface, float } | |
%CLK_PRG_interface = type { i64, i8, i8, i64, i64 } | |
%TP_X_interface = type { i8, i64, i8, i64, i8, i64, i64 } | |
%DEAD_BAND_A_interface = type { float, i64, float, float, float, float, %FT_PT1_interface, %FT_PT1_interface } | |
%FT_PT1_interface = type { float, i64, float, float, i32, i32, i8 } | |
%DEAD_ZONE2_interface = type { float, float, float } | |
%FT_IMP_interface = type { float, i64, float, float, %FT_PT1_interface } | |
%FT_INT_interface = type { float, float, i8, i8, float, float, float, i8, %INTEGRATE_interface } | |
%INTEGRATE_interface = type { i8, float, float, float*, float, i8, i32, i32 } | |
%FT_INT2_interface = type { float, float, i8, i8, float, float, float, i8, %INTEGRATE_interface, float, %REAL2 } | |
%FT_PD_interface = type { float, float, float, float, %FT_DERIV_interface } | |
%FT_PDT1_interface = type { float, float, float, float, float, %FT_DERIV_interface, %FT_PT1_interface } | |
%FT_PI_interface = type { float, float, float, float, float, i8, i8, float, i8, %FT_INT_interface } | |
%FT_PID_interface = type { float, float, float, float, float, float, i8, i8, float, i8, %FT_INT_interface, %FT_DERIV_interface } | |
%FT_PIDW_interface = type { float, float, float, float, float, float, i8, float, i8, %INTEGRATE_interface, %FT_DERIV_interface, float } | |
%FT_PIW_interface = type { float, float, float, float, float, i8, float, i8, %FT_INT_interface } | |
%FT_PT2_interface = type { float, i64, float, float, float, i8, %INTEGRATE_interface, %INTEGRATE_interface, float, float, float, float } | |
%FT_TN16_interface = type { float, i64, float, i8, i16, [16 x float], i16, i64, i64, i8 } | |
%FT_TN64_interface = type { float, i64, float, i8, i16, [64 x float], i16, i64, i64, i8 } | |
%FT_TN8_interface = type { float, i64, float, i8, i16, [8 x float], i16, i64, i64, i8 } | |
%HYST_interface = type { float, float, float, i8, i8 } | |
%HYST_1_interface = type { float, float, float, i8, i8 } | |
%HYST_2_interface = type { float, float, float, i8, i8, float } | |
%HYST_3_interface = type { float, float, float, float, i8, i8, float } | |
%ASTRO_interface = type { float, float, float, float, float, float, float, float } | |
%ENERGY_interface = type { float, float, float, float, float, float } | |
%LENGTH_interface = type { float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float } | |
%PRESSURE_interface = type { float, float, float, float, float, float, float, float, float, float, float, float } | |
%SPEED_interface = type { float, float, float, float, float, float, float, float } | |
%TEMPERATURE_interface = type { float, float, float, float, float, float, float, float, float, float } | |
%ALARM_2_interface = type { float, float, float, float, float, float, i8, i8, i8, i8, float } | |
%BAR_GRAPH_interface = type { float, i8, float, float, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, float, float, float, float, float } | |
%CALIBRATE_interface = type { float, i8, i8, float, float, float, float, float } | |
%CYCLE_TIME_interface = type { i8, i64, i64, i64, i64, i16, i32, i64, i64, i8 } | |
%DT_SIMU_interface = type { i64, float, i64, i32, i8, i32, i32, i32 } | |
%FLOW_METER_interface = type { float, i8, i8, i8, i64, float, float*, i32*, i64, i64, %INTEGRATE_interface, i8, i8, i16, float, i32 } | |
%M_D_interface = type { i8, i8, i64, i8, i64, i64, i8, i8, i64, i64, i8 } | |
%M_T_interface = type { i8, i64, i8, i64, i64, i8, i64, i64 } | |
%M_TX_interface = type { i8, i64, i8, i64, i64, float, float, i64, i8, i64, i64, i64, i8, i8, i8 } | |
%METER_interface = type { float, float, i8, i8, float, i8, float*, %REAL2, float, float, i32, i32, float, i8 } | |
%METER_STAT_interface = type { float, i64, i8, float*, float*, float*, float*, float*, float*, float*, float*, float, float, float, float, i64 } | |
%ONTIME_interface = type { i8, i8, i32*, i32*, i32, i32, i8, i8, i32 } | |
%TC_MS_interface = type { i32, i8, i32, i32 } | |
%TC_US_interface = type { i32, i8, i32, i32 } | |
%_RMP_B_interface = type { i8, i8, i64, i8*, i64, i64, i64, i8, i8, i8 } | |
%_RMP_NEXT_interface = type { i8, i8, i64, i64, i64, i8, i8, i8, i8*, %_RMP_B_interface, %TREND_DW_interface, %TP_interface, i8, i8 } | |
%TREND_DW_interface = type { i32, i8, i8, i8, i32, i32 } | |
%TP_interface = type { i8, i64, i8, i64, i64 } | |
%_RMP_W_interface = type { i8, i8, i64, i16*, i32, i32, i32, i8, i8 } | |
%GEN_PULSE_interface = type { i8, i64, i64, i8, i64, i64, i8 } | |
%GEN_PW2_interface = type { i8, i64, i64, i64, i64, i8, i8, i64, i64, i64, i64, i64, i64, i8, i64 } | |
%GEN_RDM_interface = type { i64, float, float, i8, float, i64, i64, i8 } | |
%GEN_RDT_interface = type { i8, i64, i64, i64, i8, %TON_interface, %TOF_interface, i64, float } | |
%GEN_RMP_interface = type { i64, float, float, float, i8, float, i64, i64, i8, float, float } | |
%GEN_SIN_interface = type { i64, float, float, float, i8, float, i64, i64, i8, float } | |
%GEN_SQR_interface = type { i64, float, float, float, float, i8, float, i64, i64, i8 } | |
%PWM_PW_interface = type { float, i64, i8, %CLK_PRG_interface, %TP_X_interface } | |
%RMP_B_interface = type { i8, i64, i8, i8, i8, i8, i8, i8, i8, %_RMP_B_interface } | |
%RMP_SOFT_interface = type { i8, i8, i64, i64, i8, %_RMP_B_interface, i8 } | |
%RMP_W_interface = type { i8, i64, i8, i8, i8, i16, i8, i8, i8, %_RMP_W_interface } | |
%AIN1_interface = type { i32, i16, i16, i8, i32, i16, i8, i32, i16, i16, float, float, i32, i32, float, float, float, i8, i8, i8, i32 } | |
%DELAY_interface = type { float, i16, i8, float, [32 x float], i16, i8, i16 } | |
%DELAY_4_interface = type { float, float, float, float, float, float } | |
%FADE_interface = type { float, float, i8, i64, i8, float, %RMP_W_interface } | |
%FILTER_DW_interface = type { i32, i64, i32, i32, i32, i8, float } | |
%FILTER_I_interface = type { i16, i64, i16, i32, i32, i32, i8 } | |
%FILTER_MAV_DW_interface = type { i32, i16, i8, i32, i8, [32 x i32], i16 } | |
%FILTER_MAV_W_interface = type { i16, i16, i8, i16, i8, [32 x i16], i16, i32 } | |
%FILTER_W_interface = type { i16, i64, i16, i32, i32, i8, i32 } | |
%FILTER_WAV_interface = type { float, [16 x float], i8, float, i8, [16 x float], i16, i16 } | |
%SEL2_OF_3_interface = type { float, float, float, float, float, i16, i8, i8, i8, i8 } | |
%SEL2_OF_3B_interface = type { i8, i8, i8, i64, i8, i8, %TON_interface } | |
%SH_interface = type { float, i8, float, i8, i8 } | |
%SH_1_interface = type { float, i64, float, i8, i64, i64 } | |
%SH_2_interface = type { float, i64, i16, i16, float, i8, float, float, float, i16, [16 x float], [16 x float], i64, i16, i16, float, i16, i64, i16 } | |
%SH_T_interface = type { float, i8, float } | |
%STAIR2_interface = type { float, float, float } | |
%TREND_interface = type { float, i8, i8, i8, float, float } | |
%LIST_NEXT_interface = type { i8, i8, [251 x i8]*, [251 x i8], i8, i16, [250 x i8]*, [250 x i8]*, i8, i16 } | |
%COUNT_BR_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 } | |
%COUNT_DR_interface = type { i8, i32, i8, i8, i32, i32, i8, i32, i8, i8 } | |
%FF_D2E_interface = type { i8, i8, i8, i8, i8, i8, i8 } | |
%FF_D4E_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 } | |
%FF_DRE_interface = type { i8, i8, i8, i8, i8, i8 } | |
%FF_JKE_interface = type { i8, i8, i8, i8, i8, i8, i8 } | |
%FF_RSE_interface = type { i8, i8, i8, i8, i8, i8 } | |
%SELECT_8_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i16, i8, i8 } | |
%SHR_4E_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, %R_TRIG_interface } | |
%R_TRIG_interface = type { i8, i8, i8 } | |
%SHR_4UDE_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, %R_TRIG_interface } | |
%SHR_8PLE_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8 } | |
%SHR_8UDE_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, %R_TRIG_interface } | |
%TOGGLE_interface = type { i8, i8, i8, i8 } | |
%LTCH_interface = type { i8, i8, i8, i8 } | |
%LTCH_4_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 } | |
%STORE_8_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 } | |
%BYTE_TO_BITS_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8 } | |
%DEC_2_interface = type { i8, i8, i8, i8 } | |
%DEC_4_interface = type { i8, i8, i8, i8, i8, i8, i8 } | |
%DEC_8_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i16 } | |
%A_TRIG_interface = type { float, float, i8, float, float } | |
%B_TRIG_interface = type { i8, i8, i8 } | |
%CLICK_CNT_interface = type { i8, i16, i64, i8, %TP_interface, i8, i16 } | |
%CLICK_DEC_interface = type { i8, i64, i8, i8, i8, i8, %TP_interface, i8, i16 } | |
%CLK_DIV_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 } | |
%CLK_N_interface = type { i16, i8, i8, i32, i8 } | |
%CLK_PULSE_interface = type { i64, i16, i8, i8, i16, i8, i32, i32, i8 } | |
%CYCLE_4_interface = type { i8, i64, i64, i64, i64, i8, i16, i8, i16, i64, i64, i8 } | |
%D_TRIG_interface = type { i32, i8, i32, i32 } | |
%GEN_BIT_interface = type { i32, i32, i32, i32, i8, i16, i16, i8, i8, i8, i8, i8, i16, i8, i32, i32, i32, i32, i16 } | |
%GEN_SQ_interface = type { i64, i8, i32, i32, i8 } | |
%SCHEDULER_interface = type { i8, i8, i8, i8, i64, i64, i64, i64, i8, i8, i8, i8, i8, i64, i64, i64, i64, i64, i16 } | |
%SCHEDULER_2_interface = type { i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, i16, i16, i8, i8, i8, i8, i16 } | |
%SEQUENCE_4_interface = type { i8, i8, i8, i8, i8, i8, i64, i64, i64, i64, i64, i64, i64, i64, i8, i8, i8, i8, i8, i8, i8, i16, i8, i64, i8, i64, i8 } | |
%SEQUENCE_64_interface = type { i8, i16, [64 x i64], i8, i16, i8, i64, i8, i64 } | |
%SEQUENCE_8_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i16, i8, i64, i8, i64, i8 } | |
%TMAX_interface = type { i8, i64, i8, i8, i64, i64, i8 } | |
%TMIN_interface = type { i8, i64, i8, %TP_interface } | |
%TOF_1_interface = type { i8, i64, i8, i8, i64, i64 } | |
%TONOF_interface = type { i8, i64, i64, i8, %TON_interface, i8, i8 } | |
%TP_1_interface = type { i8, i64, i8, i8, i64, i64, i8 } | |
%FIFO_16_interface = type { i32, i8, i8, i8, i8, i32, i8, i8, [17 x i32], i16, i16, i16 } | |
%FIFO_32_interface = type { i32, i8, i8, i8, i8, i32, i8, i8, [33 x i32], i16, i16, i16 } | |
%STACK_16_interface = type { i32, i8, i8, i8, i8, i32, i8, i8, [16 x i32], i16, i16 } | |
%STACK_32_interface = type { i32, i8, i8, i8, i8, i32, i8, i8, [32 x i32], i16, i16 } | |
%MATRIX_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, [4 x i8], [4 x i8], i16, i8 } | |
%PIN_CODE_interface = type { i8, i8, [9 x i8], i8, i16 } | |
%FT_AVG_interface = type { float, i8, i16, i8, float, %DELAY_interface, i16, i8 } | |
%FT_MIN_MAX_interface = type { float, i8, float, float, i8 } | |
%FT_RMP_interface = type { i8, float, float, float, float, i8, i8, i64, i64, i8 } | |
%ESR_COLLECT_interface = type { [4 x %ESR_DATA], [4 x %ESR_DATA], [4 x %ESR_DATA], [4 x %ESR_DATA], [4 x %ESR_DATA], [4 x %ESR_DATA], [4 x %ESR_DATA], [4 x %ESR_DATA], i8, i16*, [32 x %ESR_DATA], i16, i16, i16 } | |
%ESR_MON_B8_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i64, [11 x i8], [11 x i8], [11 x i8], [11 x i8], [11 x i8], [11 x i8], [11 x i8], [11 x i8], i8, [4 x %ESR_DATA]*, i8, i8, i8, i8, i8, i8, i8, i8, i64, i16 } | |
%ESR_MON_R4_interface = type { float, float, float, float, i64, [11 x i8], [11 x i8], [11 x i8], [11 x i8], float, float, float, float, i8, [4 x %ESR_DATA]*, i32*, i32*, i32*, i32*, float, float, float, float, i64, i16 } | |
%ESR_MON_X8_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, i64, i8, [11 x i8], [11 x i8], [11 x i8], [11 x i8], [11 x i8], [11 x i8], [11 x i8], [11 x i8], i8, [4 x %ESR_DATA]*, i8, i8, i8, i8, i8, i8, i8, i8, i64, i16 } | |
%MESSAGE_4R_interface = type { [251 x i8], [251 x i8], [251 x i8], [251 x i8], i16, i8, i8, i64, [251 x i8], i16, i8, %TON_interface, i8 } | |
%MESSAGE_8_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, [251 x i8], [251 x i8], [251 x i8], [251 x i8], [251 x i8], [251 x i8], [251 x i8], [251 x i8], [251 x i8] } | |
%TICKER_interface = type { i16, i64, [251 x i8]*, [251 x i8], %TP_interface, i16 } | |
%CALENDAR_CALC_interface = type { i8, float, %CALENDAR*, [30 x %HOLIDAY_DATA]*, i64, i32, %HOLIDAY_interface, %SUN_TIME_interface, i16, i64, %SUN_POS_interface, i64 } | |
%HOLIDAY_interface = type { i64, i16, i8, i8, i8, [30 x %HOLIDAY_DATA]*, i16, i8, [31 x i8], i64, i64, i16, i16, i64, i16, i16 } | |
%SUN_TIME_interface = type { float, float, i64, float, i64, i64, i64, float, float, i64, float } | |
%SUN_POS_interface = type { float, float, i64, float, float, float } | |
%DCF77_interface = type { i8, i8, i64, i8, i64, i16, i8, i8, i8, i16, i8, i64, i64, i16, i8, i64, i64, i16, i8, i64, i64, i64, [59 x i8], i16, i16, i64, i16, i16, i16, i16, i16, i64, i64, i64, i8 } | |
%EVENTS_interface = type { i64, i8, i8, [31 x i8], i16, i64, i16, i32, i16, i32, %HOLIDAY_DATA, i8, [31 x i8], [50 x %HOLIDAY_DATA]* } | |
%RTC_2_interface = type { i8, i64, i16, i8, i16, i64, i64, i8, i16, %RTC_MS_interface } | |
%RTC_MS_interface = type { i8, i64, i16, i64, i16, i8, i32, i32 } | |
%CTD_interface = type { i8, i8, i16, i8, i16, i8 } | |
%CTU_interface = type { i8, i8, i16, i8, i16, i8 } | |
%CTUD_interface = type { i8, i8, i8, i8, i16, i8, i8, i16, i8, i8 } | |
%F_TRIG_interface = type { i8, i8, i8 } | |
%RS_interface = type { i8, i8, i8 } | |
%SR_interface = type { i8, i8, i8 } | |
%_BUFFER_CLEAR_interface = type { i8*, i16, i32*, i32, i32, i32 } | |
%_BUFFER_INIT_interface = type { i8*, i16, i8, i32*, i32, i32, i32 } | |
%_BUFFER_INSERT_interface = type { [251 x i8], i16, [32768 x i8]*, i16, i16, i16, i16 } | |
%LEN_interface = type { [1024 x i8] } | |
%UINT_TO_INT_interface = type { i16 } | |
%_STRING_TO_BUFFER_interface = type { [251 x i8], i16, [32768 x i8]*, i16, i8*, i16, i16 } | |
%_BUFFER_UPPERCASE_interface = type { [32001 x i8]*, i16, i16 } | |
%TO_UPPER_interface = type { i8 } | |
%BUFFER_COMP_interface = type { [32768 x i8]*, i16, [32768 x i8]*, i16, i16, i16, i16, i16, i8 } | |
%BUFFER_SEARCH_interface = type { [32768 x i8]*, i16, [251 x i8], i16, i8, [251 x i8]*, i8, i16, i16, i16, i16 } | |
%BUFFER_TO_STRING_interface = type { [32768 x i8]*, i16, i16, i16, i8*, i16, i16, i16 } | |
%DWORD_TO_TIME_interface = type { i32 } | |
%T_PLC_MS_interface = type { i8, i16, i32, i64 } | |
%MULTIME_interface = type { i64, float } | |
%TIME_TO_REAL_interface = type { i64 } | |
%MANUAL_interface = type { i8, i8, i8 } | |
%INC_interface = type { i16, i16, i16 } | |
%DWORD_TO_REAL_interface = type { i32 } | |
%TIME_TO_DWORD_interface = type { i64 } | |
%ABS_interface = type { i64 } | |
%DWORD_TO_BYTE_interface = type { i32 } | |
%SHR_interface = type { i64, i16 } | |
%SHL_interface = type { i64, i16 } | |
%MAX_interface = type { i64, i64 } | |
%MIN_interface = type { i64, i64 } | |
%SQRT_interface = type { i32 } | |
%LIMIT_interface = type { i64, i64, i64 } | |
%BAND_B_interface = type { i8, i8 } | |
%CTRL_IN_interface = type { float, float, float } | |
%DEAD_ZONE_interface = type { float, float } | |
%SEL_interface = type { i8, i64, i64 } | |
%DEAD_BAND_interface = type { float, float } | |
%T_PLC_US_interface = type { i8, i16, i32, i64 } | |
%R2_SET_interface = type { float } | |
%R2_ADD_interface = type { %REAL2, float, float } | |
%REAL_TO_TIME_interface = type { float } | |
%BFT_TO_MS_interface = type { i16 } | |
%EXPT_interface = type { i32, i32 } | |
%C_TO_F_interface = type { float } | |
%C_TO_K_interface = type { float } | |
%DEG_TO_DIR_interface = type { i16, i16, i16, i16 } | |
%DIR_TO_DEG_interface = type { [4 x i8], i16, i16, i16 } | |
%F_TO_C_interface = type { float } | |
%F_TO_OM_interface = type { float } | |
%F_TO_PT_interface = type { float } | |
%REAL_TO_DWORD_interface = type { float } | |
%GEO_TO_DEG_interface = type { i16, i16, float } | |
%INT_TO_REAL_interface = type { i16 } | |
%K_TO_C_interface = type { float } | |
%KMH_TO_MS_interface = type { float } | |
%MS_TO_BFT_interface = type { float } | |
%REAL_TO_INT_interface = type { float } | |
%MS_TO_KMH_interface = type { float } | |
%OM_TO_F_interface = type { float } | |
%PT_TO_F_interface = type { i64 } | |
%EXP_interface = type { i32 } | |
%LN_interface = type { i32 } | |
%DWORD_TO_DT_interface = type { i32 } | |
%DT_TO_DWORD_interface = type { i64 } | |
%FLOOR_interface = type { float } | |
%INT_TO_UDINT_interface = type { i16 } | |
%UDINT_TO_REAL_interface = type { i32 } | |
%YEAR_OF_DATE_interface = type { i64 } | |
%MONTH_OF_DATE_interface = type { i64 } | |
%DAY_OF_YEAR_interface = type { i64 } | |
%DAY_OF_WEEK_interface = type { i64 } | |
%BOOL_TO_UINT_interface = type { i8 } | |
%_TIME_interface = type {} | |
%MULTI_IN_interface = type { float, float, float, float, float, float, i8, i16, i8, i8, i8 } | |
%MID3_interface = type { float, float, float } | |
%RES_NI_interface = type { float, float, float, float, float, float } | |
%RES_NTC_interface = type { float, float, float } | |
%RES_PT_interface = type { float, float, float, float, float, float } | |
%RES_SI_interface = type { float, float, float, float, float, float } | |
%SENSOR_INT_interface = type { float, float, float, float, float } | |
%TEMP_NI_interface = type { float, float } | |
%TEMP_NTC_interface = type { float, float, float } | |
%TEMP_PT_interface = type { float, float, float, float, float, float, float, float, float, i32* } | |
%TEMP_SI_interface = type { float, float, float } | |
%FRMP_B_interface = type { i8, i8, i64, i64 } | |
%DWORD_TO_DINT_interface = type { i32 } | |
%DINT_TO_WORD_interface = type { i32 } | |
%WORD_TO_DINT_interface = type { i16 } | |
%RDM_interface = type { float, i32, i16 } | |
%DINT_TO_REAL_interface = type { i32 } | |
%TIME_TO_DINT_interface = type { i64 } | |
%MODR_interface = type { float, float } | |
%FRACT_interface = type { float } | |
%SIN_interface = type { i32 } | |
%SIGN_R_interface = type { float } | |
%AIN_interface = type { i32, i8, i8, float, float, i32, i32, i32, i8 } | |
%AOUT_interface = type { float, i8, i8, float, float, i32, float, i8 } | |
%AOUT1_interface = type { float, i16, i16, i16, float, float, i32, i8, float } | |
%BYTE_TO_RANGE_interface = type { i8, float, float } | |
%INC1_interface = type { i16, i16 } | |
%WORD_TO_REAL_interface = type { i16 } | |
%INT_TO_DINT_interface = type { i16 } | |
%DINT_TO_INT_interface = type { i32 } | |
%DWORD_TO_WORD_interface = type { i32 } | |
%WORD_TO_DWORD_interface = type { i16 } | |
%DEC1_interface = type { i16, i16 } | |
%MIX_interface = type { float, float, float } | |
%MUX_R2_interface = type { float, float, i8 } | |
%MUX_R4_interface = type { float, float, float, float, i8, i8 } | |
%OFFSET_interface = type { float, i8, i8, i8, i8, i8, float, float, float, float, float } | |
%OFFSET2_interface = type { float, i8, i8, i8, i8, i8, float, float, float, float, float } | |
%_OVERRIDE_interface = type { float, float, float, i8, i8, i8 } | |
%RANGE_TO_BYTE_interface = type { float, float, float } | |
%INT_TO_BYTE_interface = type { i16 } | |
%TRUNC_interface = type { double } | |
%RANGE_TO_WORD_interface = type { float, float, float } | |
%SCALE_interface = type { float, float, float, float, float } | |
%SCALE_B_interface = type { i8, i8, i8, float, float } | |
%BYTE_TO_REAL_interface = type { i8 } | |
%SCALE_B2_interface = type { i8, i8, float, float, float, float, float, float } | |
%SCALE_B4_interface = type { i8, i8, i8, i8, float, float, float, float, float, float, float, float, float, float } | |
%SCALE_B8_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float } | |
%SCALE_D_interface = type { i32, i32, i32, float, float } | |
%SCALE_R_interface = type { float, float, float, float, float } | |
%SCALE_X2_interface = type { i8, i8, float, float, float, float, float, float } | |
%SCALE_X4_interface = type { i8, i8, i8, i8, float, float, float, float, float, float, float, float, float, float } | |
%SCALE_X8_interface = type { i8, i8, i8, i8, i8, i8, i8, i8, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float } | |
%EVEN_interface = type { i32 } | |
%STAIR_interface = type { float, float } | |
%REAL_TO_DINT_interface = type { float } | |
%WORD_TO_RANGE_interface = type { i16, float, float } | |
%LIST_ADD_interface = type { i8, [251 x i8], [251 x i8]*, [2 x i8] } | |
%CHR_TO_STRING_interface = type { i8, i8* } | |
%CONCAT_interface = type { [1024 x i8], [1024 x i8] } | |
%LIST_CLEAN_interface = type { i8, [251 x i8]*, [250 x i8]*, i16, i16, i8, i8 } | |
%LIST_GET_interface = type { i8, i16, [251 x i8]*, i16, i16, [250 x i8]*, [250 x i8]*, i16, i8 } | |
%LIST_INSERT_interface = type { i8, i16, [251 x i8], [251 x i8]*, [250 x i8]*, i16, i16, [2 x i8] } | |
%INSERT_interface = type { [1024 x i8], [1024 x i8], i16 } | |
%LIST_LEN_interface = type { i8, [251 x i8]*, [250 x i8]*, i16, i8 } | |
%LIST_RETRIEVE_interface = type { i8, i16, [251 x i8]*, i16, i16, i16, [250 x i8]*, [250 x i8]*, i16, i8 } | |
%LIST_RETRIEVE_LAST_interface = type { i8, [251 x i8]*, i16, i16, [250 x i8]*, i8 } | |
%BCDC_TO_INT_interface = type { i8 } | |
%BIT_COUNT_interface = type { i32 } | |
%BIT_LOAD_B_interface = type { i8, i8, i16, i8 } | |
%BIT_LOAD_B2_interface = type { i8, i8, i16, i16 } | |
%ROL_interface = type { i64, i16 } | |
%ROR_interface = type { i64, i16 } | |
%BIT_LOAD_DW_interface = type { i32, i8, i16, i32 } | |
%BIT_LOAD_DW2_interface = type { i32, i8, i16, i16 } | |
%BIT_LOAD_W_interface = type { i16, i8, i16, i16 } | |
%BIT_LOAD_W2_interface = type { i16, i8, i16, i16 } | |
%BIT_OF_DWORD_interface = type { i32, i16 } | |
%BIT_TOGGLE_B_interface = type { i8, i16 } | |
%BIT_TOGGLE_DW_interface = type { i32, i16 } | |
%BIT_TOGGLE_W_interface = type { i16, i16 } | |
%BYTE_OF_BIT_interface = type { i8, i8, i8, i8, i8, i8, i8, i8 } | |
%BOOL_TO_BYTE_interface = type { i8 } | |
%BYTE_OF_DWORD_interface = type { i32, i8 } | |
%BYTE_TO_GRAY_interface = type { i8 } | |
%CHECK_PARITY_interface = type { i32, i8 } | |
%CHK_REAL_interface = type { float, i32*, i32 } | |
%DW_TO_REAL_interface = type { i32, float* } | |
%DWORD_OF_BYTE_interface = type { i8, i8, i8, i8 } | |
%BYTE_TO_DWORD_interface = type { i8 } | |
%DWORD_OF_WORD_interface = type { i16, i16 } | |
%GRAY_TO_BYTE_interface = type { i8 } | |
%INT_TO_BCDC_interface = type { i16 } | |
%MUX_2_interface = type { i8, i8, i8 } | |
%MUX_4_interface = type { i8, i8, i8, i8, i8, i8 } | |
%PARITY_interface = type { i32 } | |
%REAL_TO_DW_interface = type { float, i32* } | |
%REFLECT_interface = type { i32, i16, i16 } | |
%BOOL_TO_DWORD_interface = type { i8 } | |
%REVERSE_interface = type { i8 } | |
%SHL1_interface = type { i32, i16, i32 } | |
%SHR1_interface = type { i32, i16, i32 } | |
%SWAP_BYTE_interface = type { i16 } | |
%SWAP_BYTE2_interface = type { i32 } | |
%WORD_OF_BYTE_interface = type { i8, i8 } | |
%BYTE_TO_WORD_interface = type { i8 } | |
%WORD_OF_DWORD_interface = type { i32, i8 } | |
%INC2_interface = type { i16, i16, i16, i16, i16 } | |
%CRC_GEN_interface = type { [32001 x i8]*, i16, i16, i32, i32, i8, i8, i32, i16, i16, i8, i16 } | |
%CODE_interface = type { [251 x i8], i16, i8* } | |
%_ARRAY_ABS_interface = type { [32001 x float]*, i16, i16, i16 } | |
%_ARRAY_ADD_interface = type { [32001 x float]*, i16, float, i16, i16 } | |
%_ARRAY_INIT_interface = type { [32001 x float]*, i16, float, i16, i16 } | |
%_ARRAY_MEDIAN_interface = type { [32001 x float]*, i16, i16, i16 } | |
%_ARRAY_SORT_interface = type { [32000 x float]*, i16, i16, [32 x i16], i16, i16, float, i16, i16, i8, i8, float } | |
%_ARRAY_MUL_interface = type { [32001 x float]*, i16, float, i16, i16 } | |
%_ARRAY_SHUFFLE_interface = type { [32001 x float]*, i16, float, i16, i16, i16 } | |
%RDM2_interface = type { i16, i16, i16 } | |
%ARRAY_AVG_interface = type { [32001 x float]*, i16, i16, i16 } | |
%UINT_TO_REAL_interface = type { i16 } | |
%ARRAY_GAV_interface = type { [32001 x float]*, i16, i16, i16 } | |
%SQRTN_interface = type { float, i16 } | |
%ARRAY_HAV_interface = type { [32001 x float]*, i16, i16, i16 } | |
%ARRAY_MAX_interface = type { [32001 x float]*, i16, i16, i16 } | |
%SIZEOF_interface = type { i64 } | |
%ARRAY_MIN_interface = type { [32001 x float]*, i16, i16, i16 } | |
%ARRAY_SDV_interface = type { [32001 x float]*, i16 } | |
%ARRAY_VAR_interface = type { [32001 x float]*, i16, float, i16, i16 } | |
%ARRAY_SPR_interface = type { [32001 x float]*, i16, i16, i16, float, float } | |
%ARRAY_SUM_interface = type { [32001 x float]*, i16, i16, i16 } | |
%ARRAY_TREND_interface = type { [32001 x float]*, i16, i16, i16, float, i16 } | |
%IS_SORTED_interface = type { [32001 x float]*, i16, i16, i16 } | |
%CABS_interface = type { %COMPLEX } | |
%HYPOT_interface = type { float, float } | |
%CACOS_interface = type { %COMPLEX, %COMPLEX } | |
%CACOSH_interface = type { %COMPLEX, %COMPLEX } | |
%CSQRT_interface = type { %COMPLEX, float } | |
%CLOG_interface = type { %COMPLEX } | |
%CADD_interface = type { %COMPLEX, %COMPLEX } | |
%CARG_interface = type { %COMPLEX } | |
%ATAN2_interface = type { float, float } | |
%CASIN_interface = type { %COMPLEX, %COMPLEX } | |
%CASINH_interface = type { %COMPLEX, %COMPLEX } | |
%CATAN_interface = type { %COMPLEX, float, float, float } | |
%ATAN_interface = type { double } | |
%CATANH_interface = type { %COMPLEX, float, float, float } | |
%CCON_interface = type { %COMPLEX } | |
%CCOS_interface = type { %COMPLEX } | |
%CCOSH_interface = type { %COMPLEX } | |
%CSET_interface = type { float, float } | |
%COSH_interface = type { float, float } | |
%COS_interface = type { i32 } | |
%SINH_interface = type { float } | |
%CDIV_interface = type { %COMPLEX, %COMPLEX, float } | |
%CEXP_interface = type { %COMPLEX, float } | |
%CINV_interface = type { %COMPLEX, float } | |
%CMUL_interface = type { %COMPLEX, %COMPLEX } | |
%CPOL_interface = type { float, float } | |
%CPOW_interface = type { %COMPLEX, %COMPLEX } | |
%CSIN_interface = type { %COMPLEX } | |
%CSINH_interface = type { %COMPLEX } | |
%SGN_interface = type { float } | |
%CSUB_interface = type { %COMPLEX, %COMPLEX } | |
%CTAN_interface = type { %COMPLEX, float, float, float } | |
%CTANH_interface = type { %COMPLEX, float, float, float } | |
%R2_ABS_interface = type { %REAL2 } | |
%R2_ADD2_interface = type { %REAL2, %REAL2 } | |
%R2_MUL_interface = type { %REAL2, float } | |
%F_LIN_interface = type { float, float, float } | |
%F_LIN2_interface = type { float, float, float, float, float } | |
%F_POLY_interface = type { float, [8 x float] } | |
%F_POWER_interface = type { float, float, float } | |
%F_QUAD_interface = type { float, float, float, float } | |
%LINEAR_INT_interface = type { float, [40 x float], i16, i16 } | |
%POLYNOM_INT_interface = type { float, [10 x float], i16, i16, i16, i16 } | |
%CIRCLE_A_interface = type { float, float } | |
%CIRCLE_C_interface = type { float, float } | |
%CIRCLE_SEG_interface = type { float, float } | |
%ACOS_interface = type { i32 } | |
%CONE_V_interface = type { float, float } | |
%ELLIPSE_A_interface = type { float, float } | |
%ELLIPSE_C_interface = type { float, float } | |
%SPHERE_V_interface = type { float } | |
%TRIANGLE_A_interface = type { float, float, float, float } | |
%RAD_interface = type { float } | |
%V3_ABS_interface = type { %VECTOR_3 } | |
%V3_ADD_interface = type { %VECTOR_3, %VECTOR_3 } | |
%V3_ANG_interface = type { %VECTOR_3, %VECTOR_3, float } | |
%V3_DPRO_interface = type { %VECTOR_3, %VECTOR_3 } | |
%V3_NORM_interface = type { %VECTOR_3, float } | |
%V3_SMUL_interface = type { %VECTOR_3, float } | |
%V3_NUL_interface = type { %VECTOR_3 } | |
%V3_PAR_interface = type { %VECTOR_3, %VECTOR_3 } | |
%V3_XPRO_interface = type { %VECTOR_3, %VECTOR_3 } | |
%V3_REV_interface = type { %VECTOR_3 } | |
%V3_SUB_interface = type { %VECTOR_3, %VECTOR_3 } | |
%V3_XANG_interface = type { %VECTOR_3, float } | |
%V3_YANG_interface = type { %VECTOR_3, float } | |
%V3_ZANG_interface = type { %VECTOR_3, float } | |
%ACOSH_interface = type { float } | |
%ACOTH_interface = type { float } | |
%AGDF_interface = type { float } | |
%ASINH_interface = type { float } | |
%ATANH_interface = type { float } | |
%BETA_interface = type { float, float } | |
%GAMMA_interface = type { float } | |
%BINOM_interface = type { i16, i16, i16 } | |
%CAUCHY_interface = type { float, float, float, float } | |
%CAUCHYCD_interface = type { float, float, float } | |
%CEIL_interface = type { float } | |
%CEIL2_interface = type { float } | |
%CMP_interface = type { float, float, i16, float } | |
%EXP10_interface = type { float } | |
%LOG_interface = type { i64 } | |
%COTH_interface = type { float } | |
%D_TRUNC_interface = type { float } | |
%DEG_interface = type { float } | |
%DIFFER_interface = type { float, float, float } | |
%ERF_interface = type { float, float, float } | |
%ERFC_interface = type { float } | |
%EXPN_interface = type { float, i16, i8 } | |
%FACT_interface = type { i16 } | |
%FIB_interface = type { i16, i32, i32 } | |
%FLOOR2_interface = type { float } | |
%GAUSS_interface = type { float, float, float, float, float } | |
%GAUSSCD_interface = type { float, float, float } | |
%GCD_interface = type { i32, i32, i32 } | |
%GDF_interface = type { float } | |
%GOLD_interface = type { float } | |
%INV_interface = type { float } | |
%LAMBERT_W_interface = type { float, float, i16, float, float, i32, float } | |
%LANGEVIN_interface = type { float } | |
%MAX3_interface = type { float, float, float } | |
%MIN3_interface = type { float, float, float } | |
%MUL_ADD_interface = type { float, float, float } | |
%NEGX_interface = type { float } | |
%INT_TO_DWORD_interface = type { i16 } | |
%RDMDW_interface = type { i32, float, float } | |
%REAL_TO_FRAC_interface = type { float, i16, i32, i8, i32, float, i32, i32, i32, i32 } | |
%RND_interface = type { float, i16, float } | |
%ROUND_interface = type { float, i16, float } | |
%SIGMOID_interface = type { float } | |
%SIGN_I_interface = type { i32 } | |
%SINC_interface = type { float } | |
%TANC_interface = type { float } | |
%TAN_interface = type { i32 } | |
%TANH_interface = type { float } | |
%WINDOW_interface = type { float, float, float } | |
%WINDOW2_interface = type { float, float, float } | |
%STATUS_TO_ESR_interface = type { i8, [11 x i8], i64, i64 } | |
%OSCAT_VERSION_interface = type { i8 } | |
%DATE_TO_DWORD_interface = type { i64 } | |
%BIN_TO_BYTE_interface = type { [13 x i8], i8*, i16, i8, i16 } | |
%BIN_TO_DWORD_interface = type { [41 x i8], i8*, i16, i8, i16 } | |
%BYTE_TO_STRB_interface = type { i8, i16, i8* } | |
%BYTE_TO_STRH_interface = type { i8, i8, i8* } | |
%CAPITALIZE_interface = type { [251 x i8], i8*, i16, i16, i8 } | |
%CHARCODE_interface = type { [11 x i8], [2 x i8], [11 x i8], i16, i16 } | |
%STRING_EQUAL_interface = type { [1025 x i8], [1025 x i8] } | |
%FIND_interface = type { [1024 x i8], [1024 x i8] } | |
%MID_interface = type { [1024 x i8], i16, i16 } | |
%CHARNAME_interface = type { i8, i16, i16 } | |
%LEFT_interface = type { [1024 x i8], i16 } | |
%CLEAN_interface = type { [251 x i8], [81 x i8], i16, i16 } | |
%DELETE_interface = type { [1024 x i8], i16, i16 } | |
%COUNT_CHAR_interface = type { [251 x i8], i8, i16, i8*, i16 } | |
%COUNT_SUBSTRING_interface = type { [81 x i8], [81 x i8], i16, i16 } | |
%REPLACE_interface = type { [1024 x i8], [1024 x i8], i16, i16 } | |
%DEC_TO_BYTE_interface = type { [11 x i8], i8*, i16, i8, i16 } | |
%DEC_TO_DWORD_interface = type { [21 x i8], i8*, i16, i8, i16 } | |
%DEC_TO_INT_interface = type { [11 x i8], i8*, i16, i8, i8, i16 } | |
%DEL_CHARS_interface = type { [251 x i8], [81 x i8], i16, i16 } | |
%DT_TO_STRF_interface = type { i64, i16, [81 x i8], i16, [2 x i8], [2 x i8], i16, i64, [11 x i8], i64, i16, i16, i16 } | |
%DT_TO_DATE_interface = type { i64 } | |
%DT_TO_TOD_interface = type { i64 } | |
%INT_TO_STRING_interface = type { i16 } | |
%RIGHT_interface = type { [1024 x i8], i16 } | |
%MONTH_TO_STRING_interface = type { i16, i16, i16, i16 } | |
%DAY_OF_MONTH_interface = type { i64, i16 } | |
%WEEKDAY_TO_STRING_interface = type { i16, i16, i16, i16 } | |
%HOUR_interface = type { i64 } | |
%MINUTE_interface = type { i64 } | |
%SECOND_interface = type { i64 } | |
%DWORD_TO_STRB_interface = type { i32, i8*, i16 } | |
%DWORD_TO_STRF_interface = type { i32, i16 } | |
%FIX_interface = type { [251 x i8], i16, i8, i16, i16, [251 x i8] } | |
%DWORD_TO_STRING_interface = type { i32 } | |
%DWORD_TO_STRH_interface = type { i32, i16, i8, i8* } | |
%EXEC_interface = type { [251 x i8], i16, float, float, [11 x i8] } | |
%UPPERCASE_interface = type { [251 x i8], i8*, i16, i16 } | |
%TRIM_interface = type { [251 x i8], i16 } | |
%FINDB_NONUM_interface = type { [251 x i8], i16, i8* } | |
%STRING_TO_REAL_interface = type { [81 x i8] } | |
%FINDB_NUM_interface = type { [251 x i8], i16, i8* } | |
%REAL_TO_STRING_interface = type { float } | |
%FILL_interface = type { i8, i16, i16, [2 x i8] } | |
%FIND_CHAR_interface = type { [251 x i8], i16, i16, [255 x i8]*, i16, i8 } | |
%FIND_CTRL_interface = type { [251 x i8], i16, i16, [255 x i8]*, i16, i8 } | |
%FIND_NONUM_interface = type { [251 x i8], i16, i16, [255 x i8]*, i16, i8 } | |
%FIND_NUM_interface = type { [251 x i8], i16, i16, [255 x i8]*, i16, i8 } | |
%FINDB_interface = type { [251 x i8], [251 x i8], i16, i16 } | |
%FINDP_interface = type { [251 x i8], [251 x i8], i16, i16, i16, i16, i16 } | |
%FLOAT_TO_REAL_interface = type { [21 x i8], [20 x i8]*, i16, i8, i16, i16, i32, i16 } | |
%FSTRING_TO_BYTE_interface = type { [13 x i8] } | |
%OCT_TO_BYTE_interface = type { [11 x i8], i8*, i16, i8, i16 } | |
%HEX_TO_BYTE_interface = type { [6 x i8], i8*, i16, i8, i16 } | |
%FSTRING_TO_DT_interface = type { [61 x i8], [61 x i8], [2 x i8], [2 x i8], [2 x i8], [21 x i8], i16, i16, i16, i16, i16, i16, i16 } | |
%SET_DT_interface = type { i16, i16, i16, i16, i16, i16 } | |
%STRING_TO_INT_interface = type { [81 x i8] } | |
%FSTRING_TO_MONTH_interface = type { [21 x i8], i16, i16 } | |
%FSTRING_TO_DWORD_interface = type { [41 x i8] } | |
%OCT_TO_DWORD_interface = type { [21 x i8], i8*, i16, i8, i16 } | |
%HEX_TO_DWORD_interface = type { [21 x i8], i8*, i16, i8, i16 } | |
%LOWERCASE_interface = type { [251 x i8], i8*, i16, i16 } | |
%FSTRING_TO_WEEK_interface = type { [61 x i8], i16, i16 } | |
%FSTRING_TO_WEEKDAY_interface = type { [21 x i8], i16, [3 x i8], i16, i16 } | |
%IS_ALNUM_interface = type { [251 x i8], i16, i8*, i16 } | |
%ISC_ALPHA_interface = type { i8 } | |
%ISC_NUM_interface = type { i8 } | |
%IS_ALPHA_interface = type { [251 x i8], i16, i8*, i16 } | |
%IS_CC_interface = type { [251 x i8], [251 x i8], i16, i16 } | |
%IS_CTRL_interface = type { [251 x i8], i16, i8*, i16 } | |
%ISC_CTRL_interface = type { i8 } | |
%IS_HEX_interface = type { [251 x i8], i16, i8*, i16 } | |
%ISC_HEX_interface = type { i8 } | |
%IS_LOWER_interface = type { [251 x i8], i16, i8*, i16 } | |
%ISC_LOWER_interface = type { i8 } | |
%IS_NCC_interface = type { [251 x i8], [251 x i8], i16, i16 } | |
%IS_NUM_interface = type { [251 x i8], i16, i8*, i16 } | |
%IS_UPPER_interface = type { [251 x i8], i16, i8*, i16 } | |
%ISC_UPPER_interface = type { i8 } | |
%TO_LOWER_interface = type { i8 } | |
%MIRROR_interface = type { [251 x i8], [255 x i8]*, i8*, i16, i16 } | |
%REAL_TO_STRF_interface = type { float, i16, [2 x i8], float, i16 } | |
%DINT_TO_STRING_interface = type { i32 } | |
%REPLACE_ALL_interface = type { [251 x i8], [251 x i8], [251 x i8], i16, i16, i16 } | |
%REPLACE_CHARS_interface = type { [251 x i8], [81 x i8], [81 x i8], i16, i16, [2 x i8], i16 } | |
%REPLACE_UML_interface = type { [251 x i8], i16, i8*, i8*, i8*, i8*, i8*, [3 x i8], i16 } | |
%TO_UML_interface = type { i8 } | |
%TRIM1_interface = type { [251 x i8], i16 } | |
%TRIME_interface = type { [251 x i8] } | |
%UTC_TO_LTIME_interface = type { i64, i8, i16, i16 } | |
%DAY_OF_DATE_interface = type { i64 } | |
%DST_interface = type { i64, i16, i32, i32, i32 } | |
%DINT_TO_TOD_interface = type { i32 } | |
%TOD_TO_DINT_interface = type { i64 } | |
%WORK_WEEK_interface = type { i64, i64, i16, i32, i16, i16, i16, i16 } | |
%DATE_ADD_interface = type { i64, i16, i16, i16, i16, i16, i16, i16 } | |
%UDINT_TO_DATE_interface = type { i32 } | |
%DATE_TO_UDINT_interface = type { i64 } | |
%SET_DATE_interface = type { i16, i16, i16, i16 } | |
%BOOL_TO_INT_interface = type { i8 } | |
%LEAP_OF_DATE_interface = type { i64 } | |
%DWORD_TO_INT_interface = type { i32 } | |
%UDINT_TO_INT_interface = type { i32 } | |
%DAY_TO_TIME_interface = type { float } | |
%DAYS_DELTA_interface = type { i64, i64 } | |
%DAYS_IN_MONTH_interface = type { i64 } | |
%DAYS_IN_YEAR_interface = type { i64 } | |
%TIME_TO_INT_interface = type { i64 } | |
%DT2_TO_SDT_interface = type { i64, i64 } | |
%TOD_TO_DWORD_interface = type { i64 } | |
%DT_TO_SDT_interface = type { i64, i64, i32 } | |
%EASTER_interface = type { i16, i16, i16, i16 } | |
%HOUR_OF_DT_interface = type { i64 } | |
%HOUR_TO_TIME_interface = type { float } | |
%HOUR_TO_TOD_interface = type { float } | |
%DWORD_TO_TOD_interface = type { i32 } | |
%JD2000_interface = type { i64 } | |
%LEAP_DAY_interface = type { i64 } | |
%LEAP_YEAR_interface = type { i16 } | |
%LTIME_TO_UTC_interface = type { i64, i8, i16 } | |
%UDINT_TO_DT_interface = type { i32 } | |
%DT_TO_UDINT_interface = type { i64 } | |
%MINUTE_OF_DT_interface = type { i64 } | |
%MINUTE_TO_TIME_interface = type { float } | |
%MONTH_BEGIN_interface = type { i64 } | |
%DWORD_TO_DATE_interface = type { i32 } | |
%MONTH_END_interface = type { i64 } | |
%PERIOD_interface = type { i64, i64, i64, i16, i16, i16 } | |
%PERIOD2_interface = type { [8 x i64], i64 } | |
%REFRACTION_interface = type { float } | |
%SDT_TO_DATE_interface = type { %SDT } | |
%SDT_TO_DT_interface = type { %SDT } | |
%SDT_TO_TOD_interface = type { %SDT } | |
%SECOND_OF_DT_interface = type { i64 } | |
%SECOND_TO_TIME_interface = type { float } | |
%SET_TOD_interface = type { i16, i16, float } | |
%SUN_MIDDAY_interface = type { float, i64, float, float } | |
%ASIN_interface = type { double } | |
%TIMECHECK_interface = type { i64, i64, i64 } | |
%YEAR_BEGIN_interface = type { i16 } | |
%YEAR_END_interface = type { i16 } | |
%ADR_interface = type { i64 } | |
%BOOL_TO_DATE_interface = type { i8 } | |
%BOOL_TO_DINT_interface = type { i8 } | |
%BOOL_TO_DT_interface = type { i8 } | |
%BOOL_TO_LREAL_interface = type { i8 } | |
%BOOL_TO_REAL_interface = type { i8 } | |
%BOOL_TO_SINT_interface = type { i8 } | |
%BOOL_TO_STRING_interface = type { i8 } | |
%BOOL_TO_TIME_interface = type { i8 } | |
%BOOL_TO_TOD_interface = type { i8 } | |
%BOOL_TO_UDINT_interface = type { i8 } | |
%BOOL_TO_USINT_interface = type { i8 } | |
%BOOL_TO_WORD_interface = type { i8 } | |
%BYTE_TO_BOOL_interface = type { i8 } | |
%BYTE_TO_DATE_interface = type { i8 } | |
%BYTE_TO_DINT_interface = type { i8 } | |
%BYTE_TO_DT_interface = type { i8 } | |
%BYTE_TO_INT_interface = type { i8 } | |
%BYTE_TO_LREAL_interface = type { i8 } | |
%BYTE_TO_SINT_interface = type { i8 } | |
%BYTE_TO_STRING_interface = type { i8 } | |
%BYTE_TO_TIME_interface = type { i8 } | |
%BYTE_TO_TOD_interface = type { i8 } | |
%BYTE_TO_UDINT_interface = type { i8 } | |
%BYTE_TO_UINT_interface = type { i8 } | |
%BYTE_TO_USINT_interface = type { i8 } | |
%DATE_TO_BOOL_interface = type { i64 } | |
%DATE_TO_BYTE_interface = type { i64 } | |
%DATE_TO_DINT_interface = type { i64 } | |
%DATE_TO_DT_interface = type { i64 } | |
%DATE_TO_INT_interface = type { i64 } | |
%DATE_TO_LREAL_interface = type { i64 } | |
%DATE_TO_REAL_interface = type { i64 } | |
%DATE_TO_SINT_interface = type { i64 } | |
%DATE_TO_STRING_interface = type { i64 } | |
%DATE_TO_TIME_interface = type { i64 } | |
%DATE_TO_TOD_interface = type { i64 } | |
%DATE_TO_UINT_interface = type { i64 } | |
%DATE_TO_USINT_interface = type { i64 } | |
%DATE_TO_WORD_interface = type { i64 } | |
%DINT_TO_BOOL_interface = type { i32 } | |
%DINT_TO_BYTE_interface = type { i32 } | |
%DINT_TO_DATE_interface = type { i32 } | |
%DINT_TO_DT_interface = type { i32 } | |
%DINT_TO_DWORD_interface = type { i32 } | |
%DINT_TO_LREAL_interface = type { i32 } | |
%DINT_TO_SINT_interface = type { i32 } | |
%DINT_TO_TIME_interface = type { i32 } | |
%DINT_TO_UDINT_interface = type { i32 } | |
%DINT_TO_UINT_interface = type { i32 } | |
%DINT_TO_USINT_interface = type { i32 } | |
%DT_TO_BOOL_interface = type { i64 } | |
%DT_TO_BYTE_interface = type { i64 } | |
%DT_TO_DINT_interface = type { i64 } | |
%DT_TO_INT_interface = type { i64 } | |
%DT_TO_LREAL_interface = type { i64 } | |
%DT_TO_REAL_interface = type { i64 } | |
%DT_TO_SINT_interface = type { i64 } | |
%DT_TO_STRING_interface = type { i64 } | |
%DT_TO_TIME_interface = type { i64 } | |
%DT_TO_UINT_interface = type { i64 } | |
%DT_TO_USINT_interface = type { i64 } | |
%DT_TO_WORD_interface = type { i64 } | |
%DWORD_TO_BOOL_interface = type { i32 } | |
%DWORD_TO_LREAL_interface = type { i32 } | |
%DWORD_TO_SINT_interface = type { i32 } | |
%DWORD_TO_UDINT_interface = type { i32 } | |
%DWORD_TO_UINT_interface = type { i32 } | |
%DWORD_TO_USINT_interface = type { i32 } | |
%INT_TO_BOOL_interface = type { i16 } | |
%INT_TO_DATE_interface = type { i16 } | |
%INT_TO_DT_interface = type { i16 } | |
%INT_TO_LREAL_interface = type { i16 } | |
%INT_TO_SINT_interface = type { i16 } | |
%INT_TO_TIME_interface = type { i16 } | |
%INT_TO_TOD_interface = type { i16 } | |
%INT_TO_UINT_interface = type { i16 } | |
%INT_TO_USINT_interface = type { i16 } | |
%INT_TO_WORD_interface = type { i16 } | |
%LREAL_TO_BOOL_interface = type { double } | |
%LREAL_TO_BYTE_interface = type { double } | |
%LREAL_TO_DATE_interface = type { double } | |
%LREAL_TO_DINT_interface = type { double } | |
%LREAL_TO_DT_interface = type { double } | |
%LREAL_TO_DWORD_interface = type { double } | |
%LREAL_TO_INT_interface = type { double } | |
%LREAL_TO_REAL_interface = type { double } | |
%LREAL_TO_SINT_interface = type { double } | |
%LREAL_TO_STRING_interface = type { double } | |
%LREAL_TO_TIME_interface = type { double } | |
%LREAL_TO_TOD_interface = type { double } | |
%LREAL_TO_UDINT_interface = type { double } | |
%LREAL_TO_UINT_interface = type { double } | |
%LREAL_TO_USINT_interface = type { double } | |
%LREAL_TO_WORD_interface = type { double } | |
%MOVE_interface = type { i64 } | |
%MUX_interface = type { i32, i64 } | |
%REAL_TO_BOOL_interface = type { float } | |
%REAL_TO_BYTE_interface = type { float } | |
%REAL_TO_DATE_interface = type { float } | |
%REAL_TO_DT_interface = type { float } | |
%REAL_TO_LREAL_interface = type { float } | |
%REAL_TO_SINT_interface = type { float } | |
%REAL_TO_TOD_interface = type { float } | |
%REAL_TO_UDINT_interface = type { float } | |
%REAL_TO_UINT_interface = type { float } | |
%REAL_TO_USINT_interface = type { float } | |
%REAL_TO_WORD_interface = type { float } | |
%SINT_TO_BOOL_interface = type { i8 } | |
%SINT_TO_BYTE_interface = type { i8 } | |
%SINT_TO_DATE_interface = type { i8 } | |
%SINT_TO_DINT_interface = type { i8 } | |
%SINT_TO_DT_interface = type { i8 } | |
%SINT_TO_DWORD_interface = type { i8 } | |
%SINT_TO_INT_interface = type { i8 } | |
%SINT_TO_LREAL_interface = type { i8 } | |
%SINT_TO_REAL_interface = type { i8 } | |
%SINT_TO_STRING_interface = type { i8 } | |
%SINT_TO_TIME_interface = type { i8 } | |
%SINT_TO_TOD_interface = type { i8 } | |
%SINT_TO_UDINT_interface = type { i8 } | |
%SINT_TO_UINT_interface = type { i8 } | |
%SINT_TO_USINT_interface = type { i8 } | |
%SINT_TO_WORD_interface = type { i8 } | |
%STRING_TO_BOOL_interface = type { [81 x i8] } | |
%STRING_TO_BYTE_interface = type { [81 x i8] } | |
%STRING_TO_DATE_interface = type { [81 x i8] } | |
%STRING_TO_DINT_interface = type { [81 x i8] } | |
%STRING_TO_DT_interface = type { [81 x i8] } | |
%STRING_TO_DWORD_interface = type { [81 x i8] } | |
%STRING_TO_LREAL_interface = type { [81 x i8] } | |
%STRING_TO_SINT_interface = type { [81 x i8] } | |
%STRING_TO_TIME_interface = type { [81 x i8] } | |
%STRING_TO_TOD_interface = type { [81 x i8] } | |
%STRING_TO_UDINT_interface = type { [81 x i8] } | |
%STRING_TO_UINT_interface = type { [81 x i8] } | |
%STRING_TO_USINT_interface = type { [81 x i8] } | |
%STRING_TO_WORD_interface = type { [81 x i8] } | |
%TIME_TO_BOOL_interface = type { i64 } | |
%TIME_TO_BYTE_interface = type { i64 } | |
%TIME_TO_DATE_interface = type { i64 } | |
%TIME_TO_DT_interface = type { i64 } | |
%TIME_TO_LREAL_interface = type { i64 } | |
%TIME_TO_SINT_interface = type { i64 } | |
%TIME_TO_STRING_interface = type { i64 } | |
%TIME_TO_TOD_interface = type { i64 } | |
%TIME_TO_UDINT_interface = type { i64 } | |
%TIME_TO_UINT_interface = type { i64 } | |
%TIME_TO_USINT_interface = type { i64 } | |
%TIME_TO_WORD_interface = type { i64 } | |
%TOD_TO_BOOL_interface = type { i64 } | |
%TOD_TO_BYTE_interface = type { i64 } | |
%TOD_TO_DATE_interface = type { i64 } | |
%TOD_TO_DT_interface = type { i64 } | |
%TOD_TO_INT_interface = type { i64 } | |
%TOD_TO_LREAL_interface = type { i64 } | |
%TOD_TO_REAL_interface = type { i64 } | |
%TOD_TO_SINT_interface = type { i64 } | |
%TOD_TO_STRING_interface = type { i64 } | |
%TOD_TO_TIME_interface = type { i64 } | |
%TOD_TO_UDINT_interface = type { i64 } | |
%TOD_TO_UINT_interface = type { i64 } | |
%TOD_TO_USINT_interface = type { i64 } | |
%TOD_TO_WORD_interface = type { i64 } | |
%TOLOWERCASE_interface = type { [1024 x i8] } | |
%TOUPPERCASE_interface = type { [1024 x i8] } | |
%UDINT_TO_BOOL_interface = type { i32 } | |
%UDINT_TO_BYTE_interface = type { i32 } | |
%UDINT_TO_DINT_interface = type { i32 } | |
%UDINT_TO_DWORD_interface = type { i32 } | |
%UDINT_TO_LREAL_interface = type { i32 } | |
%UDINT_TO_SINT_interface = type { i32 } | |
%UDINT_TO_STRING_interface = type { i32 } | |
%UDINT_TO_TIME_interface = type { i32 } | |
%UDINT_TO_TOD_interface = type { i32 } | |
%UDINT_TO_UINT_interface = type { i32 } | |
%UDINT_TO_USINT_interface = type { i32 } | |
%UDINT_TO_WORD_interface = type { i32 } | |
%UINT_TO_BOOL_interface = type { i16 } | |
%UINT_TO_BYTE_interface = type { i16 } | |
%UINT_TO_DATE_interface = type { i16 } | |
%UINT_TO_DINT_interface = type { i16 } | |
%UINT_TO_DT_interface = type { i16 } | |
%UINT_TO_DWORD_interface = type { i16 } | |
%UINT_TO_LREAL_interface = type { i16 } | |
%UINT_TO_SINT_interface = type { i16 } | |
%UINT_TO_STRING_interface = type { i16 } | |
%UINT_TO_TIME_interface = type { i16 } | |
%UINT_TO_TOD_interface = type { i16 } | |
%UINT_TO_UDINT_interface = type { i16 } | |
%UINT_TO_USINT_interface = type { i16 } | |
%UINT_TO_WORD_interface = type { i16 } | |
%USINT_TO_BOOL_interface = type { i8 } | |
%USINT_TO_BYTE_interface = type { i8 } | |
%USINT_TO_DATE_interface = type { i8 } | |
%USINT_TO_DINT_interface = type { i8 } | |
%USINT_TO_DT_interface = type { i8 } | |
%USINT_TO_DWORD_interface = type { i8 } | |
%USINT_TO_INT_interface = type { i8 } | |
%USINT_TO_LREAL_interface = type { i8 } | |
%USINT_TO_REAL_interface = type { i8 } | |
%USINT_TO_SINT_interface = type { i8 } | |
%USINT_TO_STRING_interface = type { i8 } | |
%USINT_TO_TIME_interface = type { i8 } | |
%USINT_TO_TOD_interface = type { i8 } | |
%USINT_TO_UDINT_interface = type { i8 } | |
%USINT_TO_UINT_interface = type { i8 } | |
%USINT_TO_WORD_interface = type { i8 } | |
%WORD_TO_BOOL_interface = type { i16 } | |
%WORD_TO_BYTE_interface = type { i16 } | |
%WORD_TO_DATE_interface = type { i16 } | |
%WORD_TO_DT_interface = type { i16 } | |
%WORD_TO_INT_interface = type { i16 } | |
%WORD_TO_LREAL_interface = type { i16 } | |
%WORD_TO_SINT_interface = type { i16 } | |
%WORD_TO_STRING_interface = type { i16 } | |
%WORD_TO_TIME_interface = type { i16 } | |
%WORD_TO_TOD_interface = type { i16 } | |
%WORD_TO_UDINT_interface = type { i16 } | |
%WORD_TO_UINT_interface = type { i16 } | |
%WORD_TO_USINT_interface = type { i16 } | |
@STRING_LENGTH = unnamed_addr constant i16 250 | |
@LIST_LENGTH = unnamed_addr constant i16 250 | |
@MATH = global %CONSTANTS_MATH { float 0x400921FB60000000, float 0x401921FB60000000, float 0x402921FB60000000, float 0x3FF921FB60000000, float 0x3FE921FB60000000, float 0x3FD45F3060000000, float 0x4005BF0A80000000, float 0x3FD78B5640000000, float 0x3FF6A09E60000000, [13 x i32] [i32 1, i32 1, i32 2, i32 6, i32 24, i32 120, i32 720, i32 5040, i32 40320, i32 362880, i32 3628800, i32 39916800, i32 479001600] } | |
@PHYS = global %CONSTANTS_PHYS { float 0x41B1DE7840000000, float 0x3C07A4DA00000000, float 0x40239D0140000000, float 0xC071126660000000, float 0x4020A10280000000, float 1.013250e+05 } | |
@LANGUAGE = global %CONSTANTS_LANGUAGE { i16 1, i16 3, [21 x [11 x i8]] [[11 x i8] c"Monday\00\00\00\00\00", [11 x i8] c"Tuesday\00\00\00\00", [11 x i8] c"Wednesday\00\00", [11 x i8] c"Thursday\00\00\00", [11 x i8] c"Friday\00\00\00\00\00", [11 x i8] c"Saturday\00\00\00", [11 x i8] c"Sunday\00\00\00\00\00", [11 x i8] c"Montag\00\00\00\00\00", [11 x i8] c"Dienstag\00\00\00", [11 x i8] c"Mittwoch\00\00\00", [11 x i8] c"Donnerstag\00", [11 x i8] c"Freitag\00\00\00\00", [11 x i8] c"Samstag\00\00\00\00", [11 x i8] c"Sonntag\00\00\00\00", [11 x i8] c"Lundi\00\00\00\00\00\00", [11 x i8] c"Mardi\00\00\00\00\00\00", [11 x i8] c"Mercredi\00\00\00", [11 x i8] c"Jeudi\00\00\00\00\00\00", [11 x i8] c"Vendredi\00\00\00", [11 x i8] c"Samedi\00\00\00\00\00", [11 x i8] c"Dimanche\00\00\00"], [21 x [3 x i8]] [[3 x i8] c"Mo\00", [3 x i8] c"Tu\00", [3 x i8] c"We\00", [3 x i8] c"Th\00", [3 x i8] c"Fr\00", [3 x i8] c"Sa\00", [3 x i8] c"Su\00", [3 x i8] c"Mo\00", [3 x i8] c"Di\00", [3 x i8] c"Mi\00", [3 x i8] c"Do\00", [3 x i8] c"Fr\00", [3 x i8] c"Sa\00", [3 x i8] c"So\00", [3 x i8] c"Lu\00", [3 x i8] c"Ma\00", [3 x i8] c"Me\00", [3 x i8] c"Je\00", [3 x i8] c"Ve\00", [3 x i8] c"Sa\00", [3 x i8] c"Di\00"], [36 x [11 x i8]] [[11 x i8] c"January\00\00\00\00", [11 x i8] c"February\00\00\00", [11 x i8] c"March\00\00\00\00\00\00", [11 x i8] c"April\00\00\00\00\00\00", [11 x i8] c"May\00\00\00\00\00\00\00\00", [11 x i8] c"June\00\00\00\00\00\00\00", [11 x i8] c"July\00\00\00\00\00\00\00", [11 x i8] c"August\00\00\00\00\00", [11 x i8] c"September\00\00", [11 x i8] c"October\00\00\00\00", [11 x i8] c"November\00\00\00", [11 x i8] c"December\00\00\00", [11 x i8] c"Januar\00\00\00\00\00", [11 x i8] c"Februar\00\00\00\00", [11 x i8] c"M\EF\BF\BDrz\00\00\00\00\00", [11 x i8] c"April\00\00\00\00\00\00", [11 x i8] c"Mai\00\00\00\00\00\00\00\00", [11 x i8] c"Juni\00\00\00\00\00\00\00", [11 x i8] c"Juli\00\00\00\00\00\00\00", [11 x i8] c"August\00\00\00\00\00", [11 x i8] c"September\00\00", [11 x i8] c"Oktober\00\00\00\00", [11 x i8] c"November\00\00\00", [11 x i8] c"Dezember\00\00\00", [11 x i8] c"Janvier\00\00\00\00", [11 x i8] c"F\EF\BF\BDvrier\00\00", [11 x i8] c"mars\00\00\00\00\00\00\00", [11 x i8] c"Avril\00\00\00\00\00\00", [11 x i8] c"Mai\00\00\00\00\00\00\00\00", [11 x i8] c"Juin\00\00\00\00\00\00\00", [11 x i8] c"Juillet\00\00\00\00", [11 x i8] c"Ao\EF\BF\BDt\00\00\00\00\00", [11 x i8] c"Septembre\00\00", [11 x i8] c"Octobre\00\00\00\00", [11 x i8] c"Novembre\00\00\00", [11 x i8] c"Decembre\00\00\00"], [36 x [4 x i8]] [[4 x i8] c"Jan\00", [4 x i8] c"Feb\00", [4 x i8] c"Mar\00", [4 x i8] c"Apr\00", [4 x i8] c"May\00", [4 x i8] c"Jun\00", [4 x i8] c"Jul\00", [4 x i8] c"Aug\00", [4 x i8] c"Sep\00", [4 x i8] c"Oct\00", [4 x i8] c"Nov\00", [4 x i8] c"Dec\00", [4 x i8] c"Jan\00", [4 x i8] c"Feb\00", [4 x i8] c"Mrz\00", [4 x i8] c"Apr\00", [4 x i8] c"Mai\00", [4 x i8] c"Jun\00", [4 x i8] c"Jul\00", [4 x i8] c"Aug\00", [4 x i8] c"Sep\00", [4 x i8] c"Okt\00", [4 x i8] c"Nov\00", [4 x i8] c"Dez\00", [4 x i8] c"Jan\00", [4 x i8] c"Fev\00", [4 x i8] c"Mar\00", [4 x i8] c"Avr\00", [4 x i8] c"Mai\00", [4 x i8] c"Jun\00", [4 x i8] c"Jul\00", [4 x i8] c"Aou\00", [4 x i8] c"Sep\00", [4 x i8] c"Oct\00", [4 x i8] c"Nov\00", [4 x i8] c"Dec\00"], [48 x [4 x i8]] [[4 x i8] c"N\00\00\00", [4 x i8] c"NNE\00", [4 x i8] c"NE\00\00", [4 x i8] c"ENE\00", [4 x i8] c"E\00\00\00", [4 x i8] c"ESE\00", [4 x i8] c"SE\00\00", [4 x i8] c"SSE\00", [4 x i8] c"S\00\00\00", [4 x i8] c"SSW\00", [4 x i8] c"SW\00\00", [4 x i8] c"WSW\00", [4 x i8] c"W\00\00\00", [4 x i8] c"WNW\00", [4 x i8] c"NW\00\00", [4 x i8] c"NNW\00", [4 x i8] c"N\00\00\00", [4 x i8] c"NNO\00", [4 x i8] c"NO\00\00", [4 x i8] c"ONO\00", [4 x i8] c"O\00\00\00", [4 x i8] c"OSO\00", [4 x i8] c"SO\00\00", [4 x i8] c"SSO\00", [4 x i8] c"S\00\00\00", [4 x i8] c"SSW\00", [4 x i8] c"SW\00\00", [4 x i8] c"WSW\00", [4 x i8] c"W\00\00\00", [4 x i8] c"WNW\00", [4 x i8] c"NW\00\00", [4 x i8] c"NNW\00", [4 x i8] c"N\00\00\00", [4 x i8] c"NNO\00", [4 x i8] c"NO\00\00", [4 x i8] c"ONO\00", [4 x i8] c"O\00\00\00", [4 x i8] c"OSO\00", [4 x i8] c"SO\00\00", [4 x i8] c"SSO\00", [4 x i8] c"S\00\00\00", [4 x i8] c"SSW\00", [4 x i8] c"SW\00\00", [4 x i8] c"WSW\00", [4 x i8] c"W\00\00\00", [4 x i8] c"WNW\00", [4 x i8] c"NW\00\00", [4 x i8] c"NNW\00"] } | |
@SETUP = global %CONSTANTS_SETUP { i8 1, [4 x [254 x i8]] [[254 x i8] c";\22"&&<<>>\EF\BF\BD€\EF\BF\BD \EF\BF\BD¡\EF\BF\BD¢\EF\BF\BD£\EF\BF\BD¤\EF\BF\BD¥\EF\BF\BD¦\EF\BF\BD§\EF\BF\BD¨\EF\BF\BD©\EF\BF\BDª\EF\BF\BD«\EF\BF\BD¬\EF\BF\BD­\EF\BF\BD®\EF\BF\BD¯\EF\BF\BD°\EF\BF\BD±\EF\BF\BD²\EF\BF\BD³\EF\BF\BD´\EF\BF\BDµ\EF\BF\BD¶\EF\BF\BD&midd\00", [254 x i8] c";\EF\BF\BD¾\EF\BF\BD¿\EF\BF\BDÀ\EF\BF\BDÁ\EF\BF\BDÂ\EF\BF\BDÃ\EF\BF\BDÄ\EF\BF\BDÅ\EF\BF\BDÆ\EF\BF\BDÇ\EF\BF\BDÈ\EF\BF\BDÉ\EF\BF\BDÊ\EF\BF\BDË\EF\BF\BDÌ\EF\BF\BDÍ\EF\BF\BDÎ\EF\BF\BDÏ\EF\BF\BDÐ\EF\BF\BDÑ\EF\BF\BDÒ\EF\BF\BDÓ\EF\BF\BDÔ\EF\BF\BDÕ\EF\BF\BD\00", [254 x i8] c";\EF\BF\BDÜ\EF\BF\BDÝ\EF\BF\BDÞ\EF\BF\BDß\EF\BF\BDà\EF\BF\BDá\EF\BF\BDâ\EF\BF\BDã\EF\BF\BDä\EF\BF\BDå\EF\BF\BDæ\EF\BF\BDç\EF\BF\BDè\EF\BF\BDé\EF\BF\BDê\EF\BF\BDë\EF\BF\BDì\EF\BF\BDí\EF\BF\BDî\EF\BF\BDï\EF\BF\BDð\EF\BF\BDñ\EF\BF\BDò\EF\BF\BDó\EF\BF\BD&oc\00", [254 x i8] c";\EF\BF\BDú\EF\BF\BDû\EF\BF\BDü\EF\BF\BDý\EF\BF\BDþ\EF\BF\BDÿ\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00"], [12 x i16] [i16 0, i16 31, i16 59, i16 90, i16 120, i16 151, i16 181, i16 212, i16 243, i16 273, i16 304, i16 334], [9 x float] [float 1.000000e+00, float 1.000000e+01, float 1.000000e+02, float 1.000000e+03, float 1.000000e+04, float 1.000000e+04, float 1.000000e+05, float 1.000000e+06, float 1.000000e+07] } | |
@LOCATION = global %CONSTANTS_LOCATION { i16 1, i16 5, [5 x i16] [i16 2, i16 2, i16 3, i16 2, i16 2] } | |
@CALENDAR__init = unnamed_addr constant %CALENDAR zeroinitializer | |
@COMPLEX__init = unnamed_addr constant %COMPLEX zeroinitializer | |
@CONSTANTS_LANGUAGE__init = unnamed_addr constant %CONSTANTS_LANGUAGE { i16 1, i16 3, [21 x [11 x i8]] [[11 x i8] c"Monday\00\00\00\00\00", [11 x i8] c"Tuesday\00\00\00\00", [11 x i8] c"Wednesday\00\00", [11 x i8] c"Thursday\00\00\00", [11 x i8] c"Friday\00\00\00\00\00", [11 x i8] c"Saturday\00\00\00", [11 x i8] c"Sunday\00\00\00\00\00", [11 x i8] c"Montag\00\00\00\00\00", [11 x i8] c"Dienstag\00\00\00", [11 x i8] c"Mittwoch\00\00\00", [11 x i8] c"Donnerstag\00", [11 x i8] c"Freitag\00\00\00\00", [11 x i8] c"Samstag\00\00\00\00", [11 x i8] c"Sonntag\00\00\00\00", [11 x i8] c"Lundi\00\00\00\00\00\00", [11 x i8] c"Mardi\00\00\00\00\00\00", [11 x i8] c"Mercredi\00\00\00", [11 x i8] c"Jeudi\00\00\00\00\00\00", [11 x i8] c"Vendredi\00\00\00", [11 x i8] c"Samedi\00\00\00\00\00", [11 x i8] c"Dimanche\00\00\00"], [21 x [3 x i8]] [[3 x i8] c"Mo\00", [3 x i8] c"Tu\00", [3 x i8] c"We\00", [3 x i8] c"Th\00", [3 x i8] c"Fr\00", [3 x i8] c"Sa\00", [3 x i8] c"Su\00", [3 x i8] c"Mo\00", [3 x i8] c"Di\00", [3 x i8] c"Mi\00", [3 x i8] c"Do\00", [3 x i8] c"Fr\00", [3 x i8] c"Sa\00", [3 x i8] c"So\00", [3 x i8] c"Lu\00", [3 x i8] c"Ma\00", [3 x i8] c"Me\00", [3 x i8] c"Je\00", [3 x i8] c"Ve\00", [3 x i8] c"Sa\00", [3 x i8] c"Di\00"], [36 x [11 x i8]] [[11 x i8] c"January\00\00\00\00", [11 x i8] c"February\00\00\00", [11 x i8] c"March\00\00\00\00\00\00", [11 x i8] c"April\00\00\00\00\00\00", [11 x i8] c"May\00\00\00\00\00\00\00\00", [11 x i8] c"June\00\00\00\00\00\00\00", [11 x i8] c"July\00\00\00\00\00\00\00", [11 x i8] c"August\00\00\00\00\00", [11 x i8] c"September\00\00", [11 x i8] c"October\00\00\00\00", [11 x i8] c"November\00\00\00", [11 x i8] c"December\00\00\00", [11 x i8] c"Januar\00\00\00\00\00", [11 x i8] c"Februar\00\00\00\00", [11 x i8] c"M\EF\BF\BDrz\00\00\00\00\00", [11 x i8] c"April\00\00\00\00\00\00", [11 x i8] c"Mai\00\00\00\00\00\00\00\00", [11 x i8] c"Juni\00\00\00\00\00\00\00", [11 x i8] c"Juli\00\00\00\00\00\00\00", [11 x i8] c"August\00\00\00\00\00", [11 x i8] c"September\00\00", [11 x i8] c"Oktober\00\00\00\00", [11 x i8] c"November\00\00\00", [11 x i8] c"Dezember\00\00\00", [11 x i8] c"Janvier\00\00\00\00", [11 x i8] c"F\EF\BF\BDvrier\00\00", [11 x i8] c"mars\00\00\00\00\00\00\00", [11 x i8] c"Avril\00\00\00\00\00\00", [11 x i8] c"Mai\00\00\00\00\00\00\00\00", [11 x i8] c"Juin\00\00\00\00\00\00\00", [11 x i8] c"Juillet\00\00\00\00", [11 x i8] c"Ao\EF\BF\BDt\00\00\00\00\00", [11 x i8] c"Septembre\00\00", [11 x i8] c"Octobre\00\00\00\00", [11 x i8] c"Novembre\00\00\00", [11 x i8] c"Decembre\00\00\00"], [36 x [4 x i8]] [[4 x i8] c"Jan\00", [4 x i8] c"Feb\00", [4 x i8] c"Mar\00", [4 x i8] c"Apr\00", [4 x i8] c"May\00", [4 x i8] c"Jun\00", [4 x i8] c"Jul\00", [4 x i8] c"Aug\00", [4 x i8] c"Sep\00", [4 x i8] c"Oct\00", [4 x i8] c"Nov\00", [4 x i8] c"Dec\00", [4 x i8] c"Jan\00", [4 x i8] c"Feb\00", [4 x i8] c"Mrz\00", [4 x i8] c"Apr\00", [4 x i8] c"Mai\00", [4 x i8] c"Jun\00", [4 x i8] c"Jul\00", [4 x i8] c"Aug\00", [4 x i8] c"Sep\00", [4 x i8] c"Okt\00", [4 x i8] c"Nov\00", [4 x i8] c"Dez\00", [4 x i8] c"Jan\00", [4 x i8] c"Fev\00", [4 x i8] c"Mar\00", [4 x i8] c"Avr\00", [4 x i8] c"Mai\00", [4 x i8] c"Jun\00", [4 x i8] c"Jul\00", [4 x i8] c"Aou\00", [4 x i8] c"Sep\00", [4 x i8] c"Oct\00", [4 x i8] c"Nov\00", [4 x i8] c"Dec\00"], [48 x [4 x i8]] [[4 x i8] c"N\00\00\00", [4 x i8] c"NNE\00", [4 x i8] c"NE\00\00", [4 x i8] c"ENE\00", [4 x i8] c"E\00\00\00", [4 x i8] c"ESE\00", [4 x i8] c"SE\00\00", [4 x i8] c"SSE\00", [4 x i8] c"S\00\00\00", [4 x i8] c"SSW\00", [4 x i8] c"SW\00\00", [4 x i8] c"WSW\00", [4 x i8] c"W\00\00\00", [4 x i8] c"WNW\00", [4 x i8] c"NW\00\00", [4 x i8] c"NNW\00", [4 x i8] c"N\00\00\00", [4 x i8] c"NNO\00", [4 x i8] c"NO\00\00", [4 x i8] c"ONO\00", [4 x i8] c"O\00\00\00", [4 x i8] c"OSO\00", [4 x i8] c"SO\00\00", [4 x i8] c"SSO\00", [4 x i8] c"S\00\00\00", [4 x i8] c"SSW\00", [4 x i8] c"SW\00\00", [4 x i8] c"WSW\00", [4 x i8] c"W\00\00\00", [4 x i8] c"WNW\00", [4 x i8] c"NW\00\00", [4 x i8] c"NNW\00", [4 x i8] c"N\00\00\00", [4 x i8] c"NNO\00", [4 x i8] c"NO\00\00", [4 x i8] c"ONO\00", [4 x i8] c"O\00\00\00", [4 x i8] c"OSO\00", [4 x i8] c"SO\00\00", [4 x i8] c"SSO\00", [4 x i8] c"S\00\00\00", [4 x i8] c"SSW\00", [4 x i8] c"SW\00\00", [4 x i8] c"WSW\00", [4 x i8] c"W\00\00\00", [4 x i8] c"WNW\00", [4 x i8] c"NW\00\00", [4 x i8] c"NNW\00"] } | |
@CONSTANTS_LOCATION__init = unnamed_addr constant %CONSTANTS_LOCATION { i16 1, i16 5, [5 x i16] [i16 2, i16 2, i16 3, i16 2, i16 2] } | |
@CONSTANTS_MATH__init = unnamed_addr constant %CONSTANTS_MATH { float 0x400921FB60000000, float 0x401921FB60000000, float 0x402921FB60000000, float 0x3FF921FB60000000, float 0x3FE921FB60000000, float 0x3FD45F3060000000, float 0x4005BF0A80000000, float 0x3FD78B5640000000, float 0x3FF6A09E60000000, [13 x i32] [i32 1, i32 1, i32 2, i32 6, i32 24, i32 120, i32 720, i32 5040, i32 40320, i32 362880, i32 3628800, i32 39916800, i32 479001600] } | |
@CONSTANTS_PHYS__init = unnamed_addr constant %CONSTANTS_PHYS { float 0x41B1DE7840000000, float 0x3C07A4DA00000000, float 0x40239D0140000000, float 0xC071126660000000, float 0x4020A10280000000, float 1.013250e+05 } | |
@CONSTANTS_SETUP__init = unnamed_addr constant %CONSTANTS_SETUP { i8 1, [4 x [254 x i8]] [[254 x i8] c";\22"&&<<>>\EF\BF\BD€\EF\BF\BD \EF\BF\BD¡\EF\BF\BD¢\EF\BF\BD£\EF\BF\BD¤\EF\BF\BD¥\EF\BF\BD¦\EF\BF\BD§\EF\BF\BD¨\EF\BF\BD©\EF\BF\BDª\EF\BF\BD«\EF\BF\BD¬\EF\BF\BD­\EF\BF\BD®\EF\BF\BD¯\EF\BF\BD°\EF\BF\BD±\EF\BF\BD²\EF\BF\BD³\EF\BF\BD´\EF\BF\BDµ\EF\BF\BD¶\EF\BF\BD&midd\00", [254 x i8] c";\EF\BF\BD¾\EF\BF\BD¿\EF\BF\BDÀ\EF\BF\BDÁ\EF\BF\BDÂ\EF\BF\BDÃ\EF\BF\BDÄ\EF\BF\BDÅ\EF\BF\BDÆ\EF\BF\BDÇ\EF\BF\BDÈ\EF\BF\BDÉ\EF\BF\BDÊ\EF\BF\BDË\EF\BF\BDÌ\EF\BF\BDÍ\EF\BF\BDÎ\EF\BF\BDÏ\EF\BF\BDÐ\EF\BF\BDÑ\EF\BF\BDÒ\EF\BF\BDÓ\EF\BF\BDÔ\EF\BF\BDÕ\EF\BF\BD\00", [254 x i8] c";\EF\BF\BDÜ\EF\BF\BDÝ\EF\BF\BDÞ\EF\BF\BDß\EF\BF\BDà\EF\BF\BDá\EF\BF\BDâ\EF\BF\BDã\EF\BF\BDä\EF\BF\BDå\EF\BF\BDæ\EF\BF\BDç\EF\BF\BDè\EF\BF\BDé\EF\BF\BDê\EF\BF\BDë\EF\BF\BDì\EF\BF\BDí\EF\BF\BDî\EF\BF\BDï\EF\BF\BDð\EF\BF\BDñ\EF\BF\BDò\EF\BF\BDó\EF\BF\BD&oc\00", [254 x i8] c";\EF\BF\BDú\EF\BF\BDû\EF\BF\BDü\EF\BF\BDý\EF\BF\BDþ\EF\BF\BDÿ\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00"], [12 x i16] [i16 0, i16 31, i16 59, i16 90, i16 120, i16 151, i16 181, i16 212, i16 243, i16 273, i16 304, i16 334], [9 x float] [float 1.000000e+00, float 1.000000e+01, float 1.000000e+02, float 1.000000e+03, float 1.000000e+04, float 1.000000e+04, float 1.000000e+05, float 1.000000e+06, float 1.000000e+07] } | |
@ESR_DATA__init = unnamed_addr constant %ESR_DATA zeroinitializer | |
@FRACTION__init = unnamed_addr constant %FRACTION zeroinitializer | |
@HOLIDAY_DATA__init = unnamed_addr constant %HOLIDAY_DATA zeroinitializer | |
@REAL2__init = unnamed_addr constant %REAL2 zeroinitializer | |
@SDT__init = unnamed_addr constant %SDT zeroinitializer | |
@TIMER_EVENT__init = unnamed_addr constant %TIMER_EVENT zeroinitializer | |
@VECTOR_3__init = unnamed_addr constant %VECTOR_3 zeroinitializer | |
@DRIVER_1__init = unnamed_addr constant %DRIVER_1_interface zeroinitializer | |
@DRIVER_4__init = unnamed_addr constant %DRIVER_4_interface zeroinitializer | |
@DRIVER_4C__init = unnamed_addr constant %DRIVER_4C_interface { i8 0, i8 0, i64 0, [7 x i8] c"\01\03\07\0F\00\00\00", i16 0, i8 0, i8 0, i8 0, i8 0, %TON_interface zeroinitializer, i8 0 } | |
@FLOW_CONTROL__init = unnamed_addr constant %FLOW_CONTROL_interface { i8 0, i8 0, i8 0, i8 0, i64 3600000000000, i64 82800000000000, i8 0, i8 0, %TP_1D_interface zeroinitializer } | |
@FT_Profile__init = unnamed_addr constant %FT_Profile_interface { float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, i8 0, float 0.000000e+00, i64 0, float 0.000000e+00, i64 0, float 0.000000e+00, i64 0, float 0.000000e+00, i64 0, float 0.000000e+00, i64 0, float 0.000000e+00, i64 0, float 0.000000e+00, i64 0, float 0.000000e+00, float 0.000000e+00, i8 0, i64 0, i64 0, i8 0, i8 0, i64 0, i64 0, i64 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 } | |
@INC_DEC__init = unnamed_addr constant %INC_DEC_interface zeroinitializer | |
@INTERLOCK__init = unnamed_addr constant %INTERLOCK_interface zeroinitializer | |
@INTERLOCK_4__init = unnamed_addr constant %INTERLOCK_4_interface zeroinitializer | |
@MANUAL_1__init = unnamed_addr constant %MANUAL_1_interface zeroinitializer | |
@MANUAL_2__init = unnamed_addr constant %MANUAL_2_interface zeroinitializer | |
@MANUAL_4__init = unnamed_addr constant %MANUAL_4_interface zeroinitializer | |
@PARSET__init = unnamed_addr constant %PARSET_interface zeroinitializer | |
@PARSET2__init = unnamed_addr constant %PARSET2_interface zeroinitializer | |
@SIGNAL__init = unnamed_addr constant %SIGNAL_interface { i8 0, i8 0, i64 0, i8 0, i32 0, i8 0, i8 1 } | |
@SIGNAL_4__init = unnamed_addr constant %SIGNAL_4_interface { i8 0, i8 0, i8 0, i8 0, i64 0, i8 -1, i8 -16, i8 -86, i8 -96, i8 0, %SIGNAL_interface { i8 0, i8 0, i64 0, i8 0, i32 0, i8 0, i8 1 } } | |
@SRAMP__init = unnamed_addr constant %SRAMP_interface zeroinitializer | |
@TUNE__init = unnamed_addr constant %TUNE_interface { i8 0, i8 0, i8 0, i8 0, float 0x3FB99999A0000000, float 0.000000e+00, float 1.000000e+02, float 0.000000e+00, float 1.000000e+02, i64 500000000, i64 2000000000, float 2.000000e+00, float 1.000000e+01, float 0.000000e+00, i32 0, i32 0, i32 0, i16 0, i8 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 } | |
@TUNE2__init = unnamed_addr constant %TUNE2_interface { i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, float 0x3FB99999A0000000, float 5.000000e+00, float 0.000000e+00, float 1.000000e+02, float 0.000000e+00, float 1.000000e+02, i64 500000000, float 2.000000e+00, float 1.000000e+01, float 0.000000e+00, i32 0, i32 0, i16 0, i8 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 } | |
@CONTROL_SET1__init = unnamed_addr constant %CONTROL_SET1_interface { float 0.000000e+00, float 0.000000e+00, i8 0, i8 0, float 5.000000e-01, float 0x3FDCCCCCC0000000, float 0x3FEA8F5C20000000, float 0x3FE3333340000000, float 5.000000e-01, float 1.250000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 } | |
@CONTROL_SET2__init = unnamed_addr constant %CONTROL_SET2_interface { float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, i8 0, i8 0, float 1.000000e+00, float 0x3FECCCCCC0000000, float 0x400AA3D700000000, float 0x3FF3333340000000, float 2.000000e+00, float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 } | |
@CTRL_OUT__init = unnamed_addr constant %CTRL_OUT_interface zeroinitializer | |
@CTRL_PI__init = unnamed_addr constant %CTRL_PI_interface { float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, i8 0, i8 0, float 1.000000e+00, float 1.000000e+00, float -1.000000e+03, float 1.000000e+03, float 0.000000e+00, float 0.000000e+00, i8 0, %FT_PIWL_interface { float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0xC7D2CED320000000, float 0x47D2CED320000000, i8 0, float 0.000000e+00, i8 0, i8 0, i32 0, float 0.000000e+00, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 }, %CTRL_OUT_interface zeroinitializer } | |
@CTRL_PID__init = unnamed_addr constant %CTRL_PID_interface { float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, i8 0, i8 0, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+03, float 1.000000e+03, float 0.000000e+00, float 0.000000e+00, i8 0, %FT_PIDWL_interface { float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0xC7D2CED320000000, float 0x47D2CED320000000, i8 0, float 0.000000e+00, i8 0, %FT_PIWL_interface { float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0xC7D2CED320000000, float 0x47D2CED320000000, i8 0, float 0.000000e+00, i8 0, i8 0, i32 0, float 0.000000e+00, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 }, %FT_DERIV_interface { float 0.000000e+00, float 1.000000e+00, i8 1, float 0.000000e+00, float 0.000000e+00, i32 0, i32 0, i8 0, float 0.000000e+00 } }, %CTRL_OUT_interface zeroinitializer } | |
@CTRL_PWM__init = unnamed_addr constant %CTRL_PWM_interface { float 0.000000e+00, float 0.000000e+00, i8 0, float 0.000000e+00, i8 0, %PWM_DC_interface { float 0.000000e+00, float 0.000000e+00, i8 0, %CLK_PRG_interface { i64 10000000, i8 0, i8 0, i64 0, i64 0 }, %TP_X_interface zeroinitializer, float 0.000000e+00 } } | |
@DEAD_BAND_A__init = unnamed_addr constant %DEAD_BAND_A_interface { float 0.000000e+00, i64 0, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, %FT_PT1_interface { float 0.000000e+00, i64 0, float 1.000000e+00, float 0.000000e+00, i32 0, i32 0, i8 0 }, %FT_PT1_interface { float 0.000000e+00, i64 0, float 1.000000e+00, float 0.000000e+00, i32 0, i32 0, i8 0 } } | |
@DEAD_ZONE2__init = unnamed_addr constant %DEAD_ZONE2_interface zeroinitializer | |
@FT_DERIV__init = unnamed_addr constant %FT_DERIV_interface { float 0.000000e+00, float 1.000000e+00, i8 1, float 0.000000e+00, float 0.000000e+00, i32 0, i32 0, i8 0, float 0.000000e+00 } | |
@FT_IMP__init = unnamed_addr constant %FT_IMP_interface { float 0.000000e+00, i64 0, float 1.000000e+00, float 0.000000e+00, %FT_PT1_interface { float 0.000000e+00, i64 0, float 1.000000e+00, float 0.000000e+00, i32 0, i32 0, i8 0 } } | |
@FT_INT__init = unnamed_addr constant %FT_INT_interface { float 0.000000e+00, float 1.000000e+00, i8 1, i8 0, float 0xC79E17B840000000, float 0x479E17B840000000, float 0.000000e+00, i8 0, %INTEGRATE_interface { i8 1, float 0.000000e+00, float 1.000000e+00, float* null, float 0.000000e+00, i8 0, i32 0, i32 0 } } | |
@FT_INT2__init = unnamed_addr constant %FT_INT2_interface { float 0.000000e+00, float 1.000000e+00, i8 1, i8 0, float 0xC7D2CED320000000, float 0x47D2CED320000000, float 0.000000e+00, i8 0, %INTEGRATE_interface { i8 1, float 0.000000e+00, float 1.000000e+00, float* null, float 0.000000e+00, i8 0, i32 0, i32 0 }, float 0.000000e+00, %REAL2 zeroinitializer } | |
@FT_PD__init = unnamed_addr constant %FT_PD_interface { float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, %FT_DERIV_interface { float 0.000000e+00, float 1.000000e+00, i8 1, float 0.000000e+00, float 0.000000e+00, i32 0, i32 0, i8 0, float 0.000000e+00 } } | |
@FT_PDT1__init = unnamed_addr constant %FT_PDT1_interface { float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, %FT_DERIV_interface { float 0.000000e+00, float 1.000000e+00, i8 1, float 0.000000e+00, float 0.000000e+00, i32 0, i32 0, i8 0, float 0.000000e+00 }, %FT_PT1_interface { float 0.000000e+00, i64 0, float 1.000000e+00, float 0.000000e+00, i32 0, i32 0, i8 0 } } | |
@FT_PI__init = unnamed_addr constant %FT_PI_interface { float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0xC7D2CED320000000, float 0x47D2CED320000000, i8 1, i8 0, float 0.000000e+00, i8 0, %FT_INT_interface { float 0.000000e+00, float 1.000000e+00, i8 1, i8 0, float 0xC79E17B840000000, float 0x479E17B840000000, float 0.000000e+00, i8 0, %INTEGRATE_interface { i8 1, float 0.000000e+00, float 1.000000e+00, float* null, float 0.000000e+00, i8 0, i32 0, i32 0 } } } | |
@FT_PID__init = unnamed_addr constant %FT_PID_interface { float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0xC7D2CED320000000, float 0x47D2CED320000000, i8 1, i8 0, float 0.000000e+00, i8 0, %FT_INT_interface { float 0.000000e+00, float 1.000000e+00, i8 1, i8 0, float 0xC79E17B840000000, float 0x479E17B840000000, float 0.000000e+00, i8 0, %INTEGRATE_interface { i8 1, float 0.000000e+00, float 1.000000e+00, float* null, float 0.000000e+00, i8 0, i32 0, i32 0 } }, %FT_DERIV_interface { float 0.000000e+00, float 1.000000e+00, i8 1, float 0.000000e+00, float 0.000000e+00, i32 0, i32 0, i8 0, float 0.000000e+00 } } | |
@FT_PIDW__init = unnamed_addr constant %FT_PIDW_interface { float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0xC7D2CED320000000, float 0x47D2CED320000000, i8 0, float 0.000000e+00, i8 0, %INTEGRATE_interface { i8 1, float 0.000000e+00, float 1.000000e+00, float* null, float 0.000000e+00, i8 0, i32 0, i32 0 }, %FT_DERIV_interface { float 0.000000e+00, float 1.000000e+00, i8 1, float 0.000000e+00, float 0.000000e+00, i32 0, i32 0, i8 0, float 0.000000e+00 }, float 0.000000e+00 } | |
@FT_PIDWL__init = unnamed_addr constant %FT_PIDWL_interface { float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0xC7D2CED320000000, float 0x47D2CED320000000, i8 0, float 0.000000e+00, i8 0, %FT_PIWL_interface { float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0xC7D2CED320000000, float 0x47D2CED320000000, i8 0, float 0.000000e+00, i8 0, i8 0, i32 0, float 0.000000e+00, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 }, %FT_DERIV_interface { float 0.000000e+00, float 1.000000e+00, i8 1, float 0.000000e+00, float 0.000000e+00, i32 0, i32 0, i8 0, float 0.000000e+00 } } | |
@FT_PIW__init = unnamed_addr constant %FT_PIW_interface { float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0xC7D2CED320000000, float 0x47D2CED320000000, i8 0, float 0.000000e+00, i8 0, %FT_INT_interface { float 0.000000e+00, float 1.000000e+00, i8 1, i8 0, float 0xC79E17B840000000, float 0x479E17B840000000, float 0.000000e+00, i8 0, %INTEGRATE_interface { i8 1, float 0.000000e+00, float 1.000000e+00, float* null, float 0.000000e+00, i8 0, i32 0, i32 0 } } } | |
@FT_PIWL__init = unnamed_addr constant %FT_PIWL_interface { float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0xC7D2CED320000000, float 0x47D2CED320000000, i8 0, float 0.000000e+00, i8 0, i8 0, i32 0, float 0.000000e+00, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 } | |
@FT_PT1__init = unnamed_addr constant %FT_PT1_interface { float 0.000000e+00, i64 0, float 1.000000e+00, float 0.000000e+00, i32 0, i32 0, i8 0 } | |
@FT_PT2__init = unnamed_addr constant %FT_PT2_interface { float 0.000000e+00, i64 0, float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, i8 0, %INTEGRATE_interface { i8 1, float 0.000000e+00, float 1.000000e+00, float* null, float 0.000000e+00, i8 0, i32 0, i32 0 }, %INTEGRATE_interface { i8 1, float 0.000000e+00, float 1.000000e+00, float* null, float 0.000000e+00, i8 0, i32 0, i32 0 }, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 } | |
@FT_TN16__init = unnamed_addr constant %FT_TN16_interface { float 0.000000e+00, i64 0, float 0.000000e+00, i8 0, i16 16, [16 x float] zeroinitializer, i16 0, i64 0, i64 0, i8 0 } | |
@FT_TN64__init = unnamed_addr constant %FT_TN64_interface { float 0.000000e+00, i64 0, float 0.000000e+00, i8 0, i16 64, [64 x float] zeroinitializer, i16 0, i64 0, i64 0, i8 0 } | |
@FT_TN8__init = unnamed_addr constant %FT_TN8_interface { float 0.000000e+00, i64 0, float 0.000000e+00, i8 0, i16 8, [8 x float] zeroinitializer, i16 0, i64 0, i64 0, i8 0 } | |
@HYST__init = unnamed_addr constant %HYST_interface zeroinitializer | |
@HYST_1__init = unnamed_addr constant %HYST_1_interface zeroinitializer | |
@HYST_2__init = unnamed_addr constant %HYST_2_interface zeroinitializer | |
@HYST_3__init = unnamed_addr constant %HYST_3_interface zeroinitializer | |
@INTEGRATE__init = unnamed_addr constant %INTEGRATE_interface { i8 1, float 0.000000e+00, float 1.000000e+00, float* null, float 0.000000e+00, i8 0, i32 0, i32 0 } | |
@ASTRO__init = unnamed_addr constant %ASTRO_interface zeroinitializer | |
@ENERGY__init = unnamed_addr constant %ENERGY_interface zeroinitializer | |
@LENGTH__init = unnamed_addr constant %LENGTH_interface zeroinitializer | |
@PRESSURE__init = unnamed_addr constant %PRESSURE_interface zeroinitializer | |
@SPEED__init = unnamed_addr constant %SPEED_interface zeroinitializer | |
@TEMPERATURE__init = unnamed_addr constant %TEMPERATURE_interface { float 0.000000e+00, float 0xC071126660000000, float 0xC07CBAB860000000, float 0xC06B50A3E0000000, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 } | |
@ALARM_2__init = unnamed_addr constant %ALARM_2_interface zeroinitializer | |
@BAR_GRAPH__init = unnamed_addr constant %BAR_GRAPH_interface zeroinitializer | |
@CALIBRATE__init = unnamed_addr constant %CALIBRATE_interface { float 0.000000e+00, i8 0, i8 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00 } | |
@CYCLE_TIME__init = unnamed_addr constant %CYCLE_TIME_interface zeroinitializer | |
@DT_SIMU__init = unnamed_addr constant %DT_SIMU_interface { i64 0, float 1.000000e+00, i64 0, i32 0, i8 0, i32 0, i32 0, i32 0 } | |
@FLOW_METER__init = unnamed_addr constant %FLOW_METER_interface { float 0.000000e+00, i8 0, i8 0, i8 0, i64 1000000000, float 0.000000e+00, float* null, i32* null, i64 0, i64 0, %INTEGRATE_interface { i8 1, float 0.000000e+00, float 1.000000e+00, float* null, float 0.000000e+00, i8 0, i32 0, i32 0 }, i8 0, i8 0, i16 0, float 0.000000e+00, i32 0 } | |
@M_D__init = unnamed_addr constant %M_D_interface { i8 0, i8 0, i64 864000000000000, i8 0, i64 0, i64 0, i8 0, i8 0, i64 0, i64 0, i8 0 } | |
@M_T__init = unnamed_addr constant %M_T_interface { i8 0, i64 864000000000000, i8 0, i64 0, i64 0, i8 0, i64 0, i64 0 } | |
@M_TX__init = unnamed_addr constant %M_TX_interface { i8 0, i64 864000000000000, i8 0, i64 0, i64 0, float 0.000000e+00, float 0.000000e+00, i64 0, i8 0, i64 0, i64 0, i64 0, i8 0, i8 0, i8 0 } | |
@METER__init = unnamed_addr constant %METER_interface { float 0.000000e+00, float 0.000000e+00, i8 0, i8 0, float 1.000000e+00, i8 0, float* null, %REAL2 zeroinitializer, float 0.000000e+00, float 0.000000e+00, i32 0, i32 0, float 0.000000e+00, i8 0 } | |
@METER_STAT__init = unnamed_addr constant %METER_STAT_interface zeroinitializer | |
@ONTIME__init = unnamed_addr constant %ONTIME_interface zeroinitializer | |
@TC_MS__init = unnamed_addr constant %TC_MS_interface zeroinitializer | |
@TC_S__init = unnamed_addr constant %TC_S_interface zeroinitializer | |
@TC_US__init = unnamed_addr constant %TC_US_interface zeroinitializer | |
@_RMP_B__init = unnamed_addr constant %_RMP_B_interface { i8 0, i8 1, i64 0, i8* null, i64 0, i64 0, i64 0, i8 0, i8 0, i8 0 } | |
@_RMP_NEXT__init = unnamed_addr constant %_RMP_NEXT_interface { i8 1, i8 0, i64 0, i64 0, i64 0, i8 0, i8 0, i8 0, i8* null, %_RMP_B_interface { i8 0, i8 1, i64 0, i8* null, i64 0, i64 0, i64 0, i8 0, i8 0, i8 0 }, %TREND_DW_interface zeroinitializer, %TP_interface zeroinitializer, i8 0, i8 0 } | |
@_RMP_W__init = unnamed_addr constant %_RMP_W_interface { i8 0, i8 1, i64 0, i16* null, i32 0, i32 0, i32 0, i8 0, i8 0 } | |
@GEN_PULSE__init = unnamed_addr constant %GEN_PULSE_interface { i8 1, i64 0, i64 0, i8 0, i64 0, i64 0, i8 0 } | |
@GEN_PW2__init = unnamed_addr constant %GEN_PW2_interface zeroinitializer | |
@GEN_RDM__init = unnamed_addr constant %GEN_RDM_interface { i64 0, float 1.000000e+00, float 0.000000e+00, i8 0, float 0.000000e+00, i64 0, i64 0, i8 0 } | |
@GEN_RDT__init = unnamed_addr constant %GEN_RDT_interface { i8 1, i64 1000000000, i64 1200000000, i64 100000000, i8 0, %TON_interface zeroinitializer, %TOF_interface zeroinitializer, i64 0, float 0.000000e+00 } | |
@GEN_RMP__init = unnamed_addr constant %GEN_RMP_interface { i64 1000000000, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, i8 0, float 0.000000e+00, i64 0, i64 0, i8 0, float 0.000000e+00, float 0.000000e+00 } | |
@GEN_SIN__init = unnamed_addr constant %GEN_SIN_interface { i64 0, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, i8 0, float 0.000000e+00, i64 0, i64 0, i8 0, float 0.000000e+00 } | |
@GEN_SQR__init = unnamed_addr constant %GEN_SQR_interface { i64 0, float 1.000000e+00, float 0.000000e+00, float 5.000000e-01, float 0.000000e+00, i8 0, float 0.000000e+00, i64 0, i64 0, i8 0 } | |
@PWM_DC__init = unnamed_addr constant %PWM_DC_interface { float 0.000000e+00, float 0.000000e+00, i8 0, %CLK_PRG_interface { i64 10000000, i8 0, i8 0, i64 0, i64 0 }, %TP_X_interface zeroinitializer, float 0.000000e+00 } | |
@PWM_PW__init = unnamed_addr constant %PWM_PW_interface { float 0.000000e+00, i64 0, i8 0, %CLK_PRG_interface { i64 10000000, i8 0, i8 0, i64 0, i64 0 }, %TP_X_interface zeroinitializer } | |
@RMP_B__init = unnamed_addr constant %RMP_B_interface { i8 0, i64 0, i8 1, i8 1, i8 0, i8 0, i8 0, i8 0, i8 0, %_RMP_B_interface { i8 0, i8 1, i64 0, i8* null, i64 0, i64 0, i64 0, i8 0, i8 0, i8 0 } } | |
@RMP_SOFT__init = unnamed_addr constant %RMP_SOFT_interface { i8 0, i8 0, i64 0, i64 0, i8 0, %_RMP_B_interface { i8 0, i8 1, i64 0, i8* null, i64 0, i64 0, i64 0, i8 0, i8 0, i8 0 }, i8 0 } | |
@RMP_W__init = unnamed_addr constant %RMP_W_interface { i8 0, i64 0, i8 1, i8 1, i8 0, i16 0, i8 0, i8 0, i8 0, %_RMP_W_interface { i8 0, i8 1, i64 0, i16* null, i32 0, i32 0, i32 0, i8 0, i8 0 } } | |
@AIN1__init = unnamed_addr constant %AIN1_interface { i32 0, i16 255, i16 255, i8 0, i32 0, i16 255, i8 0, i32 0, i16 0, i16 31, float 0.000000e+00, float 1.000000e+01, i32 0, i32 -1, float 0.000000e+00, float 1.000000e+01, float 0.000000e+00, i8 0, i8 0, i8 0, i32 0 } | |
@DELAY__init = unnamed_addr constant %DELAY_interface zeroinitializer | |
@DELAY_4__init = unnamed_addr constant %DELAY_4_interface zeroinitializer | |
@FADE__init = unnamed_addr constant %FADE_interface { float 0.000000e+00, float 0.000000e+00, i8 0, i64 0, i8 0, float 0.000000e+00, %RMP_W_interface { i8 0, i64 0, i8 1, i8 1, i8 0, i16 0, i8 0, i8 0, i8 0, %_RMP_W_interface { i8 0, i8 1, i64 0, i16* null, i32 0, i32 0, i32 0, i8 0, i8 0 } } } | |
@FILTER_DW__init = unnamed_addr constant %FILTER_DW_interface zeroinitializer | |
@FILTER_I__init = unnamed_addr constant %FILTER_I_interface zeroinitializer | |
@FILTER_MAV_DW__init = unnamed_addr constant %FILTER_MAV_DW_interface zeroinitializer | |
@FILTER_MAV_W__init = unnamed_addr constant %FILTER_MAV_W_interface zeroinitializer | |
@FILTER_W__init = unnamed_addr constant %FILTER_W_interface zeroinitializer | |
@FILTER_WAV__init = unnamed_addr constant %FILTER_WAV_interface zeroinitializer | |
@SEL2_OF_3__init = unnamed_addr constant %SEL2_OF_3_interface zeroinitializer | |
@SEL2_OF_3B__init = unnamed_addr constant %SEL2_OF_3B_interface zeroinitializer | |
@SH__init = unnamed_addr constant %SH_interface zeroinitializer | |
@SH_1__init = unnamed_addr constant %SH_1_interface zeroinitializer | |
@SH_2__init = unnamed_addr constant %SH_2_interface { float 0.000000e+00, i64 0, i16 16, i16 0, float 0.000000e+00, i8 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, i16 0, [16 x float] zeroinitializer, [16 x float] zeroinitializer, i64 0, i16 0, i16 0, float 0.000000e+00, i16 0, i64 0, i16 0 } | |
@SH_T__init = unnamed_addr constant %SH_T_interface zeroinitializer | |
@STAIR2__init = unnamed_addr constant %STAIR2_interface zeroinitializer | |
@TREND__init = unnamed_addr constant %TREND_interface zeroinitializer | |
@TREND_DW__init = unnamed_addr constant %TREND_DW_interface zeroinitializer | |
@LIST_NEXT__init = unnamed_addr constant %LIST_NEXT_interface { i8 0, i8 0, [251 x i8]* null, [251 x i8] zeroinitializer, i8 0, i16 1, [250 x i8]* null, [250 x i8]* null, i8 0, i16 0 } | |
@COUNT_BR__init = unnamed_addr constant %COUNT_BR_interface { i8 0, i8 0, i8 0, i8 0, i8 1, i8 -1, i8 0, i8 0, i8 0, i8 0 } | |
@COUNT_DR__init = unnamed_addr constant %COUNT_DR_interface { i8 0, i32 0, i8 0, i8 0, i32 1, i32 -1, i8 0, i32 0, i8 0, i8 0 } | |
@FF_D2E__init = unnamed_addr constant %FF_D2E_interface zeroinitializer | |
@FF_D4E__init = unnamed_addr constant %FF_D4E_interface zeroinitializer | |
@FF_DRE__init = unnamed_addr constant %FF_DRE_interface zeroinitializer | |
@FF_JKE__init = unnamed_addr constant %FF_JKE_interface zeroinitializer | |
@FF_RSE__init = unnamed_addr constant %FF_RSE_interface zeroinitializer | |
@SELECT_8__init = unnamed_addr constant %SELECT_8_interface zeroinitializer | |
@SHR_4E__init = unnamed_addr constant %SHR_4E_interface zeroinitializer | |
@SHR_4UDE__init = unnamed_addr constant %SHR_4UDE_interface zeroinitializer | |
@SHR_8PLE__init = unnamed_addr constant %SHR_8PLE_interface { i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 1, i8 0 } | |
@SHR_8UDE__init = unnamed_addr constant %SHR_8UDE_interface zeroinitializer | |
@TOGGLE__init = unnamed_addr constant %TOGGLE_interface zeroinitializer | |
@LTCH__init = unnamed_addr constant %LTCH_interface zeroinitializer | |
@LTCH_4__init = unnamed_addr constant %LTCH_4_interface zeroinitializer | |
@STORE_8__init = unnamed_addr constant %STORE_8_interface zeroinitializer | |
@BYTE_TO_BITS__init = unnamed_addr constant %BYTE_TO_BITS_interface zeroinitializer | |
@DEC_2__init = unnamed_addr constant %DEC_2_interface zeroinitializer | |
@DEC_4__init = unnamed_addr constant %DEC_4_interface zeroinitializer | |
@DEC_8__init = unnamed_addr constant %DEC_8_interface zeroinitializer | |
@A_TRIG__init = unnamed_addr constant %A_TRIG_interface zeroinitializer | |
@B_TRIG__init = unnamed_addr constant %B_TRIG_interface zeroinitializer | |
@CLICK_CNT__init = unnamed_addr constant %CLICK_CNT_interface { i8 0, i16 0, i64 0, i8 0, %TP_interface zeroinitializer, i8 0, i16 -1 } | |
@CLICK_DEC__init = unnamed_addr constant %CLICK_DEC_interface { i8 0, i64 0, i8 0, i8 0, i8 0, i8 0, %TP_interface zeroinitializer, i8 0, i16 -1 } | |
@CLK_DIV__init = unnamed_addr constant %CLK_DIV_interface zeroinitializer | |
@CLK_N__init = unnamed_addr constant %CLK_N_interface zeroinitializer | |
@CLK_PRG__init = unnamed_addr constant %CLK_PRG_interface { i64 10000000, i8 0, i8 0, i64 0, i64 0 } | |
@CLK_PULSE__init = unnamed_addr constant %CLK_PULSE_interface zeroinitializer | |
@CYCLE_4__init = unnamed_addr constant %CYCLE_4_interface { i8 1, i64 0, i64 0, i64 0, i64 0, i8 0, i16 0, i8 0, i16 0, i64 0, i64 0, i8 0 } | |
@D_TRIG__init = unnamed_addr constant %D_TRIG_interface zeroinitializer | |
@GEN_BIT__init = unnamed_addr constant %GEN_BIT_interface { i32 0, i32 0, i32 0, i32 0, i8 0, i16 0, i16 0, i8 0, i8 0, i8 0, i8 0, i8 0, i16 0, i8 0, i32 0, i32 0, i32 0, i32 0, i16 1 } | |
@GEN_SQ__init = unnamed_addr constant %GEN_SQ_interface zeroinitializer | |
@SCHEDULER__init = unnamed_addr constant %SCHEDULER_interface zeroinitializer | |
@SCHEDULER_2__init = unnamed_addr constant %SCHEDULER_2_interface zeroinitializer | |
@SEQUENCE_4__init = unnamed_addr constant %SEQUENCE_4_interface { i8 1, i8 1, i8 1, i8 1, i8 0, i8 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i16 -1, i8 0, i64 0, i8 0, i64 0, i8 0 } | |
@SEQUENCE_64__init = unnamed_addr constant %SEQUENCE_64_interface { i8 0, i16 0, [64 x i64] zeroinitializer, i8 0, i16 -1, i8 0, i64 0, i8 0, i64 0 } | |
@SEQUENCE_8__init = unnamed_addr constant %SEQUENCE_8_interface { i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 0, i8 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i16 -1, i8 0, i64 0, i8 0, i64 0, i8 0 } | |
@TMAX__init = unnamed_addr constant %TMAX_interface zeroinitializer | |
@TMIN__init = unnamed_addr constant %TMIN_interface zeroinitializer | |
@TOF_1__init = unnamed_addr constant %TOF_1_interface zeroinitializer | |
@TONOF__init = unnamed_addr constant %TONOF_interface zeroinitializer | |
@TP_1__init = unnamed_addr constant %TP_1_interface zeroinitializer | |
@TP_1D__init = unnamed_addr constant %TP_1D_interface zeroinitializer | |
@TP_X__init = unnamed_addr constant %TP_X_interface zeroinitializer | |
@FIFO_16__init = unnamed_addr constant %FIFO_16_interface { i32 0, i8 1, i8 0, i8 0, i8 0, i32 0, i8 1, i8 0, [17 x i32] zeroinitializer, i16 0, i16 0, i16 16 } | |
@FIFO_32__init = unnamed_addr constant %FIFO_32_interface { i32 0, i8 1, i8 0, i8 0, i8 0, i32 0, i8 1, i8 0, [33 x i32] zeroinitializer, i16 0, i16 0, i16 32 } | |
@STACK_16__init = unnamed_addr constant %STACK_16_interface { i32 0, i8 1, i8 0, i8 0, i8 0, i32 0, i8 1, i8 0, [16 x i32] zeroinitializer, i16 0, i16 15 } | |
@STACK_32__init = unnamed_addr constant %STACK_32_interface { i32 0, i8 1, i8 0, i8 0, i8 0, i32 0, i8 1, i8 0, [32 x i32] zeroinitializer, i16 0, i16 31 } | |
@MATRIX__init = unnamed_addr constant %MATRIX_interface { i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 0, [4 x i8] zeroinitializer, [4 x i8] zeroinitializer, i16 0, i8 0 } | |
@PIN_CODE__init = unnamed_addr constant %PIN_CODE_interface { i8 0, i8 0, [9 x i8] zeroinitializer, i8 0, i16 1 } | |
@FT_AVG__init = unnamed_addr constant %FT_AVG_interface { float 0.000000e+00, i8 1, i16 32, i8 0, float 0.000000e+00, %DELAY_interface zeroinitializer, i16 0, i8 0 } | |
@FT_MIN_MAX__init = unnamed_addr constant %FT_MIN_MAX_interface zeroinitializer | |
@FT_RMP__init = unnamed_addr constant %FT_RMP_interface { i8 1, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, i8 0, i8 0, i64 0, i64 0, i8 0 } | |
@ESR_COLLECT__init = unnamed_addr constant %ESR_COLLECT_interface { [4 x %ESR_DATA] zeroinitializer, [4 x %ESR_DATA] zeroinitializer, [4 x %ESR_DATA] zeroinitializer, [4 x %ESR_DATA] zeroinitializer, [4 x %ESR_DATA] zeroinitializer, [4 x %ESR_DATA] zeroinitializer, [4 x %ESR_DATA] zeroinitializer, [4 x %ESR_DATA] zeroinitializer, i8 0, i16* null, [32 x %ESR_DATA] zeroinitializer, i16 3, i16 32, i16 -1 } | |
@ESR_MON_B8__init = unnamed_addr constant %ESR_MON_B8_interface zeroinitializer | |
@ESR_MON_R4__init = unnamed_addr constant %ESR_MON_R4_interface zeroinitializer | |
@ESR_MON_X8__init = unnamed_addr constant %ESR_MON_X8_interface { i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i64 0, i8 3, [11 x i8] zeroinitializer, [11 x i8] zeroinitializer, [11 x i8] zeroinitializer, [11 x i8] zeroinitializer, [11 x i8] zeroinitializer, [11 x i8] zeroinitializer, [11 x i8] zeroinitializer, [11 x i8] zeroinitializer, i8 0, [4 x %ESR_DATA]* null, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i64 0, i16 0 } | |
@MESSAGE_4R__init = unnamed_addr constant %MESSAGE_4R_interface { [251 x i8] zeroinitializer, [251 x i8] zeroinitializer, [251 x i8] zeroinitializer, [251 x i8] zeroinitializer, i16 3, i8 1, i8 1, i64 3000000000, [251 x i8] zeroinitializer, i16 0, i8 0, %TON_interface zeroinitializer, i8 0 } | |
@MESSAGE_8__init = unnamed_addr constant %MESSAGE_8_interface zeroinitializer | |
@TICKER__init = unnamed_addr constant %TICKER_interface zeroinitializer | |
@CALENDAR_CALC__init = unnamed_addr constant %CALENDAR_CALC_interface { i8 0, float 0xBFEAAAAAA0000000, %CALENDAR* null, [30 x %HOLIDAY_DATA]* null, i64 0, i32 0, %HOLIDAY_interface { i64 0, i16 0, i8 0, i8 0, i8 0, [30 x %HOLIDAY_DATA]* null, i16 29, i8 0, [31 x i8] zeroinitializer, i64 0, i64 0, i16 0, i16 0, i64 0, i16 0, i16 0 }, %SUN_TIME_interface { float 0.000000e+00, float 0.000000e+00, i64 0, float 0xBFEAAAAAA0000000, i64 0, i64 0, i64 0, float 0.000000e+00, float 0.000000e+00, i64 0, float 0.000000e+00 }, i16 0, i64 0, %SUN_POS_interface zeroinitializer, i64 0 } | |
@DCF77__init = unnamed_addr constant %DCF77_interface { i8 0, i8 0, i64 0, i8 0, i64 120000000000, i16 1, i8 1, i8 0, i8 0, i16 0, i8 1, i64 0, i64 0, i16 0, i8 0, i64 0, i64 0, i16 0, i8 0, i64 0, i64 0, i64 0, [59 x i8] zeroinitializer, i16 0, i16 0, i64 0, i16 0, i16 0, i16 0, i16 0, i16 0, i64 0, i64 0, i64 0, i8 0 } | |
@EVENTS__init = unnamed_addr constant %EVENTS_interface { i64 0, i8 0, i8 0, [31 x i8] zeroinitializer, i16 0, i64 0, i16 49, i32 0, i16 0, i32 0, %HOLIDAY_DATA zeroinitializer, i8 0, [31 x i8] zeroinitializer, [50 x %HOLIDAY_DATA]* null } | |
@HOLIDAY__init = unnamed_addr constant %HOLIDAY_interface { i64 0, i16 0, i8 0, i8 0, i8 0, [30 x %HOLIDAY_DATA]* null, i16 29, i8 0, [31 x i8] zeroinitializer, i64 0, i64 0, i16 0, i16 0, i64 0, i16 0, i16 0 } | |
@RTC_2__init = unnamed_addr constant %RTC_2_interface zeroinitializer | |
@RTC_MS__init = unnamed_addr constant %RTC_MS_interface zeroinitializer | |
@SUN_POS__init = unnamed_addr constant %SUN_POS_interface zeroinitializer | |
@SUN_TIME__init = unnamed_addr constant %SUN_TIME_interface { float 0.000000e+00, float 0.000000e+00, i64 0, float 0xBFEAAAAAA0000000, i64 0, i64 0, i64 0, float 0.000000e+00, float 0.000000e+00, i64 0, float 0.000000e+00 } | |
@CTD__init = unnamed_addr constant %CTD_interface zeroinitializer | |
@CTU__init = unnamed_addr constant %CTU_interface zeroinitializer | |
@CTUD__init = unnamed_addr constant %CTUD_interface zeroinitializer | |
@F_TRIG__init = unnamed_addr constant %F_TRIG_interface zeroinitializer | |
@R_TRIG__init = unnamed_addr constant %R_TRIG_interface zeroinitializer | |
@RS__init = unnamed_addr constant %RS_interface zeroinitializer | |
@SR__init = unnamed_addr constant %SR_interface zeroinitializer | |
@TOF__init = unnamed_addr constant %TOF_interface zeroinitializer | |
@TON__init = unnamed_addr constant %TON_interface zeroinitializer | |
@TP__init = unnamed_addr constant %TP_interface zeroinitializer | |
@DT_TO_STRF.FILL__init = unnamed_addr constant [2 x i8] c"0\00" | |
@DT_TO_STRF.BLANK__init = unnamed_addr constant [2 x i8] c" \00" | |
@FSTRING_TO_DT.ignore__init = unnamed_addr constant [2 x i8] c"*\00" | |
@FSTRING_TO_DT.fchar__init = unnamed_addr constant [2 x i8] c"#\00" | |
@utf08_literal_0 = unnamed_addr constant [1 x i8] zeroinitializer | |
@utf08_literal_1 = unnamed_addr constant [2 x i8] c" \00" | |
@utf08_literal_2 = unnamed_addr constant [3 x i8] c" \00" | |
@utf08_literal_3 = unnamed_addr constant [2 x i8] c"#\00" | |
@utf08_literal_4 = unnamed_addr constant [2 x i8] c"&\00" | |
@utf08_literal_5 = unnamed_addr constant [2 x i8] c"*\00" | |
@utf08_literal_6 = unnamed_addr constant [2 x i8] c"+\00" | |
@utf08_literal_7 = unnamed_addr constant [2 x i8] c",\00" | |
@utf08_literal_8 = unnamed_addr constant [2 x i8] c"-\00" | |
@utf08_literal_9 = unnamed_addr constant [2 x i8] c".\00" | |
@utf08_literal_10 = unnamed_addr constant [3 x i8] c".0\00" | |
@utf08_literal_11 = unnamed_addr constant [2 x i8] c"/\00" | |
@utf08_literal_12 = unnamed_addr constant [2 x i8] c"0\00" | |
@utf08_literal_13 = unnamed_addr constant [3 x i8] c"00\00" | |
@utf08_literal_14 = unnamed_addr constant [11 x i8] c"0123456789\00" | |
@utf08_literal_15 = unnamed_addr constant [4 x i8] c"16#\00" | |
@utf08_literal_16 = unnamed_addr constant [3 x i8] c"2#\00" | |
@utf08_literal_17 = unnamed_addr constant [3 x i8] c"8#\00" | |
@utf08_literal_18 = unnamed_addr constant [2 x i8] c";\00" | |
@utf08_literal_19 = unnamed_addr constant [3 x i8] c"AM\00" | |
@utf08_literal_20 = unnamed_addr constant [3 x i8] c"Ae\00" | |
@utf08_literal_21 = unnamed_addr constant [4 x i8] c"COS\00" | |
@utf08_literal_22 = unnamed_addr constant [2 x i8] c"D\00" | |
@utf08_literal_23 = unnamed_addr constant [6 x i8] c"ERROR\00" | |
@utf08_literal_24 = unnamed_addr constant [2 x i8] c"M\00" | |
@utf08_literal_25 = unnamed_addr constant [2 x i8] c"N\00" | |
@utf08_literal_26 = unnamed_addr constant [3 x i8] c"Oe\00" | |
@utf08_literal_27 = unnamed_addr constant [3 x i8] c"PM\00" | |
@utf08_literal_28 = unnamed_addr constant [4 x i8] c"SIN\00" | |
@utf08_literal_29 = unnamed_addr constant [5 x i8] c"SQRT\00" | |
@utf08_literal_30 = unnamed_addr constant [4 x i8] c"TAN\00" | |
@utf08_literal_31 = unnamed_addr constant [3 x i8] c"Ue\00" | |
@utf08_literal_32 = unnamed_addr constant [2 x i8] c"Y\00" | |
@utf08_literal_33 = unnamed_addr constant [2 x i8] c"^\00" | |
@utf08_literal_34 = unnamed_addr constant [3 x i8] c"ae\00" | |
@utf08_literal_35 = unnamed_addr constant [2 x i8] c"h\00" | |
@utf08_literal_36 = unnamed_addr constant [2 x i8] c"m\00" | |
@utf08_literal_37 = unnamed_addr constant [3 x i8] c"oe\00" | |
@utf08_literal_38 = unnamed_addr constant [2 x i8] c"s\00" | |
@utf08_literal_39 = unnamed_addr constant [3 x i8] c"ss\00" | |
@utf08_literal_40 = unnamed_addr constant [3 x i8] c"ue\00" | |
declare i8 @_BUFFER_CLEAR(%_BUFFER_CLEAR_interface*) | |
declare i8 @_BUFFER_INIT(%_BUFFER_INIT_interface*) | |
define i16 @_BUFFER_INSERT(%_BUFFER_INSERT_interface* %0) { | |
entry: | |
%STR = getelementptr inbounds %_BUFFER_INSERT_interface, %_BUFFER_INSERT_interface* %0, i32 0, i32 0 | |
%POS = getelementptr inbounds %_BUFFER_INSERT_interface, %_BUFFER_INSERT_interface* %0, i32 0, i32 1 | |
%PT = getelementptr inbounds %_BUFFER_INSERT_interface, %_BUFFER_INSERT_interface* %0, i32 0, i32 2 | |
%SIZE = getelementptr inbounds %_BUFFER_INSERT_interface, %_BUFFER_INSERT_interface* %0, i32 0, i32 3 | |
%end = getelementptr inbounds %_BUFFER_INSERT_interface, %_BUFFER_INSERT_interface* %0, i32 0, i32 4 | |
%lx = getelementptr inbounds %_BUFFER_INSERT_interface, %_BUFFER_INSERT_interface* %0, i32 0, i32 5 | |
%i = getelementptr inbounds %_BUFFER_INSERT_interface, %_BUFFER_INSERT_interface* %0, i32 0, i32 6 | |
%_BUFFER_INSERT = alloca i16, align 2 | |
store i16 0, i16* %end, align 2 | |
store i16 0, i16* %lx, align 2 | |
store i16 0, i16* %i, align 2 | |
store i16 0, i16* %_BUFFER_INSERT, align 2 | |
%LEN_instance = alloca %LEN_interface, align 8 | |
%1 = getelementptr inbounds %LEN_interface, %LEN_interface* %LEN_instance, i32 0, i32 0 | |
%2 = bitcast [1024 x i8]* %1 to i8* | |
%3 = bitcast [251 x i8]* %STR to i8* | |
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %2, i8* align 1 %3, i32 251, i1 false) | |
%call = call i16 @LEN(%LEN_interface* %LEN_instance) | |
store i16 %call, i16* %lx, align 2 | |
%load_pos = load i16, i16* %POS, align 2 | |
%4 = sext i16 %load_pos to i32 | |
%load_lx = load i16, i16* %lx, align 2 | |
%5 = sext i16 %load_lx to i32 | |
%tmpVar = add i32 %4, %5 | |
%6 = trunc i32 %tmpVar to i16 | |
store i16 %6, i16* %end, align 2 | |
%UINT_TO_INT_instance = alloca %UINT_TO_INT_interface, align 8 | |
%7 = getelementptr inbounds %UINT_TO_INT_interface, %UINT_TO_INT_interface* %UINT_TO_INT_instance, i32 0, i32 0 | |
%load_size = load i16, i16* %SIZE, align 2 | |
store i16 %load_size, i16* %7, align 2 | |
%call1 = call i16 @UINT_TO_INT(%UINT_TO_INT_interface* %UINT_TO_INT_instance) | |
%8 = sext i16 %call1 to i32 | |
%tmpVar2 = sub i32 %8, 1 | |
%9 = trunc i32 %tmpVar2 to i16 | |
store i16 %9, i16* %i, align 2 | |
br label %condition_check | |
condition_check: ; preds = %increment, %entry | |
%load_i = load i16, i16* %i, align 2 | |
%load_i3 = load i16, i16* %i, align 2 | |
%load_end = load i16, i16* %end, align 2 | |
%tmpVar4 = icmp sle i16 %load_i3, %load_end | |
%10 = zext i1 %tmpVar4 to i8 | |
%11 = icmp ne i8 %10, 0 | |
br i1 %11, label %21, label %27 | |
for_body: ; preds = %34 | |
%deref = load [32768 x i8]*, [32768 x i8]** %PT, align 8 | |
%load_i20 = load i16, i16* %i, align 2 | |
%12 = sext i16 %load_i20 to i32 | |
%tmpVar21 = mul i32 1, %12 | |
%tmpVar22 = add i32 %tmpVar21, 0 | |
%tmpVar23 = getelementptr inbounds [32768 x i8], [32768 x i8]* %deref, i32 0, i32 %tmpVar22 | |
%deref24 = load [32768 x i8]*, [32768 x i8]** %PT, align 8 | |
%load_i25 = load i16, i16* %i, align 2 | |
%13 = sext i16 %load_i25 to i32 | |
%load_lx26 = load i16, i16* %lx, align 2 | |
%14 = sext i16 %load_lx26 to i32 | |
%tmpVar27 = sub i32 %13, %14 | |
%tmpVar28 = mul i32 1, %tmpVar27 | |
%tmpVar29 = add i32 %tmpVar28, 0 | |
%tmpVar30 = getelementptr inbounds [32768 x i8], [32768 x i8]* %deref24, i32 0, i32 %tmpVar29 | |
%load_tmpVar = load i8, i8* %tmpVar30, align 1 | |
store i8 %load_tmpVar, i8* %tmpVar23, align 1 | |
br label %increment | |
increment: ; preds = %for_body | |
%tmpVar31 = add i16 %load_i, -1 | |
store i16 %tmpVar31, i16* %i, align 2 | |
br label %condition_check | |
continue: ; preds = %34 | |
%_STRING_TO_BUFFER_instance = alloca %_STRING_TO_BUFFER_interface, align 8 | |
%15 = getelementptr inbounds %_STRING_TO_BUFFER_interface, %_STRING_TO_BUFFER_interface* %_STRING_TO_BUFFER_instance, i32 0, i32 0 | |
%16 = bitcast [251 x i8]* %15 to i8* | |
%17 = bitcast [251 x i8]* %STR to i8* | |
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %16, i8* align 1 %17, i32 250, i1 false) | |
%18 = getelementptr inbounds %_STRING_TO_BUFFER_interface, %_STRING_TO_BUFFER_interface* %_STRING_TO_BUFFER_instance, i32 0, i32 1 | |
%load_pos32 = load i16, i16* %POS, align 2 | |
store i16 %load_pos32, i16* %18, align 2 | |
%19 = getelementptr inbounds %_STRING_TO_BUFFER_interface, %_STRING_TO_BUFFER_interface* %_STRING_TO_BUFFER_instance, i32 0, i32 2 | |
%load_PT = load [32768 x i8]*, [32768 x i8]** %PT, align 8 | |
store [32768 x i8]* %load_PT, [32768 x i8]** %19, align 8 | |
%20 = getelementptr inbounds %_STRING_TO_BUFFER_interface, %_STRING_TO_BUFFER_interface* %_STRING_TO_BUFFER_instance, i32 0, i32 3 | |
%load_size33 = load i16, i16* %SIZE, align 2 | |
store i16 %load_size33, i16* %20, align 2 | |
%call34 = call i16 @_STRING_TO_BUFFER(%_STRING_TO_BUFFER_interface* %_STRING_TO_BUFFER_instance) | |
store i16 %call34, i16* %_BUFFER_INSERT, align 2 | |
%_BUFFER_INSERT_ret = load i16, i16* %_BUFFER_INSERT, align 2 | |
ret i16 %_BUFFER_INSERT_ret | |
21: ; preds = %condition_check | |
%load_i5 = load i16, i16* %i, align 2 | |
%UINT_TO_INT_instance6 = alloca %UINT_TO_INT_interface, align 8 | |
%22 = getelementptr inbounds %UINT_TO_INT_interface, %UINT_TO_INT_interface* %UINT_TO_INT_instance6, i32 0, i32 0 | |
%load_size7 = load i16, i16* %SIZE, align 2 | |
store i16 %load_size7, i16* %22, align 2 | |
%call8 = call i16 @UINT_TO_INT(%UINT_TO_INT_interface* %UINT_TO_INT_instance6) | |
%23 = sext i16 %call8 to i32 | |
%tmpVar9 = sub i32 %23, 1 | |
%24 = trunc i32 %tmpVar9 to i16 | |
%tmpVar10 = icmp sge i16 %load_i5, %24 | |
%25 = zext i1 %tmpVar10 to i8 | |
%26 = icmp ne i8 %25, 0 | |
br label %27 | |
27: ; preds = %21, %condition_check | |
%28 = phi i1 [ %11, %condition_check ], [ %26, %21 ] | |
%29 = zext i1 %28 to i8 | |
%30 = icmp ne i8 %29, 0 | |
br i1 %30, label %34, label %31 | |
31: ; preds = %27 | |
%load_i11 = load i16, i16* %i, align 2 | |
%load_end12 = load i16, i16* %end, align 2 | |
%tmpVar13 = icmp sge i16 %load_i11, %load_end12 | |
%32 = zext i1 %tmpVar13 to i8 | |
%33 = icmp ne i8 %32, 0 | |
br i1 %33, label %38, label %44 | |
34: ; preds = %44, %27 | |
%35 = phi i1 [ %30, %27 ], [ %47, %44 ] | |
%36 = zext i1 %35 to i8 | |
%37 = icmp ne i8 %36, 0 | |
br i1 %37, label %for_body, label %continue | |
38: ; preds = %31 | |
%load_i14 = load i16, i16* %i, align 2 | |
%UINT_TO_INT_instance15 = alloca %UINT_TO_INT_interface, align 8 | |
%39 = getelementptr inbounds %UINT_TO_INT_interface, %UINT_TO_INT_interface* %UINT_TO_INT_instance15, i32 0, i32 0 | |
%load_size16 = load i16, i16* %SIZE, align 2 | |
store i16 %load_size16, i16* %39, align 2 | |
%call17 = call i16 @UINT_TO_INT(%UINT_TO_INT_interface* %UINT_TO_INT_instance15) | |
%40 = sext i16 %call17 to i32 | |
%tmpVar18 = sub i32 %40, 1 | |
%41 = trunc i32 %tmpVar18 to i16 | |
%tmpVar19 = icmp sle i16 %load_i14, %41 | |
%42 = zext i1 %tmpVar19 to i8 | |
%43 = icmp ne i8 %42, 0 | |
br label %44 | |
44: ; preds = %38, %31 | |
%45 = phi i1 [ %33, %31 ], [ %43, %38 ] | |
%46 = zext i1 %45 to i8 | |
%47 = icmp ne i8 %46, 0 | |
br label %34 | |
} | |
define i8 @_BUFFER_UPPERCASE(%_BUFFER_UPPERCASE_interface* %0) { | |
entry: | |
%PT = getelementptr inbounds %_BUFFER_UPPERCASE_interface, %_BUFFER_UPPERCASE_interface* %0, i32 0, i32 0 | |
%SIZE = getelementptr inbounds %_BUFFER_UPPERCASE_interface, %_BUFFER_UPPERCASE_interface* %0, i32 0, i32 1 | |
%pos = getelementptr inbounds %_BUFFER_UPPERCASE_interface, %_BUFFER_UPPERCASE_interface* %0, i32 0, i32 2 | |
%_BUFFER_UPPERCASE = alloca i8, align 1 | |
store i16 0, i16* %pos, align 2 | |
store i8 0, i8* %_BUFFER_UPPERCASE, align 1 | |
store i16 0, i16* %pos, align 2 | |
br label %condition_check | |
condition_check: ; preds = %entry, %while_body | |
%load_pos = load i16, i16* %pos, align 2 | |
%1 = sext i16 %load_pos to i32 | |
%load_size = load i16, i16* %SIZE, align 2 | |
%2 = sext i16 %load_size to i32 | |
%tmpVar = icmp slt i32 %1, %2 | |
br i1 %tmpVar, label %while_body, label %continue | |
while_body: ; preds = %condition_check | |
%deref = load [32001 x i8]*, [32001 x i8]** %PT, align 8 | |
%load_pos1 = load i16, i16* %pos, align 2 | |
%3 = sext i16 %load_pos1 to i32 | |
%tmpVar2 = mul i32 1, %3 | |
%tmpVar3 = add i32 %tmpVar2, 0 | |
%tmpVar4 = getelementptr inbounds [32001 x i8], [32001 x i8]* %deref, i32 0, i32 %tmpVar3 | |
%TO_UPPER_instance = alloca %TO_UPPER_interface, align 8 | |
%4 = getelementptr inbounds %TO_UPPER_interface, %TO_UPPER_interface* %TO_UPPER_instance, i32 0, i32 0 | |
%deref5 = load [32001 x i8]*, [32001 x i8]** %PT, align 8 | |
%load_pos6 = load i16, i16* %pos, align 2 | |
%5 = sext i16 %load_pos6 to i32 | |
%tmpVar7 = mul i32 1, %5 | |
%tmpVar8 = add i32 %tmpVar7, 0 | |
%tmpVar9 = getelementptr inbounds [32001 x i8], [32001 x i8]* %deref5, i32 0, i32 %tmpVar8 | |
%load_tmpVar = load i8, i8* %tmpVar9, align 1 | |
store i8 %load_tmpVar, i8* %4, align 1 | |
%call = call i8 @TO_UPPER(%TO_UPPER_interface* %TO_UPPER_instance) | |
store i8 %call, i8* %tmpVar4, align 1 | |
%load_pos10 = load i16, i16* %pos, align 2 | |
%6 = sext i16 %load_pos10 to i32 | |
%tmpVar11 = add i32 %6, 1 | |
%7 = trunc i32 %tmpVar11 to i16 | |
store i16 %7, i16* %pos, align 2 | |
br label %condition_check | |
continue: ; preds = %condition_check | |
store i8 1, i8* %_BUFFER_UPPERCASE, align 1 | |
%_BUFFER_UPPERCASE_ret = load i8, i8* %_BUFFER_UPPERCASE, align 1 | |
ret i8 %_BUFFER_UPPERCASE_ret | |
} | |
declare i16 @_STRING_TO_BUFFER(%_STRING_TO_BUFFER_interface*) | |
declare i16 @BUFFER_COMP(%BUFFER_COMP_interface*) | |
declare i16 @BUFFER_SEARCH(%BUFFER_SEARCH_interface*) | |
declare [251 x i8] @BUFFER_TO_STRING(%BUFFER_TO_STRING_interface*) | |
define void @DRIVER_1(%DRIVER_1_interface* %0) { | |
entry: | |
%Toggle_Mode = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %0, i32 0, i32 0 | |
%Timeout = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %0, i32 0, i32 1 | |
%SET = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %0, i32 0, i32 2 | |
%IN = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %0, i32 0, i32 3 | |
%RST = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %0, i32 0, i32 4 | |
%Q = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %0, i32 0, i32 5 | |
%off = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %0, i32 0, i32 6 | |
%edge = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %0, i32 0, i32 7 | |
%Q1 = getelementptr inbounds %TON_interface, %TON_interface* %off, i32 0, i32 2 | |
%load_ = load i8, i8* %Q1, align 1 | |
%1 = icmp ne i8 %load_, 0 | |
br i1 %1, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
store i8 0, i8* %Q, align 1 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%load_rst = load i8, i8* %RST, align 1 | |
%2 = icmp ne i8 %load_rst, 0 | |
br i1 %2, label %condition_body4, label %branch | |
condition_body4: ; preds = %continue | |
store i8 0, i8* %Q, align 1 | |
br label %continue3 | |
branch: ; preds = %continue | |
%load_set = load i8, i8* %SET, align 1 | |
%3 = icmp ne i8 %load_set, 0 | |
br i1 %3, label %condition_body5, label %branch2 | |
condition_body5: ; preds = %branch | |
store i8 1, i8* %Q, align 1 | |
br label %continue3 | |
branch2: ; preds = %branch | |
%load_IN = load i8, i8* %IN, align 1 | |
%4 = icmp ne i8 %load_IN, 0 | |
br i1 %4, label %6, label %8 | |
condition_body6: ; preds = %8 | |
%load_toggle_mode = load i8, i8* %Toggle_Mode, align 1 | |
%5 = icmp ne i8 %load_toggle_mode, 0 | |
br i1 %5, label %condition_body8, label %else | |
continue3: ; preds = %continue7, %8, %condition_body5, %condition_body4 | |
%load_in = load i8, i8* %IN, align 1 | |
store i8 %load_in, i8* %edge, align 1 | |
%load_timeout = load i64, i64* %Timeout, align 4 | |
%tmpVar11 = icmp sgt i64 %load_timeout, 0 | |
br i1 %tmpVar11, label %condition_body12, label %continue10 | |
6: ; preds = %branch2 | |
%load_edge = load i8, i8* %edge, align 1 | |
%7 = icmp ne i8 %load_edge, 0 | |
%tmpVar = xor i1 %7, true | |
br label %8 | |
8: ; preds = %6, %branch2 | |
%9 = phi i1 [ %4, %branch2 ], [ %tmpVar, %6 ] | |
br i1 %9, label %condition_body6, label %continue3 | |
condition_body8: ; preds = %condition_body6 | |
%load_Q = load i8, i8* %Q, align 1 | |
%10 = icmp ne i8 %load_Q, 0 | |
%tmpVar9 = xor i1 %10, true | |
%11 = zext i1 %tmpVar9 to i8 | |
store i8 %11, i8* %Q, align 1 | |
br label %continue7 | |
else: ; preds = %condition_body6 | |
store i8 1, i8* %Q, align 1 | |
br label %continue7 | |
continue7: ; preds = %else, %condition_body8 | |
br label %continue3 | |
condition_body12: ; preds = %continue3 | |
%12 = getelementptr inbounds %TON_interface, %TON_interface* %off, i32 0, i32 0 | |
%load_Q13 = load i8, i8* %Q, align 1 | |
store i8 %load_Q13, i8* %12, align 1 | |
%13 = getelementptr inbounds %TON_interface, %TON_interface* %off, i32 0, i32 1 | |
%load_Timeout = load i64, i64* %Timeout, align 4 | |
store i64 %load_Timeout, i64* %13, align 4 | |
call void @TON(%TON_interface* %off) | |
br label %continue10 | |
continue10: ; preds = %condition_body12, %continue3 | |
ret void | |
} | |
define void @DRIVER_4(%DRIVER_4_interface* %0) { | |
entry: | |
%Toggle_Mode = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 0 | |
%Timeout = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 1 | |
%SET = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 2 | |
%IN0 = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 3 | |
%IN1 = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 4 | |
%IN2 = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 5 | |
%IN3 = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 6 | |
%RST = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 7 | |
%Q0 = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 8 | |
%Q1 = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 9 | |
%Q2 = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 10 | |
%Q3 = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 11 | |
%d0 = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 12 | |
%d1 = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 13 | |
%d2 = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 14 | |
%d3 = getelementptr inbounds %DRIVER_4_interface, %DRIVER_4_interface* %0, i32 0, i32 15 | |
%1 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d0, i32 0, i32 2 | |
%load_set = load i8, i8* %SET, align 1 | |
store i8 %load_set, i8* %1, align 1 | |
%2 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d0, i32 0, i32 3 | |
%load_in0 = load i8, i8* %IN0, align 1 | |
store i8 %load_in0, i8* %2, align 1 | |
%3 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d0, i32 0, i32 4 | |
%load_rst = load i8, i8* %RST, align 1 | |
store i8 %load_rst, i8* %3, align 1 | |
%4 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d0, i32 0, i32 0 | |
%load_toggle_mode = load i8, i8* %Toggle_Mode, align 1 | |
store i8 %load_toggle_mode, i8* %4, align 1 | |
%5 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d0, i32 0, i32 1 | |
%load_timeout = load i64, i64* %Timeout, align 4 | |
store i64 %load_timeout, i64* %5, align 4 | |
call void @DRIVER_1(%DRIVER_1_interface* %d0) | |
%6 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d1, i32 0, i32 2 | |
%load_set1 = load i8, i8* %SET, align 1 | |
store i8 %load_set1, i8* %6, align 1 | |
%7 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d1, i32 0, i32 3 | |
%load_in1 = load i8, i8* %IN1, align 1 | |
store i8 %load_in1, i8* %7, align 1 | |
%8 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d1, i32 0, i32 4 | |
%load_rst2 = load i8, i8* %RST, align 1 | |
store i8 %load_rst2, i8* %8, align 1 | |
%9 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d1, i32 0, i32 0 | |
%load_toggle_mode3 = load i8, i8* %Toggle_Mode, align 1 | |
store i8 %load_toggle_mode3, i8* %9, align 1 | |
%10 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d1, i32 0, i32 1 | |
%load_timeout4 = load i64, i64* %Timeout, align 4 | |
store i64 %load_timeout4, i64* %10, align 4 | |
call void @DRIVER_1(%DRIVER_1_interface* %d1) | |
%11 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d2, i32 0, i32 2 | |
%load_set5 = load i8, i8* %SET, align 1 | |
store i8 %load_set5, i8* %11, align 1 | |
%12 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d2, i32 0, i32 3 | |
%load_in2 = load i8, i8* %IN2, align 1 | |
store i8 %load_in2, i8* %12, align 1 | |
%13 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d2, i32 0, i32 4 | |
%load_rst6 = load i8, i8* %RST, align 1 | |
store i8 %load_rst6, i8* %13, align 1 | |
%14 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d2, i32 0, i32 0 | |
%load_toggle_mode7 = load i8, i8* %Toggle_Mode, align 1 | |
store i8 %load_toggle_mode7, i8* %14, align 1 | |
%15 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d2, i32 0, i32 1 | |
%load_timeout8 = load i64, i64* %Timeout, align 4 | |
store i64 %load_timeout8, i64* %15, align 4 | |
call void @DRIVER_1(%DRIVER_1_interface* %d2) | |
%16 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d3, i32 0, i32 2 | |
%load_set9 = load i8, i8* %SET, align 1 | |
store i8 %load_set9, i8* %16, align 1 | |
%17 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d3, i32 0, i32 3 | |
%load_in3 = load i8, i8* %IN3, align 1 | |
store i8 %load_in3, i8* %17, align 1 | |
%18 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d3, i32 0, i32 4 | |
%load_rst10 = load i8, i8* %RST, align 1 | |
store i8 %load_rst10, i8* %18, align 1 | |
%19 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d3, i32 0, i32 0 | |
%load_toggle_mode11 = load i8, i8* %Toggle_Mode, align 1 | |
store i8 %load_toggle_mode11, i8* %19, align 1 | |
%20 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d3, i32 0, i32 1 | |
%load_timeout12 = load i64, i64* %Timeout, align 4 | |
store i64 %load_timeout12, i64* %20, align 4 | |
call void @DRIVER_1(%DRIVER_1_interface* %d3) | |
%Q = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d0, i32 0, i32 5 | |
%load_ = load i8, i8* %Q, align 1 | |
store i8 %load_, i8* %Q0, align 1 | |
%Q13 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d1, i32 0, i32 5 | |
%load_14 = load i8, i8* %Q13, align 1 | |
store i8 %load_14, i8* %Q1, align 1 | |
%Q15 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d2, i32 0, i32 5 | |
%load_16 = load i8, i8* %Q15, align 1 | |
store i8 %load_16, i8* %Q2, align 1 | |
%Q17 = getelementptr inbounds %DRIVER_1_interface, %DRIVER_1_interface* %d3, i32 0, i32 5 | |
%load_18 = load i8, i8* %Q17, align 1 | |
store i8 %load_18, i8* %Q3, align 1 | |
ret void | |
} | |
define void @DRIVER_4C(%DRIVER_4C_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %DRIVER_4C_interface, %DRIVER_4C_interface* %0, i32 0, i32 0 | |
%RST = getelementptr inbounds %DRIVER_4C_interface, %DRIVER_4C_interface* %0, i32 0, i32 1 | |
%Timeout = getelementptr inbounds %DRIVER_4C_interface, %DRIVER_4C_interface* %0, i32 0, i32 2 | |
%SX = getelementptr inbounds %DRIVER_4C_interface, %DRIVER_4C_interface* %0, i32 0, i32 3 | |
%SN = getelementptr inbounds %DRIVER_4C_interface, %DRIVER_4C_interface* %0, i32 0, i32 4 | |
%Q0 = getelementptr inbounds %DRIVER_4C_interface, %DRIVER_4C_interface* %0, i32 0, i32 5 | |
%Q1 = getelementptr inbounds %DRIVER_4C_interface, %DRIVER_4C_interface* %0, i32 0, i32 6 | |
%Q2 = getelementptr inbounds %DRIVER_4C_interface, %DRIVER_4C_interface* %0, i32 0, i32 7 | |
%Q3 = getelementptr inbounds %DRIVER_4C_interface, %DRIVER_4C_interface* %0, i32 0, i32 8 | |
%off = getelementptr inbounds %DRIVER_4C_interface, %DRIVER_4C_interface* %0, i32 0, i32 9 | |
%edge = getelementptr inbounds %DRIVER_4C_interface, %DRIVER_4C_interface* %0, i32 0, i32 10 | |
%load_RST = load i8, i8* %RST, align 1 | |
%1 = icmp ne i8 %load_RST, 0 | |
br i1 %1, label %9, label %7 | |
condition_body: ; preds = %9 | |
store i16 0, i16* %SN, align 2 | |
br label %continue | |
branch: ; preds = %9 | |
%load_IN = load i8, i8* %IN, align 1 | |
%2 = icmp ne i8 %load_IN, 0 | |
br i1 %2, label %11, label %13 | |
condition_body1: ; preds = %13 | |
%load_SN = load i16, i16* %SN, align 2 | |
%3 = sext i16 %load_SN to i32 | |
%tmpVar2 = add i32 %3, 1 | |
%4 = trunc i32 %tmpVar2 to i16 | |
store i16 %4, i16* %SN, align 2 | |
%load_SN4 = load i16, i16* %SN, align 2 | |
%5 = sext i16 %load_SN4 to i32 | |
%tmpVar5 = icmp sgt i32 %5, 7 | |
br i1 %tmpVar5, label %19, label %15 | |
continue: ; preds = %continue3, %13, %condition_body | |
%load_in = load i8, i8* %IN, align 1 | |
store i8 %load_in, i8* %edge, align 1 | |
%load_SN13 = load i16, i16* %SN, align 2 | |
%6 = sext i16 %load_SN13 to i32 | |
%tmpVar14 = icmp sgt i32 %6, 0 | |
br i1 %tmpVar14, label %condition_body15, label %else | |
7: ; preds = %entry | |
%Q = getelementptr inbounds %TON_interface, %TON_interface* %off, i32 0, i32 2 | |
%load_ = load i8, i8* %Q, align 1 | |
%8 = icmp ne i8 %load_, 0 | |
br label %9 | |
9: ; preds = %7, %entry | |
%10 = phi i1 [ %1, %entry ], [ %8, %7 ] | |
br i1 %10, label %condition_body, label %branch | |
11: ; preds = %branch | |
%load_edge = load i8, i8* %edge, align 1 | |
%12 = icmp ne i8 %load_edge, 0 | |
%tmpVar = xor i1 %12, true | |
br label %13 | |
13: ; preds = %11, %branch | |
%14 = phi i1 [ %2, %branch ], [ %tmpVar, %11 ] | |
br i1 %14, label %condition_body1, label %continue | |
condition_body11: ; preds = %19 | |
store i16 0, i16* %SN, align 2 | |
br label %continue3 | |
continue3: ; preds = %condition_body11, %19 | |
br label %continue | |
15: ; preds = %condition_body1 | |
%load_SN6 = load i16, i16* %SN, align 2 | |
%16 = sub i16 %load_SN6, 1 | |
%17 = sext i16 %16 to i32 | |
%tmpVar7 = mul i32 1, %17 | |
%tmpVar8 = add i32 %tmpVar7, 0 | |
%tmpVar9 = getelementptr inbounds [7 x i8], [7 x i8]* %SX, i32 0, i32 %tmpVar8 | |
%load_tmpVar = load i8, i8* %tmpVar9, align 1 | |
%18 = zext i8 %load_tmpVar to i32 | |
%tmpVar10 = icmp eq i32 %18, 0 | |
br label %19 | |
19: ; preds = %15, %condition_body1 | |
%20 = phi i1 [ %tmpVar5, %condition_body1 ], [ %tmpVar10, %15 ] | |
br i1 %20, label %condition_body11, label %continue3 | |
condition_body15: ; preds = %continue | |
%load_SN16 = load i16, i16* %SN, align 2 | |
%21 = sub i16 %load_SN16, 1 | |
%22 = sext i16 %21 to i32 | |
%tmpVar17 = mul i32 1, %22 | |
%tmpVar18 = add i32 %tmpVar17, 0 | |
%tmpVar19 = getelementptr inbounds [7 x i8], [7 x i8]* %SX, i32 0, i32 %tmpVar18 | |
%load_tmpVar20 = load i8, i8* %tmpVar19, align 1 | |
%shift = lshr i8 %load_tmpVar20, 0 | |
store i8 %shift, i8* %Q0, align 1 | |
%load_SN21 = load i16, i16* %SN, align 2 | |
%23 = sub i16 %load_SN21, 1 | |
%24 = sext i16 %23 to i32 | |
%tmpVar22 = mul i32 1, %24 | |
%tmpVar23 = add i32 %tmpVar22, 0 | |
%tmpVar24 = getelementptr inbounds [7 x i8], [7 x i8]* %SX, i32 0, i32 %tmpVar23 | |
%load_tmpVar25 = load i8, i8* %tmpVar24, align 1 | |
%shift26 = lshr i8 %load_tmpVar25, 1 | |
store i8 %shift26, i8* %Q1, align 1 | |
%load_SN27 = load i16, i16* %SN, align 2 | |
%25 = sub i16 %load_SN27, 1 | |
%26 = sext i16 %25 to i32 | |
%tmpVar28 = mul i32 1, %26 | |
%tmpVar29 = add i32 %tmpVar28, 0 | |
%tmpVar30 = getelementptr inbounds [7 x i8], [7 x i8]* %SX, i32 0, i32 %tmpVar29 | |
%load_tmpVar31 = load i8, i8* %tmpVar30, align 1 | |
%shift32 = lshr i8 %load_tmpVar31, 2 | |
store i8 %shift32, i8* %Q2, align 1 | |
%load_SN33 = load i16, i16* %SN, align 2 | |
%27 = sub i16 %load_SN33, 1 | |
%28 = sext i16 %27 to i32 | |
%tmpVar34 = mul i32 1, %28 | |
%tmpVar35 = add i32 %tmpVar34, 0 | |
%tmpVar36 = getelementptr inbounds [7 x i8], [7 x i8]* %SX, i32 0, i32 %tmpVar35 | |
%load_tmpVar37 = load i8, i8* %tmpVar36, align 1 | |
%shift38 = lshr i8 %load_tmpVar37, 3 | |
store i8 %shift38, i8* %Q3, align 1 | |
br label %continue12 | |
else: ; preds = %continue | |
store i8 0, i8* %Q0, align 1 | |
store i8 0, i8* %Q1, align 1 | |
store i8 0, i8* %Q2, align 1 | |
store i8 0, i8* %Q3, align 1 | |
br label %continue12 | |
continue12: ; preds = %else, %condition_body15 | |
%load_timeout = load i64, i64* %Timeout, align 4 | |
%tmpVar40 = icmp sgt i64 %load_timeout, 0 | |
br i1 %tmpVar40, label %condition_body41, label %continue39 | |
condition_body41: ; preds = %continue12 | |
%29 = getelementptr inbounds %TON_interface, %TON_interface* %off, i32 0, i32 0 | |
%load_SN42 = load i16, i16* %SN, align 2 | |
%30 = sext i16 %load_SN42 to i32 | |
%tmpVar43 = icmp sgt i32 %30, 0 | |
%31 = zext i1 %tmpVar43 to i8 | |
store i8 %31, i8* %29, align 1 | |
%32 = getelementptr inbounds %TON_interface, %TON_interface* %off, i32 0, i32 1 | |
%load_Timeout = load i64, i64* %Timeout, align 4 | |
store i64 %load_Timeout, i64* %32, align 4 | |
call void @TON(%TON_interface* %off) | |
br label %continue39 | |
continue39: ; preds = %condition_body41, %continue12 | |
ret void | |
} | |
define void @FLOW_CONTROL(%FLOW_CONTROL_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %FLOW_CONTROL_interface, %FLOW_CONTROL_interface* %0, i32 0, i32 0 | |
%REQ = getelementptr inbounds %FLOW_CONTROL_interface, %FLOW_CONTROL_interface* %0, i32 0, i32 1 | |
%ENQ = getelementptr inbounds %FLOW_CONTROL_interface, %FLOW_CONTROL_interface* %0, i32 0, i32 2 | |
%RST = getelementptr inbounds %FLOW_CONTROL_interface, %FLOW_CONTROL_interface* %0, i32 0, i32 3 | |
%T_AUTO = getelementptr inbounds %FLOW_CONTROL_interface, %FLOW_CONTROL_interface* %0, i32 0, i32 4 | |
%T_DELAY = getelementptr inbounds %FLOW_CONTROL_interface, %FLOW_CONTROL_interface* %0, i32 0, i32 5 | |
%Q = getelementptr inbounds %FLOW_CONTROL_interface, %FLOW_CONTROL_interface* %0, i32 0, i32 6 | |
%STATUS = getelementptr inbounds %FLOW_CONTROL_interface, %FLOW_CONTROL_interface* %0, i32 0, i32 7 | |
%timer = getelementptr inbounds %FLOW_CONTROL_interface, %FLOW_CONTROL_interface* %0, i32 0, i32 8 | |
store i8 100, i8* %STATUS, align 1 | |
%load_RST = load i8, i8* %RST, align 1 | |
%1 = icmp ne i8 %load_RST, 0 | |
br i1 %1, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
store i8 0, i8* %Q, align 1 | |
%2 = getelementptr inbounds %TP_1D_interface, %TP_1D_interface* %timer, i32 0, i32 3 | |
store i8 1, i8* %2, align 1 | |
call void @TP_1D(%TP_1D_interface* %timer) | |
%RST1 = getelementptr inbounds %TP_1D_interface, %TP_1D_interface* %timer, i32 0, i32 3 | |
store i8 0, i8* %RST1, align 1 | |
store i8 103, i8* %STATUS, align 1 | |
br label %continue | |
branch: ; preds = %entry | |
%load_ENQ = load i8, i8* %ENQ, align 1 | |
%3 = icmp ne i8 %load_ENQ, 0 | |
br i1 %3, label %condition_body2, label %continue | |
condition_body2: ; preds = %branch | |
%load_IN = load i8, i8* %IN, align 1 | |
%4 = icmp ne i8 %load_IN, 0 | |
br i1 %4, label %condition_body4, label %continue3 | |
continue: ; preds = %continue5, %branch, %condition_body | |
call void @TP_1D(%TP_1D_interface* %timer) | |
%IN8 = getelementptr inbounds %TP_1D_interface, %TP_1D_interface* %timer, i32 0, i32 0 | |
store i8 0, i8* %IN8, align 1 | |
%load_IN9 = load i8, i8* %IN, align 1 | |
%5 = icmp ne i8 %load_IN9, 0 | |
br i1 %5, label %7, label %9 | |
condition_body4: ; preds = %condition_body2 | |
store i8 101, i8* %STATUS, align 1 | |
br label %continue3 | |
continue3: ; preds = %condition_body4, %condition_body2 | |
%load_REQ = load i8, i8* %REQ, align 1 | |
%6 = icmp ne i8 %load_REQ, 0 | |
br i1 %6, label %condition_body6, label %continue5 | |
condition_body6: ; preds = %continue3 | |
%PT1 = getelementptr inbounds %TP_1D_interface, %TP_1D_interface* %timer, i32 0, i32 1 | |
%load_T_AUTO = load i64, i64* %T_AUTO, align 4 | |
store i64 %load_T_AUTO, i64* %PT1, align 4 | |
%PTD = getelementptr inbounds %TP_1D_interface, %TP_1D_interface* %timer, i32 0, i32 2 | |
%load_T_DELAY = load i64, i64* %T_DELAY, align 4 | |
store i64 %load_T_DELAY, i64* %PTD, align 4 | |
%IN7 = getelementptr inbounds %TP_1D_interface, %TP_1D_interface* %timer, i32 0, i32 0 | |
store i8 1, i8* %IN7, align 1 | |
store i8 102, i8* %STATUS, align 1 | |
br label %continue5 | |
continue5: ; preds = %condition_body6, %continue3 | |
br label %continue | |
7: ; preds = %continue | |
%load_ENQ10 = load i8, i8* %ENQ, align 1 | |
%8 = icmp ne i8 %load_ENQ10, 0 | |
br label %9 | |
9: ; preds = %7, %continue | |
%10 = phi i1 [ %5, %continue ], [ %8, %7 ] | |
br i1 %10, label %13, label %11 | |
11: ; preds = %9 | |
%Q11 = getelementptr inbounds %TP_1D_interface, %TP_1D_interface* %timer, i32 0, i32 4 | |
%load_ = load i8, i8* %Q11, align 1 | |
%12 = icmp ne i8 %load_, 0 | |
br label %13 | |
13: ; preds = %11, %9 | |
%14 = phi i1 [ %10, %9 ], [ %12, %11 ] | |
%15 = zext i1 %14 to i8 | |
store i8 %15, i8* %Q, align 1 | |
ret void | |
} | |
define void @FT_Profile(%FT_Profile_interface* %0) { | |
entry: | |
%K = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 0 | |
%O = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 1 | |
%M = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 2 | |
%E = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 3 | |
%value_0 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 4 | |
%time_1 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 5 | |
%value_1 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 6 | |
%time_2 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 7 | |
%value_2 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 8 | |
%time_3 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 9 | |
%value_3 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 10 | |
%time_10 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 11 | |
%value_10 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 12 | |
%time_11 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 13 | |
%value_11 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 14 | |
%time_12 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 15 | |
%value_12 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 16 | |
%time_13 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 17 | |
%value_13 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 18 | |
%Y = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 19 | |
%RUN = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 20 | |
%ET = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 21 | |
%tx = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 22 | |
%edge = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 23 | |
%state = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 24 | |
%ta = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 25 | |
%tb = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 26 | |
%t0 = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 27 | |
%temp = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 28 | |
%va = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 29 | |
%vb = getelementptr inbounds %FT_Profile_interface, %FT_Profile_interface* %0, i32 0, i32 30 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call1, i64* %tx, align 4 | |
%load_E = load i8, i8* %E, align 1 | |
%2 = icmp ne i8 %load_E, 0 | |
br i1 %2, label %6, label %8 | |
condition_body: ; preds = %8 | |
store i8 1, i8* %RUN, align 1 | |
store i64 0, i64* %ET, align 4 | |
%load_tx = load i64, i64* %tx, align 4 | |
store i64 %load_tx, i64* %t0, align 4 | |
%load_tx2 = load i64, i64* %tx, align 4 | |
store i64 %load_tx2, i64* %ta, align 4 | |
%MULTIME_instance = alloca %MULTIME_interface, align 8 | |
%3 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance, i32 0, i32 0 | |
%load_time_1 = load i64, i64* %time_1, align 4 | |
store i64 %load_time_1, i64* %3, align 4 | |
%4 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance, i32 0, i32 1 | |
%load_M = load float, float* %M, align 4 | |
store float %load_M, float* %4, align 4 | |
%call3 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance) | |
store i64 %call3, i64* %tb, align 4 | |
%load_value_0 = load float, float* %value_0, align 4 | |
store float %load_value_0, float* %va, align 4 | |
%load_value_1 = load float, float* %value_1, align 4 | |
store float %load_value_1, float* %vb, align 4 | |
%load_value_04 = load float, float* %value_0, align 4 | |
store float %load_value_04, float* %temp, align 4 | |
store i8 1, i8* %state, align 1 | |
br label %continue | |
continue: ; preds = %condition_body, %8 | |
%load_E5 = load i8, i8* %E, align 1 | |
store i8 %load_E5, i8* %edge, align 1 | |
%load_run = load i8, i8* %RUN, align 1 | |
%5 = icmp ne i8 %load_run, 0 | |
br i1 %5, label %condition_body7, label %continue6 | |
6: ; preds = %entry | |
%load_edge = load i8, i8* %edge, align 1 | |
%7 = icmp ne i8 %load_edge, 0 | |
%tmpVar = xor i1 %7, true | |
br label %8 | |
8: ; preds = %6, %entry | |
%9 = phi i1 [ %2, %entry ], [ %tmpVar, %6 ] | |
br i1 %9, label %condition_body, label %continue | |
condition_body7: ; preds = %continue | |
%load_state = load i8, i8* %state, align 1 | |
switch i8 %load_state, label %else [ | |
i8 1, label %case | |
i8 2, label %case37 | |
i8 3, label %case71 | |
i8 4, label %case105 | |
i8 5, label %case143 | |
i8 6, label %case149 | |
i8 7, label %case183 | |
i8 8, label %case217 | |
] | |
continue6: ; preds = %continue8, %continue | |
ret void | |
case: ; preds = %condition_body7 | |
%load_tx11 = load i64, i64* %tx, align 4 | |
%load_ta = load i64, i64* %ta, align 4 | |
%tmpVar12 = sub i64 %load_tx11, %load_ta | |
%load_tb = load i64, i64* %tb, align 4 | |
%tmpVar13 = icmp sge i64 %tmpVar12, %load_tb | |
br i1 %tmpVar13, label %condition_body14, label %else9 | |
case37: ; preds = %condition_body7 | |
%load_tx40 = load i64, i64* %tx, align 4 | |
%load_ta41 = load i64, i64* %ta, align 4 | |
%tmpVar42 = sub i64 %load_tx40, %load_ta41 | |
%load_tb43 = load i64, i64* %tb, align 4 | |
%tmpVar44 = icmp sge i64 %tmpVar42, %load_tb43 | |
br i1 %tmpVar44, label %condition_body45, label %else38 | |
case71: ; preds = %condition_body7 | |
%load_tx74 = load i64, i64* %tx, align 4 | |
%load_ta75 = load i64, i64* %ta, align 4 | |
%tmpVar76 = sub i64 %load_tx74, %load_ta75 | |
%load_tb77 = load i64, i64* %tb, align 4 | |
%tmpVar78 = icmp sge i64 %tmpVar76, %load_tb77 | |
br i1 %tmpVar78, label %condition_body79, label %else72 | |
case105: ; preds = %condition_body7 | |
%load_tx108 = load i64, i64* %tx, align 4 | |
%load_ta109 = load i64, i64* %ta, align 4 | |
%tmpVar110 = sub i64 %load_tx108, %load_ta109 | |
%load_tb111 = load i64, i64* %tb, align 4 | |
%tmpVar112 = icmp sge i64 %tmpVar110, %load_tb111 | |
br i1 %tmpVar112, label %condition_body113, label %else106 | |
case143: ; preds = %condition_body7 | |
%load_E146 = load i8, i8* %E, align 1 | |
%10 = icmp ne i8 %load_E146, 0 | |
br i1 %10, label %condition_body147, label %else144 | |
case149: ; preds = %condition_body7 | |
%load_tx152 = load i64, i64* %tx, align 4 | |
%load_ta153 = load i64, i64* %ta, align 4 | |
%tmpVar154 = sub i64 %load_tx152, %load_ta153 | |
%load_tb155 = load i64, i64* %tb, align 4 | |
%tmpVar156 = icmp sge i64 %tmpVar154, %load_tb155 | |
br i1 %tmpVar156, label %condition_body157, label %else150 | |
case183: ; preds = %condition_body7 | |
%load_tx186 = load i64, i64* %tx, align 4 | |
%load_ta187 = load i64, i64* %ta, align 4 | |
%tmpVar188 = sub i64 %load_tx186, %load_ta187 | |
%load_tb189 = load i64, i64* %tb, align 4 | |
%tmpVar190 = icmp sge i64 %tmpVar188, %load_tb189 | |
br i1 %tmpVar190, label %condition_body191, label %else184 | |
case217: ; preds = %condition_body7 | |
%load_tx220 = load i64, i64* %tx, align 4 | |
%load_ta221 = load i64, i64* %ta, align 4 | |
%tmpVar222 = sub i64 %load_tx220, %load_ta221 | |
%load_tb223 = load i64, i64* %tb, align 4 | |
%tmpVar224 = icmp sge i64 %tmpVar222, %load_tb223 | |
br i1 %tmpVar224, label %condition_body225, label %else218 | |
else: ; preds = %condition_body7 | |
br label %continue8 | |
continue8: ; preds = %else, %continue219, %continue185, %continue151, %continue145, %continue107, %continue73, %continue39, %continue10 | |
%load_temp = load float, float* %temp, align 4 | |
%load_K = load float, float* %K, align 4 | |
%tmpVar242 = fmul float %load_temp, %load_K | |
%load_O = load float, float* %O, align 4 | |
%tmpVar243 = fadd float %tmpVar242, %load_O | |
store float %tmpVar243, float* %Y, align 4 | |
%load_tx244 = load i64, i64* %tx, align 4 | |
%load_t0 = load i64, i64* %t0, align 4 | |
%tmpVar245 = sub i64 %load_tx244, %load_t0 | |
store i64 %tmpVar245, i64* %ET, align 4 | |
br label %continue6 | |
condition_body14: ; preds = %case | |
%load_ta15 = load i64, i64* %ta, align 4 | |
%load_tb16 = load i64, i64* %tb, align 4 | |
%tmpVar17 = add i64 %load_ta15, %load_tb16 | |
store i64 %tmpVar17, i64* %ta, align 4 | |
%MULTIME_instance18 = alloca %MULTIME_interface, align 8 | |
%11 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance18, i32 0, i32 0 | |
%load_time_2 = load i64, i64* %time_2, align 4 | |
%load_time_119 = load i64, i64* %time_1, align 4 | |
%tmpVar20 = sub i64 %load_time_2, %load_time_119 | |
store i64 %tmpVar20, i64* %11, align 4 | |
%12 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance18, i32 0, i32 1 | |
%load_M21 = load float, float* %M, align 4 | |
store float %load_M21, float* %12, align 4 | |
%call22 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance18) | |
store i64 %call22, i64* %tb, align 4 | |
%load_value_123 = load float, float* %value_1, align 4 | |
store float %load_value_123, float* %va, align 4 | |
%load_value_2 = load float, float* %value_2, align 4 | |
store float %load_value_2, float* %vb, align 4 | |
%load_value_124 = load float, float* %value_1, align 4 | |
store float %load_value_124, float* %temp, align 4 | |
store i8 2, i8* %state, align 1 | |
br label %continue10 | |
else9: ; preds = %case | |
%load_vb = load float, float* %vb, align 4 | |
%load_va = load float, float* %va, align 4 | |
%tmpVar25 = fsub float %load_vb, %load_va | |
%TIME_TO_REAL_instance = alloca %TIME_TO_REAL_interface, align 8 | |
%13 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance, i32 0, i32 0 | |
%load_tx26 = load i64, i64* %tx, align 4 | |
%load_ta27 = load i64, i64* %ta, align 4 | |
%tmpVar28 = sub i64 %load_tx26, %load_ta27 | |
store i64 %tmpVar28, i64* %13, align 4 | |
%call29 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance) | |
%tmpVar30 = fmul float %tmpVar25, %call29 | |
%TIME_TO_REAL_instance31 = alloca %TIME_TO_REAL_interface, align 8 | |
%14 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance31, i32 0, i32 0 | |
%load_tb32 = load i64, i64* %tb, align 4 | |
store i64 %load_tb32, i64* %14, align 4 | |
%call33 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance31) | |
%tmpVar34 = fdiv float %tmpVar30, %call33 | |
%load_va35 = load float, float* %va, align 4 | |
%tmpVar36 = fadd float %tmpVar34, %load_va35 | |
store float %tmpVar36, float* %temp, align 4 | |
br label %continue10 | |
continue10: ; preds = %else9, %condition_body14 | |
br label %continue8 | |
condition_body45: ; preds = %case37 | |
%load_ta46 = load i64, i64* %ta, align 4 | |
%load_tb47 = load i64, i64* %tb, align 4 | |
%tmpVar48 = add i64 %load_ta46, %load_tb47 | |
store i64 %tmpVar48, i64* %ta, align 4 | |
%MULTIME_instance49 = alloca %MULTIME_interface, align 8 | |
%15 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance49, i32 0, i32 0 | |
%load_time_3 = load i64, i64* %time_3, align 4 | |
%load_time_250 = load i64, i64* %time_2, align 4 | |
%tmpVar51 = sub i64 %load_time_3, %load_time_250 | |
store i64 %tmpVar51, i64* %15, align 4 | |
%16 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance49, i32 0, i32 1 | |
%load_M52 = load float, float* %M, align 4 | |
store float %load_M52, float* %16, align 4 | |
%call53 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance49) | |
store i64 %call53, i64* %tb, align 4 | |
%load_value_254 = load float, float* %value_2, align 4 | |
store float %load_value_254, float* %va, align 4 | |
%load_value_3 = load float, float* %value_3, align 4 | |
store float %load_value_3, float* %vb, align 4 | |
%load_value_255 = load float, float* %value_2, align 4 | |
store float %load_value_255, float* %temp, align 4 | |
store i8 3, i8* %state, align 1 | |
br label %continue39 | |
else38: ; preds = %case37 | |
%load_vb56 = load float, float* %vb, align 4 | |
%load_va57 = load float, float* %va, align 4 | |
%tmpVar58 = fsub float %load_vb56, %load_va57 | |
%TIME_TO_REAL_instance59 = alloca %TIME_TO_REAL_interface, align 8 | |
%17 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance59, i32 0, i32 0 | |
%load_tx60 = load i64, i64* %tx, align 4 | |
%load_ta61 = load i64, i64* %ta, align 4 | |
%tmpVar62 = sub i64 %load_tx60, %load_ta61 | |
store i64 %tmpVar62, i64* %17, align 4 | |
%call63 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance59) | |
%tmpVar64 = fmul float %tmpVar58, %call63 | |
%TIME_TO_REAL_instance65 = alloca %TIME_TO_REAL_interface, align 8 | |
%18 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance65, i32 0, i32 0 | |
%load_tb66 = load i64, i64* %tb, align 4 | |
store i64 %load_tb66, i64* %18, align 4 | |
%call67 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance65) | |
%tmpVar68 = fdiv float %tmpVar64, %call67 | |
%load_va69 = load float, float* %va, align 4 | |
%tmpVar70 = fadd float %tmpVar68, %load_va69 | |
store float %tmpVar70, float* %temp, align 4 | |
br label %continue39 | |
continue39: ; preds = %else38, %condition_body45 | |
br label %continue8 | |
condition_body79: ; preds = %case71 | |
%load_ta80 = load i64, i64* %ta, align 4 | |
%load_tb81 = load i64, i64* %tb, align 4 | |
%tmpVar82 = add i64 %load_ta80, %load_tb81 | |
store i64 %tmpVar82, i64* %ta, align 4 | |
%MULTIME_instance83 = alloca %MULTIME_interface, align 8 | |
%19 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance83, i32 0, i32 0 | |
%load_time_10 = load i64, i64* %time_10, align 4 | |
%load_time_384 = load i64, i64* %time_3, align 4 | |
%tmpVar85 = sub i64 %load_time_10, %load_time_384 | |
store i64 %tmpVar85, i64* %19, align 4 | |
%20 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance83, i32 0, i32 1 | |
%load_M86 = load float, float* %M, align 4 | |
store float %load_M86, float* %20, align 4 | |
%call87 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance83) | |
store i64 %call87, i64* %tb, align 4 | |
%load_value_388 = load float, float* %value_3, align 4 | |
store float %load_value_388, float* %va, align 4 | |
%load_value_10 = load float, float* %value_10, align 4 | |
store float %load_value_10, float* %vb, align 4 | |
%load_value_389 = load float, float* %value_3, align 4 | |
store float %load_value_389, float* %temp, align 4 | |
store i8 4, i8* %state, align 1 | |
br label %continue73 | |
else72: ; preds = %case71 | |
%load_vb90 = load float, float* %vb, align 4 | |
%load_va91 = load float, float* %va, align 4 | |
%tmpVar92 = fsub float %load_vb90, %load_va91 | |
%TIME_TO_REAL_instance93 = alloca %TIME_TO_REAL_interface, align 8 | |
%21 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance93, i32 0, i32 0 | |
%load_tx94 = load i64, i64* %tx, align 4 | |
%load_ta95 = load i64, i64* %ta, align 4 | |
%tmpVar96 = sub i64 %load_tx94, %load_ta95 | |
store i64 %tmpVar96, i64* %21, align 4 | |
%call97 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance93) | |
%tmpVar98 = fmul float %tmpVar92, %call97 | |
%TIME_TO_REAL_instance99 = alloca %TIME_TO_REAL_interface, align 8 | |
%22 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance99, i32 0, i32 0 | |
%load_tb100 = load i64, i64* %tb, align 4 | |
store i64 %load_tb100, i64* %22, align 4 | |
%call101 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance99) | |
%tmpVar102 = fdiv float %tmpVar98, %call101 | |
%load_va103 = load float, float* %va, align 4 | |
%tmpVar104 = fadd float %tmpVar102, %load_va103 | |
store float %tmpVar104, float* %temp, align 4 | |
br label %continue73 | |
continue73: ; preds = %else72, %condition_body79 | |
br label %continue8 | |
condition_body113: ; preds = %case105 | |
%load_ta114 = load i64, i64* %ta, align 4 | |
%load_tb115 = load i64, i64* %tb, align 4 | |
%tmpVar116 = add i64 %load_ta114, %load_tb115 | |
store i64 %tmpVar116, i64* %ta, align 4 | |
%MULTIME_instance117 = alloca %MULTIME_interface, align 8 | |
%23 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance117, i32 0, i32 0 | |
%load_time_11 = load i64, i64* %time_11, align 4 | |
%load_time_10118 = load i64, i64* %time_10, align 4 | |
%tmpVar119 = sub i64 %load_time_11, %load_time_10118 | |
store i64 %tmpVar119, i64* %23, align 4 | |
%24 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance117, i32 0, i32 1 | |
%load_M120 = load float, float* %M, align 4 | |
store float %load_M120, float* %24, align 4 | |
%call121 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance117) | |
store i64 %call121, i64* %tb, align 4 | |
%load_value_10122 = load float, float* %value_10, align 4 | |
store float %load_value_10122, float* %va, align 4 | |
%load_value_11 = load float, float* %value_11, align 4 | |
store float %load_value_11, float* %vb, align 4 | |
%load_value_10123 = load float, float* %value_10, align 4 | |
store float %load_value_10123, float* %temp, align 4 | |
%load_E126 = load i8, i8* %E, align 1 | |
%25 = icmp ne i8 %load_E126, 0 | |
br i1 %25, label %condition_body127, label %else124 | |
else106: ; preds = %case105 | |
%load_vb128 = load float, float* %vb, align 4 | |
%load_va129 = load float, float* %va, align 4 | |
%tmpVar130 = fsub float %load_vb128, %load_va129 | |
%TIME_TO_REAL_instance131 = alloca %TIME_TO_REAL_interface, align 8 | |
%26 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance131, i32 0, i32 0 | |
%load_tx132 = load i64, i64* %tx, align 4 | |
%load_ta133 = load i64, i64* %ta, align 4 | |
%tmpVar134 = sub i64 %load_tx132, %load_ta133 | |
store i64 %tmpVar134, i64* %26, align 4 | |
%call135 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance131) | |
%tmpVar136 = fmul float %tmpVar130, %call135 | |
%TIME_TO_REAL_instance137 = alloca %TIME_TO_REAL_interface, align 8 | |
%27 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance137, i32 0, i32 0 | |
%load_tb138 = load i64, i64* %tb, align 4 | |
store i64 %load_tb138, i64* %27, align 4 | |
%call139 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance137) | |
%tmpVar140 = fdiv float %tmpVar136, %call139 | |
%load_va141 = load float, float* %va, align 4 | |
%tmpVar142 = fadd float %tmpVar140, %load_va141 | |
store float %tmpVar142, float* %temp, align 4 | |
br label %continue107 | |
continue107: ; preds = %else106, %continue125 | |
br label %continue8 | |
condition_body127: ; preds = %condition_body113 | |
store i8 5, i8* %state, align 1 | |
br label %continue125 | |
else124: ; preds = %condition_body113 | |
store i8 6, i8* %state, align 1 | |
br label %continue125 | |
continue125: ; preds = %else124, %condition_body127 | |
br label %continue107 | |
condition_body147: ; preds = %case143 | |
%load_tx148 = load i64, i64* %tx, align 4 | |
store i64 %load_tx148, i64* %ta, align 4 | |
br label %continue145 | |
else144: ; preds = %case143 | |
store i8 6, i8* %state, align 1 | |
br label %continue145 | |
continue145: ; preds = %else144, %condition_body147 | |
br label %continue8 | |
condition_body157: ; preds = %case149 | |
%load_ta158 = load i64, i64* %ta, align 4 | |
%load_tb159 = load i64, i64* %tb, align 4 | |
%tmpVar160 = add i64 %load_ta158, %load_tb159 | |
store i64 %tmpVar160, i64* %ta, align 4 | |
%MULTIME_instance161 = alloca %MULTIME_interface, align 8 | |
%28 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance161, i32 0, i32 0 | |
%load_time_12 = load i64, i64* %time_12, align 4 | |
%load_time_11162 = load i64, i64* %time_11, align 4 | |
%tmpVar163 = sub i64 %load_time_12, %load_time_11162 | |
store i64 %tmpVar163, i64* %28, align 4 | |
%29 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance161, i32 0, i32 1 | |
%load_M164 = load float, float* %M, align 4 | |
store float %load_M164, float* %29, align 4 | |
%call165 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance161) | |
store i64 %call165, i64* %tb, align 4 | |
%load_value_11166 = load float, float* %value_11, align 4 | |
store float %load_value_11166, float* %va, align 4 | |
%load_value_12 = load float, float* %value_12, align 4 | |
store float %load_value_12, float* %vb, align 4 | |
%load_value_11167 = load float, float* %value_11, align 4 | |
store float %load_value_11167, float* %temp, align 4 | |
store i8 7, i8* %state, align 1 | |
br label %continue151 | |
else150: ; preds = %case149 | |
%load_vb168 = load float, float* %vb, align 4 | |
%load_va169 = load float, float* %va, align 4 | |
%tmpVar170 = fsub float %load_vb168, %load_va169 | |
%TIME_TO_REAL_instance171 = alloca %TIME_TO_REAL_interface, align 8 | |
%30 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance171, i32 0, i32 0 | |
%load_tx172 = load i64, i64* %tx, align 4 | |
%load_ta173 = load i64, i64* %ta, align 4 | |
%tmpVar174 = sub i64 %load_tx172, %load_ta173 | |
store i64 %tmpVar174, i64* %30, align 4 | |
%call175 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance171) | |
%tmpVar176 = fmul float %tmpVar170, %call175 | |
%TIME_TO_REAL_instance177 = alloca %TIME_TO_REAL_interface, align 8 | |
%31 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance177, i32 0, i32 0 | |
%load_tb178 = load i64, i64* %tb, align 4 | |
store i64 %load_tb178, i64* %31, align 4 | |
%call179 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance177) | |
%tmpVar180 = fdiv float %tmpVar176, %call179 | |
%load_va181 = load float, float* %va, align 4 | |
%tmpVar182 = fadd float %tmpVar180, %load_va181 | |
store float %tmpVar182, float* %temp, align 4 | |
br label %continue151 | |
continue151: ; preds = %else150, %condition_body157 | |
br label %continue8 | |
condition_body191: ; preds = %case183 | |
%load_ta192 = load i64, i64* %ta, align 4 | |
%load_tb193 = load i64, i64* %tb, align 4 | |
%tmpVar194 = add i64 %load_ta192, %load_tb193 | |
store i64 %tmpVar194, i64* %ta, align 4 | |
%MULTIME_instance195 = alloca %MULTIME_interface, align 8 | |
%32 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance195, i32 0, i32 0 | |
%load_time_13 = load i64, i64* %time_13, align 4 | |
%load_time_12196 = load i64, i64* %time_12, align 4 | |
%tmpVar197 = sub i64 %load_time_13, %load_time_12196 | |
store i64 %tmpVar197, i64* %32, align 4 | |
%33 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance195, i32 0, i32 1 | |
%load_M198 = load float, float* %M, align 4 | |
store float %load_M198, float* %33, align 4 | |
%call199 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance195) | |
store i64 %call199, i64* %tb, align 4 | |
%load_value_12200 = load float, float* %value_12, align 4 | |
store float %load_value_12200, float* %va, align 4 | |
%load_value_13 = load float, float* %value_13, align 4 | |
store float %load_value_13, float* %vb, align 4 | |
%load_value_12201 = load float, float* %value_12, align 4 | |
store float %load_value_12201, float* %temp, align 4 | |
store i8 8, i8* %state, align 1 | |
br label %continue185 | |
else184: ; preds = %case183 | |
%load_vb202 = load float, float* %vb, align 4 | |
%load_va203 = load float, float* %va, align 4 | |
%tmpVar204 = fsub float %load_vb202, %load_va203 | |
%TIME_TO_REAL_instance205 = alloca %TIME_TO_REAL_interface, align 8 | |
%34 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance205, i32 0, i32 0 | |
%load_tx206 = load i64, i64* %tx, align 4 | |
%load_ta207 = load i64, i64* %ta, align 4 | |
%tmpVar208 = sub i64 %load_tx206, %load_ta207 | |
store i64 %tmpVar208, i64* %34, align 4 | |
%call209 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance205) | |
%tmpVar210 = fmul float %tmpVar204, %call209 | |
%TIME_TO_REAL_instance211 = alloca %TIME_TO_REAL_interface, align 8 | |
%35 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance211, i32 0, i32 0 | |
%load_tb212 = load i64, i64* %tb, align 4 | |
store i64 %load_tb212, i64* %35, align 4 | |
%call213 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance211) | |
%tmpVar214 = fdiv float %tmpVar210, %call213 | |
%load_va215 = load float, float* %va, align 4 | |
%tmpVar216 = fadd float %tmpVar214, %load_va215 | |
store float %tmpVar216, float* %temp, align 4 | |
br label %continue185 | |
continue185: ; preds = %else184, %condition_body191 | |
br label %continue8 | |
condition_body225: ; preds = %case217 | |
%load_value_13226 = load float, float* %value_13, align 4 | |
store float %load_value_13226, float* %temp, align 4 | |
store i8 0, i8* %RUN, align 1 | |
br label %continue219 | |
else218: ; preds = %case217 | |
%load_vb227 = load float, float* %vb, align 4 | |
%load_va228 = load float, float* %va, align 4 | |
%tmpVar229 = fsub float %load_vb227, %load_va228 | |
%TIME_TO_REAL_instance230 = alloca %TIME_TO_REAL_interface, align 8 | |
%36 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance230, i32 0, i32 0 | |
%load_tx231 = load i64, i64* %tx, align 4 | |
%load_ta232 = load i64, i64* %ta, align 4 | |
%tmpVar233 = sub i64 %load_tx231, %load_ta232 | |
store i64 %tmpVar233, i64* %36, align 4 | |
%call234 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance230) | |
%tmpVar235 = fmul float %tmpVar229, %call234 | |
%TIME_TO_REAL_instance236 = alloca %TIME_TO_REAL_interface, align 8 | |
%37 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance236, i32 0, i32 0 | |
%load_tb237 = load i64, i64* %tb, align 4 | |
store i64 %load_tb237, i64* %37, align 4 | |
%call238 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance236) | |
%tmpVar239 = fdiv float %tmpVar235, %call238 | |
%load_va240 = load float, float* %va, align 4 | |
%tmpVar241 = fadd float %tmpVar239, %load_va240 | |
store float %tmpVar241, float* %temp, align 4 | |
br label %continue219 | |
continue219: ; preds = %else218, %condition_body225 | |
br label %continue8 | |
} | |
define void @INC_DEC(%INC_DEC_interface* %0) { | |
entry: | |
%CHa = getelementptr inbounds %INC_DEC_interface, %INC_DEC_interface* %0, i32 0, i32 0 | |
%CHb = getelementptr inbounds %INC_DEC_interface, %INC_DEC_interface* %0, i32 0, i32 1 | |
%RST = getelementptr inbounds %INC_DEC_interface, %INC_DEC_interface* %0, i32 0, i32 2 | |
%dir = getelementptr inbounds %INC_DEC_interface, %INC_DEC_interface* %0, i32 0, i32 3 | |
%cnt = getelementptr inbounds %INC_DEC_interface, %INC_DEC_interface* %0, i32 0, i32 4 | |
%edgea = getelementptr inbounds %INC_DEC_interface, %INC_DEC_interface* %0, i32 0, i32 5 | |
%clk = getelementptr inbounds %INC_DEC_interface, %INC_DEC_interface* %0, i32 0, i32 6 | |
%clka = getelementptr inbounds %INC_DEC_interface, %INC_DEC_interface* %0, i32 0, i32 7 | |
%clkb = getelementptr inbounds %INC_DEC_interface, %INC_DEC_interface* %0, i32 0, i32 8 | |
%edgeb = getelementptr inbounds %INC_DEC_interface, %INC_DEC_interface* %0, i32 0, i32 9 | |
%axb = getelementptr inbounds %INC_DEC_interface, %INC_DEC_interface* %0, i32 0, i32 10 | |
%load_cha = load i8, i8* %CHa, align 1 | |
%1 = icmp ne i8 %load_cha, 0 | |
%load_chb = load i8, i8* %CHb, align 1 | |
%2 = icmp ne i8 %load_chb, 0 | |
%3 = xor i1 %1, %2 | |
%4 = zext i1 %3 to i8 | |
store i8 %4, i8* %axb, align 1 | |
%load_cha1 = load i8, i8* %CHa, align 1 | |
%5 = icmp ne i8 %load_cha1, 0 | |
%load_edgea = load i8, i8* %edgea, align 1 | |
%6 = icmp ne i8 %load_edgea, 0 | |
%7 = xor i1 %5, %6 | |
%8 = zext i1 %7 to i8 | |
store i8 %8, i8* %clka, align 1 | |
%load_cha2 = load i8, i8* %CHa, align 1 | |
store i8 %load_cha2, i8* %edgea, align 1 | |
%load_chb3 = load i8, i8* %CHb, align 1 | |
%9 = icmp ne i8 %load_chb3, 0 | |
%load_edgeb = load i8, i8* %edgeb, align 1 | |
%10 = icmp ne i8 %load_edgeb, 0 | |
%11 = xor i1 %9, %10 | |
%12 = zext i1 %11 to i8 | |
store i8 %12, i8* %clkb, align 1 | |
%load_chb4 = load i8, i8* %CHb, align 1 | |
store i8 %load_chb4, i8* %edgeb, align 1 | |
%load_clka = load i8, i8* %clka, align 1 | |
%13 = icmp ne i8 %load_clka, 0 | |
br i1 %13, label %16, label %14 | |
14: ; preds = %entry | |
%load_clkb = load i8, i8* %clkb, align 1 | |
%15 = icmp ne i8 %load_clkb, 0 | |
br label %16 | |
16: ; preds = %14, %entry | |
%17 = phi i1 [ %13, %entry ], [ %15, %14 ] | |
%18 = zext i1 %17 to i8 | |
store i8 %18, i8* %clk, align 1 | |
%load_axb = load i8, i8* %axb, align 1 | |
%19 = icmp ne i8 %load_axb, 0 | |
br i1 %19, label %21, label %23 | |
condition_body: ; preds = %23 | |
store i8 1, i8* %dir, align 1 | |
br label %continue | |
continue: ; preds = %condition_body, %23 | |
%load_axb7 = load i8, i8* %axb, align 1 | |
%20 = icmp ne i8 %load_axb7, 0 | |
br i1 %20, label %26, label %28 | |
21: ; preds = %16 | |
%load_clka5 = load i8, i8* %clka, align 1 | |
%22 = icmp ne i8 %load_clka5, 0 | |
br label %23 | |
23: ; preds = %21, %16 | |
%24 = phi i1 [ %19, %16 ], [ %22, %21 ] | |
br i1 %24, label %condition_body, label %continue | |
condition_body9: ; preds = %28 | |
store i8 0, i8* %dir, align 1 | |
br label %continue6 | |
continue6: ; preds = %condition_body9, %28 | |
%load_clk = load i8, i8* %clk, align 1 | |
%25 = icmp ne i8 %load_clk, 0 | |
br i1 %25, label %33, label %35 | |
26: ; preds = %continue | |
%load_clkb8 = load i8, i8* %clkb, align 1 | |
%27 = icmp ne i8 %load_clkb8, 0 | |
br label %28 | |
28: ; preds = %26, %continue | |
%29 = phi i1 [ %20, %continue ], [ %27, %26 ] | |
br i1 %29, label %condition_body9, label %continue6 | |
condition_body11: ; preds = %35 | |
%load_cnt = load i16, i16* %cnt, align 2 | |
%30 = sext i16 %load_cnt to i32 | |
%tmpVar = add i32 %30, 1 | |
%31 = trunc i32 %tmpVar to i16 | |
store i16 %31, i16* %cnt, align 2 | |
br label %continue10 | |
continue10: ; preds = %condition_body11, %35 | |
%load_clk13 = load i8, i8* %clk, align 1 | |
%32 = icmp ne i8 %load_clk13, 0 | |
br i1 %32, label %40, label %42 | |
33: ; preds = %continue6 | |
%load_dir = load i8, i8* %dir, align 1 | |
%34 = icmp ne i8 %load_dir, 0 | |
br label %35 | |
35: ; preds = %33, %continue6 | |
%36 = phi i1 [ %25, %continue6 ], [ %34, %33 ] | |
br i1 %36, label %condition_body11, label %continue10 | |
condition_body16: ; preds = %42 | |
%load_cnt17 = load i16, i16* %cnt, align 2 | |
%37 = sext i16 %load_cnt17 to i32 | |
%tmpVar18 = sub i32 %37, 1 | |
%38 = trunc i32 %tmpVar18 to i16 | |
store i16 %38, i16* %cnt, align 2 | |
br label %continue12 | |
continue12: ; preds = %condition_body16, %42 | |
%load_rst = load i8, i8* %RST, align 1 | |
%39 = icmp ne i8 %load_rst, 0 | |
br i1 %39, label %condition_body20, label %continue19 | |
40: ; preds = %continue10 | |
%load_dir14 = load i8, i8* %dir, align 1 | |
%41 = icmp ne i8 %load_dir14, 0 | |
%tmpVar15 = xor i1 %41, true | |
br label %42 | |
42: ; preds = %40, %continue10 | |
%43 = phi i1 [ %32, %continue10 ], [ %tmpVar15, %40 ] | |
br i1 %43, label %condition_body16, label %continue12 | |
condition_body20: ; preds = %continue12 | |
store i16 0, i16* %cnt, align 2 | |
br label %continue19 | |
continue19: ; preds = %condition_body20, %continue12 | |
ret void | |
} | |
define void @INTERLOCK(%INTERLOCK_interface* %0) { | |
entry: | |
%I1 = getelementptr inbounds %INTERLOCK_interface, %INTERLOCK_interface* %0, i32 0, i32 0 | |
%I2 = getelementptr inbounds %INTERLOCK_interface, %INTERLOCK_interface* %0, i32 0, i32 1 | |
%TL = getelementptr inbounds %INTERLOCK_interface, %INTERLOCK_interface* %0, i32 0, i32 2 | |
%Q1 = getelementptr inbounds %INTERLOCK_interface, %INTERLOCK_interface* %0, i32 0, i32 3 | |
%Q2 = getelementptr inbounds %INTERLOCK_interface, %INTERLOCK_interface* %0, i32 0, i32 4 | |
%T1 = getelementptr inbounds %INTERLOCK_interface, %INTERLOCK_interface* %0, i32 0, i32 5 | |
%T2 = getelementptr inbounds %INTERLOCK_interface, %INTERLOCK_interface* %0, i32 0, i32 6 | |
%1 = getelementptr inbounds %TOF_interface, %TOF_interface* %T1, i32 0, i32 0 | |
%load_I1 = load i8, i8* %I1, align 1 | |
store i8 %load_I1, i8* %1, align 1 | |
%2 = getelementptr inbounds %TOF_interface, %TOF_interface* %T1, i32 0, i32 1 | |
%load_TL = load i64, i64* %TL, align 4 | |
store i64 %load_TL, i64* %2, align 4 | |
call void @TOF(%TOF_interface* %T1) | |
%3 = getelementptr inbounds %TOF_interface, %TOF_interface* %T2, i32 0, i32 0 | |
%load_I2 = load i8, i8* %I2, align 1 | |
store i8 %load_I2, i8* %3, align 1 | |
%4 = getelementptr inbounds %TOF_interface, %TOF_interface* %T2, i32 0, i32 1 | |
%load_TL1 = load i64, i64* %TL, align 4 | |
store i64 %load_TL1, i64* %4, align 4 | |
call void @TOF(%TOF_interface* %T2) | |
%load_I12 = load i8, i8* %I1, align 1 | |
%5 = icmp ne i8 %load_I12, 0 | |
br i1 %5, label %6, label %8 | |
6: ; preds = %entry | |
%Q = getelementptr inbounds %TOF_interface, %TOF_interface* %T2, i32 0, i32 2 | |
%load_ = load i8, i8* %Q, align 1 | |
%7 = icmp ne i8 %load_, 0 | |
%tmpVar = xor i1 %7, true | |
br label %8 | |
8: ; preds = %6, %entry | |
%9 = phi i1 [ %5, %entry ], [ %tmpVar, %6 ] | |
%10 = zext i1 %9 to i8 | |
store i8 %10, i8* %Q1, align 1 | |
%load_I23 = load i8, i8* %I2, align 1 | |
%11 = icmp ne i8 %load_I23, 0 | |
br i1 %11, label %12, label %14 | |
12: ; preds = %8 | |
%Q4 = getelementptr inbounds %TOF_interface, %TOF_interface* %T1, i32 0, i32 2 | |
%load_5 = load i8, i8* %Q4, align 1 | |
%13 = icmp ne i8 %load_5, 0 | |
%tmpVar6 = xor i1 %13, true | |
br label %14 | |
14: ; preds = %12, %8 | |
%15 = phi i1 [ %11, %8 ], [ %tmpVar6, %12 ] | |
%16 = zext i1 %15 to i8 | |
store i8 %16, i8* %Q2, align 1 | |
ret void | |
} | |
define void @INTERLOCK_4(%INTERLOCK_4_interface* %0) { | |
entry: | |
%I0 = getelementptr inbounds %INTERLOCK_4_interface, %INTERLOCK_4_interface* %0, i32 0, i32 0 | |
%I1 = getelementptr inbounds %INTERLOCK_4_interface, %INTERLOCK_4_interface* %0, i32 0, i32 1 | |
%I2 = getelementptr inbounds %INTERLOCK_4_interface, %INTERLOCK_4_interface* %0, i32 0, i32 2 | |
%I3 = getelementptr inbounds %INTERLOCK_4_interface, %INTERLOCK_4_interface* %0, i32 0, i32 3 | |
%E = getelementptr inbounds %INTERLOCK_4_interface, %INTERLOCK_4_interface* %0, i32 0, i32 4 | |
%MODE = getelementptr inbounds %INTERLOCK_4_interface, %INTERLOCK_4_interface* %0, i32 0, i32 5 | |
%OUT = getelementptr inbounds %INTERLOCK_4_interface, %INTERLOCK_4_interface* %0, i32 0, i32 6 | |
%TP = getelementptr inbounds %INTERLOCK_4_interface, %INTERLOCK_4_interface* %0, i32 0, i32 7 | |
%in = getelementptr inbounds %INTERLOCK_4_interface, %INTERLOCK_4_interface* %0, i32 0, i32 8 | |
%last = getelementptr inbounds %INTERLOCK_4_interface, %INTERLOCK_4_interface* %0, i32 0, i32 9 | |
%old = getelementptr inbounds %INTERLOCK_4_interface, %INTERLOCK_4_interface* %0, i32 0, i32 10 | |
%lmode = getelementptr inbounds %INTERLOCK_4_interface, %INTERLOCK_4_interface* %0, i32 0, i32 11 | |
%load_E = load i8, i8* %E, align 1 | |
%1 = icmp ne i8 %load_E, 0 | |
br i1 %1, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_mode = load i16, i16* %MODE, align 2 | |
%2 = sext i16 %load_mode to i32 | |
%load_lmode = load i16, i16* %lmode, align 2 | |
%3 = sext i16 %load_lmode to i32 | |
%tmpVar = icmp ne i32 %2, %3 | |
br i1 %tmpVar, label %condition_body2, label %continue1 | |
else: ; preds = %entry | |
store i8 0, i8* %OUT, align 1 | |
store i8 0, i8* %last, align 1 | |
store i8 0, i8* %old, align 1 | |
store i16 0, i16* %lmode, align 2 | |
store i8 0, i8* %TP, align 1 | |
br label %continue | |
continue: ; preds = %else, %continue13 | |
ret void | |
condition_body2: ; preds = %condition_body | |
store i8 0, i8* %OUT, align 1 | |
store i8 0, i8* %last, align 1 | |
store i8 0, i8* %old, align 1 | |
%load_mode3 = load i16, i16* %MODE, align 2 | |
store i16 %load_mode3, i16* %lmode, align 2 | |
br label %continue1 | |
continue1: ; preds = %condition_body2, %condition_body | |
%4 = load i8, i8* %in, align 1 | |
%erase = and i8 %4, -2 | |
%load_I0 = load i8, i8* %I0, align 1 | |
%value = shl i8 %load_I0, 0 | |
%or = or i8 %erase, %value | |
store i8 %or, i8* %in, align 1 | |
%5 = load i8, i8* %in, align 1 | |
%erase4 = and i8 %5, -3 | |
%load_I1 = load i8, i8* %I1, align 1 | |
%value5 = shl i8 %load_I1, 1 | |
%or6 = or i8 %erase4, %value5 | |
store i8 %or6, i8* %in, align 1 | |
%6 = load i8, i8* %in, align 1 | |
%erase7 = and i8 %6, -5 | |
%load_I2 = load i8, i8* %I2, align 1 | |
%value8 = shl i8 %load_I2, 2 | |
%or9 = or i8 %erase7, %value8 | |
store i8 %or9, i8* %in, align 1 | |
%7 = load i8, i8* %in, align 1 | |
%erase10 = and i8 %7, -9 | |
%load_I3 = load i8, i8* %I3, align 1 | |
%value11 = shl i8 %load_I3, 3 | |
%or12 = or i8 %erase10, %value11 | |
store i8 %or12, i8* %in, align 1 | |
%load_in = load i8, i8* %in, align 1 | |
%8 = zext i8 %load_in to i32 | |
%load_last = load i8, i8* %last, align 1 | |
%9 = zext i8 %load_last to i32 | |
%tmpVar14 = icmp ne i32 %8, %9 | |
br i1 %tmpVar14, label %condition_body15, label %continue13 | |
condition_body15: ; preds = %continue1 | |
%load_mode17 = load i16, i16* %MODE, align 2 | |
switch i16 %load_mode17, label %else18 [ | |
i16 0, label %case | |
i16 1, label %case20 | |
i16 2, label %case33 | |
i16 3, label %case53 | |
] | |
continue13: ; preds = %continue16, %continue1 | |
%load_out74 = load i8, i8* %OUT, align 1 | |
%10 = zext i8 %load_out74 to i32 | |
%load_old = load i8, i8* %old, align 1 | |
%11 = zext i8 %load_old to i32 | |
%tmpVar75 = icmp ne i32 %10, %11 | |
%12 = zext i1 %tmpVar75 to i8 | |
store i8 %12, i8* %TP, align 1 | |
%load_out76 = load i8, i8* %OUT, align 1 | |
store i8 %load_out76, i8* %old, align 1 | |
br label %continue | |
case: ; preds = %condition_body15 | |
%load_in19 = load i8, i8* %in, align 1 | |
store i8 %load_in19, i8* %OUT, align 1 | |
br label %continue16 | |
case20: ; preds = %condition_body15 | |
%load_in24 = load i8, i8* %in, align 1 | |
%shift = lshr i8 %load_in24, 3 | |
%13 = icmp ne i8 %shift, 0 | |
br i1 %13, label %condition_body25, label %branch | |
case33: ; preds = %condition_body15 | |
%load_in34 = load i8, i8* %in, align 1 | |
%14 = zext i8 %load_in34 to i32 | |
%load_last35 = load i8, i8* %last, align 1 | |
%15 = zext i8 %load_last35 to i32 | |
%tmpVar36 = xor i32 %14, %15 | |
%load_in37 = load i8, i8* %in, align 1 | |
%16 = zext i8 %load_in37 to i32 | |
%tmpVar38 = and i32 %tmpVar36, %16 | |
%17 = trunc i32 %tmpVar38 to i8 | |
store i8 %17, i8* %last, align 1 | |
%load_last43 = load i8, i8* %last, align 1 | |
%shift44 = lshr i8 %load_last43, 3 | |
%18 = icmp ne i8 %shift44, 0 | |
br i1 %18, label %condition_body45, label %branch39 | |
case53: ; preds = %condition_body15 | |
%load_out = load i8, i8* %OUT, align 1 | |
%19 = zext i8 %load_out to i32 | |
%load_in55 = load i8, i8* %in, align 1 | |
%20 = zext i8 %load_in55 to i32 | |
%tmpVar56 = and i32 %19, %20 | |
%tmpVar57 = icmp eq i32 %tmpVar56, 0 | |
br i1 %tmpVar57, label %condition_body58, label %continue54 | |
else18: ; preds = %condition_body15 | |
br label %continue16 | |
continue16: ; preds = %else18, %continue54, %continue42, %continue23, %case | |
%load_in73 = load i8, i8* %in, align 1 | |
store i8 %load_in73, i8* %last, align 1 | |
br label %continue13 | |
condition_body25: ; preds = %case20 | |
store i8 8, i8* %OUT, align 1 | |
br label %continue23 | |
branch: ; preds = %case20 | |
%load_in26 = load i8, i8* %in, align 1 | |
%shift27 = lshr i8 %load_in26, 2 | |
%21 = icmp ne i8 %shift27, 0 | |
br i1 %21, label %condition_body28, label %branch21 | |
condition_body28: ; preds = %branch | |
store i8 4, i8* %OUT, align 1 | |
br label %continue23 | |
branch21: ; preds = %branch | |
%load_in29 = load i8, i8* %in, align 1 | |
%shift30 = lshr i8 %load_in29, 1 | |
%22 = icmp ne i8 %shift30, 0 | |
br i1 %22, label %condition_body31, label %else22 | |
condition_body31: ; preds = %branch21 | |
store i8 2, i8* %OUT, align 1 | |
br label %continue23 | |
else22: ; preds = %branch21 | |
%load_in32 = load i8, i8* %in, align 1 | |
store i8 %load_in32, i8* %OUT, align 1 | |
br label %continue23 | |
continue23: ; preds = %else22, %condition_body31, %condition_body28, %condition_body25 | |
br label %continue16 | |
condition_body45: ; preds = %case33 | |
store i8 8, i8* %OUT, align 1 | |
br label %continue42 | |
branch39: ; preds = %case33 | |
%load_last46 = load i8, i8* %last, align 1 | |
%shift47 = lshr i8 %load_last46, 2 | |
%23 = icmp ne i8 %shift47, 0 | |
br i1 %23, label %condition_body48, label %branch40 | |
condition_body48: ; preds = %branch39 | |
store i8 4, i8* %OUT, align 1 | |
br label %continue42 | |
branch40: ; preds = %branch39 | |
%load_last49 = load i8, i8* %last, align 1 | |
%shift50 = lshr i8 %load_last49, 1 | |
%24 = icmp ne i8 %shift50, 0 | |
br i1 %24, label %condition_body51, label %else41 | |
condition_body51: ; preds = %branch40 | |
store i8 2, i8* %OUT, align 1 | |
br label %continue42 | |
else41: ; preds = %branch40 | |
%load_last52 = load i8, i8* %last, align 1 | |
store i8 %load_last52, i8* %OUT, align 1 | |
br label %continue42 | |
continue42: ; preds = %else41, %condition_body51, %condition_body48, %condition_body45 | |
br label %continue16 | |
condition_body58: ; preds = %case53 | |
%load_in63 = load i8, i8* %in, align 1 | |
%shift64 = lshr i8 %load_in63, 3 | |
%25 = icmp ne i8 %shift64, 0 | |
br i1 %25, label %condition_body65, label %branch59 | |
continue54: ; preds = %continue62, %case53 | |
br label %continue16 | |
condition_body65: ; preds = %condition_body58 | |
store i8 8, i8* %OUT, align 1 | |
br label %continue62 | |
branch59: ; preds = %condition_body58 | |
%load_in66 = load i8, i8* %in, align 1 | |
%shift67 = lshr i8 %load_in66, 2 | |
%26 = icmp ne i8 %shift67, 0 | |
br i1 %26, label %condition_body68, label %branch60 | |
condition_body68: ; preds = %branch59 | |
store i8 4, i8* %OUT, align 1 | |
br label %continue62 | |
branch60: ; preds = %branch59 | |
%load_in69 = load i8, i8* %in, align 1 | |
%shift70 = lshr i8 %load_in69, 1 | |
%27 = icmp ne i8 %shift70, 0 | |
br i1 %27, label %condition_body71, label %else61 | |
condition_body71: ; preds = %branch60 | |
store i8 2, i8* %OUT, align 1 | |
br label %continue62 | |
else61: ; preds = %branch60 | |
%load_in72 = load i8, i8* %in, align 1 | |
store i8 %load_in72, i8* %OUT, align 1 | |
br label %continue62 | |
continue62: ; preds = %else61, %condition_body71, %condition_body68, %condition_body65 | |
br label %continue54 | |
} | |
define i8 @MANUAL(%MANUAL_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %MANUAL_interface, %MANUAL_interface* %0, i32 0, i32 0 | |
%ON = getelementptr inbounds %MANUAL_interface, %MANUAL_interface* %0, i32 0, i32 1 | |
%OFF = getelementptr inbounds %MANUAL_interface, %MANUAL_interface* %0, i32 0, i32 2 | |
%MANUAL = alloca i8, align 1 | |
store i8 0, i8* %MANUAL, align 1 | |
%load_OFF = load i8, i8* %OFF, align 1 | |
%1 = icmp ne i8 %load_OFF, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %2, label %4 | |
2: ; preds = %entry | |
%load_IN = load i8, i8* %IN, align 1 | |
%3 = icmp ne i8 %load_IN, 0 | |
br i1 %3, label %9, label %7 | |
4: ; preds = %9, %entry | |
%5 = phi i1 [ %tmpVar, %entry ], [ %10, %9 ] | |
%6 = zext i1 %5 to i8 | |
store i8 %6, i8* %MANUAL, align 1 | |
%MANUAL_ret = load i8, i8* %MANUAL, align 1 | |
ret i8 %MANUAL_ret | |
7: ; preds = %2 | |
%load_ON = load i8, i8* %ON, align 1 | |
%8 = icmp ne i8 %load_ON, 0 | |
br label %9 | |
9: ; preds = %7, %2 | |
%10 = phi i1 [ %3, %2 ], [ %8, %7 ] | |
br label %4 | |
} | |
define void @MANUAL_1(%MANUAL_1_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %MANUAL_1_interface, %MANUAL_1_interface* %0, i32 0, i32 0 | |
%MAN = getelementptr inbounds %MANUAL_1_interface, %MANUAL_1_interface* %0, i32 0, i32 1 | |
%M_I = getelementptr inbounds %MANUAL_1_interface, %MANUAL_1_interface* %0, i32 0, i32 2 | |
%SET = getelementptr inbounds %MANUAL_1_interface, %MANUAL_1_interface* %0, i32 0, i32 3 | |
%RST = getelementptr inbounds %MANUAL_1_interface, %MANUAL_1_interface* %0, i32 0, i32 4 | |
%Q = getelementptr inbounds %MANUAL_1_interface, %MANUAL_1_interface* %0, i32 0, i32 5 | |
%STATUS = getelementptr inbounds %MANUAL_1_interface, %MANUAL_1_interface* %0, i32 0, i32 6 | |
%S_edge = getelementptr inbounds %MANUAL_1_interface, %MANUAL_1_interface* %0, i32 0, i32 7 | |
%r_edge = getelementptr inbounds %MANUAL_1_interface, %MANUAL_1_interface* %0, i32 0, i32 8 | |
%edge = getelementptr inbounds %MANUAL_1_interface, %MANUAL_1_interface* %0, i32 0, i32 9 | |
%load_man = load i8, i8* %MAN, align 1 | |
%1 = icmp ne i8 %load_man, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%load_IN = load i8, i8* %IN, align 1 | |
store i8 %load_IN, i8* %Q, align 1 | |
store i8 100, i8* %STATUS, align 1 | |
store i8 0, i8* %edge, align 1 | |
br label %continue | |
branch: ; preds = %entry | |
%load_s_edge = load i8, i8* %S_edge, align 1 | |
%2 = icmp ne i8 %load_s_edge, 0 | |
%tmpVar3 = xor i1 %2, true | |
br i1 %tmpVar3, label %5, label %7 | |
condition_body4: ; preds = %7 | |
store i8 1, i8* %Q, align 1 | |
store i8 1, i8* %edge, align 1 | |
store i8 101, i8* %STATUS, align 1 | |
br label %continue | |
branch1: ; preds = %7 | |
%load_r_edge = load i8, i8* %r_edge, align 1 | |
%3 = icmp ne i8 %load_r_edge, 0 | |
%tmpVar5 = xor i1 %3, true | |
br i1 %tmpVar5, label %9, label %11 | |
condition_body6: ; preds = %11 | |
store i8 0, i8* %Q, align 1 | |
store i8 1, i8* %edge, align 1 | |
store i8 102, i8* %STATUS, align 1 | |
br label %continue | |
branch2: ; preds = %11 | |
%load_edge = load i8, i8* %edge, align 1 | |
%4 = icmp ne i8 %load_edge, 0 | |
%tmpVar7 = xor i1 %4, true | |
br i1 %tmpVar7, label %condition_body8, label %continue | |
condition_body8: ; preds = %branch2 | |
%load_M_I = load i8, i8* %M_I, align 1 | |
store i8 %load_M_I, i8* %Q, align 1 | |
store i8 103, i8* %STATUS, align 1 | |
br label %continue | |
continue: ; preds = %condition_body8, %branch2, %condition_body6, %condition_body4, %condition_body | |
%load_SET = load i8, i8* %SET, align 1 | |
store i8 %load_SET, i8* %S_edge, align 1 | |
%load_RST = load i8, i8* %RST, align 1 | |
store i8 %load_RST, i8* %r_edge, align 1 | |
ret void | |
5: ; preds = %branch | |
%load_set = load i8, i8* %SET, align 1 | |
%6 = icmp ne i8 %load_set, 0 | |
br label %7 | |
7: ; preds = %5, %branch | |
%8 = phi i1 [ %tmpVar3, %branch ], [ %6, %5 ] | |
br i1 %8, label %condition_body4, label %branch1 | |
9: ; preds = %branch1 | |
%load_rst = load i8, i8* %RST, align 1 | |
%10 = icmp ne i8 %load_rst, 0 | |
br label %11 | |
11: ; preds = %9, %branch1 | |
%12 = phi i1 [ %tmpVar5, %branch1 ], [ %10, %9 ] | |
br i1 %12, label %condition_body6, label %branch2 | |
} | |
define void @MANUAL_2(%MANUAL_2_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %MANUAL_2_interface, %MANUAL_2_interface* %0, i32 0, i32 0 | |
%ENA = getelementptr inbounds %MANUAL_2_interface, %MANUAL_2_interface* %0, i32 0, i32 1 | |
%ON = getelementptr inbounds %MANUAL_2_interface, %MANUAL_2_interface* %0, i32 0, i32 2 | |
%OFF = getelementptr inbounds %MANUAL_2_interface, %MANUAL_2_interface* %0, i32 0, i32 3 | |
%MAN = getelementptr inbounds %MANUAL_2_interface, %MANUAL_2_interface* %0, i32 0, i32 4 | |
%Q = getelementptr inbounds %MANUAL_2_interface, %MANUAL_2_interface* %0, i32 0, i32 5 | |
%STATUS = getelementptr inbounds %MANUAL_2_interface, %MANUAL_2_interface* %0, i32 0, i32 6 | |
%load_ena = load i8, i8* %ENA, align 1 | |
%1 = icmp ne i8 %load_ena, 0 | |
br i1 %1, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_ON = load i8, i8* %ON, align 1 | |
%2 = icmp ne i8 %load_ON, 0 | |
%tmpVar = xor i1 %2, true | |
br i1 %tmpVar, label %5, label %7 | |
else: ; preds = %entry | |
store i8 0, i8* %Q, align 1 | |
store i8 104, i8* %STATUS, align 1 | |
br label %continue | |
continue: ; preds = %else, %continue3 | |
ret void | |
condition_body5: ; preds = %7 | |
%load_IN = load i8, i8* %IN, align 1 | |
store i8 %load_IN, i8* %Q, align 1 | |
store i8 100, i8* %STATUS, align 1 | |
br label %continue3 | |
branch: ; preds = %7 | |
%load_on = load i8, i8* %ON, align 1 | |
%3 = icmp ne i8 %load_on, 0 | |
br i1 %3, label %9, label %11 | |
condition_body7: ; preds = %11 | |
store i8 1, i8* %Q, align 1 | |
store i8 101, i8* %STATUS, align 1 | |
br label %continue3 | |
branch1: ; preds = %11 | |
%load_on8 = load i8, i8* %ON, align 1 | |
%4 = icmp ne i8 %load_on8, 0 | |
%tmpVar9 = xor i1 %4, true | |
br i1 %tmpVar9, label %13, label %15 | |
condition_body11: ; preds = %15 | |
store i8 0, i8* %Q, align 1 | |
store i8 102, i8* %STATUS, align 1 | |
br label %continue3 | |
else2: ; preds = %15 | |
%load_MAN = load i8, i8* %MAN, align 1 | |
store i8 %load_MAN, i8* %Q, align 1 | |
store i8 103, i8* %STATUS, align 1 | |
br label %continue3 | |
continue3: ; preds = %else2, %condition_body11, %condition_body7, %condition_body5 | |
br label %continue | |
5: ; preds = %condition_body | |
%load_OFF = load i8, i8* %OFF, align 1 | |
%6 = icmp ne i8 %load_OFF, 0 | |
%tmpVar4 = xor i1 %6, true | |
br label %7 | |
7: ; preds = %5, %condition_body | |
%8 = phi i1 [ %tmpVar, %condition_body ], [ %tmpVar4, %5 ] | |
br i1 %8, label %condition_body5, label %branch | |
9: ; preds = %branch | |
%load_off = load i8, i8* %OFF, align 1 | |
%10 = icmp ne i8 %load_off, 0 | |
%tmpVar6 = xor i1 %10, true | |
br label %11 | |
11: ; preds = %9, %branch | |
%12 = phi i1 [ %3, %branch ], [ %tmpVar6, %9 ] | |
br i1 %12, label %condition_body7, label %branch1 | |
13: ; preds = %branch1 | |
%load_off10 = load i8, i8* %OFF, align 1 | |
%14 = icmp ne i8 %load_off10, 0 | |
br label %15 | |
15: ; preds = %13, %branch1 | |
%16 = phi i1 [ %tmpVar9, %branch1 ], [ %14, %13 ] | |
br i1 %16, label %condition_body11, label %else2 | |
} | |
define void @MANUAL_4(%MANUAL_4_interface* %0) { | |
entry: | |
%I0 = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 0 | |
%I1 = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 1 | |
%I2 = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 2 | |
%I3 = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 3 | |
%MAN = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 4 | |
%STP = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 5 | |
%M0 = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 6 | |
%M1 = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 7 | |
%M2 = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 8 | |
%M3 = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 9 | |
%Q0 = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 10 | |
%Q1 = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 11 | |
%Q2 = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 12 | |
%Q3 = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 13 | |
%STATUS = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 14 | |
%edge = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 15 | |
%pos = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 16 | |
%tog = getelementptr inbounds %MANUAL_4_interface, %MANUAL_4_interface* %0, i32 0, i32 17 | |
%load_man = load i8, i8* %MAN, align 1 | |
%1 = icmp ne i8 %load_man, 0 | |
br i1 %1, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_TOG = load i8, i8* %tog, align 1 | |
%2 = icmp ne i8 %load_TOG, 0 | |
%tmpVar = xor i1 %2, true | |
br i1 %tmpVar, label %condition_body2, label %continue1 | |
else: ; preds = %entry | |
%load_I0 = load i8, i8* %I0, align 1 | |
store i8 %load_I0, i8* %Q0, align 1 | |
%load_I1 = load i8, i8* %I1, align 1 | |
store i8 %load_I1, i8* %Q1, align 1 | |
%load_I2 = load i8, i8* %I2, align 1 | |
store i8 %load_I2, i8* %Q2, align 1 | |
%load_I3 = load i8, i8* %I3, align 1 | |
store i8 %load_I3, i8* %Q3, align 1 | |
store i8 100, i8* %STATUS, align 1 | |
store i8 0, i8* %tog, align 1 | |
store i16 0, i16* %pos, align 2 | |
br label %continue | |
continue: ; preds = %else, %continue3 | |
%load_STP12 = load i8, i8* %STP, align 1 | |
store i8 %load_STP12, i8* %edge, align 1 | |
ret void | |
condition_body2: ; preds = %condition_body | |
%load_M0 = load i8, i8* %M0, align 1 | |
store i8 %load_M0, i8* %Q0, align 1 | |
%load_M1 = load i8, i8* %M1, align 1 | |
store i8 %load_M1, i8* %Q1, align 1 | |
%load_M2 = load i8, i8* %M2, align 1 | |
store i8 %load_M2, i8* %Q2, align 1 | |
%load_M3 = load i8, i8* %M3, align 1 | |
store i8 %load_M3, i8* %Q3, align 1 | |
store i8 101, i8* %STATUS, align 1 | |
br label %continue1 | |
continue1: ; preds = %condition_body2, %condition_body | |
%load_STP = load i8, i8* %STP, align 1 | |
%3 = icmp ne i8 %load_STP, 0 | |
br i1 %3, label %4, label %6 | |
condition_body5: ; preds = %6 | |
store i8 1, i8* %tog, align 1 | |
%load_pos = load i16, i16* %pos, align 2 | |
switch i16 %load_pos, label %else7 [ | |
i16 0, label %case | |
i16 1, label %case8 | |
i16 2, label %case9 | |
i16 3, label %case10 | |
] | |
continue3: ; preds = %continue6, %6 | |
br label %continue | |
4: ; preds = %continue1 | |
%load_edge = load i8, i8* %edge, align 1 | |
%5 = icmp ne i8 %load_edge, 0 | |
%tmpVar4 = xor i1 %5, true | |
br label %6 | |
6: ; preds = %4, %continue1 | |
%7 = phi i1 [ %3, %continue1 ], [ %tmpVar4, %4 ] | |
br i1 %7, label %condition_body5, label %continue3 | |
case: ; preds = %condition_body5 | |
store i8 1, i8* %Q0, align 1 | |
store i8 0, i8* %Q1, align 1 | |
store i8 0, i8* %Q2, align 1 | |
store i8 0, i8* %Q3, align 1 | |
store i8 110, i8* %STATUS, align 1 | |
br label %continue6 | |
case8: ; preds = %condition_body5 | |
store i8 0, i8* %Q0, align 1 | |
store i8 1, i8* %Q1, align 1 | |
store i8 0, i8* %Q2, align 1 | |
store i8 0, i8* %Q3, align 1 | |
store i8 111, i8* %STATUS, align 1 | |
br label %continue6 | |
case9: ; preds = %condition_body5 | |
store i8 0, i8* %Q0, align 1 | |
store i8 0, i8* %Q1, align 1 | |
store i8 1, i8* %Q2, align 1 | |
store i8 0, i8* %Q3, align 1 | |
store i8 112, i8* %STATUS, align 1 | |
br label %continue6 | |
case10: ; preds = %condition_body5 | |
store i8 0, i8* %Q0, align 1 | |
store i8 0, i8* %Q1, align 1 | |
store i8 0, i8* %Q2, align 1 | |
store i8 1, i8* %Q3, align 1 | |
store i8 113, i8* %STATUS, align 1 | |
br label %continue6 | |
else7: ; preds = %condition_body5 | |
br label %continue6 | |
continue6: ; preds = %else7, %case10, %case9, %case8, %case | |
%INC_instance = alloca %INC_interface, align 8 | |
%8 = getelementptr inbounds %INC_interface, %INC_interface* %INC_instance, i32 0, i32 0 | |
%load_pos11 = load i16, i16* %pos, align 2 | |
store i16 %load_pos11, i16* %8, align 2 | |
%9 = getelementptr inbounds %INC_interface, %INC_interface* %INC_instance, i32 0, i32 1 | |
store i16 1, i16* %9, align 2 | |
%10 = getelementptr inbounds %INC_interface, %INC_interface* %INC_instance, i32 0, i32 2 | |
store i16 3, i16* %10, align 2 | |
%call = call i16 @INC(%INC_interface* %INC_instance) | |
store i16 %call, i16* %pos, align 2 | |
br label %continue3 | |
} | |
define void @PARSET(%PARSET_interface* %0) { | |
entry: | |
%A0 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 0 | |
%A1 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 1 | |
%X01 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 2 | |
%X02 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 3 | |
%X03 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 4 | |
%X04 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 5 | |
%X11 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 6 | |
%X12 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 7 | |
%X13 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 8 | |
%X14 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 9 | |
%X21 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 10 | |
%X22 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 11 | |
%X23 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 12 | |
%X24 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 13 | |
%X31 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 14 | |
%X32 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 15 | |
%X33 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 16 | |
%X34 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 17 | |
%TC = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 18 | |
%P1 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 19 | |
%P2 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 20 | |
%P3 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 21 | |
%P4 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 22 | |
%X = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 23 | |
%S1 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 24 | |
%S2 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 25 | |
%S3 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 26 | |
%S4 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 27 | |
%tx = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 28 | |
%last = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 29 | |
%start = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 30 | |
%set = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 31 | |
%init = getelementptr inbounds %PARSET_interface, %PARSET_interface* %0, i32 0, i32 32 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
%2 = load i8, i8* %set, align 1 | |
%erase = and i8 %2, -2 | |
%load_A0 = load i8, i8* %A0, align 1 | |
%3 = icmp ne i8 %load_A0, 0 | |
%tmpVar1 = xor i1 %3, true | |
%4 = zext i1 %tmpVar1 to i8 | |
%value = shl i8 %4, 0 | |
%or = or i8 %erase, %value | |
store i8 %or, i8* %set, align 1 | |
store i8 1, i8* %init, align 1 | |
%tmpVar2 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 0 | |
%load_X01 = load float, float* %X01, align 4 | |
store float %load_X01, float* %tmpVar2, align 4 | |
%tmpVar3 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 1 | |
%load_X02 = load float, float* %X02, align 4 | |
store float %load_X02, float* %tmpVar3, align 4 | |
%tmpVar4 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 2 | |
%load_X03 = load float, float* %X03, align 4 | |
store float %load_X03, float* %tmpVar4, align 4 | |
%tmpVar5 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 3 | |
%load_X04 = load float, float* %X04, align 4 | |
store float %load_X04, float* %tmpVar5, align 4 | |
%tmpVar6 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 4 | |
%load_X11 = load float, float* %X11, align 4 | |
store float %load_X11, float* %tmpVar6, align 4 | |
%tmpVar7 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 5 | |
%load_X12 = load float, float* %X12, align 4 | |
store float %load_X12, float* %tmpVar7, align 4 | |
%tmpVar8 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 6 | |
%load_X13 = load float, float* %X13, align 4 | |
store float %load_X13, float* %tmpVar8, align 4 | |
%tmpVar9 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 7 | |
%load_X14 = load float, float* %X14, align 4 | |
store float %load_X14, float* %tmpVar9, align 4 | |
%tmpVar10 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 8 | |
%load_X21 = load float, float* %X21, align 4 | |
store float %load_X21, float* %tmpVar10, align 4 | |
%tmpVar11 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 9 | |
%load_X22 = load float, float* %X22, align 4 | |
store float %load_X22, float* %tmpVar11, align 4 | |
%tmpVar12 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 10 | |
%load_X23 = load float, float* %X23, align 4 | |
store float %load_X23, float* %tmpVar12, align 4 | |
%tmpVar13 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 11 | |
%load_X24 = load float, float* %X24, align 4 | |
store float %load_X24, float* %tmpVar13, align 4 | |
%tmpVar14 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 12 | |
%load_X31 = load float, float* %X31, align 4 | |
store float %load_X31, float* %tmpVar14, align 4 | |
%tmpVar15 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 13 | |
%load_X32 = load float, float* %X32, align 4 | |
store float %load_X32, float* %tmpVar15, align 4 | |
%tmpVar16 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 14 | |
%load_X33 = load float, float* %X33, align 4 | |
store float %load_X33, float* %tmpVar16, align 4 | |
%tmpVar17 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 15 | |
%load_X34 = load float, float* %X34, align 4 | |
store float %load_X34, float* %tmpVar17, align 4 | |
%load_X0118 = load float, float* %X01, align 4 | |
store float %load_X0118, float* %P1, align 4 | |
%load_X0219 = load float, float* %X02, align 4 | |
store float %load_X0219, float* %P2, align 4 | |
%load_X0320 = load float, float* %X03, align 4 | |
store float %load_X0320, float* %P3, align 4 | |
%load_X0421 = load float, float* %X04, align 4 | |
store float %load_X0421, float* %P4, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%load_A023 = load i8, i8* %A0, align 1 | |
%5 = icmp ne i8 %load_A023, 0 | |
%load_set = load i8, i8* %set, align 1 | |
%shift = lshr i8 %load_set, 0 | |
%6 = icmp ne i8 %shift, 0 | |
%7 = xor i1 %5, %6 | |
br i1 %7, label %31, label %27 | |
condition_body26: ; preds = %31 | |
%8 = load i8, i8* %set, align 1 | |
%erase27 = and i8 %8, -2 | |
%load_A028 = load i8, i8* %A0, align 1 | |
%value29 = shl i8 %load_A028, 0 | |
%or30 = or i8 %erase27, %value29 | |
store i8 %or30, i8* %set, align 1 | |
%9 = load i8, i8* %set, align 1 | |
%erase31 = and i8 %9, -3 | |
%load_A132 = load i8, i8* %A1, align 1 | |
%value33 = shl i8 %load_A132, 1 | |
%or34 = or i8 %erase31, %value33 | |
store i8 %or34, i8* %set, align 1 | |
%load_tc = load i64, i64* %TC, align 4 | |
%tmpVar36 = icmp sgt i64 %load_tc, 0 | |
br i1 %tmpVar36, label %condition_body37, label %continue35 | |
branch: ; preds = %31 | |
%load_start = load i8, i8* %start, align 1 | |
%10 = icmp ne i8 %load_start, 0 | |
br i1 %10, label %45, label %47 | |
condition_body93: ; preds = %47 | |
%load_set94 = load i8, i8* %set, align 1 | |
%11 = zext i8 %load_set94 to i32 | |
%tmpVar95 = mul i32 4, %11 | |
%tmpVar96 = add i32 %tmpVar95, 0 | |
%tmpVar97 = add i32 0, %tmpVar96 | |
%tmpVar98 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar97 | |
%load_tmpVar99 = load float, float* %tmpVar98, align 4 | |
%load_S1 = load float, float* %S1, align 4 | |
%DWORD_TO_REAL_instance100 = alloca %DWORD_TO_REAL_interface, align 8 | |
%12 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance100, i32 0, i32 0 | |
%TIME_TO_DWORD_instance101 = alloca %TIME_TO_DWORD_interface, align 8 | |
%13 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance101, i32 0, i32 0 | |
%load_Tc = load i64, i64* %TC, align 4 | |
store i64 %load_Tc, i64* %13, align 4 | |
%call102 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance101) | |
%load_tx103 = load i32, i32* %tx, align 4 | |
%tmpVar104 = sub i32 %call102, %load_tx103 | |
%load_last105 = load i32, i32* %last, align 4 | |
%tmpVar106 = add i32 %tmpVar104, %load_last105 | |
store i32 %tmpVar106, i32* %12, align 4 | |
%call107 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance100) | |
%tmpVar108 = fmul float %load_S1, %call107 | |
%tmpVar109 = fsub float %load_tmpVar99, %tmpVar108 | |
store float %tmpVar109, float* %P1, align 4 | |
%load_set110 = load i8, i8* %set, align 1 | |
%14 = zext i8 %load_set110 to i32 | |
%tmpVar111 = mul i32 4, %14 | |
%tmpVar112 = add i32 %tmpVar111, 0 | |
%tmpVar113 = add i32 1, %tmpVar112 | |
%tmpVar114 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar113 | |
%load_tmpVar115 = load float, float* %tmpVar114, align 4 | |
%load_S2 = load float, float* %S2, align 4 | |
%DWORD_TO_REAL_instance116 = alloca %DWORD_TO_REAL_interface, align 8 | |
%15 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance116, i32 0, i32 0 | |
%TIME_TO_DWORD_instance117 = alloca %TIME_TO_DWORD_interface, align 8 | |
%16 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance117, i32 0, i32 0 | |
%load_Tc118 = load i64, i64* %TC, align 4 | |
store i64 %load_Tc118, i64* %16, align 4 | |
%call119 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance117) | |
%load_tx120 = load i32, i32* %tx, align 4 | |
%tmpVar121 = sub i32 %call119, %load_tx120 | |
%load_last122 = load i32, i32* %last, align 4 | |
%tmpVar123 = add i32 %tmpVar121, %load_last122 | |
store i32 %tmpVar123, i32* %15, align 4 | |
%call124 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance116) | |
%tmpVar125 = fmul float %load_S2, %call124 | |
%tmpVar126 = fsub float %load_tmpVar115, %tmpVar125 | |
store float %tmpVar126, float* %P2, align 4 | |
%load_set127 = load i8, i8* %set, align 1 | |
%17 = zext i8 %load_set127 to i32 | |
%tmpVar128 = mul i32 4, %17 | |
%tmpVar129 = add i32 %tmpVar128, 0 | |
%tmpVar130 = add i32 2, %tmpVar129 | |
%tmpVar131 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar130 | |
%load_tmpVar132 = load float, float* %tmpVar131, align 4 | |
%load_S3 = load float, float* %S3, align 4 | |
%DWORD_TO_REAL_instance133 = alloca %DWORD_TO_REAL_interface, align 8 | |
%18 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance133, i32 0, i32 0 | |
%TIME_TO_DWORD_instance134 = alloca %TIME_TO_DWORD_interface, align 8 | |
%19 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance134, i32 0, i32 0 | |
%load_Tc135 = load i64, i64* %TC, align 4 | |
store i64 %load_Tc135, i64* %19, align 4 | |
%call136 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance134) | |
%load_tx137 = load i32, i32* %tx, align 4 | |
%tmpVar138 = sub i32 %call136, %load_tx137 | |
%load_last139 = load i32, i32* %last, align 4 | |
%tmpVar140 = add i32 %tmpVar138, %load_last139 | |
store i32 %tmpVar140, i32* %18, align 4 | |
%call141 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance133) | |
%tmpVar142 = fmul float %load_S3, %call141 | |
%tmpVar143 = fsub float %load_tmpVar132, %tmpVar142 | |
store float %tmpVar143, float* %P3, align 4 | |
%load_set144 = load i8, i8* %set, align 1 | |
%20 = zext i8 %load_set144 to i32 | |
%tmpVar145 = mul i32 4, %20 | |
%tmpVar146 = add i32 %tmpVar145, 0 | |
%tmpVar147 = add i32 3, %tmpVar146 | |
%tmpVar148 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar147 | |
%load_tmpVar149 = load float, float* %tmpVar148, align 4 | |
%load_S4 = load float, float* %S4, align 4 | |
%DWORD_TO_REAL_instance150 = alloca %DWORD_TO_REAL_interface, align 8 | |
%21 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance150, i32 0, i32 0 | |
%TIME_TO_DWORD_instance151 = alloca %TIME_TO_DWORD_interface, align 8 | |
%22 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance151, i32 0, i32 0 | |
%load_Tc152 = load i64, i64* %TC, align 4 | |
store i64 %load_Tc152, i64* %22, align 4 | |
%call153 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance151) | |
%load_tx154 = load i32, i32* %tx, align 4 | |
%tmpVar155 = sub i32 %call153, %load_tx154 | |
%load_last156 = load i32, i32* %last, align 4 | |
%tmpVar157 = add i32 %tmpVar155, %load_last156 | |
store i32 %tmpVar157, i32* %21, align 4 | |
%call158 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance150) | |
%tmpVar159 = fmul float %load_S4, %call158 | |
%tmpVar160 = fsub float %load_tmpVar149, %tmpVar159 | |
store float %tmpVar160, float* %P4, align 4 | |
br label %continue22 | |
else: ; preds = %47 | |
store i8 0, i8* %start, align 1 | |
%load_set161 = load i8, i8* %set, align 1 | |
%23 = zext i8 %load_set161 to i32 | |
%tmpVar162 = mul i32 4, %23 | |
%tmpVar163 = add i32 %tmpVar162, 0 | |
%tmpVar164 = add i32 0, %tmpVar163 | |
%tmpVar165 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar164 | |
%load_tmpVar166 = load float, float* %tmpVar165, align 4 | |
store float %load_tmpVar166, float* %P1, align 4 | |
%load_set167 = load i8, i8* %set, align 1 | |
%24 = zext i8 %load_set167 to i32 | |
%tmpVar168 = mul i32 4, %24 | |
%tmpVar169 = add i32 %tmpVar168, 0 | |
%tmpVar170 = add i32 1, %tmpVar169 | |
%tmpVar171 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar170 | |
%load_tmpVar172 = load float, float* %tmpVar171, align 4 | |
store float %load_tmpVar172, float* %P2, align 4 | |
%load_set173 = load i8, i8* %set, align 1 | |
%25 = zext i8 %load_set173 to i32 | |
%tmpVar174 = mul i32 4, %25 | |
%tmpVar175 = add i32 %tmpVar174, 0 | |
%tmpVar176 = add i32 2, %tmpVar175 | |
%tmpVar177 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar176 | |
%load_tmpVar178 = load float, float* %tmpVar177, align 4 | |
store float %load_tmpVar178, float* %P3, align 4 | |
%load_set179 = load i8, i8* %set, align 1 | |
%26 = zext i8 %load_set179 to i32 | |
%tmpVar180 = mul i32 4, %26 | |
%tmpVar181 = add i32 %tmpVar180, 0 | |
%tmpVar182 = add i32 3, %tmpVar181 | |
%tmpVar183 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar182 | |
%load_tmpVar184 = load float, float* %tmpVar183, align 4 | |
store float %load_tmpVar184, float* %P4, align 4 | |
br label %continue22 | |
continue22: ; preds = %else, %condition_body93, %continue35 | |
ret void | |
27: ; preds = %continue | |
%load_A1 = load i8, i8* %A1, align 1 | |
%28 = icmp ne i8 %load_A1, 0 | |
%load_set24 = load i8, i8* %set, align 1 | |
%shift25 = lshr i8 %load_set24, 1 | |
%29 = icmp ne i8 %shift25, 0 | |
%30 = xor i1 %28, %29 | |
br label %31 | |
31: ; preds = %27, %continue | |
%32 = phi i1 [ %7, %continue ], [ %30, %27 ] | |
br i1 %32, label %condition_body26, label %branch | |
condition_body37: ; preds = %condition_body26 | |
store i8 1, i8* %start, align 1 | |
%load_tx = load i32, i32* %tx, align 4 | |
store i32 %load_tx, i32* %last, align 4 | |
%load_set38 = load i8, i8* %set, align 1 | |
%33 = zext i8 %load_set38 to i32 | |
%tmpVar39 = mul i32 4, %33 | |
%tmpVar40 = add i32 %tmpVar39, 0 | |
%tmpVar41 = add i32 0, %tmpVar40 | |
%tmpVar42 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar41 | |
%load_tmpVar = load float, float* %tmpVar42, align 4 | |
%load_P1 = load float, float* %P1, align 4 | |
%tmpVar43 = fsub float %load_tmpVar, %load_P1 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%34 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%TIME_TO_DWORD_instance = alloca %TIME_TO_DWORD_interface, align 8 | |
%35 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance, i32 0, i32 0 | |
%load_tc44 = load i64, i64* %TC, align 4 | |
store i64 %load_tc44, i64* %35, align 4 | |
%call45 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance) | |
store i32 %call45, i32* %34, align 4 | |
%call46 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%tmpVar47 = fdiv float %tmpVar43, %call46 | |
store float %tmpVar47, float* %S1, align 4 | |
%load_set48 = load i8, i8* %set, align 1 | |
%36 = zext i8 %load_set48 to i32 | |
%tmpVar49 = mul i32 4, %36 | |
%tmpVar50 = add i32 %tmpVar49, 0 | |
%tmpVar51 = add i32 1, %tmpVar50 | |
%tmpVar52 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar51 | |
%load_tmpVar53 = load float, float* %tmpVar52, align 4 | |
%load_P2 = load float, float* %P2, align 4 | |
%tmpVar54 = fsub float %load_tmpVar53, %load_P2 | |
%DWORD_TO_REAL_instance55 = alloca %DWORD_TO_REAL_interface, align 8 | |
%37 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance55, i32 0, i32 0 | |
%TIME_TO_DWORD_instance56 = alloca %TIME_TO_DWORD_interface, align 8 | |
%38 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance56, i32 0, i32 0 | |
%load_tc57 = load i64, i64* %TC, align 4 | |
store i64 %load_tc57, i64* %38, align 4 | |
%call58 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance56) | |
store i32 %call58, i32* %37, align 4 | |
%call59 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance55) | |
%tmpVar60 = fdiv float %tmpVar54, %call59 | |
store float %tmpVar60, float* %S2, align 4 | |
%load_set61 = load i8, i8* %set, align 1 | |
%39 = zext i8 %load_set61 to i32 | |
%tmpVar62 = mul i32 4, %39 | |
%tmpVar63 = add i32 %tmpVar62, 0 | |
%tmpVar64 = add i32 2, %tmpVar63 | |
%tmpVar65 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar64 | |
%load_tmpVar66 = load float, float* %tmpVar65, align 4 | |
%load_P3 = load float, float* %P3, align 4 | |
%tmpVar67 = fsub float %load_tmpVar66, %load_P3 | |
%DWORD_TO_REAL_instance68 = alloca %DWORD_TO_REAL_interface, align 8 | |
%40 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance68, i32 0, i32 0 | |
%TIME_TO_DWORD_instance69 = alloca %TIME_TO_DWORD_interface, align 8 | |
%41 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance69, i32 0, i32 0 | |
%load_tc70 = load i64, i64* %TC, align 4 | |
store i64 %load_tc70, i64* %41, align 4 | |
%call71 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance69) | |
store i32 %call71, i32* %40, align 4 | |
%call72 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance68) | |
%tmpVar73 = fdiv float %tmpVar67, %call72 | |
store float %tmpVar73, float* %S3, align 4 | |
%load_set74 = load i8, i8* %set, align 1 | |
%42 = zext i8 %load_set74 to i32 | |
%tmpVar75 = mul i32 4, %42 | |
%tmpVar76 = add i32 %tmpVar75, 0 | |
%tmpVar77 = add i32 3, %tmpVar76 | |
%tmpVar78 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar77 | |
%load_tmpVar79 = load float, float* %tmpVar78, align 4 | |
%load_P4 = load float, float* %P4, align 4 | |
%tmpVar80 = fsub float %load_tmpVar79, %load_P4 | |
%DWORD_TO_REAL_instance81 = alloca %DWORD_TO_REAL_interface, align 8 | |
%43 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance81, i32 0, i32 0 | |
%TIME_TO_DWORD_instance82 = alloca %TIME_TO_DWORD_interface, align 8 | |
%44 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance82, i32 0, i32 0 | |
%load_tc83 = load i64, i64* %TC, align 4 | |
store i64 %load_tc83, i64* %44, align 4 | |
%call84 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance82) | |
store i32 %call84, i32* %43, align 4 | |
%call85 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance81) | |
%tmpVar86 = fdiv float %tmpVar80, %call85 | |
store float %tmpVar86, float* %S4, align 4 | |
br label %continue35 | |
continue35: ; preds = %condition_body37, %condition_body26 | |
br label %continue22 | |
45: ; preds = %branch | |
%load_tx87 = load i32, i32* %tx, align 4 | |
%load_last = load i32, i32* %last, align 4 | |
%tmpVar88 = sub i32 %load_tx87, %load_last | |
%TIME_TO_DWORD_instance89 = alloca %TIME_TO_DWORD_interface, align 8 | |
%46 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance89, i32 0, i32 0 | |
%load_tc90 = load i64, i64* %TC, align 4 | |
store i64 %load_tc90, i64* %46, align 4 | |
%call91 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance89) | |
%tmpVar92 = icmp slt i32 %tmpVar88, %call91 | |
br label %47 | |
47: ; preds = %45, %branch | |
%48 = phi i1 [ %10, %branch ], [ %tmpVar92, %45 ] | |
br i1 %48, label %condition_body93, label %else | |
} | |
define void @PARSET2(%PARSET2_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 0 | |
%X01 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 1 | |
%X02 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 2 | |
%X03 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 3 | |
%X04 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 4 | |
%X11 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 5 | |
%X12 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 6 | |
%X13 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 7 | |
%X14 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 8 | |
%X21 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 9 | |
%X22 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 10 | |
%X23 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 11 | |
%X24 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 12 | |
%X31 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 13 | |
%X32 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 14 | |
%X33 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 15 | |
%X34 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 16 | |
%L1 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 17 | |
%L2 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 18 | |
%L3 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 19 | |
%TC = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 20 | |
%P1 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 21 | |
%P2 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 22 | |
%P3 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 23 | |
%P4 = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 24 | |
%Pset = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 25 | |
%init = getelementptr inbounds %PARSET2_interface, %PARSET2_interface* %0, i32 0, i32 26 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
store i8 1, i8* %init, align 1 | |
%2 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 18 | |
%load_TC = load i64, i64* %TC, align 4 | |
store i64 %load_TC, i64* %2, align 4 | |
%3 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 2 | |
%load_X01 = load float, float* %X01, align 4 | |
store float %load_X01, float* %3, align 4 | |
%4 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 3 | |
%load_X02 = load float, float* %X02, align 4 | |
store float %load_X02, float* %4, align 4 | |
%5 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 4 | |
%load_X03 = load float, float* %X03, align 4 | |
store float %load_X03, float* %5, align 4 | |
%6 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 5 | |
%load_X04 = load float, float* %X04, align 4 | |
store float %load_X04, float* %6, align 4 | |
%7 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 6 | |
%load_X11 = load float, float* %X11, align 4 | |
store float %load_X11, float* %7, align 4 | |
%8 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 7 | |
%load_X12 = load float, float* %X12, align 4 | |
store float %load_X12, float* %8, align 4 | |
%9 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 8 | |
%load_X13 = load float, float* %X13, align 4 | |
store float %load_X13, float* %9, align 4 | |
%10 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 9 | |
%load_X14 = load float, float* %X14, align 4 | |
store float %load_X14, float* %10, align 4 | |
%11 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 10 | |
%load_X21 = load float, float* %X21, align 4 | |
store float %load_X21, float* %11, align 4 | |
%12 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 11 | |
%load_X22 = load float, float* %X22, align 4 | |
store float %load_X22, float* %12, align 4 | |
%13 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 12 | |
%load_X23 = load float, float* %X23, align 4 | |
store float %load_X23, float* %13, align 4 | |
%14 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 13 | |
%load_X24 = load float, float* %X24, align 4 | |
store float %load_X24, float* %14, align 4 | |
%15 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 14 | |
%load_X31 = load float, float* %X31, align 4 | |
store float %load_X31, float* %15, align 4 | |
%16 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 15 | |
%load_X32 = load float, float* %X32, align 4 | |
store float %load_X32, float* %16, align 4 | |
%17 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 16 | |
%load_X33 = load float, float* %X33, align 4 | |
store float %load_X33, float* %17, align 4 | |
%18 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 17 | |
%load_X34 = load float, float* %X34, align 4 | |
store float %load_X34, float* %18, align 4 | |
call void @PARSET(%PARSET_interface* %Pset) | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%ABS_instance = alloca %ABS_interface, align 8 | |
%19 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance, i32 0, i32 0 | |
%load_X = load float, float* %X, align 4 | |
%20 = fptoui float %load_X to i64 | |
store i64 %20, i64* %19, align 4 | |
%call = call i64 @ABS(%ABS_interface* %ABS_instance) | |
%21 = uitofp i64 %call to double | |
%load_L1 = load float, float* %L1, align 4 | |
%22 = fpext float %load_L1 to double | |
%tmpVar3 = fcmp olt double %21, %22 | |
br i1 %tmpVar3, label %condition_body4, label %branch | |
condition_body4: ; preds = %continue | |
%23 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 0 | |
store i8 0, i8* %23, align 1 | |
%24 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 1 | |
store i8 0, i8* %24, align 1 | |
call void @PARSET(%PARSET_interface* %Pset) | |
br label %continue2 | |
branch: ; preds = %continue | |
%ABS_instance5 = alloca %ABS_interface, align 8 | |
%25 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance5, i32 0, i32 0 | |
%load_X6 = load float, float* %X, align 4 | |
%26 = fptoui float %load_X6 to i64 | |
store i64 %26, i64* %25, align 4 | |
%call7 = call i64 @ABS(%ABS_interface* %ABS_instance5) | |
%27 = uitofp i64 %call7 to double | |
%load_L2 = load float, float* %L2, align 4 | |
%28 = fpext float %load_L2 to double | |
%tmpVar8 = fcmp olt double %27, %28 | |
br i1 %tmpVar8, label %condition_body9, label %branch1 | |
condition_body9: ; preds = %branch | |
%29 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 0 | |
store i8 1, i8* %29, align 1 | |
%30 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 1 | |
store i8 0, i8* %30, align 1 | |
call void @PARSET(%PARSET_interface* %Pset) | |
br label %continue2 | |
branch1: ; preds = %branch | |
%ABS_instance10 = alloca %ABS_interface, align 8 | |
%31 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance10, i32 0, i32 0 | |
%load_x = load float, float* %X, align 4 | |
%32 = fptoui float %load_x to i64 | |
store i64 %32, i64* %31, align 4 | |
%call11 = call i64 @ABS(%ABS_interface* %ABS_instance10) | |
%33 = uitofp i64 %call11 to double | |
%load_L3 = load float, float* %L3, align 4 | |
%34 = fpext float %load_L3 to double | |
%tmpVar12 = fcmp olt double %33, %34 | |
br i1 %tmpVar12, label %condition_body13, label %else | |
condition_body13: ; preds = %branch1 | |
%35 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 0 | |
store i8 0, i8* %35, align 1 | |
%36 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 1 | |
store i8 1, i8* %36, align 1 | |
call void @PARSET(%PARSET_interface* %Pset) | |
br label %continue2 | |
else: ; preds = %branch1 | |
%37 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 0 | |
store i8 1, i8* %37, align 1 | |
%38 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 1 | |
store i8 1, i8* %38, align 1 | |
call void @PARSET(%PARSET_interface* %Pset) | |
br label %continue2 | |
continue2: ; preds = %else, %condition_body13, %condition_body9, %condition_body4 | |
%P114 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 19 | |
%load_ = load float, float* %P114, align 4 | |
store float %load_, float* %P1, align 4 | |
%P215 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 20 | |
%load_16 = load float, float* %P215, align 4 | |
store float %load_16, float* %P2, align 4 | |
%P317 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 21 | |
%load_18 = load float, float* %P317, align 4 | |
store float %load_18, float* %P3, align 4 | |
%P419 = getelementptr inbounds %PARSET_interface, %PARSET_interface* %Pset, i32 0, i32 22 | |
%load_20 = load float, float* %P419, align 4 | |
store float %load_20, float* %P4, align 4 | |
ret void | |
} | |
define void @SIGNAL(%SIGNAL_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %0, i32 0, i32 0 | |
%SIG = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %0, i32 0, i32 1 | |
%TS = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %0, i32 0, i32 2 | |
%Q = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %0, i32 0, i32 3 | |
%tx = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %0, i32 0, i32 4 | |
%step = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %0, i32 0, i32 5 | |
%one = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %0, i32 0, i32 6 | |
%load_in = load i8, i8* %IN, align 1 | |
%1 = icmp ne i8 %load_in, 0 | |
br i1 %1, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_ts = load i64, i64* %TS, align 4 | |
%tmpVar = icmp sgt i64 %load_ts, 0 | |
br i1 %tmpVar, label %condition_body3, label %else1 | |
else: ; preds = %entry | |
store i8 0, i8* %Q, align 1 | |
br label %continue | |
continue: ; preds = %else, %continue2 | |
ret void | |
condition_body3: ; preds = %condition_body | |
%DWORD_TO_BYTE_instance = alloca %DWORD_TO_BYTE_interface, align 8 | |
%2 = getelementptr inbounds %DWORD_TO_BYTE_interface, %DWORD_TO_BYTE_interface* %DWORD_TO_BYTE_instance, i32 0, i32 0 | |
%load_tx = load i32, i32* %tx, align 4 | |
%TIME_TO_DWORD_instance = alloca %TIME_TO_DWORD_interface, align 8 | |
%3 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance, i32 0, i32 0 | |
%load_ts4 = load i64, i64* %TS, align 4 | |
store i64 %load_ts4, i64* %3, align 4 | |
%call5 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance) | |
%tmpVar6 = sdiv i32 %load_tx, %call5 | |
%tmpVar7 = and i32 %tmpVar6, 7 | |
store i32 %tmpVar7, i32* %2, align 4 | |
%call8 = call i8 @DWORD_TO_BYTE(%DWORD_TO_BYTE_interface* %DWORD_TO_BYTE_instance) | |
store i8 %call8, i8* %step, align 1 | |
br label %continue2 | |
else1: ; preds = %condition_body | |
%DWORD_TO_BYTE_instance9 = alloca %DWORD_TO_BYTE_interface, align 8 | |
%4 = getelementptr inbounds %DWORD_TO_BYTE_interface, %DWORD_TO_BYTE_interface* %DWORD_TO_BYTE_instance9, i32 0, i32 0 | |
%SHR_instance = alloca %SHR_interface, align 8 | |
%5 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance, i32 0, i32 0 | |
%load_tx10 = load i32, i32* %tx, align 4 | |
%6 = zext i32 %load_tx10 to i64 | |
store i64 %6, i64* %5, align 4 | |
%7 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance, i32 0, i32 1 | |
store i16 7, i16* %7, align 2 | |
%call11 = call i64 @SHR(%SHR_interface* %SHR_instance) | |
%tmpVar12 = and i64 %call11, 7 | |
%8 = trunc i64 %tmpVar12 to i32 | |
store i32 %8, i32* %4, align 4 | |
%call13 = call i8 @DWORD_TO_BYTE(%DWORD_TO_BYTE_interface* %DWORD_TO_BYTE_instance9) | |
store i8 %call13, i8* %step, align 1 | |
br label %continue2 | |
continue2: ; preds = %else1, %condition_body3 | |
%SHL_instance = alloca %SHL_interface, align 8 | |
%9 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 0 | |
%load_one = load i8, i8* %one, align 1 | |
%10 = zext i8 %load_one to i64 | |
store i64 %10, i64* %9, align 4 | |
%11 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 1 | |
%load_step = load i8, i8* %step, align 1 | |
%12 = zext i8 %load_step to i16 | |
store i16 %12, i16* %11, align 2 | |
%call14 = call i64 @SHL(%SHL_interface* %SHL_instance) | |
%13 = trunc i64 %call14 to i8 | |
store i8 %13, i8* %step, align 1 | |
%load_step15 = load i8, i8* %step, align 1 | |
%14 = zext i8 %load_step15 to i32 | |
%load_sig = load i8, i8* %SIG, align 1 | |
%15 = zext i8 %load_sig to i32 | |
%tmpVar16 = and i32 %14, %15 | |
%tmpVar17 = icmp sgt i32 %tmpVar16, 0 | |
%16 = zext i1 %tmpVar17 to i8 | |
store i8 %16, i8* %Q, align 1 | |
br label %continue | |
} | |
define void @SIGNAL_4(%SIGNAL_4_interface* %0) { | |
entry: | |
%IN1 = getelementptr inbounds %SIGNAL_4_interface, %SIGNAL_4_interface* %0, i32 0, i32 0 | |
%IN2 = getelementptr inbounds %SIGNAL_4_interface, %SIGNAL_4_interface* %0, i32 0, i32 1 | |
%IN3 = getelementptr inbounds %SIGNAL_4_interface, %SIGNAL_4_interface* %0, i32 0, i32 2 | |
%IN4 = getelementptr inbounds %SIGNAL_4_interface, %SIGNAL_4_interface* %0, i32 0, i32 3 | |
%TS = getelementptr inbounds %SIGNAL_4_interface, %SIGNAL_4_interface* %0, i32 0, i32 4 | |
%S1 = getelementptr inbounds %SIGNAL_4_interface, %SIGNAL_4_interface* %0, i32 0, i32 5 | |
%S2 = getelementptr inbounds %SIGNAL_4_interface, %SIGNAL_4_interface* %0, i32 0, i32 6 | |
%S3 = getelementptr inbounds %SIGNAL_4_interface, %SIGNAL_4_interface* %0, i32 0, i32 7 | |
%S4 = getelementptr inbounds %SIGNAL_4_interface, %SIGNAL_4_interface* %0, i32 0, i32 8 | |
%Q = getelementptr inbounds %SIGNAL_4_interface, %SIGNAL_4_interface* %0, i32 0, i32 9 | |
%sig = getelementptr inbounds %SIGNAL_4_interface, %SIGNAL_4_interface* %0, i32 0, i32 10 | |
%load_in1 = load i8, i8* %IN1, align 1 | |
%1 = icmp ne i8 %load_in1, 0 | |
br i1 %1, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%2 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 0 | |
store i8 1, i8* %2, align 1 | |
%3 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 1 | |
%load_s1 = load i8, i8* %S1, align 1 | |
store i8 %load_s1, i8* %3, align 1 | |
%4 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 2 | |
%load_TS = load i64, i64* %TS, align 4 | |
store i64 %load_TS, i64* %4, align 4 | |
call void @SIGNAL(%SIGNAL_interface* %sig) | |
br label %continue | |
branch: ; preds = %entry | |
%load_in2 = load i8, i8* %IN2, align 1 | |
%5 = icmp ne i8 %load_in2, 0 | |
br i1 %5, label %condition_body3, label %branch1 | |
condition_body3: ; preds = %branch | |
%6 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 0 | |
store i8 1, i8* %6, align 1 | |
%7 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 1 | |
%load_s2 = load i8, i8* %S2, align 1 | |
store i8 %load_s2, i8* %7, align 1 | |
%8 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 2 | |
%load_TS4 = load i64, i64* %TS, align 4 | |
store i64 %load_TS4, i64* %8, align 4 | |
call void @SIGNAL(%SIGNAL_interface* %sig) | |
br label %continue | |
branch1: ; preds = %branch | |
%load_in3 = load i8, i8* %IN3, align 1 | |
%9 = icmp ne i8 %load_in3, 0 | |
br i1 %9, label %condition_body5, label %branch2 | |
condition_body5: ; preds = %branch1 | |
%10 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 0 | |
store i8 1, i8* %10, align 1 | |
%11 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 1 | |
%load_s3 = load i8, i8* %S3, align 1 | |
store i8 %load_s3, i8* %11, align 1 | |
%12 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 2 | |
%load_TS6 = load i64, i64* %TS, align 4 | |
store i64 %load_TS6, i64* %12, align 4 | |
call void @SIGNAL(%SIGNAL_interface* %sig) | |
br label %continue | |
branch2: ; preds = %branch1 | |
%load_in4 = load i8, i8* %IN4, align 1 | |
%13 = icmp ne i8 %load_in4, 0 | |
br i1 %13, label %condition_body7, label %else | |
condition_body7: ; preds = %branch2 | |
%14 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 0 | |
store i8 1, i8* %14, align 1 | |
%15 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 1 | |
%load_s4 = load i8, i8* %S4, align 1 | |
store i8 %load_s4, i8* %15, align 1 | |
%16 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 2 | |
%load_TS8 = load i64, i64* %TS, align 4 | |
store i64 %load_TS8, i64* %16, align 4 | |
call void @SIGNAL(%SIGNAL_interface* %sig) | |
br label %continue | |
else: ; preds = %branch2 | |
%17 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 0 | |
store i8 0, i8* %17, align 1 | |
call void @SIGNAL(%SIGNAL_interface* %sig) | |
br label %continue | |
continue: ; preds = %else, %condition_body7, %condition_body5, %condition_body3, %condition_body | |
%Q9 = getelementptr inbounds %SIGNAL_interface, %SIGNAL_interface* %sig, i32 0, i32 3 | |
%load_ = load i8, i8* %Q9, align 1 | |
store i8 %load_, i8* %Q, align 1 | |
ret void | |
} | |
define void @SRAMP(%SRAMP_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %SRAMP_interface, %SRAMP_interface* %0, i32 0, i32 0 | |
%A_UP = getelementptr inbounds %SRAMP_interface, %SRAMP_interface* %0, i32 0, i32 1 | |
%A_DN = getelementptr inbounds %SRAMP_interface, %SRAMP_interface* %0, i32 0, i32 2 | |
%VU_MAX = getelementptr inbounds %SRAMP_interface, %SRAMP_interface* %0, i32 0, i32 3 | |
%VD_MAX = getelementptr inbounds %SRAMP_interface, %SRAMP_interface* %0, i32 0, i32 4 | |
%LIMIT_HIGH = getelementptr inbounds %SRAMP_interface, %SRAMP_interface* %0, i32 0, i32 5 | |
%LIMIT_LOW = getelementptr inbounds %SRAMP_interface, %SRAMP_interface* %0, i32 0, i32 6 | |
%RST = getelementptr inbounds %SRAMP_interface, %SRAMP_interface* %0, i32 0, i32 7 | |
%Y = getelementptr inbounds %SRAMP_interface, %SRAMP_interface* %0, i32 0, i32 8 | |
%V = getelementptr inbounds %SRAMP_interface, %SRAMP_interface* %0, i32 0, i32 9 | |
%cycle_time = getelementptr inbounds %SRAMP_interface, %SRAMP_interface* %0, i32 0, i32 10 | |
%init = getelementptr inbounds %SRAMP_interface, %SRAMP_interface* %0, i32 0, i32 11 | |
call void @TC_S(%TC_S_interface* %cycle_time) | |
%MAX_instance = alloca %MAX_interface, align 8 | |
%1 = getelementptr inbounds %MAX_interface, %MAX_interface* %MAX_instance, i32 0, i32 0 | |
store i64 0, i64* %1, align 4 | |
%2 = getelementptr inbounds %MAX_interface, %MAX_interface* %MAX_instance, i32 0, i32 1 | |
%load_A_UP = load float, float* %A_UP, align 4 | |
%3 = fptoui float %load_A_UP to i64 | |
store i64 %3, i64* %2, align 4 | |
%call = call i64 @MAX(%MAX_interface* %MAX_instance) | |
%4 = uitofp i64 %call to float | |
store float %4, float* %A_UP, align 4 | |
%MIN_instance = alloca %MIN_interface, align 8 | |
%5 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 0 | |
store i64 0, i64* %5, align 4 | |
%6 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 1 | |
%load_A_dn = load float, float* %A_DN, align 4 | |
%7 = fptoui float %load_A_dn to i64 | |
store i64 %7, i64* %6, align 4 | |
%call1 = call i64 @MIN(%MIN_interface* %MIN_instance) | |
%8 = uitofp i64 %call1 to float | |
store float %8, float* %A_DN, align 4 | |
%MAX_instance2 = alloca %MAX_interface, align 8 | |
%9 = getelementptr inbounds %MAX_interface, %MAX_interface* %MAX_instance2, i32 0, i32 0 | |
store i64 0, i64* %9, align 4 | |
%10 = getelementptr inbounds %MAX_interface, %MAX_interface* %MAX_instance2, i32 0, i32 1 | |
%load_VU_max = load float, float* %VU_MAX, align 4 | |
%11 = fptoui float %load_VU_max to i64 | |
store i64 %11, i64* %10, align 4 | |
%call3 = call i64 @MAX(%MAX_interface* %MAX_instance2) | |
%12 = uitofp i64 %call3 to float | |
store float %12, float* %VU_MAX, align 4 | |
%MIN_instance4 = alloca %MIN_interface, align 8 | |
%13 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance4, i32 0, i32 0 | |
store i64 0, i64* %13, align 4 | |
%14 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance4, i32 0, i32 1 | |
%load_VD_MAX = load float, float* %VD_MAX, align 4 | |
%15 = fptoui float %load_VD_MAX to i64 | |
store i64 %15, i64* %14, align 4 | |
%call5 = call i64 @MIN(%MIN_interface* %MIN_instance4) | |
%16 = uitofp i64 %call5 to float | |
store float %16, float* %VD_MAX, align 4 | |
%load_rst = load i8, i8* %RST, align 1 | |
%17 = icmp ne i8 %load_rst, 0 | |
br i1 %17, label %70, label %68 | |
condition_body: ; preds = %70 | |
store i8 1, i8* %init, align 1 | |
store float 0.000000e+00, float* %Y, align 4 | |
store float 0.000000e+00, float* %V, align 4 | |
br label %continue | |
branch: ; preds = %70 | |
%load_X = load float, float* %X, align 4 | |
%load_Y = load float, float* %Y, align 4 | |
%tmpVar8 = fcmp oeq float %load_X, %load_Y | |
br i1 %tmpVar8, label %condition_body9, label %branch6 | |
condition_body9: ; preds = %branch | |
store float 0.000000e+00, float* %V, align 4 | |
br label %continue | |
branch6: ; preds = %branch | |
%load_X10 = load float, float* %X, align 4 | |
%load_Y11 = load float, float* %Y, align 4 | |
%tmpVar12 = fcmp ogt float %load_X10, %load_Y11 | |
br i1 %tmpVar12, label %condition_body13, label %branch7 | |
condition_body13: ; preds = %branch6 | |
%MIN_instance14 = alloca %MIN_interface, align 8 | |
%18 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance14, i32 0, i32 0 | |
%load_v = load float, float* %V, align 4 | |
%load_A_UP15 = load float, float* %A_UP, align 4 | |
%TC = getelementptr inbounds %TC_S_interface, %TC_S_interface* %cycle_time, i32 0, i32 0 | |
%load_ = load float, float* %TC, align 4 | |
%tmpVar16 = fmul float %load_A_UP15, %load_ | |
%tmpVar17 = fadd float %load_v, %tmpVar16 | |
%19 = fptoui float %tmpVar17 to i64 | |
store i64 %19, i64* %18, align 4 | |
%20 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance14, i32 0, i32 1 | |
%load_vu_max = load float, float* %VU_MAX, align 4 | |
%21 = fptoui float %load_vu_max to i64 | |
store i64 %21, i64* %20, align 4 | |
%call18 = call i64 @MIN(%MIN_interface* %MIN_instance14) | |
%22 = uitofp i64 %call18 to float | |
store float %22, float* %V, align 4 | |
%MIN_instance19 = alloca %MIN_interface, align 8 | |
%23 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance19, i32 0, i32 0 | |
%SQRT_instance = alloca %SQRT_interface, align 8 | |
%24 = getelementptr inbounds %SQRT_interface, %SQRT_interface* %SQRT_instance, i32 0, i32 0 | |
%load_Y20 = load float, float* %Y, align 4 | |
%load_X21 = load float, float* %X, align 4 | |
%tmpVar22 = fsub float %load_Y20, %load_X21 | |
%tmpVar23 = fmul float %tmpVar22, 2.000000e+00 | |
%load_A_DN = load float, float* %A_DN, align 4 | |
%tmpVar24 = fmul float %tmpVar23, %load_A_DN | |
%25 = fptosi float %tmpVar24 to i32 | |
store i32 %25, i32* %24, align 4 | |
%call25 = call double @SQRT(%SQRT_interface* %SQRT_instance) | |
%26 = fptoui double %call25 to i64 | |
store i64 %26, i64* %23, align 4 | |
%27 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance19, i32 0, i32 1 | |
%load_v26 = load float, float* %V, align 4 | |
%28 = fptoui float %load_v26 to i64 | |
store i64 %28, i64* %27, align 4 | |
%call27 = call i64 @MIN(%MIN_interface* %MIN_instance19) | |
%29 = uitofp i64 %call27 to float | |
store float %29, float* %V, align 4 | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%30 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_limit_low = load float, float* %LIMIT_LOW, align 4 | |
%31 = fptoui float %load_limit_low to i64 | |
store i64 %31, i64* %30, align 4 | |
%32 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_y = load float, float* %Y, align 4 | |
%33 = fpext float %load_y to double | |
%MIN_instance28 = alloca %MIN_interface, align 8 | |
%34 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance28, i32 0, i32 0 | |
%load_v29 = load float, float* %V, align 4 | |
%TC30 = getelementptr inbounds %TC_S_interface, %TC_S_interface* %cycle_time, i32 0, i32 0 | |
%load_31 = load float, float* %TC30, align 4 | |
%tmpVar32 = fmul float %load_v29, %load_31 | |
%35 = fptoui float %tmpVar32 to i64 | |
store i64 %35, i64* %34, align 4 | |
%36 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance28, i32 0, i32 1 | |
%load_X33 = load float, float* %X, align 4 | |
%load_Y34 = load float, float* %Y, align 4 | |
%tmpVar35 = fsub float %load_X33, %load_Y34 | |
%37 = fptoui float %tmpVar35 to i64 | |
store i64 %37, i64* %36, align 4 | |
%call36 = call i64 @MIN(%MIN_interface* %MIN_instance28) | |
%38 = uitofp i64 %call36 to double | |
%tmpVar37 = fadd double %33, %38 | |
%39 = fptoui double %tmpVar37 to i64 | |
store i64 %39, i64* %32, align 4 | |
%40 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_limit_high = load float, float* %LIMIT_HIGH, align 4 | |
%41 = fptoui float %load_limit_high to i64 | |
store i64 %41, i64* %40, align 4 | |
%call38 = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%42 = uitofp i64 %call38 to float | |
store float %42, float* %Y, align 4 | |
br label %continue | |
branch7: ; preds = %branch6 | |
%load_X39 = load float, float* %X, align 4 | |
%load_Y40 = load float, float* %Y, align 4 | |
%tmpVar41 = fcmp olt float %load_X39, %load_Y40 | |
br i1 %tmpVar41, label %condition_body42, label %continue | |
condition_body42: ; preds = %branch7 | |
%MAX_instance43 = alloca %MAX_interface, align 8 | |
%43 = getelementptr inbounds %MAX_interface, %MAX_interface* %MAX_instance43, i32 0, i32 0 | |
%load_v44 = load float, float* %V, align 4 | |
%load_A_DN45 = load float, float* %A_DN, align 4 | |
%TC46 = getelementptr inbounds %TC_S_interface, %TC_S_interface* %cycle_time, i32 0, i32 0 | |
%load_47 = load float, float* %TC46, align 4 | |
%tmpVar48 = fmul float %load_A_DN45, %load_47 | |
%tmpVar49 = fadd float %load_v44, %tmpVar48 | |
%44 = fptoui float %tmpVar49 to i64 | |
store i64 %44, i64* %43, align 4 | |
%45 = getelementptr inbounds %MAX_interface, %MAX_interface* %MAX_instance43, i32 0, i32 1 | |
%load_vd_max = load float, float* %VD_MAX, align 4 | |
%46 = fptoui float %load_vd_max to i64 | |
store i64 %46, i64* %45, align 4 | |
%call50 = call i64 @MAX(%MAX_interface* %MAX_instance43) | |
%47 = uitofp i64 %call50 to float | |
store float %47, float* %V, align 4 | |
%MAX_instance51 = alloca %MAX_interface, align 8 | |
%48 = getelementptr inbounds %MAX_interface, %MAX_interface* %MAX_instance51, i32 0, i32 0 | |
%SQRT_instance52 = alloca %SQRT_interface, align 8 | |
%49 = getelementptr inbounds %SQRT_interface, %SQRT_interface* %SQRT_instance52, i32 0, i32 0 | |
%load_Y53 = load float, float* %Y, align 4 | |
%load_X54 = load float, float* %X, align 4 | |
%tmpVar55 = fsub float %load_Y53, %load_X54 | |
%tmpVar56 = fmul float %tmpVar55, 2.000000e+00 | |
%load_A_UP57 = load float, float* %A_UP, align 4 | |
%tmpVar58 = fmul float %tmpVar56, %load_A_UP57 | |
%50 = fptosi float %tmpVar58 to i32 | |
store i32 %50, i32* %49, align 4 | |
%call59 = call double @SQRT(%SQRT_interface* %SQRT_instance52) | |
%tmpVar60 = fneg double %call59 | |
%51 = fptoui double %tmpVar60 to i64 | |
store i64 %51, i64* %48, align 4 | |
%52 = getelementptr inbounds %MAX_interface, %MAX_interface* %MAX_instance51, i32 0, i32 1 | |
%load_v61 = load float, float* %V, align 4 | |
%53 = fptoui float %load_v61 to i64 | |
store i64 %53, i64* %52, align 4 | |
%call62 = call i64 @MAX(%MAX_interface* %MAX_instance51) | |
%54 = uitofp i64 %call62 to float | |
store float %54, float* %V, align 4 | |
%LIMIT_instance63 = alloca %LIMIT_interface, align 8 | |
%55 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance63, i32 0, i32 0 | |
%load_limit_low64 = load float, float* %LIMIT_LOW, align 4 | |
%56 = fptoui float %load_limit_low64 to i64 | |
store i64 %56, i64* %55, align 4 | |
%57 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance63, i32 0, i32 1 | |
%load_y65 = load float, float* %Y, align 4 | |
%58 = fpext float %load_y65 to double | |
%MAX_instance66 = alloca %MAX_interface, align 8 | |
%59 = getelementptr inbounds %MAX_interface, %MAX_interface* %MAX_instance66, i32 0, i32 0 | |
%load_v67 = load float, float* %V, align 4 | |
%TC68 = getelementptr inbounds %TC_S_interface, %TC_S_interface* %cycle_time, i32 0, i32 0 | |
%load_69 = load float, float* %TC68, align 4 | |
%tmpVar70 = fmul float %load_v67, %load_69 | |
%60 = fptoui float %tmpVar70 to i64 | |
store i64 %60, i64* %59, align 4 | |
%61 = getelementptr inbounds %MAX_interface, %MAX_interface* %MAX_instance66, i32 0, i32 1 | |
%load_X71 = load float, float* %X, align 4 | |
%load_Y72 = load float, float* %Y, align 4 | |
%tmpVar73 = fsub float %load_X71, %load_Y72 | |
%62 = fptoui float %tmpVar73 to i64 | |
store i64 %62, i64* %61, align 4 | |
%call74 = call i64 @MAX(%MAX_interface* %MAX_instance66) | |
%63 = uitofp i64 %call74 to double | |
%tmpVar75 = fadd double %58, %63 | |
%64 = fptoui double %tmpVar75 to i64 | |
store i64 %64, i64* %57, align 4 | |
%65 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance63, i32 0, i32 2 | |
%load_limit_high76 = load float, float* %LIMIT_HIGH, align 4 | |
%66 = fptoui float %load_limit_high76 to i64 | |
store i64 %66, i64* %65, align 4 | |
%call77 = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance63) | |
%67 = uitofp i64 %call77 to float | |
store float %67, float* %Y, align 4 | |
br label %continue | |
continue: ; preds = %condition_body42, %branch7, %condition_body13, %condition_body9, %condition_body | |
ret void | |
68: ; preds = %entry | |
%load_init = load i8, i8* %init, align 1 | |
%69 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %69, true | |
br label %70 | |
70: ; preds = %68, %entry | |
%71 = phi i1 [ %17, %entry ], [ %tmpVar, %68 ] | |
br i1 %71, label %condition_body, label %branch | |
} | |
define void @TUNE(%TUNE_interface* %0) { | |
entry: | |
%SET = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 0 | |
%SU = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 1 | |
%SD = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 2 | |
%RST = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 3 | |
%SS = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 4 | |
%Limit_L = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 5 | |
%LIMIT_H = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 6 | |
%RST_val = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 7 | |
%SET_val = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 8 | |
%T1 = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 9 | |
%T2 = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 10 | |
%S1 = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 11 | |
%S2 = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 12 | |
%Y = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 13 | |
%tx = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 14 | |
%start = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 15 | |
%start2 = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 16 | |
%state = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 17 | |
%in = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 18 | |
%step = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 19 | |
%SPEED = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 20 | |
%Y_start = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 21 | |
%Y_start2 = getelementptr inbounds %TUNE_interface, %TUNE_interface* %0, i32 0, i32 22 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_rst = load i8, i8* %RST, align 1 | |
%1 = icmp ne i8 %load_rst, 0 | |
br i1 %1, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%load_RST_val = load float, float* %RST_val, align 4 | |
store float %load_RST_val, float* %Y, align 4 | |
store i16 0, i16* %state, align 2 | |
br label %continue | |
branch: ; preds = %entry | |
%load_set = load i8, i8* %SET, align 1 | |
%2 = icmp ne i8 %load_set, 0 | |
br i1 %2, label %condition_body4, label %branch1 | |
condition_body4: ; preds = %branch | |
%load_SET_val = load float, float* %SET_val, align 4 | |
store float %load_SET_val, float* %Y, align 4 | |
store i16 0, i16* %state, align 2 | |
br label %continue | |
branch1: ; preds = %branch | |
%load_state = load i16, i16* %state, align 2 | |
%3 = sext i16 %load_state to i32 | |
%tmpVar = icmp sgt i32 %3, 0 | |
br i1 %tmpVar, label %condition_body5, label %branch2 | |
condition_body5: ; preds = %branch1 | |
%load_state7 = load i16, i16* %state, align 2 | |
%4 = sext i16 %load_state7 to i32 | |
%tmpVar8 = icmp eq i32 %4, 1 | |
br i1 %tmpVar8, label %condition_body9, label %else | |
branch2: ; preds = %branch1 | |
%load_su61 = load i8, i8* %SU, align 1 | |
%5 = icmp ne i8 %load_su61, 0 | |
br i1 %5, label %condition_body62, label %branch3 | |
condition_body62: ; preds = %branch2 | |
store i16 1, i16* %state, align 2 | |
%load_tx63 = load i32, i32* %tx, align 4 | |
store i32 %load_tx63, i32* %start, align 4 | |
%load_ss = load float, float* %SS, align 4 | |
store float %load_ss, float* %step, align 4 | |
store float 1.000000e+03, float* %SPEED, align 4 | |
%load_Y64 = load float, float* %Y, align 4 | |
store float %load_Y64, float* %Y_start, align 4 | |
br label %continue | |
branch3: ; preds = %branch2 | |
%load_sd65 = load i8, i8* %SD, align 1 | |
%6 = icmp ne i8 %load_sd65, 0 | |
br i1 %6, label %condition_body66, label %continue | |
condition_body66: ; preds = %branch3 | |
store i16 2, i16* %state, align 2 | |
%load_tx67 = load i32, i32* %tx, align 4 | |
store i32 %load_tx67, i32* %start, align 4 | |
%load_ss68 = load float, float* %SS, align 4 | |
%tmpVar69 = fneg float %load_ss68 | |
store float %tmpVar69, float* %step, align 4 | |
store float -1.000000e+03, float* %SPEED, align 4 | |
%load_Y70 = load float, float* %Y, align 4 | |
store float %load_Y70, float* %Y_start, align 4 | |
br label %continue | |
continue: ; preds = %condition_body66, %branch3, %condition_body62, %continue13, %condition_body4, %condition_body | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%7 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_LIMIT_L = load float, float* %Limit_L, align 4 | |
%8 = fptoui float %load_LIMIT_L to i64 | |
store i64 %8, i64* %7, align 4 | |
%9 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_Y71 = load float, float* %Y, align 4 | |
%10 = fptoui float %load_Y71 to i64 | |
store i64 %10, i64* %9, align 4 | |
%11 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_LIMIT_H = load float, float* %LIMIT_H, align 4 | |
%12 = fptoui float %load_LIMIT_H to i64 | |
store i64 %12, i64* %11, align 4 | |
%call72 = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%13 = uitofp i64 %call72 to float | |
store float %13, float* %Y, align 4 | |
ret void | |
condition_body9: ; preds = %condition_body5 | |
%load_su = load i8, i8* %SU, align 1 | |
store i8 %load_su, i8* %in, align 1 | |
br label %continue6 | |
else: ; preds = %condition_body5 | |
%load_sd = load i8, i8* %SD, align 1 | |
store i8 %load_sd, i8* %in, align 1 | |
br label %continue6 | |
continue6: ; preds = %else, %condition_body9 | |
%load_in = load i8, i8* %in, align 1 | |
%14 = icmp ne i8 %load_in, 0 | |
%tmpVar14 = xor i1 %14, true | |
br i1 %tmpVar14, label %21, label %23 | |
condition_body18: ; preds = %23 | |
%load_Y_start = load float, float* %Y_start, align 4 | |
%load_step = load float, float* %step, align 4 | |
%tmpVar19 = fadd float %load_Y_start, %load_step | |
store float %tmpVar19, float* %Y, align 4 | |
store i16 0, i16* %state, align 2 | |
br label %continue13 | |
branch10: ; preds = %23 | |
%load_in20 = load i8, i8* %in, align 1 | |
%15 = icmp ne i8 %load_in20, 0 | |
br i1 %15, label %25, label %27 | |
condition_body27: ; preds = %27 | |
%load_Y_start2 = load float, float* %Y_start2, align 4 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%16 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%load_tx28 = load i32, i32* %tx, align 4 | |
%load_start2 = load i32, i32* %start2, align 4 | |
%tmpVar29 = sub i32 %load_tx28, %load_start2 | |
store i32 %tmpVar29, i32* %16, align 4 | |
%call30 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%load_s2 = load float, float* %S2, align 4 | |
%tmpVar31 = fmul float %call30, %load_s2 | |
%load_speed = load float, float* %SPEED, align 4 | |
%tmpVar32 = fdiv float %tmpVar31, %load_speed | |
%tmpVar33 = fadd float %load_Y_start2, %tmpVar32 | |
store float %tmpVar33, float* %Y, align 4 | |
br label %continue13 | |
branch11: ; preds = %27 | |
%load_in34 = load i8, i8* %in, align 1 | |
%17 = icmp ne i8 %load_in34, 0 | |
br i1 %17, label %29, label %31 | |
condition_body42: ; preds = %31 | |
%load_Y_start43 = load float, float* %Y_start, align 4 | |
%DWORD_TO_REAL_instance44 = alloca %DWORD_TO_REAL_interface, align 8 | |
%18 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance44, i32 0, i32 0 | |
%load_tx45 = load i32, i32* %tx, align 4 | |
%load_start46 = load i32, i32* %start, align 4 | |
%tmpVar47 = sub i32 %load_tx45, %load_start46 | |
%TIME_TO_DWORD_instance48 = alloca %TIME_TO_DWORD_interface, align 8 | |
%19 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance48, i32 0, i32 0 | |
%load_T149 = load i64, i64* %T1, align 4 | |
store i64 %load_T149, i64* %19, align 4 | |
%call50 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance48) | |
%tmpVar51 = sub i32 %tmpVar47, %call50 | |
store i32 %tmpVar51, i32* %18, align 4 | |
%call52 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance44) | |
%load_S1 = load float, float* %S1, align 4 | |
%tmpVar53 = fmul float %call52, %load_S1 | |
%load_speed54 = load float, float* %SPEED, align 4 | |
%tmpVar55 = fdiv float %tmpVar53, %load_speed54 | |
%tmpVar56 = fadd float %load_Y_start43, %tmpVar55 | |
store float %tmpVar56, float* %Y, align 4 | |
%load_tx57 = load i32, i32* %tx, align 4 | |
store i32 %load_tx57, i32* %start2, align 4 | |
%load_Y = load float, float* %Y, align 4 | |
store float %load_Y, float* %Y_start2, align 4 | |
br label %continue13 | |
branch12: ; preds = %31 | |
%load_in58 = load i8, i8* %in, align 1 | |
%20 = icmp ne i8 %load_in58, 0 | |
%tmpVar59 = xor i1 %20, true | |
br i1 %tmpVar59, label %condition_body60, label %continue13 | |
condition_body60: ; preds = %branch12 | |
store i16 0, i16* %state, align 2 | |
br label %continue13 | |
continue13: ; preds = %condition_body60, %branch12, %condition_body42, %condition_body27, %condition_body18 | |
br label %continue | |
21: ; preds = %continue6 | |
%load_tx = load i32, i32* %tx, align 4 | |
%load_start = load i32, i32* %start, align 4 | |
%tmpVar15 = sub i32 %load_tx, %load_start | |
%TIME_TO_DWORD_instance = alloca %TIME_TO_DWORD_interface, align 8 | |
%22 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance, i32 0, i32 0 | |
%load_T1 = load i64, i64* %T1, align 4 | |
store i64 %load_T1, i64* %22, align 4 | |
%call16 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance) | |
%tmpVar17 = icmp sle i32 %tmpVar15, %call16 | |
br label %23 | |
23: ; preds = %21, %continue6 | |
%24 = phi i1 [ %tmpVar14, %continue6 ], [ %tmpVar17, %21 ] | |
br i1 %24, label %condition_body18, label %branch10 | |
25: ; preds = %branch10 | |
%load_tx21 = load i32, i32* %tx, align 4 | |
%load_start22 = load i32, i32* %start, align 4 | |
%tmpVar23 = sub i32 %load_tx21, %load_start22 | |
%TIME_TO_DWORD_instance24 = alloca %TIME_TO_DWORD_interface, align 8 | |
%26 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance24, i32 0, i32 0 | |
%load_T2 = load i64, i64* %T2, align 4 | |
store i64 %load_T2, i64* %26, align 4 | |
%call25 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance24) | |
%tmpVar26 = icmp sge i32 %tmpVar23, %call25 | |
br label %27 | |
27: ; preds = %25, %branch10 | |
%28 = phi i1 [ %15, %branch10 ], [ %tmpVar26, %25 ] | |
br i1 %28, label %condition_body27, label %branch11 | |
29: ; preds = %branch11 | |
%load_tx35 = load i32, i32* %tx, align 4 | |
%load_start36 = load i32, i32* %start, align 4 | |
%tmpVar37 = sub i32 %load_tx35, %load_start36 | |
%TIME_TO_DWORD_instance38 = alloca %TIME_TO_DWORD_interface, align 8 | |
%30 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance38, i32 0, i32 0 | |
%load_T139 = load i64, i64* %T1, align 4 | |
store i64 %load_T139, i64* %30, align 4 | |
%call40 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance38) | |
%tmpVar41 = icmp sge i32 %tmpVar37, %call40 | |
br label %31 | |
31: ; preds = %29, %branch11 | |
%32 = phi i1 [ %17, %branch11 ], [ %tmpVar41, %29 ] | |
br i1 %32, label %condition_body42, label %branch12 | |
} | |
define void @TUNE2(%TUNE2_interface* %0) { | |
entry: | |
%SET = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 0 | |
%SU = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 1 | |
%SD = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 2 | |
%FU = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 3 | |
%FD = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 4 | |
%RST = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 5 | |
%SS = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 6 | |
%FS = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 7 | |
%Limit_L = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 8 | |
%LIMIT_H = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 9 | |
%RST_val = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 10 | |
%SET_val = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 11 | |
%TR = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 12 | |
%S1 = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 13 | |
%S2 = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 14 | |
%Y = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 15 | |
%tx = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 16 | |
%start = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 17 | |
%state = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 18 | |
%in = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 19 | |
%step = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 20 | |
%SPEED = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 21 | |
%Y_start = getelementptr inbounds %TUNE2_interface, %TUNE2_interface* %0, i32 0, i32 22 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_rst = load i8, i8* %RST, align 1 | |
%1 = icmp ne i8 %load_rst, 0 | |
br i1 %1, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%load_RST_val = load float, float* %RST_val, align 4 | |
store float %load_RST_val, float* %Y, align 4 | |
store i16 0, i16* %state, align 2 | |
br label %continue | |
branch: ; preds = %entry | |
%load_set = load i8, i8* %SET, align 1 | |
%2 = icmp ne i8 %load_set, 0 | |
br i1 %2, label %condition_body6, label %branch1 | |
condition_body6: ; preds = %branch | |
%load_SET_val = load float, float* %SET_val, align 4 | |
store float %load_SET_val, float* %Y, align 4 | |
store i16 0, i16* %state, align 2 | |
br label %continue | |
branch1: ; preds = %branch | |
%load_state = load i16, i16* %state, align 2 | |
%3 = sext i16 %load_state to i32 | |
%tmpVar = icmp sgt i32 %3, 0 | |
br i1 %tmpVar, label %condition_body7, label %branch2 | |
condition_body7: ; preds = %branch1 | |
%load_state9 = load i16, i16* %state, align 2 | |
switch i16 %load_state9, label %else [ | |
i16 1, label %case | |
i16 2, label %case10 | |
i16 3, label %case11 | |
i16 4, label %case12 | |
] | |
branch2: ; preds = %branch1 | |
%load_su45 = load i8, i8* %SU, align 1 | |
%4 = icmp ne i8 %load_su45, 0 | |
br i1 %4, label %condition_body46, label %branch3 | |
condition_body46: ; preds = %branch2 | |
store i16 1, i16* %state, align 2 | |
%load_tx47 = load i32, i32* %tx, align 4 | |
store i32 %load_tx47, i32* %start, align 4 | |
%load_ss = load float, float* %SS, align 4 | |
store float %load_ss, float* %step, align 4 | |
%load_s1 = load float, float* %S1, align 4 | |
%tmpVar48 = fmul float %load_s1, 0x3F50624DE0000000 | |
store float %tmpVar48, float* %SPEED, align 4 | |
%load_Y = load float, float* %Y, align 4 | |
store float %load_Y, float* %Y_start, align 4 | |
br label %continue | |
branch3: ; preds = %branch2 | |
%load_sd49 = load i8, i8* %SD, align 1 | |
%5 = icmp ne i8 %load_sd49, 0 | |
br i1 %5, label %condition_body50, label %branch4 | |
condition_body50: ; preds = %branch3 | |
store i16 2, i16* %state, align 2 | |
%load_tx51 = load i32, i32* %tx, align 4 | |
store i32 %load_tx51, i32* %start, align 4 | |
%load_ss52 = load float, float* %SS, align 4 | |
%tmpVar53 = fneg float %load_ss52 | |
store float %tmpVar53, float* %step, align 4 | |
%load_s154 = load float, float* %S1, align 4 | |
%tmpVar55 = fneg float %load_s154 | |
%tmpVar56 = fmul float %tmpVar55, 0x3F50624DE0000000 | |
store float %tmpVar56, float* %SPEED, align 4 | |
%load_Y57 = load float, float* %Y, align 4 | |
store float %load_Y57, float* %Y_start, align 4 | |
br label %continue | |
branch4: ; preds = %branch3 | |
%load_fu58 = load i8, i8* %FU, align 1 | |
%6 = icmp ne i8 %load_fu58, 0 | |
br i1 %6, label %condition_body59, label %branch5 | |
condition_body59: ; preds = %branch4 | |
store i16 3, i16* %state, align 2 | |
%load_tx60 = load i32, i32* %tx, align 4 | |
store i32 %load_tx60, i32* %start, align 4 | |
%load_fs = load float, float* %FS, align 4 | |
store float %load_fs, float* %step, align 4 | |
%load_s2 = load float, float* %S2, align 4 | |
%tmpVar61 = fmul float %load_s2, 0x3F50624DE0000000 | |
store float %tmpVar61, float* %SPEED, align 4 | |
%load_Y62 = load float, float* %Y, align 4 | |
store float %load_Y62, float* %Y_start, align 4 | |
br label %continue | |
branch5: ; preds = %branch4 | |
%load_fd63 = load i8, i8* %FD, align 1 | |
%7 = icmp ne i8 %load_fd63, 0 | |
br i1 %7, label %condition_body64, label %continue | |
condition_body64: ; preds = %branch5 | |
store i16 4, i16* %state, align 2 | |
%load_tx65 = load i32, i32* %tx, align 4 | |
store i32 %load_tx65, i32* %start, align 4 | |
%load_fs66 = load float, float* %FS, align 4 | |
%tmpVar67 = fneg float %load_fs66 | |
store float %tmpVar67, float* %step, align 4 | |
%load_s268 = load float, float* %S2, align 4 | |
%tmpVar69 = fneg float %load_s268 | |
%tmpVar70 = fmul float %tmpVar69, 0x3F50624DE0000000 | |
store float %tmpVar70, float* %SPEED, align 4 | |
%load_Y71 = load float, float* %Y, align 4 | |
store float %load_Y71, float* %Y_start, align 4 | |
br label %continue | |
continue: ; preds = %condition_body64, %branch5, %condition_body59, %condition_body50, %condition_body46, %continue15, %condition_body6, %condition_body | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%8 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_LIMIT_L = load float, float* %Limit_L, align 4 | |
%9 = fptoui float %load_LIMIT_L to i64 | |
store i64 %9, i64* %8, align 4 | |
%10 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_Y72 = load float, float* %Y, align 4 | |
%11 = fptoui float %load_Y72 to i64 | |
store i64 %11, i64* %10, align 4 | |
%12 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_LIMIT_H = load float, float* %LIMIT_H, align 4 | |
%13 = fptoui float %load_LIMIT_H to i64 | |
store i64 %13, i64* %12, align 4 | |
%call73 = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%14 = uitofp i64 %call73 to float | |
store float %14, float* %Y, align 4 | |
ret void | |
case: ; preds = %condition_body7 | |
%load_su = load i8, i8* %SU, align 1 | |
store i8 %load_su, i8* %in, align 1 | |
br label %continue8 | |
case10: ; preds = %condition_body7 | |
%load_sd = load i8, i8* %SD, align 1 | |
store i8 %load_sd, i8* %in, align 1 | |
br label %continue8 | |
case11: ; preds = %condition_body7 | |
%load_fu = load i8, i8* %FU, align 1 | |
store i8 %load_fu, i8* %in, align 1 | |
br label %continue8 | |
case12: ; preds = %condition_body7 | |
%load_fd = load i8, i8* %FD, align 1 | |
store i8 %load_fd, i8* %in, align 1 | |
br label %continue8 | |
else: ; preds = %condition_body7 | |
br label %continue8 | |
continue8: ; preds = %else, %case12, %case11, %case10, %case | |
%load_in = load i8, i8* %in, align 1 | |
%15 = icmp ne i8 %load_in, 0 | |
%tmpVar16 = xor i1 %15, true | |
br i1 %tmpVar16, label %20, label %22 | |
condition_body20: ; preds = %22 | |
%load_Y_start = load float, float* %Y_start, align 4 | |
%load_step = load float, float* %step, align 4 | |
%tmpVar21 = fadd float %load_Y_start, %load_step | |
store float %tmpVar21, float* %Y, align 4 | |
store i16 0, i16* %state, align 2 | |
br label %continue15 | |
branch13: ; preds = %22 | |
%load_in22 = load i8, i8* %in, align 1 | |
%16 = icmp ne i8 %load_in22, 0 | |
br i1 %16, label %24, label %26 | |
condition_body30: ; preds = %26 | |
%load_Y_start31 = load float, float* %Y_start, align 4 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%17 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%load_tx32 = load i32, i32* %tx, align 4 | |
%load_start33 = load i32, i32* %start, align 4 | |
%tmpVar34 = sub i32 %load_tx32, %load_start33 | |
%TIME_TO_DWORD_instance35 = alloca %TIME_TO_DWORD_interface, align 8 | |
%18 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance35, i32 0, i32 0 | |
%load_TR36 = load i64, i64* %TR, align 4 | |
store i64 %load_TR36, i64* %18, align 4 | |
%call37 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance35) | |
%tmpVar38 = sub i32 %tmpVar34, %call37 | |
store i32 %tmpVar38, i32* %17, align 4 | |
%call39 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%load_speed = load float, float* %SPEED, align 4 | |
%tmpVar40 = fmul float %call39, %load_speed | |
%tmpVar41 = fadd float %load_Y_start31, %tmpVar40 | |
store float %tmpVar41, float* %Y, align 4 | |
br label %continue15 | |
branch14: ; preds = %26 | |
%load_in42 = load i8, i8* %in, align 1 | |
%19 = icmp ne i8 %load_in42, 0 | |
%tmpVar43 = xor i1 %19, true | |
br i1 %tmpVar43, label %condition_body44, label %continue15 | |
condition_body44: ; preds = %branch14 | |
store i16 0, i16* %state, align 2 | |
br label %continue15 | |
continue15: ; preds = %condition_body44, %branch14, %condition_body30, %condition_body20 | |
br label %continue | |
20: ; preds = %continue8 | |
%load_tx = load i32, i32* %tx, align 4 | |
%load_start = load i32, i32* %start, align 4 | |
%tmpVar17 = sub i32 %load_tx, %load_start | |
%TIME_TO_DWORD_instance = alloca %TIME_TO_DWORD_interface, align 8 | |
%21 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance, i32 0, i32 0 | |
%load_TR = load i64, i64* %TR, align 4 | |
store i64 %load_TR, i64* %21, align 4 | |
%call18 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance) | |
%tmpVar19 = icmp sle i32 %tmpVar17, %call18 | |
br label %22 | |
22: ; preds = %20, %continue8 | |
%23 = phi i1 [ %tmpVar16, %continue8 ], [ %tmpVar19, %20 ] | |
br i1 %23, label %condition_body20, label %branch13 | |
24: ; preds = %branch13 | |
%load_tx23 = load i32, i32* %tx, align 4 | |
%load_start24 = load i32, i32* %start, align 4 | |
%tmpVar25 = sub i32 %load_tx23, %load_start24 | |
%TIME_TO_DWORD_instance26 = alloca %TIME_TO_DWORD_interface, align 8 | |
%25 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance26, i32 0, i32 0 | |
%load_TR27 = load i64, i64* %TR, align 4 | |
store i64 %load_TR27, i64* %25, align 4 | |
%call28 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance26) | |
%tmpVar29 = icmp sge i32 %tmpVar25, %call28 | |
br label %26 | |
26: ; preds = %24, %branch13 | |
%27 = phi i1 [ %16, %branch13 ], [ %tmpVar29, %24 ] | |
br i1 %27, label %condition_body30, label %branch14 | |
} | |
define i8 @BAND_B(%BAND_B_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %BAND_B_interface, %BAND_B_interface* %0, i32 0, i32 0 | |
%B = getelementptr inbounds %BAND_B_interface, %BAND_B_interface* %0, i32 0, i32 1 | |
%BAND_B = alloca i8, align 1 | |
store i8 0, i8* %BAND_B, align 1 | |
%load_X = load i8, i8* %X, align 1 | |
%1 = zext i8 %load_X to i32 | |
%load_B = load i8, i8* %B, align 1 | |
%2 = zext i8 %load_B to i32 | |
%tmpVar = icmp slt i32 %1, %2 | |
br i1 %tmpVar, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
store i8 0, i8* %BAND_B, align 1 | |
br label %continue | |
branch: ; preds = %entry | |
%load_X1 = load i8, i8* %X, align 1 | |
%3 = zext i8 %load_X1 to i32 | |
%load_B2 = load i8, i8* %B, align 1 | |
%4 = zext i8 %load_B2 to i32 | |
%tmpVar3 = sub i32 255, %4 | |
%tmpVar4 = icmp sgt i32 %3, %tmpVar3 | |
br i1 %tmpVar4, label %condition_body5, label %else | |
condition_body5: ; preds = %branch | |
store i8 -1, i8* %BAND_B, align 1 | |
br label %continue | |
else: ; preds = %branch | |
%load_X6 = load i8, i8* %X, align 1 | |
store i8 %load_X6, i8* %BAND_B, align 1 | |
br label %continue | |
continue: ; preds = %else, %condition_body5, %condition_body | |
%BAND_B_ret = load i8, i8* %BAND_B, align 1 | |
ret i8 %BAND_B_ret | |
} | |
define void @CONTROL_SET1(%CONTROL_SET1_interface* %0) { | |
entry: | |
%Kt = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 0 | |
%Tt = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 1 | |
%PI = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 2 | |
%PID = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 3 | |
%P_K = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 4 | |
%PI_K = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 5 | |
%PI_TN = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 6 | |
%PID_K = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 7 | |
%PID_TN = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 8 | |
%PID_TV = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 9 | |
%KP = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 10 | |
%TN = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 11 | |
%TV = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 12 | |
%KI = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 13 | |
%KD = getelementptr inbounds %CONTROL_SET1_interface, %CONTROL_SET1_interface* %0, i32 0, i32 14 | |
%load_pi = load i8, i8* %PI, align 1 | |
%1 = icmp ne i8 %load_pi, 0 | |
br i1 %1, label %4, label %6 | |
condition_body: ; preds = %6 | |
store float 0.000000e+00, float* %KP, align 4 | |
store float 0.000000e+00, float* %TN, align 4 | |
store float 0.000000e+00, float* %TV, align 4 | |
br label %continue | |
branch: ; preds = %6 | |
%load_PID2 = load i8, i8* %PID, align 1 | |
%2 = icmp ne i8 %load_PID2, 0 | |
br i1 %2, label %condition_body3, label %branch1 | |
condition_body3: ; preds = %branch | |
%load_PID_K = load float, float* %PID_K, align 4 | |
%load_Kt = load float, float* %Kt, align 4 | |
%tmpVar = fmul float %load_PID_K, %load_Kt | |
store float %tmpVar, float* %KP, align 4 | |
%load_PID_TN = load float, float* %PID_TN, align 4 | |
%load_Tt = load float, float* %Tt, align 4 | |
%tmpVar4 = fmul float %load_PID_TN, %load_Tt | |
store float %tmpVar4, float* %TN, align 4 | |
%load_PID_TV = load float, float* %PID_TV, align 4 | |
%load_Tt5 = load float, float* %Tt, align 4 | |
%tmpVar6 = fmul float %load_PID_TV, %load_Tt5 | |
store float %tmpVar6, float* %TV, align 4 | |
br label %continue | |
branch1: ; preds = %branch | |
%load_PI = load i8, i8* %PI, align 1 | |
%3 = icmp ne i8 %load_PI, 0 | |
br i1 %3, label %condition_body7, label %else | |
condition_body7: ; preds = %branch1 | |
%load_PI_K = load float, float* %PI_K, align 4 | |
%load_Kt8 = load float, float* %Kt, align 4 | |
%tmpVar9 = fmul float %load_PI_K, %load_Kt8 | |
store float %tmpVar9, float* %KP, align 4 | |
%load_PI_TN = load float, float* %PI_TN, align 4 | |
%load_Tt10 = load float, float* %Tt, align 4 | |
%tmpVar11 = fmul float %load_PI_TN, %load_Tt10 | |
store float %tmpVar11, float* %TN, align 4 | |
br label %continue | |
else: ; preds = %branch1 | |
%load_P_K = load float, float* %P_K, align 4 | |
%load_Kt12 = load float, float* %Kt, align 4 | |
%tmpVar13 = fmul float %load_P_K, %load_Kt12 | |
store float %tmpVar13, float* %KP, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body7, %condition_body3, %condition_body | |
%load_tn = load float, float* %TN, align 4 | |
%tmpVar16 = fcmp ogt float %load_tn, 0.000000e+00 | |
br i1 %tmpVar16, label %condition_body17, label %else14 | |
4: ; preds = %entry | |
%load_PID = load i8, i8* %PID, align 1 | |
%5 = icmp ne i8 %load_PID, 0 | |
br label %6 | |
6: ; preds = %4, %entry | |
%7 = phi i1 [ %1, %entry ], [ %5, %4 ] | |
br i1 %7, label %condition_body, label %branch | |
condition_body17: ; preds = %continue | |
%load_KP = load float, float* %KP, align 4 | |
%load_TN = load float, float* %TN, align 4 | |
%tmpVar18 = fdiv float %load_KP, %load_TN | |
store float %tmpVar18, float* %KI, align 4 | |
br label %continue15 | |
else14: ; preds = %continue | |
store float 0.000000e+00, float* %KI, align 4 | |
br label %continue15 | |
continue15: ; preds = %else14, %condition_body17 | |
%load_KP19 = load float, float* %KP, align 4 | |
%load_TV = load float, float* %TV, align 4 | |
%tmpVar20 = fmul float %load_KP19, %load_TV | |
store float %tmpVar20, float* %KD, align 4 | |
ret void | |
} | |
define void @CONTROL_SET2(%CONTROL_SET2_interface* %0) { | |
entry: | |
%KS = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 0 | |
%TU = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 1 | |
%TG = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 2 | |
%PI = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 3 | |
%PID = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 4 | |
%P_K = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 5 | |
%PI_K = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 6 | |
%PI_TN = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 7 | |
%PID_K = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 8 | |
%PID_TN = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 9 | |
%PID_TV = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 10 | |
%KP = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 11 | |
%TN = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 12 | |
%TV = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 13 | |
%KI = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 14 | |
%KD = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 15 | |
%TX = getelementptr inbounds %CONTROL_SET2_interface, %CONTROL_SET2_interface* %0, i32 0, i32 16 | |
%load_TU = load float, float* %TU, align 4 | |
%tmpVar = fcmp ogt float %load_TU, 0.000000e+00 | |
br i1 %tmpVar, label %2, label %3 | |
condition_body: ; preds = %3 | |
%load_TG = load float, float* %TG, align 4 | |
%load_TU2 = load float, float* %TU, align 4 | |
%tmpVar3 = fdiv float %load_TG, %load_TU2 | |
%load_KS4 = load float, float* %KS, align 4 | |
%tmpVar5 = fdiv float %tmpVar3, %load_KS4 | |
store float %tmpVar5, float* %TX, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %3 | |
%load_pi = load i8, i8* %PI, align 1 | |
%1 = icmp ne i8 %load_pi, 0 | |
br i1 %1, label %7, label %9 | |
2: ; preds = %entry | |
%load_KS = load float, float* %KS, align 4 | |
%tmpVar1 = fcmp ogt float %load_KS, 0.000000e+00 | |
br label %3 | |
3: ; preds = %2, %entry | |
%4 = phi i1 [ %tmpVar, %entry ], [ %tmpVar1, %2 ] | |
br i1 %4, label %condition_body, label %continue | |
condition_body8: ; preds = %9 | |
store float 0.000000e+00, float* %KP, align 4 | |
store float 0.000000e+00, float* %TN, align 4 | |
store float 0.000000e+00, float* %TV, align 4 | |
br label %continue7 | |
branch: ; preds = %9 | |
%load_PID9 = load i8, i8* %PID, align 1 | |
%5 = icmp ne i8 %load_PID9, 0 | |
br i1 %5, label %condition_body10, label %branch6 | |
condition_body10: ; preds = %branch | |
%load_PID_K = load float, float* %PID_K, align 4 | |
%load_TX = load float, float* %TX, align 4 | |
%tmpVar11 = fmul float %load_PID_K, %load_TX | |
store float %tmpVar11, float* %KP, align 4 | |
%load_PID_TN = load float, float* %PID_TN, align 4 | |
%load_TU12 = load float, float* %TU, align 4 | |
%tmpVar13 = fmul float %load_PID_TN, %load_TU12 | |
store float %tmpVar13, float* %TN, align 4 | |
%load_PID_TV = load float, float* %PID_TV, align 4 | |
%load_TU14 = load float, float* %TU, align 4 | |
%tmpVar15 = fmul float %load_PID_TV, %load_TU14 | |
store float %tmpVar15, float* %TV, align 4 | |
br label %continue7 | |
branch6: ; preds = %branch | |
%load_PI = load i8, i8* %PI, align 1 | |
%6 = icmp ne i8 %load_PI, 0 | |
br i1 %6, label %condition_body16, label %else | |
condition_body16: ; preds = %branch6 | |
%load_PI_K = load float, float* %PI_K, align 4 | |
%load_TX17 = load float, float* %TX, align 4 | |
%tmpVar18 = fmul float %load_PI_K, %load_TX17 | |
store float %tmpVar18, float* %KP, align 4 | |
%load_PI_TN = load float, float* %PI_TN, align 4 | |
%load_TU19 = load float, float* %TU, align 4 | |
%tmpVar20 = fmul float %load_PI_TN, %load_TU19 | |
store float %tmpVar20, float* %TN, align 4 | |
br label %continue7 | |
else: ; preds = %branch6 | |
%load_P_K = load float, float* %P_K, align 4 | |
%load_TX21 = load float, float* %TX, align 4 | |
%tmpVar22 = fmul float %load_P_K, %load_TX21 | |
store float %tmpVar22, float* %KP, align 4 | |
br label %continue7 | |
continue7: ; preds = %else, %condition_body16, %condition_body10, %condition_body8 | |
%load_TN = load float, float* %TN, align 4 | |
%tmpVar25 = fcmp ogt float %load_TN, 0.000000e+00 | |
br i1 %tmpVar25, label %condition_body26, label %else23 | |
7: ; preds = %continue | |
%load_PID = load i8, i8* %PID, align 1 | |
%8 = icmp ne i8 %load_PID, 0 | |
br label %9 | |
9: ; preds = %7, %continue | |
%10 = phi i1 [ %1, %continue ], [ %8, %7 ] | |
br i1 %10, label %condition_body8, label %branch | |
condition_body26: ; preds = %continue7 | |
%load_KP = load float, float* %KP, align 4 | |
%load_TN27 = load float, float* %TN, align 4 | |
%tmpVar28 = fdiv float %load_KP, %load_TN27 | |
store float %tmpVar28, float* %KI, align 4 | |
br label %continue24 | |
else23: ; preds = %continue7 | |
store float 0.000000e+00, float* %KI, align 4 | |
br label %continue24 | |
continue24: ; preds = %else23, %condition_body26 | |
%load_KP29 = load float, float* %KP, align 4 | |
%load_TV = load float, float* %TV, align 4 | |
%tmpVar30 = fmul float %load_KP29, %load_TV | |
store float %tmpVar30, float* %KD, align 4 | |
ret void | |
} | |
define float @CTRL_IN(%CTRL_IN_interface* %0) { | |
entry: | |
%SET_POINT = getelementptr inbounds %CTRL_IN_interface, %CTRL_IN_interface* %0, i32 0, i32 0 | |
%ACTUAL = getelementptr inbounds %CTRL_IN_interface, %CTRL_IN_interface* %0, i32 0, i32 1 | |
%NOISE = getelementptr inbounds %CTRL_IN_interface, %CTRL_IN_interface* %0, i32 0, i32 2 | |
%CTRL_IN = alloca float, align 4 | |
store float 0.000000e+00, float* %CTRL_IN, align 4 | |
%DEAD_ZONE_instance = alloca %DEAD_ZONE_interface, align 8 | |
%1 = getelementptr inbounds %DEAD_ZONE_interface, %DEAD_ZONE_interface* %DEAD_ZONE_instance, i32 0, i32 0 | |
%load_SET_POINT = load float, float* %SET_POINT, align 4 | |
%load_ACTUAL = load float, float* %ACTUAL, align 4 | |
%tmpVar = fsub float %load_SET_POINT, %load_ACTUAL | |
store float %tmpVar, float* %1, align 4 | |
%2 = getelementptr inbounds %DEAD_ZONE_interface, %DEAD_ZONE_interface* %DEAD_ZONE_instance, i32 0, i32 1 | |
%load_NOISE = load float, float* %NOISE, align 4 | |
store float %load_NOISE, float* %2, align 4 | |
%call = call float @DEAD_ZONE(%DEAD_ZONE_interface* %DEAD_ZONE_instance) | |
store float %call, float* %CTRL_IN, align 4 | |
%CTRL_IN_ret = load float, float* %CTRL_IN, align 4 | |
ret float %CTRL_IN_ret | |
} | |
define void @CTRL_OUT(%CTRL_OUT_interface* %0) { | |
entry: | |
%CI = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %0, i32 0, i32 0 | |
%OFFSET = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %0, i32 0, i32 1 | |
%MAN_IN = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %0, i32 0, i32 2 | |
%LIM_L = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %0, i32 0, i32 3 | |
%LIM_H = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %0, i32 0, i32 4 | |
%MANUAL = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %0, i32 0, i32 5 | |
%Y = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %0, i32 0, i32 6 | |
%LIM = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %0, i32 0, i32 7 | |
%SEL_instance = alloca %SEL_interface, align 8 | |
%1 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 0 | |
%load_MANUAL = load i8, i8* %MANUAL, align 1 | |
store i8 %load_MANUAL, i8* %1, align 1 | |
%2 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 1 | |
%load_CI = load float, float* %CI, align 4 | |
%3 = fptoui float %load_CI to i64 | |
store i64 %3, i64* %2, align 4 | |
%4 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 2 | |
%load_MAN_IN = load float, float* %MAN_IN, align 4 | |
%5 = fptoui float %load_MAN_IN to i64 | |
store i64 %5, i64* %4, align 4 | |
%call = call i64 @SEL(%SEL_interface* %SEL_instance) | |
%6 = uitofp i64 %call to double | |
%load_OFFSET = load float, float* %OFFSET, align 4 | |
%7 = fpext float %load_OFFSET to double | |
%tmpVar = fadd double %6, %7 | |
%8 = fptrunc double %tmpVar to float | |
store float %8, float* %Y, align 4 | |
%load_Y = load float, float* %Y, align 4 | |
%load_LIM_L = load float, float* %LIM_L, align 4 | |
%tmpVar1 = fcmp ogt float %load_Y, %load_LIM_L | |
br i1 %tmpVar1, label %16, label %17 | |
condition_body: ; preds = %17 | |
store i8 0, i8* %LIM, align 1 | |
br label %continue | |
else: ; preds = %17 | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%9 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_LIM_L4 = load float, float* %LIM_L, align 4 | |
%10 = fptoui float %load_LIM_L4 to i64 | |
store i64 %10, i64* %9, align 4 | |
%11 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_Y5 = load float, float* %Y, align 4 | |
%12 = fptoui float %load_Y5 to i64 | |
store i64 %12, i64* %11, align 4 | |
%13 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_LIM_H6 = load float, float* %LIM_H, align 4 | |
%14 = fptoui float %load_LIM_H6 to i64 | |
store i64 %14, i64* %13, align 4 | |
%call7 = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%15 = uitofp i64 %call7 to float | |
store float %15, float* %Y, align 4 | |
store i8 1, i8* %LIM, align 1 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
ret void | |
16: ; preds = %entry | |
%load_Y2 = load float, float* %Y, align 4 | |
%load_LIM_H = load float, float* %LIM_H, align 4 | |
%tmpVar3 = fcmp olt float %load_Y2, %load_LIM_H | |
br label %17 | |
17: ; preds = %16, %entry | |
%18 = phi i1 [ %tmpVar1, %entry ], [ %tmpVar3, %16 ] | |
br i1 %18, label %condition_body, label %else | |
} | |
define void @CTRL_PI(%CTRL_PI_interface* %0) { | |
entry: | |
%ACT = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 0 | |
%SET = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 1 | |
%SUP = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 2 | |
%OFS = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 3 | |
%M_I = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 4 | |
%MAN = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 5 | |
%RST = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 6 | |
%KP = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 7 | |
%KI = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 8 | |
%LL = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 9 | |
%LH = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 10 | |
%Y = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 11 | |
%DIFF = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 12 | |
%LIM = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 13 | |
%pi = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 14 | |
%co = getelementptr inbounds %CTRL_PI_interface, %CTRL_PI_interface* %0, i32 0, i32 15 | |
%CTRL_IN_instance = alloca %CTRL_IN_interface, align 8 | |
%1 = getelementptr inbounds %CTRL_IN_interface, %CTRL_IN_interface* %CTRL_IN_instance, i32 0, i32 0 | |
%load_SET = load float, float* %SET, align 4 | |
store float %load_SET, float* %1, align 4 | |
%2 = getelementptr inbounds %CTRL_IN_interface, %CTRL_IN_interface* %CTRL_IN_instance, i32 0, i32 1 | |
%load_ACT = load float, float* %ACT, align 4 | |
store float %load_ACT, float* %2, align 4 | |
%3 = getelementptr inbounds %CTRL_IN_interface, %CTRL_IN_interface* %CTRL_IN_instance, i32 0, i32 2 | |
%load_SUP = load float, float* %SUP, align 4 | |
store float %load_SUP, float* %3, align 4 | |
%call = call float @CTRL_IN(%CTRL_IN_interface* %CTRL_IN_instance) | |
store float %call, float* %DIFF, align 4 | |
%4 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %pi, i32 0, i32 0 | |
%load_DIFF = load float, float* %DIFF, align 4 | |
store float %load_DIFF, float* %4, align 4 | |
%5 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %pi, i32 0, i32 1 | |
%load_KP = load float, float* %KP, align 4 | |
store float %load_KP, float* %5, align 4 | |
%6 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %pi, i32 0, i32 2 | |
%load_KI = load float, float* %KI, align 4 | |
store float %load_KI, float* %6, align 4 | |
%7 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %pi, i32 0, i32 3 | |
%load_LL = load float, float* %LL, align 4 | |
store float %load_LL, float* %7, align 4 | |
%8 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %pi, i32 0, i32 4 | |
%load_LH = load float, float* %LH, align 4 | |
store float %load_LH, float* %8, align 4 | |
%9 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %pi, i32 0, i32 5 | |
%load_RST = load i8, i8* %RST, align 1 | |
store i8 %load_RST, i8* %9, align 1 | |
call void @FT_PIWL(%FT_PIWL_interface* %pi) | |
%10 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 0 | |
%Y1 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %pi, i32 0, i32 6 | |
%load_ = load float, float* %Y1, align 4 | |
store float %load_, float* %10, align 4 | |
%11 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 1 | |
%load_OFS = load float, float* %OFS, align 4 | |
store float %load_OFS, float* %11, align 4 | |
%12 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 2 | |
%load_M_I = load float, float* %M_I, align 4 | |
store float %load_M_I, float* %12, align 4 | |
%13 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 3 | |
%load_LL2 = load float, float* %LL, align 4 | |
store float %load_LL2, float* %13, align 4 | |
%14 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 4 | |
%load_LH3 = load float, float* %LH, align 4 | |
store float %load_LH3, float* %14, align 4 | |
%15 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 5 | |
%load_MAN = load i8, i8* %MAN, align 1 | |
store i8 %load_MAN, i8* %15, align 1 | |
call void @CTRL_OUT(%CTRL_OUT_interface* %co) | |
%Y4 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 6 | |
%load_5 = load float, float* %Y4, align 4 | |
store float %load_5, float* %Y, align 4 | |
%LIM6 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 7 | |
%load_7 = load i8, i8* %LIM6, align 1 | |
store i8 %load_7, i8* %LIM, align 1 | |
ret void | |
} | |
define void @CTRL_PID(%CTRL_PID_interface* %0) { | |
entry: | |
%ACT = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 0 | |
%SET = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 1 | |
%SUP = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 2 | |
%OFS = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 3 | |
%M_I = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 4 | |
%MAN = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 5 | |
%RST = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 6 | |
%KP = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 7 | |
%TN = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 8 | |
%TV = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 9 | |
%LL = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 10 | |
%LH = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 11 | |
%Y = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 12 | |
%DIFF = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 13 | |
%LIM = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 14 | |
%pid = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 15 | |
%co = getelementptr inbounds %CTRL_PID_interface, %CTRL_PID_interface* %0, i32 0, i32 16 | |
%CTRL_IN_instance = alloca %CTRL_IN_interface, align 8 | |
%1 = getelementptr inbounds %CTRL_IN_interface, %CTRL_IN_interface* %CTRL_IN_instance, i32 0, i32 0 | |
%load_SET = load float, float* %SET, align 4 | |
store float %load_SET, float* %1, align 4 | |
%2 = getelementptr inbounds %CTRL_IN_interface, %CTRL_IN_interface* %CTRL_IN_instance, i32 0, i32 1 | |
%load_ACT = load float, float* %ACT, align 4 | |
store float %load_ACT, float* %2, align 4 | |
%3 = getelementptr inbounds %CTRL_IN_interface, %CTRL_IN_interface* %CTRL_IN_instance, i32 0, i32 2 | |
%load_SUP = load float, float* %SUP, align 4 | |
store float %load_SUP, float* %3, align 4 | |
%call = call float @CTRL_IN(%CTRL_IN_interface* %CTRL_IN_instance) | |
store float %call, float* %DIFF, align 4 | |
%4 = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %pid, i32 0, i32 0 | |
%load_DIFF = load float, float* %DIFF, align 4 | |
store float %load_DIFF, float* %4, align 4 | |
%5 = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %pid, i32 0, i32 1 | |
%load_KP = load float, float* %KP, align 4 | |
store float %load_KP, float* %5, align 4 | |
%6 = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %pid, i32 0, i32 2 | |
%load_TN = load float, float* %TN, align 4 | |
store float %load_TN, float* %6, align 4 | |
%7 = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %pid, i32 0, i32 3 | |
%load_TV = load float, float* %TV, align 4 | |
store float %load_TV, float* %7, align 4 | |
%8 = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %pid, i32 0, i32 4 | |
%load_LL = load float, float* %LL, align 4 | |
store float %load_LL, float* %8, align 4 | |
%9 = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %pid, i32 0, i32 5 | |
%load_LH = load float, float* %LH, align 4 | |
store float %load_LH, float* %9, align 4 | |
%10 = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %pid, i32 0, i32 6 | |
%load_RST = load i8, i8* %RST, align 1 | |
store i8 %load_RST, i8* %10, align 1 | |
call void @FT_PIDWL(%FT_PIDWL_interface* %pid) | |
%11 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 0 | |
%Y1 = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %pid, i32 0, i32 7 | |
%load_ = load float, float* %Y1, align 4 | |
store float %load_, float* %11, align 4 | |
%12 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 1 | |
%load_OFS = load float, float* %OFS, align 4 | |
store float %load_OFS, float* %12, align 4 | |
%13 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 2 | |
%load_M_I = load float, float* %M_I, align 4 | |
store float %load_M_I, float* %13, align 4 | |
%14 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 3 | |
%load_LL2 = load float, float* %LL, align 4 | |
store float %load_LL2, float* %14, align 4 | |
%15 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 4 | |
%load_LH3 = load float, float* %LH, align 4 | |
store float %load_LH3, float* %15, align 4 | |
%16 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 5 | |
%load_MAN = load i8, i8* %MAN, align 1 | |
store i8 %load_MAN, i8* %16, align 1 | |
call void @CTRL_OUT(%CTRL_OUT_interface* %co) | |
%Y4 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 6 | |
%load_5 = load float, float* %Y4, align 4 | |
store float %load_5, float* %Y, align 4 | |
%LIM6 = getelementptr inbounds %CTRL_OUT_interface, %CTRL_OUT_interface* %co, i32 0, i32 7 | |
%load_7 = load i8, i8* %LIM6, align 1 | |
store i8 %load_7, i8* %LIM, align 1 | |
ret void | |
} | |
define void @CTRL_PWM(%CTRL_PWM_interface* %0) { | |
entry: | |
%CI = getelementptr inbounds %CTRL_PWM_interface, %CTRL_PWM_interface* %0, i32 0, i32 0 | |
%MAN_IN = getelementptr inbounds %CTRL_PWM_interface, %CTRL_PWM_interface* %0, i32 0, i32 1 | |
%MANUAL = getelementptr inbounds %CTRL_PWM_interface, %CTRL_PWM_interface* %0, i32 0, i32 2 | |
%F = getelementptr inbounds %CTRL_PWM_interface, %CTRL_PWM_interface* %0, i32 0, i32 3 | |
%Q = getelementptr inbounds %CTRL_PWM_interface, %CTRL_PWM_interface* %0, i32 0, i32 4 | |
%PW = getelementptr inbounds %CTRL_PWM_interface, %CTRL_PWM_interface* %0, i32 0, i32 5 | |
%1 = getelementptr inbounds %PWM_DC_interface, %PWM_DC_interface* %PW, i32 0, i32 0 | |
%load_F = load float, float* %F, align 4 | |
store float %load_F, float* %1, align 4 | |
%2 = getelementptr inbounds %PWM_DC_interface, %PWM_DC_interface* %PW, i32 0, i32 1 | |
%SEL_instance = alloca %SEL_interface, align 8 | |
%3 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 0 | |
%load_MANUAL = load i8, i8* %MANUAL, align 1 | |
store i8 %load_MANUAL, i8* %3, align 1 | |
%4 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 1 | |
%load_CI = load float, float* %CI, align 4 | |
%5 = fptoui float %load_CI to i64 | |
store i64 %5, i64* %4, align 4 | |
%6 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 2 | |
%load_MAN_IN = load float, float* %MAN_IN, align 4 | |
%7 = fptoui float %load_MAN_IN to i64 | |
store i64 %7, i64* %6, align 4 | |
%call = call i64 @SEL(%SEL_interface* %SEL_instance) | |
%8 = uitofp i64 %call to float | |
store float %8, float* %2, align 4 | |
call void @PWM_DC(%PWM_DC_interface* %PW) | |
%Q1 = getelementptr inbounds %PWM_DC_interface, %PWM_DC_interface* %PW, i32 0, i32 2 | |
%load_ = load i8, i8* %Q1, align 1 | |
store i8 %load_, i8* %Q, align 1 | |
ret void | |
} | |
define float @DEAD_BAND(%DEAD_BAND_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %DEAD_BAND_interface, %DEAD_BAND_interface* %0, i32 0, i32 0 | |
%L = getelementptr inbounds %DEAD_BAND_interface, %DEAD_BAND_interface* %0, i32 0, i32 1 | |
%DEAD_BAND = alloca float, align 4 | |
store float 0.000000e+00, float* %DEAD_BAND, align 4 | |
%load_X = load float, float* %X, align 4 | |
%load_L = load float, float* %L, align 4 | |
%tmpVar = fcmp ogt float %load_X, %load_L | |
br i1 %tmpVar, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%load_X1 = load float, float* %X, align 4 | |
%load_L2 = load float, float* %L, align 4 | |
%tmpVar3 = fsub float %load_X1, %load_L2 | |
store float %tmpVar3, float* %DEAD_BAND, align 4 | |
br label %continue | |
branch: ; preds = %entry | |
%load_X4 = load float, float* %X, align 4 | |
%load_L5 = load float, float* %L, align 4 | |
%tmpVar6 = fneg float %load_L5 | |
%tmpVar7 = fcmp olt float %load_X4, %tmpVar6 | |
br i1 %tmpVar7, label %condition_body8, label %else | |
condition_body8: ; preds = %branch | |
%load_X9 = load float, float* %X, align 4 | |
%load_L10 = load float, float* %L, align 4 | |
%tmpVar11 = fadd float %load_X9, %load_L10 | |
store float %tmpVar11, float* %DEAD_BAND, align 4 | |
br label %continue | |
else: ; preds = %branch | |
store float 0.000000e+00, float* %DEAD_BAND, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body8, %condition_body | |
%DEAD_BAND_ret = load float, float* %DEAD_BAND, align 4 | |
ret float %DEAD_BAND_ret | |
} | |
define void @DEAD_BAND_A(%DEAD_BAND_A_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %DEAD_BAND_A_interface, %DEAD_BAND_A_interface* %0, i32 0, i32 0 | |
%T = getelementptr inbounds %DEAD_BAND_A_interface, %DEAD_BAND_A_interface* %0, i32 0, i32 1 | |
%KL = getelementptr inbounds %DEAD_BAND_A_interface, %DEAD_BAND_A_interface* %0, i32 0, i32 2 | |
%LM = getelementptr inbounds %DEAD_BAND_A_interface, %DEAD_BAND_A_interface* %0, i32 0, i32 3 | |
%Y = getelementptr inbounds %DEAD_BAND_A_interface, %DEAD_BAND_A_interface* %0, i32 0, i32 4 | |
%L = getelementptr inbounds %DEAD_BAND_A_interface, %DEAD_BAND_A_interface* %0, i32 0, i32 5 | |
%tp1 = getelementptr inbounds %DEAD_BAND_A_interface, %DEAD_BAND_A_interface* %0, i32 0, i32 6 | |
%tp2 = getelementptr inbounds %DEAD_BAND_A_interface, %DEAD_BAND_A_interface* %0, i32 0, i32 7 | |
%1 = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %tp1, i32 0, i32 0 | |
%load_X = load float, float* %X, align 4 | |
store float %load_X, float* %1, align 4 | |
%2 = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %tp1, i32 0, i32 1 | |
%load_T = load i64, i64* %T, align 4 | |
store i64 %load_T, i64* %2, align 4 | |
call void @FT_PT1(%FT_PT1_interface* %tp1) | |
%3 = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %tp2, i32 0, i32 0 | |
%ABS_instance = alloca %ABS_interface, align 8 | |
%4 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance, i32 0, i32 0 | |
%out = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %tp1, i32 0, i32 3 | |
%load_ = load float, float* %out, align 4 | |
%load_X1 = load float, float* %X, align 4 | |
%tmpVar = fsub float %load_, %load_X1 | |
%5 = fptoui float %tmpVar to i64 | |
store i64 %5, i64* %4, align 4 | |
%call = call i64 @ABS(%ABS_interface* %ABS_instance) | |
%6 = uitofp i64 %call to float | |
store float %6, float* %3, align 4 | |
%7 = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %tp2, i32 0, i32 1 | |
%MULTIME_instance = alloca %MULTIME_interface, align 8 | |
%8 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance, i32 0, i32 0 | |
%load_T2 = load i64, i64* %T, align 4 | |
store i64 %load_T2, i64* %8, align 4 | |
%9 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance, i32 0, i32 1 | |
store float 4.000000e+00, float* %9, align 4 | |
%call3 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance) | |
store i64 %call3, i64* %7, align 4 | |
call void @FT_PT1(%FT_PT1_interface* %tp2) | |
%MIN_instance = alloca %MIN_interface, align 8 | |
%10 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 0 | |
%load_KL = load float, float* %KL, align 4 | |
%out4 = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %tp2, i32 0, i32 3 | |
%load_5 = load float, float* %out4, align 4 | |
%tmpVar6 = fmul float %load_KL, %load_5 | |
%11 = fptoui float %tmpVar6 to i64 | |
store i64 %11, i64* %10, align 4 | |
%12 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 1 | |
%load_LM = load float, float* %LM, align 4 | |
%13 = fptoui float %load_LM to i64 | |
store i64 %13, i64* %12, align 4 | |
%call7 = call i64 @MIN(%MIN_interface* %MIN_instance) | |
%14 = uitofp i64 %call7 to float | |
store float %14, float* %L, align 4 | |
%load_X8 = load float, float* %X, align 4 | |
%load_L = load float, float* %L, align 4 | |
%tmpVar9 = fcmp ogt float %load_X8, %load_L | |
br i1 %tmpVar9, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%load_X10 = load float, float* %X, align 4 | |
%load_L11 = load float, float* %L, align 4 | |
%tmpVar12 = fsub float %load_X10, %load_L11 | |
store float %tmpVar12, float* %Y, align 4 | |
br label %continue | |
branch: ; preds = %entry | |
%load_X13 = load float, float* %X, align 4 | |
%load_L14 = load float, float* %L, align 4 | |
%tmpVar15 = fneg float %load_L14 | |
%tmpVar16 = fcmp olt float %load_X13, %tmpVar15 | |
br i1 %tmpVar16, label %condition_body17, label %else | |
condition_body17: ; preds = %branch | |
%load_X18 = load float, float* %X, align 4 | |
%load_L19 = load float, float* %L, align 4 | |
%tmpVar20 = fadd float %load_X18, %load_L19 | |
store float %tmpVar20, float* %Y, align 4 | |
br label %continue | |
else: ; preds = %branch | |
store float 0.000000e+00, float* %Y, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body17, %condition_body | |
ret void | |
} | |
define float @DEAD_ZONE(%DEAD_ZONE_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %DEAD_ZONE_interface, %DEAD_ZONE_interface* %0, i32 0, i32 0 | |
%L = getelementptr inbounds %DEAD_ZONE_interface, %DEAD_ZONE_interface* %0, i32 0, i32 1 | |
%DEAD_ZONE = alloca float, align 4 | |
store float 0.000000e+00, float* %DEAD_ZONE, align 4 | |
%ABS_instance = alloca %ABS_interface, align 8 | |
%1 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance, i32 0, i32 0 | |
%load_x = load float, float* %X, align 4 | |
%2 = fptoui float %load_x to i64 | |
store i64 %2, i64* %1, align 4 | |
%call = call i64 @ABS(%ABS_interface* %ABS_instance) | |
%3 = uitofp i64 %call to double | |
%load_L = load float, float* %L, align 4 | |
%4 = fpext float %load_L to double | |
%tmpVar = fcmp ogt double %3, %4 | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_X = load float, float* %X, align 4 | |
store float %load_X, float* %DEAD_ZONE, align 4 | |
br label %continue | |
else: ; preds = %entry | |
store float 0.000000e+00, float* %DEAD_ZONE, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%DEAD_ZONE_ret = load float, float* %DEAD_ZONE, align 4 | |
ret float %DEAD_ZONE_ret | |
} | |
define void @DEAD_ZONE2(%DEAD_ZONE2_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %DEAD_ZONE2_interface, %DEAD_ZONE2_interface* %0, i32 0, i32 0 | |
%L = getelementptr inbounds %DEAD_ZONE2_interface, %DEAD_ZONE2_interface* %0, i32 0, i32 1 | |
%Y = getelementptr inbounds %DEAD_ZONE2_interface, %DEAD_ZONE2_interface* %0, i32 0, i32 2 | |
%ABS_instance = alloca %ABS_interface, align 8 | |
%1 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance, i32 0, i32 0 | |
%load_x = load float, float* %X, align 4 | |
%2 = fptoui float %load_x to i64 | |
store i64 %2, i64* %1, align 4 | |
%call = call i64 @ABS(%ABS_interface* %ABS_instance) | |
%3 = uitofp i64 %call to double | |
%load_L = load float, float* %L, align 4 | |
%4 = fpext float %load_L to double | |
%tmpVar = fcmp ogt double %3, %4 | |
br i1 %tmpVar, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%load_X = load float, float* %X, align 4 | |
store float %load_X, float* %Y, align 4 | |
br label %continue | |
branch: ; preds = %entry | |
%load_Y = load float, float* %Y, align 4 | |
%tmpVar1 = fcmp ogt float %load_Y, 0.000000e+00 | |
br i1 %tmpVar1, label %condition_body2, label %else | |
condition_body2: ; preds = %branch | |
%load_L3 = load float, float* %L, align 4 | |
store float %load_L3, float* %Y, align 4 | |
br label %continue | |
else: ; preds = %branch | |
%load_L4 = load float, float* %L, align 4 | |
%tmpVar5 = fneg float %load_L4 | |
store float %tmpVar5, float* %Y, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body2, %condition_body | |
ret void | |
} | |
define void @FT_DERIV(%FT_DERIV_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %0, i32 0, i32 0 | |
%K = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %0, i32 0, i32 1 | |
%run = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %0, i32 0, i32 2 | |
%out = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %0, i32 0, i32 3 | |
%old = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %0, i32 0, i32 4 | |
%tx = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %0, i32 0, i32 5 | |
%last = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %0, i32 0, i32 6 | |
%init = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %0, i32 0, i32 7 | |
%tc = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %0, i32 0, i32 8 | |
%T_PLC_US_instance = alloca %T_PLC_US_interface, align 8 | |
%call = call i32 @T_PLC_US(%T_PLC_US_interface* %T_PLC_US_instance) | |
store i32 %call, i32* %tx, align 4 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%load_tx = load i32, i32* %tx, align 4 | |
%load_last = load i32, i32* %last, align 4 | |
%tmpVar = sub i32 %load_tx, %load_last | |
store i32 %tmpVar, i32* %1, align 4 | |
%call1 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
store float %call1, float* %tc, align 4 | |
%load_tx2 = load i32, i32* %tx, align 4 | |
store i32 %load_tx2, i32* %last, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%2 = icmp ne i8 %load_init, 0 | |
%tmpVar3 = xor i1 %2, true | |
br i1 %tmpVar3, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
store i8 1, i8* %init, align 1 | |
%load_in = load float, float* %in, align 4 | |
store float %load_in, float* %old, align 4 | |
br label %continue | |
branch: ; preds = %entry | |
%load_run = load i8, i8* %run, align 1 | |
%3 = icmp ne i8 %load_run, 0 | |
br i1 %3, label %4, label %5 | |
condition_body5: ; preds = %5 | |
%load_in6 = load float, float* %in, align 4 | |
%load_old = load float, float* %old, align 4 | |
%tmpVar7 = fsub float %load_in6, %load_old | |
%load_tc8 = load float, float* %tc, align 4 | |
%tmpVar9 = fdiv float %tmpVar7, %load_tc8 | |
%tmpVar10 = fmul float %tmpVar9, 1.000000e+06 | |
%load_K = load float, float* %K, align 4 | |
%tmpVar11 = fmul float %tmpVar10, %load_K | |
store float %tmpVar11, float* %out, align 4 | |
%load_in12 = load float, float* %in, align 4 | |
store float %load_in12, float* %old, align 4 | |
br label %continue | |
else: ; preds = %5 | |
store float 0.000000e+00, float* %out, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body5, %condition_body | |
ret void | |
4: ; preds = %branch | |
%load_tc = load float, float* %tc, align 4 | |
%tmpVar4 = fcmp ogt float %load_tc, 0.000000e+00 | |
br label %5 | |
5: ; preds = %4, %branch | |
%6 = phi i1 [ %3, %branch ], [ %tmpVar4, %4 ] | |
br i1 %6, label %condition_body5, label %else | |
} | |
define void @FT_IMP(%FT_IMP_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %FT_IMP_interface, %FT_IMP_interface* %0, i32 0, i32 0 | |
%T = getelementptr inbounds %FT_IMP_interface, %FT_IMP_interface* %0, i32 0, i32 1 | |
%K = getelementptr inbounds %FT_IMP_interface, %FT_IMP_interface* %0, i32 0, i32 2 | |
%out = getelementptr inbounds %FT_IMP_interface, %FT_IMP_interface* %0, i32 0, i32 3 | |
%t1 = getelementptr inbounds %FT_IMP_interface, %FT_IMP_interface* %0, i32 0, i32 4 | |
%1 = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %t1, i32 0, i32 0 | |
%load_in = load float, float* %in, align 4 | |
store float %load_in, float* %1, align 4 | |
%2 = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %t1, i32 0, i32 1 | |
%load_T = load i64, i64* %T, align 4 | |
store i64 %load_T, i64* %2, align 4 | |
call void @FT_PT1(%FT_PT1_interface* %t1) | |
%load_in1 = load float, float* %in, align 4 | |
%out2 = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %t1, i32 0, i32 3 | |
%load_ = load float, float* %out2, align 4 | |
%tmpVar = fsub float %load_in1, %load_ | |
%load_K = load float, float* %K, align 4 | |
%tmpVar3 = fmul float %tmpVar, %load_K | |
store float %tmpVar3, float* %out, align 4 | |
ret void | |
} | |
define void @FT_INT(%FT_INT_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %0, i32 0, i32 0 | |
%K = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %0, i32 0, i32 1 | |
%RUN = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %0, i32 0, i32 2 | |
%RST = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %0, i32 0, i32 3 | |
%OUT_MIN = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %0, i32 0, i32 4 | |
%OUT_MAX = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %0, i32 0, i32 5 | |
%OUT = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %0, i32 0, i32 6 | |
%LIM = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %0, i32 0, i32 7 | |
%INTeg = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %0, i32 0, i32 8 | |
%load_rst = load i8, i8* %RST, align 1 | |
%1 = icmp ne i8 %load_rst, 0 | |
br i1 %1, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
store float 0.000000e+00, float* %OUT, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%2 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %INTeg, i32 0, i32 1 | |
%load_IN = load float, float* %IN, align 4 | |
store float %load_IN, float* %2, align 4 | |
%3 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %INTeg, i32 0, i32 0 | |
%load_RUN = load i8, i8* %RUN, align 1 | |
store i8 %load_RUN, i8* %3, align 1 | |
%4 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %INTeg, i32 0, i32 2 | |
%load_K = load float, float* %K, align 4 | |
store float %load_K, float* %4, align 4 | |
%5 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %INTeg, i32 0, i32 3 | |
store float* %OUT, float** %5, align 8 | |
call void @INTEGRATE(%INTEGRATE_interface* %INTeg) | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%load_out = load float, float* %OUT, align 4 | |
%load_OUT_MAX = load float, float* %OUT_MAX, align 4 | |
%tmpVar = fcmp oge float %load_out, %load_OUT_MAX | |
br i1 %tmpVar, label %condition_body3, label %branch | |
condition_body3: ; preds = %continue | |
%load_out_max = load float, float* %OUT_MAX, align 4 | |
store float %load_out_max, float* %OUT, align 4 | |
store i8 1, i8* %LIM, align 1 | |
br label %continue2 | |
branch: ; preds = %continue | |
%load_out4 = load float, float* %OUT, align 4 | |
%load_out_min = load float, float* %OUT_MIN, align 4 | |
%tmpVar5 = fcmp ole float %load_out4, %load_out_min | |
br i1 %tmpVar5, label %condition_body6, label %else1 | |
condition_body6: ; preds = %branch | |
%load_out_min7 = load float, float* %OUT_MIN, align 4 | |
store float %load_out_min7, float* %OUT, align 4 | |
store i8 1, i8* %LIM, align 1 | |
br label %continue2 | |
else1: ; preds = %branch | |
store i8 0, i8* %LIM, align 1 | |
br label %continue2 | |
continue2: ; preds = %else1, %condition_body6, %condition_body3 | |
ret void | |
} | |
define void @FT_INT2(%FT_INT2_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %FT_INT2_interface, %FT_INT2_interface* %0, i32 0, i32 0 | |
%K = getelementptr inbounds %FT_INT2_interface, %FT_INT2_interface* %0, i32 0, i32 1 | |
%RUN = getelementptr inbounds %FT_INT2_interface, %FT_INT2_interface* %0, i32 0, i32 2 | |
%RST = getelementptr inbounds %FT_INT2_interface, %FT_INT2_interface* %0, i32 0, i32 3 | |
%OUT_MIN = getelementptr inbounds %FT_INT2_interface, %FT_INT2_interface* %0, i32 0, i32 4 | |
%OUT_MAX = getelementptr inbounds %FT_INT2_interface, %FT_INT2_interface* %0, i32 0, i32 5 | |
%OUT = getelementptr inbounds %FT_INT2_interface, %FT_INT2_interface* %0, i32 0, i32 6 | |
%LIM = getelementptr inbounds %FT_INT2_interface, %FT_INT2_interface* %0, i32 0, i32 7 | |
%integ = getelementptr inbounds %FT_INT2_interface, %FT_INT2_interface* %0, i32 0, i32 8 | |
%ix = getelementptr inbounds %FT_INT2_interface, %FT_INT2_interface* %0, i32 0, i32 9 | |
%val = getelementptr inbounds %FT_INT2_interface, %FT_INT2_interface* %0, i32 0, i32 10 | |
%load_RST = load i8, i8* %RST, align 1 | |
%1 = icmp ne i8 %load_RST, 0 | |
br i1 %1, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%R2_SET_instance = alloca %R2_SET_interface, align 8 | |
%2 = getelementptr inbounds %R2_SET_interface, %R2_SET_interface* %R2_SET_instance, i32 0, i32 0 | |
store float 0.000000e+00, float* %2, align 4 | |
%call = call %REAL2 @R2_SET(%R2_SET_interface* %R2_SET_instance) | |
store %REAL2 %call, %REAL2* %val, align 4 | |
store float 0.000000e+00, float* %OUT, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%3 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %integ, i32 0, i32 1 | |
%load_IN = load float, float* %IN, align 4 | |
store float %load_IN, float* %3, align 4 | |
%4 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %integ, i32 0, i32 0 | |
%load_RUN = load i8, i8* %RUN, align 1 | |
store i8 %load_RUN, i8* %4, align 1 | |
%5 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %integ, i32 0, i32 2 | |
%load_K = load float, float* %K, align 4 | |
store float %load_K, float* %5, align 4 | |
%6 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %integ, i32 0, i32 3 | |
store float* %ix, float** %6, align 8 | |
call void @INTEGRATE(%INTEGRATE_interface* %integ) | |
%R2_ADD_instance = alloca %R2_ADD_interface, align 8 | |
%7 = getelementptr inbounds %R2_ADD_interface, %R2_ADD_interface* %R2_ADD_instance, i32 0, i32 0 | |
%load_val = load %REAL2, %REAL2* %val, align 4 | |
store %REAL2 %load_val, %REAL2* %7, align 4 | |
%8 = getelementptr inbounds %R2_ADD_interface, %R2_ADD_interface* %R2_ADD_instance, i32 0, i32 1 | |
%load_ix = load float, float* %ix, align 4 | |
store float %load_ix, float* %8, align 4 | |
%call1 = call %REAL2 @R2_ADD(%R2_ADD_interface* %R2_ADD_instance) | |
store %REAL2 %call1, %REAL2* %val, align 4 | |
store float 0.000000e+00, float* %ix, align 4 | |
%RX = getelementptr inbounds %REAL2, %REAL2* %val, i32 0, i32 1 | |
%load_ = load float, float* %RX, align 4 | |
store float %load_, float* %OUT, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%load_out = load float, float* %OUT, align 4 | |
%load_OUT_MIN = load float, float* %OUT_MIN, align 4 | |
%tmpVar = fcmp ogt float %load_out, %load_OUT_MIN | |
br i1 %tmpVar, label %17, label %18 | |
condition_body6: ; preds = %18 | |
store i8 0, i8* %LIM, align 1 | |
br label %continue3 | |
else2: ; preds = %18 | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%9 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_OUT_MIN7 = load float, float* %OUT_MIN, align 4 | |
%10 = fptoui float %load_OUT_MIN7 to i64 | |
store i64 %10, i64* %9, align 4 | |
%11 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_OUT = load float, float* %OUT, align 4 | |
%12 = fptoui float %load_OUT to i64 | |
store i64 %12, i64* %11, align 4 | |
%13 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_OUT_MAX8 = load float, float* %OUT_MAX, align 4 | |
%14 = fptoui float %load_OUT_MAX8 to i64 | |
store i64 %14, i64* %13, align 4 | |
%call9 = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%15 = uitofp i64 %call9 to float | |
store float %15, float* %OUT, align 4 | |
%R2_SET_instance10 = alloca %R2_SET_interface, align 8 | |
%16 = getelementptr inbounds %R2_SET_interface, %R2_SET_interface* %R2_SET_instance10, i32 0, i32 0 | |
%load_OUT11 = load float, float* %OUT, align 4 | |
store float %load_OUT11, float* %16, align 4 | |
%call12 = call %REAL2 @R2_SET(%R2_SET_interface* %R2_SET_instance10) | |
store %REAL2 %call12, %REAL2* %val, align 4 | |
store i8 1, i8* %LIM, align 1 | |
br label %continue3 | |
continue3: ; preds = %else2, %condition_body6 | |
ret void | |
17: ; preds = %continue | |
%load_out4 = load float, float* %OUT, align 4 | |
%load_OUT_MAX = load float, float* %OUT_MAX, align 4 | |
%tmpVar5 = fcmp olt float %load_out4, %load_OUT_MAX | |
br label %18 | |
18: ; preds = %17, %continue | |
%19 = phi i1 [ %tmpVar, %continue ], [ %tmpVar5, %17 ] | |
br i1 %19, label %condition_body6, label %else2 | |
} | |
define void @FT_PD(%FT_PD_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %FT_PD_interface, %FT_PD_interface* %0, i32 0, i32 0 | |
%KP = getelementptr inbounds %FT_PD_interface, %FT_PD_interface* %0, i32 0, i32 1 | |
%TV = getelementptr inbounds %FT_PD_interface, %FT_PD_interface* %0, i32 0, i32 2 | |
%Y = getelementptr inbounds %FT_PD_interface, %FT_PD_interface* %0, i32 0, i32 3 | |
%diff = getelementptr inbounds %FT_PD_interface, %FT_PD_interface* %0, i32 0, i32 4 | |
%1 = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 0 | |
%load_IN = load float, float* %IN, align 4 | |
store float %load_IN, float* %1, align 4 | |
%2 = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 1 | |
%load_TV = load float, float* %TV, align 4 | |
store float %load_TV, float* %2, align 4 | |
call void @FT_DERIV(%FT_DERIV_interface* %diff) | |
%load_KP = load float, float* %KP, align 4 | |
%out = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 3 | |
%load_ = load float, float* %out, align 4 | |
%load_IN1 = load float, float* %IN, align 4 | |
%tmpVar = fadd float %load_, %load_IN1 | |
%tmpVar2 = fmul float %load_KP, %tmpVar | |
store float %tmpVar2, float* %Y, align 4 | |
ret void | |
} | |
define void @FT_PDT1(%FT_PDT1_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %FT_PDT1_interface, %FT_PDT1_interface* %0, i32 0, i32 0 | |
%KP = getelementptr inbounds %FT_PDT1_interface, %FT_PDT1_interface* %0, i32 0, i32 1 | |
%TV = getelementptr inbounds %FT_PDT1_interface, %FT_PDT1_interface* %0, i32 0, i32 2 | |
%T1 = getelementptr inbounds %FT_PDT1_interface, %FT_PDT1_interface* %0, i32 0, i32 3 | |
%Y = getelementptr inbounds %FT_PDT1_interface, %FT_PDT1_interface* %0, i32 0, i32 4 | |
%diff = getelementptr inbounds %FT_PDT1_interface, %FT_PDT1_interface* %0, i32 0, i32 5 | |
%TP = getelementptr inbounds %FT_PDT1_interface, %FT_PDT1_interface* %0, i32 0, i32 6 | |
%1 = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 0 | |
%load_IN = load float, float* %IN, align 4 | |
store float %load_IN, float* %1, align 4 | |
%2 = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 1 | |
%load_TV = load float, float* %TV, align 4 | |
store float %load_TV, float* %2, align 4 | |
call void @FT_DERIV(%FT_DERIV_interface* %diff) | |
%3 = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %TP, i32 0, i32 0 | |
%out = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 3 | |
%load_ = load float, float* %out, align 4 | |
store float %load_, float* %3, align 4 | |
%4 = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %TP, i32 0, i32 1 | |
%REAL_TO_TIME_instance = alloca %REAL_TO_TIME_interface, align 8 | |
%5 = getelementptr inbounds %REAL_TO_TIME_interface, %REAL_TO_TIME_interface* %REAL_TO_TIME_instance, i32 0, i32 0 | |
%load_T1 = load float, float* %T1, align 4 | |
store float %load_T1, float* %5, align 4 | |
%call = call i64 @REAL_TO_TIME(%REAL_TO_TIME_interface* %REAL_TO_TIME_instance) | |
store i64 %call, i64* %4, align 4 | |
call void @FT_PT1(%FT_PT1_interface* %TP) | |
%load_KP = load float, float* %KP, align 4 | |
%out1 = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %TP, i32 0, i32 3 | |
%load_2 = load float, float* %out1, align 4 | |
%load_IN3 = load float, float* %IN, align 4 | |
%tmpVar = fadd float %load_2, %load_IN3 | |
%tmpVar4 = fmul float %load_KP, %tmpVar | |
store float %tmpVar4, float* %Y, align 4 | |
ret void | |
} | |
define void @FT_PI(%FT_PI_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %FT_PI_interface, %FT_PI_interface* %0, i32 0, i32 0 | |
%KP = getelementptr inbounds %FT_PI_interface, %FT_PI_interface* %0, i32 0, i32 1 | |
%KI = getelementptr inbounds %FT_PI_interface, %FT_PI_interface* %0, i32 0, i32 2 | |
%ILIM_L = getelementptr inbounds %FT_PI_interface, %FT_PI_interface* %0, i32 0, i32 3 | |
%ILIM_H = getelementptr inbounds %FT_PI_interface, %FT_PI_interface* %0, i32 0, i32 4 | |
%IEN = getelementptr inbounds %FT_PI_interface, %FT_PI_interface* %0, i32 0, i32 5 | |
%RST = getelementptr inbounds %FT_PI_interface, %FT_PI_interface* %0, i32 0, i32 6 | |
%Y = getelementptr inbounds %FT_PI_interface, %FT_PI_interface* %0, i32 0, i32 7 | |
%LIM = getelementptr inbounds %FT_PI_interface, %FT_PI_interface* %0, i32 0, i32 8 | |
%integ = getelementptr inbounds %FT_PI_interface, %FT_PI_interface* %0, i32 0, i32 9 | |
%1 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 0 | |
%load_IN = load float, float* %IN, align 4 | |
store float %load_IN, float* %1, align 4 | |
%2 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 1 | |
%load_KI = load float, float* %KI, align 4 | |
store float %load_KI, float* %2, align 4 | |
%3 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 2 | |
%load_IEN = load i8, i8* %IEN, align 1 | |
store i8 %load_IEN, i8* %3, align 1 | |
%4 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 3 | |
%load_RST = load i8, i8* %RST, align 1 | |
store i8 %load_RST, i8* %4, align 1 | |
%5 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 4 | |
%load_ILIM_L = load float, float* %ILIM_L, align 4 | |
store float %load_ILIM_L, float* %5, align 4 | |
%6 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 5 | |
%load_ILIM_H = load float, float* %ILIM_H, align 4 | |
store float %load_ILIM_H, float* %6, align 4 | |
call void @FT_INT(%FT_INT_interface* %integ) | |
%LIM1 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 7 | |
%load_ = load i8, i8* %LIM1, align 1 | |
store i8 %load_, i8* %LIM, align 1 | |
%load_KP = load float, float* %KP, align 4 | |
%load_IN2 = load float, float* %IN, align 4 | |
%tmpVar = fmul float %load_KP, %load_IN2 | |
%Out = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 6 | |
%load_3 = load float, float* %Out, align 4 | |
%tmpVar4 = fadd float %tmpVar, %load_3 | |
store float %tmpVar4, float* %Y, align 4 | |
ret void | |
} | |
define void @FT_PID(%FT_PID_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %FT_PID_interface, %FT_PID_interface* %0, i32 0, i32 0 | |
%KP = getelementptr inbounds %FT_PID_interface, %FT_PID_interface* %0, i32 0, i32 1 | |
%TN = getelementptr inbounds %FT_PID_interface, %FT_PID_interface* %0, i32 0, i32 2 | |
%TV = getelementptr inbounds %FT_PID_interface, %FT_PID_interface* %0, i32 0, i32 3 | |
%ILIM_L = getelementptr inbounds %FT_PID_interface, %FT_PID_interface* %0, i32 0, i32 4 | |
%ILIM_H = getelementptr inbounds %FT_PID_interface, %FT_PID_interface* %0, i32 0, i32 5 | |
%IEN = getelementptr inbounds %FT_PID_interface, %FT_PID_interface* %0, i32 0, i32 6 | |
%RST = getelementptr inbounds %FT_PID_interface, %FT_PID_interface* %0, i32 0, i32 7 | |
%Y = getelementptr inbounds %FT_PID_interface, %FT_PID_interface* %0, i32 0, i32 8 | |
%LIM = getelementptr inbounds %FT_PID_interface, %FT_PID_interface* %0, i32 0, i32 9 | |
%integ = getelementptr inbounds %FT_PID_interface, %FT_PID_interface* %0, i32 0, i32 10 | |
%diff = getelementptr inbounds %FT_PID_interface, %FT_PID_interface* %0, i32 0, i32 11 | |
%load_TN = load float, float* %TN, align 4 | |
%tmpVar = fcmp ogt float %load_TN, 0.000000e+00 | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%1 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 0 | |
%load_IN = load float, float* %IN, align 4 | |
store float %load_IN, float* %1, align 4 | |
%2 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 1 | |
%load_TN1 = load float, float* %TN, align 4 | |
%tmpVar2 = fdiv float 1.000000e+00, %load_TN1 | |
store float %tmpVar2, float* %2, align 4 | |
%3 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 2 | |
%load_IEN = load i8, i8* %IEN, align 1 | |
store i8 %load_IEN, i8* %3, align 1 | |
%4 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 3 | |
%load_RST = load i8, i8* %RST, align 1 | |
store i8 %load_RST, i8* %4, align 1 | |
%5 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 4 | |
%load_ILIM_L = load float, float* %ILIM_L, align 4 | |
store float %load_ILIM_L, float* %5, align 4 | |
%6 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 5 | |
%load_ILIM_H = load float, float* %ILIM_H, align 4 | |
store float %load_ILIM_H, float* %6, align 4 | |
call void @FT_INT(%FT_INT_interface* %integ) | |
br label %continue | |
else: ; preds = %entry | |
%7 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 3 | |
store i8 0, i8* %7, align 1 | |
call void @FT_INT(%FT_INT_interface* %integ) | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%8 = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 0 | |
%load_IN3 = load float, float* %IN, align 4 | |
store float %load_IN3, float* %8, align 4 | |
%9 = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 1 | |
%load_TV = load float, float* %TV, align 4 | |
store float %load_TV, float* %9, align 4 | |
call void @FT_DERIV(%FT_DERIV_interface* %diff) | |
%load_KP = load float, float* %KP, align 4 | |
%Out = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 6 | |
%load_ = load float, float* %Out, align 4 | |
%out = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 3 | |
%load_4 = load float, float* %out, align 4 | |
%tmpVar5 = fadd float %load_, %load_4 | |
%load_IN6 = load float, float* %IN, align 4 | |
%tmpVar7 = fadd float %tmpVar5, %load_IN6 | |
%tmpVar8 = fmul float %load_KP, %tmpVar7 | |
store float %tmpVar8, float* %Y, align 4 | |
%LIM9 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 7 | |
%load_10 = load i8, i8* %LIM9, align 1 | |
store i8 %load_10, i8* %LIM, align 1 | |
ret void | |
} | |
define void @FT_PIDW(%FT_PIDW_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %FT_PIDW_interface, %FT_PIDW_interface* %0, i32 0, i32 0 | |
%KP = getelementptr inbounds %FT_PIDW_interface, %FT_PIDW_interface* %0, i32 0, i32 1 | |
%TN = getelementptr inbounds %FT_PIDW_interface, %FT_PIDW_interface* %0, i32 0, i32 2 | |
%TV = getelementptr inbounds %FT_PIDW_interface, %FT_PIDW_interface* %0, i32 0, i32 3 | |
%LIM_L = getelementptr inbounds %FT_PIDW_interface, %FT_PIDW_interface* %0, i32 0, i32 4 | |
%LIM_H = getelementptr inbounds %FT_PIDW_interface, %FT_PIDW_interface* %0, i32 0, i32 5 | |
%RST = getelementptr inbounds %FT_PIDW_interface, %FT_PIDW_interface* %0, i32 0, i32 6 | |
%Y = getelementptr inbounds %FT_PIDW_interface, %FT_PIDW_interface* %0, i32 0, i32 7 | |
%LIM = getelementptr inbounds %FT_PIDW_interface, %FT_PIDW_interface* %0, i32 0, i32 8 | |
%integ = getelementptr inbounds %FT_PIDW_interface, %FT_PIDW_interface* %0, i32 0, i32 9 | |
%diff = getelementptr inbounds %FT_PIDW_interface, %FT_PIDW_interface* %0, i32 0, i32 10 | |
%YI = getelementptr inbounds %FT_PIDW_interface, %FT_PIDW_interface* %0, i32 0, i32 11 | |
%load_tn = load float, float* %TN, align 4 | |
%tmpVar = fcmp oeq float %load_tn, 0.000000e+00 | |
br i1 %tmpVar, label %13, label %11 | |
condition_body: ; preds = %13 | |
%1 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %integ, i32 0, i32 0 | |
store i8 0, i8* %1, align 1 | |
%2 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %integ, i32 0, i32 3 | |
store float* %YI, float** %2, align 8 | |
call void @INTEGRATE(%INTEGRATE_interface* %integ) | |
store float 0.000000e+00, float* %YI, align 4 | |
br label %continue | |
else: ; preds = %13 | |
%3 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %integ, i32 0, i32 1 | |
%load_IN = load float, float* %IN, align 4 | |
store float %load_IN, float* %3, align 4 | |
%4 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %integ, i32 0, i32 2 | |
%load_TN = load float, float* %TN, align 4 | |
%tmpVar1 = fdiv float 1.000000e+00, %load_TN | |
store float %tmpVar1, float* %4, align 4 | |
%5 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %integ, i32 0, i32 0 | |
%load_LIM = load i8, i8* %LIM, align 1 | |
%6 = icmp ne i8 %load_LIM, 0 | |
%tmpVar2 = xor i1 %6, true | |
%7 = zext i1 %tmpVar2 to i8 | |
store i8 %7, i8* %5, align 1 | |
%8 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %integ, i32 0, i32 3 | |
store float* %YI, float** %8, align 8 | |
call void @INTEGRATE(%INTEGRATE_interface* %integ) | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%load_KP = load float, float* %KP, align 4 | |
%load_IN3 = load float, float* %IN, align 4 | |
%load_YI = load float, float* %YI, align 4 | |
%tmpVar4 = fadd float %load_IN3, %load_YI | |
%tmpVar5 = fmul float %load_KP, %tmpVar4 | |
store float %tmpVar5, float* %Y, align 4 | |
%9 = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 0 | |
%load_IN6 = load float, float* %IN, align 4 | |
store float %load_IN6, float* %9, align 4 | |
%10 = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 1 | |
%load_TV = load float, float* %TV, align 4 | |
store float %load_TV, float* %10, align 4 | |
call void @FT_DERIV(%FT_DERIV_interface* %diff) | |
%load_Y = load float, float* %Y, align 4 | |
%load_LIM_L = load float, float* %LIM_L, align 4 | |
%tmpVar9 = fcmp ogt float %load_Y, %load_LIM_L | |
br i1 %tmpVar9, label %22, label %23 | |
11: ; preds = %entry | |
%load_rst = load i8, i8* %RST, align 1 | |
%12 = icmp ne i8 %load_rst, 0 | |
br label %13 | |
13: ; preds = %11, %entry | |
%14 = phi i1 [ %tmpVar, %entry ], [ %12, %11 ] | |
br i1 %14, label %condition_body, label %else | |
condition_body12: ; preds = %23 | |
store i8 0, i8* %LIM, align 1 | |
br label %continue8 | |
else7: ; preds = %23 | |
store i8 1, i8* %LIM, align 1 | |
br label %continue8 | |
continue8: ; preds = %else7, %condition_body12 | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%15 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_LIM_L13 = load float, float* %LIM_L, align 4 | |
%16 = fptoui float %load_LIM_L13 to i64 | |
store i64 %16, i64* %15, align 4 | |
%17 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_Y14 = load float, float* %Y, align 4 | |
%load_KP15 = load float, float* %KP, align 4 | |
%out = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 3 | |
%load_ = load float, float* %out, align 4 | |
%tmpVar16 = fmul float %load_KP15, %load_ | |
%tmpVar17 = fadd float %load_Y14, %tmpVar16 | |
%18 = fptoui float %tmpVar17 to i64 | |
store i64 %18, i64* %17, align 4 | |
%19 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_LIM_H18 = load float, float* %LIM_H, align 4 | |
%20 = fptoui float %load_LIM_H18 to i64 | |
store i64 %20, i64* %19, align 4 | |
%call = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%21 = uitofp i64 %call to float | |
store float %21, float* %Y, align 4 | |
ret void | |
22: ; preds = %continue | |
%load_Y10 = load float, float* %Y, align 4 | |
%load_LIM_H = load float, float* %LIM_H, align 4 | |
%tmpVar11 = fcmp olt float %load_Y10, %load_LIM_H | |
br label %23 | |
23: ; preds = %22, %continue | |
%24 = phi i1 [ %tmpVar9, %continue ], [ %tmpVar11, %22 ] | |
br i1 %24, label %condition_body12, label %else7 | |
} | |
define void @FT_PIDWL(%FT_PIDWL_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %0, i32 0, i32 0 | |
%KP = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %0, i32 0, i32 1 | |
%TN = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %0, i32 0, i32 2 | |
%TV = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %0, i32 0, i32 3 | |
%LIM_L = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %0, i32 0, i32 4 | |
%LIM_H = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %0, i32 0, i32 5 | |
%RST = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %0, i32 0, i32 6 | |
%Y = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %0, i32 0, i32 7 | |
%LIM = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %0, i32 0, i32 8 | |
%piwl = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %0, i32 0, i32 9 | |
%diff = getelementptr inbounds %FT_PIDWL_interface, %FT_PIDWL_interface* %0, i32 0, i32 10 | |
%load_rst = load i8, i8* %RST, align 1 | |
%1 = icmp ne i8 %load_rst, 0 | |
br i1 %1, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%2 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %piwl, i32 0, i32 5 | |
store i8 1, i8* %2, align 1 | |
call void @FT_PIWL(%FT_PIWL_interface* %piwl) | |
%RST1 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %piwl, i32 0, i32 5 | |
store i8 0, i8* %RST1, align 1 | |
br label %continue | |
else: ; preds = %entry | |
%load_TN = load float, float* %TN, align 4 | |
%tmpVar = fcmp oeq float %load_TN, 0.000000e+00 | |
br i1 %tmpVar, label %condition_body4, label %else2 | |
continue: ; preds = %continue20, %condition_body | |
ret void | |
condition_body4: ; preds = %else | |
%3 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %piwl, i32 0, i32 0 | |
%load_IN = load float, float* %IN, align 4 | |
%load_KP = load float, float* %KP, align 4 | |
%tmpVar5 = fmul float %load_IN, %load_KP | |
store float %tmpVar5, float* %3, align 4 | |
%4 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %piwl, i32 0, i32 1 | |
store float 1.000000e+00, float* %4, align 4 | |
%5 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %piwl, i32 0, i32 2 | |
store float 0.000000e+00, float* %5, align 4 | |
%6 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %piwl, i32 0, i32 3 | |
%load_LIM_L = load float, float* %LIM_L, align 4 | |
store float %load_LIM_L, float* %6, align 4 | |
%7 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %piwl, i32 0, i32 4 | |
%load_LIM_H = load float, float* %LIM_H, align 4 | |
store float %load_LIM_H, float* %7, align 4 | |
call void @FT_PIWL(%FT_PIWL_interface* %piwl) | |
br label %continue3 | |
else2: ; preds = %else | |
%8 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %piwl, i32 0, i32 0 | |
%load_IN6 = load float, float* %IN, align 4 | |
%load_KP7 = load float, float* %KP, align 4 | |
%tmpVar8 = fmul float %load_IN6, %load_KP7 | |
store float %tmpVar8, float* %8, align 4 | |
%9 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %piwl, i32 0, i32 1 | |
store float 1.000000e+00, float* %9, align 4 | |
%10 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %piwl, i32 0, i32 2 | |
%load_TN9 = load float, float* %TN, align 4 | |
%tmpVar10 = fdiv float 1.000000e+00, %load_TN9 | |
store float %tmpVar10, float* %10, align 4 | |
%11 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %piwl, i32 0, i32 3 | |
%load_LIM_L11 = load float, float* %LIM_L, align 4 | |
store float %load_LIM_L11, float* %11, align 4 | |
%12 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %piwl, i32 0, i32 4 | |
%load_LIM_H12 = load float, float* %LIM_H, align 4 | |
store float %load_LIM_H12, float* %12, align 4 | |
call void @FT_PIWL(%FT_PIWL_interface* %piwl) | |
br label %continue3 | |
continue3: ; preds = %else2, %condition_body4 | |
%13 = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 0 | |
%load_IN13 = load float, float* %IN, align 4 | |
store float %load_IN13, float* %13, align 4 | |
%14 = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 1 | |
%load_KP14 = load float, float* %KP, align 4 | |
%load_TV = load float, float* %TV, align 4 | |
%tmpVar15 = fmul float %load_KP14, %load_TV | |
store float %tmpVar15, float* %14, align 4 | |
call void @FT_DERIV(%FT_DERIV_interface* %diff) | |
%Y16 = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %piwl, i32 0, i32 6 | |
%load_ = load float, float* %Y16, align 4 | |
%out = getelementptr inbounds %FT_DERIV_interface, %FT_DERIV_interface* %diff, i32 0, i32 3 | |
%load_17 = load float, float* %out, align 4 | |
%tmpVar18 = fadd float %load_, %load_17 | |
store float %tmpVar18, float* %Y, align 4 | |
%load_Y = load float, float* %Y, align 4 | |
%load_LIM_L21 = load float, float* %LIM_L, align 4 | |
%tmpVar22 = fcmp olt float %load_Y, %load_LIM_L21 | |
br i1 %tmpVar22, label %condition_body23, label %branch | |
condition_body23: ; preds = %continue3 | |
store i8 1, i8* %LIM, align 1 | |
%load_LIM_L24 = load float, float* %LIM_L, align 4 | |
store float %load_LIM_L24, float* %Y, align 4 | |
br label %continue20 | |
branch: ; preds = %continue3 | |
%load_Y25 = load float, float* %Y, align 4 | |
%load_LIM_H26 = load float, float* %LIM_H, align 4 | |
%tmpVar27 = fcmp ogt float %load_Y25, %load_LIM_H26 | |
br i1 %tmpVar27, label %condition_body28, label %else19 | |
condition_body28: ; preds = %branch | |
store i8 1, i8* %LIM, align 1 | |
%load_LIM_H29 = load float, float* %LIM_H, align 4 | |
store float %load_LIM_H29, float* %Y, align 4 | |
br label %continue20 | |
else19: ; preds = %branch | |
store i8 0, i8* %LIM, align 1 | |
br label %continue20 | |
continue20: ; preds = %else19, %condition_body28, %condition_body23 | |
br label %continue | |
} | |
define void @FT_PIW(%FT_PIW_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %FT_PIW_interface, %FT_PIW_interface* %0, i32 0, i32 0 | |
%KP = getelementptr inbounds %FT_PIW_interface, %FT_PIW_interface* %0, i32 0, i32 1 | |
%KI = getelementptr inbounds %FT_PIW_interface, %FT_PIW_interface* %0, i32 0, i32 2 | |
%LIM_L = getelementptr inbounds %FT_PIW_interface, %FT_PIW_interface* %0, i32 0, i32 3 | |
%LIM_H = getelementptr inbounds %FT_PIW_interface, %FT_PIW_interface* %0, i32 0, i32 4 | |
%RST = getelementptr inbounds %FT_PIW_interface, %FT_PIW_interface* %0, i32 0, i32 5 | |
%Y = getelementptr inbounds %FT_PIW_interface, %FT_PIW_interface* %0, i32 0, i32 6 | |
%LIM = getelementptr inbounds %FT_PIW_interface, %FT_PIW_interface* %0, i32 0, i32 7 | |
%integ = getelementptr inbounds %FT_PIW_interface, %FT_PIW_interface* %0, i32 0, i32 8 | |
%1 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 0 | |
%load_IN = load float, float* %IN, align 4 | |
store float %load_IN, float* %1, align 4 | |
%2 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 1 | |
%load_KI = load float, float* %KI, align 4 | |
store float %load_KI, float* %2, align 4 | |
%3 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 2 | |
%load_LIM = load i8, i8* %LIM, align 1 | |
%4 = icmp ne i8 %load_LIM, 0 | |
%tmpVar = xor i1 %4, true | |
%5 = zext i1 %tmpVar to i8 | |
store i8 %5, i8* %3, align 1 | |
%6 = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 3 | |
%load_RST = load i8, i8* %RST, align 1 | |
store i8 %load_RST, i8* %6, align 1 | |
call void @FT_INT(%FT_INT_interface* %integ) | |
%load_KP = load float, float* %KP, align 4 | |
%load_IN1 = load float, float* %IN, align 4 | |
%tmpVar2 = fmul float %load_KP, %load_IN1 | |
%Out = getelementptr inbounds %FT_INT_interface, %FT_INT_interface* %integ, i32 0, i32 6 | |
%load_ = load float, float* %Out, align 4 | |
%tmpVar3 = fadd float %tmpVar2, %load_ | |
store float %tmpVar3, float* %Y, align 4 | |
%load_Y = load float, float* %Y, align 4 | |
%load_LIM_L = load float, float* %LIM_L, align 4 | |
%tmpVar4 = fcmp olt float %load_Y, %load_LIM_L | |
br i1 %tmpVar4, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%load_LIM_L5 = load float, float* %LIM_L, align 4 | |
store float %load_LIM_L5, float* %Y, align 4 | |
store i8 1, i8* %LIM, align 1 | |
br label %continue | |
branch: ; preds = %entry | |
%load_Y6 = load float, float* %Y, align 4 | |
%load_LIM_H = load float, float* %LIM_H, align 4 | |
%tmpVar7 = fcmp ogt float %load_Y6, %load_LIM_H | |
br i1 %tmpVar7, label %condition_body8, label %else | |
condition_body8: ; preds = %branch | |
%load_LIM_H9 = load float, float* %LIM_H, align 4 | |
store float %load_LIM_H9, float* %Y, align 4 | |
store i8 1, i8* %LIM, align 1 | |
br label %continue | |
else: ; preds = %branch | |
store i8 0, i8* %LIM, align 1 | |
br label %continue | |
continue: ; preds = %else, %condition_body8, %condition_body | |
ret void | |
} | |
define void @FT_PIWL(%FT_PIWL_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 0 | |
%KP = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 1 | |
%KI = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 2 | |
%LIM_L = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 3 | |
%LIM_H = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 4 | |
%RST = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 5 | |
%Y = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 6 | |
%LIM = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 7 | |
%init = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 8 | |
%tx = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 9 | |
%tc = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 10 | |
%t_last = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 11 | |
%in_last = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 12 | |
%i = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 13 | |
%p = getelementptr inbounds %FT_PIWL_interface, %FT_PIWL_interface* %0, i32 0, i32 14 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %5, label %3 | |
condition_body: ; preds = %5 | |
store i8 1, i8* %init, align 1 | |
%load_in = load float, float* %IN, align 4 | |
store float %load_in, float* %in_last, align 4 | |
%T_PLC_US_instance = alloca %T_PLC_US_interface, align 8 | |
%call = call i32 @T_PLC_US(%T_PLC_US_interface* %T_PLC_US_instance) | |
store i32 %call, i32* %t_last, align 4 | |
store float 0.000000e+00, float* %i, align 4 | |
store float 0.000000e+00, float* %tc, align 4 | |
br label %continue | |
else: ; preds = %5 | |
%T_PLC_US_instance1 = alloca %T_PLC_US_interface, align 8 | |
%call2 = call i32 @T_PLC_US(%T_PLC_US_interface* %T_PLC_US_instance1) | |
store i32 %call2, i32* %tx, align 4 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%2 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%load_tx = load i32, i32* %tx, align 4 | |
%load_t_last = load i32, i32* %t_last, align 4 | |
%tmpVar3 = sub i32 %load_tx, %load_t_last | |
store i32 %tmpVar3, i32* %2, align 4 | |
%call4 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
store float %call4, float* %tc, align 4 | |
%load_tx5 = load i32, i32* %tx, align 4 | |
store i32 %load_tx5, i32* %t_last, align 4 | |
%load_KP = load float, float* %KP, align 4 | |
%load_IN = load float, float* %IN, align 4 | |
%tmpVar6 = fmul float %load_KP, %load_IN | |
store float %tmpVar6, float* %p, align 4 | |
%load_IN7 = load float, float* %IN, align 4 | |
%load_in_last = load float, float* %in_last, align 4 | |
%tmpVar8 = fadd float %load_IN7, %load_in_last | |
%tmpVar9 = fmul float %tmpVar8, 0x3EA0C6F7A0000000 | |
%load_KI = load float, float* %KI, align 4 | |
%tmpVar10 = fmul float %tmpVar9, %load_KI | |
%load_tc = load float, float* %tc, align 4 | |
%tmpVar11 = fmul float %tmpVar10, %load_tc | |
%load_i = load float, float* %i, align 4 | |
%tmpVar12 = fadd float %tmpVar11, %load_i | |
store float %tmpVar12, float* %i, align 4 | |
%load_IN13 = load float, float* %IN, align 4 | |
store float %load_IN13, float* %in_last, align 4 | |
%load_p = load float, float* %p, align 4 | |
%load_i14 = load float, float* %i, align 4 | |
%tmpVar15 = fadd float %load_p, %load_i14 | |
store float %tmpVar15, float* %Y, align 4 | |
%load_Y = load float, float* %Y, align 4 | |
%load_LIM_H = load float, float* %LIM_H, align 4 | |
%tmpVar18 = fcmp oge float %load_Y, %load_LIM_H | |
br i1 %tmpVar18, label %condition_body19, label %branch | |
continue: ; preds = %continue17, %condition_body | |
ret void | |
3: ; preds = %entry | |
%load_RST = load i8, i8* %RST, align 1 | |
%4 = icmp ne i8 %load_RST, 0 | |
br label %5 | |
5: ; preds = %3, %entry | |
%6 = phi i1 [ %tmpVar, %entry ], [ %4, %3 ] | |
br i1 %6, label %condition_body, label %else | |
condition_body19: ; preds = %else | |
%load_LIM_H20 = load float, float* %LIM_H, align 4 | |
store float %load_LIM_H20, float* %Y, align 4 | |
%load_ki = load float, float* %KI, align 4 | |
%tmpVar23 = fcmp one float %load_ki, 0.000000e+00 | |
br i1 %tmpVar23, label %condition_body24, label %else21 | |
branch: ; preds = %else | |
%load_Y28 = load float, float* %Y, align 4 | |
%load_LIM_L = load float, float* %LIM_L, align 4 | |
%tmpVar29 = fcmp ole float %load_Y28, %load_LIM_L | |
br i1 %tmpVar29, label %condition_body30, label %else16 | |
condition_body30: ; preds = %branch | |
%load_LIM_L31 = load float, float* %LIM_L, align 4 | |
store float %load_LIM_L31, float* %Y, align 4 | |
%load_ki34 = load float, float* %KI, align 4 | |
%tmpVar35 = fcmp one float %load_ki34, 0.000000e+00 | |
br i1 %tmpVar35, label %condition_body36, label %else32 | |
else16: ; preds = %branch | |
store i8 0, i8* %LIM, align 1 | |
br label %continue17 | |
continue17: ; preds = %else16, %continue33, %continue22 | |
br label %continue | |
condition_body24: ; preds = %condition_body19 | |
%load_LIM_H25 = load float, float* %LIM_H, align 4 | |
%load_p26 = load float, float* %p, align 4 | |
%tmpVar27 = fsub float %load_LIM_H25, %load_p26 | |
store float %tmpVar27, float* %i, align 4 | |
br label %continue22 | |
else21: ; preds = %condition_body19 | |
store float 0.000000e+00, float* %i, align 4 | |
br label %continue22 | |
continue22: ; preds = %else21, %condition_body24 | |
store i8 1, i8* %LIM, align 1 | |
br label %continue17 | |
condition_body36: ; preds = %condition_body30 | |
%load_LIM_L37 = load float, float* %LIM_L, align 4 | |
%load_p38 = load float, float* %p, align 4 | |
%tmpVar39 = fsub float %load_LIM_L37, %load_p38 | |
store float %tmpVar39, float* %i, align 4 | |
br label %continue33 | |
else32: ; preds = %condition_body30 | |
store float 0.000000e+00, float* %i, align 4 | |
br label %continue33 | |
continue33: ; preds = %else32, %condition_body36 | |
store i8 1, i8* %LIM, align 1 | |
br label %continue17 | |
} | |
define void @FT_PT1(%FT_PT1_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %0, i32 0, i32 0 | |
%T = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %0, i32 0, i32 1 | |
%K = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %0, i32 0, i32 2 | |
%out = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %0, i32 0, i32 3 | |
%last = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %0, i32 0, i32 4 | |
%tx = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %0, i32 0, i32 5 | |
%init = getelementptr inbounds %FT_PT1_interface, %FT_PT1_interface* %0, i32 0, i32 6 | |
%T_PLC_US_instance = alloca %T_PLC_US_interface, align 8 | |
%call = call i32 @T_PLC_US(%T_PLC_US_interface* %T_PLC_US_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %8, label %7 | |
condition_body: ; preds = %8 | |
store i8 1, i8* %init, align 1 | |
%load_K = load float, float* %K, align 4 | |
%load_in = load float, float* %in, align 4 | |
%tmpVar2 = fmul float %load_K, %load_in | |
store float %tmpVar2, float* %out, align 4 | |
br label %continue | |
else: ; preds = %8 | |
%load_out = load float, float* %out, align 4 | |
%load_in3 = load float, float* %in, align 4 | |
%load_K4 = load float, float* %K, align 4 | |
%tmpVar5 = fmul float %load_in3, %load_K4 | |
%load_out6 = load float, float* %out, align 4 | |
%tmpVar7 = fsub float %tmpVar5, %load_out6 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%2 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%load_Tx = load i32, i32* %tx, align 4 | |
%load_last = load i32, i32* %last, align 4 | |
%tmpVar8 = sub i32 %load_Tx, %load_last | |
store i32 %tmpVar8, i32* %2, align 4 | |
%call9 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%tmpVar10 = fmul float %tmpVar7, %call9 | |
%TIME_TO_REAL_instance = alloca %TIME_TO_REAL_interface, align 8 | |
%3 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance, i32 0, i32 0 | |
%load_T11 = load i64, i64* %T, align 4 | |
store i64 %load_T11, i64* %3, align 4 | |
%call12 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance) | |
%tmpVar13 = fdiv float %tmpVar10, %call12 | |
%tmpVar14 = fmul float %tmpVar13, 0x3F50624DE0000000 | |
%tmpVar15 = fadd float %load_out, %tmpVar14 | |
store float %tmpVar15, float* %out, align 4 | |
%ABS_instance = alloca %ABS_interface, align 8 | |
%4 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance, i32 0, i32 0 | |
%load_out17 = load float, float* %out, align 4 | |
%5 = fptoui float %load_out17 to i64 | |
store i64 %5, i64* %4, align 4 | |
%call18 = call i64 @ABS(%ABS_interface* %ABS_instance) | |
%6 = uitofp i64 %call18 to double | |
%tmpVar19 = fcmp olt double %6, 0x3BC79CA10C924223 | |
br i1 %tmpVar19, label %condition_body20, label %continue16 | |
continue: ; preds = %continue16, %condition_body | |
%load_tx = load i32, i32* %tx, align 4 | |
store i32 %load_tx, i32* %last, align 4 | |
ret void | |
7: ; preds = %entry | |
%load_T = load i64, i64* %T, align 4 | |
%tmpVar1 = icmp eq i64 %load_T, 0 | |
br label %8 | |
8: ; preds = %7, %entry | |
%9 = phi i1 [ %tmpVar, %entry ], [ %tmpVar1, %7 ] | |
br i1 %9, label %condition_body, label %else | |
condition_body20: ; preds = %else | |
store float 0.000000e+00, float* %out, align 4 | |
br label %continue16 | |
continue16: ; preds = %condition_body20, %else | |
br label %continue | |
} | |
define void @FT_PT2(%FT_PT2_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %FT_PT2_interface, %FT_PT2_interface* %0, i32 0, i32 0 | |
%T = getelementptr inbounds %FT_PT2_interface, %FT_PT2_interface* %0, i32 0, i32 1 | |
%D = getelementptr inbounds %FT_PT2_interface, %FT_PT2_interface* %0, i32 0, i32 2 | |
%K = getelementptr inbounds %FT_PT2_interface, %FT_PT2_interface* %0, i32 0, i32 3 | |
%out = getelementptr inbounds %FT_PT2_interface, %FT_PT2_interface* %0, i32 0, i32 4 | |
%init = getelementptr inbounds %FT_PT2_interface, %FT_PT2_interface* %0, i32 0, i32 5 | |
%int1 = getelementptr inbounds %FT_PT2_interface, %FT_PT2_interface* %0, i32 0, i32 6 | |
%int2 = getelementptr inbounds %FT_PT2_interface, %FT_PT2_interface* %0, i32 0, i32 7 | |
%tn = getelementptr inbounds %FT_PT2_interface, %FT_PT2_interface* %0, i32 0, i32 8 | |
%I1 = getelementptr inbounds %FT_PT2_interface, %FT_PT2_interface* %0, i32 0, i32 9 | |
%I2 = getelementptr inbounds %FT_PT2_interface, %FT_PT2_interface* %0, i32 0, i32 10 | |
%tn2 = getelementptr inbounds %FT_PT2_interface, %FT_PT2_interface* %0, i32 0, i32 11 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %8, label %7 | |
condition_body: ; preds = %8 | |
store i8 1, i8* %init, align 1 | |
%load_K = load float, float* %K, align 4 | |
%load_in = load float, float* %in, align 4 | |
%tmpVar2 = fmul float %load_K, %load_in | |
store float %tmpVar2, float* %out, align 4 | |
%load_out = load float, float* %out, align 4 | |
store float %load_out, float* %I2, align 4 | |
br label %continue | |
else: ; preds = %8 | |
%TIME_TO_REAL_instance = alloca %TIME_TO_REAL_interface, align 8 | |
%2 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance, i32 0, i32 0 | |
%load_T3 = load i64, i64* %T, align 4 | |
store i64 %load_T3, i64* %2, align 4 | |
%call = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance) | |
%tmpVar4 = fmul float %call, 0x3F50624DE0000000 | |
store float %tmpVar4, float* %tn, align 4 | |
%load_TN = load float, float* %tn, align 4 | |
%load_TN5 = load float, float* %tn, align 4 | |
%tmpVar6 = fmul float %load_TN, %load_TN5 | |
store float %tmpVar6, float* %tn2, align 4 | |
%3 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %int1, i32 0, i32 1 | |
%load_in7 = load float, float* %in, align 4 | |
%load_K8 = load float, float* %K, align 4 | |
%tmpVar9 = fmul float %load_in7, %load_K8 | |
%load_tn2 = load float, float* %tn2, align 4 | |
%tmpVar10 = fdiv float %tmpVar9, %load_tn2 | |
%load_I1 = load float, float* %I1, align 4 | |
%tmpVar11 = fmul float %load_I1, 5.000000e-01 | |
%load_D = load float, float* %D, align 4 | |
%tmpVar12 = fmul float %tmpVar11, %load_D | |
%load_TN13 = load float, float* %tn, align 4 | |
%tmpVar14 = fdiv float %tmpVar12, %load_TN13 | |
%tmpVar15 = fsub float %tmpVar10, %tmpVar14 | |
%load_I2 = load float, float* %I2, align 4 | |
%load_TN2 = load float, float* %tn2, align 4 | |
%tmpVar16 = fdiv float %load_I2, %load_TN2 | |
%tmpVar17 = fsub float %tmpVar15, %tmpVar16 | |
store float %tmpVar17, float* %3, align 4 | |
%4 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %int1, i32 0, i32 3 | |
store float* %I1, float** %4, align 8 | |
call void @INTEGRATE(%INTEGRATE_interface* %int1) | |
%5 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %int2, i32 0, i32 1 | |
%load_I118 = load float, float* %I1, align 4 | |
store float %load_I118, float* %5, align 4 | |
%6 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %int2, i32 0, i32 3 | |
store float* %I2, float** %6, align 8 | |
call void @INTEGRATE(%INTEGRATE_interface* %int2) | |
%load_I219 = load float, float* %I2, align 4 | |
store float %load_I219, float* %out, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
ret void | |
7: ; preds = %entry | |
%load_T = load i64, i64* %T, align 4 | |
%tmpVar1 = icmp eq i64 %load_T, 0 | |
br label %8 | |
8: ; preds = %7, %entry | |
%9 = phi i1 [ %tmpVar, %entry ], [ %tmpVar1, %7 ] | |
br i1 %9, label %condition_body, label %else | |
} | |
define void @FT_TN16(%FT_TN16_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %FT_TN16_interface, %FT_TN16_interface* %0, i32 0, i32 0 | |
%T = getelementptr inbounds %FT_TN16_interface, %FT_TN16_interface* %0, i32 0, i32 1 | |
%out = getelementptr inbounds %FT_TN16_interface, %FT_TN16_interface* %0, i32 0, i32 2 | |
%trig = getelementptr inbounds %FT_TN16_interface, %FT_TN16_interface* %0, i32 0, i32 3 | |
%length = getelementptr inbounds %FT_TN16_interface, %FT_TN16_interface* %0, i32 0, i32 4 | |
%X = getelementptr inbounds %FT_TN16_interface, %FT_TN16_interface* %0, i32 0, i32 5 | |
%cnt = getelementptr inbounds %FT_TN16_interface, %FT_TN16_interface* %0, i32 0, i32 6 | |
%last = getelementptr inbounds %FT_TN16_interface, %FT_TN16_interface* %0, i32 0, i32 7 | |
%tx = getelementptr inbounds %FT_TN16_interface, %FT_TN16_interface* %0, i32 0, i32 8 | |
%init = getelementptr inbounds %FT_TN16_interface, %FT_TN16_interface* %0, i32 0, i32 9 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call1, i64* %tx, align 4 | |
store i8 0, i8* %trig, align 1 | |
%load_init = load i8, i8* %init, align 1 | |
%2 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %2, true | |
br i1 %tmpVar, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%load_cnt = load i16, i16* %cnt, align 2 | |
%3 = sext i16 %load_cnt to i32 | |
%tmpVar2 = mul i32 1, %3 | |
%tmpVar3 = add i32 %tmpVar2, 0 | |
%tmpVar4 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar3 | |
%load_in = load float, float* %in, align 4 | |
store float %load_in, float* %tmpVar4, align 4 | |
store i8 1, i8* %init, align 1 | |
%load_tx = load i64, i64* %tx, align 4 | |
store i64 %load_tx, i64* %last, align 4 | |
br label %continue | |
branch: ; preds = %entry | |
%load_tx5 = load i64, i64* %tx, align 4 | |
%load_last = load i64, i64* %last, align 4 | |
%tmpVar6 = sub i64 %load_tx5, %load_last | |
%load_T = load i64, i64* %T, align 4 | |
%load_length = load i16, i16* %length, align 2 | |
%4 = sext i16 %load_length to i64 | |
%tmpVar7 = sdiv i64 %load_T, %4 | |
%tmpVar8 = icmp sge i64 %tmpVar6, %tmpVar7 | |
br i1 %tmpVar8, label %condition_body9, label %continue | |
condition_body9: ; preds = %branch | |
%load_cnt11 = load i16, i16* %cnt, align 2 | |
%5 = sext i16 %load_cnt11 to i32 | |
%load_length12 = load i16, i16* %length, align 2 | |
%6 = sext i16 %load_length12 to i32 | |
%tmpVar13 = sub i32 %6, 1 | |
%tmpVar14 = icmp eq i32 %5, %tmpVar13 | |
br i1 %tmpVar14, label %condition_body15, label %else | |
continue: ; preds = %continue10, %branch, %condition_body | |
ret void | |
condition_body15: ; preds = %condition_body9 | |
store i16 0, i16* %cnt, align 2 | |
br label %continue10 | |
else: ; preds = %condition_body9 | |
%load_cnt16 = load i16, i16* %cnt, align 2 | |
%7 = sext i16 %load_cnt16 to i32 | |
%tmpVar17 = add i32 %7, 1 | |
%8 = trunc i32 %tmpVar17 to i16 | |
store i16 %8, i16* %cnt, align 2 | |
br label %continue10 | |
continue10: ; preds = %else, %condition_body15 | |
%load_cnt18 = load i16, i16* %cnt, align 2 | |
%9 = sext i16 %load_cnt18 to i32 | |
%tmpVar19 = mul i32 1, %9 | |
%tmpVar20 = add i32 %tmpVar19, 0 | |
%tmpVar21 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar20 | |
%load_tmpVar = load float, float* %tmpVar21, align 4 | |
store float %load_tmpVar, float* %out, align 4 | |
%load_cnt22 = load i16, i16* %cnt, align 2 | |
%10 = sext i16 %load_cnt22 to i32 | |
%tmpVar23 = mul i32 1, %10 | |
%tmpVar24 = add i32 %tmpVar23, 0 | |
%tmpVar25 = getelementptr inbounds [16 x float], [16 x float]* %X, i32 0, i32 %tmpVar24 | |
%load_in26 = load float, float* %in, align 4 | |
store float %load_in26, float* %tmpVar25, align 4 | |
%load_tx27 = load i64, i64* %tx, align 4 | |
store i64 %load_tx27, i64* %last, align 4 | |
store i8 1, i8* %trig, align 1 | |
br label %continue | |
} | |
define void @FT_TN64(%FT_TN64_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %FT_TN64_interface, %FT_TN64_interface* %0, i32 0, i32 0 | |
%T = getelementptr inbounds %FT_TN64_interface, %FT_TN64_interface* %0, i32 0, i32 1 | |
%out = getelementptr inbounds %FT_TN64_interface, %FT_TN64_interface* %0, i32 0, i32 2 | |
%trig = getelementptr inbounds %FT_TN64_interface, %FT_TN64_interface* %0, i32 0, i32 3 | |
%length = getelementptr inbounds %FT_TN64_interface, %FT_TN64_interface* %0, i32 0, i32 4 | |
%X = getelementptr inbounds %FT_TN64_interface, %FT_TN64_interface* %0, i32 0, i32 5 | |
%cnt = getelementptr inbounds %FT_TN64_interface, %FT_TN64_interface* %0, i32 0, i32 6 | |
%last = getelementptr inbounds %FT_TN64_interface, %FT_TN64_interface* %0, i32 0, i32 7 | |
%tx = getelementptr inbounds %FT_TN64_interface, %FT_TN64_interface* %0, i32 0, i32 8 | |
%init = getelementptr inbounds %FT_TN64_interface, %FT_TN64_interface* %0, i32 0, i32 9 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call1, i64* %tx, align 4 | |
store i8 0, i8* %trig, align 1 | |
%load_init = load i8, i8* %init, align 1 | |
%2 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %2, true | |
br i1 %tmpVar, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%load_cnt = load i16, i16* %cnt, align 2 | |
%3 = sext i16 %load_cnt to i32 | |
%tmpVar2 = mul i32 1, %3 | |
%tmpVar3 = add i32 %tmpVar2, 0 | |
%tmpVar4 = getelementptr inbounds [64 x float], [64 x float]* %X, i32 0, i32 %tmpVar3 | |
%load_in = load float, float* %in, align 4 | |
store float %load_in, float* %tmpVar4, align 4 | |
store i8 1, i8* %init, align 1 | |
%load_tx = load i64, i64* %tx, align 4 | |
store i64 %load_tx, i64* %last, align 4 | |
br label %continue | |
branch: ; preds = %entry | |
%load_tx5 = load i64, i64* %tx, align 4 | |
%load_last = load i64, i64* %last, align 4 | |
%tmpVar6 = sub i64 %load_tx5, %load_last | |
%load_T = load i64, i64* %T, align 4 | |
%load_length = load i16, i16* %length, align 2 | |
%4 = sext i16 %load_length to i64 | |
%tmpVar7 = sdiv i64 %load_T, %4 | |
%tmpVar8 = icmp sge i64 %tmpVar6, %tmpVar7 | |
br i1 %tmpVar8, label %condition_body9, label %continue | |
condition_body9: ; preds = %branch | |
%load_cnt11 = load i16, i16* %cnt, align 2 | |
%5 = sext i16 %load_cnt11 to i32 | |
%load_length12 = load i16, i16* %length, align 2 | |
%6 = sext i16 %load_length12 to i32 | |
%tmpVar13 = sub i32 %6, 1 | |
%tmpVar14 = icmp eq i32 %5, %tmpVar13 | |
br i1 %tmpVar14, label %condition_body15, label %else | |
continue: ; preds = %continue10, %branch, %condition_body | |
ret void | |
condition_body15: ; preds = %condition_body9 | |
store i16 0, i16* %cnt, align 2 | |
br label %continue10 | |
else: ; preds = %condition_body9 | |
%load_cnt16 = load i16, i16* %cnt, align 2 | |
%7 = sext i16 %load_cnt16 to i32 | |
%tmpVar17 = add i32 %7, 1 | |
%8 = trunc i32 %tmpVar17 to i16 | |
store i16 %8, i16* %cnt, align 2 | |
br label %continue10 | |
continue10: ; preds = %else, %condition_body15 | |
%load_cnt18 = load i16, i16* %cnt, align 2 | |
%9 = sext i16 %load_cnt18 to i32 | |
%tmpVar19 = mul i32 1, %9 | |
%tmpVar20 = add i32 %tmpVar19, 0 | |
%tmpVar21 = getelementptr inbounds [64 x float], [64 x float]* %X, i32 0, i32 %tmpVar20 | |
%load_tmpVar = load float, float* %tmpVar21, align 4 | |
store float %load_tmpVar, float* %out, align 4 | |
%load_cnt22 = load i16, i16* %cnt, align 2 | |
%10 = sext i16 %load_cnt22 to i32 | |
%tmpVar23 = mul i32 1, %10 | |
%tmpVar24 = add i32 %tmpVar23, 0 | |
%tmpVar25 = getelementptr inbounds [64 x float], [64 x float]* %X, i32 0, i32 %tmpVar24 | |
%load_in26 = load float, float* %in, align 4 | |
store float %load_in26, float* %tmpVar25, align 4 | |
%load_tx27 = load i64, i64* %tx, align 4 | |
store i64 %load_tx27, i64* %last, align 4 | |
store i8 1, i8* %trig, align 1 | |
br label %continue | |
} | |
define void @FT_TN8(%FT_TN8_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %FT_TN8_interface, %FT_TN8_interface* %0, i32 0, i32 0 | |
%T = getelementptr inbounds %FT_TN8_interface, %FT_TN8_interface* %0, i32 0, i32 1 | |
%out = getelementptr inbounds %FT_TN8_interface, %FT_TN8_interface* %0, i32 0, i32 2 | |
%trig = getelementptr inbounds %FT_TN8_interface, %FT_TN8_interface* %0, i32 0, i32 3 | |
%length = getelementptr inbounds %FT_TN8_interface, %FT_TN8_interface* %0, i32 0, i32 4 | |
%X = getelementptr inbounds %FT_TN8_interface, %FT_TN8_interface* %0, i32 0, i32 5 | |
%cnt = getelementptr inbounds %FT_TN8_interface, %FT_TN8_interface* %0, i32 0, i32 6 | |
%last = getelementptr inbounds %FT_TN8_interface, %FT_TN8_interface* %0, i32 0, i32 7 | |
%tx = getelementptr inbounds %FT_TN8_interface, %FT_TN8_interface* %0, i32 0, i32 8 | |
%init = getelementptr inbounds %FT_TN8_interface, %FT_TN8_interface* %0, i32 0, i32 9 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call1, i64* %tx, align 4 | |
store i8 0, i8* %trig, align 1 | |
%load_init = load i8, i8* %init, align 1 | |
%2 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %2, true | |
br i1 %tmpVar, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%load_cnt = load i16, i16* %cnt, align 2 | |
%3 = sext i16 %load_cnt to i32 | |
%tmpVar2 = mul i32 1, %3 | |
%tmpVar3 = add i32 %tmpVar2, 0 | |
%tmpVar4 = getelementptr inbounds [8 x float], [8 x float]* %X, i32 0, i32 %tmpVar3 | |
%load_in = load float, float* %in, align 4 | |
store float %load_in, float* %tmpVar4, align 4 | |
store i8 1, i8* %init, align 1 | |
%load_tx = load i64, i64* %tx, align 4 | |
store i64 %load_tx, i64* %last, align 4 | |
br label %continue | |
branch: ; preds = %entry | |
%load_tx5 = load i64, i64* %tx, align 4 | |
%load_last = load i64, i64* %last, align 4 | |
%tmpVar6 = sub i64 %load_tx5, %load_last | |
%load_T = load i64, i64* %T, align 4 | |
%load_length = load i16, i16* %length, align 2 | |
%4 = sext i16 %load_length to i64 | |
%tmpVar7 = sdiv i64 %load_T, %4 | |
%tmpVar8 = icmp sge i64 %tmpVar6, %tmpVar7 | |
br i1 %tmpVar8, label %condition_body9, label %continue | |
condition_body9: ; preds = %branch | |
%load_cnt11 = load i16, i16* %cnt, align 2 | |
%5 = sext i16 %load_cnt11 to i32 | |
%load_length12 = load i16, i16* %length, align 2 | |
%6 = sext i16 %load_length12 to i32 | |
%tmpVar13 = sub i32 %6, 1 | |
%tmpVar14 = icmp eq i32 %5, %tmpVar13 | |
br i1 %tmpVar14, label %condition_body15, label %else | |
continue: ; preds = %continue10, %branch, %condition_body | |
ret void | |
condition_body15: ; preds = %condition_body9 | |
store i16 0, i16* %cnt, align 2 | |
br label %continue10 | |
else: ; preds = %condition_body9 | |
%load_cnt16 = load i16, i16* %cnt, align 2 | |
%7 = sext i16 %load_cnt16 to i32 | |
%tmpVar17 = add i32 %7, 1 | |
%8 = trunc i32 %tmpVar17 to i16 | |
store i16 %8, i16* %cnt, align 2 | |
br label %continue10 | |
continue10: ; preds = %else, %condition_body15 | |
%load_cnt18 = load i16, i16* %cnt, align 2 | |
%9 = sext i16 %load_cnt18 to i32 | |
%tmpVar19 = mul i32 1, %9 | |
%tmpVar20 = add i32 %tmpVar19, 0 | |
%tmpVar21 = getelementptr inbounds [8 x float], [8 x float]* %X, i32 0, i32 %tmpVar20 | |
%load_tmpVar = load float, float* %tmpVar21, align 4 | |
store float %load_tmpVar, float* %out, align 4 | |
%load_cnt22 = load i16, i16* %cnt, align 2 | |
%10 = sext i16 %load_cnt22 to i32 | |
%tmpVar23 = mul i32 1, %10 | |
%tmpVar24 = add i32 %tmpVar23, 0 | |
%tmpVar25 = getelementptr inbounds [8 x float], [8 x float]* %X, i32 0, i32 %tmpVar24 | |
%load_in26 = load float, float* %in, align 4 | |
store float %load_in26, float* %tmpVar25, align 4 | |
%load_tx27 = load i64, i64* %tx, align 4 | |
store i64 %load_tx27, i64* %last, align 4 | |
store i8 1, i8* %trig, align 1 | |
br label %continue | |
} | |
define void @HYST(%HYST_interface* %0) { | |
entry: | |
%In = getelementptr inbounds %HYST_interface, %HYST_interface* %0, i32 0, i32 0 | |
%ON = getelementptr inbounds %HYST_interface, %HYST_interface* %0, i32 0, i32 1 | |
%OFF = getelementptr inbounds %HYST_interface, %HYST_interface* %0, i32 0, i32 2 | |
%Q = getelementptr inbounds %HYST_interface, %HYST_interface* %0, i32 0, i32 3 | |
%win = getelementptr inbounds %HYST_interface, %HYST_interface* %0, i32 0, i32 4 | |
%load_ON = load float, float* %ON, align 4 | |
%load_OFF = load float, float* %OFF, align 4 | |
%tmpVar = fcmp oge float %load_ON, %load_OFF | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_IN = load float, float* %In, align 4 | |
%load_OFF3 = load float, float* %OFF, align 4 | |
%tmpVar4 = fcmp olt float %load_IN, %load_OFF3 | |
br i1 %tmpVar4, label %condition_body5, label %branch | |
else: ; preds = %entry | |
%load_IN13 = load float, float* %In, align 4 | |
%load_OFF14 = load float, float* %OFF, align 4 | |
%tmpVar15 = fcmp ogt float %load_IN13, %load_OFF14 | |
br i1 %tmpVar15, label %condition_body16, label %branch10 | |
continue: ; preds = %continue12, %continue2 | |
ret void | |
condition_body5: ; preds = %condition_body | |
store i8 0, i8* %Q, align 1 | |
store i8 0, i8* %win, align 1 | |
br label %continue2 | |
branch: ; preds = %condition_body | |
%load_IN6 = load float, float* %In, align 4 | |
%load_ON7 = load float, float* %ON, align 4 | |
%tmpVar8 = fcmp ogt float %load_IN6, %load_ON7 | |
br i1 %tmpVar8, label %condition_body9, label %else1 | |
condition_body9: ; preds = %branch | |
store i8 1, i8* %Q, align 1 | |
store i8 0, i8* %win, align 1 | |
br label %continue2 | |
else1: ; preds = %branch | |
store i8 1, i8* %win, align 1 | |
br label %continue2 | |
continue2: ; preds = %else1, %condition_body9, %condition_body5 | |
br label %continue | |
condition_body16: ; preds = %else | |
store i8 0, i8* %Q, align 1 | |
store i8 0, i8* %win, align 1 | |
br label %continue12 | |
branch10: ; preds = %else | |
%load_IN17 = load float, float* %In, align 4 | |
%load_ON18 = load float, float* %ON, align 4 | |
%tmpVar19 = fcmp olt float %load_IN17, %load_ON18 | |
br i1 %tmpVar19, label %condition_body20, label %else11 | |
condition_body20: ; preds = %branch10 | |
store i8 1, i8* %Q, align 1 | |
store i8 0, i8* %win, align 1 | |
br label %continue12 | |
else11: ; preds = %branch10 | |
store i8 1, i8* %win, align 1 | |
br label %continue12 | |
continue12: ; preds = %else11, %condition_body20, %condition_body16 | |
br label %continue | |
} | |
define void @HYST_1(%HYST_1_interface* %0) { | |
entry: | |
%In = getelementptr inbounds %HYST_1_interface, %HYST_1_interface* %0, i32 0, i32 0 | |
%high = getelementptr inbounds %HYST_1_interface, %HYST_1_interface* %0, i32 0, i32 1 | |
%low = getelementptr inbounds %HYST_1_interface, %HYST_1_interface* %0, i32 0, i32 2 | |
%Q = getelementptr inbounds %HYST_1_interface, %HYST_1_interface* %0, i32 0, i32 3 | |
%win = getelementptr inbounds %HYST_1_interface, %HYST_1_interface* %0, i32 0, i32 4 | |
%load_in = load float, float* %In, align 4 | |
%load_low = load float, float* %low, align 4 | |
%tmpVar = fcmp olt float %load_in, %load_low | |
br i1 %tmpVar, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
store i8 0, i8* %Q, align 1 | |
store i8 0, i8* %win, align 1 | |
br label %continue | |
branch: ; preds = %entry | |
%load_in1 = load float, float* %In, align 4 | |
%load_high = load float, float* %high, align 4 | |
%tmpVar2 = fcmp ogt float %load_in1, %load_high | |
br i1 %tmpVar2, label %condition_body3, label %else | |
condition_body3: ; preds = %branch | |
store i8 1, i8* %Q, align 1 | |
store i8 0, i8* %win, align 1 | |
br label %continue | |
else: ; preds = %branch | |
store i8 1, i8* %win, align 1 | |
br label %continue | |
continue: ; preds = %else, %condition_body3, %condition_body | |
ret void | |
} | |
define void @HYST_2(%HYST_2_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %HYST_2_interface, %HYST_2_interface* %0, i32 0, i32 0 | |
%VAL = getelementptr inbounds %HYST_2_interface, %HYST_2_interface* %0, i32 0, i32 1 | |
%HYS = getelementptr inbounds %HYST_2_interface, %HYST_2_interface* %0, i32 0, i32 2 | |
%Q = getelementptr inbounds %HYST_2_interface, %HYST_2_interface* %0, i32 0, i32 3 | |
%WIN = getelementptr inbounds %HYST_2_interface, %HYST_2_interface* %0, i32 0, i32 4 | |
%tmp = getelementptr inbounds %HYST_2_interface, %HYST_2_interface* %0, i32 0, i32 5 | |
%load_val = load float, float* %VAL, align 4 | |
%load_hys = load float, float* %HYS, align 4 | |
%tmpVar = fmul float %load_hys, 5.000000e-01 | |
%tmpVar1 = fsub float %load_val, %tmpVar | |
store float %tmpVar1, float* %tmp, align 4 | |
%load_in = load float, float* %IN, align 4 | |
%load_tmp = load float, float* %tmp, align 4 | |
%tmpVar2 = fcmp olt float %load_in, %load_tmp | |
br i1 %tmpVar2, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
store i8 0, i8* %Q, align 1 | |
store i8 0, i8* %WIN, align 1 | |
br label %continue | |
branch: ; preds = %entry | |
%load_in3 = load float, float* %IN, align 4 | |
%load_tmp4 = load float, float* %tmp, align 4 | |
%load_hys5 = load float, float* %HYS, align 4 | |
%tmpVar6 = fadd float %load_tmp4, %load_hys5 | |
%tmpVar7 = fcmp ogt float %load_in3, %tmpVar6 | |
br i1 %tmpVar7, label %condition_body8, label %else | |
condition_body8: ; preds = %branch | |
store i8 1, i8* %Q, align 1 | |
store i8 0, i8* %WIN, align 1 | |
br label %continue | |
else: ; preds = %branch | |
store i8 1, i8* %WIN, align 1 | |
br label %continue | |
continue: ; preds = %else, %condition_body8, %condition_body | |
ret void | |
} | |
define void @HYST_3(%HYST_3_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %HYST_3_interface, %HYST_3_interface* %0, i32 0, i32 0 | |
%hyst = getelementptr inbounds %HYST_3_interface, %HYST_3_interface* %0, i32 0, i32 1 | |
%val1 = getelementptr inbounds %HYST_3_interface, %HYST_3_interface* %0, i32 0, i32 2 | |
%val2 = getelementptr inbounds %HYST_3_interface, %HYST_3_interface* %0, i32 0, i32 3 | |
%Q1 = getelementptr inbounds %HYST_3_interface, %HYST_3_interface* %0, i32 0, i32 4 | |
%Q2 = getelementptr inbounds %HYST_3_interface, %HYST_3_interface* %0, i32 0, i32 5 | |
%X = getelementptr inbounds %HYST_3_interface, %HYST_3_interface* %0, i32 0, i32 6 | |
%load_hyst = load float, float* %hyst, align 4 | |
%tmpVar = fmul float %load_hyst, 5.000000e-01 | |
store float %tmpVar, float* %X, align 4 | |
%load_in = load float, float* %in, align 4 | |
%load_val1 = load float, float* %val1, align 4 | |
%load_X = load float, float* %X, align 4 | |
%tmpVar1 = fsub float %load_val1, %load_X | |
%tmpVar2 = fcmp olt float %load_in, %tmpVar1 | |
br i1 %tmpVar2, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
store i8 1, i8* %Q1, align 1 | |
br label %continue | |
branch: ; preds = %entry | |
%load_in3 = load float, float* %in, align 4 | |
%load_val14 = load float, float* %val1, align 4 | |
%load_X5 = load float, float* %X, align 4 | |
%tmpVar6 = fadd float %load_val14, %load_X5 | |
%tmpVar7 = fcmp ogt float %load_in3, %tmpVar6 | |
br i1 %tmpVar7, label %condition_body8, label %continue | |
condition_body8: ; preds = %branch | |
store i8 0, i8* %Q1, align 1 | |
br label %continue | |
continue: ; preds = %condition_body8, %branch, %condition_body | |
%load_in11 = load float, float* %in, align 4 | |
%load_val2 = load float, float* %val2, align 4 | |
%load_X12 = load float, float* %X, align 4 | |
%tmpVar13 = fsub float %load_val2, %load_X12 | |
%tmpVar14 = fcmp olt float %load_in11, %tmpVar13 | |
br i1 %tmpVar14, label %condition_body15, label %branch9 | |
condition_body15: ; preds = %continue | |
store i8 0, i8* %Q2, align 1 | |
br label %continue10 | |
branch9: ; preds = %continue | |
%load_in16 = load float, float* %in, align 4 | |
%load_val217 = load float, float* %val2, align 4 | |
%load_X18 = load float, float* %X, align 4 | |
%tmpVar19 = fadd float %load_val217, %load_X18 | |
%tmpVar20 = fcmp ogt float %load_in16, %tmpVar19 | |
br i1 %tmpVar20, label %condition_body21, label %continue10 | |
condition_body21: ; preds = %branch9 | |
store i8 1, i8* %Q2, align 1 | |
br label %continue10 | |
continue10: ; preds = %condition_body21, %branch9, %condition_body15 | |
ret void | |
} | |
define void @INTEGRATE(%INTEGRATE_interface* %0) { | |
entry: | |
%E = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %0, i32 0, i32 0 | |
%X = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %0, i32 0, i32 1 | |
%K = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %0, i32 0, i32 2 | |
%Y = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %0, i32 0, i32 3 | |
%X_last = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %0, i32 0, i32 4 | |
%init = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %0, i32 0, i32 5 | |
%last = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %0, i32 0, i32 6 | |
%tx = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %0, i32 0, i32 7 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
store i8 1, i8* %init, align 1 | |
%load_X = load float, float* %X, align 4 | |
store float %load_X, float* %X_last, align 4 | |
br label %continue | |
branch: ; preds = %entry | |
%load_E = load i8, i8* %E, align 1 | |
%2 = icmp ne i8 %load_E, 0 | |
br i1 %2, label %condition_body1, label %continue | |
condition_body1: ; preds = %branch | |
%deref = load float*, float** %Y, align 8 | |
%load_X2 = load float, float* %X, align 4 | |
%load_X_LAST = load float, float* %X_last, align 4 | |
%tmpVar3 = fadd float %load_X2, %load_X_LAST | |
%tmpVar4 = fmul float %tmpVar3, 0x3F40624DE0000000 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%3 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%load_tx = load i32, i32* %tx, align 4 | |
%load_last = load i32, i32* %last, align 4 | |
%tmpVar5 = sub i32 %load_tx, %load_last | |
store i32 %tmpVar5, i32* %3, align 4 | |
%call6 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%tmpVar7 = fmul float %tmpVar4, %call6 | |
%load_K = load float, float* %K, align 4 | |
%tmpVar8 = fmul float %tmpVar7, %load_K | |
%deref9 = load float*, float** %Y, align 8 | |
%load_Y = load float, float* %deref9, align 4 | |
%tmpVar10 = fadd float %tmpVar8, %load_Y | |
store float %tmpVar10, float* %deref, align 4 | |
%load_X11 = load float, float* %X, align 4 | |
store float %load_X11, float* %X_last, align 4 | |
br label %continue | |
continue: ; preds = %condition_body1, %branch, %condition_body | |
%load_tx12 = load i32, i32* %tx, align 4 | |
store i32 %load_tx12, i32* %last, align 4 | |
ret void | |
} | |
define void @ASTRO(%ASTRO_interface* %0) { | |
entry: | |
%m = getelementptr inbounds %ASTRO_interface, %ASTRO_interface* %0, i32 0, i32 0 | |
%AE = getelementptr inbounds %ASTRO_interface, %ASTRO_interface* %0, i32 0, i32 1 | |
%PC = getelementptr inbounds %ASTRO_interface, %ASTRO_interface* %0, i32 0, i32 2 | |
%LJ = getelementptr inbounds %ASTRO_interface, %ASTRO_interface* %0, i32 0, i32 3 | |
%Ym = getelementptr inbounds %ASTRO_interface, %ASTRO_interface* %0, i32 0, i32 4 | |
%YAE = getelementptr inbounds %ASTRO_interface, %ASTRO_interface* %0, i32 0, i32 5 | |
%YPC = getelementptr inbounds %ASTRO_interface, %ASTRO_interface* %0, i32 0, i32 6 | |
%YLJ = getelementptr inbounds %ASTRO_interface, %ASTRO_interface* %0, i32 0, i32 7 | |
%load_AE = load float, float* %AE, align 4 | |
%load_m = load float, float* %m, align 4 | |
%tmpVar = fmul float %load_m, 0x3D9D662D20000000 | |
%tmpVar1 = fadd float %load_AE, %tmpVar | |
%load_PC = load float, float* %PC, align 4 | |
%tmpVar2 = fmul float %load_PC, 2.062650e+05 | |
%tmpVar3 = fadd float %tmpVar1, %tmpVar2 | |
%load_LJ = load float, float* %LJ, align 4 | |
%tmpVar4 = fmul float %load_LJ, 6.324000e+04 | |
%tmpVar5 = fadd float %tmpVar3, %tmpVar4 | |
store float %tmpVar5, float* %YAE, align 4 | |
%load_YAE = load float, float* %YAE, align 4 | |
%tmpVar6 = fmul float %load_YAE, 0x42416A5D20000000 | |
store float %tmpVar6, float* %Ym, align 4 | |
%load_YAE7 = load float, float* %YAE, align 4 | |
%tmpVar8 = fmul float %load_YAE7, 0x3ED455A480000000 | |
store float %tmpVar8, float* %YPC, align 4 | |
%load_YAE9 = load float, float* %YAE, align 4 | |
%tmpVar10 = fmul float %load_YAE9, 0x3EF094B5C0000000 | |
store float %tmpVar10, float* %YLJ, align 4 | |
ret void | |
} | |
define float @BFT_TO_MS(%BFT_TO_MS_interface* %0) { | |
entry: | |
%BFT = getelementptr inbounds %BFT_TO_MS_interface, %BFT_TO_MS_interface* %0, i32 0, i32 0 | |
%BFT_TO_MS = alloca float, align 4 | |
store float 0.000000e+00, float* %BFT_TO_MS, align 4 | |
%EXPT_instance = alloca %EXPT_interface, align 8 | |
%1 = getelementptr inbounds %EXPT_interface, %EXPT_interface* %EXPT_instance, i32 0, i32 0 | |
%load_BFT = load i16, i16* %BFT, align 2 | |
%2 = sext i16 %load_BFT to i32 | |
store i32 %2, i32* %1, align 4 | |
%3 = getelementptr inbounds %EXPT_interface, %EXPT_interface* %EXPT_instance, i32 0, i32 1 | |
store i32 1, i32* %3, align 4 | |
%call = call double @EXPT(%EXPT_interface* %EXPT_instance) | |
%tmpVar = fmul double %call, 8.360000e-01 | |
%4 = fptrunc double %tmpVar to float | |
store float %4, float* %BFT_TO_MS, align 4 | |
%BFT_TO_MS_ret = load float, float* %BFT_TO_MS, align 4 | |
ret float %BFT_TO_MS_ret | |
} | |
define float @C_TO_F(%C_TO_F_interface* %0) { | |
entry: | |
%celsius = getelementptr inbounds %C_TO_F_interface, %C_TO_F_interface* %0, i32 0, i32 0 | |
%C_TO_F = alloca float, align 4 | |
store float 0.000000e+00, float* %C_TO_F, align 4 | |
%load_celsius = load float, float* %celsius, align 4 | |
%tmpVar = fmul float %load_celsius, 0x3FFCCCCCC0000000 | |
%tmpVar1 = fadd float %tmpVar, 3.200000e+01 | |
store float %tmpVar1, float* %C_TO_F, align 4 | |
%C_TO_F_ret = load float, float* %C_TO_F, align 4 | |
ret float %C_TO_F_ret | |
} | |
define float @C_TO_K(%C_TO_K_interface* %0) { | |
entry: | |
%Celsius = getelementptr inbounds %C_TO_K_interface, %C_TO_K_interface* %0, i32 0, i32 0 | |
%C_TO_K = alloca float, align 4 | |
store float 0.000000e+00, float* %C_TO_K, align 4 | |
%load_Celsius = load float, float* %Celsius, align 4 | |
%load_ = load float, float* getelementptr inbounds (%CONSTANTS_PHYS, %CONSTANTS_PHYS* @PHYS, i32 0, i32 3), align 4 | |
%tmpVar = fsub float %load_Celsius, %load_ | |
store float %tmpVar, float* %C_TO_K, align 4 | |
%C_TO_K_ret = load float, float* %C_TO_K, align 4 | |
ret float %C_TO_K_ret | |
} | |
define [4 x i8] @DEG_TO_DIR(%DEG_TO_DIR_interface* %0) { | |
entry: | |
%DEG = getelementptr inbounds %DEG_TO_DIR_interface, %DEG_TO_DIR_interface* %0, i32 0, i32 0 | |
%N = getelementptr inbounds %DEG_TO_DIR_interface, %DEG_TO_DIR_interface* %0, i32 0, i32 1 | |
%L = getelementptr inbounds %DEG_TO_DIR_interface, %DEG_TO_DIR_interface* %0, i32 0, i32 2 | |
%ly = getelementptr inbounds %DEG_TO_DIR_interface, %DEG_TO_DIR_interface* %0, i32 0, i32 3 | |
%DEG_TO_DIR = alloca [4 x i8], align 1 | |
store i16 0, i16* %ly, align 2 | |
%1 = bitcast [4 x i8]* %DEG_TO_DIR to i8* | |
call void @llvm.memset.p0i8.i64(i8* align 1 %1, i8 0, i64 ptrtoint ([4 x i8]* getelementptr ([4 x i8], [4 x i8]* null, i32 1) to i64), i1 false) | |
%load_L = load i16, i16* %L, align 2 | |
%2 = sext i16 %load_L to i32 | |
%tmpVar = icmp eq i32 %2, 0 | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_ = load i16, i16* getelementptr inbounds (%CONSTANTS_LANGUAGE, %CONSTANTS_LANGUAGE* @LANGUAGE, i32 0, i32 0), align 2 | |
store i16 %load_, i16* %ly, align 2 | |
br label %continue | |
else: ; preds = %entry | |
%MIN_instance = alloca %MIN_interface, align 8 | |
%3 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 0 | |
%load_L1 = load i16, i16* %L, align 2 | |
%4 = sext i16 %load_L1 to i64 | |
store i64 %4, i64* %3, align 4 | |
%5 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 1 | |
%load_2 = load i16, i16* getelementptr inbounds (%CONSTANTS_LANGUAGE, %CONSTANTS_LANGUAGE* @LANGUAGE, i32 0, i32 1), align 2 | |
%6 = sext i16 %load_2 to i64 | |
store i64 %6, i64* %5, align 4 | |
%call = call i64 @MIN(%MIN_interface* %MIN_instance) | |
%7 = trunc i64 %call to i16 | |
store i16 %7, i16* %ly, align 2 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%load_ly = load i16, i16* %ly, align 2 | |
%8 = sub i16 %load_ly, 1 | |
%9 = sext i16 %8 to i32 | |
%tmpVar3 = mul i32 16, %9 | |
%tmpVar4 = add i32 %tmpVar3, 0 | |
%SHL_instance = alloca %SHL_interface, align 8 | |
%10 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 0 | |
%load_DEG = load i16, i16* %DEG, align 2 | |
%11 = sext i16 %load_DEG to i64 | |
store i64 %11, i64* %10, align 4 | |
%12 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 1 | |
%load_N = load i16, i16* %N, align 2 | |
%13 = sext i16 %load_N to i32 | |
%tmpVar5 = sub i32 %13, 1 | |
%14 = trunc i32 %tmpVar5 to i16 | |
store i16 %14, i16* %12, align 2 | |
%call6 = call i64 @SHL(%SHL_interface* %SHL_instance) | |
%tmpVar7 = add i64 %call6, 45 | |
%tmpVar8 = sdiv i64 %tmpVar7, 90 | |
%SHL_instance9 = alloca %SHL_interface, align 8 | |
%15 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance9, i32 0, i32 0 | |
store i64 2, i64* %15, align 4 | |
%16 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance9, i32 0, i32 1 | |
%load_N10 = load i16, i16* %N, align 2 | |
store i16 %load_N10, i16* %16, align 2 | |
%call11 = call i64 @SHL(%SHL_interface* %SHL_instance9) | |
%tmpVar12 = srem i64 %tmpVar8, %call11 | |
%SHR_instance = alloca %SHR_interface, align 8 | |
%17 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance, i32 0, i32 0 | |
store i64 8, i64* %17, align 4 | |
%18 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance, i32 0, i32 1 | |
%load_N13 = load i16, i16* %N, align 2 | |
store i16 %load_N13, i16* %18, align 2 | |
%call14 = call i64 @SHR(%SHR_interface* %SHR_instance) | |
%tmpVar15 = mul i64 %tmpVar12, %call14 | |
%19 = trunc i64 %tmpVar15 to i32 | |
%tmpVar16 = mul i32 1, %19 | |
%tmpVar17 = add i32 %tmpVar16, %tmpVar4 | |
%tmpVar18 = getelementptr inbounds [48 x [4 x i8]], [48 x [4 x i8]]* getelementptr inbounds (%CONSTANTS_LANGUAGE, %CONSTANTS_LANGUAGE* @LANGUAGE, i32 0, i32 6), i32 0, i32 %tmpVar17 | |
%20 = bitcast [4 x i8]* %DEG_TO_DIR to i8* | |
%21 = bitcast [4 x i8]* %tmpVar18 to i8* | |
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %20, i8* align 1 %21, i32 3, i1 false) | |
%DEG_TO_DIR_ret = load [4 x i8], [4 x i8]* %DEG_TO_DIR, align 1 | |
ret [4 x i8] %DEG_TO_DIR_ret | |
} | |
declare i16 @DIR_TO_DEG(%DIR_TO_DEG_interface*) | |
define void @ENERGY(%ENERGY_interface* %0) { | |
entry: | |
%J = getelementptr inbounds %ENERGY_interface, %ENERGY_interface* %0, i32 0, i32 0 | |
%C = getelementptr inbounds %ENERGY_interface, %ENERGY_interface* %0, i32 0, i32 1 | |
%Wh = getelementptr inbounds %ENERGY_interface, %ENERGY_interface* %0, i32 0, i32 2 | |
%YJ = getelementptr inbounds %ENERGY_interface, %ENERGY_interface* %0, i32 0, i32 3 | |
%YC = getelementptr inbounds %ENERGY_interface, %ENERGY_interface* %0, i32 0, i32 4 | |
%YWh = getelementptr inbounds %ENERGY_interface, %ENERGY_interface* %0, i32 0, i32 5 | |
%load_J = load float, float* %J, align 4 | |
%load_Wh = load float, float* %Wh, align 4 | |
%tmpVar = fmul float %load_Wh, 3.600000e+03 | |
%tmpVar1 = fadd float %load_J, %tmpVar | |
%load_C = load float, float* %C, align 4 | |
%tmpVar2 = fmul float %load_C, 0x4010BF4880000000 | |
%tmpVar3 = fadd float %tmpVar1, %tmpVar2 | |
store float %tmpVar3, float* %YJ, align 4 | |
%load_YJ = load float, float* %YJ, align 4 | |
%tmpVar4 = fmul float %load_YJ, 0x3FCE9280A0000000 | |
store float %tmpVar4, float* %YC, align 4 | |
%load_YJ5 = load float, float* %YJ, align 4 | |
%tmpVar6 = fmul float %load_YJ5, 0x3F32345680000000 | |
store float %tmpVar6, float* %YWh, align 4 | |
ret void | |
} | |
define float @F_TO_C(%F_TO_C_interface* %0) { | |
entry: | |
%fahrenheit = getelementptr inbounds %F_TO_C_interface, %F_TO_C_interface* %0, i32 0, i32 0 | |
%F_TO_C = alloca float, align 4 | |
store float 0.000000e+00, float* %F_TO_C, align 4 | |
%load_fahrenheit = load float, float* %fahrenheit, align 4 | |
%tmpVar = fsub float %load_fahrenheit, 3.200000e+01 | |
%tmpVar1 = fmul float %tmpVar, 0x3FE1C71C80000000 | |
store float %tmpVar1, float* %F_TO_C, align 4 | |
%F_TO_C_ret = load float, float* %F_TO_C, align 4 | |
ret float %F_TO_C_ret | |
} | |
define float @F_TO_OM(%F_TO_OM_interface* %0) { | |
entry: | |
%F = getelementptr inbounds %F_TO_OM_interface, %F_TO_OM_interface* %0, i32 0, i32 0 | |
%F_TO_OM = alloca float, align 4 | |
store float 0.000000e+00, float* %F_TO_OM, align 4 | |
%load_ = load float, float* getelementptr inbounds (%CONSTANTS_MATH, %CONSTANTS_MATH* @MATH, i32 0, i32 1), align 4 | |
%load_F = load float, float* %F, align 4 | |
%tmpVar = fmul float %load_, %load_F | |
store float %tmpVar, float* %F_TO_OM, align 4 | |
%F_TO_OM_ret = load float, float* %F_TO_OM, align 4 | |
ret float %F_TO_OM_ret | |
} | |
define i64 @F_TO_PT(%F_TO_PT_interface* %0) { | |
entry: | |
%F = getelementptr inbounds %F_TO_PT_interface, %F_TO_PT_interface* %0, i32 0, i32 0 | |
%F_TO_PT = alloca i64, align 8 | |
store i64 0, i64* %F_TO_PT, align 4 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%REAL_TO_DWORD_instance = alloca %REAL_TO_DWORD_interface, align 8 | |
%2 = getelementptr inbounds %REAL_TO_DWORD_interface, %REAL_TO_DWORD_interface* %REAL_TO_DWORD_instance, i32 0, i32 0 | |
%load_F = load float, float* %F, align 4 | |
%tmpVar = fdiv float 1.000000e+00, %load_F | |
%tmpVar1 = fmul float %tmpVar, 1.000000e+03 | |
store float %tmpVar1, float* %2, align 4 | |
%call = call i32 @REAL_TO_DWORD(%REAL_TO_DWORD_interface* %REAL_TO_DWORD_instance) | |
store i32 %call, i32* %1, align 4 | |
%call2 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call2, i64* %F_TO_PT, align 4 | |
%F_TO_PT_ret = load i64, i64* %F_TO_PT, align 4 | |
ret i64 %F_TO_PT_ret | |
} | |
define float @GEO_TO_DEG(%GEO_TO_DEG_interface* %0) { | |
entry: | |
%D = getelementptr inbounds %GEO_TO_DEG_interface, %GEO_TO_DEG_interface* %0, i32 0, i32 0 | |
%M = getelementptr inbounds %GEO_TO_DEG_interface, %GEO_TO_DEG_interface* %0, i32 0, i32 1 | |
%SEC = getelementptr inbounds %GEO_TO_DEG_interface, %GEO_TO_DEG_interface* %0, i32 0, i32 2 | |
%GEO_TO_DEG = alloca float, align 4 | |
store float 0.000000e+00, float* %GEO_TO_DEG, align 4 | |
%INT_TO_REAL_instance = alloca %INT_TO_REAL_interface, align 8 | |
%1 = getelementptr inbounds %INT_TO_REAL_interface, %INT_TO_REAL_interface* %INT_TO_REAL_instance, i32 0, i32 0 | |
%load_D = load i16, i16* %D, align 2 | |
store i16 %load_D, i16* %1, align 2 | |
%call = call float @INT_TO_REAL(%INT_TO_REAL_interface* %INT_TO_REAL_instance) | |
%INT_TO_REAL_instance1 = alloca %INT_TO_REAL_interface, align 8 | |
%2 = getelementptr inbounds %INT_TO_REAL_interface, %INT_TO_REAL_interface* %INT_TO_REAL_instance1, i32 0, i32 0 | |
%load_M = load i16, i16* %M, align 2 | |
store i16 %load_M, i16* %2, align 2 | |
%call2 = call float @INT_TO_REAL(%INT_TO_REAL_interface* %INT_TO_REAL_instance1) | |
%tmpVar = fmul float %call2, 0x3F91111120000000 | |
%tmpVar3 = fadd float %call, %tmpVar | |
%load_sec = load float, float* %SEC, align 4 | |
%tmpVar4 = fmul float %load_sec, 0x3F32345680000000 | |
%tmpVar5 = fadd float %tmpVar3, %tmpVar4 | |
store float %tmpVar5, float* %GEO_TO_DEG, align 4 | |
%GEO_TO_DEG_ret = load float, float* %GEO_TO_DEG, align 4 | |
ret float %GEO_TO_DEG_ret | |
} | |
define float @K_TO_C(%K_TO_C_interface* %0) { | |
entry: | |
%Kelvin = getelementptr inbounds %K_TO_C_interface, %K_TO_C_interface* %0, i32 0, i32 0 | |
%K_TO_C = alloca float, align 4 | |
store float 0.000000e+00, float* %K_TO_C, align 4 | |
%load_Kelvin = load float, float* %Kelvin, align 4 | |
%load_ = load float, float* getelementptr inbounds (%CONSTANTS_PHYS, %CONSTANTS_PHYS* @PHYS, i32 0, i32 3), align 4 | |
%tmpVar = fadd float %load_Kelvin, %load_ | |
store float %tmpVar, float* %K_TO_C, align 4 | |
%K_TO_C_ret = load float, float* %K_TO_C, align 4 | |
ret float %K_TO_C_ret | |
} | |
define float @KMH_TO_MS(%KMH_TO_MS_interface* %0) { | |
entry: | |
%kmh = getelementptr inbounds %KMH_TO_MS_interface, %KMH_TO_MS_interface* %0, i32 0, i32 0 | |
%KMH_TO_MS = alloca float, align 4 | |
store float 0.000000e+00, float* %KMH_TO_MS, align 4 | |
%load_kmh = load float, float* %kmh, align 4 | |
%tmpVar = fmul float %load_kmh, 0x3FD1C71C80000000 | |
store float %tmpVar, float* %KMH_TO_MS, align 4 | |
%KMH_TO_MS_ret = load float, float* %KMH_TO_MS, align 4 | |
ret float %KMH_TO_MS_ret | |
} | |
define void @LENGTH(%LENGTH_interface* %0) { | |
entry: | |
%m = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 0 | |
%p = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 1 | |
%in = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 2 | |
%ft = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 3 | |
%yd = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 4 | |
%mile = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 5 | |
%sm = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 6 | |
%fm = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 7 | |
%Ym = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 8 | |
%Yp = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 9 | |
%Yin = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 10 | |
%Yft = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 11 | |
%Yyd = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 12 | |
%Ymile = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 13 | |
%Ysm = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 14 | |
%Yfm = getelementptr inbounds %LENGTH_interface, %LENGTH_interface* %0, i32 0, i32 15 | |
%load_m = load float, float* %m, align 4 | |
%load_p = load float, float* %p, align 4 | |
%tmpVar = fmul float %load_p, 0x3F38A552E0000000 | |
%tmpVar1 = fadd float %load_m, %tmpVar | |
%load_in = load float, float* %in, align 4 | |
%tmpVar2 = fmul float %load_in, 0x3F9A027520000000 | |
%tmpVar3 = fadd float %tmpVar1, %tmpVar2 | |
%load_ft = load float, float* %ft, align 4 | |
%tmpVar4 = fmul float %load_ft, 0x3FD381D7E0000000 | |
%tmpVar5 = fadd float %tmpVar3, %tmpVar4 | |
%load_yd = load float, float* %yd, align 4 | |
%tmpVar6 = fmul float %load_yd, 0x3FED42C3C0000000 | |
%tmpVar7 = fadd float %tmpVar5, %tmpVar6 | |
%load_mile = load float, float* %mile, align 4 | |
%tmpVar8 = fmul float %load_mile, 0x4099256040000000 | |
%tmpVar9 = fadd float %tmpVar7, %tmpVar8 | |
%load_sm = load float, float* %sm, align 4 | |
%tmpVar10 = fmul float %load_sm, 1.852000e+03 | |
%tmpVar11 = fadd float %tmpVar9, %tmpVar10 | |
%load_fm = load float, float* %fm, align 4 | |
%tmpVar12 = fmul float %load_fm, 0x3FFD439580000000 | |
%tmpVar13 = fadd float %tmpVar11, %tmpVar12 | |
store float %tmpVar13, float* %Ym, align 4 | |
%load_Ym = load float, float* %Ym, align 4 | |
%tmpVar14 = fmul float %load_Ym, 0x40A4C63AC0000000 | |
store float %tmpVar14, float* %Yp, align 4 | |
%load_Ym15 = load float, float* %Ym, align 4 | |
%tmpVar16 = fmul float %load_Ym15, 0x4043AF5EC0000000 | |
store float %tmpVar16, float* %Yin, align 4 | |
%load_Ym17 = load float, float* %Ym, align 4 | |
%tmpVar18 = fmul float %load_Ym17, 0x400A3F2900000000 | |
store float %tmpVar18, float* %Yft, align 4 | |
%load_Ym19 = load float, float* %Ym, align 4 | |
%tmpVar20 = fmul float %load_Ym19, 0x3FF17F70A0000000 | |
store float %tmpVar20, float* %Yyd, align 4 | |
%load_Ym21 = load float, float* %Ym, align 4 | |
%tmpVar22 = fmul float %load_Ym21, 0x3F445C7080000000 | |
store float %tmpVar22, float* %Ymile, align 4 | |
%load_Ym23 = load float, float* %Ym, align 4 | |
%tmpVar24 = fmul float %load_Ym23, 0x3F41B17C60000000 | |
store float %tmpVar24, float* %Ysm, align 4 | |
%load_Ym25 = load float, float* %Ym, align 4 | |
%tmpVar26 = fmul float %load_Ym25, 0x3FE17EF340000000 | |
store float %tmpVar26, float* %Yfm, align 4 | |
ret void | |
} | |
define i16 @MS_TO_BFT(%MS_TO_BFT_interface* %0) { | |
entry: | |
%MS = getelementptr inbounds %MS_TO_BFT_interface, %MS_TO_BFT_interface* %0, i32 0, i32 0 | |
%MS_TO_BFT = alloca i16, align 2 | |
store i16 0, i16* %MS_TO_BFT, align 2 | |
%REAL_TO_INT_instance = alloca %REAL_TO_INT_interface, align 8 | |
%1 = getelementptr inbounds %REAL_TO_INT_interface, %REAL_TO_INT_interface* %REAL_TO_INT_instance, i32 0, i32 0 | |
%EXPT_instance = alloca %EXPT_interface, align 8 | |
%2 = getelementptr inbounds %EXPT_interface, %EXPT_interface* %EXPT_instance, i32 0, i32 0 | |
%load_MS = load float, float* %MS, align 4 | |
%tmpVar = fmul float %load_MS, 0x3FF3238540000000 | |
%3 = fptosi float %tmpVar to i32 | |
store i32 %3, i32* %2, align 4 | |
%4 = getelementptr inbounds %EXPT_interface, %EXPT_interface* %EXPT_instance, i32 0, i32 1 | |
store i32 0, i32* %4, align 4 | |
%call = call double @EXPT(%EXPT_interface* %EXPT_instance) | |
%5 = fptrunc double %call to float | |
store float %5, float* %1, align 4 | |
%call1 = call i16 @REAL_TO_INT(%REAL_TO_INT_interface* %REAL_TO_INT_instance) | |
store i16 %call1, i16* %MS_TO_BFT, align 2 | |
%MS_TO_BFT_ret = load i16, i16* %MS_TO_BFT, align 2 | |
ret i16 %MS_TO_BFT_ret | |
} | |
define float @MS_TO_KMH(%MS_TO_KMH_interface* %0) { | |
entry: | |
%ms = getelementptr inbounds %MS_TO_KMH_interface, %MS_TO_KMH_interface* %0, i32 0, i32 0 | |
%MS_TO_KMH = alloca float, align 4 | |
store float 0.000000e+00, float* %MS_TO_KMH, align 4 | |
%load_ms = load float, float* %ms, align 4 | |
%tmpVar = fmul float %load_ms, 0x400CCCCCC0000000 | |
store float %tmpVar, float* %MS_TO_KMH, align 4 | |
%MS_TO_KMH_ret = load float, float* %MS_TO_KMH, align 4 | |
ret float %MS_TO_KMH_ret | |
} | |
define float @OM_TO_F(%OM_TO_F_interface* %0) { | |
entry: | |
%OM = getelementptr inbounds %OM_TO_F_interface, %OM_TO_F_interface* %0, i32 0, i32 0 | |
%OM_TO_F = alloca float, align 4 | |
store float 0.000000e+00, float* %OM_TO_F, align 4 | |
%load_OM = load float, float* %OM, align 4 | |
%load_ = load float, float* getelementptr inbounds (%CONSTANTS_MATH, %CONSTANTS_MATH* @MATH, i32 0, i32 1), align 4 | |
%tmpVar = fdiv float %load_OM, %load_ | |
store float %tmpVar, float* %OM_TO_F, align 4 | |
%OM_TO_F_ret = load float, float* %OM_TO_F, align 4 | |
ret float %OM_TO_F_ret | |
} | |
define void @PRESSURE(%PRESSURE_interface* %0) { | |
entry: | |
%mws = getelementptr inbounds %PRESSURE_interface, %PRESSURE_interface* %0, i32 0, i32 0 | |
%torr = getelementptr inbounds %PRESSURE_interface, %PRESSURE_interface* %0, i32 0, i32 1 | |
%att = getelementptr inbounds %PRESSURE_interface, %PRESSURE_interface* %0, i32 0, i32 2 | |
%atm = getelementptr inbounds %PRESSURE_interface, %PRESSURE_interface* %0, i32 0, i32 3 | |
%pa = getelementptr inbounds %PRESSURE_interface, %PRESSURE_interface* %0, i32 0, i32 4 | |
%bar = getelementptr inbounds %PRESSURE_interface, %PRESSURE_interface* %0, i32 0, i32 5 | |
%Ymws = getelementptr inbounds %PRESSURE_interface, %PRESSURE_interface* %0, i32 0, i32 6 | |
%Ytorr = getelementptr inbounds %PRESSURE_interface, %PRESSURE_interface* %0, i32 0, i32 7 | |
%Yatt = getelementptr inbounds %PRESSURE_interface, %PRESSURE_interface* %0, i32 0, i32 8 | |
%Yatm = getelementptr inbounds %PRESSURE_interface, %PRESSURE_interface* %0, i32 0, i32 9 | |
%Ypa = getelementptr inbounds %PRESSURE_interface, %PRESSURE_interface* %0, i32 0, i32 10 | |
%Ybar = getelementptr inbounds %PRESSURE_interface, %PRESSURE_interface* %0, i32 0, i32 11 | |
%load_bar = load float, float* %bar, align 4 | |
%load_pa = load float, float* %pa, align 4 | |
%tmpVar = fmul float %load_pa, 0x3EE4F8B580000000 | |
%tmpVar1 = fadd float %load_bar, %tmpVar | |
%load_att = load float, float* %att, align 4 | |
%tmpVar2 = fmul float 0x3FEF619BA0000000, %load_att | |
%tmpVar3 = fadd float %tmpVar1, %tmpVar2 | |
%load_atm = load float, float* %atm, align 4 | |
%tmpVar4 = fmul float 0x3FF03645A0000000, %load_atm | |
%tmpVar5 = fadd float %tmpVar3, %tmpVar4 | |
%load_torr = load float, float* %torr, align 4 | |
%tmpVar6 = fmul float 0x3F55D7F260000000, %load_torr | |
%tmpVar7 = fadd float %tmpVar5, %tmpVar6 | |
%load_mws = load float, float* %mws, align 4 | |
%tmpVar8 = fmul float 0x3FB91AE2E0000000, %load_mws | |
%tmpVar9 = fadd float %tmpVar7, %tmpVar8 | |
store float %tmpVar9, float* %Ybar, align 4 | |
%load_ybar = load float, float* %Ybar, align 4 | |
%tmpVar10 = fmul float %load_ybar, 0x402464F260000000 | |
store float %tmpVar10, float* %Ymws, align 4 | |
%load_ybar11 = load float, float* %Ybar, align 4 | |
%tmpVar12 = fmul float %load_ybar11, 0x4087707E00000000 | |
store float %tmpVar12, float* %Ytorr, align 4 | |
%load_ybar13 = load float, float* %Ybar, align 4 | |
%tmpVar14 = fmul float %load_ybar13, 0x3FF050C200000000 | |
store float %tmpVar14, float* %Yatt, align 4 | |
%load_ybar15 = load float, float* %Ybar, align 4 | |
%tmpVar16 = fmul float %load_ybar15, 0x3FEF94E020000000 | |
store float %tmpVar16, float* %Yatm, align 4 | |
%load_ybar17 = load float, float* %Ybar, align 4 | |
%tmpVar18 = fmul float %load_ybar17, 1.000000e+05 | |
store float %tmpVar18, float* %Ypa, align 4 | |
ret void | |
} | |
define float @PT_TO_F(%PT_TO_F_interface* %0) { | |
entry: | |
%PT = getelementptr inbounds %PT_TO_F_interface, %PT_TO_F_interface* %0, i32 0, i32 0 | |
%PT_TO_F = alloca float, align 4 | |
store float 0.000000e+00, float* %PT_TO_F, align 4 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%TIME_TO_DWORD_instance = alloca %TIME_TO_DWORD_interface, align 8 | |
%2 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance, i32 0, i32 0 | |
%load_PT = load i64, i64* %PT, align 4 | |
store i64 %load_PT, i64* %2, align 4 | |
%call = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%tmpVar = fdiv float 1.000000e+03, %call1 | |
store float %tmpVar, float* %PT_TO_F, align 4 | |
%PT_TO_F_ret = load float, float* %PT_TO_F, align 4 | |
ret float %PT_TO_F_ret | |
} | |
define void @SPEED(%SPEED_interface* %0) { | |
entry: | |
%ms = getelementptr inbounds %SPEED_interface, %SPEED_interface* %0, i32 0, i32 0 | |
%kmh = getelementptr inbounds %SPEED_interface, %SPEED_interface* %0, i32 0, i32 1 | |
%kn = getelementptr inbounds %SPEED_interface, %SPEED_interface* %0, i32 0, i32 2 | |
%mh = getelementptr inbounds %SPEED_interface, %SPEED_interface* %0, i32 0, i32 3 | |
%Yms = getelementptr inbounds %SPEED_interface, %SPEED_interface* %0, i32 0, i32 4 | |
%Ykmh = getelementptr inbounds %SPEED_interface, %SPEED_interface* %0, i32 0, i32 5 | |
%Ykn = getelementptr inbounds %SPEED_interface, %SPEED_interface* %0, i32 0, i32 6 | |
%Ymh = getelementptr inbounds %SPEED_interface, %SPEED_interface* %0, i32 0, i32 7 | |
%load_ms = load float, float* %ms, align 4 | |
%load_kmh = load float, float* %kmh, align 4 | |
%tmpVar = fmul float %load_kmh, 0x3FD1C71C80000000 | |
%tmpVar1 = fadd float %load_ms, %tmpVar | |
%load_kn = load float, float* %kn, align 4 | |
%tmpVar2 = fmul float %load_kn, 0x3FE0765420000000 | |
%tmpVar3 = fadd float %tmpVar1, %tmpVar2 | |
%load_mh = load float, float* %mh, align 4 | |
%tmpVar4 = fmul float %load_mh, 0x3FDC9C4DA0000000 | |
%tmpVar5 = fadd float %tmpVar3, %tmpVar4 | |
store float %tmpVar5, float* %Yms, align 4 | |
%load_Yms = load float, float* %Yms, align 4 | |
%tmpVar6 = fmul float %load_Yms, 0x400CCCCCC0000000 | |
store float %tmpVar6, float* %Ykmh, align 4 | |
%load_Yms7 = load float, float* %Yms, align 4 | |
%tmpVar8 = fmul float %load_Yms7, 0x3FFF19FCE0000000 | |
store float %tmpVar8, float* %Ykn, align 4 | |
%load_Yms9 = load float, float* %Yms, align 4 | |
%tmpVar10 = fmul float %load_Yms9, 0x4001E53EE0000000 | |
store float %tmpVar10, float* %Ymh, align 4 | |
ret void | |
} | |
define void @TEMPERATURE(%TEMPERATURE_interface* %0) { | |
entry: | |
%K = getelementptr inbounds %TEMPERATURE_interface, %TEMPERATURE_interface* %0, i32 0, i32 0 | |
%C = getelementptr inbounds %TEMPERATURE_interface, %TEMPERATURE_interface* %0, i32 0, i32 1 | |
%F = getelementptr inbounds %TEMPERATURE_interface, %TEMPERATURE_interface* %0, i32 0, i32 2 | |
%Re = getelementptr inbounds %TEMPERATURE_interface, %TEMPERATURE_interface* %0, i32 0, i32 3 | |
%Ra = getelementptr inbounds %TEMPERATURE_interface, %TEMPERATURE_interface* %0, i32 0, i32 4 | |
%YK = getelementptr inbounds %TEMPERATURE_interface, %TEMPERATURE_interface* %0, i32 0, i32 5 | |
%YC = getelementptr inbounds %TEMPERATURE_interface, %TEMPERATURE_interface* %0, i32 0, i32 6 | |
%YF = getelementptr inbounds %TEMPERATURE_interface, %TEMPERATURE_interface* %0, i32 0, i32 7 | |
%YRe = getelementptr inbounds %TEMPERATURE_interface, %TEMPERATURE_interface* %0, i32 0, i32 8 | |
%YRa = getelementptr inbounds %TEMPERATURE_interface, %TEMPERATURE_interface* %0, i32 0, i32 9 | |
%load_K = load float, float* %K, align 4 | |
%load_C = load float, float* %C, align 4 | |
%tmpVar = fadd float %load_C, 0x4071126660000000 | |
%tmpVar1 = fadd float %load_K, %tmpVar | |
%load_F = load float, float* %F, align 4 | |
%tmpVar2 = fadd float %load_F, 0x407CBAB860000000 | |
%tmpVar3 = fmul float %tmpVar2, 0x3FE1C71C80000000 | |
%tmpVar4 = fadd float %tmpVar1, %tmpVar3 | |
%load_Re = load float, float* %Re, align 4 | |
%tmpVar5 = fmul float %load_Re, 1.250000e+00 | |
%tmpVar6 = fadd float %tmpVar5, 0x4071126660000000 | |
%tmpVar7 = fadd float %tmpVar4, %tmpVar6 | |
%load_Ra = load float, float* %Ra, align 4 | |
%tmpVar8 = fmul float %load_Ra, 0x3FE1C71C80000000 | |
%tmpVar9 = fadd float %tmpVar7, %tmpVar8 | |
store float %tmpVar9, float* %YK, align 4 | |
%load_YK = load float, float* %YK, align 4 | |
%tmpVar10 = fsub float %load_YK, 0x4071126660000000 | |
store float %tmpVar10, float* %YC, align 4 | |
%load_YK11 = load float, float* %YK, align 4 | |
%tmpVar12 = fmul float %load_YK11, 0x3FFCCCCCC0000000 | |
%tmpVar13 = fsub float %tmpVar12, 0x407CBAB860000000 | |
store float %tmpVar13, float* %YF, align 4 | |
%load_YK14 = load float, float* %YK, align 4 | |
%tmpVar15 = fsub float %load_YK14, 0x4071126660000000 | |
%tmpVar16 = fmul float %tmpVar15, 0x3FE99999A0000000 | |
store float %tmpVar16, float* %YRe, align 4 | |
%load_YK17 = load float, float* %YK, align 4 | |
%tmpVar18 = fmul float %load_YK17, 0x3FFCCCCCC0000000 | |
store float %tmpVar18, float* %YRa, align 4 | |
ret void | |
} | |
define void @ALARM_2(%ALARM_2_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %ALARM_2_interface, %ALARM_2_interface* %0, i32 0, i32 0 | |
%LO_1 = getelementptr inbounds %ALARM_2_interface, %ALARM_2_interface* %0, i32 0, i32 1 | |
%HI_1 = getelementptr inbounds %ALARM_2_interface, %ALARM_2_interface* %0, i32 0, i32 2 | |
%LO_2 = getelementptr inbounds %ALARM_2_interface, %ALARM_2_interface* %0, i32 0, i32 3 | |
%HI_2 = getelementptr inbounds %ALARM_2_interface, %ALARM_2_interface* %0, i32 0, i32 4 | |
%HYS = getelementptr inbounds %ALARM_2_interface, %ALARM_2_interface* %0, i32 0, i32 5 | |
%Q1_LO = getelementptr inbounds %ALARM_2_interface, %ALARM_2_interface* %0, i32 0, i32 6 | |
%Q1_HI = getelementptr inbounds %ALARM_2_interface, %ALARM_2_interface* %0, i32 0, i32 7 | |
%Q2_LO = getelementptr inbounds %ALARM_2_interface, %ALARM_2_interface* %0, i32 0, i32 8 | |
%Q2_HI = getelementptr inbounds %ALARM_2_interface, %ALARM_2_interface* %0, i32 0, i32 9 | |
%tmp = getelementptr inbounds %ALARM_2_interface, %ALARM_2_interface* %0, i32 0, i32 10 | |
%load_X = load float, float* %X, align 4 | |
%load_Hys = load float, float* %HYS, align 4 | |
%tmpVar = fmul float %load_Hys, 5.000000e-01 | |
%tmpVar1 = fsub float %load_X, %tmpVar | |
store float %tmpVar1, float* %tmp, align 4 | |
%load_tmp = load float, float* %tmp, align 4 | |
%load_LO_1 = load float, float* %LO_1, align 4 | |
%tmpVar2 = fcmp ogt float %load_tmp, %load_LO_1 | |
br i1 %tmpVar2, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
store i8 0, i8* %Q1_LO, align 1 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%load_tmp4 = load float, float* %tmp, align 4 | |
%load_LO_2 = load float, float* %LO_2, align 4 | |
%tmpVar5 = fcmp ogt float %load_tmp4, %load_LO_2 | |
br i1 %tmpVar5, label %condition_body6, label %continue3 | |
condition_body6: ; preds = %continue | |
store i8 0, i8* %Q2_LO, align 1 | |
br label %continue3 | |
continue3: ; preds = %condition_body6, %continue | |
%load_tmp8 = load float, float* %tmp, align 4 | |
%load_HI_1 = load float, float* %HI_1, align 4 | |
%tmpVar9 = fcmp ogt float %load_tmp8, %load_HI_1 | |
br i1 %tmpVar9, label %condition_body10, label %continue7 | |
condition_body10: ; preds = %continue3 | |
store i8 1, i8* %Q1_HI, align 1 | |
br label %continue7 | |
continue7: ; preds = %condition_body10, %continue3 | |
%load_tmp12 = load float, float* %tmp, align 4 | |
%load_HI_2 = load float, float* %HI_2, align 4 | |
%tmpVar13 = fcmp ogt float %load_tmp12, %load_HI_2 | |
br i1 %tmpVar13, label %condition_body14, label %continue11 | |
condition_body14: ; preds = %continue7 | |
store i8 1, i8* %Q2_HI, align 1 | |
br label %continue11 | |
continue11: ; preds = %condition_body14, %continue7 | |
%load_tmp15 = load float, float* %tmp, align 4 | |
%load_hys = load float, float* %HYS, align 4 | |
%tmpVar16 = fadd float %load_tmp15, %load_hys | |
store float %tmpVar16, float* %tmp, align 4 | |
%load_tmp18 = load float, float* %tmp, align 4 | |
%load_LO_119 = load float, float* %LO_1, align 4 | |
%tmpVar20 = fcmp olt float %load_tmp18, %load_LO_119 | |
br i1 %tmpVar20, label %condition_body21, label %continue17 | |
condition_body21: ; preds = %continue11 | |
store i8 1, i8* %Q1_LO, align 1 | |
br label %continue17 | |
continue17: ; preds = %condition_body21, %continue11 | |
%load_tmp23 = load float, float* %tmp, align 4 | |
%load_LO_224 = load float, float* %LO_2, align 4 | |
%tmpVar25 = fcmp olt float %load_tmp23, %load_LO_224 | |
br i1 %tmpVar25, label %condition_body26, label %continue22 | |
condition_body26: ; preds = %continue17 | |
store i8 1, i8* %Q2_LO, align 1 | |
br label %continue22 | |
continue22: ; preds = %condition_body26, %continue17 | |
%load_tmp28 = load float, float* %tmp, align 4 | |
%load_HI_129 = load float, float* %HI_1, align 4 | |
%tmpVar30 = fcmp olt float %load_tmp28, %load_HI_129 | |
br i1 %tmpVar30, label %condition_body31, label %continue27 | |
condition_body31: ; preds = %continue22 | |
store i8 0, i8* %Q1_HI, align 1 | |
br label %continue27 | |
continue27: ; preds = %condition_body31, %continue22 | |
%load_tmp33 = load float, float* %tmp, align 4 | |
%load_HI_234 = load float, float* %HI_2, align 4 | |
%tmpVar35 = fcmp olt float %load_tmp33, %load_HI_234 | |
br i1 %tmpVar35, label %condition_body36, label %continue32 | |
condition_body36: ; preds = %continue27 | |
store i8 0, i8* %Q2_HI, align 1 | |
br label %continue32 | |
continue32: ; preds = %condition_body36, %continue27 | |
ret void | |
} | |
define void @BAR_GRAPH(%BAR_GRAPH_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 0 | |
%rst = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 1 | |
%trigger_Low = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 2 | |
%trigger_High = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 3 | |
%Alarm_low = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 4 | |
%Alarm_high = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 5 | |
%log_scale = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 6 | |
%LOW = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 7 | |
%Q1 = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 8 | |
%Q2 = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 9 | |
%Q3 = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 10 | |
%Q4 = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 11 | |
%Q5 = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 12 | |
%Q6 = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 13 | |
%HIGH = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 14 | |
%Alarm = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 15 | |
%Status = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 16 | |
%init = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 17 | |
%T1 = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 18 | |
%T2 = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 19 | |
%T3 = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 20 | |
%T4 = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 21 | |
%T5 = getelementptr inbounds %BAR_GRAPH_interface, %BAR_GRAPH_interface* %0, i32 0, i32 22 | |
%temp = alloca float, align 4 | |
store float 0.000000e+00, float* %temp, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
store i8 1, i8* %init, align 1 | |
%load_log_scale = load i8, i8* %log_scale, align 1 | |
%2 = icmp ne i8 %load_log_scale, 0 | |
br i1 %2, label %condition_body2, label %else | |
continue: ; preds = %continue1, %entry | |
store i8 0, i8* %Q1, align 1 | |
store i8 0, i8* %Q2, align 1 | |
store i8 0, i8* %Q3, align 1 | |
store i8 0, i8* %Q4, align 1 | |
store i8 0, i8* %Q5, align 1 | |
store i8 0, i8* %Q6, align 1 | |
store i8 110, i8* %Status, align 1 | |
%load_alarm_low = load i8, i8* %Alarm_low, align 1 | |
%3 = icmp ne i8 %load_alarm_low, 0 | |
%tmpVar34 = xor i1 %3, true | |
br i1 %tmpVar34, label %condition_body35, label %continue33 | |
condition_body2: ; preds = %condition_body | |
%EXP_instance = alloca %EXP_interface, align 8 | |
%4 = getelementptr inbounds %EXP_interface, %EXP_interface* %EXP_instance, i32 0, i32 0 | |
%LN_instance = alloca %LN_interface, align 8 | |
%5 = getelementptr inbounds %LN_interface, %LN_interface* %LN_instance, i32 0, i32 0 | |
%load_Trigger_high = load float, float* %trigger_High, align 4 | |
%load_Trigger_low = load float, float* %trigger_Low, align 4 | |
%tmpVar3 = fdiv float %load_Trigger_high, %load_Trigger_low | |
%6 = fptosi float %tmpVar3 to i32 | |
store i32 %6, i32* %5, align 4 | |
%call = call double @LN(%LN_interface* %LN_instance) | |
%tmpVar4 = fmul double %call, 0x3FC5555555555555 | |
%7 = fptosi double %tmpVar4 to i32 | |
store i32 %7, i32* %4, align 4 | |
%call5 = call double @EXP(%EXP_interface* %EXP_instance) | |
%8 = fptrunc double %call5 to float | |
store float %8, float* %temp, align 4 | |
%load_trigger_low = load float, float* %trigger_Low, align 4 | |
%load_temp = load float, float* %temp, align 4 | |
%tmpVar6 = fmul float %load_trigger_low, %load_temp | |
store float %tmpVar6, float* %T1, align 4 | |
%load_T1 = load float, float* %T1, align 4 | |
%load_temp7 = load float, float* %temp, align 4 | |
%tmpVar8 = fmul float %load_T1, %load_temp7 | |
store float %tmpVar8, float* %T2, align 4 | |
%load_T2 = load float, float* %T2, align 4 | |
%load_temp9 = load float, float* %temp, align 4 | |
%tmpVar10 = fmul float %load_T2, %load_temp9 | |
store float %tmpVar10, float* %T3, align 4 | |
%load_T3 = load float, float* %T3, align 4 | |
%load_temp11 = load float, float* %temp, align 4 | |
%tmpVar12 = fmul float %load_T3, %load_temp11 | |
store float %tmpVar12, float* %T4, align 4 | |
%load_T4 = load float, float* %T4, align 4 | |
%load_temp13 = load float, float* %temp, align 4 | |
%tmpVar14 = fmul float %load_T4, %load_temp13 | |
store float %tmpVar14, float* %T5, align 4 | |
br label %continue1 | |
else: ; preds = %condition_body | |
%load_trigger_high = load float, float* %trigger_High, align 4 | |
%load_trigger_low15 = load float, float* %trigger_Low, align 4 | |
%tmpVar16 = fsub float %load_trigger_high, %load_trigger_low15 | |
%tmpVar17 = fmul float %tmpVar16, 0x3FC24924A0000000 | |
store float %tmpVar17, float* %temp, align 4 | |
%load_trigger_low18 = load float, float* %trigger_Low, align 4 | |
%load_temp19 = load float, float* %temp, align 4 | |
%tmpVar20 = fadd float %load_trigger_low18, %load_temp19 | |
store float %tmpVar20, float* %T1, align 4 | |
%load_T121 = load float, float* %T1, align 4 | |
%load_temp22 = load float, float* %temp, align 4 | |
%tmpVar23 = fadd float %load_T121, %load_temp22 | |
store float %tmpVar23, float* %T2, align 4 | |
%load_T224 = load float, float* %T2, align 4 | |
%load_temp25 = load float, float* %temp, align 4 | |
%tmpVar26 = fadd float %load_T224, %load_temp25 | |
store float %tmpVar26, float* %T3, align 4 | |
%load_T327 = load float, float* %T3, align 4 | |
%load_temp28 = load float, float* %temp, align 4 | |
%tmpVar29 = fadd float %load_T327, %load_temp28 | |
store float %tmpVar29, float* %T4, align 4 | |
%load_T430 = load float, float* %T4, align 4 | |
%load_temp31 = load float, float* %temp, align 4 | |
%tmpVar32 = fadd float %load_T430, %load_temp31 | |
store float %tmpVar32, float* %T5, align 4 | |
br label %continue1 | |
continue1: ; preds = %else, %condition_body2 | |
br label %continue | |
condition_body35: ; preds = %continue | |
store i8 0, i8* %LOW, align 1 | |
br label %continue33 | |
continue33: ; preds = %condition_body35, %continue | |
%load_alarm_high = load i8, i8* %Alarm_high, align 1 | |
%9 = icmp ne i8 %load_alarm_high, 0 | |
%tmpVar37 = xor i1 %9, true | |
br i1 %tmpVar37, label %condition_body38, label %continue36 | |
condition_body38: ; preds = %continue33 | |
store i8 0, i8* %HIGH, align 1 | |
br label %continue36 | |
continue36: ; preds = %condition_body38, %continue33 | |
%load_rst = load i8, i8* %rst, align 1 | |
%10 = icmp ne i8 %load_rst, 0 | |
br i1 %10, label %condition_body40, label %continue39 | |
condition_body40: ; preds = %continue36 | |
store i8 0, i8* %Alarm, align 1 | |
store i8 0, i8* %LOW, align 1 | |
store i8 0, i8* %HIGH, align 1 | |
br label %continue39 | |
continue39: ; preds = %condition_body40, %continue36 | |
%load_X = load float, float* %X, align 4 | |
%load_trigger_low48 = load float, float* %trigger_Low, align 4 | |
%tmpVar49 = fcmp olt float %load_X, %load_trigger_low48 | |
br i1 %tmpVar49, label %condition_body50, label %branch | |
condition_body50: ; preds = %continue39 | |
store i8 1, i8* %LOW, align 1 | |
store i8 111, i8* %Status, align 1 | |
%load_alarm_low52 = load i8, i8* %Alarm_low, align 1 | |
%11 = icmp ne i8 %load_alarm_low52, 0 | |
br i1 %11, label %condition_body53, label %continue51 | |
branch: ; preds = %continue39 | |
%load_X54 = load float, float* %X, align 4 | |
%load_T155 = load float, float* %T1, align 4 | |
%tmpVar56 = fcmp olt float %load_X54, %load_T155 | |
br i1 %tmpVar56, label %condition_body57, label %branch41 | |
condition_body57: ; preds = %branch | |
store i8 1, i8* %Q1, align 1 | |
br label %continue47 | |
branch41: ; preds = %branch | |
%load_x = load float, float* %X, align 4 | |
%load_t2 = load float, float* %T2, align 4 | |
%tmpVar58 = fcmp olt float %load_x, %load_t2 | |
br i1 %tmpVar58, label %condition_body59, label %branch42 | |
condition_body59: ; preds = %branch41 | |
store i8 1, i8* %Q2, align 1 | |
br label %continue47 | |
branch42: ; preds = %branch41 | |
%load_x60 = load float, float* %X, align 4 | |
%load_t3 = load float, float* %T3, align 4 | |
%tmpVar61 = fcmp olt float %load_x60, %load_t3 | |
br i1 %tmpVar61, label %condition_body62, label %branch43 | |
condition_body62: ; preds = %branch42 | |
store i8 1, i8* %Q3, align 1 | |
br label %continue47 | |
branch43: ; preds = %branch42 | |
%load_x63 = load float, float* %X, align 4 | |
%load_T464 = load float, float* %T4, align 4 | |
%tmpVar65 = fcmp olt float %load_x63, %load_T464 | |
br i1 %tmpVar65, label %condition_body66, label %branch44 | |
condition_body66: ; preds = %branch43 | |
store i8 1, i8* %Q4, align 1 | |
br label %continue47 | |
branch44: ; preds = %branch43 | |
%load_x67 = load float, float* %X, align 4 | |
%load_T5 = load float, float* %T5, align 4 | |
%tmpVar68 = fcmp olt float %load_x67, %load_T5 | |
br i1 %tmpVar68, label %condition_body69, label %branch45 | |
condition_body69: ; preds = %branch44 | |
store i8 1, i8* %Q5, align 1 | |
br label %continue47 | |
branch45: ; preds = %branch44 | |
%load_x70 = load float, float* %X, align 4 | |
%load_trigger_high71 = load float, float* %trigger_High, align 4 | |
%tmpVar72 = fcmp olt float %load_x70, %load_trigger_high71 | |
br i1 %tmpVar72, label %condition_body73, label %else46 | |
condition_body73: ; preds = %branch45 | |
store i8 1, i8* %Q6, align 1 | |
br label %continue47 | |
else46: ; preds = %branch45 | |
store i8 1, i8* %HIGH, align 1 | |
store i8 112, i8* %Status, align 1 | |
%load_alarm_high75 = load i8, i8* %Alarm_high, align 1 | |
%12 = icmp ne i8 %load_alarm_high75, 0 | |
br i1 %12, label %condition_body76, label %continue74 | |
continue47: ; preds = %continue74, %condition_body73, %condition_body69, %condition_body66, %condition_body62, %condition_body59, %condition_body57, %continue51 | |
ret void | |
condition_body53: ; preds = %condition_body50 | |
store i8 1, i8* %Alarm, align 1 | |
store i8 1, i8* %Status, align 1 | |
br label %continue51 | |
continue51: ; preds = %condition_body53, %condition_body50 | |
br label %continue47 | |
condition_body76: ; preds = %else46 | |
store i8 1, i8* %Alarm, align 1 | |
store i8 2, i8* %Status, align 1 | |
br label %continue74 | |
continue74: ; preds = %condition_body76, %else46 | |
br label %continue47 | |
} | |
define void @CALIBRATE(%CALIBRATE_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %CALIBRATE_interface, %CALIBRATE_interface* %0, i32 0, i32 0 | |
%CO = getelementptr inbounds %CALIBRATE_interface, %CALIBRATE_interface* %0, i32 0, i32 1 | |
%CS = getelementptr inbounds %CALIBRATE_interface, %CALIBRATE_interface* %0, i32 0, i32 2 | |
%Y_Offset = getelementptr inbounds %CALIBRATE_interface, %CALIBRATE_interface* %0, i32 0, i32 3 | |
%Y_Scale = getelementptr inbounds %CALIBRATE_interface, %CALIBRATE_interface* %0, i32 0, i32 4 | |
%Y = getelementptr inbounds %CALIBRATE_interface, %CALIBRATE_interface* %0, i32 0, i32 5 | |
%offset = getelementptr inbounds %CALIBRATE_interface, %CALIBRATE_interface* %0, i32 0, i32 6 | |
%Scale = getelementptr inbounds %CALIBRATE_interface, %CALIBRATE_interface* %0, i32 0, i32 7 | |
%load_CO = load i8, i8* %CO, align 1 | |
%1 = icmp ne i8 %load_CO, 0 | |
br i1 %1, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%load_Y_Offset = load float, float* %Y_Offset, align 4 | |
%load_X = load float, float* %X, align 4 | |
%tmpVar = fsub float %load_Y_Offset, %load_X | |
store float %tmpVar, float* %offset, align 4 | |
br label %continue | |
branch: ; preds = %entry | |
%load_CS = load i8, i8* %CS, align 1 | |
%2 = icmp ne i8 %load_CS, 0 | |
br i1 %2, label %condition_body1, label %continue | |
condition_body1: ; preds = %branch | |
%load_Y_scale = load float, float* %Y_Scale, align 4 | |
%load_X2 = load float, float* %X, align 4 | |
%load_OFFSET = load float, float* %offset, align 4 | |
%tmpVar3 = fadd float %load_X2, %load_OFFSET | |
%tmpVar4 = fdiv float %load_Y_scale, %tmpVar3 | |
store float %tmpVar4, float* %Scale, align 4 | |
br label %continue | |
continue: ; preds = %condition_body1, %branch, %condition_body | |
%load_X5 = load float, float* %X, align 4 | |
%load_OFFSET6 = load float, float* %offset, align 4 | |
%tmpVar7 = fadd float %load_X5, %load_OFFSET6 | |
%load_SCALE = load float, float* %Scale, align 4 | |
%tmpVar8 = fmul float %tmpVar7, %load_SCALE | |
store float %tmpVar8, float* %Y, align 4 | |
ret void | |
} | |
define void @CYCLE_TIME(%CYCLE_TIME_interface* %0) { | |
entry: | |
%RST = getelementptr inbounds %CYCLE_TIME_interface, %CYCLE_TIME_interface* %0, i32 0, i32 0 | |
%ct_min = getelementptr inbounds %CYCLE_TIME_interface, %CYCLE_TIME_interface* %0, i32 0, i32 1 | |
%ct_max = getelementptr inbounds %CYCLE_TIME_interface, %CYCLE_TIME_interface* %0, i32 0, i32 2 | |
%ct_last = getelementptr inbounds %CYCLE_TIME_interface, %CYCLE_TIME_interface* %0, i32 0, i32 3 | |
%systime = getelementptr inbounds %CYCLE_TIME_interface, %CYCLE_TIME_interface* %0, i32 0, i32 4 | |
%sysdays = getelementptr inbounds %CYCLE_TIME_interface, %CYCLE_TIME_interface* %0, i32 0, i32 5 | |
%cycles = getelementptr inbounds %CYCLE_TIME_interface, %CYCLE_TIME_interface* %0, i32 0, i32 6 | |
%last_cycle = getelementptr inbounds %CYCLE_TIME_interface, %CYCLE_TIME_interface* %0, i32 0, i32 7 | |
%tx = getelementptr inbounds %CYCLE_TIME_interface, %CYCLE_TIME_interface* %0, i32 0, i32 8 | |
%init = getelementptr inbounds %CYCLE_TIME_interface, %CYCLE_TIME_interface* %0, i32 0, i32 9 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
%load_last_cycle = load i64, i64* %last_cycle, align 4 | |
%tmpVar = sub i64 %call1, %load_last_cycle | |
store i64 %tmpVar, i64* %tx, align 4 | |
%load_rst = load i8, i8* %RST, align 1 | |
%2 = icmp ne i8 %load_rst, 0 | |
br i1 %2, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
store i64 36000000000000, i64* %ct_min, align 4 | |
store i64 0, i64* %ct_max, align 4 | |
store i32 0, i32* %cycles, align 4 | |
br label %continue | |
branch: ; preds = %entry | |
%load_last_cycle3 = load i64, i64* %last_cycle, align 4 | |
%tmpVar4 = icmp sgt i64 %load_last_cycle3, 0 | |
br i1 %tmpVar4, label %condition_body5, label %branch2 | |
condition_body5: ; preds = %branch | |
%load_tx = load i64, i64* %tx, align 4 | |
%load_ct_min = load i64, i64* %ct_min, align 4 | |
%tmpVar8 = icmp slt i64 %load_tx, %load_ct_min | |
br i1 %tmpVar8, label %condition_body9, label %branch6 | |
branch2: ; preds = %branch | |
%load_ct_min16 = load i64, i64* %ct_min, align 4 | |
%tmpVar17 = icmp eq i64 %load_ct_min16, 0 | |
br i1 %tmpVar17, label %condition_body18, label %continue | |
condition_body18: ; preds = %branch2 | |
store i64 -1000000, i64* %ct_min, align 4 | |
br label %continue | |
continue: ; preds = %condition_body18, %branch2, %continue7, %condition_body | |
%load_init = load i8, i8* %init, align 1 | |
%3 = icmp ne i8 %load_init, 0 | |
br i1 %3, label %condition_body20, label %continue19 | |
condition_body9: ; preds = %condition_body5 | |
%load_tx10 = load i64, i64* %tx, align 4 | |
store i64 %load_tx10, i64* %ct_min, align 4 | |
br label %continue7 | |
branch6: ; preds = %condition_body5 | |
%load_tx11 = load i64, i64* %tx, align 4 | |
%load_ct_max = load i64, i64* %ct_max, align 4 | |
%tmpVar12 = icmp sgt i64 %load_tx11, %load_ct_max | |
br i1 %tmpVar12, label %condition_body13, label %continue7 | |
condition_body13: ; preds = %branch6 | |
%load_tx14 = load i64, i64* %tx, align 4 | |
store i64 %load_tx14, i64* %ct_max, align 4 | |
br label %continue7 | |
continue7: ; preds = %condition_body13, %branch6, %condition_body9 | |
%load_tx15 = load i64, i64* %tx, align 4 | |
store i64 %load_tx15, i64* %ct_last, align 4 | |
br label %continue | |
condition_body20: ; preds = %continue | |
%load_systime = load i64, i64* %systime, align 4 | |
%load_tx21 = load i64, i64* %tx, align 4 | |
%tmpVar22 = add i64 %load_systime, %load_tx21 | |
store i64 %tmpVar22, i64* %systime, align 4 | |
%load_systime24 = load i64, i64* %systime, align 4 | |
%tmpVar25 = icmp sge i64 %load_systime24, 86400000000000 | |
br i1 %tmpVar25, label %condition_body26, label %continue23 | |
continue19: ; preds = %continue23, %continue | |
store i8 1, i8* %init, align 1 | |
%load_last_cycle30 = load i64, i64* %last_cycle, align 4 | |
%load_tx31 = load i64, i64* %tx, align 4 | |
%tmpVar32 = add i64 %load_last_cycle30, %load_tx31 | |
store i64 %tmpVar32, i64* %last_cycle, align 4 | |
%load_cycles = load i32, i32* %cycles, align 4 | |
%tmpVar33 = add i32 %load_cycles, 1 | |
store i32 %tmpVar33, i32* %cycles, align 4 | |
ret void | |
condition_body26: ; preds = %condition_body20 | |
%load_systime27 = load i64, i64* %systime, align 4 | |
%tmpVar28 = sub i64 %load_systime27, 86400000000000 | |
store i64 %tmpVar28, i64* %systime, align 4 | |
%load_sysdays = load i16, i16* %sysdays, align 2 | |
%4 = sext i16 %load_sysdays to i32 | |
%tmpVar29 = add i32 %4, 1 | |
%5 = trunc i32 %tmpVar29 to i16 | |
store i16 %5, i16* %sysdays, align 2 | |
br label %continue23 | |
continue23: ; preds = %condition_body26, %condition_body20 | |
br label %continue19 | |
} | |
define void @DT_SIMU(%DT_SIMU_interface* %0) { | |
entry: | |
%START = getelementptr inbounds %DT_SIMU_interface, %DT_SIMU_interface* %0, i32 0, i32 0 | |
%SPEED = getelementptr inbounds %DT_SIMU_interface, %DT_SIMU_interface* %0, i32 0, i32 1 | |
%DTS = getelementptr inbounds %DT_SIMU_interface, %DT_SIMU_interface* %0, i32 0, i32 2 | |
%tc = getelementptr inbounds %DT_SIMU_interface, %DT_SIMU_interface* %0, i32 0, i32 3 | |
%init = getelementptr inbounds %DT_SIMU_interface, %DT_SIMU_interface* %0, i32 0, i32 4 | |
%last = getelementptr inbounds %DT_SIMU_interface, %DT_SIMU_interface* %0, i32 0, i32 5 | |
%tx = getelementptr inbounds %DT_SIMU_interface, %DT_SIMU_interface* %0, i32 0, i32 6 | |
%td = getelementptr inbounds %DT_SIMU_interface, %DT_SIMU_interface* %0, i32 0, i32 7 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %tx, align 4 | |
%REAL_TO_DWORD_instance = alloca %REAL_TO_DWORD_interface, align 8 | |
%1 = getelementptr inbounds %REAL_TO_DWORD_interface, %REAL_TO_DWORD_interface* %REAL_TO_DWORD_instance, i32 0, i32 0 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%2 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%load_tx = load i32, i32* %tx, align 4 | |
%load_last = load i32, i32* %last, align 4 | |
%tmpVar = sub i32 %load_tx, %load_last | |
store i32 %tmpVar, i32* %2, align 4 | |
%call1 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%load_speed = load float, float* %SPEED, align 4 | |
%tmpVar2 = fmul float %call1, %load_speed | |
store float %tmpVar2, float* %1, align 4 | |
%call3 = call i32 @REAL_TO_DWORD(%REAL_TO_DWORD_interface* %REAL_TO_DWORD_instance) | |
store i32 %call3, i32* %tc, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%3 = icmp ne i8 %load_init, 0 | |
%tmpVar5 = xor i1 %3, true | |
br i1 %tmpVar5, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
store i8 1, i8* %init, align 1 | |
%load_Start = load i64, i64* %START, align 4 | |
store i64 %load_Start, i64* %DTS, align 4 | |
store i32 0, i32* %tc, align 4 | |
%load_tx6 = load i32, i32* %tx, align 4 | |
store i32 %load_tx6, i32* %last, align 4 | |
br label %continue | |
branch: ; preds = %entry | |
%load_SPEED = load float, float* %SPEED, align 4 | |
%tmpVar7 = fcmp oeq float %load_SPEED, 0.000000e+00 | |
br i1 %tmpVar7, label %condition_body8, label %branch4 | |
condition_body8: ; preds = %branch | |
%DWORD_TO_DT_instance = alloca %DWORD_TO_DT_interface, align 8 | |
%4 = getelementptr inbounds %DWORD_TO_DT_interface, %DWORD_TO_DT_interface* %DWORD_TO_DT_instance, i32 0, i32 0 | |
%DT_TO_DWORD_instance = alloca %DT_TO_DWORD_interface, align 8 | |
%5 = getelementptr inbounds %DT_TO_DWORD_interface, %DT_TO_DWORD_interface* %DT_TO_DWORD_instance, i32 0, i32 0 | |
%load_DTS = load i64, i64* %DTS, align 4 | |
store i64 %load_DTS, i64* %5, align 4 | |
%call9 = call i32 @DT_TO_DWORD(%DT_TO_DWORD_interface* %DT_TO_DWORD_instance) | |
%tmpVar10 = add i32 %call9, 1 | |
store i32 %tmpVar10, i32* %4, align 4 | |
%call11 = call i64 @DWORD_TO_DT(%DWORD_TO_DT_interface* %DWORD_TO_DT_instance) | |
store i64 %call11, i64* %DTS, align 4 | |
br label %continue | |
branch4: ; preds = %branch | |
%load_tc = load i32, i32* %tc, align 4 | |
%tmpVar12 = icmp sge i32 %load_tc, 1000 | |
br i1 %tmpVar12, label %condition_body13, label %continue | |
condition_body13: ; preds = %branch4 | |
%load_tc14 = load i32, i32* %tc, align 4 | |
%tmpVar15 = sdiv i32 %load_tc14, 1000 | |
%tmpVar16 = mul i32 %tmpVar15, 1000 | |
store i32 %tmpVar16, i32* %td, align 4 | |
%load_DTS17 = load i64, i64* %DTS, align 4 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%6 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%load_td = load i32, i32* %td, align 4 | |
store i32 %load_td, i32* %6, align 4 | |
%call18 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
%tmpVar19 = add i64 %load_DTS17, %call18 | |
store i64 %tmpVar19, i64* %DTS, align 4 | |
%load_last20 = load i32, i32* %last, align 4 | |
%REAL_TO_DWORD_instance21 = alloca %REAL_TO_DWORD_interface, align 8 | |
%7 = getelementptr inbounds %REAL_TO_DWORD_interface, %REAL_TO_DWORD_interface* %REAL_TO_DWORD_instance21, i32 0, i32 0 | |
%DWORD_TO_REAL_instance22 = alloca %DWORD_TO_REAL_interface, align 8 | |
%8 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance22, i32 0, i32 0 | |
%load_td23 = load i32, i32* %td, align 4 | |
store i32 %load_td23, i32* %8, align 4 | |
%call24 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance22) | |
%load_speed25 = load float, float* %SPEED, align 4 | |
%tmpVar26 = fdiv float %call24, %load_speed25 | |
store float %tmpVar26, float* %7, align 4 | |
%call27 = call i32 @REAL_TO_DWORD(%REAL_TO_DWORD_interface* %REAL_TO_DWORD_instance21) | |
%tmpVar28 = add i32 %load_last20, %call27 | |
store i32 %tmpVar28, i32* %last, align 4 | |
br label %continue | |
continue: ; preds = %condition_body13, %branch4, %condition_body8, %condition_body | |
ret void | |
} | |
define void @FLOW_METER(%FLOW_METER_interface* %0) { | |
entry: | |
%VX = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 0 | |
%E = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 1 | |
%RST = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 2 | |
%PULSE_MODE = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 3 | |
%UPDATE_TIME = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 4 | |
%F = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 5 | |
%X = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 6 | |
%Y = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 7 | |
%tx = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 8 | |
%tl = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 9 | |
%int1 = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 10 | |
%init = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 11 | |
%e_last = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 12 | |
%tmp = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 13 | |
%x_last = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 14 | |
%y_last = getelementptr inbounds %FLOW_METER_interface, %FLOW_METER_interface* %0, i32 0, i32 15 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
store i8 1, i8* %init, align 1 | |
%load_tx = load i64, i64* %tx, align 4 | |
store i64 %load_tx, i64* %tl, align 4 | |
%deref = load float*, float** %X, align 8 | |
%load_X = load float, float* %deref, align 4 | |
store float %load_X, float* %x_last, align 4 | |
%deref1 = load i32*, i32** %Y, align 8 | |
%load_Y = load i32, i32* %deref1, align 4 | |
store i32 %load_Y, i32* %y_last, align 4 | |
%K = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %int1, i32 0, i32 2 | |
store float 0x3F32345680000000, float* %K, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%2 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %int1, i32 0, i32 0 | |
%load_RST = load i8, i8* %RST, align 1 | |
%3 = icmp ne i8 %load_RST, 0 | |
br i1 %3, label %6, label %4 | |
4: ; preds = %continue | |
%load_PULSE_MODE = load i8, i8* %PULSE_MODE, align 1 | |
%5 = icmp ne i8 %load_PULSE_MODE, 0 | |
br label %6 | |
6: ; preds = %4, %continue | |
%7 = phi i1 [ %3, %continue ], [ %5, %4 ] | |
%tmpVar2 = xor i1 %7, true | |
br i1 %tmpVar2, label %8, label %10 | |
8: ; preds = %6 | |
%load_E = load i8, i8* %E, align 1 | |
%9 = icmp ne i8 %load_E, 0 | |
br label %10 | |
10: ; preds = %8, %6 | |
%11 = phi i1 [ %tmpVar2, %6 ], [ %9, %8 ] | |
%12 = zext i1 %11 to i8 | |
store i8 %12, i8* %2, align 1 | |
%13 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %int1, i32 0, i32 1 | |
%load_VX = load float, float* %VX, align 4 | |
store float %load_VX, float* %13, align 4 | |
%14 = getelementptr inbounds %INTEGRATE_interface, %INTEGRATE_interface* %int1, i32 0, i32 3 | |
%deref3 = load float*, float** %X, align 8 | |
store float* %deref3, float** %14, align 8 | |
call void @INTEGRATE(%INTEGRATE_interface* %int1) | |
%load_RST5 = load i8, i8* %RST, align 1 | |
%15 = icmp ne i8 %load_RST5, 0 | |
br i1 %15, label %condition_body6, label %branch | |
condition_body6: ; preds = %10 | |
%deref7 = load float*, float** %X, align 8 | |
store float 0.000000e+00, float* %deref7, align 4 | |
%deref8 = load i32*, i32** %Y, align 8 | |
store i32 0, i32* %deref8, align 4 | |
%load_tx9 = load i64, i64* %tx, align 4 | |
store i64 %load_tx9, i64* %tl, align 4 | |
store float 0.000000e+00, float* %x_last, align 4 | |
store i32 0, i32* %y_last, align 4 | |
br label %continue4 | |
branch: ; preds = %10 | |
%load_E10 = load i8, i8* %E, align 1 | |
%16 = icmp ne i8 %load_E10, 0 | |
br i1 %16, label %18, label %20 | |
condition_body12: ; preds = %20 | |
%load_e_last = load i8, i8* %e_last, align 1 | |
%17 = icmp ne i8 %load_e_last, 0 | |
%tmpVar14 = xor i1 %17, true | |
br i1 %tmpVar14, label %condition_body15, label %continue13 | |
continue4: ; preds = %continue13, %20, %condition_body6 | |
%load_E21 = load i8, i8* %E, align 1 | |
store i8 %load_E21, i8* %e_last, align 1 | |
%deref23 = load float*, float** %X, align 8 | |
%load_X24 = load float, float* %deref23, align 4 | |
%tmpVar25 = fcmp ogt float %load_X24, 1.000000e+00 | |
br i1 %tmpVar25, label %condition_body26, label %continue22 | |
18: ; preds = %branch | |
%load_PULSE_MODE11 = load i8, i8* %PULSE_MODE, align 1 | |
%19 = icmp ne i8 %load_PULSE_MODE11, 0 | |
br label %20 | |
20: ; preds = %18, %branch | |
%21 = phi i1 [ %16, %branch ], [ %19, %18 ] | |
br i1 %21, label %condition_body12, label %continue4 | |
condition_body15: ; preds = %condition_body12 | |
%deref16 = load float*, float** %X, align 8 | |
%deref17 = load float*, float** %X, align 8 | |
%load_X18 = load float, float* %deref17, align 4 | |
%load_VX19 = load float, float* %VX, align 4 | |
%tmpVar20 = fadd float %load_X18, %load_VX19 | |
store float %tmpVar20, float* %deref16, align 4 | |
br label %continue13 | |
continue13: ; preds = %condition_body15, %condition_body12 | |
br label %continue4 | |
condition_body26: ; preds = %continue4 | |
%FLOOR_instance = alloca %FLOOR_interface, align 8 | |
%22 = getelementptr inbounds %FLOOR_interface, %FLOOR_interface* %FLOOR_instance, i32 0, i32 0 | |
%deref27 = load float*, float** %X, align 8 | |
%load_X28 = load float, float* %deref27, align 4 | |
store float %load_X28, float* %22, align 4 | |
%call = call i16 @FLOOR(%FLOOR_interface* %FLOOR_instance) | |
store i16 %call, i16* %tmp, align 2 | |
%deref29 = load i32*, i32** %Y, align 8 | |
%deref30 = load i32*, i32** %Y, align 8 | |
%load_Y31 = load i32, i32* %deref30, align 4 | |
%INT_TO_UDINT_instance = alloca %INT_TO_UDINT_interface, align 8 | |
%23 = getelementptr inbounds %INT_TO_UDINT_interface, %INT_TO_UDINT_interface* %INT_TO_UDINT_instance, i32 0, i32 0 | |
%load_tmp = load i16, i16* %tmp, align 2 | |
store i16 %load_tmp, i16* %23, align 2 | |
%call32 = call i32 @INT_TO_UDINT(%INT_TO_UDINT_interface* %INT_TO_UDINT_instance) | |
%tmpVar33 = add i32 %load_Y31, %call32 | |
store i32 %tmpVar33, i32* %deref29, align 4 | |
%deref34 = load float*, float** %X, align 8 | |
%deref35 = load float*, float** %X, align 8 | |
%load_X36 = load float, float* %deref35, align 4 | |
%INT_TO_REAL_instance = alloca %INT_TO_REAL_interface, align 8 | |
%24 = getelementptr inbounds %INT_TO_REAL_interface, %INT_TO_REAL_interface* %INT_TO_REAL_instance, i32 0, i32 0 | |
%load_tmp37 = load i16, i16* %tmp, align 2 | |
store i16 %load_tmp37, i16* %24, align 2 | |
%call38 = call float @INT_TO_REAL(%INT_TO_REAL_interface* %INT_TO_REAL_instance) | |
%tmpVar39 = fsub float %load_X36, %call38 | |
store float %tmpVar39, float* %deref34, align 4 | |
br label %continue22 | |
continue22: ; preds = %condition_body26, %continue4 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%25 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call40 = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call40, i32* %25, align 4 | |
%call41 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call41, i64* %tx, align 4 | |
%load_tx43 = load i64, i64* %tx, align 4 | |
%load_tl = load i64, i64* %tl, align 4 | |
%tmpVar44 = sub i64 %load_tx43, %load_tl | |
%load_UPDATE_TIME = load i64, i64* %UPDATE_TIME, align 4 | |
%tmpVar45 = icmp sge i64 %tmpVar44, %load_UPDATE_TIME | |
br i1 %tmpVar45, label %28, label %29 | |
condition_body48: ; preds = %29 | |
%UDINT_TO_REAL_instance = alloca %UDINT_TO_REAL_interface, align 8 | |
%26 = getelementptr inbounds %UDINT_TO_REAL_interface, %UDINT_TO_REAL_interface* %UDINT_TO_REAL_instance, i32 0, i32 0 | |
%deref49 = load i32*, i32** %Y, align 8 | |
%load_Y50 = load i32, i32* %deref49, align 4 | |
%load_y_last = load i32, i32* %y_last, align 4 | |
%tmpVar51 = sub i32 %load_Y50, %load_y_last | |
store i32 %tmpVar51, i32* %26, align 4 | |
%call52 = call float @UDINT_TO_REAL(%UDINT_TO_REAL_interface* %UDINT_TO_REAL_instance) | |
%deref53 = load float*, float** %X, align 8 | |
%load_X54 = load float, float* %deref53, align 4 | |
%tmpVar55 = fadd float %call52, %load_X54 | |
%load_x_last = load float, float* %x_last, align 4 | |
%tmpVar56 = fsub float %tmpVar55, %load_x_last | |
%TIME_TO_REAL_instance = alloca %TIME_TO_REAL_interface, align 8 | |
%27 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance, i32 0, i32 0 | |
%load_tx57 = load i64, i64* %tx, align 4 | |
%load_tl58 = load i64, i64* %tl, align 4 | |
%tmpVar59 = sub i64 %load_tx57, %load_tl58 | |
store i64 %tmpVar59, i64* %27, align 4 | |
%call60 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance) | |
%tmpVar61 = fdiv float %tmpVar56, %call60 | |
%tmpVar62 = fmul float %tmpVar61, 3.600000e+06 | |
store float %tmpVar62, float* %F, align 4 | |
%deref63 = load i32*, i32** %Y, align 8 | |
%load_Y64 = load i32, i32* %deref63, align 4 | |
store i32 %load_Y64, i32* %y_last, align 4 | |
%deref65 = load float*, float** %X, align 8 | |
%load_X66 = load float, float* %deref65, align 4 | |
store float %load_X66, float* %x_last, align 4 | |
%load_tx67 = load i64, i64* %tx, align 4 | |
store i64 %load_tx67, i64* %tl, align 4 | |
br label %continue42 | |
continue42: ; preds = %condition_body48, %29 | |
ret void | |
28: ; preds = %continue22 | |
%load_UPDATE_TIME46 = load i64, i64* %UPDATE_TIME, align 4 | |
%tmpVar47 = icmp sgt i64 %load_UPDATE_TIME46, 0 | |
br label %29 | |
29: ; preds = %28, %continue22 | |
%30 = phi i1 [ %tmpVar45, %continue22 ], [ %tmpVar47, %28 ] | |
br i1 %30, label %condition_body48, label %continue42 | |
} | |
define void @M_D(%M_D_interface* %0) { | |
entry: | |
%start = getelementptr inbounds %M_D_interface, %M_D_interface* %0, i32 0, i32 0 | |
%stop = getelementptr inbounds %M_D_interface, %M_D_interface* %0, i32 0, i32 1 | |
%tmax = getelementptr inbounds %M_D_interface, %M_D_interface* %0, i32 0, i32 2 | |
%rst = getelementptr inbounds %M_D_interface, %M_D_interface* %0, i32 0, i32 3 | |
%PT = getelementptr inbounds %M_D_interface, %M_D_interface* %0, i32 0, i32 4 | |
%ET = getelementptr inbounds %M_D_interface, %M_D_interface* %0, i32 0, i32 5 | |
%run = getelementptr inbounds %M_D_interface, %M_D_interface* %0, i32 0, i32 6 | |
%edge = getelementptr inbounds %M_D_interface, %M_D_interface* %0, i32 0, i32 7 | |
%T0 = getelementptr inbounds %M_D_interface, %M_D_interface* %0, i32 0, i32 8 | |
%tx = getelementptr inbounds %M_D_interface, %M_D_interface* %0, i32 0, i32 9 | |
%startup = getelementptr inbounds %M_D_interface, %M_D_interface* %0, i32 0, i32 10 | |
%load_rst = load i8, i8* %rst, align 1 | |
%1 = icmp ne i8 %load_rst, 0 | |
br i1 %1, label %4, label %3 | |
condition_body: ; preds = %4 | |
store i64 0, i64* %PT, align 4 | |
store i64 0, i64* %ET, align 4 | |
store i8 0, i8* %startup, align 1 | |
store i8 0, i8* %run, align 1 | |
br label %continue | |
continue: ; preds = %condition_body, %4 | |
%load_startup = load i8, i8* %startup, align 1 | |
%2 = icmp ne i8 %load_startup, 0 | |
%tmpVar2 = xor i1 %2, true | |
br i1 %tmpVar2, label %condition_body3, label %continue1 | |
3: ; preds = %entry | |
%load_et = load i64, i64* %ET, align 4 | |
%load_tmax = load i64, i64* %tmax, align 4 | |
%tmpVar = icmp sge i64 %load_et, %load_tmax | |
br label %4 | |
4: ; preds = %3, %entry | |
%5 = phi i1 [ %1, %entry ], [ %tmpVar, %3 ] | |
br i1 %5, label %condition_body, label %continue | |
condition_body3: ; preds = %continue | |
%load_start = load i8, i8* %start, align 1 | |
store i8 %load_start, i8* %edge, align 1 | |
store i8 1, i8* %startup, align 1 | |
br label %continue1 | |
continue1: ; preds = %condition_body3, %continue | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%6 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %6, align 4 | |
%call4 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call4, i64* %tx, align 4 | |
%load_start6 = load i8, i8* %start, align 1 | |
%7 = icmp ne i8 %load_start6, 0 | |
br i1 %7, label %10, label %12 | |
condition_body9: ; preds = %16 | |
%load_tx = load i64, i64* %tx, align 4 | |
store i64 %load_tx, i64* %T0, align 4 | |
store i8 1, i8* %run, align 1 | |
store i64 0, i64* %PT, align 4 | |
br label %continue5 | |
branch: ; preds = %16 | |
%load_stop10 = load i8, i8* %stop, align 1 | |
%8 = icmp ne i8 %load_stop10, 0 | |
br i1 %8, label %18, label %20 | |
condition_body11: ; preds = %20 | |
%load_et12 = load i64, i64* %ET, align 4 | |
store i64 %load_et12, i64* %PT, align 4 | |
store i8 0, i8* %run, align 1 | |
br label %continue5 | |
continue5: ; preds = %condition_body11, %20, %condition_body9 | |
%load_start13 = load i8, i8* %start, align 1 | |
store i8 %load_start13, i8* %edge, align 1 | |
%load_run15 = load i8, i8* %run, align 1 | |
%9 = icmp ne i8 %load_run15, 0 | |
br i1 %9, label %condition_body16, label %continue14 | |
10: ; preds = %continue1 | |
%load_edge = load i8, i8* %edge, align 1 | |
%11 = icmp ne i8 %load_edge, 0 | |
%tmpVar7 = xor i1 %11, true | |
br label %12 | |
12: ; preds = %10, %continue1 | |
%13 = phi i1 [ %7, %continue1 ], [ %tmpVar7, %10 ] | |
br i1 %13, label %14, label %16 | |
14: ; preds = %12 | |
%load_stop = load i8, i8* %stop, align 1 | |
%15 = icmp ne i8 %load_stop, 0 | |
%tmpVar8 = xor i1 %15, true | |
br label %16 | |
16: ; preds = %14, %12 | |
%17 = phi i1 [ %13, %12 ], [ %tmpVar8, %14 ] | |
br i1 %17, label %condition_body9, label %branch | |
18: ; preds = %branch | |
%load_run = load i8, i8* %run, align 1 | |
%19 = icmp ne i8 %load_run, 0 | |
br label %20 | |
20: ; preds = %18, %branch | |
%21 = phi i1 [ %8, %branch ], [ %19, %18 ] | |
br i1 %21, label %condition_body11, label %continue5 | |
condition_body16: ; preds = %continue5 | |
%load_tx17 = load i64, i64* %tx, align 4 | |
%load_t0 = load i64, i64* %T0, align 4 | |
%tmpVar18 = sub i64 %load_tx17, %load_t0 | |
store i64 %tmpVar18, i64* %ET, align 4 | |
br label %continue14 | |
continue14: ; preds = %condition_body16, %continue5 | |
ret void | |
} | |
define void @M_T(%M_T_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %M_T_interface, %M_T_interface* %0, i32 0, i32 0 | |
%TMAX = getelementptr inbounds %M_T_interface, %M_T_interface* %0, i32 0, i32 1 | |
%RST = getelementptr inbounds %M_T_interface, %M_T_interface* %0, i32 0, i32 2 | |
%PT = getelementptr inbounds %M_T_interface, %M_T_interface* %0, i32 0, i32 3 | |
%ET = getelementptr inbounds %M_T_interface, %M_T_interface* %0, i32 0, i32 4 | |
%edge = getelementptr inbounds %M_T_interface, %M_T_interface* %0, i32 0, i32 5 | |
%start = getelementptr inbounds %M_T_interface, %M_T_interface* %0, i32 0, i32 6 | |
%tx = getelementptr inbounds %M_T_interface, %M_T_interface* %0, i32 0, i32 7 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call1, i64* %tx, align 4 | |
%load_RST = load i8, i8* %RST, align 1 | |
%2 = icmp ne i8 %load_RST, 0 | |
br i1 %2, label %6, label %5 | |
condition_body: ; preds = %6 | |
store i64 0, i64* %PT, align 4 | |
store i64 0, i64* %ET, align 4 | |
br label %continue | |
branch: ; preds = %6 | |
%load_IN = load i8, i8* %IN, align 1 | |
%3 = icmp ne i8 %load_IN, 0 | |
br i1 %3, label %condition_body2, label %else | |
condition_body2: ; preds = %branch | |
%load_edge = load i8, i8* %edge, align 1 | |
%4 = icmp ne i8 %load_edge, 0 | |
%tmpVar4 = xor i1 %4, true | |
br i1 %tmpVar4, label %condition_body5, label %continue3 | |
else: ; preds = %branch | |
%load_ET8 = load i64, i64* %ET, align 4 | |
store i64 %load_ET8, i64* %PT, align 4 | |
br label %continue | |
continue: ; preds = %else, %continue3, %condition_body | |
%load_IN9 = load i8, i8* %IN, align 1 | |
store i8 %load_IN9, i8* %edge, align 1 | |
ret void | |
5: ; preds = %entry | |
%load_ET = load i64, i64* %ET, align 4 | |
%load_TMAX = load i64, i64* %TMAX, align 4 | |
%tmpVar = icmp sge i64 %load_ET, %load_TMAX | |
br label %6 | |
6: ; preds = %5, %entry | |
%7 = phi i1 [ %2, %entry ], [ %tmpVar, %5 ] | |
br i1 %7, label %condition_body, label %branch | |
condition_body5: ; preds = %condition_body2 | |
%load_tx = load i64, i64* %tx, align 4 | |
store i64 %load_tx, i64* %start, align 4 | |
br label %continue3 | |
continue3: ; preds = %condition_body5, %condition_body2 | |
%load_tx6 = load i64, i64* %tx, align 4 | |
%load_start = load i64, i64* %start, align 4 | |
%tmpVar7 = sub i64 %load_tx6, %load_start | |
store i64 %tmpVar7, i64* %ET, align 4 | |
br label %continue | |
} | |
define void @M_TX(%M_TX_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 0 | |
%tmax = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 1 | |
%rst = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 2 | |
%TH = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 3 | |
%TL = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 4 | |
%DC = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 5 | |
%F = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 6 | |
%ET = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 7 | |
%edge = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 8 | |
%start = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 9 | |
%stop = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 10 | |
%tx = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 11 | |
%rise = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 12 | |
%fall = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 13 | |
%startup = getelementptr inbounds %M_TX_interface, %M_TX_interface* %0, i32 0, i32 14 | |
%load_rst = load i8, i8* %rst, align 1 | |
%1 = icmp ne i8 %load_rst, 0 | |
br i1 %1, label %4, label %3 | |
condition_body: ; preds = %4 | |
store i8 0, i8* %rise, align 1 | |
store i8 0, i8* %fall, align 1 | |
store i8 0, i8* %startup, align 1 | |
store i64 0, i64* %TH, align 4 | |
store i64 0, i64* %TL, align 4 | |
store float 0.000000e+00, float* %DC, align 4 | |
store float 0.000000e+00, float* %F, align 4 | |
store i64 0, i64* %ET, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %4 | |
%load_startup = load i8, i8* %startup, align 1 | |
%2 = icmp ne i8 %load_startup, 0 | |
%tmpVar2 = xor i1 %2, true | |
br i1 %tmpVar2, label %condition_body3, label %continue1 | |
3: ; preds = %entry | |
%load_et = load i64, i64* %ET, align 4 | |
%load_tmax = load i64, i64* %tmax, align 4 | |
%tmpVar = icmp sge i64 %load_et, %load_tmax | |
br label %4 | |
4: ; preds = %3, %entry | |
%5 = phi i1 [ %1, %entry ], [ %tmpVar, %3 ] | |
br i1 %5, label %condition_body, label %continue | |
condition_body3: ; preds = %continue | |
%load_in = load i8, i8* %in, align 1 | |
store i8 %load_in, i8* %edge, align 1 | |
store i8 1, i8* %startup, align 1 | |
br label %continue1 | |
continue1: ; preds = %condition_body3, %continue | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%6 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %6, align 4 | |
%call4 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call4, i64* %tx, align 4 | |
%load_in6 = load i8, i8* %in, align 1 | |
%7 = icmp ne i8 %load_in6, 0 | |
%load_edge = load i8, i8* %edge, align 1 | |
%8 = icmp ne i8 %load_edge, 0 | |
%9 = xor i1 %7, %8 | |
br i1 %9, label %condition_body7, label %continue5 | |
condition_body7: ; preds = %continue1 | |
%load_in8 = load i8, i8* %in, align 1 | |
store i8 %load_in8, i8* %edge, align 1 | |
%load_in10 = load i8, i8* %in, align 1 | |
%10 = icmp ne i8 %load_in10, 0 | |
br i1 %10, label %condition_body11, label %else | |
continue5: ; preds = %continue9, %continue1 | |
%load_rise61 = load i8, i8* %rise, align 1 | |
%11 = icmp ne i8 %load_rise61, 0 | |
br i1 %11, label %condition_body62, label %continue60 | |
condition_body11: ; preds = %condition_body7 | |
%load_Tx = load i64, i64* %tx, align 4 | |
store i64 %load_Tx, i64* %start, align 4 | |
store i8 1, i8* %rise, align 1 | |
%load_fall = load i8, i8* %fall, align 1 | |
%12 = icmp ne i8 %load_fall, 0 | |
br i1 %12, label %condition_body13, label %continue12 | |
else: ; preds = %condition_body7 | |
%load_Tx33 = load i64, i64* %tx, align 4 | |
store i64 %load_Tx33, i64* %stop, align 4 | |
store i8 1, i8* %fall, align 1 | |
%load_rise = load i8, i8* %rise, align 1 | |
%13 = icmp ne i8 %load_rise, 0 | |
br i1 %13, label %condition_body35, label %continue34 | |
continue9: ; preds = %continue39, %continue15 | |
br label %continue5 | |
condition_body13: ; preds = %condition_body11 | |
%load_start = load i64, i64* %start, align 4 | |
%load_stop = load i64, i64* %stop, align 4 | |
%tmpVar14 = sub i64 %load_start, %load_stop | |
store i64 %tmpVar14, i64* %TL, align 4 | |
br label %continue12 | |
continue12: ; preds = %condition_body13, %condition_body11 | |
%load_th = load i64, i64* %TH, align 4 | |
%tmpVar16 = icmp sgt i64 %load_th, 0 | |
br i1 %tmpVar16, label %17, label %18 | |
condition_body18: ; preds = %18 | |
%TIME_TO_REAL_instance = alloca %TIME_TO_REAL_interface, align 8 | |
%14 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance, i32 0, i32 0 | |
%load_th19 = load i64, i64* %TH, align 4 | |
store i64 %load_th19, i64* %14, align 4 | |
%call20 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance) | |
%TIME_TO_REAL_instance21 = alloca %TIME_TO_REAL_interface, align 8 | |
%15 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance21, i32 0, i32 0 | |
%load_th22 = load i64, i64* %TH, align 4 | |
%load_tl23 = load i64, i64* %TL, align 4 | |
%tmpVar24 = add i64 %load_th22, %load_tl23 | |
store i64 %tmpVar24, i64* %15, align 4 | |
%call25 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance21) | |
%tmpVar26 = fdiv float %call20, %call25 | |
store float %tmpVar26, float* %DC, align 4 | |
%TIME_TO_REAL_instance27 = alloca %TIME_TO_REAL_interface, align 8 | |
%16 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance27, i32 0, i32 0 | |
%load_th28 = load i64, i64* %TH, align 4 | |
%load_tl29 = load i64, i64* %TL, align 4 | |
%tmpVar30 = add i64 %load_th28, %load_tl29 | |
store i64 %tmpVar30, i64* %16, align 4 | |
%call31 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance27) | |
%tmpVar32 = fdiv float 1.000000e+03, %call31 | |
store float %tmpVar32, float* %F, align 4 | |
br label %continue15 | |
continue15: ; preds = %condition_body18, %18 | |
br label %continue9 | |
17: ; preds = %continue12 | |
%load_tl = load i64, i64* %TL, align 4 | |
%tmpVar17 = icmp sgt i64 %load_tl, 0 | |
br label %18 | |
18: ; preds = %17, %continue12 | |
%19 = phi i1 [ %tmpVar16, %continue12 ], [ %tmpVar17, %17 ] | |
br i1 %19, label %condition_body18, label %continue15 | |
condition_body35: ; preds = %else | |
%load_stop36 = load i64, i64* %stop, align 4 | |
%load_start37 = load i64, i64* %start, align 4 | |
%tmpVar38 = sub i64 %load_stop36, %load_start37 | |
store i64 %tmpVar38, i64* %TH, align 4 | |
br label %continue34 | |
continue34: ; preds = %condition_body35, %else | |
%load_th40 = load i64, i64* %TH, align 4 | |
%tmpVar41 = icmp sgt i64 %load_th40, 0 | |
br i1 %tmpVar41, label %23, label %24 | |
condition_body44: ; preds = %24 | |
%TIME_TO_REAL_instance45 = alloca %TIME_TO_REAL_interface, align 8 | |
%20 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance45, i32 0, i32 0 | |
%load_th46 = load i64, i64* %TH, align 4 | |
store i64 %load_th46, i64* %20, align 4 | |
%call47 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance45) | |
%TIME_TO_REAL_instance48 = alloca %TIME_TO_REAL_interface, align 8 | |
%21 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance48, i32 0, i32 0 | |
%load_th49 = load i64, i64* %TH, align 4 | |
%load_tl50 = load i64, i64* %TL, align 4 | |
%tmpVar51 = add i64 %load_th49, %load_tl50 | |
store i64 %tmpVar51, i64* %21, align 4 | |
%call52 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance48) | |
%tmpVar53 = fdiv float %call47, %call52 | |
store float %tmpVar53, float* %DC, align 4 | |
%TIME_TO_REAL_instance54 = alloca %TIME_TO_REAL_interface, align 8 | |
%22 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance54, i32 0, i32 0 | |
%load_th55 = load i64, i64* %TH, align 4 | |
%load_tl56 = load i64, i64* %TL, align 4 | |
%tmpVar57 = add i64 %load_th55, %load_tl56 | |
store i64 %tmpVar57, i64* %22, align 4 | |
%call58 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance54) | |
%tmpVar59 = fdiv float 1.000000e+03, %call58 | |
store float %tmpVar59, float* %F, align 4 | |
br label %continue39 | |
continue39: ; preds = %condition_body44, %24 | |
br label %continue9 | |
23: ; preds = %continue34 | |
%load_tl42 = load i64, i64* %TL, align 4 | |
%tmpVar43 = icmp sgt i64 %load_tl42, 0 | |
br label %24 | |
24: ; preds = %23, %continue34 | |
%25 = phi i1 [ %tmpVar41, %continue34 ], [ %tmpVar43, %23 ] | |
br i1 %25, label %condition_body44, label %continue39 | |
condition_body62: ; preds = %continue5 | |
%load_tx = load i64, i64* %tx, align 4 | |
%load_start63 = load i64, i64* %start, align 4 | |
%tmpVar64 = sub i64 %load_tx, %load_start63 | |
store i64 %tmpVar64, i64* %ET, align 4 | |
br label %continue60 | |
continue60: ; preds = %condition_body62, %continue5 | |
ret void | |
} | |
define void @METER(%METER_interface* %0) { | |
entry: | |
%M1 = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 0 | |
%M2 = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 1 | |
%I1 = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 2 | |
%I2 = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 3 | |
%D = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 4 | |
%RST = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 5 | |
%MX = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 6 | |
%MR = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 7 | |
%MX1 = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 8 | |
%MX2 = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 9 | |
%tx = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 10 | |
%last = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 11 | |
%tc = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 12 | |
%init = getelementptr inbounds %METER_interface, %METER_interface* %0, i32 0, i32 13 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
store i8 1, i8* %init, align 1 | |
%load_tx = load i32, i32* %tx, align 4 | |
store i32 %load_tx, i32* %last, align 4 | |
%RX = getelementptr inbounds %REAL2, %REAL2* %MR, i32 0, i32 1 | |
%deref = load float*, float** %MX, align 8 | |
%load_mx = load float, float* %deref, align 4 | |
store float %load_mx, float* %RX, align 4 | |
%R1 = getelementptr inbounds %REAL2, %REAL2* %MR, i32 0, i32 0 | |
store float 0.000000e+00, float* %R1, align 4 | |
br label %continue | |
branch: ; preds = %entry | |
%load_tx1 = load i32, i32* %tx, align 4 | |
%load_last = load i32, i32* %last, align 4 | |
%tmpVar2 = icmp eq i32 %load_tx1, %load_last | |
br i1 %tmpVar2, label %condition_body3, label %else | |
condition_body3: ; preds = %branch | |
ret void | |
buffer_block: ; No predecessors! | |
br label %continue | |
else: ; preds = %branch | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%2 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%load_tx4 = load i32, i32* %tx, align 4 | |
%load_last5 = load i32, i32* %last, align 4 | |
%tmpVar6 = sub i32 %load_tx4, %load_last5 | |
store i32 %tmpVar6, i32* %2, align 4 | |
%call7 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%tmpVar8 = fmul float %call7, 0x3F50624DE0000000 | |
store float %tmpVar8, float* %tc, align 4 | |
br label %continue | |
continue: ; preds = %else, %buffer_block, %condition_body | |
%load_tx9 = load i32, i32* %tx, align 4 | |
store i32 %load_tx9, i32* %last, align 4 | |
%load_rst = load i8, i8* %RST, align 1 | |
%3 = icmp ne i8 %load_rst, 0 | |
br i1 %3, label %condition_body12, label %else10 | |
condition_body12: ; preds = %continue | |
%R113 = getelementptr inbounds %REAL2, %REAL2* %MR, i32 0, i32 0 | |
store float 0.000000e+00, float* %R113, align 4 | |
%RX14 = getelementptr inbounds %REAL2, %REAL2* %MR, i32 0, i32 1 | |
store float 0.000000e+00, float* %RX14, align 4 | |
br label %continue11 | |
else10: ; preds = %continue | |
%load_I1 = load i8, i8* %I1, align 1 | |
%4 = icmp ne i8 %load_I1, 0 | |
br i1 %4, label %condition_body17, label %else15 | |
continue11: ; preds = %continue19, %condition_body12 | |
ret void | |
condition_body17: ; preds = %else10 | |
%load_M1 = load float, float* %M1, align 4 | |
store float %load_M1, float* %MX1, align 4 | |
br label %continue16 | |
else15: ; preds = %else10 | |
store float 0.000000e+00, float* %MX1, align 4 | |
br label %continue16 | |
continue16: ; preds = %else15, %condition_body17 | |
%load_I2 = load i8, i8* %I2, align 1 | |
%5 = icmp ne i8 %load_I2, 0 | |
br i1 %5, label %condition_body20, label %else18 | |
condition_body20: ; preds = %continue16 | |
%load_M2 = load float, float* %M2, align 4 | |
store float %load_M2, float* %MX2, align 4 | |
br label %continue19 | |
else18: ; preds = %continue16 | |
store float 0.000000e+00, float* %MX2, align 4 | |
br label %continue19 | |
continue19: ; preds = %else18, %condition_body20 | |
%R2_ADD_instance = alloca %R2_ADD_interface, align 8 | |
%6 = getelementptr inbounds %R2_ADD_interface, %R2_ADD_interface* %R2_ADD_instance, i32 0, i32 0 | |
%load_MR = load %REAL2, %REAL2* %MR, align 4 | |
store %REAL2 %load_MR, %REAL2* %6, align 4 | |
%7 = getelementptr inbounds %R2_ADD_interface, %R2_ADD_interface* %R2_ADD_instance, i32 0, i32 1 | |
%SEL_instance = alloca %SEL_interface, align 8 | |
%8 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 0 | |
%load_I121 = load i8, i8* %I1, align 1 | |
store i8 %load_I121, i8* %8, align 1 | |
%9 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 1 | |
store i64 0, i64* %9, align 4 | |
%10 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 2 | |
%load_mx1 = load float, float* %MX1, align 4 | |
%11 = fptoui float %load_mx1 to i64 | |
store i64 %11, i64* %10, align 4 | |
%call22 = call i64 @SEL(%SEL_interface* %SEL_instance) | |
%SEL_instance23 = alloca %SEL_interface, align 8 | |
%12 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance23, i32 0, i32 0 | |
%load_I224 = load i8, i8* %I2, align 1 | |
store i8 %load_I224, i8* %12, align 1 | |
%13 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance23, i32 0, i32 1 | |
store i64 0, i64* %13, align 4 | |
%14 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance23, i32 0, i32 2 | |
%load_mx2 = load float, float* %MX2, align 4 | |
%15 = fptoui float %load_mx2 to i64 | |
store i64 %15, i64* %14, align 4 | |
%call25 = call i64 @SEL(%SEL_interface* %SEL_instance23) | |
%tmpVar26 = add i64 %call22, %call25 | |
%16 = uitofp i64 %tmpVar26 to double | |
%load_D = load float, float* %D, align 4 | |
%17 = fpext float %load_D to double | |
%tmpVar27 = fdiv double %16, %17 | |
%load_TC = load float, float* %tc, align 4 | |
%18 = fpext float %load_TC to double | |
%tmpVar28 = fmul double %tmpVar27, %18 | |
%19 = fptrunc double %tmpVar28 to float | |
store float %19, float* %7, align 4 | |
%call29 = call %REAL2 @R2_ADD(%R2_ADD_interface* %R2_ADD_instance) | |
store %REAL2 %call29, %REAL2* %MR, align 4 | |
%deref30 = load float*, float** %MX, align 8 | |
%RX31 = getelementptr inbounds %REAL2, %REAL2* %MR, i32 0, i32 1 | |
%load_ = load float, float* %RX31, align 4 | |
store float %load_, float* %deref30, align 4 | |
br label %continue11 | |
} | |
define void @METER_STAT(%METER_STAT_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 0 | |
%DI = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 1 | |
%RST = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 2 | |
%Last_Day = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 3 | |
%Current_Day = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 4 | |
%Last_Week = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 5 | |
%Current_Week = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 6 | |
%Last_Month = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 7 | |
%Current_Month = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 8 | |
%Last_Year = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 9 | |
%Current_Year = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 10 | |
%Year_Start = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 11 | |
%Month_Start = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 12 | |
%Week_Start = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 13 | |
%Day_Start = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 14 | |
%last_run = getelementptr inbounds %METER_STAT_interface, %METER_STAT_interface* %0, i32 0, i32 15 | |
%load_rst = load i8, i8* %RST, align 1 | |
%1 = icmp ne i8 %load_rst, 0 | |
br i1 %1, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%deref = load float*, float** %Last_Day, align 8 | |
store float 0.000000e+00, float* %deref, align 4 | |
%deref1 = load float*, float** %Current_Day, align 8 | |
store float 0.000000e+00, float* %deref1, align 4 | |
%load_IN = load float, float* %IN, align 4 | |
store float %load_IN, float* %Day_Start, align 4 | |
%deref2 = load float*, float** %Last_Week, align 8 | |
store float 0.000000e+00, float* %deref2, align 4 | |
%deref3 = load float*, float** %Current_Week, align 8 | |
store float 0.000000e+00, float* %deref3, align 4 | |
%load_in = load float, float* %IN, align 4 | |
store float %load_in, float* %Week_Start, align 4 | |
%deref4 = load float*, float** %Last_Month, align 8 | |
store float 0.000000e+00, float* %deref4, align 4 | |
%deref5 = load float*, float** %Current_Month, align 8 | |
store float 0.000000e+00, float* %deref5, align 4 | |
%load_in6 = load float, float* %IN, align 4 | |
store float %load_in6, float* %Month_Start, align 4 | |
%deref7 = load float*, float** %Last_Year, align 8 | |
store float 0.000000e+00, float* %deref7, align 4 | |
%deref8 = load float*, float** %Current_Year, align 8 | |
store float 0.000000e+00, float* %deref8, align 4 | |
%load_in9 = load float, float* %IN, align 4 | |
store float %load_in9, float* %Year_Start, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%deref10 = load float*, float** %Current_Day, align 8 | |
%load_IN11 = load float, float* %IN, align 4 | |
%load_Day_Start = load float, float* %Day_Start, align 4 | |
%tmpVar = fsub float %load_IN11, %load_Day_Start | |
store float %tmpVar, float* %deref10, align 4 | |
%deref12 = load float*, float** %Current_Week, align 8 | |
%load_In = load float, float* %IN, align 4 | |
%load_Week_Start = load float, float* %Week_Start, align 4 | |
%tmpVar13 = fsub float %load_In, %load_Week_Start | |
store float %tmpVar13, float* %deref12, align 4 | |
%deref14 = load float*, float** %Current_Month, align 8 | |
%load_IN15 = load float, float* %IN, align 4 | |
%load_Month_Start = load float, float* %Month_Start, align 4 | |
%tmpVar16 = fsub float %load_IN15, %load_Month_Start | |
store float %tmpVar16, float* %deref14, align 4 | |
%deref17 = load float*, float** %Current_Year, align 8 | |
%load_IN18 = load float, float* %IN, align 4 | |
%load_Year_Start = load float, float* %Year_Start, align 4 | |
%tmpVar19 = fsub float %load_IN18, %load_Year_Start | |
store float %tmpVar19, float* %deref17, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%YEAR_OF_DATE_instance = alloca %YEAR_OF_DATE_interface, align 8 | |
%2 = getelementptr inbounds %YEAR_OF_DATE_interface, %YEAR_OF_DATE_interface* %YEAR_OF_DATE_instance, i32 0, i32 0 | |
%load_DI = load i64, i64* %DI, align 4 | |
store i64 %load_DI, i64* %2, align 4 | |
%call = call i16 @YEAR_OF_DATE(%YEAR_OF_DATE_interface* %YEAR_OF_DATE_instance) | |
%3 = sext i16 %call to i32 | |
%YEAR_OF_DATE_instance22 = alloca %YEAR_OF_DATE_interface, align 8 | |
%4 = getelementptr inbounds %YEAR_OF_DATE_interface, %YEAR_OF_DATE_interface* %YEAR_OF_DATE_instance22, i32 0, i32 0 | |
%load_last_run = load i64, i64* %last_run, align 4 | |
store i64 %load_last_run, i64* %4, align 4 | |
%call23 = call i16 @YEAR_OF_DATE(%YEAR_OF_DATE_interface* %YEAR_OF_DATE_instance22) | |
%5 = sext i16 %call23 to i32 | |
%tmpVar24 = icmp sgt i32 %3, %5 | |
br i1 %tmpVar24, label %condition_body25, label %branch | |
condition_body25: ; preds = %continue | |
%deref26 = load float*, float** %Last_Year, align 8 | |
%deref27 = load float*, float** %Current_Year, align 8 | |
%load_current_year = load float, float* %deref27, align 4 | |
store float %load_current_year, float* %deref26, align 4 | |
%deref28 = load float*, float** %Current_Year, align 8 | |
store float 0.000000e+00, float* %deref28, align 4 | |
%load_in29 = load float, float* %IN, align 4 | |
store float %load_in29, float* %Year_Start, align 4 | |
%deref30 = load float*, float** %Last_Month, align 8 | |
%deref31 = load float*, float** %Current_Month, align 8 | |
%load_current_month = load float, float* %deref31, align 4 | |
store float %load_current_month, float* %deref30, align 4 | |
%deref32 = load float*, float** %Current_Month, align 8 | |
store float 0.000000e+00, float* %deref32, align 4 | |
%load_in33 = load float, float* %IN, align 4 | |
store float %load_in33, float* %Month_Start, align 4 | |
%deref34 = load float*, float** %Last_Day, align 8 | |
%deref35 = load float*, float** %Current_Day, align 8 | |
%load_current_day = load float, float* %deref35, align 4 | |
store float %load_current_day, float* %deref34, align 4 | |
%deref36 = load float*, float** %Current_Day, align 8 | |
store float 0.000000e+00, float* %deref36, align 4 | |
%load_in37 = load float, float* %IN, align 4 | |
store float %load_in37, float* %Day_Start, align 4 | |
br label %continue21 | |
branch: ; preds = %continue | |
%MONTH_OF_DATE_instance = alloca %MONTH_OF_DATE_interface, align 8 | |
%6 = getelementptr inbounds %MONTH_OF_DATE_interface, %MONTH_OF_DATE_interface* %MONTH_OF_DATE_instance, i32 0, i32 0 | |
%load_DI38 = load i64, i64* %DI, align 4 | |
store i64 %load_DI38, i64* %6, align 4 | |
%call39 = call i16 @MONTH_OF_DATE(%MONTH_OF_DATE_interface* %MONTH_OF_DATE_instance) | |
%7 = sext i16 %call39 to i32 | |
%MONTH_OF_DATE_instance40 = alloca %MONTH_OF_DATE_interface, align 8 | |
%8 = getelementptr inbounds %MONTH_OF_DATE_interface, %MONTH_OF_DATE_interface* %MONTH_OF_DATE_instance40, i32 0, i32 0 | |
%load_last_run41 = load i64, i64* %last_run, align 4 | |
store i64 %load_last_run41, i64* %8, align 4 | |
%call42 = call i16 @MONTH_OF_DATE(%MONTH_OF_DATE_interface* %MONTH_OF_DATE_instance40) | |
%9 = sext i16 %call42 to i32 | |
%tmpVar43 = icmp sgt i32 %7, %9 | |
br i1 %tmpVar43, label %condition_body44, label %branch20 | |
condition_body44: ; preds = %branch | |
%deref45 = load float*, float** %Last_Month, align 8 | |
%deref46 = load float*, float** %Current_Month, align 8 | |
%load_current_month47 = load float, float* %deref46, align 4 | |
store float %load_current_month47, float* %deref45, align 4 | |
%deref48 = load float*, float** %Current_Month, align 8 | |
store float 0.000000e+00, float* %deref48, align 4 | |
%load_in49 = load float, float* %IN, align 4 | |
store float %load_in49, float* %Month_Start, align 4 | |
%deref50 = load float*, float** %Last_Day, align 8 | |
%deref51 = load float*, float** %Current_Day, align 8 | |
%load_current_day52 = load float, float* %deref51, align 4 | |
store float %load_current_day52, float* %deref50, align 4 | |
%deref53 = load float*, float** %Current_Day, align 8 | |
store float 0.000000e+00, float* %deref53, align 4 | |
%load_in54 = load float, float* %IN, align 4 | |
store float %load_in54, float* %Day_Start, align 4 | |
br label %continue21 | |
branch20: ; preds = %branch | |
%DAY_OF_YEAR_instance = alloca %DAY_OF_YEAR_interface, align 8 | |
%10 = getelementptr inbounds %DAY_OF_YEAR_interface, %DAY_OF_YEAR_interface* %DAY_OF_YEAR_instance, i32 0, i32 0 | |
%load_di = load i64, i64* %DI, align 4 | |
store i64 %load_di, i64* %10, align 4 | |
%call55 = call i16 @DAY_OF_YEAR(%DAY_OF_YEAR_interface* %DAY_OF_YEAR_instance) | |
%11 = sext i16 %call55 to i32 | |
%DAY_OF_YEAR_instance56 = alloca %DAY_OF_YEAR_interface, align 8 | |
%12 = getelementptr inbounds %DAY_OF_YEAR_interface, %DAY_OF_YEAR_interface* %DAY_OF_YEAR_instance56, i32 0, i32 0 | |
%load_last_run57 = load i64, i64* %last_run, align 4 | |
store i64 %load_last_run57, i64* %12, align 4 | |
%call58 = call i16 @DAY_OF_YEAR(%DAY_OF_YEAR_interface* %DAY_OF_YEAR_instance56) | |
%13 = sext i16 %call58 to i32 | |
%tmpVar59 = icmp sgt i32 %11, %13 | |
br i1 %tmpVar59, label %condition_body60, label %continue21 | |
condition_body60: ; preds = %branch20 | |
%deref61 = load float*, float** %Last_Day, align 8 | |
%deref62 = load float*, float** %Current_Day, align 8 | |
%load_current_day63 = load float, float* %deref62, align 4 | |
store float %load_current_day63, float* %deref61, align 4 | |
%deref64 = load float*, float** %Current_Day, align 8 | |
store float 0.000000e+00, float* %deref64, align 4 | |
%load_in65 = load float, float* %IN, align 4 | |
store float %load_in65, float* %Day_Start, align 4 | |
br label %continue21 | |
continue21: ; preds = %condition_body60, %branch20, %condition_body44, %condition_body25 | |
%DAY_OF_WEEK_instance = alloca %DAY_OF_WEEK_interface, align 8 | |
%14 = getelementptr inbounds %DAY_OF_WEEK_interface, %DAY_OF_WEEK_interface* %DAY_OF_WEEK_instance, i32 0, i32 0 | |
%load_DI67 = load i64, i64* %DI, align 4 | |
store i64 %load_DI67, i64* %14, align 4 | |
%call68 = call i16 @DAY_OF_WEEK(%DAY_OF_WEEK_interface* %DAY_OF_WEEK_instance) | |
%15 = sext i16 %call68 to i32 | |
%DAY_OF_WEEK_instance69 = alloca %DAY_OF_WEEK_interface, align 8 | |
%16 = getelementptr inbounds %DAY_OF_WEEK_interface, %DAY_OF_WEEK_interface* %DAY_OF_WEEK_instance69, i32 0, i32 0 | |
%load_last_run70 = load i64, i64* %last_run, align 4 | |
store i64 %load_last_run70, i64* %16, align 4 | |
%call71 = call i16 @DAY_OF_WEEK(%DAY_OF_WEEK_interface* %DAY_OF_WEEK_instance69) | |
%17 = sext i16 %call71 to i32 | |
%tmpVar72 = icmp slt i32 %15, %17 | |
br i1 %tmpVar72, label %condition_body73, label %continue66 | |
condition_body73: ; preds = %continue21 | |
%deref74 = load float*, float** %Last_Week, align 8 | |
%deref75 = load float*, float** %Current_Week, align 8 | |
%load_current_week = load float, float* %deref75, align 4 | |
store float %load_current_week, float* %deref74, align 4 | |
%deref76 = load float*, float** %Current_Week, align 8 | |
store float 0.000000e+00, float* %deref76, align 4 | |
%load_in77 = load float, float* %IN, align 4 | |
store float %load_in77, float* %Week_Start, align 4 | |
br label %continue66 | |
continue66: ; preds = %condition_body73, %continue21 | |
%load_di78 = load i64, i64* %DI, align 4 | |
store i64 %load_di78, i64* %last_run, align 4 | |
ret void | |
} | |
define void @ONTIME(%ONTIME_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %ONTIME_interface, %ONTIME_interface* %0, i32 0, i32 0 | |
%RST = getelementptr inbounds %ONTIME_interface, %ONTIME_interface* %0, i32 0, i32 1 | |
%SECONDS = getelementptr inbounds %ONTIME_interface, %ONTIME_interface* %0, i32 0, i32 2 | |
%CYCLES = getelementptr inbounds %ONTIME_interface, %ONTIME_interface* %0, i32 0, i32 3 | |
%tx = getelementptr inbounds %ONTIME_interface, %ONTIME_interface* %0, i32 0, i32 4 | |
%last = getelementptr inbounds %ONTIME_interface, %ONTIME_interface* %0, i32 0, i32 5 | |
%edge = getelementptr inbounds %ONTIME_interface, %ONTIME_interface* %0, i32 0, i32 6 | |
%init = getelementptr inbounds %ONTIME_interface, %ONTIME_interface* %0, i32 0, i32 7 | |
%ms = getelementptr inbounds %ONTIME_interface, %ONTIME_interface* %0, i32 0, i32 8 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
store i8 1, i8* %init, align 1 | |
%load_tx = load i32, i32* %tx, align 4 | |
store i32 %load_tx, i32* %last, align 4 | |
store i32 0, i32* %ms, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%load_RST = load i8, i8* %RST, align 1 | |
%2 = icmp ne i8 %load_RST, 0 | |
br i1 %2, label %condition_body2, label %branch | |
condition_body2: ; preds = %continue | |
%deref = load i32*, i32** %SECONDS, align 8 | |
store i32 0, i32* %deref, align 4 | |
%deref3 = load i32*, i32** %CYCLES, align 8 | |
store i32 0, i32* %deref3, align 4 | |
%load_tx4 = load i32, i32* %tx, align 4 | |
store i32 %load_tx4, i32* %last, align 4 | |
store i32 0, i32* %ms, align 4 | |
br label %continue1 | |
branch: ; preds = %continue | |
%load_IN = load i8, i8* %IN, align 1 | |
%3 = icmp ne i8 %load_IN, 0 | |
br i1 %3, label %condition_body5, label %continue1 | |
condition_body5: ; preds = %branch | |
%load_tx6 = load i32, i32* %tx, align 4 | |
%load_last = load i32, i32* %last, align 4 | |
%tmpVar7 = sub i32 %load_tx6, %load_last | |
%load_ms = load i32, i32* %ms, align 4 | |
%tmpVar8 = add i32 %tmpVar7, %load_ms | |
store i32 %tmpVar8, i32* %ms, align 4 | |
%load_ms10 = load i32, i32* %ms, align 4 | |
%tmpVar11 = icmp sge i32 %load_ms10, 1000 | |
br i1 %tmpVar11, label %condition_body12, label %continue9 | |
continue1: ; preds = %continue9, %branch, %condition_body2 | |
%load_tx23 = load i32, i32* %tx, align 4 | |
store i32 %load_tx23, i32* %last, align 4 | |
%load_in = load i8, i8* %IN, align 1 | |
store i8 %load_in, i8* %edge, align 1 | |
ret void | |
condition_body12: ; preds = %condition_body5 | |
%deref13 = load i32*, i32** %SECONDS, align 8 | |
%deref14 = load i32*, i32** %SECONDS, align 8 | |
%load_seconds = load i32, i32* %deref14, align 4 | |
%tmpVar15 = add i32 %load_seconds, 1 | |
store i32 %tmpVar15, i32* %deref13, align 4 | |
%load_ms16 = load i32, i32* %ms, align 4 | |
%tmpVar17 = sub i32 %load_ms16, 1000 | |
store i32 %tmpVar17, i32* %ms, align 4 | |
br label %continue9 | |
continue9: ; preds = %condition_body12, %condition_body5 | |
%deref18 = load i32*, i32** %CYCLES, align 8 | |
%deref19 = load i32*, i32** %CYCLES, align 8 | |
%load_cycles = load i32, i32* %deref19, align 4 | |
%BOOL_TO_UINT_instance = alloca %BOOL_TO_UINT_interface, align 8 | |
%4 = getelementptr inbounds %BOOL_TO_UINT_interface, %BOOL_TO_UINT_interface* %BOOL_TO_UINT_instance, i32 0, i32 0 | |
%load_edge = load i8, i8* %edge, align 1 | |
%5 = icmp ne i8 %load_edge, 0 | |
%tmpVar20 = xor i1 %5, true | |
%6 = zext i1 %tmpVar20 to i8 | |
store i8 %6, i8* %4, align 1 | |
%call21 = call i16 @BOOL_TO_UINT(%BOOL_TO_UINT_interface* %BOOL_TO_UINT_instance) | |
%7 = zext i16 %call21 to i32 | |
%tmpVar22 = add i32 %load_cycles, %7 | |
store i32 %tmpVar22, i32* %deref18, align 4 | |
br label %continue1 | |
} | |
define i32 @T_PLC_MS(%T_PLC_MS_interface* %0) { | |
entry: | |
%debug = getelementptr inbounds %T_PLC_MS_interface, %T_PLC_MS_interface* %0, i32 0, i32 0 | |
%N = getelementptr inbounds %T_PLC_MS_interface, %T_PLC_MS_interface* %0, i32 0, i32 1 | |
%offset = getelementptr inbounds %T_PLC_MS_interface, %T_PLC_MS_interface* %0, i32 0, i32 2 | |
%tx = getelementptr inbounds %T_PLC_MS_interface, %T_PLC_MS_interface* %0, i32 0, i32 3 | |
%T_PLC_MS = alloca i32, align 4 | |
store i8 0, i8* %debug, align 1 | |
store i16 0, i16* %N, align 2 | |
store i32 0, i32* %offset, align 4 | |
store i64 0, i64* %tx, align 4 | |
store i32 0, i32* %T_PLC_MS, align 4 | |
%_TIME_instance = alloca %_TIME_interface, align 8 | |
%call = call i64 @_TIME(%_TIME_interface* %_TIME_instance) | |
store i64 %call, i64* %tx, align 4 | |
%TIME_TO_DWORD_instance = alloca %TIME_TO_DWORD_interface, align 8 | |
%1 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance, i32 0, i32 0 | |
%load_Tx = load i64, i64* %tx, align 4 | |
store i64 %load_Tx, i64* %1, align 4 | |
%call1 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance) | |
store i32 %call1, i32* %T_PLC_MS, align 4 | |
%load_debug = load i8, i8* %debug, align 1 | |
%2 = icmp ne i8 %load_debug, 0 | |
br i1 %2, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
%SHL_instance = alloca %SHL_interface, align 8 | |
%3 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 0 | |
%load_T_PLC_MS = load i32, i32* %T_PLC_MS, align 4 | |
%4 = zext i32 %load_T_PLC_MS to i64 | |
store i64 %4, i64* %3, align 4 | |
%5 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 1 | |
%load_N = load i16, i16* %N, align 2 | |
store i16 %load_N, i16* %5, align 2 | |
%call2 = call i64 @SHL(%SHL_interface* %SHL_instance) | |
%SHL_instance3 = alloca %SHL_interface, align 8 | |
%6 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance3, i32 0, i32 0 | |
store i64 1, i64* %6, align 4 | |
%7 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance3, i32 0, i32 1 | |
%load_N4 = load i16, i16* %N, align 2 | |
store i16 %load_N4, i16* %7, align 2 | |
%call5 = call i64 @SHL(%SHL_interface* %SHL_instance3) | |
%tmpVar = sub i64 %call5, 1 | |
%tmpVar6 = or i64 %call2, %tmpVar | |
%load_OFFSET = load i32, i32* %offset, align 4 | |
%8 = zext i32 %load_OFFSET to i64 | |
%tmpVar7 = add i64 %tmpVar6, %8 | |
%9 = trunc i64 %tmpVar7 to i32 | |
store i32 %9, i32* %T_PLC_MS, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%T_PLC_MS_ret = load i32, i32* %T_PLC_MS, align 4 | |
ret i32 %T_PLC_MS_ret | |
} | |
define i32 @T_PLC_US(%T_PLC_US_interface* %0) { | |
entry: | |
%debug = getelementptr inbounds %T_PLC_US_interface, %T_PLC_US_interface* %0, i32 0, i32 0 | |
%N = getelementptr inbounds %T_PLC_US_interface, %T_PLC_US_interface* %0, i32 0, i32 1 | |
%offset = getelementptr inbounds %T_PLC_US_interface, %T_PLC_US_interface* %0, i32 0, i32 2 | |
%tx = getelementptr inbounds %T_PLC_US_interface, %T_PLC_US_interface* %0, i32 0, i32 3 | |
%T_PLC_US = alloca i32, align 4 | |
store i8 0, i8* %debug, align 1 | |
store i16 0, i16* %N, align 2 | |
store i32 0, i32* %offset, align 4 | |
store i64 0, i64* %tx, align 4 | |
store i32 0, i32* %T_PLC_US, align 4 | |
%_TIME_instance = alloca %_TIME_interface, align 8 | |
%call = call i64 @_TIME(%_TIME_interface* %_TIME_instance) | |
store i64 %call, i64* %tx, align 4 | |
%TIME_TO_DWORD_instance = alloca %TIME_TO_DWORD_interface, align 8 | |
%1 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance, i32 0, i32 0 | |
%load_Tx = load i64, i64* %tx, align 4 | |
store i64 %load_Tx, i64* %1, align 4 | |
%call1 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance) | |
%tmpVar = mul i32 %call1, 1000 | |
store i32 %tmpVar, i32* %T_PLC_US, align 4 | |
%load_debug = load i8, i8* %debug, align 1 | |
%2 = icmp ne i8 %load_debug, 0 | |
br i1 %2, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
%SHL_instance = alloca %SHL_interface, align 8 | |
%3 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 0 | |
%load_T_PLC_US = load i32, i32* %T_PLC_US, align 4 | |
%4 = zext i32 %load_T_PLC_US to i64 | |
store i64 %4, i64* %3, align 4 | |
%5 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 1 | |
%load_N = load i16, i16* %N, align 2 | |
store i16 %load_N, i16* %5, align 2 | |
%call2 = call i64 @SHL(%SHL_interface* %SHL_instance) | |
%SHL_instance3 = alloca %SHL_interface, align 8 | |
%6 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance3, i32 0, i32 0 | |
store i64 1, i64* %6, align 4 | |
%7 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance3, i32 0, i32 1 | |
%load_N4 = load i16, i16* %N, align 2 | |
store i16 %load_N4, i16* %7, align 2 | |
%call5 = call i64 @SHL(%SHL_interface* %SHL_instance3) | |
%tmpVar6 = sub i64 %call5, 1 | |
%tmpVar7 = or i64 %call2, %tmpVar6 | |
%load_OFFSET = load i32, i32* %offset, align 4 | |
%8 = zext i32 %load_OFFSET to i64 | |
%tmpVar8 = add i64 %tmpVar7, %8 | |
%9 = trunc i64 %tmpVar8 to i32 | |
store i32 %9, i32* %T_PLC_US, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%T_PLC_US_ret = load i32, i32* %T_PLC_US, align 4 | |
ret i32 %T_PLC_US_ret | |
} | |
define void @TC_MS(%TC_MS_interface* %0) { | |
entry: | |
%TC = getelementptr inbounds %TC_MS_interface, %TC_MS_interface* %0, i32 0, i32 0 | |
%init = getelementptr inbounds %TC_MS_interface, %TC_MS_interface* %0, i32 0, i32 1 | |
%tx = getelementptr inbounds %TC_MS_interface, %TC_MS_interface* %0, i32 0, i32 2 | |
%last = getelementptr inbounds %TC_MS_interface, %TC_MS_interface* %0, i32 0, i32 3 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
store i8 1, i8* %init, align 1 | |
store i32 0, i32* %TC, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%load_tx = load i32, i32* %tx, align 4 | |
%load_last = load i32, i32* %last, align 4 | |
%tmpVar1 = sub i32 %load_tx, %load_last | |
store i32 %tmpVar1, i32* %TC, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%load_tx2 = load i32, i32* %tx, align 4 | |
store i32 %load_tx2, i32* %last, align 4 | |
ret void | |
} | |
define void @TC_S(%TC_S_interface* %0) { | |
entry: | |
%TC = getelementptr inbounds %TC_S_interface, %TC_S_interface* %0, i32 0, i32 0 | |
%init = getelementptr inbounds %TC_S_interface, %TC_S_interface* %0, i32 0, i32 1 | |
%tx = getelementptr inbounds %TC_S_interface, %TC_S_interface* %0, i32 0, i32 2 | |
%last = getelementptr inbounds %TC_S_interface, %TC_S_interface* %0, i32 0, i32 3 | |
%T_PLC_US_instance = alloca %T_PLC_US_interface, align 8 | |
%call = call i32 @T_PLC_US(%T_PLC_US_interface* %T_PLC_US_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
store i8 1, i8* %init, align 1 | |
store float 0.000000e+00, float* %TC, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%2 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%load_tx = load i32, i32* %tx, align 4 | |
%load_last = load i32, i32* %last, align 4 | |
%tmpVar1 = sub i32 %load_tx, %load_last | |
store i32 %tmpVar1, i32* %2, align 4 | |
%call2 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%tmpVar3 = fmul float %call2, 0x3EB0C6F7A0000000 | |
store float %tmpVar3, float* %TC, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%load_tx4 = load i32, i32* %tx, align 4 | |
store i32 %load_tx4, i32* %last, align 4 | |
ret void | |
} | |
define void @TC_US(%TC_US_interface* %0) { | |
entry: | |
%TC = getelementptr inbounds %TC_US_interface, %TC_US_interface* %0, i32 0, i32 0 | |
%init = getelementptr inbounds %TC_US_interface, %TC_US_interface* %0, i32 0, i32 1 | |
%tx = getelementptr inbounds %TC_US_interface, %TC_US_interface* %0, i32 0, i32 2 | |
%last = getelementptr inbounds %TC_US_interface, %TC_US_interface* %0, i32 0, i32 3 | |
%T_PLC_US_instance = alloca %T_PLC_US_interface, align 8 | |
%call = call i32 @T_PLC_US(%T_PLC_US_interface* %T_PLC_US_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
store i8 1, i8* %init, align 1 | |
store i32 0, i32* %TC, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%load_tx = load i32, i32* %tx, align 4 | |
%load_last = load i32, i32* %last, align 4 | |
%tmpVar1 = sub i32 %load_tx, %load_last | |
store i32 %tmpVar1, i32* %TC, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%load_tx2 = load i32, i32* %tx, align 4 | |
store i32 %load_tx2, i32* %last, align 4 | |
ret void | |
} | |
define float @MULTI_IN(%MULTI_IN_interface* %0) { | |
entry: | |
%in_1 = getelementptr inbounds %MULTI_IN_interface, %MULTI_IN_interface* %0, i32 0, i32 0 | |
%in_2 = getelementptr inbounds %MULTI_IN_interface, %MULTI_IN_interface* %0, i32 0, i32 1 | |
%in_3 = getelementptr inbounds %MULTI_IN_interface, %MULTI_IN_interface* %0, i32 0, i32 2 | |
%default = getelementptr inbounds %MULTI_IN_interface, %MULTI_IN_interface* %0, i32 0, i32 3 | |
%in_min = getelementptr inbounds %MULTI_IN_interface, %MULTI_IN_interface* %0, i32 0, i32 4 | |
%in_max = getelementptr inbounds %MULTI_IN_interface, %MULTI_IN_interface* %0, i32 0, i32 5 | |
%mode = getelementptr inbounds %MULTI_IN_interface, %MULTI_IN_interface* %0, i32 0, i32 6 | |
%count = getelementptr inbounds %MULTI_IN_interface, %MULTI_IN_interface* %0, i32 0, i32 7 | |
%F1 = getelementptr inbounds %MULTI_IN_interface, %MULTI_IN_interface* %0, i32 0, i32 8 | |
%F2 = getelementptr inbounds %MULTI_IN_interface, %MULTI_IN_interface* %0, i32 0, i32 9 | |
%F3 = getelementptr inbounds %MULTI_IN_interface, %MULTI_IN_interface* %0, i32 0, i32 10 | |
%MULTI_IN = alloca float, align 4 | |
store i16 0, i16* %count, align 2 | |
store i8 0, i8* %F1, align 1 | |
store i8 0, i8* %F2, align 1 | |
store i8 0, i8* %F3, align 1 | |
store float 0.000000e+00, float* %MULTI_IN, align 4 | |
%load_in_1 = load float, float* %in_1, align 4 | |
%load_in_min = load float, float* %in_min, align 4 | |
%tmpVar = fcmp ogt float %load_in_1, %load_in_min | |
br i1 %tmpVar, label %1, label %2 | |
1: ; preds = %entry | |
%load_in_11 = load float, float* %in_1, align 4 | |
%load_in_max = load float, float* %in_max, align 4 | |
%tmpVar2 = fcmp olt float %load_in_11, %load_in_max | |
br label %2 | |
2: ; preds = %1, %entry | |
%3 = phi i1 [ %tmpVar, %entry ], [ %tmpVar2, %1 ] | |
%4 = zext i1 %3 to i8 | |
store i8 %4, i8* %F1, align 1 | |
%load_in_2 = load float, float* %in_2, align 4 | |
%load_in_min3 = load float, float* %in_min, align 4 | |
%tmpVar4 = fcmp ogt float %load_in_2, %load_in_min3 | |
br i1 %tmpVar4, label %5, label %6 | |
5: ; preds = %2 | |
%load_in_25 = load float, float* %in_2, align 4 | |
%load_in_max6 = load float, float* %in_max, align 4 | |
%tmpVar7 = fcmp olt float %load_in_25, %load_in_max6 | |
br label %6 | |
6: ; preds = %5, %2 | |
%7 = phi i1 [ %tmpVar4, %2 ], [ %tmpVar7, %5 ] | |
%8 = zext i1 %7 to i8 | |
store i8 %8, i8* %F2, align 1 | |
%load_in_3 = load float, float* %in_3, align 4 | |
%load_in_min8 = load float, float* %in_min, align 4 | |
%tmpVar9 = fcmp ogt float %load_in_3, %load_in_min8 | |
br i1 %tmpVar9, label %9, label %10 | |
9: ; preds = %6 | |
%load_in_310 = load float, float* %in_3, align 4 | |
%load_in_max11 = load float, float* %in_max, align 4 | |
%tmpVar12 = fcmp olt float %load_in_310, %load_in_max11 | |
br label %10 | |
10: ; preds = %9, %6 | |
%11 = phi i1 [ %tmpVar9, %6 ], [ %tmpVar12, %9 ] | |
%12 = zext i1 %11 to i8 | |
store i8 %12, i8* %F3, align 1 | |
%load_mode = load i8, i8* %mode, align 1 | |
switch i8 %load_mode, label %else [ | |
i8 0, label %case | |
i8 1, label %case36 | |
i8 2, label %case41 | |
i8 3, label %case46 | |
i8 4, label %case51 | |
i8 5, label %case53 | |
i8 6, label %case79 | |
i8 7, label %case105 | |
] | |
case: ; preds = %10 | |
store i16 0, i16* %count, align 2 | |
%load_F1 = load i8, i8* %F1, align 1 | |
%13 = icmp ne i8 %load_F1, 0 | |
br i1 %13, label %condition_body, label %else13 | |
case36: ; preds = %10 | |
%SEL_instance37 = alloca %SEL_interface, align 8 | |
%14 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance37, i32 0, i32 0 | |
%load_F138 = load i8, i8* %F1, align 1 | |
store i8 %load_F138, i8* %14, align 1 | |
%15 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance37, i32 0, i32 1 | |
%load_default39 = load float, float* %default, align 4 | |
%16 = fptoui float %load_default39 to i64 | |
store i64 %16, i64* %15, align 4 | |
%17 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance37, i32 0, i32 2 | |
%load_IN_1 = load float, float* %in_1, align 4 | |
%18 = fptoui float %load_IN_1 to i64 | |
store i64 %18, i64* %17, align 4 | |
%call40 = call i64 @SEL(%SEL_interface* %SEL_instance37) | |
%19 = uitofp i64 %call40 to float | |
store float %19, float* %MULTI_IN, align 4 | |
br label %continue | |
case41: ; preds = %10 | |
%SEL_instance42 = alloca %SEL_interface, align 8 | |
%20 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance42, i32 0, i32 0 | |
%load_F243 = load i8, i8* %F2, align 1 | |
store i8 %load_F243, i8* %20, align 1 | |
%21 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance42, i32 0, i32 1 | |
%load_default44 = load float, float* %default, align 4 | |
%22 = fptoui float %load_default44 to i64 | |
store i64 %22, i64* %21, align 4 | |
%23 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance42, i32 0, i32 2 | |
%load_IN_2 = load float, float* %in_2, align 4 | |
%24 = fptoui float %load_IN_2 to i64 | |
store i64 %24, i64* %23, align 4 | |
%call45 = call i64 @SEL(%SEL_interface* %SEL_instance42) | |
%25 = uitofp i64 %call45 to float | |
store float %25, float* %MULTI_IN, align 4 | |
br label %continue | |
case46: ; preds = %10 | |
%SEL_instance47 = alloca %SEL_interface, align 8 | |
%26 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance47, i32 0, i32 0 | |
%load_F348 = load i8, i8* %F3, align 1 | |
store i8 %load_F348, i8* %26, align 1 | |
%27 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance47, i32 0, i32 1 | |
%load_default49 = load float, float* %default, align 4 | |
%28 = fptoui float %load_default49 to i64 | |
store i64 %28, i64* %27, align 4 | |
%29 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance47, i32 0, i32 2 | |
%load_IN_3 = load float, float* %in_3, align 4 | |
%30 = fptoui float %load_IN_3 to i64 | |
store i64 %30, i64* %29, align 4 | |
%call50 = call i64 @SEL(%SEL_interface* %SEL_instance47) | |
%31 = uitofp i64 %call50 to float | |
store float %31, float* %MULTI_IN, align 4 | |
br label %continue | |
case51: ; preds = %10 | |
%load_default52 = load float, float* %default, align 4 | |
store float %load_default52, float* %MULTI_IN, align 4 | |
br label %continue | |
case53: ; preds = %10 | |
%SEL_instance54 = alloca %SEL_interface, align 8 | |
%32 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance54, i32 0, i32 0 | |
%load_F155 = load i8, i8* %F1, align 1 | |
store i8 %load_F155, i8* %32, align 1 | |
%33 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance54, i32 0, i32 1 | |
%load_in_max56 = load float, float* %in_max, align 4 | |
%34 = fptoui float %load_in_max56 to i64 | |
store i64 %34, i64* %33, align 4 | |
%35 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance54, i32 0, i32 2 | |
%load_IN_157 = load float, float* %in_1, align 4 | |
%36 = fptoui float %load_IN_157 to i64 | |
store i64 %36, i64* %35, align 4 | |
%call58 = call i64 @SEL(%SEL_interface* %SEL_instance54) | |
%37 = uitofp i64 %call58 to float | |
store float %37, float* %MULTI_IN, align 4 | |
%load_F260 = load i8, i8* %F2, align 1 | |
%38 = icmp ne i8 %load_F260, 0 | |
br i1 %38, label %65, label %66 | |
case79: ; preds = %10 | |
%SEL_instance80 = alloca %SEL_interface, align 8 | |
%39 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance80, i32 0, i32 0 | |
%load_F181 = load i8, i8* %F1, align 1 | |
store i8 %load_F181, i8* %39, align 1 | |
%40 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance80, i32 0, i32 1 | |
%load_in_min82 = load float, float* %in_min, align 4 | |
%41 = fptoui float %load_in_min82 to i64 | |
store i64 %41, i64* %40, align 4 | |
%42 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance80, i32 0, i32 2 | |
%load_IN_183 = load float, float* %in_1, align 4 | |
%43 = fptoui float %load_IN_183 to i64 | |
store i64 %43, i64* %42, align 4 | |
%call84 = call i64 @SEL(%SEL_interface* %SEL_instance80) | |
%44 = uitofp i64 %call84 to float | |
store float %44, float* %MULTI_IN, align 4 | |
%load_F286 = load i8, i8* %F2, align 1 | |
%45 = icmp ne i8 %load_F286, 0 | |
br i1 %45, label %72, label %73 | |
case105: ; preds = %10 | |
%load_F1113 = load i8, i8* %F1, align 1 | |
%46 = icmp ne i8 %load_F1113, 0 | |
br i1 %46, label %102, label %104 | |
else: ; preds = %10 | |
br label %continue | |
continue: ; preds = %else, %continue112, %continue99, %continue73, %case51, %case46, %case41, %case36, %continue23 | |
%MULTI_IN_ret = load float, float* %MULTI_IN, align 4 | |
ret float %MULTI_IN_ret | |
condition_body: ; preds = %case | |
%load_count = load i16, i16* %count, align 2 | |
%47 = sext i16 %load_count to i32 | |
%tmpVar15 = add i32 %47, 1 | |
%48 = trunc i32 %tmpVar15 to i16 | |
store i16 %48, i16* %count, align 2 | |
%load_in_116 = load float, float* %in_1, align 4 | |
store float %load_in_116, float* %MULTI_IN, align 4 | |
br label %continue14 | |
else13: ; preds = %case | |
store float 0.000000e+00, float* %MULTI_IN, align 4 | |
br label %continue14 | |
continue14: ; preds = %else13, %condition_body | |
%load_F2 = load i8, i8* %F2, align 1 | |
%49 = icmp ne i8 %load_F2, 0 | |
br i1 %49, label %condition_body18, label %continue17 | |
condition_body18: ; preds = %continue14 | |
%load_count19 = load i16, i16* %count, align 2 | |
%50 = sext i16 %load_count19 to i32 | |
%tmpVar20 = add i32 %50, 1 | |
%51 = trunc i32 %tmpVar20 to i16 | |
store i16 %51, i16* %count, align 2 | |
%load_MULTI_IN = load float, float* %MULTI_IN, align 4 | |
%load_in_221 = load float, float* %in_2, align 4 | |
%tmpVar22 = fadd float %load_MULTI_IN, %load_in_221 | |
store float %tmpVar22, float* %MULTI_IN, align 4 | |
br label %continue17 | |
continue17: ; preds = %condition_body18, %continue14 | |
%load_F3 = load i8, i8* %F3, align 1 | |
%52 = icmp ne i8 %load_F3, 0 | |
br i1 %52, label %condition_body24, label %continue23 | |
condition_body24: ; preds = %continue17 | |
%load_count25 = load i16, i16* %count, align 2 | |
%53 = sext i16 %load_count25 to i32 | |
%tmpVar26 = add i32 %53, 1 | |
%54 = trunc i32 %tmpVar26 to i16 | |
store i16 %54, i16* %count, align 2 | |
%load_MULTI_IN27 = load float, float* %MULTI_IN, align 4 | |
%load_in_328 = load float, float* %in_3, align 4 | |
%tmpVar29 = fadd float %load_MULTI_IN27, %load_in_328 | |
store float %tmpVar29, float* %MULTI_IN, align 4 | |
br label %continue23 | |
continue23: ; preds = %condition_body24, %continue17 | |
%SEL_instance = alloca %SEL_interface, align 8 | |
%55 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 0 | |
%load_count30 = load i16, i16* %count, align 2 | |
%56 = sext i16 %load_count30 to i32 | |
%tmpVar31 = icmp eq i32 %56, 0 | |
%57 = zext i1 %tmpVar31 to i8 | |
store i8 %57, i8* %55, align 1 | |
%58 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 1 | |
%load_MULTI_IN32 = load float, float* %MULTI_IN, align 4 | |
%INT_TO_REAL_instance = alloca %INT_TO_REAL_interface, align 8 | |
%59 = getelementptr inbounds %INT_TO_REAL_interface, %INT_TO_REAL_interface* %INT_TO_REAL_instance, i32 0, i32 0 | |
%load_count33 = load i16, i16* %count, align 2 | |
store i16 %load_count33, i16* %59, align 2 | |
%call = call float @INT_TO_REAL(%INT_TO_REAL_interface* %INT_TO_REAL_instance) | |
%tmpVar34 = fdiv float %load_MULTI_IN32, %call | |
%60 = fptoui float %tmpVar34 to i64 | |
store i64 %60, i64* %58, align 4 | |
%61 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 2 | |
%load_default = load float, float* %default, align 4 | |
%62 = fptoui float %load_default to i64 | |
store i64 %62, i64* %61, align 4 | |
%call35 = call i64 @SEL(%SEL_interface* %SEL_instance) | |
%63 = uitofp i64 %call35 to float | |
store float %63, float* %MULTI_IN, align 4 | |
br label %continue | |
condition_body64: ; preds = %66 | |
%load_in_265 = load float, float* %in_2, align 4 | |
store float %load_in_265, float* %MULTI_IN, align 4 | |
br label %continue59 | |
continue59: ; preds = %condition_body64, %66 | |
%load_F367 = load i8, i8* %F3, align 1 | |
%64 = icmp ne i8 %load_F367, 0 | |
br i1 %64, label %68, label %69 | |
65: ; preds = %case53 | |
%load_in_261 = load float, float* %in_2, align 4 | |
%load_MULTI_IN62 = load float, float* %MULTI_IN, align 4 | |
%tmpVar63 = fcmp olt float %load_in_261, %load_MULTI_IN62 | |
br label %66 | |
66: ; preds = %65, %case53 | |
%67 = phi i1 [ %38, %case53 ], [ %tmpVar63, %65 ] | |
br i1 %67, label %condition_body64, label %continue59 | |
condition_body71: ; preds = %69 | |
%load_in_372 = load float, float* %in_3, align 4 | |
store float %load_in_372, float* %MULTI_IN, align 4 | |
br label %continue66 | |
continue66: ; preds = %condition_body71, %69 | |
%load_MULTI_IN74 = load float, float* %MULTI_IN, align 4 | |
%load_in_max75 = load float, float* %in_max, align 4 | |
%tmpVar76 = fcmp oeq float %load_MULTI_IN74, %load_in_max75 | |
br i1 %tmpVar76, label %condition_body77, label %continue73 | |
68: ; preds = %continue59 | |
%load_in_368 = load float, float* %in_3, align 4 | |
%load_MULTI_IN69 = load float, float* %MULTI_IN, align 4 | |
%tmpVar70 = fcmp olt float %load_in_368, %load_MULTI_IN69 | |
br label %69 | |
69: ; preds = %68, %continue59 | |
%70 = phi i1 [ %64, %continue59 ], [ %tmpVar70, %68 ] | |
br i1 %70, label %condition_body71, label %continue66 | |
condition_body77: ; preds = %continue66 | |
%load_default78 = load float, float* %default, align 4 | |
store float %load_default78, float* %MULTI_IN, align 4 | |
br label %continue73 | |
continue73: ; preds = %condition_body77, %continue66 | |
br label %continue | |
condition_body90: ; preds = %73 | |
%load_in_291 = load float, float* %in_2, align 4 | |
store float %load_in_291, float* %MULTI_IN, align 4 | |
br label %continue85 | |
continue85: ; preds = %condition_body90, %73 | |
%load_F393 = load i8, i8* %F3, align 1 | |
%71 = icmp ne i8 %load_F393, 0 | |
br i1 %71, label %75, label %76 | |
72: ; preds = %case79 | |
%load_in_287 = load float, float* %in_2, align 4 | |
%load_MULTI_IN88 = load float, float* %MULTI_IN, align 4 | |
%tmpVar89 = fcmp ogt float %load_in_287, %load_MULTI_IN88 | |
br label %73 | |
73: ; preds = %72, %case79 | |
%74 = phi i1 [ %45, %case79 ], [ %tmpVar89, %72 ] | |
br i1 %74, label %condition_body90, label %continue85 | |
condition_body97: ; preds = %76 | |
%load_in_398 = load float, float* %in_3, align 4 | |
store float %load_in_398, float* %MULTI_IN, align 4 | |
br label %continue92 | |
continue92: ; preds = %condition_body97, %76 | |
%load_MULTI_IN100 = load float, float* %MULTI_IN, align 4 | |
%load_in_min101 = load float, float* %in_min, align 4 | |
%tmpVar102 = fcmp oeq float %load_MULTI_IN100, %load_in_min101 | |
br i1 %tmpVar102, label %condition_body103, label %continue99 | |
75: ; preds = %continue85 | |
%load_in_394 = load float, float* %in_3, align 4 | |
%load_MULTI_IN95 = load float, float* %MULTI_IN, align 4 | |
%tmpVar96 = fcmp ogt float %load_in_394, %load_MULTI_IN95 | |
br label %76 | |
76: ; preds = %75, %continue85 | |
%77 = phi i1 [ %71, %continue85 ], [ %tmpVar96, %75 ] | |
br i1 %77, label %condition_body97, label %continue92 | |
condition_body103: ; preds = %continue92 | |
%load_default104 = load float, float* %default, align 4 | |
store float %load_default104, float* %MULTI_IN, align 4 | |
br label %continue99 | |
continue99: ; preds = %condition_body103, %continue92 | |
br label %continue | |
condition_body116: ; preds = %108 | |
%MID3_instance = alloca %MID3_interface, align 8 | |
%78 = getelementptr inbounds %MID3_interface, %MID3_interface* %MID3_instance, i32 0, i32 0 | |
%load_in_1117 = load float, float* %in_1, align 4 | |
store float %load_in_1117, float* %78, align 4 | |
%79 = getelementptr inbounds %MID3_interface, %MID3_interface* %MID3_instance, i32 0, i32 1 | |
%load_in_2118 = load float, float* %in_2, align 4 | |
store float %load_in_2118, float* %79, align 4 | |
%80 = getelementptr inbounds %MID3_interface, %MID3_interface* %MID3_instance, i32 0, i32 2 | |
%load_in_3119 = load float, float* %in_3, align 4 | |
store float %load_in_3119, float* %80, align 4 | |
%call120 = call float @MID3(%MID3_interface* %MID3_instance) | |
store float %call120, float* %MULTI_IN, align 4 | |
br label %continue112 | |
branch: ; preds = %108 | |
%load_F1121 = load i8, i8* %F1, align 1 | |
%81 = icmp ne i8 %load_F1121, 0 | |
br i1 %81, label %110, label %112 | |
condition_body123: ; preds = %112 | |
%MIN_instance = alloca %MIN_interface, align 8 | |
%82 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 0 | |
%load_in_1124 = load float, float* %in_1, align 4 | |
%83 = fptoui float %load_in_1124 to i64 | |
store i64 %83, i64* %82, align 4 | |
%84 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 1 | |
%load_in_2125 = load float, float* %in_2, align 4 | |
%85 = fptoui float %load_in_2125 to i64 | |
store i64 %85, i64* %84, align 4 | |
%call126 = call i64 @MIN(%MIN_interface* %MIN_instance) | |
%86 = uitofp i64 %call126 to float | |
store float %86, float* %MULTI_IN, align 4 | |
br label %continue112 | |
branch106: ; preds = %112 | |
%load_F1127 = load i8, i8* %F1, align 1 | |
%87 = icmp ne i8 %load_F1127, 0 | |
br i1 %87, label %114, label %116 | |
condition_body129: ; preds = %116 | |
%MIN_instance130 = alloca %MIN_interface, align 8 | |
%88 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance130, i32 0, i32 0 | |
%load_in_1131 = load float, float* %in_1, align 4 | |
%89 = fptoui float %load_in_1131 to i64 | |
store i64 %89, i64* %88, align 4 | |
%90 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance130, i32 0, i32 1 | |
%load_in_3132 = load float, float* %in_3, align 4 | |
%91 = fptoui float %load_in_3132 to i64 | |
store i64 %91, i64* %90, align 4 | |
%call133 = call i64 @MIN(%MIN_interface* %MIN_instance130) | |
%92 = uitofp i64 %call133 to float | |
store float %92, float* %MULTI_IN, align 4 | |
br label %continue112 | |
branch107: ; preds = %116 | |
%load_F2134 = load i8, i8* %F2, align 1 | |
%93 = icmp ne i8 %load_F2134, 0 | |
br i1 %93, label %118, label %120 | |
condition_body136: ; preds = %120 | |
%MIN_instance137 = alloca %MIN_interface, align 8 | |
%94 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance137, i32 0, i32 0 | |
%load_in_2138 = load float, float* %in_2, align 4 | |
%95 = fptoui float %load_in_2138 to i64 | |
store i64 %95, i64* %94, align 4 | |
%96 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance137, i32 0, i32 1 | |
%load_in_3139 = load float, float* %in_3, align 4 | |
%97 = fptoui float %load_in_3139 to i64 | |
store i64 %97, i64* %96, align 4 | |
%call140 = call i64 @MIN(%MIN_interface* %MIN_instance137) | |
%98 = uitofp i64 %call140 to float | |
store float %98, float* %MULTI_IN, align 4 | |
br label %continue112 | |
branch108: ; preds = %120 | |
%load_F1141 = load i8, i8* %F1, align 1 | |
%99 = icmp ne i8 %load_F1141, 0 | |
br i1 %99, label %condition_body142, label %branch109 | |
condition_body142: ; preds = %branch108 | |
%load_in_1143 = load float, float* %in_1, align 4 | |
store float %load_in_1143, float* %MULTI_IN, align 4 | |
br label %continue112 | |
branch109: ; preds = %branch108 | |
%load_F2144 = load i8, i8* %F2, align 1 | |
%100 = icmp ne i8 %load_F2144, 0 | |
br i1 %100, label %condition_body145, label %branch110 | |
condition_body145: ; preds = %branch109 | |
%load_in_2146 = load float, float* %in_2, align 4 | |
store float %load_in_2146, float* %MULTI_IN, align 4 | |
br label %continue112 | |
branch110: ; preds = %branch109 | |
%load_F3147 = load i8, i8* %F3, align 1 | |
%101 = icmp ne i8 %load_F3147, 0 | |
br i1 %101, label %condition_body148, label %else111 | |
condition_body148: ; preds = %branch110 | |
%load_in_3149 = load float, float* %in_3, align 4 | |
store float %load_in_3149, float* %MULTI_IN, align 4 | |
br label %continue112 | |
else111: ; preds = %branch110 | |
%load_default150 = load float, float* %default, align 4 | |
store float %load_default150, float* %MULTI_IN, align 4 | |
br label %continue112 | |
continue112: ; preds = %else111, %condition_body148, %condition_body145, %condition_body142, %condition_body136, %condition_body129, %condition_body123, %condition_body116 | |
br label %continue | |
102: ; preds = %case105 | |
%load_F2114 = load i8, i8* %F2, align 1 | |
%103 = icmp ne i8 %load_F2114, 0 | |
br label %104 | |
104: ; preds = %102, %case105 | |
%105 = phi i1 [ %46, %case105 ], [ %103, %102 ] | |
br i1 %105, label %106, label %108 | |
106: ; preds = %104 | |
%load_F3115 = load i8, i8* %F3, align 1 | |
%107 = icmp ne i8 %load_F3115, 0 | |
br label %108 | |
108: ; preds = %106, %104 | |
%109 = phi i1 [ %105, %104 ], [ %107, %106 ] | |
br i1 %109, label %condition_body116, label %branch | |
110: ; preds = %branch | |
%load_F2122 = load i8, i8* %F2, align 1 | |
%111 = icmp ne i8 %load_F2122, 0 | |
br label %112 | |
112: ; preds = %110, %branch | |
%113 = phi i1 [ %81, %branch ], [ %111, %110 ] | |
br i1 %113, label %condition_body123, label %branch106 | |
114: ; preds = %branch106 | |
%load_F3128 = load i8, i8* %F3, align 1 | |
%115 = icmp ne i8 %load_F3128, 0 | |
br label %116 | |
116: ; preds = %114, %branch106 | |
%117 = phi i1 [ %87, %branch106 ], [ %115, %114 ] | |
br i1 %117, label %condition_body129, label %branch107 | |
118: ; preds = %branch107 | |
%load_F3135 = load i8, i8* %F3, align 1 | |
%119 = icmp ne i8 %load_F3135, 0 | |
br label %120 | |
120: ; preds = %118, %branch107 | |
%121 = phi i1 [ %93, %branch107 ], [ %119, %118 ] | |
br i1 %121, label %condition_body136, label %branch108 | |
} | |
define float @RES_NI(%RES_NI_interface* %0) { | |
entry: | |
%T = getelementptr inbounds %RES_NI_interface, %RES_NI_interface* %0, i32 0, i32 0 | |
%R0 = getelementptr inbounds %RES_NI_interface, %RES_NI_interface* %0, i32 0, i32 1 | |
%A = getelementptr inbounds %RES_NI_interface, %RES_NI_interface* %0, i32 0, i32 2 | |
%B = getelementptr inbounds %RES_NI_interface, %RES_NI_interface* %0, i32 0, i32 3 | |
%C = getelementptr inbounds %RES_NI_interface, %RES_NI_interface* %0, i32 0, i32 4 | |
%T2 = getelementptr inbounds %RES_NI_interface, %RES_NI_interface* %0, i32 0, i32 5 | |
%RES_NI = alloca float, align 4 | |
store float 0x3FE18D4FE0000000, float* %A, align 4 | |
store float 0x3F45CA6CA0000000, float* %B, align 4 | |
store float 0x3E281842A0000000, float* %C, align 4 | |
store float 0.000000e+00, float* %T2, align 4 | |
store float 0.000000e+00, float* %RES_NI, align 4 | |
%load_T = load float, float* %T, align 4 | |
%load_T1 = load float, float* %T, align 4 | |
%tmpVar = fmul float %load_T, %load_T1 | |
store float %tmpVar, float* %T2, align 4 | |
%load_R0 = load float, float* %R0, align 4 | |
%load_A = load float, float* %A, align 4 | |
%load_T2 = load float, float* %T, align 4 | |
%tmpVar3 = fmul float %load_A, %load_T2 | |
%tmpVar4 = fadd float %load_R0, %tmpVar3 | |
%load_B = load float, float* %B, align 4 | |
%load_T25 = load float, float* %T2, align 4 | |
%tmpVar6 = fmul float %load_B, %load_T25 | |
%tmpVar7 = fadd float %tmpVar4, %tmpVar6 | |
%load_C = load float, float* %C, align 4 | |
%load_T28 = load float, float* %T2, align 4 | |
%tmpVar9 = fmul float %load_C, %load_T28 | |
%load_T210 = load float, float* %T2, align 4 | |
%tmpVar11 = fmul float %tmpVar9, %load_T210 | |
%tmpVar12 = fadd float %tmpVar7, %tmpVar11 | |
store float %tmpVar12, float* %RES_NI, align 4 | |
%RES_NI_ret = load float, float* %RES_NI, align 4 | |
ret float %RES_NI_ret | |
} | |
define float @RES_NTC(%RES_NTC_interface* %0) { | |
entry: | |
%T = getelementptr inbounds %RES_NTC_interface, %RES_NTC_interface* %0, i32 0, i32 0 | |
%RN = getelementptr inbounds %RES_NTC_interface, %RES_NTC_interface* %0, i32 0, i32 1 | |
%B = getelementptr inbounds %RES_NTC_interface, %RES_NTC_interface* %0, i32 0, i32 2 | |
%RES_NTC = alloca float, align 4 | |
store float 0.000000e+00, float* %RES_NTC, align 4 | |
%load_RN = load float, float* %RN, align 4 | |
%1 = fpext float %load_RN to double | |
%EXP_instance = alloca %EXP_interface, align 8 | |
%2 = getelementptr inbounds %EXP_interface, %EXP_interface* %EXP_instance, i32 0, i32 0 | |
%load_B = load float, float* %B, align 4 | |
%load_T = load float, float* %T, align 4 | |
%tmpVar = fadd float %load_T, 0x4071126660000000 | |
%tmpVar1 = fdiv float 1.000000e+00, %tmpVar | |
%tmpVar2 = fsub float %tmpVar1, 0x3F6B79E1E0000000 | |
%tmpVar3 = fmul float %load_B, %tmpVar2 | |
%3 = fptosi float %tmpVar3 to i32 | |
store i32 %3, i32* %2, align 4 | |
%call = call double @EXP(%EXP_interface* %EXP_instance) | |
%tmpVar4 = fmul double %1, %call | |
%4 = fptrunc double %tmpVar4 to float | |
store float %4, float* %RES_NTC, align 4 | |
%RES_NTC_ret = load float, float* %RES_NTC, align 4 | |
ret float %RES_NTC_ret | |
} | |
define float @RES_PT(%RES_PT_interface* %0) { | |
entry: | |
%T = getelementptr inbounds %RES_PT_interface, %RES_PT_interface* %0, i32 0, i32 0 | |
%R0 = getelementptr inbounds %RES_PT_interface, %RES_PT_interface* %0, i32 0, i32 1 | |
%A = getelementptr inbounds %RES_PT_interface, %RES_PT_interface* %0, i32 0, i32 2 | |
%B = getelementptr inbounds %RES_PT_interface, %RES_PT_interface* %0, i32 0, i32 3 | |
%C = getelementptr inbounds %RES_PT_interface, %RES_PT_interface* %0, i32 0, i32 4 | |
%T2 = getelementptr inbounds %RES_PT_interface, %RES_PT_interface* %0, i32 0, i32 5 | |
%RES_PT = alloca float, align 4 | |
store float 0x3F7001DB20000000, float* %A, align 4 | |
store float 0xBEA377E140000000, float* %B, align 4 | |
store float 0xBD92CB8880000000, float* %C, align 4 | |
store float 0.000000e+00, float* %T2, align 4 | |
store float 0.000000e+00, float* %RES_PT, align 4 | |
%load_T = load float, float* %T, align 4 | |
%load_T1 = load float, float* %T, align 4 | |
%tmpVar = fmul float %load_T, %load_T1 | |
store float %tmpVar, float* %T2, align 4 | |
%load_T2 = load float, float* %T, align 4 | |
%tmpVar3 = fcmp oge float %load_T2, 0.000000e+00 | |
br i1 %tmpVar3, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_R0 = load float, float* %R0, align 4 | |
%load_A = load float, float* %A, align 4 | |
%load_T4 = load float, float* %T, align 4 | |
%tmpVar5 = fmul float %load_A, %load_T4 | |
%tmpVar6 = fadd float 1.000000e+00, %tmpVar5 | |
%load_B = load float, float* %B, align 4 | |
%load_T27 = load float, float* %T2, align 4 | |
%tmpVar8 = fmul float %load_B, %load_T27 | |
%tmpVar9 = fadd float %tmpVar6, %tmpVar8 | |
%tmpVar10 = fmul float %load_R0, %tmpVar9 | |
store float %tmpVar10, float* %RES_PT, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%load_R011 = load float, float* %R0, align 4 | |
%load_A12 = load float, float* %A, align 4 | |
%load_T13 = load float, float* %T, align 4 | |
%tmpVar14 = fmul float %load_A12, %load_T13 | |
%tmpVar15 = fadd float 1.000000e+00, %tmpVar14 | |
%load_B16 = load float, float* %B, align 4 | |
%load_T217 = load float, float* %T2, align 4 | |
%tmpVar18 = fmul float %load_B16, %load_T217 | |
%tmpVar19 = fadd float %tmpVar15, %tmpVar18 | |
%load_C = load float, float* %C, align 4 | |
%load_T20 = load float, float* %T, align 4 | |
%tmpVar21 = fsub float %load_T20, 1.000000e+02 | |
%tmpVar22 = fmul float %load_C, %tmpVar21 | |
%load_T223 = load float, float* %T2, align 4 | |
%tmpVar24 = fmul float %tmpVar22, %load_T223 | |
%load_T25 = load float, float* %T, align 4 | |
%tmpVar26 = fmul float %tmpVar24, %load_T25 | |
%tmpVar27 = fadd float %tmpVar19, %tmpVar26 | |
%tmpVar28 = fmul float %load_R011, %tmpVar27 | |
store float %tmpVar28, float* %RES_PT, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%RES_PT_ret = load float, float* %RES_PT, align 4 | |
ret float %RES_PT_ret | |
} | |
define float @RES_SI(%RES_SI_interface* %0) { | |
entry: | |
%T = getelementptr inbounds %RES_SI_interface, %RES_SI_interface* %0, i32 0, i32 0 | |
%RS = getelementptr inbounds %RES_SI_interface, %RES_SI_interface* %0, i32 0, i32 1 | |
%TS = getelementptr inbounds %RES_SI_interface, %RES_SI_interface* %0, i32 0, i32 2 | |
%A = getelementptr inbounds %RES_SI_interface, %RES_SI_interface* %0, i32 0, i32 3 | |
%B = getelementptr inbounds %RES_SI_interface, %RES_SI_interface* %0, i32 0, i32 4 | |
%TX = getelementptr inbounds %RES_SI_interface, %RES_SI_interface* %0, i32 0, i32 5 | |
%RES_SI = alloca float, align 4 | |
store float 0x3F7F4B1EE0000000, float* %A, align 4 | |
store float 0x3EF1680760000000, float* %B, align 4 | |
store float 0.000000e+00, float* %TX, align 4 | |
store float 0.000000e+00, float* %RES_SI, align 4 | |
%load_T = load float, float* %T, align 4 | |
%load_TS = load float, float* %TS, align 4 | |
%tmpVar = fsub float %load_T, %load_TS | |
store float %tmpVar, float* %TX, align 4 | |
%load_RS = load float, float* %RS, align 4 | |
%load_A = load float, float* %A, align 4 | |
%load_TX = load float, float* %TX, align 4 | |
%tmpVar1 = fmul float %load_A, %load_TX | |
%tmpVar2 = fadd float 1.000000e+00, %tmpVar1 | |
%load_B = load float, float* %B, align 4 | |
%load_TX3 = load float, float* %TX, align 4 | |
%tmpVar4 = fmul float %load_B, %load_TX3 | |
%load_TX5 = load float, float* %TX, align 4 | |
%tmpVar6 = fmul float %tmpVar4, %load_TX5 | |
%tmpVar7 = fadd float %tmpVar2, %tmpVar6 | |
%tmpVar8 = fmul float %load_RS, %tmpVar7 | |
store float %tmpVar8, float* %RES_SI, align 4 | |
%RES_SI_ret = load float, float* %RES_SI, align 4 | |
ret float %RES_SI_ret | |
} | |
define float @SENSOR_INT(%SENSOR_INT_interface* %0) { | |
entry: | |
%Voltage = getelementptr inbounds %SENSOR_INT_interface, %SENSOR_INT_interface* %0, i32 0, i32 0 | |
%Current = getelementptr inbounds %SENSOR_INT_interface, %SENSOR_INT_interface* %0, i32 0, i32 1 | |
%RP = getelementptr inbounds %SENSOR_INT_interface, %SENSOR_INT_interface* %0, i32 0, i32 2 | |
%RS = getelementptr inbounds %SENSOR_INT_interface, %SENSOR_INT_interface* %0, i32 0, i32 3 | |
%RG = getelementptr inbounds %SENSOR_INT_interface, %SENSOR_INT_interface* %0, i32 0, i32 4 | |
%SENSOR_INT = alloca float, align 4 | |
store float 0.000000e+00, float* %RG, align 4 | |
store float 0.000000e+00, float* %SENSOR_INT, align 4 | |
%load_current = load float, float* %Current, align 4 | |
%tmpVar = fcmp one float %load_current, 0.000000e+00 | |
br i1 %tmpVar, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
%load_voltage = load float, float* %Voltage, align 4 | |
%load_current1 = load float, float* %Current, align 4 | |
%tmpVar2 = fdiv float %load_voltage, %load_current1 | |
store float %tmpVar2, float* %RG, align 4 | |
%load_RP = load float, float* %RP, align 4 | |
%load_RG = load float, float* %RG, align 4 | |
%load_RS = load float, float* %RS, align 4 | |
%tmpVar3 = fsub float %load_RG, %load_RS | |
%tmpVar4 = fmul float %load_RP, %tmpVar3 | |
%load_RP5 = load float, float* %RP, align 4 | |
%load_RS6 = load float, float* %RS, align 4 | |
%tmpVar7 = fadd float %load_RP5, %load_RS6 | |
%load_RG8 = load float, float* %RG, align 4 | |
%tmpVar9 = fsub float %tmpVar7, %load_RG8 | |
%tmpVar10 = fdiv float %tmpVar4, %tmpVar9 | |
store float %tmpVar10, float* %SENSOR_INT, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%SENSOR_INT_ret = load float, float* %SENSOR_INT, align 4 | |
ret float %SENSOR_INT_ret | |
} | |
define float @TEMP_NI(%TEMP_NI_interface* %0) { | |
entry: | |
%Res = getelementptr inbounds %TEMP_NI_interface, %TEMP_NI_interface* %0, i32 0, i32 0 | |
%R0 = getelementptr inbounds %TEMP_NI_interface, %TEMP_NI_interface* %0, i32 0, i32 1 | |
%TEMP_NI = alloca float, align 4 | |
store float 0.000000e+00, float* %TEMP_NI, align 4 | |
%SQRT_instance = alloca %SQRT_interface, align 8 | |
%1 = getelementptr inbounds %SQRT_interface, %SQRT_interface* %SQRT_instance, i32 0, i32 0 | |
%load_R0 = load float, float* %R0, align 4 | |
%load_Res = load float, float* %Res, align 4 | |
%tmpVar = fsub float %load_R0, %load_Res | |
%tmpVar1 = fmul float 0x3F65CA6CA0000000, %tmpVar | |
%tmpVar2 = fsub float 0x3FD34129C0000000, %tmpVar1 | |
%2 = fptosi float %tmpVar2 to i32 | |
store i32 %2, i32* %1, align 4 | |
%call = call double @SQRT(%SQRT_interface* %SQRT_instance) | |
%tmpVar3 = fsub double %call, 5.485000e-01 | |
%tmpVar4 = fmul double %tmpVar3, 0x40877F099FBBF28A | |
%3 = fptrunc double %tmpVar4 to float | |
store float %3, float* %TEMP_NI, align 4 | |
%TEMP_NI_ret = load float, float* %TEMP_NI, align 4 | |
ret float %TEMP_NI_ret | |
} | |
define float @TEMP_NTC(%TEMP_NTC_interface* %0) { | |
entry: | |
%RES = getelementptr inbounds %TEMP_NTC_interface, %TEMP_NTC_interface* %0, i32 0, i32 0 | |
%RN = getelementptr inbounds %TEMP_NTC_interface, %TEMP_NTC_interface* %0, i32 0, i32 1 | |
%B = getelementptr inbounds %TEMP_NTC_interface, %TEMP_NTC_interface* %0, i32 0, i32 2 | |
%TEMP_NTC = alloca float, align 4 | |
store float 0.000000e+00, float* %TEMP_NTC, align 4 | |
%load_res = load float, float* %RES, align 4 | |
%tmpVar = fcmp ogt float %load_res, 0.000000e+00 | |
br i1 %tmpVar, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
%load_B = load float, float* %B, align 4 | |
%tmpVar1 = fmul float %load_B, 0x4072A26660000000 | |
%1 = fpext float %tmpVar1 to double | |
%load_B2 = load float, float* %B, align 4 | |
%2 = fpext float %load_B2 to double | |
%LN_instance = alloca %LN_interface, align 8 | |
%3 = getelementptr inbounds %LN_interface, %LN_interface* %LN_instance, i32 0, i32 0 | |
%load_RES = load float, float* %RES, align 4 | |
%load_RN = load float, float* %RN, align 4 | |
%tmpVar3 = fdiv float %load_RES, %load_RN | |
%4 = fptosi float %tmpVar3 to i32 | |
store i32 %4, i32* %3, align 4 | |
%call = call double @LN(%LN_interface* %LN_instance) | |
%tmpVar4 = fmul double %call, 2.981500e+02 | |
%tmpVar5 = fadd double %2, %tmpVar4 | |
%tmpVar6 = fdiv double %1, %tmpVar5 | |
%tmpVar7 = fsub double %tmpVar6, 2.731500e+02 | |
%5 = fptrunc double %tmpVar7 to float | |
store float %5, float* %TEMP_NTC, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%TEMP_NTC_ret = load float, float* %TEMP_NTC, align 4 | |
ret float %TEMP_NTC_ret | |
} | |
define float @TEMP_PT(%TEMP_PT_interface* %0) { | |
entry: | |
%Res = getelementptr inbounds %TEMP_PT_interface, %TEMP_PT_interface* %0, i32 0, i32 0 | |
%R0 = getelementptr inbounds %TEMP_PT_interface, %TEMP_PT_interface* %0, i32 0, i32 1 | |
%A = getelementptr inbounds %TEMP_PT_interface, %TEMP_PT_interface* %0, i32 0, i32 2 | |
%B = getelementptr inbounds %TEMP_PT_interface, %TEMP_PT_interface* %0, i32 0, i32 3 | |
%accuracy = getelementptr inbounds %TEMP_PT_interface, %TEMP_PT_interface* %0, i32 0, i32 4 | |
%step = getelementptr inbounds %TEMP_PT_interface, %TEMP_PT_interface* %0, i32 0, i32 5 | |
%X = getelementptr inbounds %TEMP_PT_interface, %TEMP_PT_interface* %0, i32 0, i32 6 | |
%Y = getelementptr inbounds %TEMP_PT_interface, %TEMP_PT_interface* %0, i32 0, i32 7 | |
%t1 = getelementptr inbounds %TEMP_PT_interface, %TEMP_PT_interface* %0, i32 0, i32 8 | |
%pt = getelementptr inbounds %TEMP_PT_interface, %TEMP_PT_interface* %0, i32 0, i32 9 | |
%TEMP_PT = alloca float, align 4 | |
store float 0x3F70022640000000, float* %A, align 4 | |
store float 0xBEA360AFE0000000, float* %B, align 4 | |
store float 0x3F847AE140000000, float* %accuracy, align 4 | |
store float 5.000000e+01, float* %step, align 4 | |
store float 0.000000e+00, float* %X, align 4 | |
store float 0.000000e+00, float* %Y, align 4 | |
store float 0.000000e+00, float* %t1, align 4 | |
store i32* null, i32** %pt, align 8 | |
store float 0.000000e+00, float* %TEMP_PT, align 4 | |
%load_A = load float, float* %A, align 4 | |
%load_R0 = load float, float* %R0, align 4 | |
%tmpVar = fmul float %load_A, %load_R0 | |
store float %tmpVar, float* %X, align 4 | |
%load_B = load float, float* %B, align 4 | |
%load_R01 = load float, float* %R0, align 4 | |
%tmpVar2 = fmul float %load_B, %load_R01 | |
store float %tmpVar2, float* %Y, align 4 | |
%load_Res = load float, float* %Res, align 4 | |
%load_R03 = load float, float* %R0, align 4 | |
%tmpVar4 = fcmp oge float %load_Res, %load_R03 | |
br i1 %tmpVar4, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_X = load float, float* %X, align 4 | |
%load_X5 = load float, float* %X, align 4 | |
%tmpVar6 = fmul float %load_X, %load_X5 | |
%load_Y = load float, float* %Y, align 4 | |
%tmpVar7 = fmul float 4.000000e+00, %load_Y | |
%load_R08 = load float, float* %R0, align 4 | |
%load_Res9 = load float, float* %Res, align 4 | |
%tmpVar10 = fsub float %load_R08, %load_Res9 | |
%tmpVar11 = fmul float %tmpVar7, %tmpVar10 | |
%tmpVar12 = fsub float %tmpVar6, %tmpVar11 | |
store float %tmpVar12, float* %t1, align 4 | |
%load_t1 = load float, float* %t1, align 4 | |
%tmpVar15 = fcmp olt float %load_t1, 0.000000e+00 | |
br i1 %tmpVar15, label %condition_body16, label %else13 | |
else: ; preds = %entry | |
%1 = bitcast float* %step to i32* | |
store i32* %1, i32** %pt, align 8 | |
store float -1.000000e+02, float* %TEMP_PT, align 4 | |
br label %condition_check | |
continue: ; preds = %continue24, %continue14 | |
%TEMP_PT_ret = load float, float* %TEMP_PT, align 4 | |
ret float %TEMP_PT_ret | |
condition_body16: ; preds = %condition_body | |
store float 1.000000e+04, float* %TEMP_PT, align 4 | |
br label %continue14 | |
else13: ; preds = %condition_body | |
%load_X17 = load float, float* %X, align 4 | |
%tmpVar18 = fneg float %load_X17 | |
%2 = fpext float %tmpVar18 to double | |
%SQRT_instance = alloca %SQRT_interface, align 8 | |
%3 = getelementptr inbounds %SQRT_interface, %SQRT_interface* %SQRT_instance, i32 0, i32 0 | |
%load_t119 = load float, float* %t1, align 4 | |
%4 = fptosi float %load_t119 to i32 | |
store i32 %4, i32* %3, align 4 | |
%call = call double @SQRT(%SQRT_interface* %SQRT_instance) | |
%tmpVar20 = fadd double %2, %call | |
%load_Y21 = load float, float* %Y, align 4 | |
%tmpVar22 = fmul float 2.000000e+00, %load_Y21 | |
%5 = fpext float %tmpVar22 to double | |
%tmpVar23 = fdiv double %tmpVar20, %5 | |
%6 = fptrunc double %tmpVar23 to float | |
store float %6, float* %TEMP_PT, align 4 | |
br label %continue14 | |
continue14: ; preds = %else13, %condition_body16 | |
br label %continue | |
condition_check: ; preds = %else, %continue27 | |
%load_step = load float, float* %step, align 4 | |
%load_accuracy = load float, float* %accuracy, align 4 | |
%tmpVar25 = fcmp ogt float %load_step, %load_accuracy | |
br i1 %tmpVar25, label %while_body, label %continue24 | |
while_body: ; preds = %condition_check | |
%RES_PT_instance = alloca %RES_PT_interface, align 8 | |
%7 = getelementptr inbounds %RES_PT_interface, %RES_PT_interface* %RES_PT_instance, i32 0, i32 0 | |
%load_TEMP_PT = load float, float* %TEMP_PT, align 4 | |
store float %load_TEMP_PT, float* %7, align 4 | |
%8 = getelementptr inbounds %RES_PT_interface, %RES_PT_interface* %RES_PT_instance, i32 0, i32 1 | |
%load_R028 = load float, float* %R0, align 4 | |
store float %load_R028, float* %8, align 4 | |
%call29 = call float @RES_PT(%RES_PT_interface* %RES_PT_instance) | |
%load_res = load float, float* %Res, align 4 | |
%tmpVar30 = fcmp olt float %call29, %load_res | |
br i1 %tmpVar30, label %condition_body31, label %else26 | |
continue24: ; preds = %condition_check | |
br label %continue | |
condition_body31: ; preds = %while_body | |
%load_TEMP_PT32 = load float, float* %TEMP_PT, align 4 | |
%load_step33 = load float, float* %step, align 4 | |
%tmpVar34 = fadd float %load_TEMP_PT32, %load_step33 | |
store float %tmpVar34, float* %TEMP_PT, align 4 | |
br label %continue27 | |
else26: ; preds = %while_body | |
%load_TEMP_PT35 = load float, float* %TEMP_PT, align 4 | |
%load_step36 = load float, float* %step, align 4 | |
%tmpVar37 = fsub float %load_TEMP_PT35, %load_step36 | |
store float %tmpVar37, float* %TEMP_PT, align 4 | |
br label %continue27 | |
continue27: ; preds = %else26, %condition_body31 | |
%deref = load i32*, i32** %pt, align 8 | |
%deref38 = load i32*, i32** %pt, align 8 | |
%load_tmpVar = load i32, i32* %deref38, align 4 | |
%tmpVar39 = sub i32 %load_tmpVar, 8388608 | |
store i32 %tmpVar39, i32* %deref, align 4 | |
br label %condition_check | |
} | |
define float @TEMP_SI(%TEMP_SI_interface* %0) { | |
entry: | |
%Res = getelementptr inbounds %TEMP_SI_interface, %TEMP_SI_interface* %0, i32 0, i32 0 | |
%RS = getelementptr inbounds %TEMP_SI_interface, %TEMP_SI_interface* %0, i32 0, i32 1 | |
%TS = getelementptr inbounds %TEMP_SI_interface, %TEMP_SI_interface* %0, i32 0, i32 2 | |
%TEMP_SI = alloca float, align 4 | |
store float 0.000000e+00, float* %TEMP_SI, align 4 | |
%SQRT_instance = alloca %SQRT_interface, align 8 | |
%1 = getelementptr inbounds %SQRT_interface, %SQRT_interface* %SQRT_instance, i32 0, i32 0 | |
%load_Res = load float, float* %Res, align 4 | |
%load_RS = load float, float* %RS, align 4 | |
%tmpVar = fdiv float %load_Res, %load_RS | |
%tmpVar1 = fmul float %tmpVar, 0x3F11680760000000 | |
%tmpVar2 = fsub float %tmpVar1, 0x3EE0D712C0000000 | |
%2 = fptosi float %tmpVar2 to i32 | |
store i32 %2, i32* %1, align 4 | |
%call = call double @SQRT(%SQRT_interface* %SQRT_instance) | |
%tmpVar3 = fadd double 0xBF7F4B1EE0000000, %call | |
%tmpVar4 = fmul double %tmpVar3, 0x40DD6A1ED7F0ED3E | |
%load_TS = load float, float* %TS, align 4 | |
%3 = fpext float %load_TS to double | |
%tmpVar5 = fadd double %tmpVar4, %3 | |
%4 = fptrunc double %tmpVar5 to float | |
store float %4, float* %TEMP_SI, align 4 | |
%TEMP_SI_ret = load float, float* %TEMP_SI, align 4 | |
ret float %TEMP_SI_ret | |
} | |
define void @_RMP_B(%_RMP_B_interface* %0) { | |
entry: | |
%DIR = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %0, i32 0, i32 0 | |
%E = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %0, i32 0, i32 1 | |
%TR = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %0, i32 0, i32 2 | |
%RMP = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %0, i32 0, i32 3 | |
%tx = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %0, i32 0, i32 4 | |
%tl = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %0, i32 0, i32 5 | |
%tn = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %0, i32 0, i32 6 | |
%init = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %0, i32 0, i32 7 | |
%last_dir = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %0, i32 0, i32 8 | |
%start = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %0, i32 0, i32 9 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call1, i64* %tx, align 4 | |
%load_E = load i8, i8* %E, align 1 | |
%2 = icmp ne i8 %load_E, 0 | |
br i1 %2, label %7, label %9 | |
condition_body: ; preds = %25 | |
%deref4 = load i8*, i8** %RMP, align 8 | |
%FRMP_B_instance = alloca %FRMP_B_interface, align 8 | |
%3 = getelementptr inbounds %FRMP_B_interface, %FRMP_B_interface* %FRMP_B_instance, i32 0, i32 0 | |
%load_start = load i8, i8* %start, align 1 | |
store i8 %load_start, i8* %3, align 1 | |
%4 = getelementptr inbounds %FRMP_B_interface, %FRMP_B_interface* %FRMP_B_instance, i32 0, i32 1 | |
%load_DIR5 = load i8, i8* %DIR, align 1 | |
store i8 %load_DIR5, i8* %4, align 1 | |
%5 = getelementptr inbounds %FRMP_B_interface, %FRMP_B_interface* %FRMP_B_instance, i32 0, i32 2 | |
%load_tx = load i64, i64* %tx, align 4 | |
%load_tl = load i64, i64* %tl, align 4 | |
%tmpVar6 = sub i64 %load_tx, %load_tl | |
store i64 %tmpVar6, i64* %5, align 4 | |
%6 = getelementptr inbounds %FRMP_B_interface, %FRMP_B_interface* %FRMP_B_instance, i32 0, i32 3 | |
%load_TR7 = load i64, i64* %TR, align 4 | |
store i64 %load_TR7, i64* %6, align 4 | |
%call8 = call i8 @FRMP_B(%FRMP_B_interface* %FRMP_B_instance) | |
store i8 %call8, i8* %deref4, align 1 | |
br label %continue | |
else: ; preds = %25 | |
store i8 1, i8* %init, align 1 | |
%load_tx9 = load i64, i64* %tx, align 4 | |
store i64 %load_tx9, i64* %tl, align 4 | |
%load_tr = load i64, i64* %TR, align 4 | |
store i64 %load_tr, i64* %tn, align 4 | |
%deref10 = load i8*, i8** %RMP, align 8 | |
%load_RMP11 = load i8, i8* %deref10, align 1 | |
store i8 %load_RMP11, i8* %start, align 1 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%load_dir12 = load i8, i8* %DIR, align 1 | |
store i8 %load_dir12, i8* %last_dir, align 1 | |
ret void | |
7: ; preds = %entry | |
%load_init = load i8, i8* %init, align 1 | |
%8 = icmp ne i8 %load_init, 0 | |
br label %9 | |
9: ; preds = %7, %entry | |
%10 = phi i1 [ %2, %entry ], [ %8, %7 ] | |
br i1 %10, label %11, label %15 | |
11: ; preds = %9 | |
%load_dir = load i8, i8* %DIR, align 1 | |
%12 = icmp ne i8 %load_dir, 0 | |
%load_last_dir = load i8, i8* %last_dir, align 1 | |
%13 = icmp ne i8 %load_last_dir, 0 | |
%14 = icmp eq i1 %12, %13 | |
br label %15 | |
15: ; preds = %11, %9 | |
%16 = phi i1 [ %10, %9 ], [ %14, %11 ] | |
br i1 %16, label %17, label %22 | |
17: ; preds = %15 | |
%deref = load i8*, i8** %RMP, align 8 | |
%load_RMP = load i8, i8* %deref, align 1 | |
%18 = zext i8 %load_RMP to i64 | |
%SEL_instance = alloca %SEL_interface, align 8 | |
%19 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 0 | |
%load_DIR = load i8, i8* %DIR, align 1 | |
store i8 %load_DIR, i8* %19, align 1 | |
%20 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 1 | |
store i64 0, i64* %20, align 4 | |
%21 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 2 | |
store i64 255, i64* %21, align 4 | |
%call2 = call i64 @SEL(%SEL_interface* %SEL_instance) | |
%tmpVar = icmp ne i64 %18, %call2 | |
br label %22 | |
22: ; preds = %17, %15 | |
%23 = phi i1 [ %16, %15 ], [ %tmpVar, %17 ] | |
br i1 %23, label %24, label %25 | |
24: ; preds = %22 | |
%load_TR = load i64, i64* %TR, align 4 | |
%load_tn = load i64, i64* %tn, align 4 | |
%tmpVar3 = icmp eq i64 %load_TR, %load_tn | |
br label %25 | |
25: ; preds = %24, %22 | |
%26 = phi i1 [ %23, %22 ], [ %tmpVar3, %24 ] | |
br i1 %26, label %condition_body, label %else | |
} | |
define void @_RMP_NEXT(%_RMP_NEXT_interface* %0) { | |
entry: | |
%E = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 0 | |
%IN = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 1 | |
%TR = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 2 | |
%TF = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 3 | |
%TL = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 4 | |
%DIR = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 5 | |
%UP = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 6 | |
%DN = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 7 | |
%OUT = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 8 | |
%rmx = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 9 | |
%dirx = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 10 | |
%t_lock = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 11 | |
%xen = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 12 | |
%xdir = getelementptr inbounds %_RMP_NEXT_interface, %_RMP_NEXT_interface* %0, i32 0, i32 13 | |
%1 = getelementptr inbounds %TREND_DW_interface, %TREND_DW_interface* %dirx, i32 0, i32 0 | |
%load_in = load i8, i8* %IN, align 1 | |
%2 = zext i8 %load_in to i32 | |
store i32 %2, i32* %1, align 4 | |
call void @TREND_DW(%TREND_DW_interface* %dirx) | |
%3 = getelementptr inbounds %TP_interface, %TP_interface* %t_lock, i32 0, i32 0 | |
store i8 0, i8* %3, align 1 | |
%4 = getelementptr inbounds %TP_interface, %TP_interface* %t_lock, i32 0, i32 1 | |
%load_TL = load i64, i64* %TL, align 4 | |
store i64 %load_TL, i64* %4, align 4 | |
call void @TP(%TP_interface* %t_lock) | |
%TU = getelementptr inbounds %TREND_DW_interface, %TREND_DW_interface* %dirx, i32 0, i32 2 | |
%load_ = load i8, i8* %TU, align 1 | |
%5 = icmp ne i8 %load_, 0 | |
br i1 %5, label %12, label %15 | |
condition_body: ; preds = %15 | |
%load_xdir = load i8, i8* %xdir, align 1 | |
%6 = icmp ne i8 %load_xdir, 0 | |
%tmpVar3 = xor i1 %6, true | |
br i1 %tmpVar3, label %18, label %20 | |
branch: ; preds = %15 | |
%TD = getelementptr inbounds %TREND_DW_interface, %TREND_DW_interface* %dirx, i32 0, i32 3 | |
%load_5 = load i8, i8* %TD, align 1 | |
%7 = icmp ne i8 %load_5, 0 | |
br i1 %7, label %22, label %25 | |
condition_body10: ; preds = %25 | |
%load_xdir12 = load i8, i8* %xdir, align 1 | |
%8 = icmp ne i8 %load_xdir12, 0 | |
br i1 %8, label %28, label %30 | |
branch1: ; preds = %25 | |
%load_xen15 = load i8, i8* %xen, align 1 | |
%9 = icmp ne i8 %load_xen15, 0 | |
br i1 %9, label %condition_body16, label %continue | |
condition_body16: ; preds = %branch1 | |
%load_xdir18 = load i8, i8* %xdir, align 1 | |
%10 = icmp ne i8 %load_xdir18, 0 | |
br i1 %10, label %32, label %35 | |
continue: ; preds = %continue17, %branch1, %continue11, %continue2 | |
%Q = getelementptr inbounds %TP_interface, %TP_interface* %t_lock, i32 0, i32 2 | |
%load_33 = load i8, i8* %Q, align 1 | |
%11 = icmp ne i8 %load_33, 0 | |
%tmpVar34 = xor i1 %11, true | |
br i1 %tmpVar34, label %52, label %54 | |
12: ; preds = %entry | |
%deref = load i8*, i8** %OUT, align 8 | |
%load_OUT = load i8, i8* %deref, align 1 | |
%13 = zext i8 %load_OUT to i32 | |
%load_IN = load i8, i8* %IN, align 1 | |
%14 = zext i8 %load_IN to i32 | |
%tmpVar = icmp slt i32 %13, %14 | |
br label %15 | |
15: ; preds = %12, %entry | |
%16 = phi i1 [ %5, %entry ], [ %tmpVar, %12 ] | |
br i1 %16, label %condition_body, label %branch | |
condition_body4: ; preds = %20 | |
%17 = getelementptr inbounds %TP_interface, %TP_interface* %t_lock, i32 0, i32 0 | |
store i8 1, i8* %17, align 1 | |
call void @TP(%TP_interface* %t_lock) | |
br label %continue2 | |
continue2: ; preds = %condition_body4, %20 | |
store i8 1, i8* %xen, align 1 | |
store i8 1, i8* %xdir, align 1 | |
br label %continue | |
18: ; preds = %condition_body | |
%load_xen = load i8, i8* %xen, align 1 | |
%19 = icmp ne i8 %load_xen, 0 | |
br label %20 | |
20: ; preds = %18, %condition_body | |
%21 = phi i1 [ %tmpVar3, %condition_body ], [ %19, %18 ] | |
br i1 %21, label %condition_body4, label %continue2 | |
22: ; preds = %branch | |
%deref6 = load i8*, i8** %OUT, align 8 | |
%load_OUT7 = load i8, i8* %deref6, align 1 | |
%23 = zext i8 %load_OUT7 to i32 | |
%load_IN8 = load i8, i8* %IN, align 1 | |
%24 = zext i8 %load_IN8 to i32 | |
%tmpVar9 = icmp sgt i32 %23, %24 | |
br label %25 | |
25: ; preds = %22, %branch | |
%26 = phi i1 [ %7, %branch ], [ %tmpVar9, %22 ] | |
br i1 %26, label %condition_body10, label %branch1 | |
condition_body14: ; preds = %30 | |
%27 = getelementptr inbounds %TP_interface, %TP_interface* %t_lock, i32 0, i32 0 | |
store i8 1, i8* %27, align 1 | |
call void @TP(%TP_interface* %t_lock) | |
br label %continue11 | |
continue11: ; preds = %condition_body14, %30 | |
store i8 1, i8* %xen, align 1 | |
store i8 0, i8* %xdir, align 1 | |
br label %continue | |
28: ; preds = %condition_body10 | |
%load_xen13 = load i8, i8* %xen, align 1 | |
%29 = icmp ne i8 %load_xen13, 0 | |
br label %30 | |
30: ; preds = %28, %condition_body10 | |
%31 = phi i1 [ %8, %condition_body10 ], [ %29, %28 ] | |
br i1 %31, label %condition_body14, label %continue11 | |
condition_body28: ; preds = %39 | |
store i8 0, i8* %xen, align 1 | |
%load_tl = load i64, i64* %TL, align 4 | |
%tmpVar30 = icmp sgt i64 %load_tl, 0 | |
br i1 %tmpVar30, label %condition_body31, label %continue29 | |
continue17: ; preds = %continue29, %39 | |
br label %continue | |
32: ; preds = %condition_body16 | |
%deref19 = load i8*, i8** %OUT, align 8 | |
%load_out = load i8, i8* %deref19, align 1 | |
%33 = zext i8 %load_out to i32 | |
%load_in20 = load i8, i8* %IN, align 1 | |
%34 = zext i8 %load_in20 to i32 | |
%tmpVar21 = icmp sge i32 %33, %34 | |
br label %35 | |
35: ; preds = %32, %condition_body16 | |
%36 = phi i1 [ %10, %condition_body16 ], [ %tmpVar21, %32 ] | |
br i1 %36, label %39, label %37 | |
37: ; preds = %35 | |
%load_xdir22 = load i8, i8* %xdir, align 1 | |
%38 = icmp ne i8 %load_xdir22, 0 | |
%tmpVar23 = xor i1 %38, true | |
br i1 %tmpVar23, label %41, label %44 | |
39: ; preds = %44, %35 | |
%40 = phi i1 [ %36, %35 ], [ %45, %44 ] | |
br i1 %40, label %condition_body28, label %continue17 | |
41: ; preds = %37 | |
%deref24 = load i8*, i8** %OUT, align 8 | |
%load_out25 = load i8, i8* %deref24, align 1 | |
%42 = zext i8 %load_out25 to i32 | |
%load_in26 = load i8, i8* %IN, align 1 | |
%43 = zext i8 %load_in26 to i32 | |
%tmpVar27 = icmp sle i32 %42, %43 | |
br label %44 | |
44: ; preds = %41, %37 | |
%45 = phi i1 [ %tmpVar23, %37 ], [ %tmpVar27, %41 ] | |
br label %39 | |
condition_body31: ; preds = %condition_body28 | |
%46 = getelementptr inbounds %TP_interface, %TP_interface* %t_lock, i32 0, i32 0 | |
store i8 1, i8* %46, align 1 | |
call void @TP(%TP_interface* %t_lock) | |
br label %continue29 | |
continue29: ; preds = %condition_body31, %condition_body28 | |
br label %continue17 | |
condition_body36: ; preds = %54 | |
%load_XDIR = load i8, i8* %xdir, align 1 | |
store i8 %load_XDIR, i8* %UP, align 1 | |
%load_XDIR37 = load i8, i8* %xdir, align 1 | |
store i8 %load_XDIR37, i8* %DIR, align 1 | |
%load_XDIR38 = load i8, i8* %xdir, align 1 | |
%47 = icmp ne i8 %load_XDIR38, 0 | |
%tmpVar39 = xor i1 %47, true | |
%48 = zext i1 %tmpVar39 to i8 | |
store i8 %48, i8* %DN, align 1 | |
br label %continue32 | |
else: ; preds = %54 | |
store i8 0, i8* %UP, align 1 | |
store i8 0, i8* %DN, align 1 | |
br label %continue32 | |
continue32: ; preds = %else, %condition_body36 | |
%49 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmx, i32 0, i32 3 | |
%deref40 = load i8*, i8** %OUT, align 8 | |
store i8* %deref40, i8** %49, align 8 | |
%50 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmx, i32 0, i32 1 | |
%load_E = load i8, i8* %E, align 1 | |
%51 = icmp ne i8 %load_E, 0 | |
br i1 %51, label %56, label %58 | |
52: ; preds = %continue | |
%load_xen35 = load i8, i8* %xen, align 1 | |
%53 = icmp ne i8 %load_xen35, 0 | |
br label %54 | |
54: ; preds = %52, %continue | |
%55 = phi i1 [ %tmpVar34, %continue ], [ %53, %52 ] | |
br i1 %55, label %condition_body36, label %else | |
56: ; preds = %continue32 | |
%load_UP = load i8, i8* %UP, align 1 | |
%57 = icmp ne i8 %load_UP, 0 | |
br i1 %57, label %68, label %66 | |
58: ; preds = %68, %continue32 | |
%59 = phi i1 [ %51, %continue32 ], [ %69, %68 ] | |
%60 = zext i1 %59 to i8 | |
store i8 %60, i8* %50, align 1 | |
%61 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmx, i32 0, i32 0 | |
%load_DIR = load i8, i8* %DIR, align 1 | |
store i8 %load_DIR, i8* %61, align 1 | |
%62 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmx, i32 0, i32 2 | |
%SEL_instance = alloca %SEL_interface, align 8 | |
%63 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 0 | |
%load_dir = load i8, i8* %DIR, align 1 | |
store i8 %load_dir, i8* %63, align 1 | |
%64 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 1 | |
%load_TF = load i64, i64* %TF, align 4 | |
store i64 %load_TF, i64* %64, align 4 | |
%65 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 2 | |
%load_TR = load i64, i64* %TR, align 4 | |
store i64 %load_TR, i64* %65, align 4 | |
%call = call i64 @SEL(%SEL_interface* %SEL_instance) | |
store i64 %call, i64* %62, align 4 | |
call void @_RMP_B(%_RMP_B_interface* %rmx) | |
ret void | |
66: ; preds = %56 | |
%load_DN = load i8, i8* %DN, align 1 | |
%67 = icmp ne i8 %load_DN, 0 | |
br label %68 | |
68: ; preds = %66, %56 | |
%69 = phi i1 [ %57, %56 ], [ %67, %66 ] | |
br label %58 | |
} | |
define void @_RMP_W(%_RMP_W_interface* %0) { | |
entry: | |
%DIR = getelementptr inbounds %_RMP_W_interface, %_RMP_W_interface* %0, i32 0, i32 0 | |
%E = getelementptr inbounds %_RMP_W_interface, %_RMP_W_interface* %0, i32 0, i32 1 | |
%TR = getelementptr inbounds %_RMP_W_interface, %_RMP_W_interface* %0, i32 0, i32 2 | |
%RMP = getelementptr inbounds %_RMP_W_interface, %_RMP_W_interface* %0, i32 0, i32 3 | |
%tx = getelementptr inbounds %_RMP_W_interface, %_RMP_W_interface* %0, i32 0, i32 4 | |
%tl = getelementptr inbounds %_RMP_W_interface, %_RMP_W_interface* %0, i32 0, i32 5 | |
%step = getelementptr inbounds %_RMP_W_interface, %_RMP_W_interface* %0, i32 0, i32 6 | |
%init = getelementptr inbounds %_RMP_W_interface, %_RMP_W_interface* %0, i32 0, i32 7 | |
%last_dir = getelementptr inbounds %_RMP_W_interface, %_RMP_W_interface* %0, i32 0, i32 8 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_E = load i8, i8* %E, align 1 | |
%1 = icmp ne i8 %load_E, 0 | |
br i1 %1, label %5, label %7 | |
condition_body: ; preds = %7 | |
%load_dir = load i8, i8* %DIR, align 1 | |
%2 = icmp ne i8 %load_dir, 0 | |
%load_last_dir = load i8, i8* %last_dir, align 1 | |
%3 = icmp ne i8 %load_last_dir, 0 | |
%4 = xor i1 %2, %3 | |
br i1 %4, label %condition_body2, label %continue1 | |
else: ; preds = %7 | |
%load_tx29 = load i32, i32* %tx, align 4 | |
store i32 %load_tx29, i32* %tl, align 4 | |
store i8 1, i8* %init, align 1 | |
br label %continue | |
continue: ; preds = %else, %continue13 | |
ret void | |
5: ; preds = %entry | |
%load_init = load i8, i8* %init, align 1 | |
%6 = icmp ne i8 %load_init, 0 | |
br label %7 | |
7: ; preds = %5, %entry | |
%8 = phi i1 [ %1, %entry ], [ %6, %5 ] | |
br i1 %8, label %condition_body, label %else | |
condition_body2: ; preds = %condition_body | |
%load_tx = load i32, i32* %tx, align 4 | |
store i32 %load_tx, i32* %tl, align 4 | |
%load_dir3 = load i8, i8* %DIR, align 1 | |
store i8 %load_dir3, i8* %last_dir, align 1 | |
br label %continue1 | |
continue1: ; preds = %condition_body2, %condition_body | |
%load_tr = load i64, i64* %TR, align 4 | |
%tmpVar = icmp sgt i64 %load_tr, 0 | |
br i1 %tmpVar, label %condition_body6, label %else4 | |
condition_body6: ; preds = %continue1 | |
%DWORD_TO_DINT_instance = alloca %DWORD_TO_DINT_interface, align 8 | |
%9 = getelementptr inbounds %DWORD_TO_DINT_interface, %DWORD_TO_DINT_interface* %DWORD_TO_DINT_instance, i32 0, i32 0 | |
%SHL_instance = alloca %SHL_interface, align 8 | |
%10 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 0 | |
%load_tx7 = load i32, i32* %tx, align 4 | |
%load_tl = load i32, i32* %tl, align 4 | |
%tmpVar8 = sub i32 %load_tx7, %load_tl | |
%11 = sext i32 %tmpVar8 to i64 | |
store i64 %11, i64* %10, align 4 | |
%12 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 1 | |
store i16 16, i16* %12, align 2 | |
%call9 = call i64 @SHL(%SHL_interface* %SHL_instance) | |
%TIME_TO_DWORD_instance = alloca %TIME_TO_DWORD_interface, align 8 | |
%13 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance, i32 0, i32 0 | |
%load_TR = load i64, i64* %TR, align 4 | |
store i64 %load_TR, i64* %13, align 4 | |
%call10 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance) | |
%14 = zext i32 %call10 to i64 | |
%tmpVar11 = sdiv i64 %call9, %14 | |
%15 = trunc i64 %tmpVar11 to i32 | |
store i32 %15, i32* %9, align 4 | |
%call12 = call i32 @DWORD_TO_DINT(%DWORD_TO_DINT_interface* %DWORD_TO_DINT_instance) | |
store i32 %call12, i32* %step, align 4 | |
br label %continue5 | |
else4: ; preds = %continue1 | |
store i32 65535, i32* %step, align 4 | |
br label %continue5 | |
continue5: ; preds = %else4, %condition_body6 | |
%load_step = load i32, i32* %step, align 4 | |
%tmpVar14 = icmp sgt i32 %load_step, 0 | |
br i1 %tmpVar14, label %condition_body15, label %continue13 | |
condition_body15: ; preds = %continue5 | |
%load_tx16 = load i32, i32* %tx, align 4 | |
store i32 %load_tx16, i32* %tl, align 4 | |
%load_dir18 = load i8, i8* %DIR, align 1 | |
%16 = icmp ne i8 %load_dir18, 0 | |
%tmpVar19 = xor i1 %16, true | |
br i1 %tmpVar19, label %condition_body20, label %continue17 | |
continue13: ; preds = %continue17, %continue5 | |
br label %continue | |
condition_body20: ; preds = %condition_body15 | |
%load_step21 = load i32, i32* %step, align 4 | |
%tmpVar22 = sub i32 0, %load_step21 | |
store i32 %tmpVar22, i32* %step, align 4 | |
br label %continue17 | |
continue17: ; preds = %condition_body20, %condition_body15 | |
%deref = load i16*, i16** %RMP, align 8 | |
%DINT_TO_WORD_instance = alloca %DINT_TO_WORD_interface, align 8 | |
%17 = getelementptr inbounds %DINT_TO_WORD_interface, %DINT_TO_WORD_interface* %DINT_TO_WORD_instance, i32 0, i32 0 | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%18 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
store i64 0, i64* %18, align 4 | |
%19 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%WORD_TO_DINT_instance = alloca %WORD_TO_DINT_interface, align 8 | |
%20 = getelementptr inbounds %WORD_TO_DINT_interface, %WORD_TO_DINT_interface* %WORD_TO_DINT_instance, i32 0, i32 0 | |
%deref23 = load i16*, i16** %RMP, align 8 | |
%load_rmp = load i16, i16* %deref23, align 2 | |
store i16 %load_rmp, i16* %20, align 2 | |
%call24 = call i32 @WORD_TO_DINT(%WORD_TO_DINT_interface* %WORD_TO_DINT_instance) | |
%load_step25 = load i32, i32* %step, align 4 | |
%tmpVar26 = add i32 %call24, %load_step25 | |
%21 = sext i32 %tmpVar26 to i64 | |
store i64 %21, i64* %19, align 4 | |
%22 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
store i64 65535, i64* %22, align 4 | |
%call27 = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%23 = trunc i64 %call27 to i32 | |
store i32 %23, i32* %17, align 4 | |
%call28 = call i16 @DINT_TO_WORD(%DINT_TO_WORD_interface* %DINT_TO_WORD_instance) | |
store i16 %call28, i16* %deref, align 2 | |
br label %continue13 | |
} | |
define void @GEN_PULSE(%GEN_PULSE_interface* %0) { | |
entry: | |
%ENQ = getelementptr inbounds %GEN_PULSE_interface, %GEN_PULSE_interface* %0, i32 0, i32 0 | |
%PTH = getelementptr inbounds %GEN_PULSE_interface, %GEN_PULSE_interface* %0, i32 0, i32 1 | |
%PTL = getelementptr inbounds %GEN_PULSE_interface, %GEN_PULSE_interface* %0, i32 0, i32 2 | |
%Q = getelementptr inbounds %GEN_PULSE_interface, %GEN_PULSE_interface* %0, i32 0, i32 3 | |
%tx = getelementptr inbounds %GEN_PULSE_interface, %GEN_PULSE_interface* %0, i32 0, i32 4 | |
%tn = getelementptr inbounds %GEN_PULSE_interface, %GEN_PULSE_interface* %0, i32 0, i32 5 | |
%init = getelementptr inbounds %GEN_PULSE_interface, %GEN_PULSE_interface* %0, i32 0, i32 6 | |
%load_enq = load i8, i8* %ENQ, align 1 | |
%1 = icmp ne i8 %load_enq, 0 | |
br i1 %1, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%2 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %2, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call1, i64* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%3 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %3, true | |
br i1 %tmpVar, label %condition_body3, label %continue2 | |
else: ; preds = %entry | |
store i8 0, i8* %Q, align 1 | |
store i8 0, i8* %init, align 1 | |
br label %continue | |
continue: ; preds = %else, %continue4 | |
ret void | |
condition_body3: ; preds = %condition_body | |
store i8 1, i8* %init, align 1 | |
%load_tx = load i64, i64* %tx, align 4 | |
store i64 %load_tx, i64* %tn, align 4 | |
br label %continue2 | |
continue2: ; preds = %condition_body3, %condition_body | |
%load_tx5 = load i64, i64* %tx, align 4 | |
%load_tn = load i64, i64* %tn, align 4 | |
%tmpVar6 = sub i64 %load_tx5, %load_tn | |
%SEL_instance = alloca %SEL_interface, align 8 | |
%4 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 0 | |
%load_Q = load i8, i8* %Q, align 1 | |
store i8 %load_Q, i8* %4, align 1 | |
%5 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 1 | |
%load_PTL = load i64, i64* %PTL, align 4 | |
store i64 %load_PTL, i64* %5, align 4 | |
%6 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 2 | |
%load_PTH = load i64, i64* %PTH, align 4 | |
store i64 %load_PTH, i64* %6, align 4 | |
%call7 = call i64 @SEL(%SEL_interface* %SEL_instance) | |
%tmpVar8 = icmp sge i64 %tmpVar6, %call7 | |
br i1 %tmpVar8, label %condition_body9, label %continue4 | |
condition_body9: ; preds = %continue2 | |
%load_tn10 = load i64, i64* %tn, align 4 | |
%SEL_instance11 = alloca %SEL_interface, align 8 | |
%7 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance11, i32 0, i32 0 | |
%load_Q12 = load i8, i8* %Q, align 1 | |
store i8 %load_Q12, i8* %7, align 1 | |
%8 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance11, i32 0, i32 1 | |
%load_PTL13 = load i64, i64* %PTL, align 4 | |
store i64 %load_PTL13, i64* %8, align 4 | |
%9 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance11, i32 0, i32 2 | |
%load_PTH14 = load i64, i64* %PTH, align 4 | |
store i64 %load_PTH14, i64* %9, align 4 | |
%call15 = call i64 @SEL(%SEL_interface* %SEL_instance11) | |
%tmpVar16 = add i64 %load_tn10, %call15 | |
store i64 %tmpVar16, i64* %tn, align 4 | |
%load_Q17 = load i8, i8* %Q, align 1 | |
%10 = icmp ne i8 %load_Q17, 0 | |
%tmpVar18 = xor i1 %10, true | |
%11 = zext i1 %tmpVar18 to i8 | |
store i8 %11, i8* %Q, align 1 | |
br label %continue4 | |
continue4: ; preds = %condition_body9, %continue2 | |
br label %continue | |
} | |
define void @GEN_PW2(%GEN_PW2_interface* %0) { | |
entry: | |
%ENQ = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 0 | |
%TH1 = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 1 | |
%TL1 = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 2 | |
%TH2 = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 3 | |
%TL2 = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 4 | |
%TS = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 5 | |
%Q = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 6 | |
%TH = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 7 | |
%TL = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 8 | |
%t_high = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 9 | |
%t_low = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 10 | |
%tx = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 11 | |
%start = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 12 | |
%init = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 13 | |
%et = getelementptr inbounds %GEN_PW2_interface, %GEN_PW2_interface* %0, i32 0, i32 14 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call1, i64* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%2 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %2, true | |
br i1 %tmpVar, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
%load_tx = load i64, i64* %tx, align 4 | |
store i64 %load_tx, i64* %start, align 4 | |
store i8 1, i8* %init, align 1 | |
store i64 0, i64* %TH, align 4 | |
store i64 0, i64* %TL, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%load_TS = load i8, i8* %TS, align 1 | |
%3 = icmp ne i8 %load_TS, 0 | |
br i1 %3, label %condition_body3, label %else | |
condition_body3: ; preds = %continue | |
%load_TH2 = load i64, i64* %TH2, align 4 | |
store i64 %load_TH2, i64* %t_high, align 4 | |
%load_TL2 = load i64, i64* %TL2, align 4 | |
store i64 %load_TL2, i64* %t_low, align 4 | |
br label %continue2 | |
else: ; preds = %continue | |
%load_TH1 = load i64, i64* %TH1, align 4 | |
store i64 %load_TH1, i64* %t_high, align 4 | |
%load_TL1 = load i64, i64* %TL1, align 4 | |
store i64 %load_TL1, i64* %t_low, align 4 | |
br label %continue2 | |
continue2: ; preds = %else, %condition_body3 | |
%load_ENQ = load i8, i8* %ENQ, align 1 | |
%4 = icmp ne i8 %load_ENQ, 0 | |
br i1 %4, label %condition_body6, label %else4 | |
condition_body6: ; preds = %continue2 | |
%load_tx7 = load i64, i64* %tx, align 4 | |
%load_start = load i64, i64* %start, align 4 | |
%tmpVar8 = sub i64 %load_tx7, %load_start | |
store i64 %tmpVar8, i64* %et, align 4 | |
%load_Q = load i8, i8* %Q, align 1 | |
%5 = icmp ne i8 %load_Q, 0 | |
%tmpVar11 = xor i1 %5, true | |
br i1 %tmpVar11, label %condition_body12, label %else9 | |
else4: ; preds = %continue2 | |
store i8 0, i8* %Q, align 1 | |
store i64 0, i64* %TH, align 4 | |
store i64 0, i64* %TL, align 4 | |
%load_tx26 = load i64, i64* %tx, align 4 | |
store i64 %load_tx26, i64* %start, align 4 | |
br label %continue5 | |
continue5: ; preds = %else4, %continue10 | |
ret void | |
condition_body12: ; preds = %condition_body6 | |
%load_et = load i64, i64* %et, align 4 | |
%load_t_low = load i64, i64* %t_low, align 4 | |
%tmpVar15 = icmp sge i64 %load_et, %load_t_low | |
br i1 %tmpVar15, label %condition_body16, label %else13 | |
else9: ; preds = %condition_body6 | |
%load_et21 = load i64, i64* %et, align 4 | |
%load_t_high = load i64, i64* %t_high, align 4 | |
%tmpVar22 = icmp sge i64 %load_et21, %load_t_high | |
br i1 %tmpVar22, label %condition_body23, label %else19 | |
continue10: ; preds = %continue20, %continue14 | |
br label %continue5 | |
condition_body16: ; preds = %condition_body12 | |
store i8 1, i8* %Q, align 1 | |
%load_tx17 = load i64, i64* %tx, align 4 | |
store i64 %load_tx17, i64* %start, align 4 | |
store i64 0, i64* %TL, align 4 | |
br label %continue14 | |
else13: ; preds = %condition_body12 | |
%load_et18 = load i64, i64* %et, align 4 | |
store i64 %load_et18, i64* %TL, align 4 | |
br label %continue14 | |
continue14: ; preds = %else13, %condition_body16 | |
br label %continue10 | |
condition_body23: ; preds = %else9 | |
store i8 0, i8* %Q, align 1 | |
%load_tx24 = load i64, i64* %tx, align 4 | |
store i64 %load_tx24, i64* %start, align 4 | |
store i64 0, i64* %TH, align 4 | |
br label %continue20 | |
else19: ; preds = %else9 | |
%load_et25 = load i64, i64* %et, align 4 | |
store i64 %load_et25, i64* %TH, align 4 | |
br label %continue20 | |
continue20: ; preds = %else19, %condition_body23 | |
br label %continue10 | |
} | |
define void @GEN_RDM(%GEN_RDM_interface* %0) { | |
entry: | |
%PT = getelementptr inbounds %GEN_RDM_interface, %GEN_RDM_interface* %0, i32 0, i32 0 | |
%AM = getelementptr inbounds %GEN_RDM_interface, %GEN_RDM_interface* %0, i32 0, i32 1 | |
%OS = getelementptr inbounds %GEN_RDM_interface, %GEN_RDM_interface* %0, i32 0, i32 2 | |
%Q = getelementptr inbounds %GEN_RDM_interface, %GEN_RDM_interface* %0, i32 0, i32 3 | |
%Out = getelementptr inbounds %GEN_RDM_interface, %GEN_RDM_interface* %0, i32 0, i32 4 | |
%tx = getelementptr inbounds %GEN_RDM_interface, %GEN_RDM_interface* %0, i32 0, i32 5 | |
%last = getelementptr inbounds %GEN_RDM_interface, %GEN_RDM_interface* %0, i32 0, i32 6 | |
%init = getelementptr inbounds %GEN_RDM_interface, %GEN_RDM_interface* %0, i32 0, i32 7 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
%load_last = load i64, i64* %last, align 4 | |
%tmpVar = sub i64 %call1, %load_last | |
store i64 %tmpVar, i64* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%2 = icmp ne i8 %load_init, 0 | |
%tmpVar2 = xor i1 %2, true | |
br i1 %tmpVar2, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
store i8 1, i8* %init, align 1 | |
%load_tx = load i64, i64* %tx, align 4 | |
store i64 %load_tx, i64* %last, align 4 | |
store i64 0, i64* %tx, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%load_tx4 = load i64, i64* %tx, align 4 | |
%load_pt = load i64, i64* %PT, align 4 | |
%tmpVar5 = icmp sge i64 %load_tx4, %load_pt | |
br i1 %tmpVar5, label %condition_body6, label %else | |
condition_body6: ; preds = %continue | |
%load_last7 = load i64, i64* %last, align 4 | |
%load_pt8 = load i64, i64* %PT, align 4 | |
%tmpVar9 = add i64 %load_last7, %load_pt8 | |
store i64 %tmpVar9, i64* %last, align 4 | |
%load_tx10 = load i64, i64* %tx, align 4 | |
%load_pt11 = load i64, i64* %PT, align 4 | |
%tmpVar12 = sub i64 %load_tx10, %load_pt11 | |
store i64 %tmpVar12, i64* %tx, align 4 | |
%load_am = load float, float* %AM, align 4 | |
%RDM_instance = alloca %RDM_interface, align 8 | |
%3 = getelementptr inbounds %RDM_interface, %RDM_interface* %RDM_instance, i32 0, i32 0 | |
store float 0.000000e+00, float* %3, align 4 | |
%call13 = call float @RDM(%RDM_interface* %RDM_instance) | |
%tmpVar14 = fsub float %call13, 5.000000e-01 | |
%tmpVar15 = fmul float %load_am, %tmpVar14 | |
%load_os = load float, float* %OS, align 4 | |
%tmpVar16 = fadd float %tmpVar15, %load_os | |
store float %tmpVar16, float* %Out, align 4 | |
store i8 1, i8* %Q, align 1 | |
br label %continue3 | |
else: ; preds = %continue | |
store i8 0, i8* %Q, align 1 | |
br label %continue3 | |
continue3: ; preds = %else, %condition_body6 | |
ret void | |
} | |
define void @GEN_RDT(%GEN_RDT_interface* %0) { | |
entry: | |
%Enable = getelementptr inbounds %GEN_RDT_interface, %GEN_RDT_interface* %0, i32 0, i32 0 | |
%Min_Time_ms = getelementptr inbounds %GEN_RDT_interface, %GEN_RDT_interface* %0, i32 0, i32 1 | |
%Max_Time_ms = getelementptr inbounds %GEN_RDT_interface, %GEN_RDT_interface* %0, i32 0, i32 2 | |
%TP_Q = getelementptr inbounds %GEN_RDT_interface, %GEN_RDT_interface* %0, i32 0, i32 3 | |
%xQ = getelementptr inbounds %GEN_RDT_interface, %GEN_RDT_interface* %0, i32 0, i32 4 | |
%tonRDMTimer = getelementptr inbounds %GEN_RDT_interface, %GEN_RDT_interface* %0, i32 0, i32 5 | |
%tof_xQ = getelementptr inbounds %GEN_RDT_interface, %GEN_RDT_interface* %0, i32 0, i32 6 | |
%tRDMTime = getelementptr inbounds %GEN_RDT_interface, %GEN_RDT_interface* %0, i32 0, i32 7 | |
%rRDMTime = getelementptr inbounds %GEN_RDT_interface, %GEN_RDT_interface* %0, i32 0, i32 8 | |
%1 = getelementptr inbounds %TON_interface, %TON_interface* %tonRDMTimer, i32 0, i32 0 | |
%load_Enable = load i8, i8* %Enable, align 1 | |
store i8 %load_Enable, i8* %1, align 1 | |
%2 = getelementptr inbounds %TON_interface, %TON_interface* %tonRDMTimer, i32 0, i32 1 | |
%load_tRDMTime = load i64, i64* %tRDMTime, align 4 | |
store i64 %load_tRDMTime, i64* %2, align 4 | |
call void @TON(%TON_interface* %tonRDMTimer) | |
%3 = getelementptr inbounds %TOF_interface, %TOF_interface* %tof_xQ, i32 0, i32 0 | |
%Q = getelementptr inbounds %TON_interface, %TON_interface* %tonRDMTimer, i32 0, i32 2 | |
%load_ = load i8, i8* %Q, align 1 | |
store i8 %load_, i8* %3, align 1 | |
%4 = getelementptr inbounds %TOF_interface, %TOF_interface* %tof_xQ, i32 0, i32 1 | |
%load_TP_Q = load i64, i64* %TP_Q, align 4 | |
store i64 %load_TP_Q, i64* %4, align 4 | |
call void @TOF(%TOF_interface* %tof_xQ) | |
%Q1 = getelementptr inbounds %TOF_interface, %TOF_interface* %tof_xQ, i32 0, i32 2 | |
%load_2 = load i8, i8* %Q1, align 1 | |
store i8 %load_2, i8* %xQ, align 1 | |
%Q3 = getelementptr inbounds %TON_interface, %TON_interface* %tonRDMTimer, i32 0, i32 2 | |
%load_4 = load i8, i8* %Q3, align 1 | |
%5 = icmp ne i8 %load_4, 0 | |
br i1 %5, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
store i8 1, i8* %xQ, align 1 | |
%RDM_instance = alloca %RDM_interface, align 8 | |
%6 = getelementptr inbounds %RDM_interface, %RDM_interface* %RDM_instance, i32 0, i32 0 | |
%load_rRDMTime = load float, float* %rRDMTime, align 4 | |
store float %load_rRDMTime, float* %6, align 4 | |
%call = call float @RDM(%RDM_interface* %RDM_instance) | |
store float %call, float* %rRDMTime, align 4 | |
%REAL_TO_TIME_instance = alloca %REAL_TO_TIME_interface, align 8 | |
%7 = getelementptr inbounds %REAL_TO_TIME_interface, %REAL_TO_TIME_interface* %REAL_TO_TIME_instance, i32 0, i32 0 | |
%load_rRDMTime5 = load float, float* %rRDMTime, align 4 | |
%DINT_TO_REAL_instance = alloca %DINT_TO_REAL_interface, align 8 | |
%8 = getelementptr inbounds %DINT_TO_REAL_interface, %DINT_TO_REAL_interface* %DINT_TO_REAL_instance, i32 0, i32 0 | |
%TIME_TO_DINT_instance = alloca %TIME_TO_DINT_interface, align 8 | |
%9 = getelementptr inbounds %TIME_TO_DINT_interface, %TIME_TO_DINT_interface* %TIME_TO_DINT_instance, i32 0, i32 0 | |
%load_Max_Time_ms = load i64, i64* %Max_Time_ms, align 4 | |
%load_Min_Time_ms = load i64, i64* %Min_Time_ms, align 4 | |
%tmpVar = sub i64 %load_Max_Time_ms, %load_Min_Time_ms | |
store i64 %tmpVar, i64* %9, align 4 | |
%call6 = call i32 @TIME_TO_DINT(%TIME_TO_DINT_interface* %TIME_TO_DINT_instance) | |
%TIME_TO_DINT_instance7 = alloca %TIME_TO_DINT_interface, align 8 | |
%10 = getelementptr inbounds %TIME_TO_DINT_interface, %TIME_TO_DINT_interface* %TIME_TO_DINT_instance7, i32 0, i32 0 | |
%load_Min_Time_ms8 = load i64, i64* %Min_Time_ms, align 4 | |
store i64 %load_Min_Time_ms8, i64* %10, align 4 | |
%call9 = call i32 @TIME_TO_DINT(%TIME_TO_DINT_interface* %TIME_TO_DINT_instance7) | |
%tmpVar10 = add i32 %call6, %call9 | |
store i32 %tmpVar10, i32* %8, align 4 | |
%call11 = call float @DINT_TO_REAL(%DINT_TO_REAL_interface* %DINT_TO_REAL_instance) | |
%tmpVar12 = fmul float %load_rRDMTime5, %call11 | |
store float %tmpVar12, float* %7, align 4 | |
%call13 = call i64 @REAL_TO_TIME(%REAL_TO_TIME_interface* %REAL_TO_TIME_instance) | |
store i64 %call13, i64* %tRDMTime, align 4 | |
%11 = getelementptr inbounds %TON_interface, %TON_interface* %tonRDMTimer, i32 0, i32 0 | |
store i8 0, i8* %11, align 1 | |
call void @TON(%TON_interface* %tonRDMTimer) | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
ret void | |
} | |
define void @GEN_RMP(%GEN_RMP_interface* %0) { | |
entry: | |
%PT = getelementptr inbounds %GEN_RMP_interface, %GEN_RMP_interface* %0, i32 0, i32 0 | |
%AM = getelementptr inbounds %GEN_RMP_interface, %GEN_RMP_interface* %0, i32 0, i32 1 | |
%OS = getelementptr inbounds %GEN_RMP_interface, %GEN_RMP_interface* %0, i32 0, i32 2 | |
%DL = getelementptr inbounds %GEN_RMP_interface, %GEN_RMP_interface* %0, i32 0, i32 3 | |
%Q = getelementptr inbounds %GEN_RMP_interface, %GEN_RMP_interface* %0, i32 0, i32 4 | |
%OUT = getelementptr inbounds %GEN_RMP_interface, %GEN_RMP_interface* %0, i32 0, i32 5 | |
%tx = getelementptr inbounds %GEN_RMP_interface, %GEN_RMP_interface* %0, i32 0, i32 6 | |
%last = getelementptr inbounds %GEN_RMP_interface, %GEN_RMP_interface* %0, i32 0, i32 7 | |
%init = getelementptr inbounds %GEN_RMP_interface, %GEN_RMP_interface* %0, i32 0, i32 8 | |
%temp = getelementptr inbounds %GEN_RMP_interface, %GEN_RMP_interface* %0, i32 0, i32 9 | |
%ltemp = getelementptr inbounds %GEN_RMP_interface, %GEN_RMP_interface* %0, i32 0, i32 10 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
%load_last = load i64, i64* %last, align 4 | |
%tmpVar = sub i64 %call1, %load_last | |
store i64 %tmpVar, i64* %tx, align 4 | |
%MODR_instance = alloca %MODR_interface, align 8 | |
%2 = getelementptr inbounds %MODR_interface, %MODR_interface* %MODR_instance, i32 0, i32 0 | |
%load_dl = load float, float* %DL, align 4 | |
store float %load_dl, float* %2, align 4 | |
%3 = getelementptr inbounds %MODR_interface, %MODR_interface* %MODR_instance, i32 0, i32 1 | |
store float 1.000000e+00, float* %3, align 4 | |
%call2 = call float @MODR(%MODR_interface* %MODR_instance) | |
store float %call2, float* %DL, align 4 | |
%load_dl3 = load float, float* %DL, align 4 | |
%tmpVar4 = fcmp olt float %load_dl3, 0.000000e+00 | |
br i1 %tmpVar4, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
%load_dl5 = load float, float* %DL, align 4 | |
%tmpVar6 = fsub float 1.000000e+00, %load_dl5 | |
store float %tmpVar6, float* %DL, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%load_init = load i8, i8* %init, align 1 | |
%4 = icmp ne i8 %load_init, 0 | |
%tmpVar8 = xor i1 %4, true | |
br i1 %tmpVar8, label %condition_body9, label %continue7 | |
condition_body9: ; preds = %continue | |
store i8 1, i8* %init, align 1 | |
%load_tx = load i64, i64* %tx, align 4 | |
store i64 %load_tx, i64* %last, align 4 | |
store i64 0, i64* %tx, align 4 | |
br label %continue7 | |
continue7: ; preds = %condition_body9, %continue | |
%load_tx11 = load i64, i64* %tx, align 4 | |
%load_pt = load i64, i64* %PT, align 4 | |
%tmpVar12 = icmp sge i64 %load_tx11, %load_pt | |
br i1 %tmpVar12, label %condition_body13, label %continue10 | |
condition_body13: ; preds = %continue7 | |
%load_last14 = load i64, i64* %last, align 4 | |
%load_pt15 = load i64, i64* %PT, align 4 | |
%tmpVar16 = add i64 %load_last14, %load_pt15 | |
store i64 %tmpVar16, i64* %last, align 4 | |
%load_tx17 = load i64, i64* %tx, align 4 | |
%load_pt18 = load i64, i64* %PT, align 4 | |
%tmpVar19 = sub i64 %load_tx17, %load_pt18 | |
store i64 %tmpVar19, i64* %tx, align 4 | |
br label %continue10 | |
continue10: ; preds = %condition_body13, %continue7 | |
%load_temp = load float, float* %temp, align 4 | |
store float %load_temp, float* %ltemp, align 4 | |
%load_pt21 = load i64, i64* %PT, align 4 | |
%tmpVar22 = icmp sgt i64 %load_pt21, 0 | |
br i1 %tmpVar22, label %condition_body23, label %continue20 | |
condition_body23: ; preds = %continue10 | |
%FRACT_instance = alloca %FRACT_interface, align 8 | |
%5 = getelementptr inbounds %FRACT_interface, %FRACT_interface* %FRACT_instance, i32 0, i32 0 | |
%TIME_TO_REAL_instance = alloca %TIME_TO_REAL_interface, align 8 | |
%6 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance, i32 0, i32 0 | |
%load_tx24 = load i64, i64* %tx, align 4 | |
%MULTIME_instance = alloca %MULTIME_interface, align 8 | |
%7 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance, i32 0, i32 0 | |
%load_pt25 = load i64, i64* %PT, align 4 | |
store i64 %load_pt25, i64* %7, align 4 | |
%8 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance, i32 0, i32 1 | |
%load_dl26 = load float, float* %DL, align 4 | |
store float %load_dl26, float* %8, align 4 | |
%call27 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance) | |
%tmpVar28 = add i64 %load_tx24, %call27 | |
store i64 %tmpVar28, i64* %6, align 4 | |
%call29 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance) | |
%TIME_TO_REAL_instance30 = alloca %TIME_TO_REAL_interface, align 8 | |
%9 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance30, i32 0, i32 0 | |
%load_pt31 = load i64, i64* %PT, align 4 | |
store i64 %load_pt31, i64* %9, align 4 | |
%call32 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance30) | |
%tmpVar33 = fdiv float %call29, %call32 | |
store float %tmpVar33, float* %5, align 4 | |
%call34 = call float @FRACT(%FRACT_interface* %FRACT_instance) | |
store float %call34, float* %temp, align 4 | |
br label %continue20 | |
continue20: ; preds = %condition_body23, %continue10 | |
%load_am = load float, float* %AM, align 4 | |
%load_temp35 = load float, float* %temp, align 4 | |
%tmpVar36 = fmul float %load_am, %load_temp35 | |
%load_os = load float, float* %OS, align 4 | |
%tmpVar37 = fadd float %tmpVar36, %load_os | |
store float %tmpVar37, float* %OUT, align 4 | |
%load_temp38 = load float, float* %temp, align 4 | |
%load_ltemp = load float, float* %ltemp, align 4 | |
%tmpVar39 = fcmp olt float %load_temp38, %load_ltemp | |
%10 = zext i1 %tmpVar39 to i8 | |
store i8 %10, i8* %Q, align 1 | |
ret void | |
} | |
define void @GEN_SIN(%GEN_SIN_interface* %0) { | |
entry: | |
%PT = getelementptr inbounds %GEN_SIN_interface, %GEN_SIN_interface* %0, i32 0, i32 0 | |
%AM = getelementptr inbounds %GEN_SIN_interface, %GEN_SIN_interface* %0, i32 0, i32 1 | |
%OS = getelementptr inbounds %GEN_SIN_interface, %GEN_SIN_interface* %0, i32 0, i32 2 | |
%DL = getelementptr inbounds %GEN_SIN_interface, %GEN_SIN_interface* %0, i32 0, i32 3 | |
%Q = getelementptr inbounds %GEN_SIN_interface, %GEN_SIN_interface* %0, i32 0, i32 4 | |
%Out = getelementptr inbounds %GEN_SIN_interface, %GEN_SIN_interface* %0, i32 0, i32 5 | |
%tx = getelementptr inbounds %GEN_SIN_interface, %GEN_SIN_interface* %0, i32 0, i32 6 | |
%last = getelementptr inbounds %GEN_SIN_interface, %GEN_SIN_interface* %0, i32 0, i32 7 | |
%init = getelementptr inbounds %GEN_SIN_interface, %GEN_SIN_interface* %0, i32 0, i32 8 | |
%temp = getelementptr inbounds %GEN_SIN_interface, %GEN_SIN_interface* %0, i32 0, i32 9 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
%load_last = load i64, i64* %last, align 4 | |
%tmpVar = sub i64 %call1, %load_last | |
store i64 %tmpVar, i64* %tx, align 4 | |
%MODR_instance = alloca %MODR_interface, align 8 | |
%2 = getelementptr inbounds %MODR_interface, %MODR_interface* %MODR_instance, i32 0, i32 0 | |
%load_dl = load float, float* %DL, align 4 | |
store float %load_dl, float* %2, align 4 | |
%3 = getelementptr inbounds %MODR_interface, %MODR_interface* %MODR_instance, i32 0, i32 1 | |
store float 1.000000e+00, float* %3, align 4 | |
%call2 = call float @MODR(%MODR_interface* %MODR_instance) | |
store float %call2, float* %DL, align 4 | |
%load_dl3 = load float, float* %DL, align 4 | |
%tmpVar4 = fcmp olt float %load_dl3, 0.000000e+00 | |
br i1 %tmpVar4, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
%load_dl5 = load float, float* %DL, align 4 | |
%tmpVar6 = fsub float 1.000000e+00, %load_dl5 | |
store float %tmpVar6, float* %DL, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%load_init = load i8, i8* %init, align 1 | |
%4 = icmp ne i8 %load_init, 0 | |
%tmpVar8 = xor i1 %4, true | |
br i1 %tmpVar8, label %condition_body9, label %continue7 | |
condition_body9: ; preds = %continue | |
store i8 1, i8* %init, align 1 | |
%load_tx = load i64, i64* %tx, align 4 | |
store i64 %load_tx, i64* %last, align 4 | |
store i64 0, i64* %tx, align 4 | |
br label %continue7 | |
continue7: ; preds = %condition_body9, %continue | |
%load_tx11 = load i64, i64* %tx, align 4 | |
%load_pt = load i64, i64* %PT, align 4 | |
%tmpVar12 = icmp sge i64 %load_tx11, %load_pt | |
br i1 %tmpVar12, label %condition_body13, label %continue10 | |
condition_body13: ; preds = %continue7 | |
%load_last14 = load i64, i64* %last, align 4 | |
%load_pt15 = load i64, i64* %PT, align 4 | |
%tmpVar16 = add i64 %load_last14, %load_pt15 | |
store i64 %tmpVar16, i64* %last, align 4 | |
%load_tx17 = load i64, i64* %tx, align 4 | |
%load_pt18 = load i64, i64* %PT, align 4 | |
%tmpVar19 = sub i64 %load_tx17, %load_pt18 | |
store i64 %tmpVar19, i64* %tx, align 4 | |
br label %continue10 | |
continue10: ; preds = %condition_body13, %continue7 | |
%load_pt21 = load i64, i64* %PT, align 4 | |
%tmpVar22 = icmp sgt i64 %load_pt21, 0 | |
br i1 %tmpVar22, label %condition_body23, label %continue20 | |
condition_body23: ; preds = %continue10 | |
%SIN_instance = alloca %SIN_interface, align 8 | |
%5 = getelementptr inbounds %SIN_interface, %SIN_interface* %SIN_instance, i32 0, i32 0 | |
%load_ = load float, float* getelementptr inbounds (%CONSTANTS_MATH, %CONSTANTS_MATH* @MATH, i32 0, i32 1), align 4 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%6 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%TIME_TO_DWORD_instance = alloca %TIME_TO_DWORD_interface, align 8 | |
%7 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance, i32 0, i32 0 | |
%load_tx24 = load i64, i64* %tx, align 4 | |
%MULTIME_instance = alloca %MULTIME_interface, align 8 | |
%8 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance, i32 0, i32 0 | |
%load_pt25 = load i64, i64* %PT, align 4 | |
store i64 %load_pt25, i64* %8, align 4 | |
%9 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance, i32 0, i32 1 | |
%load_dl26 = load float, float* %DL, align 4 | |
store float %load_dl26, float* %9, align 4 | |
%call27 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance) | |
%tmpVar28 = add i64 %load_tx24, %call27 | |
store i64 %tmpVar28, i64* %7, align 4 | |
%call29 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance) | |
store i32 %call29, i32* %6, align 4 | |
%call30 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%tmpVar31 = fmul float %load_, %call30 | |
%DWORD_TO_REAL_instance32 = alloca %DWORD_TO_REAL_interface, align 8 | |
%10 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance32, i32 0, i32 0 | |
%TIME_TO_DWORD_instance33 = alloca %TIME_TO_DWORD_interface, align 8 | |
%11 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance33, i32 0, i32 0 | |
%load_pt34 = load i64, i64* %PT, align 4 | |
store i64 %load_pt34, i64* %11, align 4 | |
%call35 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance33) | |
store i32 %call35, i32* %10, align 4 | |
%call36 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance32) | |
%tmpVar37 = fdiv float %tmpVar31, %call36 | |
%12 = fptosi float %tmpVar37 to i32 | |
store i32 %12, i32* %5, align 4 | |
%call38 = call double @SIN(%SIN_interface* %SIN_instance) | |
%13 = fptrunc double %call38 to float | |
store float %13, float* %temp, align 4 | |
br label %continue20 | |
continue20: ; preds = %condition_body23, %continue10 | |
%load_am = load float, float* %AM, align 4 | |
%tmpVar39 = fmul float %load_am, 5.000000e-01 | |
%load_temp = load float, float* %temp, align 4 | |
%tmpVar40 = fmul float %tmpVar39, %load_temp | |
%load_os = load float, float* %OS, align 4 | |
%tmpVar41 = fadd float %tmpVar40, %load_os | |
store float %tmpVar41, float* %Out, align 4 | |
%SIGN_R_instance = alloca %SIGN_R_interface, align 8 | |
%14 = getelementptr inbounds %SIGN_R_interface, %SIGN_R_interface* %SIGN_R_instance, i32 0, i32 0 | |
%load_temp42 = load float, float* %temp, align 4 | |
store float %load_temp42, float* %14, align 4 | |
%call43 = call i8 @SIGN_R(%SIGN_R_interface* %SIGN_R_instance) | |
%15 = icmp ne i8 %call43, 0 | |
%tmpVar44 = xor i1 %15, true | |
%16 = zext i1 %tmpVar44 to i8 | |
store i8 %16, i8* %Q, align 1 | |
ret void | |
} | |
define void @GEN_SQR(%GEN_SQR_interface* %0) { | |
entry: | |
%PT = getelementptr inbounds %GEN_SQR_interface, %GEN_SQR_interface* %0, i32 0, i32 0 | |
%AM = getelementptr inbounds %GEN_SQR_interface, %GEN_SQR_interface* %0, i32 0, i32 1 | |
%OS = getelementptr inbounds %GEN_SQR_interface, %GEN_SQR_interface* %0, i32 0, i32 2 | |
%DC = getelementptr inbounds %GEN_SQR_interface, %GEN_SQR_interface* %0, i32 0, i32 3 | |
%DL = getelementptr inbounds %GEN_SQR_interface, %GEN_SQR_interface* %0, i32 0, i32 4 | |
%Q = getelementptr inbounds %GEN_SQR_interface, %GEN_SQR_interface* %0, i32 0, i32 5 | |
%Out = getelementptr inbounds %GEN_SQR_interface, %GEN_SQR_interface* %0, i32 0, i32 6 | |
%tx = getelementptr inbounds %GEN_SQR_interface, %GEN_SQR_interface* %0, i32 0, i32 7 | |
%last = getelementptr inbounds %GEN_SQR_interface, %GEN_SQR_interface* %0, i32 0, i32 8 | |
%init = getelementptr inbounds %GEN_SQR_interface, %GEN_SQR_interface* %0, i32 0, i32 9 | |
%load_dc = load float, float* %DC, align 4 | |
%tmpVar = fcmp oeq float %load_dc, 0.000000e+00 | |
br i1 %tmpVar, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%load_am = load float, float* %AM, align 4 | |
%tmpVar1 = fneg float %load_am | |
%tmpVar2 = fmul float %tmpVar1, 5.000000e-01 | |
%load_os = load float, float* %OS, align 4 | |
%tmpVar3 = fadd float %tmpVar2, %load_os | |
store float %tmpVar3, float* %Out, align 4 | |
store i8 0, i8* %Q, align 1 | |
ret void | |
buffer_block: ; No predecessors! | |
br label %continue | |
branch: ; preds = %entry | |
%load_dc4 = load float, float* %DC, align 4 | |
%tmpVar5 = fcmp oeq float %load_dc4, 1.000000e+00 | |
br i1 %tmpVar5, label %condition_body6, label %continue | |
condition_body6: ; preds = %branch | |
%load_am7 = load float, float* %AM, align 4 | |
%tmpVar8 = fmul float %load_am7, 5.000000e-01 | |
%load_os9 = load float, float* %OS, align 4 | |
%tmpVar10 = fadd float %tmpVar8, %load_os9 | |
store float %tmpVar10, float* %Out, align 4 | |
store i8 1, i8* %Q, align 1 | |
ret void | |
buffer_block11: ; No predecessors! | |
br label %continue | |
continue: ; preds = %buffer_block11, %branch, %buffer_block | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call12 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
%load_last = load i64, i64* %last, align 4 | |
%tmpVar13 = sub i64 %call12, %load_last | |
store i64 %tmpVar13, i64* %tx, align 4 | |
%MODR_instance = alloca %MODR_interface, align 8 | |
%2 = getelementptr inbounds %MODR_interface, %MODR_interface* %MODR_instance, i32 0, i32 0 | |
%load_dl = load float, float* %DL, align 4 | |
store float %load_dl, float* %2, align 4 | |
%3 = getelementptr inbounds %MODR_interface, %MODR_interface* %MODR_instance, i32 0, i32 1 | |
store float 1.000000e+00, float* %3, align 4 | |
%call14 = call float @MODR(%MODR_interface* %MODR_instance) | |
store float %call14, float* %DL, align 4 | |
%load_dl16 = load float, float* %DL, align 4 | |
%tmpVar17 = fcmp olt float %load_dl16, 0.000000e+00 | |
br i1 %tmpVar17, label %condition_body18, label %continue15 | |
condition_body18: ; preds = %continue | |
%load_dl19 = load float, float* %DL, align 4 | |
%tmpVar20 = fsub float 1.000000e+00, %load_dl19 | |
store float %tmpVar20, float* %DL, align 4 | |
br label %continue15 | |
continue15: ; preds = %condition_body18, %continue | |
%MODR_instance21 = alloca %MODR_interface, align 8 | |
%4 = getelementptr inbounds %MODR_interface, %MODR_interface* %MODR_instance21, i32 0, i32 0 | |
%load_dc22 = load float, float* %DC, align 4 | |
store float %load_dc22, float* %4, align 4 | |
%5 = getelementptr inbounds %MODR_interface, %MODR_interface* %MODR_instance21, i32 0, i32 1 | |
store float 1.000000e+00, float* %5, align 4 | |
%call23 = call float @MODR(%MODR_interface* %MODR_instance21) | |
store float %call23, float* %DC, align 4 | |
%load_dc25 = load float, float* %DC, align 4 | |
%tmpVar26 = fcmp olt float %load_dc25, 0.000000e+00 | |
br i1 %tmpVar26, label %condition_body27, label %continue24 | |
condition_body27: ; preds = %continue15 | |
%load_dc28 = load float, float* %DC, align 4 | |
%tmpVar29 = fsub float 1.000000e+00, %load_dc28 | |
store float %tmpVar29, float* %DC, align 4 | |
br label %continue24 | |
continue24: ; preds = %condition_body27, %continue15 | |
%load_init = load i8, i8* %init, align 1 | |
%6 = icmp ne i8 %load_init, 0 | |
%tmpVar31 = xor i1 %6, true | |
br i1 %tmpVar31, label %condition_body32, label %continue30 | |
condition_body32: ; preds = %continue24 | |
store i8 1, i8* %init, align 1 | |
%load_tx = load i64, i64* %tx, align 4 | |
store i64 %load_tx, i64* %last, align 4 | |
store i64 0, i64* %tx, align 4 | |
br label %continue30 | |
continue30: ; preds = %condition_body32, %continue24 | |
%load_tx34 = load i64, i64* %tx, align 4 | |
%load_pt = load i64, i64* %PT, align 4 | |
%tmpVar35 = icmp sge i64 %load_tx34, %load_pt | |
br i1 %tmpVar35, label %condition_body36, label %continue33 | |
condition_body36: ; preds = %continue30 | |
%load_last37 = load i64, i64* %last, align 4 | |
%load_pt38 = load i64, i64* %PT, align 4 | |
%tmpVar39 = add i64 %load_last37, %load_pt38 | |
store i64 %tmpVar39, i64* %last, align 4 | |
%load_tx40 = load i64, i64* %tx, align 4 | |
%load_pt41 = load i64, i64* %PT, align 4 | |
%tmpVar42 = sub i64 %load_tx40, %load_pt41 | |
store i64 %tmpVar42, i64* %tx, align 4 | |
br label %continue33 | |
continue33: ; preds = %condition_body36, %continue30 | |
%MULTIME_instance = alloca %MULTIME_interface, align 8 | |
%7 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance, i32 0, i32 0 | |
%load_pt44 = load i64, i64* %PT, align 4 | |
store i64 %load_pt44, i64* %7, align 4 | |
%8 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance, i32 0, i32 1 | |
%load_dl45 = load float, float* %DL, align 4 | |
%load_dc46 = load float, float* %DC, align 4 | |
%tmpVar47 = fadd float %load_dl45, %load_dc46 | |
store float %tmpVar47, float* %8, align 4 | |
%call48 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance) | |
%load_pt49 = load i64, i64* %PT, align 4 | |
%tmpVar50 = icmp sge i64 %call48, %load_pt49 | |
br i1 %tmpVar50, label %condition_body51, label %else | |
condition_body51: ; preds = %continue33 | |
%load_tx53 = load i64, i64* %tx, align 4 | |
%MULTIME_instance54 = alloca %MULTIME_interface, align 8 | |
%9 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance54, i32 0, i32 0 | |
%load_pt55 = load i64, i64* %PT, align 4 | |
store i64 %load_pt55, i64* %9, align 4 | |
%10 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance54, i32 0, i32 1 | |
%load_dl56 = load float, float* %DL, align 4 | |
%load_dc57 = load float, float* %DC, align 4 | |
%tmpVar58 = fadd float %load_dl56, %load_dc57 | |
%tmpVar59 = fsub float %tmpVar58, 1.000000e+00 | |
store float %tmpVar59, float* %10, align 4 | |
%call60 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance54) | |
%tmpVar61 = icmp sge i64 %load_tx53, %call60 | |
br i1 %tmpVar61, label %condition_body62, label %continue52 | |
else: ; preds = %continue33 | |
%load_tx81 = load i64, i64* %tx, align 4 | |
%MULTIME_instance82 = alloca %MULTIME_interface, align 8 | |
%11 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance82, i32 0, i32 0 | |
%load_pt83 = load i64, i64* %PT, align 4 | |
store i64 %load_pt83, i64* %11, align 4 | |
%12 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance82, i32 0, i32 1 | |
%load_dl84 = load float, float* %DL, align 4 | |
store float %load_dl84, float* %12, align 4 | |
%call85 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance82) | |
%tmpVar86 = icmp sge i64 %load_tx81, %call85 | |
br i1 %tmpVar86, label %condition_body87, label %continue80 | |
continue43: ; preds = %continue92, %continue68 | |
ret void | |
condition_body62: ; preds = %condition_body51 | |
%load_am63 = load float, float* %AM, align 4 | |
%tmpVar64 = fneg float %load_am63 | |
%tmpVar65 = fmul float %tmpVar64, 5.000000e-01 | |
%load_os66 = load float, float* %OS, align 4 | |
%tmpVar67 = fadd float %tmpVar65, %load_os66 | |
store float %tmpVar67, float* %Out, align 4 | |
store i8 0, i8* %Q, align 1 | |
br label %continue52 | |
continue52: ; preds = %condition_body62, %condition_body51 | |
%load_tx69 = load i64, i64* %tx, align 4 | |
%MULTIME_instance70 = alloca %MULTIME_interface, align 8 | |
%13 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance70, i32 0, i32 0 | |
%load_pt71 = load i64, i64* %PT, align 4 | |
store i64 %load_pt71, i64* %13, align 4 | |
%14 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance70, i32 0, i32 1 | |
%load_dl72 = load float, float* %DL, align 4 | |
store float %load_dl72, float* %14, align 4 | |
%call73 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance70) | |
%tmpVar74 = icmp sge i64 %load_tx69, %call73 | |
br i1 %tmpVar74, label %condition_body75, label %continue68 | |
condition_body75: ; preds = %continue52 | |
%load_am76 = load float, float* %AM, align 4 | |
%tmpVar77 = fmul float %load_am76, 5.000000e-01 | |
%load_os78 = load float, float* %OS, align 4 | |
%tmpVar79 = fadd float %tmpVar77, %load_os78 | |
store float %tmpVar79, float* %Out, align 4 | |
store i8 1, i8* %Q, align 1 | |
br label %continue68 | |
continue68: ; preds = %condition_body75, %continue52 | |
br label %continue43 | |
condition_body87: ; preds = %else | |
%load_am88 = load float, float* %AM, align 4 | |
%tmpVar89 = fmul float %load_am88, 5.000000e-01 | |
%load_os90 = load float, float* %OS, align 4 | |
%tmpVar91 = fadd float %tmpVar89, %load_os90 | |
store float %tmpVar91, float* %Out, align 4 | |
store i8 1, i8* %Q, align 1 | |
br label %continue80 | |
continue80: ; preds = %condition_body87, %else | |
%load_tx93 = load i64, i64* %tx, align 4 | |
%MULTIME_instance94 = alloca %MULTIME_interface, align 8 | |
%15 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance94, i32 0, i32 0 | |
%load_pt95 = load i64, i64* %PT, align 4 | |
store i64 %load_pt95, i64* %15, align 4 | |
%16 = getelementptr inbounds %MULTIME_interface, %MULTIME_interface* %MULTIME_instance94, i32 0, i32 1 | |
%load_dl96 = load float, float* %DL, align 4 | |
%load_dc97 = load float, float* %DC, align 4 | |
%tmpVar98 = fadd float %load_dl96, %load_dc97 | |
store float %tmpVar98, float* %16, align 4 | |
%call99 = call i64 @MULTIME(%MULTIME_interface* %MULTIME_instance94) | |
%tmpVar100 = icmp sge i64 %load_tx93, %call99 | |
br i1 %tmpVar100, label %condition_body101, label %continue92 | |
condition_body101: ; preds = %continue80 | |
%load_am102 = load float, float* %AM, align 4 | |
%tmpVar103 = fneg float %load_am102 | |
%tmpVar104 = fmul float %tmpVar103, 5.000000e-01 | |
%load_os105 = load float, float* %OS, align 4 | |
%tmpVar106 = fadd float %tmpVar104, %load_os105 | |
store float %tmpVar106, float* %Out, align 4 | |
store i8 0, i8* %Q, align 1 | |
br label %continue92 | |
continue92: ; preds = %condition_body101, %continue80 | |
br label %continue43 | |
} | |
define void @PWM_DC(%PWM_DC_interface* %0) { | |
entry: | |
%F = getelementptr inbounds %PWM_DC_interface, %PWM_DC_interface* %0, i32 0, i32 0 | |
%DC = getelementptr inbounds %PWM_DC_interface, %PWM_DC_interface* %0, i32 0, i32 1 | |
%Q = getelementptr inbounds %PWM_DC_interface, %PWM_DC_interface* %0, i32 0, i32 2 | |
%clk = getelementptr inbounds %PWM_DC_interface, %PWM_DC_interface* %0, i32 0, i32 3 | |
%pulse = getelementptr inbounds %PWM_DC_interface, %PWM_DC_interface* %0, i32 0, i32 4 | |
%tmp = getelementptr inbounds %PWM_DC_interface, %PWM_DC_interface* %0, i32 0, i32 5 | |
%load_F = load float, float* %F, align 4 | |
%tmpVar = fcmp ogt float %load_F, 0.000000e+00 | |
br i1 %tmpVar, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
%load_F1 = load float, float* %F, align 4 | |
%tmpVar2 = fdiv float 1.000000e+03, %load_F1 | |
store float %tmpVar2, float* %tmp, align 4 | |
%1 = getelementptr inbounds %CLK_PRG_interface, %CLK_PRG_interface* %clk, i32 0, i32 0 | |
%REAL_TO_TIME_instance = alloca %REAL_TO_TIME_interface, align 8 | |
%2 = getelementptr inbounds %REAL_TO_TIME_interface, %REAL_TO_TIME_interface* %REAL_TO_TIME_instance, i32 0, i32 0 | |
%load_tmp = load float, float* %tmp, align 4 | |
store float %load_tmp, float* %2, align 4 | |
%call = call i64 @REAL_TO_TIME(%REAL_TO_TIME_interface* %REAL_TO_TIME_instance) | |
store i64 %call, i64* %1, align 4 | |
call void @CLK_PRG(%CLK_PRG_interface* %clk) | |
%3 = getelementptr inbounds %TP_X_interface, %TP_X_interface* %pulse, i32 0, i32 0 | |
%Q3 = getelementptr inbounds %CLK_PRG_interface, %CLK_PRG_interface* %clk, i32 0, i32 1 | |
%load_ = load i8, i8* %Q3, align 1 | |
store i8 %load_, i8* %3, align 1 | |
%4 = getelementptr inbounds %TP_X_interface, %TP_X_interface* %pulse, i32 0, i32 1 | |
%REAL_TO_TIME_instance4 = alloca %REAL_TO_TIME_interface, align 8 | |
%5 = getelementptr inbounds %REAL_TO_TIME_interface, %REAL_TO_TIME_interface* %REAL_TO_TIME_instance4, i32 0, i32 0 | |
%load_tmp5 = load float, float* %tmp, align 4 | |
%load_DC = load float, float* %DC, align 4 | |
%tmpVar6 = fmul float %load_tmp5, %load_DC | |
store float %tmpVar6, float* %5, align 4 | |
%call7 = call i64 @REAL_TO_TIME(%REAL_TO_TIME_interface* %REAL_TO_TIME_instance4) | |
store i64 %call7, i64* %4, align 4 | |
call void @TP_X(%TP_X_interface* %pulse) | |
%Q8 = getelementptr inbounds %TP_X_interface, %TP_X_interface* %pulse, i32 0, i32 2 | |
%load_9 = load i8, i8* %Q8, align 1 | |
store i8 %load_9, i8* %Q, align 1 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
ret void | |
} | |
define void @PWM_PW(%PWM_PW_interface* %0) { | |
entry: | |
%F = getelementptr inbounds %PWM_PW_interface, %PWM_PW_interface* %0, i32 0, i32 0 | |
%PW = getelementptr inbounds %PWM_PW_interface, %PWM_PW_interface* %0, i32 0, i32 1 | |
%Q = getelementptr inbounds %PWM_PW_interface, %PWM_PW_interface* %0, i32 0, i32 2 | |
%clk = getelementptr inbounds %PWM_PW_interface, %PWM_PW_interface* %0, i32 0, i32 3 | |
%pulse = getelementptr inbounds %PWM_PW_interface, %PWM_PW_interface* %0, i32 0, i32 4 | |
%load_F = load float, float* %F, align 4 | |
%tmpVar = fcmp ogt float %load_F, 0.000000e+00 | |
br i1 %tmpVar, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
%1 = getelementptr inbounds %CLK_PRG_interface, %CLK_PRG_interface* %clk, i32 0, i32 0 | |
%REAL_TO_TIME_instance = alloca %REAL_TO_TIME_interface, align 8 | |
%2 = getelementptr inbounds %REAL_TO_TIME_interface, %REAL_TO_TIME_interface* %REAL_TO_TIME_instance, i32 0, i32 0 | |
%load_F1 = load float, float* %F, align 4 | |
%tmpVar2 = fdiv float 1.000000e+03, %load_F1 | |
store float %tmpVar2, float* %2, align 4 | |
%call = call i64 @REAL_TO_TIME(%REAL_TO_TIME_interface* %REAL_TO_TIME_instance) | |
store i64 %call, i64* %1, align 4 | |
call void @CLK_PRG(%CLK_PRG_interface* %clk) | |
%3 = getelementptr inbounds %TP_X_interface, %TP_X_interface* %pulse, i32 0, i32 0 | |
%Q3 = getelementptr inbounds %CLK_PRG_interface, %CLK_PRG_interface* %clk, i32 0, i32 1 | |
%load_ = load i8, i8* %Q3, align 1 | |
store i8 %load_, i8* %3, align 1 | |
%4 = getelementptr inbounds %TP_X_interface, %TP_X_interface* %pulse, i32 0, i32 1 | |
%load_pw = load i64, i64* %PW, align 4 | |
store i64 %load_pw, i64* %4, align 4 | |
call void @TP_X(%TP_X_interface* %pulse) | |
%Q4 = getelementptr inbounds %TP_X_interface, %TP_X_interface* %pulse, i32 0, i32 2 | |
%load_5 = load i8, i8* %Q4, align 1 | |
store i8 %load_5, i8* %Q, align 1 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
ret void | |
} | |
define void @RMP_B(%RMP_B_interface* %0) { | |
entry: | |
%SET = getelementptr inbounds %RMP_B_interface, %RMP_B_interface* %0, i32 0, i32 0 | |
%PT = getelementptr inbounds %RMP_B_interface, %RMP_B_interface* %0, i32 0, i32 1 | |
%E = getelementptr inbounds %RMP_B_interface, %RMP_B_interface* %0, i32 0, i32 2 | |
%UP = getelementptr inbounds %RMP_B_interface, %RMP_B_interface* %0, i32 0, i32 3 | |
%RST = getelementptr inbounds %RMP_B_interface, %RMP_B_interface* %0, i32 0, i32 4 | |
%OUT = getelementptr inbounds %RMP_B_interface, %RMP_B_interface* %0, i32 0, i32 5 | |
%BUSY = getelementptr inbounds %RMP_B_interface, %RMP_B_interface* %0, i32 0, i32 6 | |
%HIGH = getelementptr inbounds %RMP_B_interface, %RMP_B_interface* %0, i32 0, i32 7 | |
%LOW = getelementptr inbounds %RMP_B_interface, %RMP_B_interface* %0, i32 0, i32 8 | |
%rmp = getelementptr inbounds %RMP_B_interface, %RMP_B_interface* %0, i32 0, i32 9 | |
%1 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 0 | |
%load_UP = load i8, i8* %UP, align 1 | |
store i8 %load_UP, i8* %1, align 1 | |
%2 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 1 | |
%load_E = load i8, i8* %E, align 1 | |
store i8 %load_E, i8* %2, align 1 | |
%3 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 2 | |
%load_PT = load i64, i64* %PT, align 4 | |
store i64 %load_PT, i64* %3, align 4 | |
%4 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 3 | |
store i8* %OUT, i8** %4, align 8 | |
call void @_RMP_B(%_RMP_B_interface* %rmp) | |
%load_RST = load i8, i8* %RST, align 1 | |
%5 = icmp ne i8 %load_RST, 0 | |
br i1 %5, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
store i8 0, i8* %OUT, align 1 | |
br label %continue | |
branch: ; preds = %entry | |
%load_SET = load i8, i8* %SET, align 1 | |
%6 = icmp ne i8 %load_SET, 0 | |
br i1 %6, label %condition_body1, label %continue | |
condition_body1: ; preds = %branch | |
store i8 -1, i8* %OUT, align 1 | |
br label %continue | |
continue: ; preds = %condition_body1, %branch, %condition_body | |
%load_out = load i8, i8* %OUT, align 1 | |
%7 = zext i8 %load_out to i32 | |
%tmpVar = icmp eq i32 %7, 0 | |
%8 = zext i1 %tmpVar to i8 | |
store i8 %8, i8* %LOW, align 1 | |
%load_out2 = load i8, i8* %OUT, align 1 | |
%9 = zext i8 %load_out2 to i32 | |
%tmpVar3 = icmp eq i32 %9, 255 | |
%10 = zext i1 %tmpVar3 to i8 | |
store i8 %10, i8* %HIGH, align 1 | |
%load_low = load i8, i8* %LOW, align 1 | |
%11 = icmp ne i8 %load_low, 0 | |
br i1 %11, label %14, label %12 | |
12: ; preds = %continue | |
%load_high = load i8, i8* %HIGH, align 1 | |
%13 = icmp ne i8 %load_high, 0 | |
br label %14 | |
14: ; preds = %12, %continue | |
%15 = phi i1 [ %11, %continue ], [ %13, %12 ] | |
%tmpVar4 = xor i1 %15, true | |
br i1 %tmpVar4, label %16, label %18 | |
16: ; preds = %14 | |
%load_E5 = load i8, i8* %E, align 1 | |
%17 = icmp ne i8 %load_E5, 0 | |
br label %18 | |
18: ; preds = %16, %14 | |
%19 = phi i1 [ %tmpVar4, %14 ], [ %17, %16 ] | |
%20 = zext i1 %19 to i8 | |
store i8 %20, i8* %BUSY, align 1 | |
ret void | |
} | |
define void @RMP_SOFT(%RMP_SOFT_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %RMP_SOFT_interface, %RMP_SOFT_interface* %0, i32 0, i32 0 | |
%VAL = getelementptr inbounds %RMP_SOFT_interface, %RMP_SOFT_interface* %0, i32 0, i32 1 | |
%PT_ON = getelementptr inbounds %RMP_SOFT_interface, %RMP_SOFT_interface* %0, i32 0, i32 2 | |
%PT_OFF = getelementptr inbounds %RMP_SOFT_interface, %RMP_SOFT_interface* %0, i32 0, i32 3 | |
%OUT = getelementptr inbounds %RMP_SOFT_interface, %RMP_SOFT_interface* %0, i32 0, i32 4 | |
%rmp = getelementptr inbounds %RMP_SOFT_interface, %RMP_SOFT_interface* %0, i32 0, i32 5 | |
%tmp = getelementptr inbounds %RMP_SOFT_interface, %RMP_SOFT_interface* %0, i32 0, i32 6 | |
%SEL_instance = alloca %SEL_interface, align 8 | |
%1 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 0 | |
%load_in = load i8, i8* %IN, align 1 | |
store i8 %load_in, i8* %1, align 1 | |
%2 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 1 | |
store i64 0, i64* %2, align 4 | |
%3 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 2 | |
%load_val = load i8, i8* %VAL, align 1 | |
%4 = zext i8 %load_val to i64 | |
store i64 %4, i64* %3, align 4 | |
%call = call i64 @SEL(%SEL_interface* %SEL_instance) | |
%5 = trunc i64 %call to i8 | |
store i8 %5, i8* %tmp, align 1 | |
%load_tmp = load i8, i8* %tmp, align 1 | |
%6 = zext i8 %load_tmp to i32 | |
%load_out = load i8, i8* %OUT, align 1 | |
%7 = zext i8 %load_out to i32 | |
%tmpVar = icmp sgt i32 %6, %7 | |
br i1 %tmpVar, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
%8 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 0 | |
store i8 1, i8* %8, align 1 | |
%9 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 1 | |
store i8 1, i8* %9, align 1 | |
%10 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 2 | |
%load_PT_ON = load i64, i64* %PT_ON, align 4 | |
store i64 %load_PT_ON, i64* %10, align 4 | |
%11 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 3 | |
store i8* %OUT, i8** %11, align 8 | |
call void @_RMP_B(%_RMP_B_interface* %rmp) | |
%MIN_instance = alloca %MIN_interface, align 8 | |
%12 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 0 | |
%load_out1 = load i8, i8* %OUT, align 1 | |
%13 = zext i8 %load_out1 to i64 | |
store i64 %13, i64* %12, align 4 | |
%14 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 1 | |
%load_tmp2 = load i8, i8* %tmp, align 1 | |
%15 = zext i8 %load_tmp2 to i64 | |
store i64 %15, i64* %14, align 4 | |
%call3 = call i64 @MIN(%MIN_interface* %MIN_instance) | |
%16 = trunc i64 %call3 to i8 | |
store i8 %16, i8* %OUT, align 1 | |
br label %continue | |
branch: ; preds = %entry | |
%load_tmp4 = load i8, i8* %tmp, align 1 | |
%17 = zext i8 %load_tmp4 to i32 | |
%load_out5 = load i8, i8* %OUT, align 1 | |
%18 = zext i8 %load_out5 to i32 | |
%tmpVar6 = icmp slt i32 %17, %18 | |
br i1 %tmpVar6, label %condition_body7, label %else | |
condition_body7: ; preds = %branch | |
%19 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 0 | |
store i8 0, i8* %19, align 1 | |
%20 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 1 | |
store i8 1, i8* %20, align 1 | |
%21 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 2 | |
%load_PT_OFF = load i64, i64* %PT_OFF, align 4 | |
store i64 %load_PT_OFF, i64* %21, align 4 | |
%22 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 3 | |
store i8* %OUT, i8** %22, align 8 | |
call void @_RMP_B(%_RMP_B_interface* %rmp) | |
%MAX_instance = alloca %MAX_interface, align 8 | |
%23 = getelementptr inbounds %MAX_interface, %MAX_interface* %MAX_instance, i32 0, i32 0 | |
%load_out8 = load i8, i8* %OUT, align 1 | |
%24 = zext i8 %load_out8 to i64 | |
store i64 %24, i64* %23, align 4 | |
%25 = getelementptr inbounds %MAX_interface, %MAX_interface* %MAX_instance, i32 0, i32 1 | |
%load_tmp9 = load i8, i8* %tmp, align 1 | |
%26 = zext i8 %load_tmp9 to i64 | |
store i64 %26, i64* %25, align 4 | |
%call10 = call i64 @MAX(%MAX_interface* %MAX_instance) | |
%27 = trunc i64 %call10 to i8 | |
store i8 %27, i8* %OUT, align 1 | |
br label %continue | |
else: ; preds = %branch | |
%28 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 1 | |
store i8 0, i8* %28, align 1 | |
%29 = getelementptr inbounds %_RMP_B_interface, %_RMP_B_interface* %rmp, i32 0, i32 3 | |
store i8* %OUT, i8** %29, align 8 | |
call void @_RMP_B(%_RMP_B_interface* %rmp) | |
br label %continue | |
continue: ; preds = %else, %condition_body7, %condition_body | |
ret void | |
} | |
define void @RMP_W(%RMP_W_interface* %0) { | |
entry: | |
%SET = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %0, i32 0, i32 0 | |
%PT = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %0, i32 0, i32 1 | |
%E = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %0, i32 0, i32 2 | |
%UP = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %0, i32 0, i32 3 | |
%RST = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %0, i32 0, i32 4 | |
%out = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %0, i32 0, i32 5 | |
%busy = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %0, i32 0, i32 6 | |
%high = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %0, i32 0, i32 7 | |
%low = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %0, i32 0, i32 8 | |
%rmp = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %0, i32 0, i32 9 | |
%1 = getelementptr inbounds %_RMP_W_interface, %_RMP_W_interface* %rmp, i32 0, i32 0 | |
%load_UP = load i8, i8* %UP, align 1 | |
store i8 %load_UP, i8* %1, align 1 | |
%2 = getelementptr inbounds %_RMP_W_interface, %_RMP_W_interface* %rmp, i32 0, i32 1 | |
%load_E = load i8, i8* %E, align 1 | |
store i8 %load_E, i8* %2, align 1 | |
%3 = getelementptr inbounds %_RMP_W_interface, %_RMP_W_interface* %rmp, i32 0, i32 2 | |
%load_PT = load i64, i64* %PT, align 4 | |
store i64 %load_PT, i64* %3, align 4 | |
%4 = getelementptr inbounds %_RMP_W_interface, %_RMP_W_interface* %rmp, i32 0, i32 3 | |
store i16* %out, i16** %4, align 8 | |
call void @_RMP_W(%_RMP_W_interface* %rmp) | |
%load_RST = load i8, i8* %RST, align 1 | |
%5 = icmp ne i8 %load_RST, 0 | |
br i1 %5, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
store i16 0, i16* %out, align 2 | |
br label %continue | |
branch: ; preds = %entry | |
%load_SET = load i8, i8* %SET, align 1 | |
%6 = icmp ne i8 %load_SET, 0 | |
br i1 %6, label %condition_body1, label %continue | |
condition_body1: ; preds = %branch | |
store i16 -1, i16* %out, align 2 | |
br label %continue | |
continue: ; preds = %condition_body1, %branch, %condition_body | |
%load_out = load i16, i16* %out, align 2 | |
%7 = zext i16 %load_out to i32 | |
%tmpVar = icmp eq i32 %7, 0 | |
%8 = zext i1 %tmpVar to i8 | |
store i8 %8, i8* %low, align 1 | |
%load_out2 = load i16, i16* %out, align 2 | |
%9 = zext i16 %load_out2 to i32 | |
%tmpVar3 = icmp eq i32 %9, 65535 | |
%10 = zext i1 %tmpVar3 to i8 | |
store i8 %10, i8* %high, align 1 | |
%load_low = load i8, i8* %low, align 1 | |
%11 = icmp ne i8 %load_low, 0 | |
br i1 %11, label %14, label %12 | |
12: ; preds = %continue | |
%load_high = load i8, i8* %high, align 1 | |
%13 = icmp ne i8 %load_high, 0 | |
br label %14 | |
14: ; preds = %12, %continue | |
%15 = phi i1 [ %11, %continue ], [ %13, %12 ] | |
%tmpVar4 = xor i1 %15, true | |
br i1 %tmpVar4, label %16, label %18 | |
16: ; preds = %14 | |
%load_E5 = load i8, i8* %E, align 1 | |
%17 = icmp ne i8 %load_E5, 0 | |
br label %18 | |
18: ; preds = %16, %14 | |
%19 = phi i1 [ %tmpVar4, %14 ], [ %17, %16 ] | |
%20 = zext i1 %19 to i8 | |
store i8 %20, i8* %busy, align 1 | |
ret void | |
} | |
define float @AIN(%AIN_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %AIN_interface, %AIN_interface* %0, i32 0, i32 0 | |
%Bits = getelementptr inbounds %AIN_interface, %AIN_interface* %0, i32 0, i32 1 | |
%sign = getelementptr inbounds %AIN_interface, %AIN_interface* %0, i32 0, i32 2 | |
%low = getelementptr inbounds %AIN_interface, %AIN_interface* %0, i32 0, i32 3 | |
%high = getelementptr inbounds %AIN_interface, %AIN_interface* %0, i32 0, i32 4 | |
%ff = getelementptr inbounds %AIN_interface, %AIN_interface* %0, i32 0, i32 5 | |
%temp1 = getelementptr inbounds %AIN_interface, %AIN_interface* %0, i32 0, i32 6 | |
%temp2 = getelementptr inbounds %AIN_interface, %AIN_interface* %0, i32 0, i32 7 | |
%sx = getelementptr inbounds %AIN_interface, %AIN_interface* %0, i32 0, i32 8 | |
%AIN = alloca float, align 4 | |
store i32 -1, i32* %ff, align 4 | |
store i32 0, i32* %temp1, align 4 | |
store i32 0, i32* %temp2, align 4 | |
store i8 0, i8* %sx, align 1 | |
store float 0.000000e+00, float* %AIN, align 4 | |
%load_sign = load i8, i8* %sign, align 1 | |
%1 = zext i8 %load_sign to i32 | |
%tmpVar = icmp slt i32 %1, 32 | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%SHR_instance = alloca %SHR_interface, align 8 | |
%2 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance, i32 0, i32 0 | |
%load_in = load i32, i32* %in, align 4 | |
%3 = zext i32 %load_in to i64 | |
store i64 %3, i64* %2, align 4 | |
%4 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance, i32 0, i32 1 | |
%load_sign1 = load i8, i8* %sign, align 1 | |
%5 = zext i8 %load_sign1 to i16 | |
store i16 %5, i16* %4, align 2 | |
%call = call i64 @SHR(%SHR_interface* %SHR_instance) | |
%6 = trunc i64 %call to i32 | |
store i32 %6, i32* %temp1, align 4 | |
%load_temp1 = load i32, i32* %temp1, align 4 | |
%shift = lshr i32 %load_temp1, 0 | |
%7 = trunc i32 %shift to i8 | |
store i8 %7, i8* %sx, align 1 | |
br label %continue | |
else: ; preds = %entry | |
store i8 0, i8* %sx, align 1 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%SHR_instance2 = alloca %SHR_interface, align 8 | |
%8 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance2, i32 0, i32 0 | |
%load_ff = load i32, i32* %ff, align 4 | |
%9 = zext i32 %load_ff to i64 | |
store i64 %9, i64* %8, align 4 | |
%10 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance2, i32 0, i32 1 | |
%load_bits = load i8, i8* %Bits, align 1 | |
%11 = zext i8 %load_bits to i32 | |
%tmpVar3 = sub i32 32, %11 | |
%12 = trunc i32 %tmpVar3 to i16 | |
store i16 %12, i16* %10, align 2 | |
%call4 = call i64 @SHR(%SHR_interface* %SHR_instance2) | |
%13 = trunc i64 %call4 to i32 | |
store i32 %13, i32* %temp1, align 4 | |
%load_in5 = load i32, i32* %in, align 4 | |
%load_temp16 = load i32, i32* %temp1, align 4 | |
%tmpVar7 = and i32 %load_in5, %load_temp16 | |
store i32 %tmpVar7, i32* %temp2, align 4 | |
%load_high = load float, float* %high, align 4 | |
%load_low = load float, float* %low, align 4 | |
%tmpVar8 = fsub float %load_high, %load_low | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%14 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%load_temp2 = load i32, i32* %temp2, align 4 | |
store i32 %load_temp2, i32* %14, align 4 | |
%call9 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%tmpVar10 = fmul float %tmpVar8, %call9 | |
%DWORD_TO_REAL_instance11 = alloca %DWORD_TO_REAL_interface, align 8 | |
%15 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance11, i32 0, i32 0 | |
%load_temp112 = load i32, i32* %temp1, align 4 | |
store i32 %load_temp112, i32* %15, align 4 | |
%call13 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance11) | |
%tmpVar14 = fdiv float %tmpVar10, %call13 | |
%load_low15 = load float, float* %low, align 4 | |
%tmpVar16 = fadd float %tmpVar14, %load_low15 | |
store float %tmpVar16, float* %AIN, align 4 | |
%load_sx = load i8, i8* %sx, align 1 | |
%16 = icmp ne i8 %load_sx, 0 | |
br i1 %16, label %condition_body18, label %continue17 | |
condition_body18: ; preds = %continue | |
%load_AIN = load float, float* %AIN, align 4 | |
%tmpVar19 = fneg float %load_AIN | |
store float %tmpVar19, float* %AIN, align 4 | |
br label %continue17 | |
continue17: ; preds = %condition_body18, %continue | |
%AIN_ret = load float, float* %AIN, align 4 | |
ret float %AIN_ret | |
} | |
define void @AIN1(%AIN1_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 0 | |
%sign_bit = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 1 | |
%error_bit = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 2 | |
%error_code_en = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 3 | |
%error_code = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 4 | |
%overflow_bit = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 5 | |
%overflow_code_en = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 6 | |
%overflow_code = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 7 | |
%Bit_0 = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 8 | |
%Bit_N = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 9 | |
%out_min = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 10 | |
%out_max = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 11 | |
%code_min = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 12 | |
%code_max = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 13 | |
%error_output = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 14 | |
%overflow_output = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 15 | |
%out = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 16 | |
%sign = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 17 | |
%error = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 18 | |
%overflow = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 19 | |
%tB = getelementptr inbounds %AIN1_interface, %AIN1_interface* %0, i32 0, i32 20 | |
%SHR_instance = alloca %SHR_interface, align 8 | |
%1 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance, i32 0, i32 0 | |
%load_in = load i32, i32* %in, align 4 | |
%2 = zext i32 %load_in to i64 | |
store i64 %2, i64* %1, align 4 | |
%3 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance, i32 0, i32 1 | |
%load_error_bit = load i16, i16* %error_bit, align 2 | |
store i16 %load_error_bit, i16* %3, align 2 | |
%call = call i64 @SHR(%SHR_interface* %SHR_instance) | |
%tmpVar = and i64 %call, 1 | |
%tmpVar1 = icmp eq i64 %tmpVar, 1 | |
br i1 %tmpVar1, label %6, label %4 | |
4: ; preds = %entry | |
%load_error_code_en = load i8, i8* %error_code_en, align 1 | |
%5 = icmp ne i8 %load_error_code_en, 0 | |
br i1 %5, label %10, label %11 | |
6: ; preds = %11, %entry | |
%7 = phi i1 [ %tmpVar1, %entry ], [ %12, %11 ] | |
%8 = zext i1 %7 to i8 | |
store i8 %8, i8* %error, align 1 | |
%load_error = load i8, i8* %error, align 1 | |
%9 = icmp ne i8 %load_error, 0 | |
br i1 %9, label %condition_body, label %continue | |
10: ; preds = %4 | |
%load_error_code = load i32, i32* %error_code, align 4 | |
%load_in2 = load i32, i32* %in, align 4 | |
%tmpVar3 = icmp eq i32 %load_error_code, %load_in2 | |
br label %11 | |
11: ; preds = %10, %4 | |
%12 = phi i1 [ %5, %4 ], [ %tmpVar3, %10 ] | |
br label %6 | |
condition_body: ; preds = %6 | |
%load_error_output = load float, float* %error_output, align 4 | |
store float %load_error_output, float* %out, align 4 | |
ret void | |
buffer_block: ; No predecessors! | |
br label %continue | |
continue: ; preds = %buffer_block, %6 | |
%SHR_instance4 = alloca %SHR_interface, align 8 | |
%13 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance4, i32 0, i32 0 | |
%SHL_instance = alloca %SHL_interface, align 8 | |
%14 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 0 | |
%load_in5 = load i32, i32* %in, align 4 | |
%15 = zext i32 %load_in5 to i64 | |
store i64 %15, i64* %14, align 4 | |
%16 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 1 | |
%load_bit_N = load i16, i16* %Bit_N, align 2 | |
%17 = sext i16 %load_bit_N to i32 | |
%tmpVar6 = sub i32 31, %17 | |
%18 = trunc i32 %tmpVar6 to i16 | |
store i16 %18, i16* %16, align 2 | |
%call7 = call i64 @SHL(%SHL_interface* %SHL_instance) | |
store i64 %call7, i64* %13, align 4 | |
%19 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance4, i32 0, i32 1 | |
%load_bit_N8 = load i16, i16* %Bit_N, align 2 | |
%20 = sext i16 %load_bit_N8 to i32 | |
%tmpVar9 = sub i32 31, %20 | |
%load_Bit_0 = load i16, i16* %Bit_0, align 2 | |
%21 = sext i16 %load_Bit_0 to i32 | |
%tmpVar10 = add i32 %tmpVar9, %21 | |
%22 = trunc i32 %tmpVar10 to i16 | |
store i16 %22, i16* %19, align 2 | |
%call11 = call i64 @SHR(%SHR_interface* %SHR_instance4) | |
%23 = trunc i64 %call11 to i32 | |
store i32 %23, i32* %tB, align 4 | |
%SHR_instance12 = alloca %SHR_interface, align 8 | |
%24 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance12, i32 0, i32 0 | |
%load_in13 = load i32, i32* %in, align 4 | |
%25 = zext i32 %load_in13 to i64 | |
store i64 %25, i64* %24, align 4 | |
%26 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance12, i32 0, i32 1 | |
%load_overflow_bit = load i16, i16* %overflow_bit, align 2 | |
store i16 %load_overflow_bit, i16* %26, align 2 | |
%call14 = call i64 @SHR(%SHR_interface* %SHR_instance12) | |
%tmpVar15 = and i64 %call14, 1 | |
%tmpVar16 = icmp eq i64 %tmpVar15, 1 | |
br i1 %tmpVar16, label %29, label %27 | |
27: ; preds = %continue | |
%load_overflow_code_en = load i8, i8* %overflow_code_en, align 1 | |
%28 = icmp ne i8 %load_overflow_code_en, 0 | |
br i1 %28, label %31, label %32 | |
29: ; preds = %32, %continue | |
%30 = phi i1 [ %tmpVar16, %continue ], [ %33, %32 ] | |
br i1 %30, label %35, label %34 | |
31: ; preds = %27 | |
%load_overflow_code = load i32, i32* %overflow_code, align 4 | |
%load_in17 = load i32, i32* %in, align 4 | |
%tmpVar18 = icmp eq i32 %load_overflow_code, %load_in17 | |
br label %32 | |
32: ; preds = %31, %27 | |
%33 = phi i1 [ %28, %27 ], [ %tmpVar18, %31 ] | |
br label %29 | |
34: ; preds = %29 | |
%load_tb = load i32, i32* %tB, align 4 | |
%load_code_min = load i32, i32* %code_min, align 4 | |
%tmpVar19 = icmp slt i32 %load_tb, %load_code_min | |
br i1 %tmpVar19, label %40, label %39 | |
35: ; preds = %40, %29 | |
%36 = phi i1 [ %30, %29 ], [ %41, %40 ] | |
%37 = zext i1 %36 to i8 | |
store i8 %37, i8* %overflow, align 1 | |
%load_overflow = load i8, i8* %overflow, align 1 | |
%38 = icmp ne i8 %load_overflow, 0 | |
br i1 %38, label %condition_body23, label %continue22 | |
39: ; preds = %34 | |
%load_tb20 = load i32, i32* %tB, align 4 | |
%load_code_max = load i32, i32* %code_max, align 4 | |
%tmpVar21 = icmp sgt i32 %load_tb20, %load_code_max | |
br label %40 | |
40: ; preds = %39, %34 | |
%41 = phi i1 [ %tmpVar19, %34 ], [ %tmpVar21, %39 ] | |
br label %35 | |
condition_body23: ; preds = %35 | |
%load_overflow_output = load float, float* %overflow_output, align 4 | |
store float %load_overflow_output, float* %out, align 4 | |
ret void | |
buffer_block24: ; No predecessors! | |
br label %continue22 | |
continue22: ; preds = %buffer_block24, %35 | |
%SHR_instance25 = alloca %SHR_interface, align 8 | |
%42 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance25, i32 0, i32 0 | |
%load_in26 = load i32, i32* %in, align 4 | |
%43 = zext i32 %load_in26 to i64 | |
store i64 %43, i64* %42, align 4 | |
%44 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance25, i32 0, i32 1 | |
%load_sign_bit = load i16, i16* %sign_bit, align 2 | |
store i16 %load_sign_bit, i16* %44, align 2 | |
%call27 = call i64 @SHR(%SHR_interface* %SHR_instance25) | |
%tmpVar28 = and i64 %call27, 1 | |
%tmpVar29 = icmp eq i64 %tmpVar28, 1 | |
%45 = zext i1 %tmpVar29 to i8 | |
store i8 %45, i8* %sign, align 1 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%46 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%load_tb30 = load i32, i32* %tB, align 4 | |
%load_code_min31 = load i32, i32* %code_min, align 4 | |
%tmpVar32 = sub i32 %load_tb30, %load_code_min31 | |
store i32 %tmpVar32, i32* %46, align 4 | |
%call33 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%load_out_max = load float, float* %out_max, align 4 | |
%load_out_min = load float, float* %out_min, align 4 | |
%tmpVar34 = fsub float %load_out_max, %load_out_min | |
%tmpVar35 = fmul float %call33, %tmpVar34 | |
%DWORD_TO_REAL_instance36 = alloca %DWORD_TO_REAL_interface, align 8 | |
%47 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance36, i32 0, i32 0 | |
%load_code_max37 = load i32, i32* %code_max, align 4 | |
%load_code_min38 = load i32, i32* %code_min, align 4 | |
%tmpVar39 = sub i32 %load_code_max37, %load_code_min38 | |
store i32 %tmpVar39, i32* %47, align 4 | |
%call40 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance36) | |
%tmpVar41 = fdiv float %tmpVar35, %call40 | |
%load_out_min42 = load float, float* %out_min, align 4 | |
%tmpVar43 = fadd float %tmpVar41, %load_out_min42 | |
store float %tmpVar43, float* %out, align 4 | |
%load_sign = load i8, i8* %sign, align 1 | |
%48 = icmp ne i8 %load_sign, 0 | |
br i1 %48, label %condition_body45, label %continue44 | |
condition_body45: ; preds = %continue22 | |
%load_out = load float, float* %out, align 4 | |
%tmpVar46 = fmul float %load_out, -1.000000e+00 | |
store float %tmpVar46, float* %out, align 4 | |
br label %continue44 | |
continue44: ; preds = %condition_body45, %continue22 | |
ret void | |
} | |
define i32 @AOUT(%AOUT_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %AOUT_interface, %AOUT_interface* %0, i32 0, i32 0 | |
%Bits = getelementptr inbounds %AOUT_interface, %AOUT_interface* %0, i32 0, i32 1 | |
%sign = getelementptr inbounds %AOUT_interface, %AOUT_interface* %0, i32 0, i32 2 | |
%low = getelementptr inbounds %AOUT_interface, %AOUT_interface* %0, i32 0, i32 3 | |
%high = getelementptr inbounds %AOUT_interface, %AOUT_interface* %0, i32 0, i32 4 | |
%ff = getelementptr inbounds %AOUT_interface, %AOUT_interface* %0, i32 0, i32 5 | |
%in2 = getelementptr inbounds %AOUT_interface, %AOUT_interface* %0, i32 0, i32 6 | |
%sx = getelementptr inbounds %AOUT_interface, %AOUT_interface* %0, i32 0, i32 7 | |
%AOUT = alloca i32, align 4 | |
store i32 1, i32* %ff, align 4 | |
store float 0.000000e+00, float* %in2, align 4 | |
store i8 0, i8* %sx, align 1 | |
store i32 0, i32* %AOUT, align 4 | |
%load_sign = load i8, i8* %sign, align 1 | |
%1 = zext i8 %load_sign to i32 | |
%tmpVar = icmp slt i32 %1, 32 | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%SIGN_R_instance = alloca %SIGN_R_interface, align 8 | |
%2 = getelementptr inbounds %SIGN_R_interface, %SIGN_R_interface* %SIGN_R_instance, i32 0, i32 0 | |
%load_in = load float, float* %in, align 4 | |
store float %load_in, float* %2, align 4 | |
%call = call i8 @SIGN_R(%SIGN_R_interface* %SIGN_R_instance) | |
store i8 %call, i8* %sx, align 1 | |
%ABS_instance = alloca %ABS_interface, align 8 | |
%3 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance, i32 0, i32 0 | |
%load_in1 = load float, float* %in, align 4 | |
%4 = fptoui float %load_in1 to i64 | |
store i64 %4, i64* %3, align 4 | |
%call2 = call i64 @ABS(%ABS_interface* %ABS_instance) | |
%5 = uitofp i64 %call2 to float | |
store float %5, float* %in2, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%load_in3 = load float, float* %in, align 4 | |
store float %load_in3, float* %in2, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%6 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_low = load float, float* %low, align 4 | |
%7 = fptoui float %load_low to i64 | |
store i64 %7, i64* %6, align 4 | |
%8 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_in2 = load float, float* %in2, align 4 | |
%9 = fptoui float %load_in2 to i64 | |
store i64 %9, i64* %8, align 4 | |
%10 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_high = load float, float* %high, align 4 | |
%11 = fptoui float %load_high to i64 | |
store i64 %11, i64* %10, align 4 | |
%call4 = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%12 = uitofp i64 %call4 to float | |
store float %12, float* %in2, align 4 | |
%REAL_TO_DWORD_instance = alloca %REAL_TO_DWORD_interface, align 8 | |
%13 = getelementptr inbounds %REAL_TO_DWORD_interface, %REAL_TO_DWORD_interface* %REAL_TO_DWORD_instance, i32 0, i32 0 | |
%load_in25 = load float, float* %in2, align 4 | |
%load_low6 = load float, float* %low, align 4 | |
%tmpVar7 = fsub float %load_in25, %load_low6 | |
%load_high8 = load float, float* %high, align 4 | |
%load_low9 = load float, float* %low, align 4 | |
%tmpVar10 = fsub float %load_high8, %load_low9 | |
%tmpVar11 = fdiv float %tmpVar7, %tmpVar10 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%14 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%SHL_instance = alloca %SHL_interface, align 8 | |
%15 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 0 | |
%load_ff = load i32, i32* %ff, align 4 | |
%16 = zext i32 %load_ff to i64 | |
store i64 %16, i64* %15, align 4 | |
%17 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 1 | |
%load_bits = load i8, i8* %Bits, align 1 | |
%18 = zext i8 %load_bits to i16 | |
store i16 %18, i16* %17, align 2 | |
%call12 = call i64 @SHL(%SHL_interface* %SHL_instance) | |
%tmpVar13 = sub i64 %call12, 1 | |
%19 = trunc i64 %tmpVar13 to i32 | |
store i32 %19, i32* %14, align 4 | |
%call14 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%tmpVar15 = fmul float %tmpVar11, %call14 | |
store float %tmpVar15, float* %13, align 4 | |
%call16 = call i32 @REAL_TO_DWORD(%REAL_TO_DWORD_interface* %REAL_TO_DWORD_instance) | |
store i32 %call16, i32* %AOUT, align 4 | |
%load_sx = load i8, i8* %sx, align 1 | |
%20 = icmp ne i8 %load_sx, 0 | |
br i1 %20, label %condition_body18, label %continue17 | |
condition_body18: ; preds = %continue | |
%SHL_instance19 = alloca %SHL_interface, align 8 | |
%21 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance19, i32 0, i32 0 | |
%load_ff20 = load i32, i32* %ff, align 4 | |
%22 = zext i32 %load_ff20 to i64 | |
store i64 %22, i64* %21, align 4 | |
%23 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance19, i32 0, i32 1 | |
%load_sign21 = load i8, i8* %sign, align 1 | |
%24 = zext i8 %load_sign21 to i16 | |
store i16 %24, i16* %23, align 2 | |
%call22 = call i64 @SHL(%SHL_interface* %SHL_instance19) | |
%load_Aout = load i32, i32* %AOUT, align 4 | |
%25 = zext i32 %load_Aout to i64 | |
%tmpVar23 = or i64 %call22, %25 | |
%26 = trunc i64 %tmpVar23 to i32 | |
store i32 %26, i32* %AOUT, align 4 | |
br label %continue17 | |
continue17: ; preds = %condition_body18, %continue | |
%AOUT_ret = load i32, i32* %AOUT, align 4 | |
ret i32 %AOUT_ret | |
} | |
define i32 @AOUT1(%AOUT1_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %AOUT1_interface, %AOUT1_interface* %0, i32 0, i32 0 | |
%Bit_0 = getelementptr inbounds %AOUT1_interface, %AOUT1_interface* %0, i32 0, i32 1 | |
%Bit_N = getelementptr inbounds %AOUT1_interface, %AOUT1_interface* %0, i32 0, i32 2 | |
%sign = getelementptr inbounds %AOUT1_interface, %AOUT1_interface* %0, i32 0, i32 3 | |
%low = getelementptr inbounds %AOUT1_interface, %AOUT1_interface* %0, i32 0, i32 4 | |
%high = getelementptr inbounds %AOUT1_interface, %AOUT1_interface* %0, i32 0, i32 5 | |
%ff = getelementptr inbounds %AOUT1_interface, %AOUT1_interface* %0, i32 0, i32 6 | |
%sx = getelementptr inbounds %AOUT1_interface, %AOUT1_interface* %0, i32 0, i32 7 | |
%in2 = getelementptr inbounds %AOUT1_interface, %AOUT1_interface* %0, i32 0, i32 8 | |
%AOUT1 = alloca i32, align 4 | |
store i32 1, i32* %ff, align 4 | |
store i8 0, i8* %sx, align 1 | |
store float 0.000000e+00, float* %in2, align 4 | |
store i32 0, i32* %AOUT1, align 4 | |
%load_sign = load i16, i16* %sign, align 2 | |
%1 = sext i16 %load_sign to i32 | |
%tmpVar = icmp slt i32 %1, 32 | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%SIGN_R_instance = alloca %SIGN_R_interface, align 8 | |
%2 = getelementptr inbounds %SIGN_R_interface, %SIGN_R_interface* %SIGN_R_instance, i32 0, i32 0 | |
%load_in = load float, float* %in, align 4 | |
store float %load_in, float* %2, align 4 | |
%call = call i8 @SIGN_R(%SIGN_R_interface* %SIGN_R_instance) | |
store i8 %call, i8* %sx, align 1 | |
%ABS_instance = alloca %ABS_interface, align 8 | |
%3 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance, i32 0, i32 0 | |
%load_in1 = load float, float* %in, align 4 | |
%4 = fptoui float %load_in1 to i64 | |
store i64 %4, i64* %3, align 4 | |
%call2 = call i64 @ABS(%ABS_interface* %ABS_instance) | |
%5 = uitofp i64 %call2 to float | |
store float %5, float* %in2, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%load_in3 = load float, float* %in, align 4 | |
store float %load_in3, float* %in2, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%6 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_low = load float, float* %low, align 4 | |
%7 = fptoui float %load_low to i64 | |
store i64 %7, i64* %6, align 4 | |
%8 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_in2 = load float, float* %in2, align 4 | |
%9 = fptoui float %load_in2 to i64 | |
store i64 %9, i64* %8, align 4 | |
%10 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_high = load float, float* %high, align 4 | |
%11 = fptoui float %load_high to i64 | |
store i64 %11, i64* %10, align 4 | |
%call4 = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%12 = uitofp i64 %call4 to float | |
store float %12, float* %in2, align 4 | |
%SHL_instance = alloca %SHL_interface, align 8 | |
%13 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 0 | |
%REAL_TO_DWORD_instance = alloca %REAL_TO_DWORD_interface, align 8 | |
%14 = getelementptr inbounds %REAL_TO_DWORD_interface, %REAL_TO_DWORD_interface* %REAL_TO_DWORD_instance, i32 0, i32 0 | |
%load_in25 = load float, float* %in2, align 4 | |
%load_low6 = load float, float* %low, align 4 | |
%tmpVar7 = fsub float %load_in25, %load_low6 | |
%load_high8 = load float, float* %high, align 4 | |
%load_low9 = load float, float* %low, align 4 | |
%tmpVar10 = fsub float %load_high8, %load_low9 | |
%tmpVar11 = fdiv float %tmpVar7, %tmpVar10 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%15 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%SHL_instance12 = alloca %SHL_interface, align 8 | |
%16 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance12, i32 0, i32 0 | |
%load_ff = load i32, i32* %ff, align 4 | |
%17 = zext i32 %load_ff to i64 | |
store i64 %17, i64* %16, align 4 | |
%18 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance12, i32 0, i32 1 | |
%load_bit_n = load i16, i16* %Bit_N, align 2 | |
%19 = sext i16 %load_bit_n to i32 | |
%load_Bit_0 = load i16, i16* %Bit_0, align 2 | |
%20 = sext i16 %load_Bit_0 to i32 | |
%tmpVar13 = sub i32 %19, %20 | |
%tmpVar14 = add i32 %tmpVar13, 1 | |
%21 = trunc i32 %tmpVar14 to i16 | |
store i16 %21, i16* %18, align 2 | |
%call15 = call i64 @SHL(%SHL_interface* %SHL_instance12) | |
%tmpVar16 = sub i64 %call15, 1 | |
%22 = trunc i64 %tmpVar16 to i32 | |
store i32 %22, i32* %15, align 4 | |
%call17 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%tmpVar18 = fmul float %tmpVar11, %call17 | |
store float %tmpVar18, float* %14, align 4 | |
%call19 = call i32 @REAL_TO_DWORD(%REAL_TO_DWORD_interface* %REAL_TO_DWORD_instance) | |
%23 = zext i32 %call19 to i64 | |
store i64 %23, i64* %13, align 4 | |
%24 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance, i32 0, i32 1 | |
%load_Bit_020 = load i16, i16* %Bit_0, align 2 | |
store i16 %load_Bit_020, i16* %24, align 2 | |
%call21 = call i64 @SHL(%SHL_interface* %SHL_instance) | |
%25 = trunc i64 %call21 to i32 | |
store i32 %25, i32* %AOUT1, align 4 | |
%load_sx = load i8, i8* %sx, align 1 | |
%26 = icmp ne i8 %load_sx, 0 | |
br i1 %26, label %condition_body23, label %continue22 | |
condition_body23: ; preds = %continue | |
%SHL_instance24 = alloca %SHL_interface, align 8 | |
%27 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance24, i32 0, i32 0 | |
%load_ff25 = load i32, i32* %ff, align 4 | |
%28 = zext i32 %load_ff25 to i64 | |
store i64 %28, i64* %27, align 4 | |
%29 = getelementptr inbounds %SHL_interface, %SHL_interface* %SHL_instance24, i32 0, i32 1 | |
%load_sign26 = load i16, i16* %sign, align 2 | |
store i16 %load_sign26, i16* %29, align 2 | |
%call27 = call i64 @SHL(%SHL_interface* %SHL_instance24) | |
%load_AOUT1 = load i32, i32* %AOUT1, align 4 | |
%30 = zext i32 %load_AOUT1 to i64 | |
%tmpVar28 = or i64 %call27, %30 | |
%31 = trunc i64 %tmpVar28 to i32 | |
store i32 %31, i32* %AOUT1, align 4 | |
br label %continue22 | |
continue22: ; preds = %condition_body23, %continue | |
%AOUT1_ret = load i32, i32* %AOUT1, align 4 | |
ret i32 %AOUT1_ret | |
} | |
define float @BYTE_TO_RANGE(%BYTE_TO_RANGE_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %BYTE_TO_RANGE_interface, %BYTE_TO_RANGE_interface* %0, i32 0, i32 0 | |
%low = getelementptr inbounds %BYTE_TO_RANGE_interface, %BYTE_TO_RANGE_interface* %0, i32 0, i32 1 | |
%high = getelementptr inbounds %BYTE_TO_RANGE_interface, %BYTE_TO_RANGE_interface* %0, i32 0, i32 2 | |
%BYTE_TO_RANGE = alloca float, align 4 | |
store float 0.000000e+00, float* %BYTE_TO_RANGE, align 4 | |
%load_high = load float, float* %high, align 4 | |
%load_low = load float, float* %low, align 4 | |
%tmpVar = fsub float %load_high, %load_low | |
%load_X = load i8, i8* %X, align 1 | |
%1 = uitofp i8 %load_X to float | |
%tmpVar1 = fmul float %tmpVar, %1 | |
%tmpVar2 = fdiv float %tmpVar1, 2.550000e+02 | |
%load_low3 = load float, float* %low, align 4 | |
%tmpVar4 = fadd float %tmpVar2, %load_low3 | |
store float %tmpVar4, float* %BYTE_TO_RANGE, align 4 | |
%BYTE_TO_RANGE_ret = load float, float* %BYTE_TO_RANGE, align 4 | |
ret float %BYTE_TO_RANGE_ret | |
} | |
define void @DELAY(%DELAY_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %DELAY_interface, %DELAY_interface* %0, i32 0, i32 0 | |
%N = getelementptr inbounds %DELAY_interface, %DELAY_interface* %0, i32 0, i32 1 | |
%RST = getelementptr inbounds %DELAY_interface, %DELAY_interface* %0, i32 0, i32 2 | |
%OUT = getelementptr inbounds %DELAY_interface, %DELAY_interface* %0, i32 0, i32 3 | |
%buf = getelementptr inbounds %DELAY_interface, %DELAY_interface* %0, i32 0, i32 4 | |
%i = getelementptr inbounds %DELAY_interface, %DELAY_interface* %0, i32 0, i32 5 | |
%init = getelementptr inbounds %DELAY_interface, %DELAY_interface* %0, i32 0, i32 6 | |
%stop = getelementptr inbounds %DELAY_interface, %DELAY_interface* %0, i32 0, i32 7 | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%1 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
store i64 0, i64* %1, align 4 | |
%2 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_N = load i16, i16* %N, align 2 | |
%3 = sext i16 %load_N to i64 | |
store i64 %3, i64* %2, align 4 | |
%4 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
store i64 32, i64* %4, align 4 | |
%call = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%tmpVar = sub i64 %call, 1 | |
%5 = trunc i64 %tmpVar to i16 | |
store i16 %5, i16* %stop, align 2 | |
%load_rst = load i8, i8* %RST, align 1 | |
%6 = icmp ne i8 %load_rst, 0 | |
br i1 %6, label %14, label %12 | |
condition_body: ; preds = %14 | |
store i8 1, i8* %init, align 1 | |
store i16 0, i16* %i, align 2 | |
br label %condition_check | |
branch: ; preds = %14 | |
%load_stop18 = load i16, i16* %stop, align 2 | |
%7 = sext i16 %load_stop18 to i32 | |
%tmpVar19 = icmp slt i32 %7, 0 | |
br i1 %tmpVar19, label %condition_body20, label %else | |
condition_body20: ; preds = %branch | |
%load_in21 = load float, float* %IN, align 4 | |
store float %load_in21, float* %OUT, align 4 | |
br label %continue | |
else: ; preds = %branch | |
%load_i22 = load i16, i16* %i, align 2 | |
%8 = sext i16 %load_i22 to i32 | |
%tmpVar23 = mul i32 1, %8 | |
%tmpVar24 = add i32 %tmpVar23, 0 | |
%tmpVar25 = getelementptr inbounds [32 x float], [32 x float]* %buf, i32 0, i32 %tmpVar24 | |
%load_tmpVar = load float, float* %tmpVar25, align 4 | |
store float %load_tmpVar, float* %OUT, align 4 | |
%load_i26 = load i16, i16* %i, align 2 | |
%9 = sext i16 %load_i26 to i32 | |
%tmpVar27 = mul i32 1, %9 | |
%tmpVar28 = add i32 %tmpVar27, 0 | |
%tmpVar29 = getelementptr inbounds [32 x float], [32 x float]* %buf, i32 0, i32 %tmpVar28 | |
%load_in30 = load float, float* %IN, align 4 | |
store float %load_in30, float* %tmpVar29, align 4 | |
%INC1_instance = alloca %INC1_interface, align 8 | |
%10 = getelementptr inbounds %INC1_interface, %INC1_interface* %INC1_instance, i32 0, i32 0 | |
%load_i31 = load i16, i16* %i, align 2 | |
store i16 %load_i31, i16* %10, align 2 | |
%11 = getelementptr inbounds %INC1_interface, %INC1_interface* %INC1_instance, i32 0, i32 1 | |
%load_N32 = load i16, i16* %N, align 2 | |
store i16 %load_N32, i16* %11, align 2 | |
%call33 = call i16 @INC1(%INC1_interface* %INC1_instance) | |
store i16 %call33, i16* %i, align 2 | |
br label %continue | |
continue: ; preds = %else, %condition_body20, %continue2 | |
ret void | |
12: ; preds = %entry | |
%load_init = load i8, i8* %init, align 1 | |
%13 = icmp ne i8 %load_init, 0 | |
%tmpVar1 = xor i1 %13, true | |
br label %14 | |
14: ; preds = %12, %entry | |
%15 = phi i1 [ %6, %entry ], [ %tmpVar1, %12 ] | |
br i1 %15, label %condition_body, label %branch | |
condition_check: ; preds = %increment, %condition_body | |
%load_i = load i16, i16* %i, align 2 | |
%load_i3 = load i16, i16* %i, align 2 | |
%load_stop = load i16, i16* %stop, align 2 | |
%tmpVar4 = icmp sle i16 %load_i3, %load_stop | |
%16 = zext i1 %tmpVar4 to i8 | |
%17 = icmp ne i8 %16, 0 | |
br i1 %17, label %19, label %22 | |
for_body: ; preds = %29 | |
%load_i12 = load i16, i16* %i, align 2 | |
%18 = sext i16 %load_i12 to i32 | |
%tmpVar13 = mul i32 1, %18 | |
%tmpVar14 = add i32 %tmpVar13, 0 | |
%tmpVar15 = getelementptr inbounds [32 x float], [32 x float]* %buf, i32 0, i32 %tmpVar14 | |
%load_in = load float, float* %IN, align 4 | |
store float %load_in, float* %tmpVar15, align 4 | |
br label %increment | |
increment: ; preds = %for_body | |
%tmpVar16 = add i16 %load_i, 1 | |
store i16 %tmpVar16, i16* %i, align 2 | |
br label %condition_check | |
continue2: ; preds = %29 | |
%load_in17 = load float, float* %IN, align 4 | |
store float %load_in17, float* %OUT, align 4 | |
store i16 0, i16* %i, align 2 | |
br label %continue | |
19: ; preds = %condition_check | |
%load_i5 = load i16, i16* %i, align 2 | |
%tmpVar6 = icmp sge i16 %load_i5, 0 | |
%20 = zext i1 %tmpVar6 to i8 | |
%21 = icmp ne i8 %20, 0 | |
br label %22 | |
22: ; preds = %19, %condition_check | |
%23 = phi i1 [ %17, %condition_check ], [ %21, %19 ] | |
%24 = zext i1 %23 to i8 | |
%25 = icmp ne i8 %24, 0 | |
br i1 %25, label %29, label %26 | |
26: ; preds = %22 | |
%load_i7 = load i16, i16* %i, align 2 | |
%load_stop8 = load i16, i16* %stop, align 2 | |
%tmpVar9 = icmp sge i16 %load_i7, %load_stop8 | |
%27 = zext i1 %tmpVar9 to i8 | |
%28 = icmp ne i8 %27, 0 | |
br i1 %28, label %33, label %36 | |
29: ; preds = %36, %22 | |
%30 = phi i1 [ %25, %22 ], [ %39, %36 ] | |
%31 = zext i1 %30 to i8 | |
%32 = icmp ne i8 %31, 0 | |
br i1 %32, label %for_body, label %continue2 | |
33: ; preds = %26 | |
%load_i10 = load i16, i16* %i, align 2 | |
%tmpVar11 = icmp sle i16 %load_i10, 0 | |
%34 = zext i1 %tmpVar11 to i8 | |
%35 = icmp ne i8 %34, 0 | |
br label %36 | |
36: ; preds = %33, %26 | |
%37 = phi i1 [ %28, %26 ], [ %35, %33 ] | |
%38 = zext i1 %37 to i8 | |
%39 = icmp ne i8 %38, 0 | |
br label %29 | |
} | |
define void @DELAY_4(%DELAY_4_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %DELAY_4_interface, %DELAY_4_interface* %0, i32 0, i32 0 | |
%out1 = getelementptr inbounds %DELAY_4_interface, %DELAY_4_interface* %0, i32 0, i32 1 | |
%out2 = getelementptr inbounds %DELAY_4_interface, %DELAY_4_interface* %0, i32 0, i32 2 | |
%out3 = getelementptr inbounds %DELAY_4_interface, %DELAY_4_interface* %0, i32 0, i32 3 | |
%out4 = getelementptr inbounds %DELAY_4_interface, %DELAY_4_interface* %0, i32 0, i32 4 | |
%temp = getelementptr inbounds %DELAY_4_interface, %DELAY_4_interface* %0, i32 0, i32 5 | |
%load_out3 = load float, float* %out3, align 4 | |
store float %load_out3, float* %out4, align 4 | |
%load_out2 = load float, float* %out2, align 4 | |
store float %load_out2, float* %out3, align 4 | |
%load_out1 = load float, float* %out1, align 4 | |
store float %load_out1, float* %out2, align 4 | |
%load_temp = load float, float* %temp, align 4 | |
store float %load_temp, float* %out1, align 4 | |
%load_in = load float, float* %in, align 4 | |
store float %load_in, float* %temp, align 4 | |
ret void | |
} | |
define void @FADE(%FADE_interface* %0) { | |
entry: | |
%IN1 = getelementptr inbounds %FADE_interface, %FADE_interface* %0, i32 0, i32 0 | |
%IN2 = getelementptr inbounds %FADE_interface, %FADE_interface* %0, i32 0, i32 1 | |
%F = getelementptr inbounds %FADE_interface, %FADE_interface* %0, i32 0, i32 2 | |
%TF = getelementptr inbounds %FADE_interface, %FADE_interface* %0, i32 0, i32 3 | |
%rst = getelementptr inbounds %FADE_interface, %FADE_interface* %0, i32 0, i32 4 | |
%Y = getelementptr inbounds %FADE_interface, %FADE_interface* %0, i32 0, i32 5 | |
%rmx = getelementptr inbounds %FADE_interface, %FADE_interface* %0, i32 0, i32 6 | |
%1 = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %rmx, i32 0, i32 4 | |
%load_rst = load i8, i8* %rst, align 1 | |
%2 = icmp ne i8 %load_rst, 0 | |
br i1 %2, label %3, label %5 | |
3: ; preds = %entry | |
%load_F = load i8, i8* %F, align 1 | |
%4 = icmp ne i8 %load_F, 0 | |
%tmpVar = xor i1 %4, true | |
br label %5 | |
5: ; preds = %3, %entry | |
%6 = phi i1 [ %2, %entry ], [ %tmpVar, %3 ] | |
%7 = zext i1 %6 to i8 | |
store i8 %7, i8* %1, align 1 | |
%8 = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %rmx, i32 0, i32 0 | |
%load_rst1 = load i8, i8* %rst, align 1 | |
%9 = icmp ne i8 %load_rst1, 0 | |
br i1 %9, label %10, label %12 | |
10: ; preds = %5 | |
%load_F2 = load i8, i8* %F, align 1 | |
%11 = icmp ne i8 %load_F2, 0 | |
br label %12 | |
12: ; preds = %10, %5 | |
%13 = phi i1 [ %9, %5 ], [ %11, %10 ] | |
%14 = zext i1 %13 to i8 | |
store i8 %14, i8* %8, align 1 | |
%15 = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %rmx, i32 0, i32 1 | |
%load_TF = load i64, i64* %TF, align 4 | |
store i64 %load_TF, i64* %15, align 4 | |
%16 = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %rmx, i32 0, i32 3 | |
%load_F3 = load i8, i8* %F, align 1 | |
store i8 %load_F3, i8* %16, align 1 | |
call void @RMP_W(%RMP_W_interface* %rmx) | |
%load_in2 = load float, float* %IN2, align 4 | |
%load_In1 = load float, float* %IN1, align 4 | |
%tmpVar4 = fsub float %load_in2, %load_In1 | |
%tmpVar5 = fdiv float %tmpVar4, 6.553500e+04 | |
%WORD_TO_REAL_instance = alloca %WORD_TO_REAL_interface, align 8 | |
%17 = getelementptr inbounds %WORD_TO_REAL_interface, %WORD_TO_REAL_interface* %WORD_TO_REAL_instance, i32 0, i32 0 | |
%out = getelementptr inbounds %RMP_W_interface, %RMP_W_interface* %rmx, i32 0, i32 5 | |
%load_ = load i16, i16* %out, align 2 | |
store i16 %load_, i16* %17, align 2 | |
%call = call float @WORD_TO_REAL(%WORD_TO_REAL_interface* %WORD_TO_REAL_instance) | |
%tmpVar6 = fmul float %tmpVar5, %call | |
%load_in1 = load float, float* %IN1, align 4 | |
%tmpVar7 = fadd float %tmpVar6, %load_in1 | |
store float %tmpVar7, float* %Y, align 4 | |
ret void | |
} | |
define void @FILTER_DW(%FILTER_DW_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %FILTER_DW_interface, %FILTER_DW_interface* %0, i32 0, i32 0 | |
%T = getelementptr inbounds %FILTER_DW_interface, %FILTER_DW_interface* %0, i32 0, i32 1 | |
%Y = getelementptr inbounds %FILTER_DW_interface, %FILTER_DW_interface* %0, i32 0, i32 2 | |
%last = getelementptr inbounds %FILTER_DW_interface, %FILTER_DW_interface* %0, i32 0, i32 3 | |
%tx = getelementptr inbounds %FILTER_DW_interface, %FILTER_DW_interface* %0, i32 0, i32 4 | |
%init = getelementptr inbounds %FILTER_DW_interface, %FILTER_DW_interface* %0, i32 0, i32 5 | |
%Yi = getelementptr inbounds %FILTER_DW_interface, %FILTER_DW_interface* %0, i32 0, i32 6 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %9, label %8 | |
condition_body: ; preds = %9 | |
store i8 1, i8* %init, align 1 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%2 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%load_X = load i32, i32* %X, align 4 | |
store i32 %load_X, i32* %2, align 4 | |
%call2 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
store float %call2, float* %Yi, align 4 | |
br label %continue | |
else: ; preds = %9 | |
%load_Yi = load float, float* %Yi, align 4 | |
%DWORD_TO_REAL_instance3 = alloca %DWORD_TO_REAL_interface, align 8 | |
%3 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance3, i32 0, i32 0 | |
%load_X4 = load i32, i32* %X, align 4 | |
store i32 %load_X4, i32* %3, align 4 | |
%call5 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance3) | |
%DWORD_TO_REAL_instance6 = alloca %DWORD_TO_REAL_interface, align 8 | |
%4 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance6, i32 0, i32 0 | |
%load_Y = load i32, i32* %Y, align 4 | |
store i32 %load_Y, i32* %4, align 4 | |
%call7 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance6) | |
%tmpVar8 = fsub float %call5, %call7 | |
%DWORD_TO_REAL_instance9 = alloca %DWORD_TO_REAL_interface, align 8 | |
%5 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance9, i32 0, i32 0 | |
%load_tx = load i32, i32* %tx, align 4 | |
%load_last = load i32, i32* %last, align 4 | |
%tmpVar10 = sub i32 %load_tx, %load_last | |
store i32 %tmpVar10, i32* %5, align 4 | |
%call11 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance9) | |
%tmpVar12 = fmul float %tmpVar8, %call11 | |
%TIME_TO_REAL_instance = alloca %TIME_TO_REAL_interface, align 8 | |
%6 = getelementptr inbounds %TIME_TO_REAL_interface, %TIME_TO_REAL_interface* %TIME_TO_REAL_instance, i32 0, i32 0 | |
%load_T13 = load i64, i64* %T, align 4 | |
store i64 %load_T13, i64* %6, align 4 | |
%call14 = call float @TIME_TO_REAL(%TIME_TO_REAL_interface* %TIME_TO_REAL_instance) | |
%tmpVar15 = fdiv float %tmpVar12, %call14 | |
%tmpVar16 = fadd float %load_Yi, %tmpVar15 | |
store float %tmpVar16, float* %Yi, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%load_tx17 = load i32, i32* %tx, align 4 | |
store i32 %load_tx17, i32* %last, align 4 | |
%REAL_TO_DWORD_instance = alloca %REAL_TO_DWORD_interface, align 8 | |
%7 = getelementptr inbounds %REAL_TO_DWORD_interface, %REAL_TO_DWORD_interface* %REAL_TO_DWORD_instance, i32 0, i32 0 | |
%load_Yi18 = load float, float* %Yi, align 4 | |
store float %load_Yi18, float* %7, align 4 | |
%call19 = call i32 @REAL_TO_DWORD(%REAL_TO_DWORD_interface* %REAL_TO_DWORD_instance) | |
store i32 %call19, i32* %Y, align 4 | |
ret void | |
8: ; preds = %entry | |
%load_T = load i64, i64* %T, align 4 | |
%tmpVar1 = icmp eq i64 %load_T, 0 | |
br label %9 | |
9: ; preds = %8, %entry | |
%10 = phi i1 [ %tmpVar, %entry ], [ %tmpVar1, %8 ] | |
br i1 %10, label %condition_body, label %else | |
} | |
define void @FILTER_I(%FILTER_I_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %FILTER_I_interface, %FILTER_I_interface* %0, i32 0, i32 0 | |
%T = getelementptr inbounds %FILTER_I_interface, %FILTER_I_interface* %0, i32 0, i32 1 | |
%Y = getelementptr inbounds %FILTER_I_interface, %FILTER_I_interface* %0, i32 0, i32 2 | |
%Yi = getelementptr inbounds %FILTER_I_interface, %FILTER_I_interface* %0, i32 0, i32 3 | |
%last = getelementptr inbounds %FILTER_I_interface, %FILTER_I_interface* %0, i32 0, i32 4 | |
%tx = getelementptr inbounds %FILTER_I_interface, %FILTER_I_interface* %0, i32 0, i32 5 | |
%init = getelementptr inbounds %FILTER_I_interface, %FILTER_I_interface* %0, i32 0, i32 6 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %11, label %10 | |
condition_body: ; preds = %11 | |
store i8 1, i8* %init, align 1 | |
%INT_TO_DINT_instance = alloca %INT_TO_DINT_interface, align 8 | |
%2 = getelementptr inbounds %INT_TO_DINT_interface, %INT_TO_DINT_interface* %INT_TO_DINT_instance, i32 0, i32 0 | |
%load_X = load i16, i16* %X, align 2 | |
store i16 %load_X, i16* %2, align 2 | |
%call2 = call i32 @INT_TO_DINT(%INT_TO_DINT_interface* %INT_TO_DINT_instance) | |
%tmpVar3 = mul i32 %call2, 1000 | |
store i32 %tmpVar3, i32* %Yi, align 4 | |
br label %continue | |
else: ; preds = %11 | |
%load_Yi = load i32, i32* %Yi, align 4 | |
%INT_TO_DINT_instance4 = alloca %INT_TO_DINT_interface, align 8 | |
%3 = getelementptr inbounds %INT_TO_DINT_interface, %INT_TO_DINT_interface* %INT_TO_DINT_instance4, i32 0, i32 0 | |
%load_X5 = load i16, i16* %X, align 2 | |
%4 = sext i16 %load_X5 to i32 | |
%load_Y = load i16, i16* %Y, align 2 | |
%5 = sext i16 %load_Y to i32 | |
%tmpVar6 = sub i32 %4, %5 | |
%6 = trunc i32 %tmpVar6 to i16 | |
store i16 %6, i16* %3, align 2 | |
%call7 = call i32 @INT_TO_DINT(%INT_TO_DINT_interface* %INT_TO_DINT_instance4) | |
%DWORD_TO_DINT_instance = alloca %DWORD_TO_DINT_interface, align 8 | |
%7 = getelementptr inbounds %DWORD_TO_DINT_interface, %DWORD_TO_DINT_interface* %DWORD_TO_DINT_instance, i32 0, i32 0 | |
%load_tx = load i32, i32* %tx, align 4 | |
%load_last = load i32, i32* %last, align 4 | |
%tmpVar8 = sub i32 %load_tx, %load_last | |
store i32 %tmpVar8, i32* %7, align 4 | |
%call9 = call i32 @DWORD_TO_DINT(%DWORD_TO_DINT_interface* %DWORD_TO_DINT_instance) | |
%tmpVar10 = mul i32 %call7, %call9 | |
%tmpVar11 = mul i32 %tmpVar10, 1000 | |
%TIME_TO_DINT_instance = alloca %TIME_TO_DINT_interface, align 8 | |
%8 = getelementptr inbounds %TIME_TO_DINT_interface, %TIME_TO_DINT_interface* %TIME_TO_DINT_instance, i32 0, i32 0 | |
%load_T12 = load i64, i64* %T, align 4 | |
store i64 %load_T12, i64* %8, align 4 | |
%call13 = call i32 @TIME_TO_DINT(%TIME_TO_DINT_interface* %TIME_TO_DINT_instance) | |
%tmpVar14 = sdiv i32 %tmpVar11, %call13 | |
%tmpVar15 = add i32 %load_Yi, %tmpVar14 | |
store i32 %tmpVar15, i32* %Yi, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%load_tx16 = load i32, i32* %tx, align 4 | |
store i32 %load_tx16, i32* %last, align 4 | |
%DINT_TO_INT_instance = alloca %DINT_TO_INT_interface, align 8 | |
%9 = getelementptr inbounds %DINT_TO_INT_interface, %DINT_TO_INT_interface* %DINT_TO_INT_instance, i32 0, i32 0 | |
%load_yi = load i32, i32* %Yi, align 4 | |
%tmpVar17 = sdiv i32 %load_yi, 1000 | |
store i32 %tmpVar17, i32* %9, align 4 | |
%call18 = call i16 @DINT_TO_INT(%DINT_TO_INT_interface* %DINT_TO_INT_instance) | |
store i16 %call18, i16* %Y, align 2 | |
ret void | |
10: ; preds = %entry | |
%load_T = load i64, i64* %T, align 4 | |
%tmpVar1 = icmp eq i64 %load_T, 0 | |
br label %11 | |
11: ; preds = %10, %entry | |
%12 = phi i1 [ %tmpVar, %entry ], [ %tmpVar1, %10 ] | |
br i1 %12, label %condition_body, label %else | |
} | |
define void @FILTER_MAV_DW(%FILTER_MAV_DW_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %FILTER_MAV_DW_interface, %FILTER_MAV_DW_interface* %0, i32 0, i32 0 | |
%N = getelementptr inbounds %FILTER_MAV_DW_interface, %FILTER_MAV_DW_interface* %0, i32 0, i32 1 | |
%RST = getelementptr inbounds %FILTER_MAV_DW_interface, %FILTER_MAV_DW_interface* %0, i32 0, i32 2 | |
%Y = getelementptr inbounds %FILTER_MAV_DW_interface, %FILTER_MAV_DW_interface* %0, i32 0, i32 3 | |
%init = getelementptr inbounds %FILTER_MAV_DW_interface, %FILTER_MAV_DW_interface* %0, i32 0, i32 4 | |
%buffer = getelementptr inbounds %FILTER_MAV_DW_interface, %FILTER_MAV_DW_interface* %0, i32 0, i32 5 | |
%i = getelementptr inbounds %FILTER_MAV_DW_interface, %FILTER_MAV_DW_interface* %0, i32 0, i32 6 | |
%tmp = alloca i16, align 2 | |
store i16 0, i16* %tmp, align 2 | |
%MIN_instance = alloca %MIN_interface, align 8 | |
%1 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 0 | |
%load_N = load i16, i16* %N, align 2 | |
%2 = zext i16 %load_N to i64 | |
store i64 %2, i64* %1, align 4 | |
%3 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 1 | |
store i64 32, i64* %3, align 4 | |
%call = call i64 @MIN(%MIN_interface* %MIN_instance) | |
%4 = trunc i64 %call to i16 | |
store i16 %4, i16* %N, align 2 | |
%load_init = load i8, i8* %init, align 1 | |
%5 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %5, true | |
br i1 %tmpVar, label %17, label %15 | |
condition_body: ; preds = %21 | |
store i8 1, i8* %init, align 1 | |
%UINT_TO_INT_instance = alloca %UINT_TO_INT_interface, align 8 | |
%6 = getelementptr inbounds %UINT_TO_INT_interface, %UINT_TO_INT_interface* %UINT_TO_INT_instance, i32 0, i32 0 | |
%load_N3 = load i16, i16* %N, align 2 | |
store i16 %load_N3, i16* %6, align 2 | |
%call4 = call i16 @UINT_TO_INT(%UINT_TO_INT_interface* %UINT_TO_INT_instance) | |
%7 = sext i16 %call4 to i32 | |
%tmpVar5 = sub i32 %7, 1 | |
%8 = trunc i32 %tmpVar5 to i16 | |
store i16 %8, i16* %tmp, align 2 | |
store i16 0, i16* %i, align 2 | |
br label %condition_check | |
else: ; preds = %21 | |
%UINT_TO_INT_instance22 = alloca %UINT_TO_INT_interface, align 8 | |
%9 = getelementptr inbounds %UINT_TO_INT_interface, %UINT_TO_INT_interface* %UINT_TO_INT_instance22, i32 0, i32 0 | |
%load_N23 = load i16, i16* %N, align 2 | |
store i16 %load_N23, i16* %9, align 2 | |
%call24 = call i16 @UINT_TO_INT(%UINT_TO_INT_interface* %UINT_TO_INT_instance22) | |
store i16 %call24, i16* %tmp, align 2 | |
%INC1_instance = alloca %INC1_interface, align 8 | |
%10 = getelementptr inbounds %INC1_interface, %INC1_interface* %INC1_instance, i32 0, i32 0 | |
%load_i25 = load i16, i16* %i, align 2 | |
store i16 %load_i25, i16* %10, align 2 | |
%11 = getelementptr inbounds %INC1_interface, %INC1_interface* %INC1_instance, i32 0, i32 1 | |
%load_tmp26 = load i16, i16* %tmp, align 2 | |
store i16 %load_tmp26, i16* %11, align 2 | |
%call27 = call i16 @INC1(%INC1_interface* %INC1_instance) | |
store i16 %call27, i16* %i, align 2 | |
%load_Y = load i32, i32* %Y, align 4 | |
%load_X28 = load i32, i32* %X, align 4 | |
%load_i29 = load i16, i16* %i, align 2 | |
%12 = sext i16 %load_i29 to i32 | |
%tmpVar30 = mul i32 1, %12 | |
%tmpVar31 = add i32 %tmpVar30, 0 | |
%tmpVar32 = getelementptr inbounds [32 x i32], [32 x i32]* %buffer, i32 0, i32 %tmpVar31 | |
%load_tmpVar = load i32, i32* %tmpVar32, align 4 | |
%tmpVar33 = sub i32 %load_X28, %load_tmpVar | |
%load_N34 = load i16, i16* %N, align 2 | |
%13 = zext i16 %load_N34 to i32 | |
%tmpVar35 = sdiv i32 %tmpVar33, %13 | |
%tmpVar36 = add i32 %load_Y, %tmpVar35 | |
store i32 %tmpVar36, i32* %Y, align 4 | |
%load_i37 = load i16, i16* %i, align 2 | |
%14 = sext i16 %load_i37 to i32 | |
%tmpVar38 = mul i32 1, %14 | |
%tmpVar39 = add i32 %tmpVar38, 0 | |
%tmpVar40 = getelementptr inbounds [32 x i32], [32 x i32]* %buffer, i32 0, i32 %tmpVar39 | |
%load_X41 = load i32, i32* %X, align 4 | |
store i32 %load_X41, i32* %tmpVar40, align 4 | |
br label %continue | |
continue: ; preds = %else, %continue6 | |
ret void | |
15: ; preds = %entry | |
%load_rst = load i8, i8* %RST, align 1 | |
%16 = icmp ne i8 %load_rst, 0 | |
br label %17 | |
17: ; preds = %15, %entry | |
%18 = phi i1 [ %tmpVar, %entry ], [ %16, %15 ] | |
br i1 %18, label %21, label %19 | |
19: ; preds = %17 | |
%load_N1 = load i16, i16* %N, align 2 | |
%20 = zext i16 %load_N1 to i32 | |
%tmpVar2 = icmp eq i32 %20, 0 | |
br label %21 | |
21: ; preds = %19, %17 | |
%22 = phi i1 [ %18, %17 ], [ %tmpVar2, %19 ] | |
br i1 %22, label %condition_body, label %else | |
condition_check: ; preds = %increment, %condition_body | |
%load_i = load i16, i16* %i, align 2 | |
%load_i7 = load i16, i16* %i, align 2 | |
%load_tmp = load i16, i16* %tmp, align 2 | |
%tmpVar8 = icmp sle i16 %load_i7, %load_tmp | |
%23 = zext i1 %tmpVar8 to i8 | |
%24 = icmp ne i8 %23, 0 | |
br i1 %24, label %26, label %29 | |
for_body: ; preds = %36 | |
%load_i16 = load i16, i16* %i, align 2 | |
%25 = sext i16 %load_i16 to i32 | |
%tmpVar17 = mul i32 1, %25 | |
%tmpVar18 = add i32 %tmpVar17, 0 | |
%tmpVar19 = getelementptr inbounds [32 x i32], [32 x i32]* %buffer, i32 0, i32 %tmpVar18 | |
%load_X = load i32, i32* %X, align 4 | |
store i32 %load_X, i32* %tmpVar19, align 4 | |
br label %increment | |
increment: ; preds = %for_body | |
%tmpVar20 = add i16 %load_i, 1 | |
store i16 %tmpVar20, i16* %i, align 2 | |
br label %condition_check | |
continue6: ; preds = %36 | |
%load_X21 = load i32, i32* %X, align 4 | |
store i32 %load_X21, i32* %Y, align 4 | |
br label %continue | |
26: ; preds = %condition_check | |
%load_i9 = load i16, i16* %i, align 2 | |
%tmpVar10 = icmp sge i16 %load_i9, 0 | |
%27 = zext i1 %tmpVar10 to i8 | |
%28 = icmp ne i8 %27, 0 | |
br label %29 | |
29: ; preds = %26, %condition_check | |
%30 = phi i1 [ %24, %condition_check ], [ %28, %26 ] | |
%31 = zext i1 %30 to i8 | |
%32 = icmp ne i8 %31, 0 | |
br i1 %32, label %36, label %33 | |
33: ; preds = %29 | |
%load_i11 = load i16, i16* %i, align 2 | |
%load_tmp12 = load i16, i16* %tmp, align 2 | |
%tmpVar13 = icmp sge i16 %load_i11, %load_tmp12 | |
%34 = zext i1 %tmpVar13 to i8 | |
%35 = icmp ne i8 %34, 0 | |
br i1 %35, label %40, label %43 | |
36: ; preds = %43, %29 | |
%37 = phi i1 [ %32, %29 ], [ %46, %43 ] | |
%38 = zext i1 %37 to i8 | |
%39 = icmp ne i8 %38, 0 | |
br i1 %39, label %for_body, label %continue6 | |
40: ; preds = %33 | |
%load_i14 = load i16, i16* %i, align 2 | |
%tmpVar15 = icmp sle i16 %load_i14, 0 | |
%41 = zext i1 %tmpVar15 to i8 | |
%42 = icmp ne i8 %41, 0 | |
br label %43 | |
43: ; preds = %40, %33 | |
%44 = phi i1 [ %35, %33 ], [ %42, %40 ] | |
%45 = zext i1 %44 to i8 | |
%46 = icmp ne i8 %45, 0 | |
br label %36 | |
} | |
define void @FILTER_MAV_W(%FILTER_MAV_W_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %FILTER_MAV_W_interface, %FILTER_MAV_W_interface* %0, i32 0, i32 0 | |
%N = getelementptr inbounds %FILTER_MAV_W_interface, %FILTER_MAV_W_interface* %0, i32 0, i32 1 | |
%RST = getelementptr inbounds %FILTER_MAV_W_interface, %FILTER_MAV_W_interface* %0, i32 0, i32 2 | |
%Y = getelementptr inbounds %FILTER_MAV_W_interface, %FILTER_MAV_W_interface* %0, i32 0, i32 3 | |
%init = getelementptr inbounds %FILTER_MAV_W_interface, %FILTER_MAV_W_interface* %0, i32 0, i32 4 | |
%buffer = getelementptr inbounds %FILTER_MAV_W_interface, %FILTER_MAV_W_interface* %0, i32 0, i32 5 | |
%i = getelementptr inbounds %FILTER_MAV_W_interface, %FILTER_MAV_W_interface* %0, i32 0, i32 6 | |
%sum = getelementptr inbounds %FILTER_MAV_W_interface, %FILTER_MAV_W_interface* %0, i32 0, i32 7 | |
%tmp = alloca i16, align 2 | |
store i16 0, i16* %tmp, align 2 | |
%MIN_instance = alloca %MIN_interface, align 8 | |
%1 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 0 | |
%load_N = load i16, i16* %N, align 2 | |
%2 = zext i16 %load_N to i64 | |
store i64 %2, i64* %1, align 4 | |
%3 = getelementptr inbounds %MIN_interface, %MIN_interface* %MIN_instance, i32 0, i32 1 | |
store i64 32, i64* %3, align 4 | |
%call = call i64 @MIN(%MIN_interface* %MIN_instance) | |
%4 = trunc i64 %call to i16 | |
store i16 %4, i16* %N, align 2 | |
%load_init = load i8, i8* %init, align 1 | |
%5 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %5, true | |
br i1 %tmpVar, label %22, label %20 | |
condition_body: ; preds = %26 | |
store i8 1, i8* %init, align 1 | |
%UINT_TO_INT_instance = alloca %UINT_TO_INT_interface, align 8 | |
%6 = getelementptr inbounds %UINT_TO_INT_interface, %UINT_TO_INT_interface* %UINT_TO_INT_instance, i32 0, i32 0 | |
%load_N3 = load i16, i16* %N, align 2 | |
store i16 %load_N3, i16* %6, align 2 | |
%call4 = call i16 @UINT_TO_INT(%UINT_TO_INT_interface* %UINT_TO_INT_instance) | |
%7 = sext i16 %call4 to i32 | |
%tmpVar5 = sub i32 %7, 1 | |
%8 = trunc i32 %tmpVar5 to i16 | |
store i16 %8, i16* %tmp, align 2 | |
store i16 1, i16* %i, align 2 | |
br label %condition_check | |
else: ; preds = %26 | |
%UINT_TO_INT_instance24 = alloca %UINT_TO_INT_interface, align 8 | |
%9 = getelementptr inbounds %UINT_TO_INT_interface, %UINT_TO_INT_interface* %UINT_TO_INT_instance24, i32 0, i32 0 | |
%load_N25 = load i16, i16* %N, align 2 | |
store i16 %load_N25, i16* %9, align 2 | |
%call26 = call i16 @UINT_TO_INT(%UINT_TO_INT_interface* %UINT_TO_INT_instance24) | |
store i16 %call26, i16* %tmp, align 2 | |
%INC1_instance = alloca %INC1_interface, align 8 | |
%10 = getelementptr inbounds %INC1_interface, %INC1_interface* %INC1_instance, i32 0, i32 0 | |
%load_i27 = load i16, i16* %i, align 2 | |
store i16 %load_i27, i16* %10, align 2 | |
%11 = getelementptr inbounds %INC1_interface, %INC1_interface* %INC1_instance, i32 0, i32 1 | |
%load_tmp28 = load i16, i16* %tmp, align 2 | |
store i16 %load_tmp28, i16* %11, align 2 | |
%call29 = call i16 @INC1(%INC1_interface* %INC1_instance) | |
store i16 %call29, i16* %i, align 2 | |
%load_sum = load i32, i32* %sum, align 4 | |
%load_X30 = load i16, i16* %X, align 2 | |
%12 = zext i16 %load_X30 to i32 | |
%tmpVar31 = add i32 %load_sum, %12 | |
%load_i32 = load i16, i16* %i, align 2 | |
%13 = sub i16 %load_i32, 1 | |
%14 = sext i16 %13 to i32 | |
%tmpVar33 = mul i32 1, %14 | |
%tmpVar34 = add i32 %tmpVar33, 0 | |
%tmpVar35 = getelementptr inbounds [32 x i16], [32 x i16]* %buffer, i32 0, i32 %tmpVar34 | |
%load_tmpVar = load i16, i16* %tmpVar35, align 2 | |
%15 = zext i16 %load_tmpVar to i32 | |
%tmpVar36 = sub i32 %tmpVar31, %15 | |
store i32 %tmpVar36, i32* %sum, align 4 | |
%DWORD_TO_WORD_instance = alloca %DWORD_TO_WORD_interface, align 8 | |
%16 = getelementptr inbounds %DWORD_TO_WORD_interface, %DWORD_TO_WORD_interface* %DWORD_TO_WORD_instance, i32 0, i32 0 | |
%load_sum37 = load i32, i32* %sum, align 4 | |
%load_N38 = load i16, i16* %N, align 2 | |
%17 = zext i16 %load_N38 to i32 | |
%tmpVar39 = sdiv i32 %load_sum37, %17 | |
store i32 %tmpVar39, i32* %16, align 4 | |
%call40 = call i16 @DWORD_TO_WORD(%DWORD_TO_WORD_interface* %DWORD_TO_WORD_instance) | |
store i16 %call40, i16* %Y, align 2 | |
%load_i41 = load i16, i16* %i, align 2 | |
%18 = sub i16 %load_i41, 1 | |
%19 = sext i16 %18 to i32 | |
%tmpVar42 = mul i32 1, %19 | |
%tmpVar43 = add i32 %tmpVar42, 0 | |
%tmpVar44 = getelementptr inbounds [32 x i16], [32 x i16]* %buffer, i32 0, i32 %tmpVar43 | |
%load_X45 = load i16, i16* %X, align 2 | |
store i16 %load_X45, i16* %tmpVar44, align 2 | |
br label %continue | |
continue: ; preds = %else, %continue6 | |
ret void | |
20: ; preds = %entry | |
%load_rst = load i8, i8* %RST, align 1 | |
%21 = icmp ne i8 %load_rst, 0 | |
br label %22 | |
22: ; preds = %20, %entry | |
%23 = phi i1 [ %tmpVar, %entry ], [ %21, %20 ] | |
br i1 %23, label %26, label %24 | |
24: ; preds = %22 | |
%load_N1 = load i16, i16* %N, align 2 | |
%25 = zext i16 %load_N1 to i32 | |
%tmpVar2 = icmp eq i32 %25, 0 | |
br label %26 | |
26: ; preds = %24, %22 | |
%27 = phi i1 [ %23, %22 ], [ %tmpVar2, %24 ] | |
br i1 %27, label %condition_body, label %else | |
condition_check: ; preds = %increment, %condition_body | |
%load_i = load i16, i16* %i, align 2 | |
%load_i7 = load i16, i16* %i, align 2 | |
%load_tmp = load i16, i16* %tmp, align 2 | |
%tmpVar8 = icmp sle i16 %load_i7, %load_tmp | |
%28 = zext i1 %tmpVar8 to i8 | |
%29 = icmp ne i8 %28, 0 | |
br i1 %29, label %34, label %37 | |
for_body: ; preds = %44 | |
%load_i16 = load i16, i16* %i, align 2 | |
%30 = sub i16 %load_i16, 1 | |
%31 = sext i16 %30 to i32 | |
%tmpVar17 = mul i32 1, %31 | |
%tmpVar18 = add i32 %tmpVar17, 0 | |
%tmpVar19 = getelementptr inbounds [32 x i16], [32 x i16]* %buffer, i32 0, i32 %tmpVar18 | |
%load_X = load i16, i16* %X, align 2 | |
store i16 %load_X, i16* %tmpVar19, align 2 | |
br label %increment | |
increment: ; preds = %for_body | |
%tmpVar20 = add i16 %load_i, 1 | |
store i16 %tmpVar20, i16* %i, align 2 | |
br label %condition_check | |
continue6: ; preds = %44 | |
%load_Y = load i16, i16* %Y, align 2 | |
%32 = zext i16 %load_Y to i32 | |
%load_N21 = load i16, i16* %N, align 2 | |
%33 = zext i16 %load_N21 to i32 | |
%tmpVar22 = mul i32 %32, %33 | |
store i32 %tmpVar22, i32* %sum, align 4 | |
%load_X23 = load i16, i16* %X, align 2 | |
store i16 %load_X23, i16* %Y, align 2 | |
br label %continue | |
34: ; preds = %condition_check | |
%load_i9 = load i16, i16* %i, align 2 | |
%tmpVar10 = icmp sge i16 %load_i9, 1 | |
%35 = zext i1 %tmpVar10 to i8 | |
%36 = icmp ne i8 %35, 0 | |
br label %37 | |
37: ; preds = %34, %condition_check | |
%38 = phi i1 [ %29, %condition_check ], [ %36, %34 ] | |
%39 = zext i1 %38 to i8 | |
%40 = icmp ne i8 %39, 0 | |
br i1 %40, label %44, label %41 | |
41: ; preds = %37 | |
%load_i11 = load i16, i16* %i, align 2 | |
%load_tmp12 = load i16, i16* %tmp, align 2 | |
%tmpVar13 = icmp sge i16 %load_i11, %load_tmp12 | |
%42 = zext i1 %tmpVar13 to i8 | |
%43 = icmp ne i8 %42, 0 | |
br i1 %43, label %48, label %51 | |
44: ; preds = %51, %37 | |
%45 = phi i1 [ %40, %37 ], [ %54, %51 ] | |
%46 = zext i1 %45 to i8 | |
%47 = icmp ne i8 %46, 0 | |
br i1 %47, label %for_body, label %continue6 | |
48: ; preds = %41 | |
%load_i14 = load i16, i16* %i, align 2 | |
%tmpVar15 = icmp sle i16 %load_i14, 1 | |
%49 = zext i1 %tmpVar15 to i8 | |
%50 = icmp ne i8 %49, 0 | |
br label %51 | |
51: ; preds = %48, %41 | |
%52 = phi i1 [ %43, %41 ], [ %50, %48 ] | |
%53 = zext i1 %52 to i8 | |
%54 = icmp ne i8 %53, 0 | |
br label %44 | |
} | |
define void @FILTER_W(%FILTER_W_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %FILTER_W_interface, %FILTER_W_interface* %0, i32 0, i32 0 | |
%T = getelementptr inbounds %FILTER_W_interface, %FILTER_W_interface* %0, i32 0, i32 1 | |
%Y = getelementptr inbounds %FILTER_W_interface, %FILTER_W_interface* %0, i32 0, i32 2 | |
%last = getelementptr inbounds %FILTER_W_interface, %FILTER_W_interface* %0, i32 0, i32 3 | |
%tx = getelementptr inbounds %FILTER_W_interface, %FILTER_W_interface* %0, i32 0, i32 4 | |
%init = getelementptr inbounds %FILTER_W_interface, %FILTER_W_interface* %0, i32 0, i32 5 | |
%tmp = getelementptr inbounds %FILTER_W_interface, %FILTER_W_interface* %0, i32 0, i32 6 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %tx, align 4 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %10, label %9 | |
condition_body: ; preds = %10 | |
store i8 1, i8* %init, align 1 | |
%load_tx = load i32, i32* %tx, align 4 | |
store i32 %load_tx, i32* %last, align 4 | |
%load_X = load i16, i16* %X, align 2 | |
store i16 %load_X, i16* %Y, align 2 | |
br label %continue | |
branch: ; preds = %10 | |
%load_Y = load i16, i16* %Y, align 2 | |
%2 = zext i16 %load_Y to i32 | |
%load_X2 = load i16, i16* %X, align 2 | |
%3 = zext i16 %load_X2 to i32 | |
%tmpVar3 = icmp eq i32 %2, %3 | |
br i1 %tmpVar3, label %condition_body4, label %else | |
condition_body4: ; preds = %branch | |
%load_tx5 = load i32, i32* %tx, align 4 | |
store i32 %load_tx5, i32* %last, align 4 | |
br label %continue | |
else: ; preds = %branch | |
%WORD_TO_DWORD_instance = alloca %WORD_TO_DWORD_interface, align 8 | |
%4 = getelementptr inbounds %WORD_TO_DWORD_interface, %WORD_TO_DWORD_interface* %WORD_TO_DWORD_instance, i32 0, i32 0 | |
%load_X6 = load i16, i16* %X, align 2 | |
%5 = zext i16 %load_X6 to i32 | |
%load_Y7 = load i16, i16* %Y, align 2 | |
%6 = zext i16 %load_Y7 to i32 | |
%tmpVar8 = sub i32 %5, %6 | |
%7 = trunc i32 %tmpVar8 to i16 | |
store i16 %7, i16* %4, align 2 | |
%call9 = call i32 @WORD_TO_DWORD(%WORD_TO_DWORD_interface* %WORD_TO_DWORD_instance) | |
%load_tx10 = load i32, i32* %tx, align 4 | |
%load_last = load i32, i32* %last, align 4 | |
%tmpVar11 = sub i32 %load_tx10, %load_last | |
%tmpVar12 = mul i32 %call9, %tmpVar11 | |
%TIME_TO_DWORD_instance = alloca %TIME_TO_DWORD_interface, align 8 | |
%8 = getelementptr inbounds %TIME_TO_DWORD_interface, %TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance, i32 0, i32 0 | |
%load_T13 = load i64, i64* %T, align 4 | |
store i64 %load_T13, i64* %8, align 4 | |
%call14 = call i32 @TIME_TO_DWORD(%TIME_TO_DWORD_interface* %TIME_TO_DWORD_instance) | |
%tmpVar15 = sdiv i32 %tmpVar12, %call14 | |
store i32 %tmpVar15, i32* %tmp, align 4 | |
%load_tmp = load i32, i32* %tmp, align 4 | |
%tmpVar17 = icmp ne i32 %load_tmp, 0 | |
br i1 %tmpVar17, label %condition_body18, label %continue16 | |
continue: ; preds = %continue16, %condition_body4, %condition_body | |
ret void | |
9: ; preds = %entry | |
%load_T = load i64, i64* %T, align 4 | |
%tmpVar1 = icmp eq i64 %load_T, 0 | |
br label %10 | |
10: ; preds = %9, %entry | |
%11 = phi i1 [ %tmpVar, %entry ], [ %tmpVar1, %9 ] | |
br i1 %11, label %condition_body, label %branch | |
condition_body18: ; preds = %else | |
%DINT_TO_WORD_instance = alloca %DINT_TO_WORD_interface, align 8 | |
%12 = getelementptr inbounds %DINT_TO_WORD_interface, %DINT_TO_WORD_interface* %DINT_TO_WORD_instance, i32 0, i32 0 | |
%WORD_TO_DINT_instance = alloca %WORD_TO_DINT_interface, align 8 | |
%13 = getelementptr inbounds %WORD_TO_DINT_interface, %WORD_TO_DINT_interface* %WORD_TO_DINT_instance, i32 0, i32 0 | |
%load_Y19 = load i16, i16* %Y, align 2 | |
store i16 %load_Y19, i16* %13, align 2 | |
%call20 = call i32 @WORD_TO_DINT(%WORD_TO_DINT_interface* %WORD_TO_DINT_instance) | |
%DWORD_TO_DINT_instance = alloca %DWORD_TO_DINT_interface, align 8 | |
%14 = getelementptr inbounds %DWORD_TO_DINT_interface, %DWORD_TO_DINT_interface* %DWORD_TO_DINT_instance, i32 0, i32 0 | |
%load_tmp21 = load i32, i32* %tmp, align 4 | |
store i32 %load_tmp21, i32* %14, align 4 | |
%call22 = call i32 @DWORD_TO_DINT(%DWORD_TO_DINT_interface* %DWORD_TO_DINT_instance) | |
%tmpVar23 = add i32 %call20, %call22 | |
store i32 %tmpVar23, i32* %12, align 4 | |
%call24 = call i16 @DINT_TO_WORD(%DINT_TO_WORD_interface* %DINT_TO_WORD_instance) | |
store i16 %call24, i16* %Y, align 2 | |
%load_tx25 = load i32, i32* %tx, align 4 | |
store i32 %load_tx25, i32* %last, align 4 | |
br label %continue16 | |
continue16: ; preds = %condition_body18, %else | |
br label %continue | |
} | |
define void @FILTER_WAV(%FILTER_WAV_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %FILTER_WAV_interface, %FILTER_WAV_interface* %0, i32 0, i32 0 | |
%W = getelementptr inbounds %FILTER_WAV_interface, %FILTER_WAV_interface* %0, i32 0, i32 1 | |
%RST = getelementptr inbounds %FILTER_WAV_interface, %FILTER_WAV_interface* %0, i32 0, i32 2 | |
%Y = getelementptr inbounds %FILTER_WAV_interface, %FILTER_WAV_interface* %0, i32 0, i32 3 | |
%init = getelementptr inbounds %FILTER_WAV_interface, %FILTER_WAV_interface* %0, i32 0, i32 4 | |
%buffer = getelementptr inbounds %FILTER_WAV_interface, %FILTER_WAV_interface* %0, i32 0, i32 5 | |
%i = getelementptr inbounds %FILTER_WAV_interface, %FILTER_WAV_interface* %0, i32 0, i32 6 | |
%n = getelementptr inbounds %FILTER_WAV_interface, %FILTER_WAV_interface* %0, i32 0, i32 7 | |
%load_init = load i8, i8* %init, align 1 | |
%1 = icmp ne i8 %load_init, 0 | |
%tmpVar = xor i1 %1, true | |
br i1 %tmpVar, label %7, label %5 | |
condition_body: ; preds = %7 | |
store i8 1, i8* %init, align 1 | |
store i16 0, i16* %i, align 2 | |
br label %condition_check | |
else: ; preds = %7 | |
%INC1_instance = alloca %INC1_interface, align 8 | |
%2 = getelementptr inbounds %INC1_interface, %INC1_interface* %INC1_instance, i32 0, i32 0 | |
%load_i16 = load i16, i16* %i, align 2 | |
store i16 %load_i16, i16* %2, align 2 | |
%3 = getelementptr inbounds %INC1_interface, %INC1_interface* %INC1_instance, i32 0, i32 1 | |
store i16 16, i16* %3, align 2 | |
%call = call i16 @INC1(%INC1_interface* %INC1_instance) | |
store i16 %call, i16* %i, align 2 | |
%load_i17 = load i16, i16* %i, align 2 | |
%4 = sext i16 %load_i17 to i32 | |
%tmpVar18 = mul i32 1, %4 | |
%tmpVar19 = add i32 %tmpVar18, 0 | |
%tmpVar20 = getelementptr inbounds [16 x float], [16 x float]* %buffer, i32 0, i32 %tmpVar19 | |
%load_X21 = load float, float* %X, align 4 | |
store float %load_X21, float* %tmpVar20, align 4 | |
br label %continue | |
continue: ; preds = %else, %continue1 | |
store float 0.000000e+00, float* %Y, align 4 | |
store i16 0, i16* %n, align 2 | |
br label %condition_check22 | |
5: ; preds = %entry | |
%load_rst = load i8, i8* %RST, align 1 | |
%6 = icmp ne i8 %load_rst, 0 | |
br label %7 | |
7: ; preds = %5, %entry | |
%8 = phi i1 [ %tmpVar, %entry ], [ %6, %5 ] | |
br i1 %8, label %condition_body, label %else | |
condition_check: ; preds = %increment, %condition_body | |
%load_i = load i16, i16* %i, align 2 | |
%load_i2 = load i16, i16* %i, align 2 | |
%tmpVar3 = icmp sle i16 %load_i2, 15 | |
%9 = zext i1 %tmpVar3 to i8 | |
%10 = icmp ne i8 %9, 0 | |
br i1 %10, label %12, label %15 | |
for_body: ; preds = %22 | |
%load_i10 = load i16, i16* %i, align 2 | |
%11 = sext i16 %load_i10 to i32 | |
%tmpVar11 = mul i32 1, %11 | |
%tmpVar12 = add i32 %tmpVar11, 0 | |
%tmpVar13 = getelementptr inbounds [16 x float], [16 x float]* %buffer, i32 0, i32 %tmpVar12 | |
%load_X = load float, float* %X, align 4 | |
store float %load_X, float* %tmpVar13, align 4 | |
br label %increment | |
increment: ; preds = %for_body | |
%tmpVar14 = add i16 %load_i, 1 | |
store i16 %tmpVar14, i16* %i, align 2 | |
br label %condition_check | |
continue1: ; preds = %22 | |
store i16 15, i16* %i, align 2 | |
%load_X15 = load float, float* %X, align 4 | |
store float %load_X15, float* %Y, align 4 | |
br label %continue | |
12: ; preds = %condition_check | |
%load_i4 = load i16, i16* %i, align 2 | |
%tmpVar5 = icmp sge i16 %load_i4, 0 | |
%13 = zext i1 %tmpVar5 to i8 | |
%14 = icmp ne i8 %13, 0 | |
br label %15 | |
15: ; preds = %12, %condition_check | |
%16 = phi i1 [ %10, %condition_check ], [ %14, %12 ] | |
%17 = zext i1 %16 to i8 | |
%18 = icmp ne i8 %17, 0 | |
br i1 %18, label %22, label %19 | |
19: ; preds = %15 | |
%load_i6 = load i16, i16* %i, align 2 | |
%tmpVar7 = icmp sge i16 %load_i6, 15 | |
%20 = zext i1 %tmpVar7 to i8 | |
%21 = icmp ne i8 %20, 0 | |
br i1 %21, label %26, label %29 | |
22: ; preds = %29, %15 | |
%23 = phi i1 [ %18, %15 ], [ %32, %29 ] | |
%24 = zext i1 %23 to i8 | |
%25 = icmp ne i8 %24, 0 | |
br i1 %25, label %for_body, label %continue1 | |
26: ; preds = %19 | |
%load_i8 = load i16, i16* %i, align 2 | |
%tmpVar9 = icmp sle i16 %load_i8, 0 | |
%27 = zext i1 %tmpVar9 to i8 | |
%28 = icmp ne i8 %27, 0 | |
br label %29 | |
29: ; preds = %26, %19 | |
%30 = phi i1 [ %21, %19 ], [ %28, %26 ] | |
%31 = zext i1 %30 to i8 | |
%32 = icmp ne i8 %31, 0 | |
br label %22 | |
condition_check22: ; preds = %increment24, %continue | |
%load_n = load i16, i16* %n, align 2 | |
%load_n26 = load i16, i16* %n, align 2 | |
%tmpVar27 = icmp sle i16 %load_n26, 15 | |
%33 = zext i1 %tmpVar27 to i8 | |
%34 = icmp ne i8 %33, 0 | |
br i1 %34, label %39, label %42 | |
for_body23: ; preds = %49 | |
%load_i34 = load i16, i16* %i, align 2 | |
%35 = sext i16 %load_i34 to i32 | |
%tmpVar35 = mul i32 1, %35 | |
%tmpVar36 = add i32 %tmpVar35, 0 | |
%tmpVar37 = getelementptr inbounds [16 x float], [16 x float]* %buffer, i32 0, i32 %tmpVar36 | |
%load_tmpVar = load float, float* %tmpVar37, align 4 | |
%load_n38 = load i16, i16* %n, align 2 | |
%36 = sext i16 %load_n38 to i32 | |
%tmpVar39 = mul i32 1, %36 | |
%tmpVar40 = add i32 %tmpVar39, 0 | |
%tmpVar41 = getelementptr inbounds [16 x float], [16 x float]* %W, i32 0, i32 %tmpVar40 | |
%load_tmpVar42 = load float, float* %tmpVar41, align 4 | |
%tmpVar43 = fmul float %load_tmpVar, %load_tmpVar42 | |
%load_Y = load float, float* %Y, align 4 | |
%tmpVar44 = fadd float %tmpVar43, %load_Y | |
store float %tmpVar44, float* %Y, align 4 | |
%DEC1_instance = alloca %DEC1_interface, align 8 | |
%37 = getelementptr inbounds %DEC1_interface, %DEC1_interface* %DEC1_instance, i32 0, i32 0 | |
%load_i45 = load i16, i16* %i, align 2 | |
store i16 %load_i45, i16* %37, align 2 | |
%38 = getelementptr inbounds %DEC1_interface, %DEC1_interface* %DEC1_instance, i32 0, i32 1 | |
store i16 16, i16* %38, align 2 | |
%call46 = call i16 @DEC1(%DEC1_interface* %DEC1_instance) | |
store i16 %call46, i16* %i, align 2 | |
br label %increment24 | |
increment24: ; preds = %for_body23 | |
%tmpVar47 = add i16 %load_n, 1 | |
store i16 %tmpVar47, i16* %n, align 2 | |
br label %condition_check22 | |
continue25: ; preds = %49 | |
ret void | |
39: ; preds = %condition_check22 | |
%load_n28 = load i16, i16* %n, align 2 | |
%tmpVar29 = icmp sge i16 %load_n28, 0 | |
%40 = zext i1 %tmpVar29 to i8 | |
%41 = icmp ne i8 %40, 0 | |
br label %42 | |
42: ; preds = %39, %condition_check22 | |
%43 = phi i1 [ %34, %condition_check22 ], [ %41, %39 ] | |
%44 = zext i1 %43 to i8 | |
%45 = icmp ne i8 %44, 0 | |
br i1 %45, label %49, label %46 | |
46: ; preds = %42 | |
%load_n30 = load i16, i16* %n, align 2 | |
%tmpVar31 = icmp sge i16 %load_n30, 15 | |
%47 = zext i1 %tmpVar31 to i8 | |
%48 = icmp ne i8 %47, 0 | |
br i1 %48, label %53, label %56 | |
49: ; preds = %56, %42 | |
%50 = phi i1 [ %45, %42 ], [ %59, %56 ] | |
%51 = zext i1 %50 to i8 | |
%52 = icmp ne i8 %51, 0 | |
br i1 %52, label %for_body23, label %continue25 | |
53: ; preds = %46 | |
%load_n32 = load i16, i16* %n, align 2 | |
%tmpVar33 = icmp sle i16 %load_n32, 0 | |
%54 = zext i1 %tmpVar33 to i8 | |
%55 = icmp ne i8 %54, 0 | |
br label %56 | |
56: ; preds = %53, %46 | |
%57 = phi i1 [ %48, %46 ], [ %55, %53 ] | |
%58 = zext i1 %57 to i8 | |
%59 = icmp ne i8 %58, 0 | |
br label %49 | |
} | |
define float @MIX(%MIX_interface* %0) { | |
entry: | |
%A = getelementptr inbounds %MIX_interface, %MIX_interface* %0, i32 0, i32 0 | |
%B = getelementptr inbounds %MIX_interface, %MIX_interface* %0, i32 0, i32 1 | |
%M = getelementptr inbounds %MIX_interface, %MIX_interface* %0, i32 0, i32 2 | |
%MIX = alloca float, align 4 | |
store float 0.000000e+00, float* %MIX, align 4 | |
%load_M = load float, float* %M, align 4 | |
%tmpVar = fsub float 1.000000e+00, %load_M | |
%load_A = load float, float* %A, align 4 | |
%tmpVar1 = fmul float %tmpVar, %load_A | |
%load_M2 = load float, float* %M, align 4 | |
%load_B = load float, float* %B, align 4 | |
%tmpVar3 = fmul float %load_M2, %load_B | |
%tmpVar4 = fadd float %tmpVar1, %tmpVar3 | |
store float %tmpVar4, float* %MIX, align 4 | |
%MIX_ret = load float, float* %MIX, align 4 | |
ret float %MIX_ret | |
} | |
define float @MUX_R2(%MUX_R2_interface* %0) { | |
entry: | |
%IN0 = getelementptr inbounds %MUX_R2_interface, %MUX_R2_interface* %0, i32 0, i32 0 | |
%IN1 = getelementptr inbounds %MUX_R2_interface, %MUX_R2_interface* %0, i32 0, i32 1 | |
%A = getelementptr inbounds %MUX_R2_interface, %MUX_R2_interface* %0, i32 0, i32 2 | |
%MUX_R2 = alloca float, align 4 | |
store float 0.000000e+00, float* %MUX_R2, align 4 | |
%SEL_instance = alloca %SEL_interface, align 8 | |
%1 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 0 | |
%load_A = load i8, i8* %A, align 1 | |
store i8 %load_A, i8* %1, align 1 | |
%2 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 1 | |
%load_IN0 = load float, float* %IN0, align 4 | |
%3 = fptoui float %load_IN0 to i64 | |
store i64 %3, i64* %2, align 4 | |
%4 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 2 | |
%load_IN1 = load float, float* %IN1, align 4 | |
%5 = fptoui float %load_IN1 to i64 | |
store i64 %5, i64* %4, align 4 | |
%call = call i64 @SEL(%SEL_interface* %SEL_instance) | |
%6 = uitofp i64 %call to float | |
store float %6, float* %MUX_R2, align 4 | |
%MUX_R2_ret = load float, float* %MUX_R2, align 4 | |
ret float %MUX_R2_ret | |
} | |
define float @MUX_R4(%MUX_R4_interface* %0) { | |
entry: | |
%IN0 = getelementptr inbounds %MUX_R4_interface, %MUX_R4_interface* %0, i32 0, i32 0 | |
%IN1 = getelementptr inbounds %MUX_R4_interface, %MUX_R4_interface* %0, i32 0, i32 1 | |
%IN2 = getelementptr inbounds %MUX_R4_interface, %MUX_R4_interface* %0, i32 0, i32 2 | |
%IN3 = getelementptr inbounds %MUX_R4_interface, %MUX_R4_interface* %0, i32 0, i32 3 | |
%A0 = getelementptr inbounds %MUX_R4_interface, %MUX_R4_interface* %0, i32 0, i32 4 | |
%A1 = getelementptr inbounds %MUX_R4_interface, %MUX_R4_interface* %0, i32 0, i32 5 | |
%MUX_R4 = alloca float, align 4 | |
store float 0.000000e+00, float* %MUX_R4, align 4 | |
%load_A1 = load i8, i8* %A1, align 1 | |
%1 = icmp ne i8 %load_A1, 0 | |
br i1 %1, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%SEL_instance = alloca %SEL_interface, align 8 | |
%2 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 0 | |
%load_A0 = load i8, i8* %A0, align 1 | |
store i8 %load_A0, i8* %2, align 1 | |
%3 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 1 | |
%load_IN2 = load float, float* %IN2, align 4 | |
%4 = fptoui float %load_IN2 to i64 | |
store i64 %4, i64* %3, align 4 | |
%5 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 2 | |
%load_IN3 = load float, float* %IN3, align 4 | |
%6 = fptoui float %load_IN3 to i64 | |
store i64 %6, i64* %5, align 4 | |
%call = call i64 @SEL(%SEL_interface* %SEL_instance) | |
%7 = uitofp i64 %call to float | |
store float %7, float* %MUX_R4, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%SEL_instance1 = alloca %SEL_interface, align 8 | |
%8 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance1, i32 0, i32 0 | |
%load_A02 = load i8, i8* %A0, align 1 | |
store i8 %load_A02, i8* %8, align 1 | |
%9 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance1, i32 0, i32 1 | |
%load_IN0 = load float, float* %IN0, align 4 | |
%10 = fptoui float %load_IN0 to i64 | |
store i64 %10, i64* %9, align 4 | |
%11 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance1, i32 0, i32 2 | |
%load_IN1 = load float, float* %IN1, align 4 | |
%12 = fptoui float %load_IN1 to i64 | |
store i64 %12, i64* %11, align 4 | |
%call3 = call i64 @SEL(%SEL_interface* %SEL_instance1) | |
%13 = uitofp i64 %call3 to float | |
store float %13, float* %MUX_R4, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%MUX_R4_ret = load float, float* %MUX_R4, align 4 | |
ret float %MUX_R4_ret | |
} | |
define float @OFFSET(%OFFSET_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %OFFSET_interface, %OFFSET_interface* %0, i32 0, i32 0 | |
%O1 = getelementptr inbounds %OFFSET_interface, %OFFSET_interface* %0, i32 0, i32 1 | |
%O2 = getelementptr inbounds %OFFSET_interface, %OFFSET_interface* %0, i32 0, i32 2 | |
%O3 = getelementptr inbounds %OFFSET_interface, %OFFSET_interface* %0, i32 0, i32 3 | |
%O4 = getelementptr inbounds %OFFSET_interface, %OFFSET_interface* %0, i32 0, i32 4 | |
%D = getelementptr inbounds %OFFSET_interface, %OFFSET_interface* %0, i32 0, i32 5 | |
%Offset_1 = getelementptr inbounds %OFFSET_interface, %OFFSET_interface* %0, i32 0, i32 6 | |
%Offset_2 = getelementptr inbounds %OFFSET_interface, %OFFSET_interface* %0, i32 0, i32 7 | |
%Offset_3 = getelementptr inbounds %OFFSET_interface, %OFFSET_interface* %0, i32 0, i32 8 | |
%Offset_4 = getelementptr inbounds %OFFSET_interface, %OFFSET_interface* %0, i32 0, i32 9 | |
%default = getelementptr inbounds %OFFSET_interface, %OFFSET_interface* %0, i32 0, i32 10 | |
%OFFSET = alloca float, align 4 | |
store float 0.000000e+00, float* %OFFSET, align 4 | |
%load_D = load i8, i8* %D, align 1 | |
%1 = icmp ne i8 %load_D, 0 | |
br i1 %1, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_default = load float, float* %default, align 4 | |
store float %load_default, float* %OFFSET, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%load_X = load float, float* %X, align 4 | |
store float %load_X, float* %OFFSET, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%load_O1 = load i8, i8* %O1, align 1 | |
%2 = icmp ne i8 %load_O1, 0 | |
br i1 %2, label %condition_body2, label %continue1 | |
condition_body2: ; preds = %continue | |
%load_OFFSET = load float, float* %OFFSET, align 4 | |
%load_offset_1 = load float, float* %Offset_1, align 4 | |
%tmpVar = fadd float %load_OFFSET, %load_offset_1 | |
store float %tmpVar, float* %OFFSET, align 4 | |
br label %continue1 | |
continue1: ; preds = %condition_body2, %continue | |
%load_O2 = load i8, i8* %O2, align 1 | |
%3 = icmp ne i8 %load_O2, 0 | |
br i1 %3, label %condition_body4, label %continue3 | |
condition_body4: ; preds = %continue1 | |
%load_OFFSET5 = load float, float* %OFFSET, align 4 | |
%load_offset_2 = load float, float* %Offset_2, align 4 | |
%tmpVar6 = fadd float %load_OFFSET5, %load_offset_2 | |
store float %tmpVar6, float* %OFFSET, align 4 | |
br label %continue3 | |
continue3: ; preds = %condition_body4, %continue1 | |
%load_O3 = load i8, i8* %O3, align 1 | |
%4 = icmp ne i8 %load_O3, 0 | |
br i1 %4, label %condition_body8, label %continue7 | |
condition_body8: ; preds = %continue3 | |
%load_OFFSET9 = load float, float* %OFFSET, align 4 | |
%load_offset_3 = load float, float* %Offset_3, align 4 | |
%tmpVar10 = fadd float %load_OFFSET9, %load_offset_3 | |
store float %tmpVar10, float* %OFFSET, align 4 | |
br label %continue7 | |
continue7: ; preds = %condition_body8, %continue3 | |
%load_O4 = load i8, i8* %O4, align 1 | |
%5 = icmp ne i8 %load_O4, 0 | |
br i1 %5, label %condition_body12, label %continue11 | |
condition_body12: ; preds = %continue7 | |
%load_OFFSET13 = load float, float* %OFFSET, align 4 | |
%load_offset_4 = load float, float* %Offset_4, align 4 | |
%tmpVar14 = fadd float %load_OFFSET13, %load_offset_4 | |
store float %tmpVar14, float* %OFFSET, align 4 | |
br label %continue11 | |
continue11: ; preds = %condition_body12, %continue7 | |
%OFFSET_ret = load float, float* %OFFSET, align 4 | |
ret float %OFFSET_ret | |
} | |
define float @OFFSET2(%OFFSET2_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %OFFSET2_interface, %OFFSET2_interface* %0, i32 0, i32 0 | |
%O1 = getelementptr inbounds %OFFSET2_interface, %OFFSET2_interface* %0, i32 0, i32 1 | |
%O2 = getelementptr inbounds %OFFSET2_interface, %OFFSET2_interface* %0, i32 0, i32 2 | |
%O3 = getelementptr inbounds %OFFSET2_interface, %OFFSET2_interface* %0, i32 0, i32 3 | |
%O4 = getelementptr inbounds %OFFSET2_interface, %OFFSET2_interface* %0, i32 0, i32 4 | |
%D = getelementptr inbounds %OFFSET2_interface, %OFFSET2_interface* %0, i32 0, i32 5 | |
%Offset_1 = getelementptr inbounds %OFFSET2_interface, %OFFSET2_interface* %0, i32 0, i32 6 | |
%Offset_2 = getelementptr inbounds %OFFSET2_interface, %OFFSET2_interface* %0, i32 0, i32 7 | |
%Offset_3 = getelementptr inbounds %OFFSET2_interface, %OFFSET2_interface* %0, i32 0, i32 8 | |
%Offset_4 = getelementptr inbounds %OFFSET2_interface, %OFFSET2_interface* %0, i32 0, i32 9 | |
%default = getelementptr inbounds %OFFSET2_interface, %OFFSET2_interface* %0, i32 0, i32 10 | |
%OFFSET2 = alloca float, align 4 | |
store float 0.000000e+00, float* %OFFSET2, align 4 | |
%load_D = load i8, i8* %D, align 1 | |
%1 = icmp ne i8 %load_D, 0 | |
br i1 %1, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_default = load float, float* %default, align 4 | |
store float %load_default, float* %OFFSET2, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%load_X = load float, float* %X, align 4 | |
store float %load_X, float* %OFFSET2, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%load_O4 = load i8, i8* %O4, align 1 | |
%2 = icmp ne i8 %load_O4, 0 | |
br i1 %2, label %condition_body4, label %branch | |
condition_body4: ; preds = %continue | |
%load_OFFSET2 = load float, float* %OFFSET2, align 4 | |
%load_offset_4 = load float, float* %Offset_4, align 4 | |
%tmpVar = fadd float %load_OFFSET2, %load_offset_4 | |
store float %tmpVar, float* %OFFSET2, align 4 | |
br label %continue3 | |
branch: ; preds = %continue | |
%load_O3 = load i8, i8* %O3, align 1 | |
%3 = icmp ne i8 %load_O3, 0 | |
br i1 %3, label %condition_body5, label %branch1 | |
condition_body5: ; preds = %branch | |
%load_OFFSET26 = load float, float* %OFFSET2, align 4 | |
%load_offset_3 = load float, float* %Offset_3, align 4 | |
%tmpVar7 = fadd float %load_OFFSET26, %load_offset_3 | |
store float %tmpVar7, float* %OFFSET2, align 4 | |
br label %continue3 | |
branch1: ; preds = %branch | |
%load_O2 = load i8, i8* %O2, align 1 | |
%4 = icmp ne i8 %load_O2, 0 | |
br i1 %4, label %condition_body8, label %branch2 | |
condition_body8: ; preds = %branch1 | |
%load_OFFSET29 = load float, float* %OFFSET2, align 4 | |
%load_offset_2 = load float, float* %Offset_2, align 4 | |
%tmpVar10 = fadd float %load_OFFSET29, %load_offset_2 | |
store float %tmpVar10, float* %OFFSET2, align 4 | |
br label %continue3 | |
branch2: ; preds = %branch1 | |
%load_O1 = load i8, i8* %O1, align 1 | |
%5 = icmp ne i8 %load_O1, 0 | |
br i1 %5, label %condition_body11, label %continue3 | |
condition_body11: ; preds = %branch2 | |
%load_OFFSET212 = load float, float* %OFFSET2, align 4 | |
%load_offset_1 = load float, float* %Offset_1, align 4 | |
%tmpVar13 = fadd float %load_OFFSET212, %load_offset_1 | |
store float %tmpVar13, float* %OFFSET2, align 4 | |
br label %continue3 | |
continue3: ; preds = %condition_body11, %branch2, %condition_body8, %condition_body5, %condition_body4 | |
%OFFSET2_ret = load float, float* %OFFSET2, align 4 | |
ret float %OFFSET2_ret | |
} | |
define float @_OVERRIDE(%_OVERRIDE_interface* %0) { | |
entry: | |
%X1 = getelementptr inbounds %_OVERRIDE_interface, %_OVERRIDE_interface* %0, i32 0, i32 0 | |
%X2 = getelementptr inbounds %_OVERRIDE_interface, %_OVERRIDE_interface* %0, i32 0, i32 1 | |
%X3 = getelementptr inbounds %_OVERRIDE_interface, %_OVERRIDE_interface* %0, i32 0, i32 2 | |
%E1 = getelementptr inbounds %_OVERRIDE_interface, %_OVERRIDE_interface* %0, i32 0, i32 3 | |
%E2 = getelementptr inbounds %_OVERRIDE_interface, %_OVERRIDE_interface* %0, i32 0, i32 4 | |
%E3 = getelementptr inbounds %_OVERRIDE_interface, %_OVERRIDE_interface* %0, i32 0, i32 5 | |
%_OVERRIDE = alloca float, align 4 | |
store float 0.000000e+00, float* %_OVERRIDE, align 4 | |
%load_E1 = load i8, i8* %E1, align 1 | |
%1 = icmp ne i8 %load_E1, 0 | |
br i1 %1, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
%load_X1 = load float, float* %X1, align 4 | |
store float %load_X1, float* %_OVERRIDE, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
%load_E2 = load i8, i8* %E2, align 1 | |
%2 = icmp ne i8 %load_E2, 0 | |
br i1 %2, label %4, label %9 | |
condition_body4: ; preds = %9 | |
%load_X2 = load float, float* %X2, align 4 | |
store float %load_X2, float* %_OVERRIDE, align 4 | |
br label %continue1 | |
continue1: ; preds = %condition_body4, %9 | |
%load_E3 = load i8, i8* %E3, align 1 | |
%3 = icmp ne i8 %load_E3, 0 | |
br i1 %3, label %11, label %16 | |
4: ; preds = %continue | |
%ABS_instance = alloca %ABS_interface, align 8 | |
%5 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance, i32 0, i32 0 | |
%load_x2 = load float, float* %X2, align 4 | |
%6 = fptoui float %load_x2 to i64 | |
store i64 %6, i64* %5, align 4 | |
%call = call i64 @ABS(%ABS_interface* %ABS_instance) | |
%ABS_instance2 = alloca %ABS_interface, align 8 | |
%7 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance2, i32 0, i32 0 | |
%load__OVERRIDE = load float, float* %_OVERRIDE, align 4 | |
%8 = fptoui float %load__OVERRIDE to i64 | |
store i64 %8, i64* %7, align 4 | |
%call3 = call i64 @ABS(%ABS_interface* %ABS_instance2) | |
%tmpVar = icmp sgt i64 %call, %call3 | |
br label %9 | |
9: ; preds = %4, %continue | |
%10 = phi i1 [ %2, %continue ], [ %tmpVar, %4 ] | |
br i1 %10, label %condition_body4, label %continue1 | |
condition_body12: ; preds = %16 | |
%load_X3 = load float, float* %X3, align 4 | |
store float %load_X3, float* %_OVERRIDE, align 4 | |
br label %continue5 | |
continue5: ; preds = %condition_body12, %16 | |
%_OVERRIDE_ret = load float, float* %_OVERRIDE, align 4 | |
ret float %_OVERRIDE_ret | |
11: ; preds = %continue1 | |
%ABS_instance6 = alloca %ABS_interface, align 8 | |
%12 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance6, i32 0, i32 0 | |
%load_x3 = load float, float* %X3, align 4 | |
%13 = fptoui float %load_x3 to i64 | |
store i64 %13, i64* %12, align 4 | |
%call7 = call i64 @ABS(%ABS_interface* %ABS_instance6) | |
%ABS_instance8 = alloca %ABS_interface, align 8 | |
%14 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance8, i32 0, i32 0 | |
%load__OVERRIDE9 = load float, float* %_OVERRIDE, align 4 | |
%15 = fptoui float %load__OVERRIDE9 to i64 | |
store i64 %15, i64* %14, align 4 | |
%call10 = call i64 @ABS(%ABS_interface* %ABS_instance8) | |
%tmpVar11 = icmp sgt i64 %call7, %call10 | |
br label %16 | |
16: ; preds = %11, %continue1 | |
%17 = phi i1 [ %3, %continue1 ], [ %tmpVar11, %11 ] | |
br i1 %17, label %condition_body12, label %continue5 | |
} | |
define i8 @RANGE_TO_BYTE(%RANGE_TO_BYTE_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %RANGE_TO_BYTE_interface, %RANGE_TO_BYTE_interface* %0, i32 0, i32 0 | |
%low = getelementptr inbounds %RANGE_TO_BYTE_interface, %RANGE_TO_BYTE_interface* %0, i32 0, i32 1 | |
%high = getelementptr inbounds %RANGE_TO_BYTE_interface, %RANGE_TO_BYTE_interface* %0, i32 0, i32 2 | |
%RANGE_TO_BYTE = alloca i8, align 1 | |
store i8 0, i8* %RANGE_TO_BYTE, align 1 | |
%INT_TO_BYTE_instance = alloca %INT_TO_BYTE_interface, align 8 | |
%1 = getelementptr inbounds %INT_TO_BYTE_interface, %INT_TO_BYTE_interface* %INT_TO_BYTE_instance, i32 0, i32 0 | |
%TRUNC_instance = alloca %TRUNC_interface, align 8 | |
%2 = getelementptr inbounds %TRUNC_interface, %TRUNC_interface* %TRUNC_instance, i32 0, i32 0 | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%3 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_low = load float, float* %low, align 4 | |
%4 = fptoui float %load_low to i64 | |
store i64 %4, i64* %3, align 4 | |
%5 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_X = load float, float* %X, align 4 | |
%6 = fptoui float %load_X to i64 | |
store i64 %6, i64* %5, align 4 | |
%7 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_high = load float, float* %high, align 4 | |
%8 = fptoui float %load_high to i64 | |
store i64 %8, i64* %7, align 4 | |
%call = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%9 = uitofp i64 %call to double | |
%load_low1 = load float, float* %low, align 4 | |
%10 = fpext float %load_low1 to double | |
%tmpVar = fsub double %9, %10 | |
%tmpVar2 = fmul double %tmpVar, 2.550000e+02 | |
%load_high3 = load float, float* %high, align 4 | |
%load_low4 = load float, float* %low, align 4 | |
%tmpVar5 = fsub float %load_high3, %load_low4 | |
%11 = fpext float %tmpVar5 to double | |
%tmpVar6 = fdiv double %tmpVar2, %11 | |
store double %tmpVar6, double* %2, align 8 | |
%call7 = call i16 @TRUNC(%TRUNC_interface* %TRUNC_instance) | |
store i16 %call7, i16* %1, align 2 | |
%call8 = call i8 @INT_TO_BYTE(%INT_TO_BYTE_interface* %INT_TO_BYTE_instance) | |
store i8 %call8, i8* %RANGE_TO_BYTE, align 1 | |
%RANGE_TO_BYTE_ret = load i8, i8* %RANGE_TO_BYTE, align 1 | |
ret i8 %RANGE_TO_BYTE_ret | |
} | |
define i16 @RANGE_TO_WORD(%RANGE_TO_WORD_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %RANGE_TO_WORD_interface, %RANGE_TO_WORD_interface* %0, i32 0, i32 0 | |
%low = getelementptr inbounds %RANGE_TO_WORD_interface, %RANGE_TO_WORD_interface* %0, i32 0, i32 1 | |
%high = getelementptr inbounds %RANGE_TO_WORD_interface, %RANGE_TO_WORD_interface* %0, i32 0, i32 2 | |
%RANGE_TO_WORD = alloca i16, align 2 | |
store i16 0, i16* %RANGE_TO_WORD, align 2 | |
%DINT_TO_WORD_instance = alloca %DINT_TO_WORD_interface, align 8 | |
%1 = getelementptr inbounds %DINT_TO_WORD_interface, %DINT_TO_WORD_interface* %DINT_TO_WORD_instance, i32 0, i32 0 | |
%TRUNC_instance = alloca %TRUNC_interface, align 8 | |
%2 = getelementptr inbounds %TRUNC_interface, %TRUNC_interface* %TRUNC_instance, i32 0, i32 0 | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%3 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_low = load float, float* %low, align 4 | |
%4 = fptoui float %load_low to i64 | |
store i64 %4, i64* %3, align 4 | |
%5 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_X = load float, float* %X, align 4 | |
%6 = fptoui float %load_X to i64 | |
store i64 %6, i64* %5, align 4 | |
%7 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_high = load float, float* %high, align 4 | |
%8 = fptoui float %load_high to i64 | |
store i64 %8, i64* %7, align 4 | |
%call = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%9 = uitofp i64 %call to double | |
%load_low1 = load float, float* %low, align 4 | |
%10 = fpext float %load_low1 to double | |
%tmpVar = fsub double %9, %10 | |
%tmpVar2 = fmul double %tmpVar, 6.553500e+04 | |
%load_high3 = load float, float* %high, align 4 | |
%load_low4 = load float, float* %low, align 4 | |
%tmpVar5 = fsub float %load_high3, %load_low4 | |
%11 = fpext float %tmpVar5 to double | |
%tmpVar6 = fdiv double %tmpVar2, %11 | |
store double %tmpVar6, double* %2, align 8 | |
%call7 = call i16 @TRUNC(%TRUNC_interface* %TRUNC_instance) | |
%12 = sext i16 %call7 to i32 | |
store i32 %12, i32* %1, align 4 | |
%call8 = call i16 @DINT_TO_WORD(%DINT_TO_WORD_interface* %DINT_TO_WORD_instance) | |
store i16 %call8, i16* %RANGE_TO_WORD, align 2 | |
%RANGE_TO_WORD_ret = load i16, i16* %RANGE_TO_WORD, align 2 | |
ret i16 %RANGE_TO_WORD_ret | |
} | |
define float @SCALE(%SCALE_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %SCALE_interface, %SCALE_interface* %0, i32 0, i32 0 | |
%K = getelementptr inbounds %SCALE_interface, %SCALE_interface* %0, i32 0, i32 1 | |
%O = getelementptr inbounds %SCALE_interface, %SCALE_interface* %0, i32 0, i32 2 | |
%MX = getelementptr inbounds %SCALE_interface, %SCALE_interface* %0, i32 0, i32 3 | |
%MN = getelementptr inbounds %SCALE_interface, %SCALE_interface* %0, i32 0, i32 4 | |
%SCALE = alloca float, align 4 | |
store float 0.000000e+00, float* %SCALE, align 4 | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%1 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_MN = load float, float* %MN, align 4 | |
%2 = fptoui float %load_MN to i64 | |
store i64 %2, i64* %1, align 4 | |
%3 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_X = load float, float* %X, align 4 | |
%load_K = load float, float* %K, align 4 | |
%tmpVar = fmul float %load_X, %load_K | |
%load_O = load float, float* %O, align 4 | |
%tmpVar1 = fadd float %tmpVar, %load_O | |
%4 = fptoui float %tmpVar1 to i64 | |
store i64 %4, i64* %3, align 4 | |
%5 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_MX = load float, float* %MX, align 4 | |
%6 = fptoui float %load_MX to i64 | |
store i64 %6, i64* %5, align 4 | |
%call = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%7 = uitofp i64 %call to float | |
store float %7, float* %SCALE, align 4 | |
%SCALE_ret = load float, float* %SCALE, align 4 | |
ret float %SCALE_ret | |
} | |
define float @SCALE_B(%SCALE_B_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %SCALE_B_interface, %SCALE_B_interface* %0, i32 0, i32 0 | |
%I_LO = getelementptr inbounds %SCALE_B_interface, %SCALE_B_interface* %0, i32 0, i32 1 | |
%I_HI = getelementptr inbounds %SCALE_B_interface, %SCALE_B_interface* %0, i32 0, i32 2 | |
%O_LO = getelementptr inbounds %SCALE_B_interface, %SCALE_B_interface* %0, i32 0, i32 3 | |
%O_HI = getelementptr inbounds %SCALE_B_interface, %SCALE_B_interface* %0, i32 0, i32 4 | |
%SCALE_B = alloca float, align 4 | |
store float 0.000000e+00, float* %SCALE_B, align 4 | |
%load_I_HI = load i8, i8* %I_HI, align 1 | |
%1 = zext i8 %load_I_HI to i32 | |
%load_I_LO = load i8, i8* %I_LO, align 1 | |
%2 = zext i8 %load_I_LO to i32 | |
%tmpVar = icmp eq i32 %1, %2 | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_O_LO = load float, float* %O_LO, align 4 | |
store float %load_O_LO, float* %SCALE_B, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%load_O_HI = load float, float* %O_HI, align 4 | |
%load_O_LO1 = load float, float* %O_LO, align 4 | |
%tmpVar2 = fsub float %load_O_HI, %load_O_LO1 | |
%BYTE_TO_REAL_instance = alloca %BYTE_TO_REAL_interface, align 8 | |
%3 = getelementptr inbounds %BYTE_TO_REAL_interface, %BYTE_TO_REAL_interface* %BYTE_TO_REAL_instance, i32 0, i32 0 | |
%load_I_HI3 = load i8, i8* %I_HI, align 1 | |
%4 = zext i8 %load_I_HI3 to i32 | |
%load_I_LO4 = load i8, i8* %I_LO, align 1 | |
%5 = zext i8 %load_I_LO4 to i32 | |
%tmpVar5 = sub i32 %4, %5 | |
%6 = trunc i32 %tmpVar5 to i8 | |
store i8 %6, i8* %3, align 1 | |
%call = call float @BYTE_TO_REAL(%BYTE_TO_REAL_interface* %BYTE_TO_REAL_instance) | |
%tmpVar6 = fdiv float %tmpVar2, %call | |
%BYTE_TO_REAL_instance7 = alloca %BYTE_TO_REAL_interface, align 8 | |
%7 = getelementptr inbounds %BYTE_TO_REAL_interface, %BYTE_TO_REAL_interface* %BYTE_TO_REAL_instance7, i32 0, i32 0 | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%8 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_I_LO8 = load i8, i8* %I_LO, align 1 | |
%9 = zext i8 %load_I_LO8 to i64 | |
store i64 %9, i64* %8, align 4 | |
%10 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_X = load i8, i8* %X, align 1 | |
%11 = zext i8 %load_X to i64 | |
store i64 %11, i64* %10, align 4 | |
%12 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_I_HI9 = load i8, i8* %I_HI, align 1 | |
%13 = zext i8 %load_I_HI9 to i64 | |
store i64 %13, i64* %12, align 4 | |
%call10 = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%14 = trunc i64 %call10 to i8 | |
store i8 %14, i8* %7, align 1 | |
%call11 = call float @BYTE_TO_REAL(%BYTE_TO_REAL_interface* %BYTE_TO_REAL_instance7) | |
%tmpVar12 = fmul float %tmpVar6, %call11 | |
store float %tmpVar12, float* %SCALE_B, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%SCALE_B_ret = load float, float* %SCALE_B, align 4 | |
ret float %SCALE_B_ret | |
} | |
define float @SCALE_B2(%SCALE_B2_interface* %0) { | |
entry: | |
%in1 = getelementptr inbounds %SCALE_B2_interface, %SCALE_B2_interface* %0, i32 0, i32 0 | |
%in2 = getelementptr inbounds %SCALE_B2_interface, %SCALE_B2_interface* %0, i32 0, i32 1 | |
%K = getelementptr inbounds %SCALE_B2_interface, %SCALE_B2_interface* %0, i32 0, i32 2 | |
%O = getelementptr inbounds %SCALE_B2_interface, %SCALE_B2_interface* %0, i32 0, i32 3 | |
%in1_min = getelementptr inbounds %SCALE_B2_interface, %SCALE_B2_interface* %0, i32 0, i32 4 | |
%in1_max = getelementptr inbounds %SCALE_B2_interface, %SCALE_B2_interface* %0, i32 0, i32 5 | |
%in2_min = getelementptr inbounds %SCALE_B2_interface, %SCALE_B2_interface* %0, i32 0, i32 6 | |
%in2_max = getelementptr inbounds %SCALE_B2_interface, %SCALE_B2_interface* %0, i32 0, i32 7 | |
%SCALE_B2 = alloca float, align 4 | |
store float 0.000000e+00, float* %SCALE_B2, align 4 | |
%load_in1_max = load float, float* %in1_max, align 4 | |
%load_in1_min = load float, float* %in1_min, align 4 | |
%tmpVar = fsub float %load_in1_max, %load_in1_min | |
%load_in1 = load i8, i8* %in1, align 1 | |
%1 = uitofp i8 %load_in1 to float | |
%tmpVar1 = fmul float %tmpVar, %1 | |
%load_in2_max = load float, float* %in2_max, align 4 | |
%load_in2_min = load float, float* %in2_min, align 4 | |
%tmpVar2 = fsub float %load_in2_max, %load_in2_min | |
%load_in2 = load i8, i8* %in2, align 1 | |
%2 = uitofp i8 %load_in2 to float | |
%tmpVar3 = fmul float %tmpVar2, %2 | |
%tmpVar4 = fadd float %tmpVar1, %tmpVar3 | |
%tmpVar5 = fmul float %tmpVar4, 0x3F70101020000000 | |
%load_in1_min6 = load float, float* %in1_min, align 4 | |
%tmpVar7 = fadd float %tmpVar5, %load_in1_min6 | |
%load_in2_min8 = load float, float* %in2_min, align 4 | |
%tmpVar9 = fadd float %tmpVar7, %load_in2_min8 | |
%load_K = load float, float* %K, align 4 | |
%tmpVar10 = fmul float %tmpVar9, %load_K | |
%load_O = load float, float* %O, align 4 | |
%tmpVar11 = fadd float %tmpVar10, %load_O | |
store float %tmpVar11, float* %SCALE_B2, align 4 | |
%SCALE_B2_ret = load float, float* %SCALE_B2, align 4 | |
ret float %SCALE_B2_ret | |
} | |
define float @SCALE_B4(%SCALE_B4_interface* %0) { | |
entry: | |
%in1 = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 0 | |
%in2 = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 1 | |
%in3 = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 2 | |
%in4 = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 3 | |
%K = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 4 | |
%O = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 5 | |
%in1_min = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 6 | |
%in1_max = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 7 | |
%in2_min = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 8 | |
%in2_max = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 9 | |
%in3_min = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 10 | |
%in3_max = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 11 | |
%in4_min = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 12 | |
%in4_max = getelementptr inbounds %SCALE_B4_interface, %SCALE_B4_interface* %0, i32 0, i32 13 | |
%SCALE_B4 = alloca float, align 4 | |
store float 0.000000e+00, float* %SCALE_B4, align 4 | |
%load_in1_max = load float, float* %in1_max, align 4 | |
%load_in1_min = load float, float* %in1_min, align 4 | |
%tmpVar = fsub float %load_in1_max, %load_in1_min | |
%load_in1 = load i8, i8* %in1, align 1 | |
%1 = uitofp i8 %load_in1 to float | |
%tmpVar1 = fmul float %tmpVar, %1 | |
%load_in2_max = load float, float* %in2_max, align 4 | |
%load_in2_min = load float, float* %in2_min, align 4 | |
%tmpVar2 = fsub float %load_in2_max, %load_in2_min | |
%load_in2 = load i8, i8* %in2, align 1 | |
%2 = uitofp i8 %load_in2 to float | |
%tmpVar3 = fmul float %tmpVar2, %2 | |
%tmpVar4 = fadd float %tmpVar1, %tmpVar3 | |
%load_in3_max = load float, float* %in3_max, align 4 | |
%load_in3_min = load float, float* %in3_min, align 4 | |
%tmpVar5 = fsub float %load_in3_max, %load_in3_min | |
%load_in3 = load i8, i8* %in3, align 1 | |
%3 = uitofp i8 %load_in3 to float | |
%tmpVar6 = fmul float %tmpVar5, %3 | |
%tmpVar7 = fadd float %tmpVar4, %tmpVar6 | |
%load_in4_max = load float, float* %in4_max, align 4 | |
%load_in4_min = load float, float* %in4_min, align 4 | |
%tmpVar8 = fsub float %load_in4_max, %load_in4_min | |
%load_in4 = load i8, i8* %in4, align 1 | |
%4 = uitofp i8 %load_in4 to float | |
%tmpVar9 = fmul float %tmpVar8, %4 | |
%tmpVar10 = fadd float %tmpVar7, %tmpVar9 | |
%tmpVar11 = fmul float %tmpVar10, 0x3F70101020000000 | |
%load_in1_min12 = load float, float* %in1_min, align 4 | |
%tmpVar13 = fadd float %tmpVar11, %load_in1_min12 | |
%load_in2_min14 = load float, float* %in2_min, align 4 | |
%tmpVar15 = fadd float %tmpVar13, %load_in2_min14 | |
%load_in3_min16 = load float, float* %in3_min, align 4 | |
%tmpVar17 = fadd float %tmpVar15, %load_in3_min16 | |
%load_in4_min18 = load float, float* %in4_min, align 4 | |
%tmpVar19 = fadd float %tmpVar17, %load_in4_min18 | |
%load_K = load float, float* %K, align 4 | |
%tmpVar20 = fmul float %tmpVar19, %load_K | |
%load_O = load float, float* %O, align 4 | |
%tmpVar21 = fadd float %tmpVar20, %load_O | |
store float %tmpVar21, float* %SCALE_B4, align 4 | |
%SCALE_B4_ret = load float, float* %SCALE_B4, align 4 | |
ret float %SCALE_B4_ret | |
} | |
define float @SCALE_B8(%SCALE_B8_interface* %0) { | |
entry: | |
%in1 = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 0 | |
%in2 = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 1 | |
%in3 = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 2 | |
%in4 = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 3 | |
%in5 = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 4 | |
%in6 = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 5 | |
%in7 = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 6 | |
%in8 = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 7 | |
%K = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 8 | |
%O = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 9 | |
%in1_min = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 10 | |
%in1_max = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 11 | |
%in2_min = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 12 | |
%in2_max = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 13 | |
%in3_min = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 14 | |
%in3_max = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 15 | |
%in4_min = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 16 | |
%in4_max = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 17 | |
%in5_min = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 18 | |
%in5_max = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 19 | |
%in6_min = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 20 | |
%in6_max = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 21 | |
%in7_min = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 22 | |
%in7_max = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 23 | |
%in8_min = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 24 | |
%in8_max = getelementptr inbounds %SCALE_B8_interface, %SCALE_B8_interface* %0, i32 0, i32 25 | |
%SCALE_B8 = alloca float, align 4 | |
store float 0.000000e+00, float* %SCALE_B8, align 4 | |
%load_in1_max = load float, float* %in1_max, align 4 | |
%load_in1_min = load float, float* %in1_min, align 4 | |
%tmpVar = fsub float %load_in1_max, %load_in1_min | |
%load_in1 = load i8, i8* %in1, align 1 | |
%1 = uitofp i8 %load_in1 to float | |
%tmpVar1 = fmul float %tmpVar, %1 | |
%load_in2_max = load float, float* %in2_max, align 4 | |
%load_in2_min = load float, float* %in2_min, align 4 | |
%tmpVar2 = fsub float %load_in2_max, %load_in2_min | |
%load_in2 = load i8, i8* %in2, align 1 | |
%2 = uitofp i8 %load_in2 to float | |
%tmpVar3 = fmul float %tmpVar2, %2 | |
%tmpVar4 = fadd float %tmpVar1, %tmpVar3 | |
%load_in3_max = load float, float* %in3_max, align 4 | |
%load_in3_min = load float, float* %in3_min, align 4 | |
%tmpVar5 = fsub float %load_in3_max, %load_in3_min | |
%load_in3 = load i8, i8* %in3, align 1 | |
%3 = uitofp i8 %load_in3 to float | |
%tmpVar6 = fmul float %tmpVar5, %3 | |
%tmpVar7 = fadd float %tmpVar4, %tmpVar6 | |
%load_in4_max = load float, float* %in4_max, align 4 | |
%load_in4_min = load float, float* %in4_min, align 4 | |
%tmpVar8 = fsub float %load_in4_max, %load_in4_min | |
%load_in4 = load i8, i8* %in4, align 1 | |
%4 = uitofp i8 %load_in4 to float | |
%tmpVar9 = fmul float %tmpVar8, %4 | |
%tmpVar10 = fadd float %tmpVar7, %tmpVar9 | |
%load_in5_max = load float, float* %in5_max, align 4 | |
%load_in5_min = load float, float* %in5_min, align 4 | |
%tmpVar11 = fsub float %load_in5_max, %load_in5_min | |
%load_in5 = load i8, i8* %in5, align 1 | |
%5 = uitofp i8 %load_in5 to float | |
%tmpVar12 = fmul float %tmpVar11, %5 | |
%tmpVar13 = fadd float %tmpVar10, %tmpVar12 | |
%load_in6_max = load float, float* %in6_max, align 4 | |
%load_in6_min = load float, float* %in6_min, align 4 | |
%tmpVar14 = fsub float %load_in6_max, %load_in6_min | |
%load_in6 = load i8, i8* %in6, align 1 | |
%6 = uitofp i8 %load_in6 to float | |
%tmpVar15 = fmul float %tmpVar14, %6 | |
%tmpVar16 = fadd float %tmpVar13, %tmpVar15 | |
%load_in7_max = load float, float* %in7_max, align 4 | |
%load_in7_min = load float, float* %in7_min, align 4 | |
%tmpVar17 = fsub float %load_in7_max, %load_in7_min | |
%load_in7 = load i8, i8* %in7, align 1 | |
%7 = uitofp i8 %load_in7 to float | |
%tmpVar18 = fmul float %tmpVar17, %7 | |
%tmpVar19 = fadd float %tmpVar16, %tmpVar18 | |
%load_in8_max = load float, float* %in8_max, align 4 | |
%load_in8_min = load float, float* %in8_min, align 4 | |
%tmpVar20 = fsub float %load_in8_max, %load_in8_min | |
%load_in8 = load i8, i8* %in8, align 1 | |
%8 = uitofp i8 %load_in8 to float | |
%tmpVar21 = fmul float %tmpVar20, %8 | |
%tmpVar22 = fadd float %tmpVar19, %tmpVar21 | |
%tmpVar23 = fmul float %tmpVar22, 0x3F70101020000000 | |
%load_in1_min24 = load float, float* %in1_min, align 4 | |
%tmpVar25 = fadd float %tmpVar23, %load_in1_min24 | |
%load_in2_min26 = load float, float* %in2_min, align 4 | |
%tmpVar27 = fadd float %tmpVar25, %load_in2_min26 | |
%load_in3_min28 = load float, float* %in3_min, align 4 | |
%tmpVar29 = fadd float %tmpVar27, %load_in3_min28 | |
%load_in4_min30 = load float, float* %in4_min, align 4 | |
%tmpVar31 = fadd float %tmpVar29, %load_in4_min30 | |
%load_in5_min32 = load float, float* %in5_min, align 4 | |
%tmpVar33 = fadd float %tmpVar31, %load_in5_min32 | |
%load_in6_min34 = load float, float* %in6_min, align 4 | |
%tmpVar35 = fadd float %tmpVar33, %load_in6_min34 | |
%load_in7_min36 = load float, float* %in7_min, align 4 | |
%tmpVar37 = fadd float %tmpVar35, %load_in7_min36 | |
%load_in8_min38 = load float, float* %in8_min, align 4 | |
%tmpVar39 = fadd float %tmpVar37, %load_in8_min38 | |
%load_K = load float, float* %K, align 4 | |
%tmpVar40 = fmul float %tmpVar39, %load_K | |
%load_O = load float, float* %O, align 4 | |
%tmpVar41 = fadd float %tmpVar40, %load_O | |
store float %tmpVar41, float* %SCALE_B8, align 4 | |
%SCALE_B8_ret = load float, float* %SCALE_B8, align 4 | |
ret float %SCALE_B8_ret | |
} | |
define float @SCALE_D(%SCALE_D_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %SCALE_D_interface, %SCALE_D_interface* %0, i32 0, i32 0 | |
%I_LO = getelementptr inbounds %SCALE_D_interface, %SCALE_D_interface* %0, i32 0, i32 1 | |
%I_HI = getelementptr inbounds %SCALE_D_interface, %SCALE_D_interface* %0, i32 0, i32 2 | |
%O_LO = getelementptr inbounds %SCALE_D_interface, %SCALE_D_interface* %0, i32 0, i32 3 | |
%O_HI = getelementptr inbounds %SCALE_D_interface, %SCALE_D_interface* %0, i32 0, i32 4 | |
%SCALE_D = alloca float, align 4 | |
store float 0.000000e+00, float* %SCALE_D, align 4 | |
%load_I_HI = load i32, i32* %I_HI, align 4 | |
%load_I_LO = load i32, i32* %I_LO, align 4 | |
%tmpVar = icmp eq i32 %load_I_HI, %load_I_LO | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_O_LO = load float, float* %O_LO, align 4 | |
store float %load_O_LO, float* %SCALE_D, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%load_O_HI = load float, float* %O_HI, align 4 | |
%load_O_LO1 = load float, float* %O_LO, align 4 | |
%tmpVar2 = fsub float %load_O_HI, %load_O_LO1 | |
%DWORD_TO_REAL_instance = alloca %DWORD_TO_REAL_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance, i32 0, i32 0 | |
%load_I_HI3 = load i32, i32* %I_HI, align 4 | |
%load_I_LO4 = load i32, i32* %I_LO, align 4 | |
%tmpVar5 = sub i32 %load_I_HI3, %load_I_LO4 | |
store i32 %tmpVar5, i32* %1, align 4 | |
%call = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance) | |
%tmpVar6 = fdiv float %tmpVar2, %call | |
%DWORD_TO_REAL_instance7 = alloca %DWORD_TO_REAL_interface, align 8 | |
%2 = getelementptr inbounds %DWORD_TO_REAL_interface, %DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance7, i32 0, i32 0 | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%3 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_I_LO8 = load i32, i32* %I_LO, align 4 | |
%4 = zext i32 %load_I_LO8 to i64 | |
store i64 %4, i64* %3, align 4 | |
%5 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_X = load i32, i32* %X, align 4 | |
%6 = zext i32 %load_X to i64 | |
store i64 %6, i64* %5, align 4 | |
%7 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_I_HI9 = load i32, i32* %I_HI, align 4 | |
%8 = zext i32 %load_I_HI9 to i64 | |
store i64 %8, i64* %7, align 4 | |
%call10 = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%load_I_LO11 = load i32, i32* %I_LO, align 4 | |
%9 = zext i32 %load_I_LO11 to i64 | |
%tmpVar12 = sub i64 %call10, %9 | |
%10 = trunc i64 %tmpVar12 to i32 | |
store i32 %10, i32* %2, align 4 | |
%call13 = call float @DWORD_TO_REAL(%DWORD_TO_REAL_interface* %DWORD_TO_REAL_instance7) | |
%tmpVar14 = fmul float %tmpVar6, %call13 | |
%load_O_LO15 = load float, float* %O_LO, align 4 | |
%tmpVar16 = fadd float %tmpVar14, %load_O_LO15 | |
store float %tmpVar16, float* %SCALE_D, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%SCALE_D_ret = load float, float* %SCALE_D, align 4 | |
ret float %SCALE_D_ret | |
} | |
define float @SCALE_R(%SCALE_R_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %SCALE_R_interface, %SCALE_R_interface* %0, i32 0, i32 0 | |
%I_LO = getelementptr inbounds %SCALE_R_interface, %SCALE_R_interface* %0, i32 0, i32 1 | |
%I_HI = getelementptr inbounds %SCALE_R_interface, %SCALE_R_interface* %0, i32 0, i32 2 | |
%O_LO = getelementptr inbounds %SCALE_R_interface, %SCALE_R_interface* %0, i32 0, i32 3 | |
%O_HI = getelementptr inbounds %SCALE_R_interface, %SCALE_R_interface* %0, i32 0, i32 4 | |
%SCALE_R = alloca float, align 4 | |
store float 0.000000e+00, float* %SCALE_R, align 4 | |
%load_I_LO = load float, float* %I_LO, align 4 | |
%load_I_HI = load float, float* %I_HI, align 4 | |
%tmpVar = fcmp oeq float %load_I_LO, %load_I_HI | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_O_LO = load float, float* %O_LO, align 4 | |
store float %load_O_LO, float* %SCALE_R, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%load_O_HI = load float, float* %O_HI, align 4 | |
%load_O_LO1 = load float, float* %O_LO, align 4 | |
%tmpVar2 = fsub float %load_O_HI, %load_O_LO1 | |
%load_I_HI3 = load float, float* %I_HI, align 4 | |
%load_I_LO4 = load float, float* %I_LO, align 4 | |
%tmpVar5 = fsub float %load_I_HI3, %load_I_LO4 | |
%tmpVar6 = fdiv float %tmpVar2, %tmpVar5 | |
%1 = fpext float %tmpVar6 to double | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%2 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
%load_I_LO7 = load float, float* %I_LO, align 4 | |
%3 = fptoui float %load_I_LO7 to i64 | |
store i64 %3, i64* %2, align 4 | |
%4 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_X = load float, float* %X, align 4 | |
%5 = fptoui float %load_X to i64 | |
store i64 %5, i64* %4, align 4 | |
%6 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
%load_I_HI8 = load float, float* %I_HI, align 4 | |
%7 = fptoui float %load_I_HI8 to i64 | |
store i64 %7, i64* %6, align 4 | |
%call = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%8 = uitofp i64 %call to double | |
%load_I_LO9 = load float, float* %I_LO, align 4 | |
%9 = fpext float %load_I_LO9 to double | |
%tmpVar10 = fsub double %8, %9 | |
%tmpVar11 = fmul double %1, %tmpVar10 | |
%load_O_LO12 = load float, float* %O_LO, align 4 | |
%10 = fpext float %load_O_LO12 to double | |
%tmpVar13 = fadd double %tmpVar11, %10 | |
%11 = fptrunc double %tmpVar13 to float | |
store float %11, float* %SCALE_R, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%SCALE_R_ret = load float, float* %SCALE_R, align 4 | |
ret float %SCALE_R_ret | |
} | |
define float @SCALE_X2(%SCALE_X2_interface* %0) { | |
entry: | |
%IN1 = getelementptr inbounds %SCALE_X2_interface, %SCALE_X2_interface* %0, i32 0, i32 0 | |
%IN2 = getelementptr inbounds %SCALE_X2_interface, %SCALE_X2_interface* %0, i32 0, i32 1 | |
%K = getelementptr inbounds %SCALE_X2_interface, %SCALE_X2_interface* %0, i32 0, i32 2 | |
%O = getelementptr inbounds %SCALE_X2_interface, %SCALE_X2_interface* %0, i32 0, i32 3 | |
%IN1_MIN = getelementptr inbounds %SCALE_X2_interface, %SCALE_X2_interface* %0, i32 0, i32 4 | |
%IN1_MAX = getelementptr inbounds %SCALE_X2_interface, %SCALE_X2_interface* %0, i32 0, i32 5 | |
%IN2_MIN = getelementptr inbounds %SCALE_X2_interface, %SCALE_X2_interface* %0, i32 0, i32 6 | |
%IN2_MAX = getelementptr inbounds %SCALE_X2_interface, %SCALE_X2_interface* %0, i32 0, i32 7 | |
%SCALE_X2 = alloca float, align 4 | |
store float 0.000000e+00, float* %SCALE_X2, align 4 | |
%SEL_instance = alloca %SEL_interface, align 8 | |
%1 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 0 | |
%load_IN1 = load i8, i8* %IN1, align 1 | |
store i8 %load_IN1, i8* %1, align 1 | |
%2 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 1 | |
%load_IN1_MIN = load float, float* %IN1_MIN, align 4 | |
%3 = fptoui float %load_IN1_MIN to i64 | |
store i64 %3, i64* %2, align 4 | |
%4 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 2 | |
%load_IN1_MAX = load float, float* %IN1_MAX, align 4 | |
%5 = fptoui float %load_IN1_MAX to i64 | |
store i64 %5, i64* %4, align 4 | |
%call = call i64 @SEL(%SEL_interface* %SEL_instance) | |
%SEL_instance1 = alloca %SEL_interface, align 8 | |
%6 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance1, i32 0, i32 0 | |
%load_IN2 = load i8, i8* %IN2, align 1 | |
store i8 %load_IN2, i8* %6, align 1 | |
%7 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance1, i32 0, i32 1 | |
%load_IN2_MIN = load float, float* %IN2_MIN, align 4 | |
%8 = fptoui float %load_IN2_MIN to i64 | |
store i64 %8, i64* %7, align 4 | |
%9 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance1, i32 0, i32 2 | |
%load_IN2_MAX = load float, float* %IN2_MAX, align 4 | |
%10 = fptoui float %load_IN2_MAX to i64 | |
store i64 %10, i64* %9, align 4 | |
%call2 = call i64 @SEL(%SEL_interface* %SEL_instance1) | |
%tmpVar = add i64 %call, %call2 | |
%11 = uitofp i64 %tmpVar to double | |
%load_k = load float, float* %K, align 4 | |
%12 = fpext float %load_k to double | |
%tmpVar3 = fmul double %11, %12 | |
%load_o = load float, float* %O, align 4 | |
%13 = fpext float %load_o to double | |
%tmpVar4 = fadd double %tmpVar3, %13 | |
%14 = fptrunc double %tmpVar4 to float | |
store float %14, float* %SCALE_X2, align 4 | |
%SCALE_X2_ret = load float, float* %SCALE_X2, align 4 | |
ret float %SCALE_X2_ret | |
} | |
define float @SCALE_X4(%SCALE_X4_interface* %0) { | |
entry: | |
%IN1 = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 0 | |
%IN2 = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 1 | |
%IN3 = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 2 | |
%IN4 = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 3 | |
%K = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 4 | |
%O = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 5 | |
%IN1_MIN = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 6 | |
%IN1_MAX = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 7 | |
%IN2_MIN = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 8 | |
%IN2_MAX = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 9 | |
%IN3_MIN = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 10 | |
%IN3_MAX = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 11 | |
%IN4_MIN = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 12 | |
%IN4_MAX = getelementptr inbounds %SCALE_X4_interface, %SCALE_X4_interface* %0, i32 0, i32 13 | |
%SCALE_X4 = alloca float, align 4 | |
store float 0.000000e+00, float* %SCALE_X4, align 4 | |
%SEL_instance = alloca %SEL_interface, align 8 | |
%1 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 0 | |
%load_IN1 = load i8, i8* %IN1, align 1 | |
store i8 %load_IN1, i8* %1, align 1 | |
%2 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 1 | |
%load_IN1_MIN = load float, float* %IN1_MIN, align 4 | |
%3 = fptoui float %load_IN1_MIN to i64 | |
store i64 %3, i64* %2, align 4 | |
%4 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 2 | |
%load_IN1_MAX = load float, float* %IN1_MAX, align 4 | |
%5 = fptoui float %load_IN1_MAX to i64 | |
store i64 %5, i64* %4, align 4 | |
%call = call i64 @SEL(%SEL_interface* %SEL_instance) | |
%SEL_instance1 = alloca %SEL_interface, align 8 | |
%6 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance1, i32 0, i32 0 | |
%load_IN2 = load i8, i8* %IN2, align 1 | |
store i8 %load_IN2, i8* %6, align 1 | |
%7 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance1, i32 0, i32 1 | |
%load_IN2_MIN = load float, float* %IN2_MIN, align 4 | |
%8 = fptoui float %load_IN2_MIN to i64 | |
store i64 %8, i64* %7, align 4 | |
%9 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance1, i32 0, i32 2 | |
%load_IN2_MAX = load float, float* %IN2_MAX, align 4 | |
%10 = fptoui float %load_IN2_MAX to i64 | |
store i64 %10, i64* %9, align 4 | |
%call2 = call i64 @SEL(%SEL_interface* %SEL_instance1) | |
%tmpVar = add i64 %call, %call2 | |
%SEL_instance3 = alloca %SEL_interface, align 8 | |
%11 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance3, i32 0, i32 0 | |
%load_IN3 = load i8, i8* %IN3, align 1 | |
store i8 %load_IN3, i8* %11, align 1 | |
%12 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance3, i32 0, i32 1 | |
%load_IN3_MIN = load float, float* %IN3_MIN, align 4 | |
%13 = fptoui float %load_IN3_MIN to i64 | |
store i64 %13, i64* %12, align 4 | |
%14 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance3, i32 0, i32 2 | |
%load_IN3_MAX = load float, float* %IN3_MAX, align 4 | |
%15 = fptoui float %load_IN3_MAX to i64 | |
store i64 %15, i64* %14, align 4 | |
%call4 = call i64 @SEL(%SEL_interface* %SEL_instance3) | |
%tmpVar5 = add i64 %tmpVar, %call4 | |
%SEL_instance6 = alloca %SEL_interface, align 8 | |
%16 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance6, i32 0, i32 0 | |
%load_IN4 = load i8, i8* %IN4, align 1 | |
store i8 %load_IN4, i8* %16, align 1 | |
%17 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance6, i32 0, i32 1 | |
%load_IN4_MIN = load float, float* %IN4_MIN, align 4 | |
%18 = fptoui float %load_IN4_MIN to i64 | |
store i64 %18, i64* %17, align 4 | |
%19 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance6, i32 0, i32 2 | |
%load_IN4_MAX = load float, float* %IN4_MAX, align 4 | |
%20 = fptoui float %load_IN4_MAX to i64 | |
store i64 %20, i64* %19, align 4 | |
%call7 = call i64 @SEL(%SEL_interface* %SEL_instance6) | |
%tmpVar8 = add i64 %tmpVar5, %call7 | |
%21 = uitofp i64 %tmpVar8 to double | |
%load_k = load float, float* %K, align 4 | |
%22 = fpext float %load_k to double | |
%tmpVar9 = fmul double %21, %22 | |
%load_o = load float, float* %O, align 4 | |
%23 = fpext float %load_o to double | |
%tmpVar10 = fadd double %tmpVar9, %23 | |
%24 = fptrunc double %tmpVar10 to float | |
store float %24, float* %SCALE_X4, align 4 | |
%SCALE_X4_ret = load float, float* %SCALE_X4, align 4 | |
ret float %SCALE_X4_ret | |
} | |
define float @SCALE_X8(%SCALE_X8_interface* %0) { | |
entry: | |
%in1 = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 0 | |
%in2 = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 1 | |
%in3 = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 2 | |
%in4 = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 3 | |
%in5 = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 4 | |
%in6 = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 5 | |
%in7 = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 6 | |
%in8 = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 7 | |
%K = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 8 | |
%O = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 9 | |
%in1_min = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 10 | |
%in1_max = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 11 | |
%in2_min = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 12 | |
%in2_max = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 13 | |
%in3_min = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 14 | |
%in3_max = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 15 | |
%in4_min = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 16 | |
%in4_max = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 17 | |
%in5_min = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 18 | |
%in5_max = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 19 | |
%in6_min = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 20 | |
%in6_max = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 21 | |
%in7_min = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 22 | |
%in7_max = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 23 | |
%in8_min = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 24 | |
%in8_max = getelementptr inbounds %SCALE_X8_interface, %SCALE_X8_interface* %0, i32 0, i32 25 | |
%SCALE_X8 = alloca float, align 4 | |
store float 0.000000e+00, float* %SCALE_X8, align 4 | |
%SEL_instance = alloca %SEL_interface, align 8 | |
%1 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 0 | |
%load_IN1 = load i8, i8* %in1, align 1 | |
store i8 %load_IN1, i8* %1, align 1 | |
%2 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 1 | |
%load_IN1_MIN = load float, float* %in1_min, align 4 | |
%3 = fptoui float %load_IN1_MIN to i64 | |
store i64 %3, i64* %2, align 4 | |
%4 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance, i32 0, i32 2 | |
%load_IN1_MAX = load float, float* %in1_max, align 4 | |
%5 = fptoui float %load_IN1_MAX to i64 | |
store i64 %5, i64* %4, align 4 | |
%call = call i64 @SEL(%SEL_interface* %SEL_instance) | |
%SEL_instance1 = alloca %SEL_interface, align 8 | |
%6 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance1, i32 0, i32 0 | |
%load_IN2 = load i8, i8* %in2, align 1 | |
store i8 %load_IN2, i8* %6, align 1 | |
%7 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance1, i32 0, i32 1 | |
%load_IN2_MIN = load float, float* %in2_min, align 4 | |
%8 = fptoui float %load_IN2_MIN to i64 | |
store i64 %8, i64* %7, align 4 | |
%9 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance1, i32 0, i32 2 | |
%load_IN2_MAX = load float, float* %in2_max, align 4 | |
%10 = fptoui float %load_IN2_MAX to i64 | |
store i64 %10, i64* %9, align 4 | |
%call2 = call i64 @SEL(%SEL_interface* %SEL_instance1) | |
%tmpVar = add i64 %call, %call2 | |
%SEL_instance3 = alloca %SEL_interface, align 8 | |
%11 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance3, i32 0, i32 0 | |
%load_IN3 = load i8, i8* %in3, align 1 | |
store i8 %load_IN3, i8* %11, align 1 | |
%12 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance3, i32 0, i32 1 | |
%load_IN3_MIN = load float, float* %in3_min, align 4 | |
%13 = fptoui float %load_IN3_MIN to i64 | |
store i64 %13, i64* %12, align 4 | |
%14 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance3, i32 0, i32 2 | |
%load_IN3_MAX = load float, float* %in3_max, align 4 | |
%15 = fptoui float %load_IN3_MAX to i64 | |
store i64 %15, i64* %14, align 4 | |
%call4 = call i64 @SEL(%SEL_interface* %SEL_instance3) | |
%tmpVar5 = add i64 %tmpVar, %call4 | |
%SEL_instance6 = alloca %SEL_interface, align 8 | |
%16 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance6, i32 0, i32 0 | |
%load_IN4 = load i8, i8* %in4, align 1 | |
store i8 %load_IN4, i8* %16, align 1 | |
%17 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance6, i32 0, i32 1 | |
%load_IN4_MIN = load float, float* %in4_min, align 4 | |
%18 = fptoui float %load_IN4_MIN to i64 | |
store i64 %18, i64* %17, align 4 | |
%19 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance6, i32 0, i32 2 | |
%load_IN4_MAX = load float, float* %in4_max, align 4 | |
%20 = fptoui float %load_IN4_MAX to i64 | |
store i64 %20, i64* %19, align 4 | |
%call7 = call i64 @SEL(%SEL_interface* %SEL_instance6) | |
%tmpVar8 = add i64 %tmpVar5, %call7 | |
%SEL_instance9 = alloca %SEL_interface, align 8 | |
%21 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance9, i32 0, i32 0 | |
%load_IN5 = load i8, i8* %in5, align 1 | |
store i8 %load_IN5, i8* %21, align 1 | |
%22 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance9, i32 0, i32 1 | |
%load_IN5_MIN = load float, float* %in5_min, align 4 | |
%23 = fptoui float %load_IN5_MIN to i64 | |
store i64 %23, i64* %22, align 4 | |
%24 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance9, i32 0, i32 2 | |
%load_IN5_MAX = load float, float* %in5_max, align 4 | |
%25 = fptoui float %load_IN5_MAX to i64 | |
store i64 %25, i64* %24, align 4 | |
%call10 = call i64 @SEL(%SEL_interface* %SEL_instance9) | |
%tmpVar11 = add i64 %tmpVar8, %call10 | |
%SEL_instance12 = alloca %SEL_interface, align 8 | |
%26 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance12, i32 0, i32 0 | |
%load_IN6 = load i8, i8* %in6, align 1 | |
store i8 %load_IN6, i8* %26, align 1 | |
%27 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance12, i32 0, i32 1 | |
%load_IN6_MIN = load float, float* %in6_min, align 4 | |
%28 = fptoui float %load_IN6_MIN to i64 | |
store i64 %28, i64* %27, align 4 | |
%29 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance12, i32 0, i32 2 | |
%load_IN6_MAX = load float, float* %in6_max, align 4 | |
%30 = fptoui float %load_IN6_MAX to i64 | |
store i64 %30, i64* %29, align 4 | |
%call13 = call i64 @SEL(%SEL_interface* %SEL_instance12) | |
%tmpVar14 = add i64 %tmpVar11, %call13 | |
%SEL_instance15 = alloca %SEL_interface, align 8 | |
%31 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance15, i32 0, i32 0 | |
%load_IN7 = load i8, i8* %in7, align 1 | |
store i8 %load_IN7, i8* %31, align 1 | |
%32 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance15, i32 0, i32 1 | |
%load_IN7_MIN = load float, float* %in7_min, align 4 | |
%33 = fptoui float %load_IN7_MIN to i64 | |
store i64 %33, i64* %32, align 4 | |
%34 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance15, i32 0, i32 2 | |
%load_IN7_MAX = load float, float* %in7_max, align 4 | |
%35 = fptoui float %load_IN7_MAX to i64 | |
store i64 %35, i64* %34, align 4 | |
%call16 = call i64 @SEL(%SEL_interface* %SEL_instance15) | |
%tmpVar17 = add i64 %tmpVar14, %call16 | |
%SEL_instance18 = alloca %SEL_interface, align 8 | |
%36 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance18, i32 0, i32 0 | |
%load_IN8 = load i8, i8* %in8, align 1 | |
store i8 %load_IN8, i8* %36, align 1 | |
%37 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance18, i32 0, i32 1 | |
%load_IN8_MIN = load float, float* %in8_min, align 4 | |
%38 = fptoui float %load_IN8_MIN to i64 | |
store i64 %38, i64* %37, align 4 | |
%39 = getelementptr inbounds %SEL_interface, %SEL_interface* %SEL_instance18, i32 0, i32 2 | |
%load_IN8_MAX = load float, float* %in8_max, align 4 | |
%40 = fptoui float %load_IN8_MAX to i64 | |
store i64 %40, i64* %39, align 4 | |
%call19 = call i64 @SEL(%SEL_interface* %SEL_instance18) | |
%tmpVar20 = add i64 %tmpVar17, %call19 | |
%41 = uitofp i64 %tmpVar20 to double | |
%load_k = load float, float* %K, align 4 | |
%42 = fpext float %load_k to double | |
%tmpVar21 = fmul double %41, %42 | |
%load_o = load float, float* %O, align 4 | |
%43 = fpext float %load_o to double | |
%tmpVar22 = fadd double %tmpVar21, %43 | |
%44 = fptrunc double %tmpVar22 to float | |
store float %44, float* %SCALE_X8, align 4 | |
%SCALE_X8_ret = load float, float* %SCALE_X8, align 4 | |
ret float %SCALE_X8_ret | |
} | |
define void @SEL2_OF_3(%SEL2_OF_3_interface* %0) { | |
entry: | |
%IN1 = getelementptr inbounds %SEL2_OF_3_interface, %SEL2_OF_3_interface* %0, i32 0, i32 0 | |
%IN2 = getelementptr inbounds %SEL2_OF_3_interface, %SEL2_OF_3_interface* %0, i32 0, i32 1 | |
%IN3 = getelementptr inbounds %SEL2_OF_3_interface, %SEL2_OF_3_interface* %0, i32 0, i32 2 | |
%D = getelementptr inbounds %SEL2_OF_3_interface, %SEL2_OF_3_interface* %0, i32 0, i32 3 | |
%Y = getelementptr inbounds %SEL2_OF_3_interface, %SEL2_OF_3_interface* %0, i32 0, i32 4 | |
%W = getelementptr inbounds %SEL2_OF_3_interface, %SEL2_OF_3_interface* %0, i32 0, i32 5 | |
%E = getelementptr inbounds %SEL2_OF_3_interface, %SEL2_OF_3_interface* %0, i32 0, i32 6 | |
%D12 = getelementptr inbounds %SEL2_OF_3_interface, %SEL2_OF_3_interface* %0, i32 0, i32 7 | |
%D23 = getelementptr inbounds %SEL2_OF_3_interface, %SEL2_OF_3_interface* %0, i32 0, i32 8 | |
%D31 = getelementptr inbounds %SEL2_OF_3_interface, %SEL2_OF_3_interface* %0, i32 0, i32 9 | |
%ABS_instance = alloca %ABS_interface, align 8 | |
%1 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance, i32 0, i32 0 | |
%load_IN1 = load float, float* %IN1, align 4 | |
%load_IN2 = load float, float* %IN2, align 4 | |
%tmpVar = fsub float %load_IN1, %load_IN2 | |
%2 = fptoui float %tmpVar to i64 | |
store i64 %2, i64* %1, align 4 | |
%call = call i64 @ABS(%ABS_interface* %ABS_instance) | |
%3 = uitofp i64 %call to double | |
%load_D = load float, float* %D, align 4 | |
%4 = fpext float %load_D to double | |
%tmpVar1 = fcmp ole double %3, %4 | |
%5 = zext i1 %tmpVar1 to i8 | |
store i8 %5, i8* %D12, align 1 | |
%ABS_instance2 = alloca %ABS_interface, align 8 | |
%6 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance2, i32 0, i32 0 | |
%load_IN23 = load float, float* %IN2, align 4 | |
%load_IN3 = load float, float* %IN3, align 4 | |
%tmpVar4 = fsub float %load_IN23, %load_IN3 | |
%7 = fptoui float %tmpVar4 to i64 | |
store i64 %7, i64* %6, align 4 | |
%call5 = call i64 @ABS(%ABS_interface* %ABS_instance2) | |
%8 = uitofp i64 %call5 to double | |
%load_D6 = load float, float* %D, align 4 | |
%9 = fpext float %load_D6 to double | |
%tmpVar7 = fcmp ole double %8, %9 | |
%10 = zext i1 %tmpVar7 to i8 | |
store i8 %10, i8* %D23, align 1 | |
%ABS_instance8 = alloca %ABS_interface, align 8 | |
%11 = getelementptr inbounds %ABS_interface, %ABS_interface* %ABS_instance8, i32 0, i32 0 | |
%load_IN39 = load float, float* %IN3, align 4 | |
%load_IN110 = load float, float* %IN1, align 4 | |
%tmpVar11 = fsub float %load_IN39, %load_IN110 | |
%12 = fptoui float %tmpVar11 to i64 | |
store i64 %12, i64* %11, align 4 | |
%call12 = call i64 @ABS(%ABS_interface* %ABS_instance8) | |
%13 = uitofp i64 %call12 to double | |
%load_D13 = load float, float* %D, align 4 | |
%14 = fpext float %load_D13 to double | |
%tmpVar14 = fcmp ole double %13, %14 | |
%15 = zext i1 %tmpVar14 to i8 | |
store i8 %15, i8* %D31, align 1 | |
%load_D12 = load i8, i8* %D12, align 1 | |
%16 = icmp ne i8 %load_D12, 0 | |
br i1 %16, label %20, label %22 | |
condition_body: ; preds = %34 | |
%load_IN120 = load float, float* %IN1, align 4 | |
%load_IN221 = load float, float* %IN2, align 4 | |
%tmpVar22 = fadd float %load_IN120, %load_IN221 | |
%load_IN323 = load float, float* %IN3, align 4 | |
%tmpVar24 = fadd float %tmpVar22, %load_IN323 | |
%tmpVar25 = fmul float %tmpVar24, 0x3FD5555560000000 | |
store float %tmpVar25, float* %Y, align 4 | |
store i8 0, i8* %E, align 1 | |
store i16 0, i16* %W, align 2 | |
br label %continue | |
branch: ; preds = %34 | |
%load_D1226 = load i8, i8* %D12, align 1 | |
%17 = icmp ne i8 %load_D1226, 0 | |
br i1 %17, label %condition_body27, label %branch15 | |
condition_body27: ; preds = %branch | |
%load_In1 = load float, float* %IN1, align 4 | |
%load_IN228 = load float, float* %IN2, align 4 | |
%tmpVar29 = fadd float %load_In1, %load_IN228 | |
%tmpVar30 = fmul float %tmpVar29, 5.000000e-01 | |
store float %tmpVar30, float* %Y, align 4 | |
store i8 0, i8* %E, align 1 | |
store i16 3, i16* %W, align 2 | |
br label %continue | |
branch15: ; preds = %branch | |
%load_D2331 = load i8, i8* %D23, align 1 | |
%18 = icmp ne i8 %load_D2331, 0 | |
br i1 %18, label %condition_body32, label %branch16 | |
condition_body32: ; preds = %branch15 | |
%load_In2 = load float, float* %IN2, align 4 | |
%load_IN333 = load float, float* %IN3, align 4 | |
%tmpVar34 = fadd float %load_In2, %load_IN333 | |
%tmpVar35 = fmul float %tmpVar34, 5.000000e-01 | |
store float %tmpVar35, float* %Y, align 4 | |
store i8 0, i8* %E, align 1 | |
store i16 1, i16* %W, align 2 | |
br label %continue | |
branch16: ; preds = %branch15 | |
%load_D3136 = load i8, i8* %D31, align 1 | |
%19 = icmp ne i8 %load_D3136, 0 | |
br i1 %19, label %condition_body37, label %else | |
condition_body37: ; preds = %branch16 | |
%load_In3 = load float, float* %IN3, align 4 | |
%load_IN138 = load float, float* %IN1, align 4 | |
%tmpVar39 = fadd float %load_In3, %load_IN138 | |
%tmpVar40 = fmul float %tmpVar39, 5.000000e-01 | |
store float %tmpVar40, float* %Y, align 4 | |
store i8 0, i8* %E, align 1 | |
store i16 2, i16* %W, align 2 | |
br label %continue | |
else: ; preds = %branch16 | |
store i8 1, i8* %E, align 1 | |
store i16 4, i16* %W, align 2 | |
br label %continue | |
continue: ; preds = %else, %condition_body37, %condition_body32, %condition_body27, %condition_body | |
ret void | |
20: ; preds = %entry | |
%load_D23 = load i8, i8* %D23, align 1 | |
%21 = icmp ne i8 %load_D23, 0 | |
br label %22 | |
22: ; preds = %20, %entry | |
%23 = phi i1 [ %16, %entry ], [ %21, %20 ] | |
br i1 %23, label %26, label %24 | |
24: ; preds = %22 | |
%load_D1217 = load i8, i8* %D12, align 1 | |
%25 = icmp ne i8 %load_D1217, 0 | |
br i1 %25, label %28, label %30 | |
26: ; preds = %30, %22 | |
%27 = phi i1 [ %23, %22 ], [ %31, %30 ] | |
br i1 %27, label %34, label %32 | |
28: ; preds = %24 | |
%load_D31 = load i8, i8* %D31, align 1 | |
%29 = icmp ne i8 %load_D31, 0 | |
br label %30 | |
30: ; preds = %28, %24 | |
%31 = phi i1 [ %25, %24 ], [ %29, %28 ] | |
br label %26 | |
32: ; preds = %26 | |
%load_D2318 = load i8, i8* %D23, align 1 | |
%33 = icmp ne i8 %load_D2318, 0 | |
br i1 %33, label %36, label %38 | |
34: ; preds = %38, %26 | |
%35 = phi i1 [ %27, %26 ], [ %39, %38 ] | |
br i1 %35, label %condition_body, label %branch | |
36: ; preds = %32 | |
%load_D3119 = load i8, i8* %D31, align 1 | |
%37 = icmp ne i8 %load_D3119, 0 | |
br label %38 | |
38: ; preds = %36, %32 | |
%39 = phi i1 [ %33, %32 ], [ %37, %36 ] | |
br label %34 | |
} | |
define void @SEL2_OF_3B(%SEL2_OF_3B_interface* %0) { | |
entry: | |
%IN1 = getelementptr inbounds %SEL2_OF_3B_interface, %SEL2_OF_3B_interface* %0, i32 0, i32 0 | |
%IN2 = getelementptr inbounds %SEL2_OF_3B_interface, %SEL2_OF_3B_interface* %0, i32 0, i32 1 | |
%IN3 = getelementptr inbounds %SEL2_OF_3B_interface, %SEL2_OF_3B_interface* %0, i32 0, i32 2 | |
%TD = getelementptr inbounds %SEL2_OF_3B_interface, %SEL2_OF_3B_interface* %0, i32 0, i32 3 | |
%Q = getelementptr inbounds %SEL2_OF_3B_interface, %SEL2_OF_3B_interface* %0, i32 0, i32 4 | |
%W = getelementptr inbounds %SEL2_OF_3B_interface, %SEL2_OF_3B_interface* %0, i32 0, i32 5 | |
%TDEL = getelementptr inbounds %SEL2_OF_3B_interface, %SEL2_OF_3B_interface* %0, i32 0, i32 6 | |
%load_IN1 = load i8, i8* %IN1, align 1 | |
%1 = icmp ne i8 %load_IN1, 0 | |
br i1 %1, label %2, label %4 | |
2: ; preds = %entry | |
%load_IN2 = load i8, i8* %IN2, align 1 | |
%3 = icmp ne i8 %load_IN2, 0 | |
br label %4 | |
4: ; preds = %2, %entry | |
%5 = phi i1 [ %1, %entry ], [ %3, %2 ] | |
br i1 %5, label %8, label %6 | |
6: ; preds = %4 | |
%load_IN11 = load i8, i8* %IN1, align 1 | |
%7 = icmp ne i8 %load_IN11, 0 | |
br i1 %7, label %10, label %12 | |
8: ; preds = %12, %4 | |
%9 = phi i1 [ %5, %4 ], [ %13, %12 ] | |
br i1 %9, label %16, label %14 | |
10: ; preds = %6 | |
%load_IN3 = load i8, i8* %IN3, align 1 | |
%11 = icmp ne i8 %load_IN3, 0 | |
br label %12 | |
12: ; preds = %10, %6 | |
%13 = phi i1 [ %7, %6 ], [ %11, %10 ] | |
br label %8 | |
14: ; preds = %8 | |
%load_IN22 = load i8, i8* %IN2, align 1 | |
%15 = icmp ne i8 %load_IN22, 0 | |
br i1 %15, label %23, label %25 | |
16: ; preds = %25, %8 | |
%17 = phi i1 [ %9, %8 ], [ %26, %25 ] | |
%18 = zext i1 %17 to i8 | |
store i8 %18, i8* %Q, align 1 | |
%19 = getelementptr inbounds %TON_interface, %TON_interface* %TDEL, i32 0, i32 0 | |
%load_in1 = load i8, i8* %IN1, align 1 | |
%20 = icmp ne i8 %load_in1, 0 | |
%load_in2 = load i8, i8* %IN2, align 1 | |
%21 = icmp ne i8 %load_in2, 0 | |
%22 = xor i1 %20, %21 | |
br i1 %22, label %31, label %27 | |
23: ; preds = %14 | |
%load_IN33 = load i8, i8* %IN3, align 1 | |
%24 = icmp ne i8 %load_IN33, 0 | |
br label %25 | |
25: ; preds = %23, %14 | |
%26 = phi i1 [ %15, %14 ], [ %24, %23 ] | |
br label %16 | |
27: ; preds = %16 | |
%load_in14 = load i8, i8* %IN1, align 1 | |
%28 = icmp ne i8 %load_in14, 0 | |
%load_in3 = load i8, i8* %IN3, align 1 | |
%29 = icmp ne i8 %load_in3, 0 | |
%30 = xor i1 %28, %29 | |
br label %31 | |
31: ; preds = %27, %16 | |
%32 = phi i1 [ %22, %16 ], [ %30, %27 ] | |
br i1 %32, label %37, label %33 | |
33: ; preds = %31 | |
%load_in25 = load i8, i8* %IN2, align 1 | |
%34 = icmp ne i8 %load_in25, 0 | |
%load_in36 = load i8, i8* %IN3, align 1 | |
%35 = icmp ne i8 %load_in36, 0 | |
%36 = xor i1 %34, %35 | |
br label %37 | |
37: ; preds = %33, %31 | |
%38 = phi i1 [ %32, %31 ], [ %36, %33 ] | |
%39 = zext i1 %38 to i8 | |
store i8 %39, i8* %19, align 1 | |
%40 = getelementptr inbounds %TON_interface, %TON_interface* %TDEL, i32 0, i32 1 | |
%load_TD = load i64, i64* %TD, align 4 | |
store i64 %load_TD, i64* %40, align 4 | |
call void @TON(%TON_interface* %TDEL) | |
%Q7 = getelementptr inbounds %TON_interface, %TON_interface* %TDEL, i32 0, i32 2 | |
%load_ = load i8, i8* %Q7, align 1 | |
store i8 %load_, i8* %W, align 1 | |
ret void | |
} | |
define void @SH(%SH_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %SH_interface, %SH_interface* %0, i32 0, i32 0 | |
%CLK = getelementptr inbounds %SH_interface, %SH_interface* %0, i32 0, i32 1 | |
%out = getelementptr inbounds %SH_interface, %SH_interface* %0, i32 0, i32 2 | |
%trig = getelementptr inbounds %SH_interface, %SH_interface* %0, i32 0, i32 3 | |
%edge = getelementptr inbounds %SH_interface, %SH_interface* %0, i32 0, i32 4 | |
%load_clk = load i8, i8* %CLK, align 1 | |
%1 = icmp ne i8 %load_clk, 0 | |
br i1 %1, label %2, label %4 | |
condition_body: ; preds = %4 | |
%load_in = load float, float* %in, align 4 | |
store float %load_in, float* %out, align 4 | |
store i8 1, i8* %trig, align 1 | |
br label %continue | |
else: ; preds = %4 | |
store i8 0, i8* %trig, align 1 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%load_clk1 = load i8, i8* %CLK, align 1 | |
store i8 %load_clk1, i8* %edge, align 1 | |
ret void | |
2: ; preds = %entry | |
%load_edge = load i8, i8* %edge, align 1 | |
%3 = icmp ne i8 %load_edge, 0 | |
%tmpVar = xor i1 %3, true | |
br label %4 | |
4: ; preds = %2, %entry | |
%5 = phi i1 [ %1, %entry ], [ %tmpVar, %2 ] | |
br i1 %5, label %condition_body, label %else | |
} | |
define void @SH_1(%SH_1_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %SH_1_interface, %SH_1_interface* %0, i32 0, i32 0 | |
%PT = getelementptr inbounds %SH_1_interface, %SH_1_interface* %0, i32 0, i32 1 | |
%out = getelementptr inbounds %SH_1_interface, %SH_1_interface* %0, i32 0, i32 2 | |
%Trig = getelementptr inbounds %SH_1_interface, %SH_1_interface* %0, i32 0, i32 3 | |
%last = getelementptr inbounds %SH_1_interface, %SH_1_interface* %0, i32 0, i32 4 | |
%tx = getelementptr inbounds %SH_1_interface, %SH_1_interface* %0, i32 0, i32 5 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call1, i64* %tx, align 4 | |
%load_tx = load i64, i64* %tx, align 4 | |
%load_last = load i64, i64* %last, align 4 | |
%tmpVar = sub i64 %load_tx, %load_last | |
%load_PT = load i64, i64* %PT, align 4 | |
%tmpVar2 = icmp sge i64 %tmpVar, %load_PT | |
br i1 %tmpVar2, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_tx3 = load i64, i64* %tx, align 4 | |
store i64 %load_tx3, i64* %last, align 4 | |
%load_in = load float, float* %in, align 4 | |
store float %load_in, float* %out, align 4 | |
store i8 1, i8* %Trig, align 1 | |
br label %continue | |
else: ; preds = %entry | |
store i8 0, i8* %Trig, align 1 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
ret void | |
} | |
define void @SH_2(%SH_2_interface* %0) { | |
entry: | |
%in = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 0 | |
%PT = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 1 | |
%N = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 2 | |
%disc = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 3 | |
%out = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 4 | |
%trig = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 5 | |
%avg = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 6 | |
%high = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 7 | |
%low = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 8 | |
%M = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 9 | |
%buf = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 10 | |
%buf2 = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 11 | |
%last = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 12 | |
%i = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 13 | |
%start = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 14 | |
%temp = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 15 | |
%stop = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 16 | |
%tx = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 17 | |
%d2 = getelementptr inbounds %SH_2_interface, %SH_2_interface* %0, i32 0, i32 18 | |
%DWORD_TO_TIME_instance = alloca %DWORD_TO_TIME_interface, align 8 | |
%1 = getelementptr inbounds %DWORD_TO_TIME_interface, %DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance, i32 0, i32 0 | |
%T_PLC_MS_instance = alloca %T_PLC_MS_interface, align 8 | |
%call = call i32 @T_PLC_MS(%T_PLC_MS_interface* %T_PLC_MS_instance) | |
store i32 %call, i32* %1, align 4 | |
%call1 = call i64 @DWORD_TO_TIME(%DWORD_TO_TIME_interface* %DWORD_TO_TIME_instance) | |
store i64 %call1, i64* %tx, align 4 | |
%SHR_instance = alloca %SHR_interface, align 8 | |
%2 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance, i32 0, i32 0 | |
%load_disc = load i16, i16* %disc, align 2 | |
%3 = sext i16 %load_disc to i64 | |
store i64 %3, i64* %2, align 4 | |
%4 = getelementptr inbounds %SHR_interface, %SHR_interface* %SHR_instance, i32 0, i32 1 | |
store i16 1, i16* %4, align 2 | |
%call2 = call i64 @SHR(%SHR_interface* %SHR_instance) | |
%5 = trunc i64 %call2 to i16 | |
store i16 %5, i16* %d2, align 2 | |
%load_tx = load i64, i64* %tx, align 4 | |
%load_last = load i64, i64* %last, align 4 | |
%tmpVar = sub i64 %load_tx, %load_last | |
%load_PT = load i64, i64* %PT, align 4 | |
%tmpVar3 = icmp sge i64 %tmpVar, %load_PT | |
br i1 %tmpVar3, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_tx4 = load i64, i64* %tx, align 4 | |
store i64 %load_tx4, i64* %last, align 4 | |
store i8 1, i8* %trig, align 1 | |
%LIMIT_instance = alloca %LIMIT_interface, align 8 | |
%6 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 0 | |
store i64 1, i64* %6, align 4 | |
%7 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 1 | |
%load_N = load i16, i16* %N, align 2 | |
%8 = sext i16 %load_N to i64 | |
store i64 %8, i64* %7, align 4 | |
%9 = getelementptr inbounds %LIMIT_interface, %LIMIT_interface* %LIMIT_instance, i32 0, i32 2 | |
store i64 16, i64* %9, align 4 | |
%call5 = call i64 @LIMIT(%LIMIT_interface* %LIMIT_instance) | |
%10 = trunc i64 %call5 to i16 | |
store i16 %10, i16* %M, align 2 | |
%load_M = load i16, i16* %M, align 2 | |
%11 = sext i16 %load_M to i32 | |
%tmpVar6 = sub i32 %11, 1 | |
%12 = trunc i32 %tmpVar6 to i16 | |
store i16 %12, i16* %i, align 2 | |
br label %condition_check | |
else: ; preds = %entry | |
store i8 0, i8* %trig, align 1 | |
br label %continue | |
continue: ; preds = %else, %continue119 | |
ret void | |
condition_check: ; preds = %increment, %condition_body | |
%load_i = load i16, i16* %i, align 2 | |
%load_i8 = load i16, i16* %i, align 2 | |
%tmpVar9 = icmp sle i16 %load_i8, 1 | |
%13 = zext i1 %tmpVar9 to i8 | |
%14 = icmp ne i8 %13, 0 | |
br i1 %14, label %17, label %22 | |
for_body: ; preds = %29 | |
%load_i20 = load i16, i16* %i, align 2 | |
%15 = sext i16 %load_i20 to i32 | |
%tmpVar21 = mul i32 1, %15 | |
%tmpVar22 = add i32 %tmpVar21, 0 | |
%tmpVar23 = getelementptr inbounds [16 x float], [16 x float]* %buf2, i32 0, i32 %tmpVar22 | |
%load_i24 = load i16, i16* %i, align 2 | |
%16 = sext i16 %load_i24 to i32 | |
%tmpVar25 = sub i32 %16, 1 | |
%tmpVar26 = mul i32 1, %tmpVar25 | |
%tmpVar27 = add i32 %tmpVar26, 0 | |
%tmpVar28 = getelementptr inbounds [16 x float], [16 x float]* %buf2, i32 0, i32 %tmpVar27 | |
%load_tmpVar = load float, float* %tmpVar28, align 4 | |
store float %load_tmpVar, float* %tmpVar23, align 4 | |
br label %increment | |
increment: ; preds = %for_body | |
%tmpVar29 = add i16 %load_i, -1 | |
store i16 %tmpVar29, i16* %i, align 2 | |
br label %condition_check | |
continue7: ; preds = %29 | |
%tmpVar30 = getelementptr inbounds [16 x float], [16 x float]* %buf2, i32 0, i32 0 | |
%load_in = load float, float* %in, align 4 | |
store float %load_in, float* %tmpVar30, align 4 | |
%load_in31 = load float, float* %in, align 4 | |
store float %load_in31, float* %out, align 4 | |
%load_buf2 = load [16 x float], [16 x float]* %buf2, align 4 | |
store [16 x float] %load_buf2, [16 x float]* %buf, align 4 | |
store i16 0, i16* %start, align 2 | |
br label %condition_check32 | |
17: ; preds = %condition_check | |
%load_i10 = load i16, i16* %i, align 2 | |
%load_M11 = load i16, i16* %M, align 2 | |
%18 = sext i16 %load_M11 to i32 | |
%tmpVar12 = sub i32 %18, 1 | |
%19 = trunc i32 %tmpVar12 to i16 | |
%tmpVar13 = icmp sge i16 %load_i10, %19 | |
%20 = zext i1 %tmpVar13 to i8 | |
%21 = icmp ne i8 %20, 0 | |
br label %22 | |
22: ; preds = %17, %condition_check | |
%23 = phi i1 [ %14, %condition_check ], [ %21, %17 ] | |
%24 = zext i1 %23 to i8 | |
%25 = icmp ne i8 %24, 0 | |
br i1 %25, label %29, label %26 | |
26: ; preds = %22 | |
%load_i14 = load i16, i16* %i, align 2 | |
%tmpVar15 = icmp sge i16 %load_i14, 1 | |
%27 = zext i1 %tmpVar15 to i8 | |
%28 = icmp ne i8 %27, 0 | |
br i1 %28, label %33, label %38 | |
29: ; preds = %38, %22 | |
%30 = phi i1 [ %25, %22 ], [ %41, %38 ] | |
%31 = zext i1 %30 to i8 | |
%32 = icmp ne i8 %31, 0 | |
br i1 %32, label %for_body, label %continue7 | |
33: ; preds = %26 | |
%load_i16 = load i16, i16* %i, align 2 | |
%load_M17 = load i16, i16* %M, align 2 | |
%34 = sext i16 %load_M17 to i32 | |
%tmpVar18 = sub i32 %34, 1 | |
%35 = trunc i32 %tmpVar18 to i16 | |
%tmpVar19 = icmp sle i16 %load_i16, %35 | |
%36 = zext i1 %tmpVar19 to i8 | |
%37 = icmp ne i8 %36, 0 | |
br label %38 | |
38: ; preds = %33, %26 | |
%39 = phi i1 [ %28, %26 ], [ %37, %33 ] | |
%40 = zext i1 %39 to i8 | |
%41 = icmp ne i8 %40, 0 | |
br label %29 | |
condition_check32: ; preds = %increment34, %continue7 | |
%load_start = load i16, i16* %start, align 2 | |
%load_start36 = load i16, i16* %start, align 2 | |
%load_M37 = load i16, i16* %M, align 2 | |
%42 = sext i16 %load_M37 to i32 | |
%tmpVar38 = sub i32 %42, 2 | |
%43 = trunc i32 %tmpVar38 to i16 | |
%tmpVar39 = icmp sle i16 %load_start36, %43 | |
%44 = zext i1 %tmpVar39 to i8 | |
%45 = icmp ne i8 %44, 0 | |
br i1 %45, label %54, label %57 | |
for_body33: ; preds = %66 | |
%load_start48 = load i16, i16* %start, align 2 | |
%46 = sext i16 %load_start48 to i32 | |
%tmpVar49 = add i32 %46, 1 | |
%47 = trunc i32 %tmpVar49 to i16 | |
store i16 %47, i16* %i, align 2 | |
br label %condition_check50 | |
increment34: ; preds = %continue53 | |
%tmpVar103 = add i16 %load_start, 1 | |
store i16 %tmpVar103, i16* %start, align 2 | |
br label %condition_check32 | |
continue35: ; preds = %66 | |
%load_M104 = load i16, i16* %M, align 2 | |
%48 = sext i16 %load_M104 to i32 | |
%tmpVar105 = sub i32 %48, 1 | |
%load_d2 = load i16, i16* %d2, align 2 | |
%49 = sext i16 %load_d2 to i32 | |
%tmpVar106 = sub i32 %tmpVar105, %49 | |
%50 = trunc i32 %tmpVar106 to i16 | |
store i16 %50, i16* %stop, align 2 | |
%load_d2107 = load i16, i16* %d2, align 2 | |
store i16 %load_d2107, i16* %start, align 2 | |
%EVEN_instance = alloca %EVEN_interface, align 8 | |
%51 = getelementptr inbounds %EVEN_interface, %EVEN_interface* %EVEN_instance, i32 0, i32 0 | |
%load_disc109 = load i16, i16* %disc, align 2 | |
%52 = sext i16 %load_disc109 to i32 | |
store i32 %52, i32* %51, align 4 | |
%call110 = call i8 @EVEN(%EVEN_interface* %EVEN_instance) | |
%53 = icmp ne i8 %call110, 0 | |
%tmpVar111 = xor i1 %53, true | |
br i1 %tmpVar111, label %condition_body112, label %continue108 | |
54: ; preds = %condition_check32 | |
%load_start40 = load i16, i16* %start, align 2 | |
%tmpVar41 = icmp sge i16 %load_start40, 0 | |
%55 = zext i1 %tmpVar41 to i8 | |
%56 = icmp ne i8 %55, 0 | |
br label %57 | |
57: ; preds = %54, %condition_check32 | |
%58 = phi i1 [ %45, %condition_check32 ], [ %56, %54 ] | |
%59 = zext i1 %58 to i8 | |
%60 = icmp ne i8 %59, 0 | |
br i1 %60, label %66, label %61 | |
61: ; preds = %57 | |
%load_start42 = load i16, i16* %start, align 2 | |
%load_M43 = load i16, i16* %M, align 2 | |
%62 = sext i16 %load_M43 to i32 | |
%tmpVar44 = sub i32 %62, 2 | |
%63 = trunc i32 %tmpVar44 to i16 | |
%tmpVar45 = icmp sge i16 %load_start42, %63 | |
%64 = zext i1 %tmpVar45 to i8 | |
%65 = icmp ne i8 %64, 0 | |
br i1 %65, label %70, label %73 | |
66: ; preds = %73, %57 | |
%67 = phi i1 [ %60, %57 ], [ %76, %73 ] | |
%68 = zext i1 %67 to i8 | |
%69 = icmp ne i8 %68, 0 | |
br i1 %69, label %for_body33, label %continue35 | |
70: ; preds = %61 | |
%load_start46 = load i16, i16* %start, align 2 | |
%tmpVar47 = icmp sle i16 %load_start46, 0 | |
%71 = zext i1 %tmpVar47 to i8 | |
%72 = icmp ne i8 %71, 0 | |
br label %73 | |
73: ; preds = %70, %61 | |
%74 = phi i1 [ %65, %61 ], [ %72, %70 ] | |
%75 = zext i1 %74 to i8 | |
%76 = icmp ne i8 %75, 0 | |
br label %66 | |
condition_check50: ; preds = %increment52, %for_body33 | |
%load_i54 = load i16, i16* %i, align 2 | |
%load_i55 = load i16, i16* %i, align 2 | |
%load_M56 = load i16, i16* %M, align 2 | |
%77 = sext i16 %load_M56 to i32 | |
%tmpVar57 = sub i32 %77, 1 | |
%78 = trunc i32 %tmpVar57 to i16 | |
%tmpVar58 = icmp sle i16 %load_i55, %78 | |
%79 = zext i1 %tmpVar58 to i8 | |
%80 = icmp ne i8 %79, 0 | |
br i1 %80, label %83, label %88 | |
for_body51: ; preds = %97 | |
%load_start72 = load i16, i16* %start, align 2 | |
%81 = sext i16 %load_start72 to i32 | |
%tmpVar73 = mul i32 1, %81 | |
%tmpVar74 = add i32 %tmpVar73, 0 | |
%tmpVar75 = getelementptr inbounds [16 x float], [16 x float]* %buf, i32 0, i32 %tmpVar74 | |
%load_tmpVar76 = load float, float* %tmpVar75, align 4 | |
%load_i77 = load i16, i16* %i, align 2 | |
%82 = sext i16 %load_i77 to i32 | |
%tmpVar78 = mul i32 1, %82 | |
%tmpVar79 = add i32 %tmpVar78, 0 | |
%tmpVar80 = getelementptr inbounds [16 x float], [16 x float]* %buf, i32 0, i32 %tmpVar79 | |
%load_tmpVar81 = load float, float* %tmpVar80, align 4 | |
%tmpVar82 = fcmp ogt float %load_tmpVar76, %load_tmpVar81 | |
br i1 %tmpVar82, label %condition_body83, label %continue71 | |
increment52: ; preds = %continue71 | |
%tmpVar102 = add i16 %load_i54, 1 | |
store i16 %tmpVar102, i16* %i, align 2 | |
br label %condition_check50 | |
continue53: ; preds = %97 | |
br label %increment34 | |
83: ; preds = %condition_check50 | |
%load_i59 = load i16, i16* %i, align 2 | |
%load_start60 = load i16, i16* %start, align 2 | |
%84 = sext i16 %load_start60 to i32 | |
%tmpVar61 = add i32 %84, 1 | |
%85 = trunc i32 %tmpVar61 to i16 | |
%tmpVar62 = icmp sge i16 %load_i59, %85 | |
%86 = zext i1 %tmpVar62 to i8 | |
%87 = icmp ne i8 %86, 0 | |
br label %88 | |
88: ; preds = %83, %condition_check50 | |
%89 = phi i1 [ %80, %condition_check50 ], [ %87, %83 ] | |
%90 = zext i1 %89 to i8 | |
%91 = icmp ne i8 %90, 0 | |
br i1 %91, label %97, label %92 | |
92: ; preds = %88 | |
%load_i63 = load i16, i16* %i, align 2 | |
%load_M64 = load i16, i16* %M, align 2 | |
%93 = sext i16 %load_M64 to i32 | |
%tmpVar65 = sub i32 %93, 1 | |
%94 = trunc i32 %tmpVar65 to i16 | |
%tmpVar66 = icmp sge i16 %load_i63, %94 | |
%95 = zext i1 %tmpVar66 to i8 | |
%96 = icmp ne i8 %95, 0 | |
br i1 %96, label %101, label %106 | |
97: ; preds = %106, %88 | |
%98 = phi i1 [ %91, %88 ], [ %109, %106 ] | |
%99 = zext i1 %98 to i8 | |
%100 = icmp ne i8 %99, 0 | |
br i1 %100, label %for_body51, label %continue53 | |
101: ; preds = %92 | |
%load_i67 = load i16, i16* %i, align 2 | |
%load_start68 = load i16, i16* %start, align 2 | |
%102 = sext i16 %load_start68 to i32 | |
%tmpVar69 = add i32 %102, 1 | |
%103 = trunc i32 %tmpVar69 to i16 | |
%tmpVar70 = icmp sle i16 %load_i67, %103 | |
%104 = zext i1 %tmpVar70 to i8 | |
%105 = icmp ne i8 %104, 0 | |
br label %106 | |
106: ; preds = %101, %92 | |
%107 = phi i1 [ %96, %92 ], [ %105, %101 ] | |
%108 = zext i1 %107 to i8 | |
%109 = icmp ne i8 %108, 0 | |
br label %97 | |
condition_body83: ; preds = %for_body51 | |
%load_start84 = load i16, i16* %start, align 2 | |
%110 = sext i16 %load_start84 to i32 | |
%tmpVar85 = mul i32 1, %110 | |
%tmpVar86 = add i32 %tmpVar85, 0 | |
%tmpVar87 = getelementptr inbounds [16 x float], [16 x float]* %buf, i32 0, i32 %tmpVar86 | |
%load_tmpVar88 = load float, float* %tmpVar87, align 4 | |
store float %load_tmpVar88, float* %temp, align 4 | |
%load_start89 = load i16, i16* %start, align 2 | |
%111 = sext i16 %load_start89 to i32 | |
%tmpVar90 = mul i32 1, %111 | |
%tmpVar91 = add i32 %tmpVar90, 0 | |
%tmpVar92 = getelementptr inbounds [16 x float], [16 x float]* %buf, i32 0, i32 %tmpVar91 | |
%load_i93 = load i16, i16* %i, align 2 | |
%112 = sext i16 %load_i93 to i32 | |
%tmpVar94 = mul i32 1, %112 | |
%tmpVar95 = add i32 %tmpVar94, 0 | |
%tmpVar96 = getelementptr inbounds [16 x float], [16 x float]* %buf, i32 0, i32 %tmpVar95 | |
%load_tmpVar97 = load float, float* %tmpVar96, align 4 | |
store float %load_tmpVar97, float* %tmpVar92, align 4 | |
%load_i98 = load i16, i16* %i, align 2 | |
%113 = sext i16 %load_i98 to i32 | |
%tmpVar99 = mul i32 1, %113 | |
%tmpVar100 = add i32 %tmpVar99, 0 | |
%tmpVar101 = getelementptr inbounds [16 x float], [16 x float]* %buf, i32 0, i32 %tmpVar100 | |
%load_temp = load float, float* %temp, align 4 | |
store float %load_temp, float* %tmpVar101, align 4 | |
br label %continue71 | |
continue71: ; preds = %condition_body83, %for_body51 | |
br label %increment52 | |
condition_body112: ; preds = %continue35 | |
%load_start113 = load i16, i16* %start, align 2 | |
%114 = sext i16 %load_start113 to i32 | |
%tmpVar114 = add i32 %114, 1 | |
%115 = trunc i32 %tmpVar114 to i16 | |
store i16 %115, i16* %start, align 2 | |
br label %continue108 | |
continue108: ; preds = %condition_body112, %continue35 | |
store float 0.000000e+00, float* %avg, align 4 | |
%load_start115 = load i16, i16* %start, align 2 | |
store i16 %load_start115, i16* %i, align 2 | |
br label %condition_check116 | |
condition_check116: ; preds = %increment118, %continue108 | |
%load_i120 = load i16, i16* %i, align 2 | |
%load_i121 = load i16, i16* %i, align 2 | |
%load_stop = load i16, i16* %stop, align 2 | |
%tmpVar122 = icmp sle i16 %load_i121, %load_stop | |
%116 = zext i1 %tmpVar122 to i8 | |
%117 = icmp ne i8 %116, 0 | |
br i1 %117, label %125, label %128 | |
for_body117: ; preds = %135 | |
%load_avg = load float, float* %avg, align 4 | |
%load_i132 = load i16, i16* %i, align 2 | |
%118 = sext i16 %load_i132 to i32 | |
%tmpVar133 = mul i32 1, %118 | |
%tmpVar134 = add i32 %tmpVar133, 0 | |
%tmpVar135 = getelementptr inbounds [16 x float], [16 x float]* %buf, i32 0, i32 %tmpVar134 | |
%load_tmpVar136 = load float, float* %tmpVar135, align 4 | |
%tmpVar137 = fadd float %load_avg, %load_tmpVar136 | |
store float %tmpVar137, float* %avg, align 4 | |
br label %increment118 | |
increment118: ; preds = %for_body117 | |
%tmpVar138 = add i16 %load_i120, 1 | |
store i16 %tmpVar138, i16* %i, align 2 | |
br label %condition_check116 | |
continue119: ; preds = %135 | |
%load_avg139 = load float, float* %avg, align 4 | |
%INT_TO_REAL_instance = alloca %INT_TO_REAL_interface, align 8 | |
%119 = getelementptr inbounds %INT_TO_REAL_interface, %INT_TO_REAL_interface* %INT_TO_REAL_instance, i32 0, i32 0 | |
%load_stop140 = load i16, i16* %stop, align 2 | |
%120 = sext i16 %load_stop140 to i32 | |
%load_start141 = load i16, i16* %start, align 2 | |
%121 = sext i16 %load_start141 to i32 | |
%tmpVar142 = sub i32 %120, %121 | |
%tmpVar143 = add i32 %tmpVar142, 1 | |
%122 = trunc i32 %tmpVar143 to i16 | |
store i16 %122, i16* %119, align 2 | |
%call144 = call float @INT_TO_REAL(%INT_TO_REAL_interface* %INT_TO_REAL_instance) | |
%tmpVar145 = fdiv float %load_avg139, %call144 | |
store float %tmpVar145, float* %avg, align 4 | |
%load_start146 = load i16, i16* %start, align 2 | |
%123 = sext i16 %load_start146 to i32 | |
%tmpVar147 = mul i32 1, %123 | |
%tmpVar148 = add i32 %tmpVar147, 0 | |
%tmpVar149 = getelementptr inbounds [16 x float], [16 x float]* %buf, i32 0, i32 %tmpVar148 | |
%load_tmpVar150 = load float, float* %tmpVar149, align 4 | |
store float %load_tmpVar150, float* %low, align 4 | |
%load_stop151 = load i16, i16* %stop, align 2 | |
%124 = sext i16 %load_stop151 to i32 | |
%tmpVar152 = mul i32 1, %124 | |
%tmpVar153 = add i32 %tmpVar152, 0 | |
%tmpVar154 = getelementptr inbounds [16 x float], [16 x float]* %buf, i32 0, i32 %tmpVar153 | |
%load_tmpVar155 = load float, float* %tmpVar154, align 4 | |
store float %load_tmpVar155, float* %high, align 4 | |
br label %continue | |
125: ; preds = %condition_check116 | |
%load_i123 = load i16, i16* %i, align 2 | |
%load_start124 = load i16, i16* %start, align 2 | |
%tmpVar125 = icmp sge i16 %load_i123, %load_start124 | |
%126 = zext i1 %tmpVar125 to i8 | |
%127 = icmp ne i8 %126, 0 | |
br label %128 | |
128: ; preds = %125, %condition_check116 | |
%129 = phi i1 [ %117, %condition_check116 ], [ %127, %125 ] | |
%130 = zext i1 %129 to i8 | |
%131 = icmp ne i8 %130, 0 | |
br i1 %131, label %135, label %132 | |
132: ; preds = %128 | |
%load_i126 = load i16, i16* %i, align 2 | |
%load_stop127 = load i16, i16* %stop, align 2 | |
%tmpVar128 = icmp sge i16 %load_i126, %load_stop127 | |
%133 = zext i1 %tmpVar128 to i8 | |
%134 = icmp ne i8 %133, 0 | |
br i1 %134, label %139, label %142 | |
135: ; preds = %142, %128 | |
%136 = phi i1 [ %131, %128 ], [ %145, %142 ] | |
%137 = zext i1 %136 to i8 | |
%138 = icmp ne i8 %137, 0 | |
br i1 %138, label %for_body117, label %continue119 | |
139: ; preds = %132 | |
%load_i129 = load i16, i16* %i, align 2 | |
%load_start130 = load i16, i16* %start, align 2 | |
%tmpVar131 = icmp sle i16 %load_i129, %load_start130 | |
%140 = zext i1 %tmpVar131 to i8 | |
%141 = icmp ne i8 %140, 0 | |
br label %142 | |
142: ; preds = %139, %132 | |
%143 = phi i1 [ %134, %132 ], [ %141, %139 ] | |
%144 = zext i1 %143 to i8 | |
%145 = icmp ne i8 %144, 0 | |
br label %135 | |
} | |
define void @SH_T(%SH_T_interface* %0) { | |
entry: | |
%IN = getelementptr inbounds %SH_T_interface, %SH_T_interface* %0, i32 0, i32 0 | |
%E = getelementptr inbounds %SH_T_interface, %SH_T_interface* %0, i32 0, i32 1 | |
%OUT = getelementptr inbounds %SH_T_interface, %SH_T_interface* %0, i32 0, i32 2 | |
%load_E = load i8, i8* %E, align 1 | |
%1 = icmp ne i8 %load_E, 0 | |
br i1 %1, label %condition_body, label %continue | |
condition_body: ; preds = %entry | |
%load_in = load float, float* %IN, align 4 | |
store float %load_in, float* %OUT, align 4 | |
br label %continue | |
continue: ; preds = %condition_body, %entry | |
ret void | |
} | |
define float @STAIR(%STAIR_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %STAIR_interface, %STAIR_interface* %0, i32 0, i32 0 | |
%D = getelementptr inbounds %STAIR_interface, %STAIR_interface* %0, i32 0, i32 1 | |
%STAIR = alloca float, align 4 | |
store float 0.000000e+00, float* %STAIR, align 4 | |
%load_D = load float, float* %D, align 4 | |
%tmpVar = fcmp ogt float %load_D, 0.000000e+00 | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%DINT_TO_REAL_instance = alloca %DINT_TO_REAL_interface, align 8 | |
%1 = getelementptr inbounds %DINT_TO_REAL_interface, %DINT_TO_REAL_interface* %DINT_TO_REAL_instance, i32 0, i32 0 | |
%REAL_TO_DINT_instance = alloca %REAL_TO_DINT_interface, align 8 | |
%2 = getelementptr inbounds %REAL_TO_DINT_interface, %REAL_TO_DINT_interface* %REAL_TO_DINT_instance, i32 0, i32 0 | |
%load_X = load float, float* %X, align 4 | |
%load_D1 = load float, float* %D, align 4 | |
%tmpVar2 = fdiv float %load_X, %load_D1 | |
store float %tmpVar2, float* %2, align 4 | |
%call = call i32 @REAL_TO_DINT(%REAL_TO_DINT_interface* %REAL_TO_DINT_instance) | |
store i32 %call, i32* %1, align 4 | |
%call3 = call float @DINT_TO_REAL(%DINT_TO_REAL_interface* %DINT_TO_REAL_instance) | |
%load_D4 = load float, float* %D, align 4 | |
%tmpVar5 = fmul float %call3, %load_D4 | |
store float %tmpVar5, float* %STAIR, align 4 | |
br label %continue | |
else: ; preds = %entry | |
%load_X6 = load float, float* %X, align 4 | |
store float %load_X6, float* %STAIR, align 4 | |
br label %continue | |
continue: ; preds = %else, %condition_body | |
%STAIR_ret = load float, float* %STAIR, align 4 | |
ret float %STAIR_ret | |
} | |
define void @STAIR2(%STAIR2_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %STAIR2_interface, %STAIR2_interface* %0, i32 0, i32 0 | |
%D = getelementptr inbounds %STAIR2_interface, %STAIR2_interface* %0, i32 0, i32 1 | |
%Y = getelementptr inbounds %STAIR2_interface, %STAIR2_interface* %0, i32 0, i32 2 | |
%load_D = load float, float* %D, align 4 | |
%tmpVar = fcmp ogt float %load_D, 0.000000e+00 | |
br i1 %tmpVar, label %condition_body, label %else | |
condition_body: ; preds = %entry | |
%load_X = load float, float* %X, align 4 | |
%load_Y = load float, float* %Y, align 4 | |
%load_D2 = load float, float* %D, align 4 | |
%tmpVar3 = fadd float %load_Y, %load_D2 | |
%tmpVar4 = fcmp oge float %load_X, %tmpVar3 | |
br i1 %tmpVar4, label %4, label %3 | |
else: ; preds = %entry | |
%load_X16 = load float, float* %X, align 4 | |
store float %load_X16, float* %Y, align 4 | |
br label %continue | |
continue: ; preds = %else, %continue1 | |
ret void | |
condition_body10: ; preds = %4 | |
%FLOOR_instance = alloca %FLOOR_interface, align 8 | |
%1 = getelementptr inbounds %FLOOR_interface, %FLOOR_interface* %FLOOR_instance, i32 0, i32 0 | |
%load_X11 = load float, float* %X, align 4 | |
%load_D12 = load float, float* %D, align 4 | |
%tmpVar13 = fdiv float %load_X11, %load_D12 | |
store float %tmpVar13, float* %1, align 4 | |
%call = call i16 @FLOOR(%FLOOR_interface* %FLOOR_instance) | |
%2 = sitofp i16 %call to float | |
%load_D14 = load float, float* %D, align 4 | |
%tmpVar15 = fmul float %2, %load_D14 | |
store float %tmpVar15, float* %Y, align 4 | |
br label %continue1 | |
continue1: ; preds = %condition_body10, %4 | |
br label %continue | |
3: ; preds = %condition_body | |
%load_X5 = load float, float* %X, align 4 | |
%load_Y6 = load float, float* %Y, align 4 | |
%load_D7 = load float, float* %D, align 4 | |
%tmpVar8 = fsub float %load_Y6, %load_D7 | |
%tmpVar9 = fcmp ole float %load_X5, %tmpVar8 | |
br label %4 | |
4: ; preds = %3, %condition_body | |
%5 = phi i1 [ %tmpVar4, %condition_body ], [ %tmpVar9, %3 ] | |
br i1 %5, label %condition_body10, label %continue1 | |
} | |
define void @TREND(%TREND_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %TREND_interface, %TREND_interface* %0, i32 0, i32 0 | |
%Q = getelementptr inbounds %TREND_interface, %TREND_interface* %0, i32 0, i32 1 | |
%TU = getelementptr inbounds %TREND_interface, %TREND_interface* %0, i32 0, i32 2 | |
%TD = getelementptr inbounds %TREND_interface, %TREND_interface* %0, i32 0, i32 3 | |
%D = getelementptr inbounds %TREND_interface, %TREND_interface* %0, i32 0, i32 4 | |
%last_X = getelementptr inbounds %TREND_interface, %TREND_interface* %0, i32 0, i32 5 | |
%load_X = load float, float* %X, align 4 | |
%load_last_X = load float, float* %last_X, align 4 | |
%tmpVar = fcmp ogt float %load_X, %load_last_X | |
%1 = zext i1 %tmpVar to i8 | |
store i8 %1, i8* %TU, align 1 | |
%load_X1 = load float, float* %X, align 4 | |
%load_last_X2 = load float, float* %last_X, align 4 | |
%tmpVar3 = fcmp olt float %load_X1, %load_last_X2 | |
%2 = zext i1 %tmpVar3 to i8 | |
store i8 %2, i8* %TD, align 1 | |
%load_TU = load i8, i8* %TU, align 1 | |
%3 = icmp ne i8 %load_TU, 0 | |
br i1 %3, label %6, label %4 | |
4: ; preds = %entry | |
%load_TD = load i8, i8* %TD, align 1 | |
%5 = icmp ne i8 %load_TD, 0 | |
br label %6 | |
6: ; preds = %4, %entry | |
%7 = phi i1 [ %3, %entry ], [ %5, %4 ] | |
%8 = zext i1 %7 to i8 | |
store i8 %8, i8* %Q, align 1 | |
%load_X4 = load float, float* %X, align 4 | |
%load_LAST_X = load float, float* %last_X, align 4 | |
%tmpVar5 = fsub float %load_X4, %load_LAST_X | |
store float %tmpVar5, float* %D, align 4 | |
%load_X6 = load float, float* %X, align 4 | |
store float %load_X6, float* %last_X, align 4 | |
ret void | |
} | |
define void @TREND_DW(%TREND_DW_interface* %0) { | |
entry: | |
%X = getelementptr inbounds %TREND_DW_interface, %TREND_DW_interface* %0, i32 0, i32 0 | |
%Q = getelementptr inbounds %TREND_DW_interface, %TREND_DW_interface* %0, i32 0, i32 1 | |
%TU = getelementptr inbounds %TREND_DW_interface, %TREND_DW_interface* %0, i32 0, i32 2 | |
%TD = getelementptr inbounds %TREND_DW_interface, %TREND_DW_interface* %0, i32 0, i32 3 | |
%D = getelementptr inbounds %TREND_DW_interface, %TREND_DW_interface* %0, i32 0, i32 4 | |
%last_X = getelementptr inbounds %TREND_DW_interface, %TREND_DW_interface* %0, i32 0, i32 5 | |
%load_X = load i32, i32* %X, align 4 | |
%load_last_X = load i32, i32* %last_X, align 4 | |
%tmpVar = icmp sgt i32 %load_X, %load_last_X | |
br i1 %tmpVar, label %condition_body, label %branch | |
condition_body: ; preds = %entry | |
store i8 1, i8* %TU, align 1 | |
store i8 0, i8* %TD, align 1 | |
%load_X1 = load i32, i32* %X, align 4 | |
%load_last_X2 = load i32, i32* %last_X, align 4 | |
%tmpVar3 = sub i32 %load_X1, %load_last_X2 | |
store i32 %tmpVar3, i32* %D, align 4 | |
store i8 1, i8* %Q, align 1 | |
br label %continue | |
branch: ; preds = %entry | |
%load_X4 = load i32, i32* %X, align 4 | |
%load_last_X5 = load i32, i32* %last_X, align 4 | |
%tmpVar6 = icmp slt i32 %load_X4, %load_last_X5 | |
br i1 %tmpVar6, label %condition_body7, label %else | |
condition_body7: ; preds = %branch | |
store i8 1, i8* %TD, align 1 | |
store i8 0, i8* %TU, align 1 | |
%load_last_X8 = load i32, i32* %last_X, align 4 | |
%load_X9 = load i32, i32* %X, align 4 | |
%tmpVar10 = sub i32 %load_last_X8, %load_X9 | |
store i32 %tmpVar10, i32* %D, align 4 | |
store i8 0, i8* %Q, align 1 | |
br label %continue | |
else: ; preds = %branch | |
store i8 0, i8* %TU, align 1 | |
store i8 0, i8* %TD, align 1 | |
store i32 0, i32* %D, align 4 | |
br label %continue | |
contin |
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