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Created March 24, 2018 01:15
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; ModuleID = 'testor0-fd1dd8ef827b12d7953eeea42d54ad03.rs'
source_filename = "testor0-fd1dd8ef827b12d7953eeea42d54ad03.rs"
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%"core::option::Option<usize>" = type { [16 x i8] }
%"unwind::libunwind::_Unwind_Exception" = type { [0 x i8], i64, [0 x i8], void (i32, %"unwind::libunwind::_Unwind_Exception"*)*, [0 x i8], [6 x i64], [0 x i8] }
%"unwind::libunwind::_Unwind_Context" = type { [0 x i8] }
@str.2 = internal constant [9 x i8] c"85af342b1"
; testor::parse_hex
; Function Attrs: noinline uwtable
define internal fastcc void @_ZN6testor9parse_hex17hc0d49e79f6376abdE(%"core::option::Option<usize>"* noalias nocapture dereferenceable(16)) unnamed_addr #0 personality i32 (i32, i32, i64, %"unwind::libunwind::_Unwind_Exception"*, %"unwind::libunwind::_Unwind_Context"*)* @rust_eh_personality {
start:
br label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$11split_first17ha96bed44517b0fd0E.exit"
"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$11split_first17ha96bed44517b0fd0E.exit": ; preds = %start, %bb1.backedge
%s.sroa.0.040 = phi [0 x i8]* [ bitcast ([9 x i8]* @str.2 to [0 x i8]*), %start ], [ %3, %bb1.backedge ]
%s.sroa.6.039 = phi i64 [ 9, %start ], [ %1, %bb1.backedge ]
%result.sroa.0.038 = phi i64 [ 0, %start ], [ 1, %bb1.backedge ]
%result.sroa.7.037 = phi i64 [ undef, %start ], [ %result.sroa.7.0.be, %bb1.backedge ]
%1 = add nsw i64 %s.sroa.6.039, -1
%not. = icmp eq [0 x i8]* %s.sroa.0.040, null
br i1 %not., label %bb15, label %bb4
bb4: ; preds = %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$11split_first17ha96bed44517b0fd0E.exit"
%2 = getelementptr inbounds [0 x i8], [0 x i8]* %s.sroa.0.040, i64 0, i64 1
%3 = bitcast i8* %2 to [0 x i8]*
%4 = getelementptr inbounds [0 x i8], [0 x i8]* %s.sroa.0.040, i64 0, i64 0
%5 = load i8, i8* %4, align 1
%.off = add i8 %5, -48
%6 = icmp ult i8 %.off, 10
br i1 %6, label %bb14, label %bb9
bb6: ; preds = %bb9
%7 = add i8 %5, -87
br label %bb14
bb7: ; preds = %bb11
%8 = add i8 %5, -55
br label %bb14
bb9: ; preds = %bb4
%.off1 = add i8 %5, -97
%9 = icmp ult i8 %.off1, 6
br i1 %9, label %bb6, label %bb11
bb11: ; preds = %bb9
%.off2 = add i8 %5, -65
%10 = icmp ult i8 %.off2, 6
br i1 %10, label %bb7, label %bb15
bb14: ; preds = %bb4, %bb7, %bb6
%d.0 = phi i8 [ %7, %bb6 ], [ %8, %bb7 ], [ %.off, %bb4 ]
%switch = icmp eq i64 %result.sroa.0.038, 1
br i1 %switch, label %bb18, label %bb16
bb15: ; preds = %bb1.backedge, %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$11split_first17ha96bed44517b0fd0E.exit", %bb11
%result.sroa.7.0.lcssa = phi i64 [ %result.sroa.7.0.be, %bb1.backedge ], [ %result.sroa.7.037, %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$11split_first17ha96bed44517b0fd0E.exit" ], [ %result.sroa.7.037, %bb11 ]
%result.sroa.0.0.lcssa = phi i64 [ 1, %bb1.backedge ], [ %result.sroa.0.038, %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$11split_first17ha96bed44517b0fd0E.exit" ], [ %result.sroa.0.038, %bb11 ]
%_43.sroa.0.0..sroa_cast = bitcast %"core::option::Option<usize>"* %0 to i64*
store i64 %result.sroa.0.0.lcssa, i64* %_43.sroa.0.0..sroa_cast, align 8
%_43.sroa.4.0..sroa_idx16 = getelementptr inbounds %"core::option::Option<usize>", %"core::option::Option<usize>"* %0, i64 0, i32 0, i64 8
%_43.sroa.4.0..sroa_cast = bitcast i8* %_43.sroa.4.0..sroa_idx16 to i64*
store i64 %result.sroa.7.0.lcssa, i64* %_43.sroa.4.0..sroa_cast, align 8
br label %bb27
bb16: ; preds = %bb14
%11 = zext i8 %d.0 to i64
br label %bb1.backedge
bb1.backedge: ; preds = %bb16, %bb23
%result.sroa.7.0.be = phi i64 [ %11, %bb16 ], [ %19, %bb23 ]
%12 = icmp eq i64 %1, 0
br i1 %12, label %bb15, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$11split_first17ha96bed44517b0fd0E.exit"
bb18: ; preds = %bb14
%13 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %result.sroa.7.037, i64 16) #5
%14 = extractvalue { i64, i1 } %13, 1
br i1 %14, label %bb24, label %bb4.i
bb4.i: ; preds = %bb18
%15 = extractvalue { i64, i1 } %13, 0
%16 = zext i8 %d.0 to i64
%17 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %15, i64 %16) #5
%18 = extractvalue { i64, i1 } %17, 1
br i1 %18, label %bb24, label %bb23
bb23: ; preds = %bb4.i
%19 = extractvalue { i64, i1 } %17, 0
br label %bb1.backedge
bb24: ; preds = %bb18, %bb4.i
%20 = bitcast %"core::option::Option<usize>"* %0 to i64*
store i64 0, i64* %20, align 8, !alias.scope !1
br label %bb27
bb27: ; preds = %bb15, %bb24
ret void
}
; testor::main
; Function Attrs: uwtable
define internal void @_ZN6testor4main17h1a79b1b3deed3ac3E() unnamed_addr #1 personality i32 (i32, i32, i64, %"unwind::libunwind::_Unwind_Exception"*, %"unwind::libunwind::_Unwind_Context"*)* @rust_eh_personality {
start:
%_13 = alloca %"core::option::Option<usize>", align 8
%0 = getelementptr inbounds %"core::option::Option<usize>", %"core::option::Option<usize>"* %_13, i64 0, i32 0, i64 0
%1 = bitcast %"core::option::Option<usize>"* %_13 to i64*
br label %bb2
bb2: ; preds = %bb6, %start
%iter.sroa.0.0 = phi i32 [ 1, %start ], [ %.iter.sroa.0.0, %bb6 ]
%2 = icmp slt i32 %iter.sroa.0.0, 10000000
br i1 %2, label %bb6, label %bb7
bb6: ; preds = %bb2
%.iter.sroa.0.0 = add i32 %iter.sroa.0.0, 1
call void @llvm.lifetime.start(i64 16, i8* nonnull %0)
; call testor::parse_hex
call fastcc void @_ZN6testor9parse_hex17hc0d49e79f6376abdE(%"core::option::Option<usize>"* noalias nocapture nonnull dereferenceable(16) %_13)
%3 = load i64, i64* %1, align 8, !range !4
%cond = icmp eq i64 %3, 1
call void @llvm.lifetime.end(i64 16, i8* nonnull %0)
br i1 %cond, label %bb2, label %bb7
bb7: ; preds = %bb2, %bb6
ret void
}
; Function Attrs: argmemonly nounwind
declare void @llvm.lifetime.start(i64, i8* nocapture) #2
; Function Attrs: argmemonly nounwind
declare void @llvm.lifetime.end(i64, i8* nocapture) #2
declare i32 @rust_eh_personality(i32, i32, i64, %"unwind::libunwind::_Unwind_Exception"*, %"unwind::libunwind::_Unwind_Context"*) unnamed_addr #3
; Function Attrs: nounwind readnone
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #4
; Function Attrs: nounwind readnone
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #4
define i32 @main(i32, i8**) unnamed_addr {
top:
%2 = sext i32 %0 to i64
; call std::rt::lang_start
%3 = tail call i64 @_ZN3std2rt10lang_start17h49c0bcc9aad2450aE(void ()* @_ZN6testor4main17h1a79b1b3deed3ac3E, i64 %2, i8** %1)
%4 = trunc i64 %3 to i32
ret i32 %4
}
; std::rt::lang_start
declare i64 @_ZN3std2rt10lang_start17h49c0bcc9aad2450aE(void ()* nonnull, i64, i8**) unnamed_addr #3
attributes #0 = { noinline uwtable "probe-stack"="__rust_probestack" }
attributes #1 = { uwtable "probe-stack"="__rust_probestack" }
attributes #2 = { argmemonly nounwind }
attributes #3 = { "probe-stack"="__rust_probestack" }
attributes #4 = { nounwind readnone }
attributes #5 = { nounwind }
!llvm.module.flags = !{!0}
!0 = !{i32 1, !"PIE Level", i32 2}
!1 = !{!2}
!2 = distinct !{!2, !3, !"_ZN69_$LT$core..option..Option$LT$T$GT$$u20$as$u20$core..ops..try..Try$GT$10from_error17h7621c9a9bc2a59b0E: argument 0"}
!3 = distinct !{!3, !"_ZN69_$LT$core..option..Option$LT$T$GT$$u20$as$u20$core..ops..try..Try$GT$10from_error17h7621c9a9bc2a59b0E"}
!4 = !{i64 0, i64 2}
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