- PPU has 3x cycle speed compare to CPU
- PPU can render upto 64 sprite
- Sprite could be 8x16 or 8x8
- Color is specified by 2 bit in the pattern table, and 2 bit in the attribute table
- Instruction set is based on addressing mode
- The opcode is a 4 byte number
- Addressing mode is read by the first 2 byte of the opcode, and with each mode, the address is change in a different way as the below table indicates:
WIth each mode, the address is change in a different way:
- pc: program counter
- x: register x
- y: register y
| mode | address | Note |
|---|---|---|
| absolute | [pc + 1]<<8 or [pc + 2] |
|
| absoluteX | [pc + 1]<<8 or [pc + 2] + X, move to different page |
|
| absoluteY | [pc + 1]<<8 or [pc + 2] + Y, move to different page |
|
| accumulator | 0 |
|
| immediate | pc + 1 |
|
| implied | 0 |
|
| indexed indirect | [pc + 1 + X] * |
This result is because of a bug of the CPU |
([x]) indicates that the value is read from RAM in address x
(*) The real value is:
A = [pc + 1 + X]
B = (A & 0xFF00) | (A & 0x00FF + 1)
RealValue = [B] << 8 | [A]