sll 64bit 1byte-shift then 3bit shift QuartusII 12.1 427LE/185.84MHz

sll64_8_8.v

/*
module sll64_byte (indata,val_nnnnxxx,outdata);
  input [63:0] indata;
	input [3:0] val_nnnnxxx; // shift
	output [63:0] outdata;

	wire [6:0] shift_v;
	
	assign shift_v={val_nnnnxxx,3'b000};
	assign outdata=indata<<shift_v;
endmodule
*/

module sll64_byte(indata,val_nnnnxxx,outdata);

	input [63:0] indata;
	input [3:0] val_nnnnxxx;
	output [63:0] outdata;
	
	function [63:0] shifterL;
		input [63:0] in;
		input [3:0] sv;
		begin
			case (sv)
				4'b0000:	shifterL=in[63:0];
				4'b0001:	shifterL={in[59:0],  4'b0000};
				4'b0010:	shifterL={in[55:0],  8'b00000000};
				4'b0011:	shifterL={in[51:0],12'b000000000000};
				4'b0100:	shifterL={in[47:0],16'b0000000000000000};
				4'b0101:	shifterL={in[43:0],20'b00000000000000000000};
				4'b0110:	shifterL={in[39:0],24'b000000000000000000000000};
				4'b0111:	shifterL={in[35:0],28'b0000000000000000000000000000};
				4'b1000:	shifterL={in[31:0],32'b00000000000000000000000000000000};
				4'b1001:	shifterL={in[27:0],36'b000000000000000000000000000000000000};
				4'b1010:	shifterL={in[23:0],40'b0000000000000000000000000000000000000000};
				4'b1011:	shifterL={in[19:0],44'b00000000000000000000000000000000000000000000};
				4'b1100:	shifterL={in[15:0],48'b000000000000000000000000000000000000000000000000};
				4'b1101:	shifterL={in[11:0],52'b0000000000000000000000000000000000000000000000000000};
				4'b1110:	shifterL={in[7:0] ,56'b00000000000000000000000000000000000000000000000000000000};
				4'b1111:	shifterL=64'b000000000000000;
				endcase
		end
	endfunction
	
	assign outdata=shifterL(indata,val_nnnnxxx);
endmodule
	

module sll64_8bit (indata,val,outdata);
	input [63:0] indata;
	input [2:0] val; // shift 0-7
	output [63:0] outdata;
	assign outdata=indata<<val;
endmodule

module sll64_8_8 (indata,val,outdata);
	input [63:0] indata;
	input [63:0] val;
	output [63:0] outdata;
	wire [63:0] byteout;
	sll64_byte sllbyte(indata,val[6:3],byteout);
	sll64_8bit sll8bit(byteout,val[2:0],outdata);
//	lpm_clshifa sll8bit(byteout,val[2:0],outdata); // ALTERA Megafunction
endmodule