こうじゃない？

sll64_8_8.v

/*
module sll64_byte (indata,val_nnnnxxx,outdata);
  input [63:0] indata;
  input [3:0] val_nnnnxxx; // shift
  output [63:0] outdata;
 
  wire [6:0] shift_v;
  assign shift_v={val_nnnnxxx,3'b000};
  assign outdata=indata<<shift_v;
endmodule
*/
 
module sll64_byte(indata,val_nnnnxxx,outdata);
 
  input    [63:0] indata;
  input    [ 2:0] val_nnnnxxx;
  output   [63:0] outdata;
  function [63:0] shifterL;
    input  [63:0] in;
    input  [ 2:0] sv;
  begin
    case (sv)
      3'b000:	shifterL=in[63:0];
      3'b001:	shifterL={in[55:0], 8'b00000000};
      3'b010:	shifterL={in[47:0],16'b0000000000000000};
      3'b011:	shifterL={in[39:0],24'b000000000000000000000000};
      3'b100:	shifterL={in[31:0],32'b00000000000000000000000000000000};
      3'b101:	shifterL={in[23:0],40'b0000000000000000000000000000000000000000};
      3'b110:	shifterL={in[15:0],48'b000000000000000000000000000000000000000000000000};
      3'b111:	shifterL={in[7:0] ,56'b00000000000000000000000000000000000000000000000000000000};
    endcase
  end
  endfunction
  assign outdata=shifterL(indata,val_nnnnxxx);
endmodule
 
module sll64_8bit (indata,val,outdata);
  input  [63:0] indata;
  input  [ 2:0] val; // shift 0-7
  output [63:0] outdata;
  assign outdata=indata<<val;
endmodule
 
module sll64_8_8 (indata,val,outdata);
  input  [63:0] indata;
  input  [63:0] val;
  output [63:0] outdata;
  wire   [63:0] byteout;
  wire   [63:0] sftdata;
  sll64_byte sllbyte(indata ,val[5:3], byteout);
  sll64_8bit sll8bit(byteout,val[2:0], sftdata);
// lpm_clshifa sll8bit(byteout,val[2:0],outdata); // ALTERA Megafunction

  assign outdata = (val[63:6]==58'b0) ? sftdata : 64'b0;
endmodule