io_test.py

from nmigen import *
from nmigen.build import *

import itertools

from nmigen_boards.tang_nano import TangNanoPlatform

class Blinky(Elaboratable):
    def elaborate(self, platform):
        m = Module()

        platform.add_resources([
            Resource("led_io", 0, Pins("18", invert=False),
                     Attrs(IO_TYPE="LVCMOS33")),
        ])

        io_dir = "io"
        # io_dir = "oe"
        # io_dir = "o"
        led = platform.request("led_io", 0, dir=io_dir)
        if io_dir == "io":
            m.d.comb += led.o.eq(1)
            m.d.comb += led.oe.eq(1)
        elif io_dir == "oe":
            m.d.comb += led.o.eq(1)
            m.d.comb += led.oe.eq(1)
        elif io_dir == "o":
            m.d.comb += led.o.eq(1)
            # m.d.comb += led.oe.eq(0)

        return m

if __name__ == "__main__":
    p = TangNanoPlatform()
    p.build(Blinky(), do_program=True)

top_io.v

/* Automatically generated by nMigen 0.3.dev183+g69ed491. Do not edit. */
/* Generated by Yosys 0.9+3656 (git sha1 dfeff65c, gcc 10.2.0 -march=x86-64 -mtune=generic -O2 -fstack-protector-strong -fno-plt -fPIC -Os) */

module pin_led_io_0(led_io_0__oe, led_io_0__io, led_io_0__o);
  wire \$1 ;
  wire led_io_0__i;
  inout led_io_0__io;
  input led_io_0__o;
  input led_io_0__oe;
  assign \$1  = ~ led_io_0__oe;
  IOBUF led_io_0_0 (
    .I(led_io_0__o),
    .IO(led_io_0__io),
    .O(led_io_0__i),
    .OEN(\$1 )
  );
endmodule

module top(led_io_0__io);
  inout led_io_0__io;
  wire pin_led_io_0_led_io_0__o;
  wire pin_led_io_0_led_io_0__oe;
  pin_led_io_0 pin_led_io_0 (
    .led_io_0__io(led_io_0__io),
    .led_io_0__o(pin_led_io_0_led_io_0__o),
    .led_io_0__oe(pin_led_io_0_led_io_0__oe)
  );
  assign pin_led_io_0_led_io_0__oe = 1'h1;
  assign pin_led_io_0_led_io_0__o = 1'h1;
endmodule

top_io.vg

//
//Written by GowinSynthesis
//Product Version "GowinSynthesis V1.9.7Beta"
//Mon Nov  9 16:18:06 2020

//Source file index table:
//file0 "\/home/konrad/dev/fpga-projects/gowin/nmigen/build/top.v"
`timescale 100 ps/100 ps
module pin_led_io_0 (
  \led_io_0__io\
)
;
inout \led_io_0__io\;
wire led_io_0__i;
wire VCC;
wire GND;
  IOBUF led_io_0_0 (
    .O(led_io_0__i),
    .IO(\led_io_0__io\),
    .I(VCC),
    .OEN(GND) 
);
  VCC VCC_cZ (
    .V(VCC)
);
  GND GND_cZ (
    .G(GND)
);
endmodule /* pin_led_io_0 */
module top (
  led_io_0__io
)
;
inout led_io_0__io;
wire VCC;
wire GND;
  pin_led_io_0 pin_led_io_0 (
    .\led_io_0__io\(led_io_0__io)
);
  VCC VCC_cZ (
    .V(VCC)
);
  GND GND_cZ (
    .G(GND)
);
  GSR GSR (
    .GSRI(VCC) 
);
endmodule /* top */

top_o.v

/* Automatically generated by nMigen 0.3.dev183+g69ed491. Do not edit. */
/* Generated by Yosys 0.9+3656 (git sha1 dfeff65c, gcc 10.2.0 -march=x86-64 -mtune=generic -O2 -fstack-protector-strong -fno-plt -fPIC -Os) */

module pin_led_io_0(led_io_0__io, led_io_0__o);
  output led_io_0__io;
  input led_io_0__o;
  OBUF led_io_0_0 (
    .I(led_io_0__o),
    .O(led_io_0__io)
  );
endmodule

module top(led_io_0__io);
  output led_io_0__io;
  wire pin_led_io_0_led_io_0__o;
  pin_led_io_0 pin_led_io_0 (
    .led_io_0__io(led_io_0__io),
    .led_io_0__o(pin_led_io_0_led_io_0__o)
  );
  assign pin_led_io_0_led_io_0__o = 1'h1;
endmodule

top_o.vg

//
//Written by GowinSynthesis
//Product Version "GowinSynthesis V1.9.7Beta"
//Mon Nov  9 16:17:45 2020

//Source file index table:
//file0 "\/home/konrad/dev/fpga-projects/gowin/nmigen/build/top.v"
`timescale 100 ps/100 ps
module pin_led_io_0 (
  led_io_0__io
)
;
output led_io_0__io;
wire VCC;
wire GND;
  OBUF led_io_0_0 (
    .O(led_io_0__io),
    .I(VCC) 
);
  VCC VCC_cZ (
    .V(VCC)
);
  GND GND_cZ (
    .G(GND)
);
endmodule /* pin_led_io_0 */
module top (
  led_io_0__io
)
;
output led_io_0__io;
wire VCC;
wire GND;
  pin_led_io_0 pin_led_io_0 (
    .led_io_0__io(led_io_0__io)
);
  VCC VCC_cZ (
    .V(VCC)
);
  GND GND_cZ (
    .G(GND)
);
  GSR GSR (
    .GSRI(VCC) 
);
endmodule /* top */

top_oe.v

/* Automatically generated by nMigen 0.3.dev183+g69ed491. Do not edit. */
/* Generated by Yosys 0.9+3656 (git sha1 dfeff65c, gcc 10.2.0 -march=x86-64 -mtune=generic -O2 -fstack-protector-strong -fno-plt -fPIC -Os) */

module pin_led_io_0(led_io_0__oe, led_io_0__io, led_io_0__o);
  wire \$1 ;
  output led_io_0__io;
  input led_io_0__o;
  input led_io_0__oe;
  assign \$1  = ~ led_io_0__oe;
  TBUF led_io_0_0 (
    .I(led_io_0__o),
    .O(led_io_0__io),
    .OEN(\$1 )
  );
endmodule

module top(led_io_0__io);
  output led_io_0__io;
  wire pin_led_io_0_led_io_0__o;
  wire pin_led_io_0_led_io_0__oe;
  pin_led_io_0 pin_led_io_0 (
    .led_io_0__io(led_io_0__io),
    .led_io_0__o(pin_led_io_0_led_io_0__o),
    .led_io_0__oe(pin_led_io_0_led_io_0__oe)
  );
  assign pin_led_io_0_led_io_0__oe = 1'h1;
  assign pin_led_io_0_led_io_0__o = 1'h1;
endmodule

top_oe.vg

//
//Written by GowinSynthesis
//Product Version "GowinSynthesis V1.9.7Beta"
//Mon Nov  9 16:17:58 2020

//Source file index table:
//file0 "\/home/konrad/dev/fpga-projects/gowin/nmigen/build/top.v"
`timescale 100 ps/100 ps
module pin_led_io_0 (
  led_io_0__io
)
;
output led_io_0__io;
wire VCC;
wire GND;
  TBUF led_io_0_0 (
    .O(led_io_0__io),
    .I(VCC),
    .OEN(GND) 
);
  VCC VCC_cZ (
    .V(VCC)
);
  GND GND_cZ (
    .G(GND)
);
endmodule /* pin_led_io_0 */
module top (
  led_io_0__io
)
;
output led_io_0__io;
wire VCC;
wire GND;
  pin_led_io_0 pin_led_io_0 (
    .led_io_0__io(led_io_0__io)
);
  VCC VCC_cZ (
    .V(VCC)
);
  GND GND_cZ (
    .G(GND)
);
  GSR GSR (
    .GSRI(VCC) 
);
endmodule /* top */