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lspci -vv and dmesg
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$ dmesg | |
Copyright (c) 1992-2014 The FreeBSD Project. | |
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 | |
The Regents of the University of California. All rights reserved. | |
FreeBSD is a registered trademark of The FreeBSD Foundation. | |
FreeBSD 10.0-RELEASE #0 r260789: Thu Jan 16 22:34:59 UTC 2014 | |
root@snap.freebsd.org:/usr/obj/usr/src/sys/GENERIC amd64 | |
FreeBSD clang version 3.3 (tags/RELEASE_33/final 183502) 20130610 | |
CPU: Intel(R) Xeon(R) CPU L5639 @ 2.13GHz (2133.45-MHz K8-class CPU) | |
Origin = "GenuineIntel" Id = 0x206c2 Family = 0x6 Model = 0x2c Stepping = 2 | |
Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE> | |
Features2=0x29ee3ff<SSE3,PCLMULQDQ,DTES64,MON,DS_CPL,VMX,SMX,EST,TM2,SSSE3,CX16,xTPR,PDCM,PCID,DCA,SSE4.1,SSE4.2,POPCNT,AESNI> | |
AMD Features=0x2c100800<SYSCALL,NX,Page1GB,RDTSCP,LM> | |
AMD Features2=0x1<LAHF> | |
TSC: P-state invariant, performance statistics | |
real memory = 51539607552 (49152 MB) | |
avail memory = 49993539584 (47677 MB) | |
Event timer "LAPIC" quality 600 | |
ACPI APIC Table: <091713 APIC2129> | |
FreeBSD/SMP: Multiprocessor System Detected: 24 CPUs | |
FreeBSD/SMP: 2 package(s) x 6 core(s) x 2 SMT threads | |
cpu0 (BSP): APIC ID: 0 | |
cpu1 (AP): APIC ID: 1 | |
cpu2 (AP): APIC ID: 2 | |
cpu3 (AP): APIC ID: 3 | |
cpu4 (AP): APIC ID: 4 | |
cpu5 (AP): APIC ID: 5 | |
cpu6 (AP): APIC ID: 16 | |
cpu7 (AP): APIC ID: 17 | |
cpu8 (AP): APIC ID: 18 | |
cpu9 (AP): APIC ID: 19 | |
cpu10 (AP): APIC ID: 20 | |
cpu11 (AP): APIC ID: 21 | |
cpu12 (AP): APIC ID: 32 | |
cpu13 (AP): APIC ID: 33 | |
cpu14 (AP): APIC ID: 34 | |
cpu15 (AP): APIC ID: 35 | |
cpu16 (AP): APIC ID: 36 | |
cpu17 (AP): APIC ID: 37 | |
cpu18 (AP): APIC ID: 48 | |
cpu19 (AP): APIC ID: 49 | |
cpu20 (AP): APIC ID: 50 | |
cpu21 (AP): APIC ID: 51 | |
cpu22 (AP): APIC ID: 52 | |
cpu23 (AP): APIC ID: 53 | |
ioapic1: Changing APIC ID to 7 | |
ioapic0 <Version 2.0> irqs 0-23 on motherboard | |
ioapic1 <Version 2.0> irqs 24-47 on motherboard | |
random: <Software, Yarrow> initialized | |
module_register_init: MOD_LOAD (vesa, 0xffffffff80cfa5e0, 0) error 19 | |
kbd1 at kbdmux0 | |
acpi0: <091713 XSDT2129> on motherboard | |
acpi0: Power Button (fixed) | |
acpi0: reservation of 0, a0000 (3) failed | |
acpi0: reservation of 100000, bff00000 (3) failed | |
cpu0: <ACPI CPU> on acpi0 | |
cpu1: <ACPI CPU> on acpi0 | |
cpu2: <ACPI CPU> on acpi0 | |
cpu3: <ACPI CPU> on acpi0 | |
cpu4: <ACPI CPU> on acpi0 | |
cpu5: <ACPI CPU> on acpi0 | |
cpu6: <ACPI CPU> on acpi0 | |
cpu7: <ACPI CPU> on acpi0 | |
cpu8: <ACPI CPU> on acpi0 | |
cpu9: <ACPI CPU> on acpi0 | |
cpu10: <ACPI CPU> on acpi0 | |
cpu11: <ACPI CPU> on acpi0 | |
cpu12: <ACPI CPU> on acpi0 | |
cpu13: <ACPI CPU> on acpi0 | |
cpu14: <ACPI CPU> on acpi0 | |
cpu15: <ACPI CPU> on acpi0 | |
cpu16: <ACPI CPU> on acpi0 | |
cpu17: <ACPI CPU> on acpi0 | |
cpu18: <ACPI CPU> on acpi0 | |
cpu19: <ACPI CPU> on acpi0 | |
cpu20: <ACPI CPU> on acpi0 | |
cpu21: <ACPI CPU> on acpi0 | |
cpu22: <ACPI CPU> on acpi0 | |
cpu23: <ACPI CPU> on acpi0 | |
attimer0: <AT timer> port 0x40-0x43 irq 0 on acpi0 | |
Timecounter "i8254" frequency 1193182 Hz quality 0 | |
Event timer "i8254" frequency 1193182 Hz quality 100 | |
atrtc0: <AT realtime clock> port 0x70-0x71 irq 8 on acpi0 | |
Event timer "RTC" frequency 32768 Hz quality 0 | |
hpet0: <High Precision Event Timer> iomem 0xfed00000-0xfed003ff on acpi0 | |
Timecounter "HPET" frequency 14318180 Hz quality 950 | |
Event timer "HPET" frequency 14318180 Hz quality 350 | |
Event timer "HPET1" frequency 14318180 Hz quality 340 | |
Event timer "HPET2" frequency 14318180 Hz quality 340 | |
Event timer "HPET3" frequency 14318180 Hz quality 340 | |
Timecounter "ACPI-fast" frequency 3579545 Hz quality 900 | |
acpi_timer0: <24-bit timer at 3.579545MHz> port 0x808-0x80b on acpi0 | |
pcib0: <ACPI Host-PCI bridge> port 0xcf8-0xcff on acpi0 | |
pci0: <ACPI PCI bus> on pcib0 | |
pcib1: <ACPI PCI-PCI bridge> at device 1.0 on pci0 | |
pci1: <ACPI PCI bus> on pcib1 | |
igb0: <Intel(R) PRO/1000 Network Connection version - 2.4.0> port 0xbc00-0xbc1f mem 0xfb9e0000-0xfb9fffff,0xfb9c0000-0xfb9dffff,0xfb99c000-0xfb99ffff irq 17 at device 0.0 on pci1 | |
igb0: Using MSIX interrupts with 9 vectors | |
igb0: Ethernet address: 00:a0:d1:ee:ed:44 | |
igb0: Bound queue 0 to cpu 0 | |
igb0: Bound queue 1 to cpu 1 | |
igb0: Bound queue 2 to cpu 2 | |
igb0: Bound queue 3 to cpu 3 | |
igb0: Bound queue 4 to cpu 4 | |
igb0: Bound queue 5 to cpu 5 | |
igb0: Bound queue 6 to cpu 6 | |
igb0: Bound queue 7 to cpu 7 | |
igb1: <Intel(R) PRO/1000 Network Connection version - 2.4.0> port 0xb880-0xb89f mem 0xfb960000-0xfb97ffff,0xfb940000-0xfb95ffff,0xfb91c000-0xfb91ffff irq 16 at device 0.1 on pci1 | |
igb1: Using MSIX interrupts with 9 vectors | |
igb1: Ethernet address: 00:a0:d1:ee:ed:45 | |
igb1: Bound queue 0 to cpu 8 | |
igb1: Bound queue 1 to cpu 9 | |
igb1: Bound queue 2 to cpu 10 | |
igb1: Bound queue 3 to cpu 11 | |
igb1: Bound queue 4 to cpu 12 | |
igb1: Bound queue 5 to cpu 13 | |
igb1: Bound queue 6 to cpu 14 | |
igb1: Bound queue 7 to cpu 15 | |
pcib2: <ACPI PCI-PCI bridge> at device 3.0 on pci0 | |
pci2: <ACPI PCI bus> on pcib2 | |
mps0: <LSI SAS2008> port 0xc000-0xc0ff mem 0xfba3c000-0xfba3ffff,0xfba40000-0xfba7ffff irq 24 at device 0.0 on pci2 | |
mps0: Firmware: 16.00.00.00, Driver: 16.00.00.00-fbsd | |
mps0: IOCCapabilities: 185c<ScsiTaskFull,DiagTrace,SnapBuf,EEDP,TransRetry,IR> | |
pcib3: <ACPI PCI-PCI bridge> at device 5.0 on pci0 | |
pci3: <ACPI PCI bus> on pcib3 | |
pcib4: <ACPI PCI-PCI bridge> at device 7.0 on pci0 | |
pci4: <ACPI PCI bus> on pcib4 | |
ix0: <Intel(R) PRO/10GbE PCI-Express Network Driver, Version - 2.5.15> port 0xdc00-0xdc1f mem 0xfbd80000-0xfbdfffff,0xfbcfc000-0xfbcfffff irq 16 at device 0.0 on pci4 | |
ix0: Using MSIX interrupts with 9 vectors | |
ix0: Ethernet address: a0:36:9f:24:72:ac | |
ix0: PCI Express Bus: Speed 5.0GT/s Width x8 | |
ix1: <Intel(R) PRO/10GbE PCI-Express Network Driver, Version - 2.5.15> port 0xd880-0xd89f mem 0xfbc00000-0xfbc7ffff,0xfbb7c000-0xfbb7ffff irq 17 at device 0.1 on pci4 | |
ix1: Using MSIX interrupts with 9 vectors | |
ix1: Ethernet address: a0:36:9f:24:72:ae | |
ix1: PCI Express Bus: Speed 5.0GT/s Width x8 | |
pci0: <base peripheral, interrupt controller> at device 20.0 (no driver attached) | |
pci0: <base peripheral, interrupt controller> at device 20.1 (no driver attached) | |
pci0: <base peripheral, interrupt controller> at device 20.2 (no driver attached) | |
pci0: <base peripheral, interrupt controller> at device 20.3 (no driver attached) | |
pci0: <base peripheral> at device 22.0 (no driver attached) | |
pci0: <base peripheral> at device 22.1 (no driver attached) | |
pci0: <base peripheral> at device 22.2 (no driver attached) | |
pci0: <base peripheral> at device 22.3 (no driver attached) | |
pci0: <base peripheral> at device 22.4 (no driver attached) | |
pci0: <base peripheral> at device 22.5 (no driver attached) | |
pci0: <base peripheral> at device 22.6 (no driver attached) | |
pci0: <base peripheral> at device 22.7 (no driver attached) | |
uhci0: <Intel 82801JI (ICH10) USB controller USB-A> port 0xac00-0xac1f irq 23 at device 29.0 on pci0 | |
uhci0: LegSup = 0x2400 | |
usbus0 on uhci0 | |
uhci1: <Intel 82801JI (ICH10) USB controller USB-B> port 0xa880-0xa89f irq 19 at device 29.1 on pci0 | |
uhci1: LegSup = 0x2400 | |
usbus1 on uhci1 | |
uhci2: <Intel 82801JI (ICH10) USB controller USB-C> port 0xa800-0xa81f irq 18 at device 29.2 on pci0 | |
uhci2: LegSup = 0x2400 | |
usbus2 on uhci2 | |
ehci0: <Intel 82801JI (ICH10) USB 2.0 controller USB-A> mem 0xfbeda000-0xfbeda3ff irq 23 at device 29.7 on pci0 | |
usbus3: EHCI version 1.0 | |
usbus3 on ehci0 | |
pcib5: <ACPI PCI-PCI bridge> at device 30.0 on pci0 | |
pci5: <ACPI PCI bus> on pcib5 | |
vgapci0: <VGA-compatible display> port 0xec00-0xec7f mem 0xfb000000-0xfb7fffff,0xfafe0000-0xfaffffff irq 16 at device 4.0 on pci5 | |
vgapci0: Boot video device | |
isab0: <PCI-ISA bridge> at device 31.0 on pci0 | |
isa0: <ISA bus> on isab0 | |
ahci0: <Intel ICH10 AHCI SATA controller> port 0x9c00-0x9c07,0xa480-0xa483,0xa400-0xa407,0xa080-0xa083,0xa000-0xa01f mem 0xfbed8000-0xfbed87ff irq 19 at device 31.2 on pci0 | |
ahci0: AHCI v1.20 with 6 3Gbps ports, Port Multiplier not supported | |
ahcich0: <AHCI channel> at channel 0 on ahci0 | |
ahcich1: <AHCI channel> at channel 1 on ahci0 | |
ahcich2: <AHCI channel> at channel 2 on ahci0 | |
ahcich3: <AHCI channel> at channel 3 on ahci0 | |
ahcich4: <AHCI channel> at channel 4 on ahci0 | |
ahcich5: <AHCI channel> at channel 5 on ahci0 | |
ahciem0: <AHCI enclosure management bridge> on ahci0 | |
pci0: <serial bus, SMBus> at device 31.3 (no driver attached) | |
acpi_button0: <Power Button> on acpi0 | |
qpi0: <QPI system bus> on motherboard | |
pcib6: <QPI Host-PCI bridge> pcibus 255 on qpi0 | |
pci255: <PCI bus> on pcib6 | |
pcib7: <QPI Host-PCI bridge> pcibus 254 on qpi0 | |
pci254: <PCI bus> on pcib7 | |
orm0: <ISA Option ROM> at iomem 0xc0000-0xc7fff on isa0 | |
sc0: <System console> at flags 0x100 on isa0 | |
sc0: CGA <16 virtual consoles, flags=0x300> | |
vga0: <Generic ISA VGA> at port 0x3d0-0x3db iomem 0xb8000-0xbffff on isa0 | |
ppc0: cannot reserve I/O port range | |
uart0: <16550 or compatible> at port 0x3f8-0x3ff irq 4 flags 0x10 on isa0 | |
uart1: <Non-standard ns8250 class UART with FIFOs> at port 0x2f8-0x2ff irq 3 on isa0 | |
est0: <Enhanced SpeedStep Frequency Control> on cpu0 | |
p4tcc0: <CPU Frequency Thermal Control> on cpu0 | |
est1: <Enhanced SpeedStep Frequency Control> on cpu1 | |
p4tcc1: <CPU Frequency Thermal Control> on cpu1 | |
est2: <Enhanced SpeedStep Frequency Control> on cpu2 | |
p4tcc2: <CPU Frequency Thermal Control> on cpu2 | |
est3: <Enhanced SpeedStep Frequency Control> on cpu3 | |
p4tcc3: <CPU Frequency Thermal Control> on cpu3 | |
est4: <Enhanced SpeedStep Frequency Control> on cpu4 | |
p4tcc4: <CPU Frequency Thermal Control> on cpu4 | |
est5: <Enhanced SpeedStep Frequency Control> on cpu5 | |
p4tcc5: <CPU Frequency Thermal Control> on cpu5 | |
est6: <Enhanced SpeedStep Frequency Control> on cpu6 | |
p4tcc6: <CPU Frequency Thermal Control> on cpu6 | |
est7: <Enhanced SpeedStep Frequency Control> on cpu7 | |
p4tcc7: <CPU Frequency Thermal Control> on cpu7 | |
est8: <Enhanced SpeedStep Frequency Control> on cpu8 | |
p4tcc8: <CPU Frequency Thermal Control> on cpu8 | |
est9: <Enhanced SpeedStep Frequency Control> on cpu9 | |
p4tcc9: <CPU Frequency Thermal Control> on cpu9 | |
est10: <Enhanced SpeedStep Frequency Control> on cpu10 | |
p4tcc10: <CPU Frequency Thermal Control> on cpu10 | |
est11: <Enhanced SpeedStep Frequency Control> on cpu11 | |
p4tcc11: <CPU Frequency Thermal Control> on cpu11 | |
est12: <Enhanced SpeedStep Frequency Control> on cpu12 | |
p4tcc12: <CPU Frequency Thermal Control> on cpu12 | |
est13: <Enhanced SpeedStep Frequency Control> on cpu13 | |
p4tcc13: <CPU Frequency Thermal Control> on cpu13 | |
est14: <Enhanced SpeedStep Frequency Control> on cpu14 | |
p4tcc14: <CPU Frequency Thermal Control> on cpu14 | |
est15: <Enhanced SpeedStep Frequency Control> on cpu15 | |
p4tcc15: <CPU Frequency Thermal Control> on cpu15 | |
est16: <Enhanced SpeedStep Frequency Control> on cpu16 | |
p4tcc16: <CPU Frequency Thermal Control> on cpu16 | |
est17: <Enhanced SpeedStep Frequency Control> on cpu17 | |
p4tcc17: <CPU Frequency Thermal Control> on cpu17 | |
est18: <Enhanced SpeedStep Frequency Control> on cpu18 | |
p4tcc18: <CPU Frequency Thermal Control> on cpu18 | |
est19: <Enhanced SpeedStep Frequency Control> on cpu19 | |
p4tcc19: <CPU Frequency Thermal Control> on cpu19 | |
est20: <Enhanced SpeedStep Frequency Control> on cpu20 | |
p4tcc20: <CPU Frequency Thermal Control> on cpu20 | |
est21: <Enhanced SpeedStep Frequency Control> on cpu21 | |
p4tcc21: <CPU Frequency Thermal Control> on cpu21 | |
est22: <Enhanced SpeedStep Frequency Control> on cpu22 | |
p4tcc22: <CPU Frequency Thermal Control> on cpu22 | |
est23: <Enhanced SpeedStep Frequency Control> on cpu23 | |
p4tcc23: <CPU Frequency Thermal Control> on cpu23 | |
ZFS filesystem version: 5 | |
ZFS storage pool version: features support (5000) | |
Timecounters tick every 1.000 msec | |
random: unblocking device. | |
usbus0: 12Mbps Full Speed USB v1.0 | |
usbus1: 12Mbps Full Speed USB v1.0 | |
usbus2: 12Mbps Full Speed USB v1.0 | |
usbus3: 480Mbps High Speed USB v2.0 | |
ugen0.1: <Intel> at usbus0 | |
uhub0: <Intel UHCI root HUB, class 9/0, rev 1.00/1.00, addr 1> on usbus0 | |
ugen2.1: <Intel> at usbus2 | |
uhub1: <Intel UHCI root HUB, class 9/0, rev 1.00/1.00, addr 1> on usbus2 | |
ugen1.1: <Intel> at usbus1 | |
uhub2: <Intel UHCI root HUB, class 9/0, rev 1.00/1.00, addr 1> on usbus1 | |
ugen3.1: <Intel> at usbus3 | |
uhub3: <Intel EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus3 | |
uhub0: 2 ports with 2 removable, self powered | |
uhub2: 2 ports with 2 removable, self powered | |
uhub1: 2 ports with 2 removable, self powered | |
uhub3: 6 ports with 6 removable, self powered | |
ugen3.2: <American Megatrends Inc.> at usbus3 | |
uhub4: <Hub Interface> on usbus3 | |
uhub4: 3 ports with 3 removable, self powered | |
ugen3.3: <American Megatrends Inc.> at usbus3 | |
ukbd0: <Keyboard Interface> on usbus3 | |
kbd0 at ukbd0 | |
ses0 at ahciem0 bus 0 scbus7 target 0 lun 0 | |
ses0: <AHCI SGPIO Enclosure 1.00 0001> SEMB S-E-S 2.00 device | |
ses0: SEMB SES Device | |
da2 at mps0 bus 0 scbus0 target 5 lun 0 | |
da2: <ATA PLEXTOR PX-128M5 1.05> Fixed Direct Access SCSI-6 device | |
da2: Serial Number P02332102761 | |
da2: 600.000MB/s transfers | |
da2: Command Queueing enabled | |
da2: 122104MB (250069680 512 byte sectors: 255H 63S/T 15566C) | |
da0 at mps0 bus 0 scbus0 target 3 lun 0 | |
da0: <ATA WDC WD4000F9YZ-0 1A01> Fixed Direct Access SCSI-6 device | |
da0: Serial Number WD-WCC131013836 | |
da0: 600.000MB/s transfers | |
da0: Command Queueing enabled | |
da0: 3815447MB (7814037168 512 byte sectors: 255H 63S/T 486401C) | |
da1 at mps0 bus 0 scbus0 target 4 lun 0 | |
da1: <ATA WDC WD4000F9YZ-0 1A01> Fixed Direct Access SCSI-6 device | |
da1: Serial Number WD-WCC131032402 | |
da1: 600.000MB/s transfers | |
da1: Command Queueing enabled | |
da1: 3815447MB (7814037168 512 byte sectors: 255H 63S/T 486401C) | |
Netvsc initializing... SMP: AP CPU #1 Launched! | |
SMP: AP CPU #20 Launched! | |
SMP: AP CPU #11 Launched! | |
SMP: AP CPU #22 Launched! | |
SMP: AP CPU #10 Launched! | |
SMP: AP CPU #16 Launched! | |
SMP: AP CPU #9 Launched! | |
SMP: AP CPU #21 Launched! | |
SMP: AP CPU #7 Launched! | |
SMP: AP CPU #23 Launched! | |
SMP: AP CPU #6 Launched! | |
SMP: AP CPU #13 Launched! | |
SMP: AP CPU #12 Launched! | |
SMP: AP CPU #3 Launched! | |
SMP: AP CPU #17 Launched! | |
SMP: AP CPU #5 Launched! | |
SMP: AP CPU #18 Launched! | |
SMP: AP CPU #8 Launched! | |
SMP: AP CPU #14 Launched! | |
SMP: AP CPU #2 Launched! | |
SMP: AP CPU #19 Launched! | |
SMP: AP CPU #4 Launched! | |
SMP: AP CPU #15 Launched! | |
Timecounter "TSC" frequency 2133454700 Hz quality 1000 | |
Trying to mount root from zfs:zroot/ROOT/default []... | |
ums0: <Mouse Interface> on usbus3 | |
ums0: 3 buttons and [Z] coordinates ID=0 | |
ix0: link state changed to DOWN | |
ix0: link state changed to UP | |
ix0: link state changed to DOWN | |
ix0: link state changed to UP | |
ix1: link state changed to UP | |
ix1: link state changed to DOWN | |
ix1: link state changed to UP | |
... Truncated. Lots more of this. |
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Learn more about bidirectional Unicode characters
root@s001:~ # lspci -vv | |
00:00.0 Host bridge: Intel Corporation 5520 I/O Hub to ESI Port (rev 13) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Interrupt: pin ? routed to IRQ 255 | |
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit- | |
Address: 00000000 Data: 0000 | |
Masking: 00000000 Pending: 00000000 | |
Capabilities: [90] Express (v2) Root Port (Slot-), MSI 00 | |
DevCap: MaxPayload 128 bytes, PhantFunc 0 | |
ExtTag+ RBE+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
LnkCap: Port #0, Speed 2.5GT/s, Width x4, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us | |
ClockPM- Surprise+ LLActRep+ BwNot+ | |
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- | |
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- | |
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- | |
RootCap: CRSVisible- | |
RootSta: PME ReqID 0000, PMEStatus- PMEPending- | |
DevCap2: Completion Timeout: Range BCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd+ | |
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd- | |
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis- | |
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
Compliance De-emphasis: -6dB | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
Capabilities: [e0] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
00:01.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 1 (rev 13) (prog-if 00 [Normal decode]) | |
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 | |
I/O behind bridge: 0000b000-0000bfff | |
Memory behind bridge: fb900000-fb9fffff | |
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- | |
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- | |
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- | |
Capabilities: [40] Subsystem: Inventec Corporation Device 0047 | |
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit- | |
Address: 00000000 Data: 0000 | |
Masking: 00000000 Pending: 00000000 | |
Capabilities: [90] Express (v2) Root Port (Slot+), MSI 00 | |
DevCap: MaxPayload 256 bytes, PhantFunc 0 | |
ExtTag+ RBE+ | |
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
LnkCap: Port #0, Speed 5GT/s, Width x4, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us | |
ClockPM- Surprise+ LLActRep+ BwNot+ | |
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- | |
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- | |
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise- | |
Slot #0, PowerLimit 0.000W; Interlock- NoCompl- | |
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- | |
Control: AttnInd Off, PwrInd Off, Power- Interlock- | |
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- | |
Changed: MRL- PresDet+ LinkState+ | |
RootCtl: ErrCorrectable+ ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible- | |
RootCap: CRSVisible- | |
RootSta: PME ReqID 0000, PMEStatus- PMEPending- | |
DevCap2: Completion Timeout: Range BCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd+ | |
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd- | |
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- | |
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
Compliance De-emphasis: -6dB | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
Capabilities: [e0] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
00:03.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 3 (rev 13) (prog-if 00 [Normal decode]) | |
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 | |
I/O behind bridge: 0000c000-0000cfff | |
Memory behind bridge: fba00000-fbafffff | |
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- | |
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- | |
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- | |
Capabilities: [40] Subsystem: Inventec Corporation Device 0047 | |
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit- | |
Address: 00000000 Data: 0000 | |
Masking: 00000000 Pending: 00000000 | |
Capabilities: [90] Express (v2) Root Port (Slot+), MSI 00 | |
DevCap: MaxPayload 256 bytes, PhantFunc 0 | |
ExtTag+ RBE+ | |
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us | |
ClockPM- Surprise+ LLActRep+ BwNot+ | |
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- | |
LnkSta: Speed 5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- | |
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise- | |
Slot #0, PowerLimit 0.000W; Interlock- NoCompl- | |
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- | |
Control: AttnInd Off, PwrInd Off, Power- Interlock- | |
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- | |
Changed: MRL- PresDet+ LinkState+ | |
RootCtl: ErrCorrectable+ ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible- | |
RootCap: CRSVisible- | |
RootSta: PME ReqID 0000, PMEStatus- PMEPending- | |
DevCap2: Completion Timeout: Range BCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd+ | |
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd- | |
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- | |
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
Compliance De-emphasis: -6dB | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
Capabilities: [e0] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
00:05.0 PCI bridge: Intel Corporation 5520/X58 I/O Hub PCI Express Root Port 5 (rev 13) (prog-if 00 [Normal decode]) | |
Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 | |
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- | |
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- | |
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- | |
Capabilities: [40] Subsystem: Inventec Corporation Device 0047 | |
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit- | |
Address: 00000000 Data: 0000 | |
Masking: 00000000 Pending: 00000000 | |
Capabilities: [90] Express (v2) Root Port (Slot+), MSI 00 | |
DevCap: MaxPayload 256 bytes, PhantFunc 0 | |
ExtTag+ RBE+ | |
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us | |
ClockPM- Surprise+ LLActRep+ BwNot+ | |
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- | |
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- | |
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise- | |
Slot #53, PowerLimit 25.000W; Interlock- NoCompl- | |
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- | |
Control: AttnInd Off, PwrInd Off, Power- Interlock- | |
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- | |
Changed: MRL- PresDet+ LinkState- | |
RootCtl: ErrCorrectable+ ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible- | |
RootCap: CRSVisible- | |
RootSta: PME ReqID 0000, PMEStatus- PMEPending- | |
DevCap2: Completion Timeout: Range BCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd+ | |
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd- | |
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- | |
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
Compliance De-emphasis: -6dB | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
Capabilities: [e0] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
00:07.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 7 (rev 13) (prog-if 00 [Normal decode]) | |
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 | |
I/O behind bridge: 0000d000-0000dfff | |
Memory behind bridge: fbb00000-fbdfffff | |
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- | |
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- | |
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- | |
Capabilities: [40] Subsystem: Inventec Corporation Device 0047 | |
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit- | |
Address: 00000000 Data: 0000 | |
Masking: 00000000 Pending: 00000000 | |
Capabilities: [90] Express (v2) Root Port (Slot+), MSI 00 | |
DevCap: MaxPayload 256 bytes, PhantFunc 0 | |
ExtTag+ RBE+ | |
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us | |
ClockPM- Surprise+ LLActRep+ BwNot+ | |
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- | |
LnkSta: Speed 5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- | |
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise- | |
Slot #55, PowerLimit 25.000W; Interlock- NoCompl- | |
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- | |
Control: AttnInd Off, PwrInd Off, Power- Interlock- | |
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- | |
Changed: MRL- PresDet+ LinkState+ | |
RootCtl: ErrCorrectable+ ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible- | |
RootCap: CRSVisible- | |
RootSta: PME ReqID 0000, PMEStatus- PMEPending- | |
DevCap2: Completion Timeout: Range BCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd+ | |
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd- | |
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- | |
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
Compliance De-emphasis: -6dB | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
Capabilities: [e0] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
00:13.0 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub I/OxAPIC Interrupt Controller (rev 13) (prog-if 20 [IO(X)-APIC]) | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0 | |
Region 0: Memory at fec8a000 (32-bit, non-prefetchable) | |
Capabilities: [6c] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) | |
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- | |
00:14.0 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub System Management Registers (rev 13) (prog-if 00 [8259]) | |
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00 | |
DevCap: MaxPayload 128 bytes, PhantFunc 0 | |
ExtTag- RBE+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
00:14.1 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub GPIO and Scratch Pad Registers (rev 13) (prog-if 00 [8259]) | |
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00 | |
DevCap: MaxPayload 128 bytes, PhantFunc 0 | |
ExtTag- RBE+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
00:14.2 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub Control Status and RAS Registers (rev 13) (prog-if 00 [8259]) | |
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00 | |
DevCap: MaxPayload 128 bytes, PhantFunc 0 | |
ExtTag- RBE+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
00:14.3 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub Throttle Registers (rev 13) (prog-if 00 [8259]) | |
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
00:16.0 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Interrupt: pin A routed to IRQ 43 | |
Region 0: Memory at fbef8000 (64-bit, non-prefetchable) | |
Capabilities: [80] MSI-X: Enable- Count=1 Masked- | |
Vector table: BAR=0 offset=00002000 | |
PBA: BAR=0 offset=00003000 | |
Capabilities: [90] Express (v2) Root Complex Integrated Endpoint, MSI 00 | |
DevCap: MaxPayload 128 bytes, PhantFunc 0 | |
ExtTag- RBE+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
Capabilities: [e0] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
00:16.1 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Interrupt: pin B routed to IRQ 44 | |
Region 0: Memory at fbef4000 (64-bit, non-prefetchable) | |
Capabilities: [80] MSI-X: Enable- Count=1 Masked- | |
Vector table: BAR=0 offset=00002000 | |
PBA: BAR=0 offset=00003000 | |
Capabilities: [90] Express (v2) Root Complex Integrated Endpoint, MSI 00 | |
DevCap: MaxPayload 128 bytes, PhantFunc 0 | |
ExtTag- RBE+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
Capabilities: [e0] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
00:16.2 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Interrupt: pin C routed to IRQ 45 | |
Region 0: Memory at fbef0000 (64-bit, non-prefetchable) | |
Capabilities: [80] MSI-X: Enable- Count=1 Masked- | |
Vector table: BAR=0 offset=00002000 | |
PBA: BAR=0 offset=00003000 | |
Capabilities: [90] Express (v2) Root Complex Integrated Endpoint, MSI 00 | |
DevCap: MaxPayload 128 bytes, PhantFunc 0 | |
ExtTag- RBE+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
Capabilities: [e0] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
00:16.3 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Interrupt: pin D routed to IRQ 46 | |
Region 0: Memory at fbeec000 (64-bit, non-prefetchable) | |
Capabilities: [80] MSI-X: Enable- Count=1 Masked- | |
Vector table: BAR=0 offset=00002000 | |
PBA: BAR=0 offset=00003000 | |
Capabilities: [90] Express (v2) Root Complex Integrated Endpoint, MSI 00 | |
DevCap: MaxPayload 128 bytes, PhantFunc 0 | |
ExtTag- RBE+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
Capabilities: [e0] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
00:16.4 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Interrupt: pin A routed to IRQ 43 | |
Region 0: Memory at fbee8000 (64-bit, non-prefetchable) | |
Capabilities: [80] MSI-X: Enable- Count=1 Masked- | |
Vector table: BAR=0 offset=00002000 | |
PBA: BAR=0 offset=00003000 | |
Capabilities: [90] Express (v2) Root Complex Integrated Endpoint, MSI 00 | |
DevCap: MaxPayload 128 bytes, PhantFunc 0 | |
ExtTag- RBE+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
Capabilities: [e0] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
00:16.5 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Interrupt: pin B routed to IRQ 44 | |
Region 0: Memory at fbee4000 (64-bit, non-prefetchable) | |
Capabilities: [80] MSI-X: Enable- Count=1 Masked- | |
Vector table: BAR=0 offset=00002000 | |
PBA: BAR=0 offset=00003000 | |
Capabilities: [90] Express (v2) Root Complex Integrated Endpoint, MSI 00 | |
DevCap: MaxPayload 128 bytes, PhantFunc 0 | |
ExtTag- RBE+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
Capabilities: [e0] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
00:16.6 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Interrupt: pin C routed to IRQ 45 | |
Region 0: Memory at fbee0000 (64-bit, non-prefetchable) | |
Capabilities: [80] MSI-X: Enable- Count=1 Masked- | |
Vector table: BAR=0 offset=00002000 | |
PBA: BAR=0 offset=00003000 | |
Capabilities: [90] Express (v2) Root Complex Integrated Endpoint, MSI 00 | |
DevCap: MaxPayload 128 bytes, PhantFunc 0 | |
ExtTag- RBE+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
Capabilities: [e0] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
00:16.7 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Interrupt: pin D routed to IRQ 46 | |
Region 0: Memory at fbedc000 (64-bit, non-prefetchable) | |
Capabilities: [80] MSI-X: Enable- Count=1 Masked- | |
Vector table: BAR=0 offset=00002000 | |
PBA: BAR=0 offset=00003000 | |
Capabilities: [90] Express (v2) Root Complex Integrated Endpoint, MSI 00 | |
DevCap: MaxPayload 128 bytes, PhantFunc 0 | |
ExtTag- RBE+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- | |
MaxPayload 128 bytes, MaxReadReq 128 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
Capabilities: [e0] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
00:1d.0 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #1 (prog-if 00 [UHCI]) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0 | |
Interrupt: pin A routed to IRQ 23 | |
Region 4: I/O ports at ac00 | |
Capabilities: [50] PCI Advanced Features | |
AFCap: TP+ FLR+ | |
AFCtrl: FLR- | |
AFStatus: TP- | |
00:1d.1 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #2 (prog-if 00 [UHCI]) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0 | |
Interrupt: pin B routed to IRQ 19 | |
Region 4: I/O ports at a880 | |
Capabilities: [50] PCI Advanced Features | |
AFCap: TP+ FLR+ | |
AFCtrl: FLR- | |
AFStatus: TP- | |
00:1d.2 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #3 (prog-if 00 [UHCI]) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0 | |
Interrupt: pin C routed to IRQ 18 | |
Region 4: I/O ports at a800 | |
Capabilities: [50] PCI Advanced Features | |
AFCap: TP+ FLR+ | |
AFCtrl: FLR- | |
AFStatus: TP- | |
00:1d.7 USB controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1 (prog-if 20 [EHCI]) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0 | |
Interrupt: pin A routed to IRQ 23 | |
Region 0: Memory at fbeda000 (32-bit, non-prefetchable) | |
Capabilities: [50] Power Management version 2 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) | |
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- | |
Capabilities: [58] Debug port: BAR=1 offset=00a0 | |
Capabilities: [98] PCI Advanced Features | |
AFCap: TP+ FLR+ | |
AFCtrl: FLR- | |
AFStatus: TP- | |
00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev 90) (prog-if 01 [Subtractive decode]) | |
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0 | |
Bus: primary=00, secondary=05, subordinate=05, sec-latency=32 | |
I/O behind bridge: 0000e000-0000efff | |
Memory behind bridge: faf00000-fb7fffff | |
Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- | |
BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B- | |
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- | |
Capabilities: [50] Subsystem: Inventec Corporation Device 0047 | |
00:1f.0 ISA bridge: Intel Corporation 82801JIR (ICH10R) LPC Interface Controller | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0 | |
Capabilities: [e0] Vendor Specific Information: Len=0c <?> | |
00:1f.2 SATA controller: Intel Corporation 82801JI (ICH10 Family) SATA AHCI Controller (prog-if 01 [AHCI 1.0]) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ | |
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0 | |
Interrupt: pin B routed to IRQ 19 | |
Region 0: I/O ports at 9c00 | |
Region 1: I/O ports at a480 | |
Region 2: I/O ports at a400 | |
Region 3: I/O ports at a080 | |
Region 4: I/O ports at a000 | |
Region 5: Memory at fbed8000 (32-bit, non-prefetchable) | |
Capabilities: [80] MSI: Enable+ Count=1/16 Maskable- 64bit- | |
Address: fee20000 Data: 0031 | |
Capabilities: [70] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004 | |
Capabilities: [b0] PCI Advanced Features | |
AFCap: TP+ FLR+ | |
AFCtrl: FLR- | |
AFStatus: TP- | |
00:1f.3 SMBus: Intel Corporation 82801JI (ICH10 Family) SMBus Controller | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Interrupt: pin C routed to IRQ 18 | |
Region 0: Memory at fbed6000 (64-bit, non-prefetchable) | |
Region 4: I/O ports at 0400 | |
01:00.0 Ethernet controller: Intel Corporation 82576 Gigabit Network Connection (rev 01) | |
Subsystem: Inventec Corporation Device 004a | |
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+ | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Interrupt: pin B routed to IRQ 17 | |
Region 0: Memory at fb9e0000 (32-bit, non-prefetchable) | |
Region 1: Memory at fb9c0000 (32-bit, non-prefetchable) | |
Region 2: I/O ports at bc00 | |
Region 3: Memory at fb99c000 (32-bit, non-prefetchable) | |
Expansion ROM at fb9a0000 [disabled] | |
Capabilities: [40] Power Management version 3 | |
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) | |
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME- | |
Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+ | |
Address: 0000000000000000 Data: 0000 | |
Masking: 00000000 Pending: 00000000 | |
Capabilities: [70] MSI-X: Enable+ Count=10 Masked- | |
Vector table: BAR=3 offset=00000000 | |
PBA: BAR=3 offset=00002000 | |
Capabilities: [a0] Express (v2) Endpoint, MSI 00 | |
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us | |
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset- | |
MaxPayload 128 bytes, MaxReadReq 512 bytes | |
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend- | |
LnkCap: Port #0, Speed 2.5GT/s, Width x4, ASPM L0s L1, Exit Latency L0s <4us, L1 <64us | |
ClockPM- Surprise- LLActRep- BwNot- | |
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- | |
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- | |
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 16ms to 55ms, TimeoutDis-, LTR-, OBFF Disabled | |
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis- | |
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
Compliance De-emphasis: -6dB | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
01:00.1 Ethernet controller: Intel Corporation 82576 Gigabit Network Connection (rev 01) | |
Subsystem: Inventec Corporation Device 004a | |
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+ | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Interrupt: pin A routed to IRQ 16 | |
Region 0: Memory at fb960000 (32-bit, non-prefetchable) | |
Region 1: Memory at fb940000 (32-bit, non-prefetchable) | |
Region 2: I/O ports at b880 | |
Region 3: Memory at fb91c000 (32-bit, non-prefetchable) | |
Expansion ROM at fb920000 [disabled] | |
Capabilities: [40] Power Management version 3 | |
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) | |
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME- | |
Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+ | |
Address: 0000000000000000 Data: 0000 | |
Masking: 00000000 Pending: 00000000 | |
Capabilities: [70] MSI-X: Enable+ Count=10 Masked- | |
Vector table: BAR=3 offset=00000000 | |
PBA: BAR=3 offset=00002000 | |
Capabilities: [a0] Express (v2) Endpoint, MSI 00 | |
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us | |
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset- | |
MaxPayload 128 bytes, MaxReadReq 512 bytes | |
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend- | |
LnkCap: Port #0, Speed 2.5GT/s, Width x4, ASPM L0s L1, Exit Latency L0s <4us, L1 <64us | |
ClockPM- Surprise- LLActRep- BwNot- | |
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- | |
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- | |
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 16ms to 55ms, TimeoutDis-, LTR-, OBFF Disabled | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
02:00.0 Serial Attached SCSI controller: LSI Logic / Symbios Logic SAS2008 PCI-Express Fusion-MPT SAS-2 [Falcon] (rev 03) | |
Subsystem: Inventec Corporation Device 6019 | |
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+ | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Interrupt: pin A routed to IRQ 24 | |
Region 0: I/O ports at c000 | |
Region 1: Memory at fba3c000 (64-bit, non-prefetchable) | |
Region 3: Memory at fba40000 (64-bit, non-prefetchable) | |
Expansion ROM at fba80000 [disabled] | |
Capabilities: [50] Power Management version 3 | |
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
Capabilities: [68] Express (v2) Endpoint, MSI 00 | |
DevCap: MaxPayload 4096 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us | |
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset- | |
MaxPayload 128 bytes, MaxReadReq 512 bytes | |
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend- | |
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s, Exit Latency L0s <64ns, L1 <1us | |
ClockPM- Surprise- LLActRep- BwNot- | |
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- | |
LnkSta: Speed 5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- | |
DevCap2: Completion Timeout: Range BC, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- | |
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
Compliance De-emphasis: -6dB | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
Capabilities: [d0] Vital Product Data | |
Not readable | |
Capabilities: [a8] MSI: Enable- Count=1/1 Maskable- 64bit+ | |
Address: 0000000000000000 Data: 0000 | |
Capabilities: [c0] MSI-X: Enable+ Count=15 Masked- | |
Vector table: BAR=1 offset=00002000 | |
PBA: BAR=1 offset=00003800 | |
04:00.0 Ethernet controller: Intel Corporation Ethernet 10G 2P X520 Adapter (rev 01) | |
Subsystem: Intel Corporation 10GbE 2P X520 Adapter | |
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+ | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Interrupt: pin A routed to IRQ 16 | |
Region 0: Memory at fbd80000 (64-bit, non-prefetchable) | |
Region 2: I/O ports at dc00 | |
Region 4: Memory at fbcfc000 (64-bit, non-prefetchable) | |
Expansion ROM at fbd00000 [disabled] | |
Capabilities: [40] Power Management version 3 | |
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-) | |
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME- | |
Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+ | |
Address: 0000000000000000 Data: 0000 | |
Masking: 00000000 Pending: 00000000 | |
Capabilities: [70] MSI-X: Enable+ Count=64 Masked- | |
Vector table: BAR=4 offset=00000000 | |
PBA: BAR=4 offset=00002000 | |
Capabilities: [a0] Express (v2) Endpoint, MSI 00 | |
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us | |
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset- | |
MaxPayload 128 bytes, MaxReadReq 512 bytes | |
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend- | |
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s, Exit Latency L0s <2us, L1 <32us | |
ClockPM- Surprise- LLActRep- BwNot- | |
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- | |
LnkSta: Speed 5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- | |
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- | |
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
Compliance De-emphasis: -6dB | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
Capabilities: [e0] Vital Product Data | |
Not readable | |
04:00.1 Ethernet controller: Intel Corporation Ethernet 10G 2P X520 Adapter (rev 01) | |
Subsystem: Intel Corporation 10GbE 2P X520 Adapter | |
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+ | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0, Cache Line Size: 256 bytes | |
Interrupt: pin B routed to IRQ 17 | |
Region 0: Memory at fbc00000 (64-bit, non-prefetchable) | |
Region 2: I/O ports at d880 | |
Region 4: Memory at fbb7c000 (64-bit, non-prefetchable) | |
Expansion ROM at fbb80000 [disabled] | |
Capabilities: [40] Power Management version 3 | |
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-) | |
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME- | |
Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+ | |
Address: 0000000000000000 Data: 0000 | |
Masking: 00000000 Pending: 00000000 | |
Capabilities: [70] MSI-X: Enable+ Count=64 Masked- | |
Vector table: BAR=4 offset=00000000 | |
PBA: BAR=4 offset=00002000 | |
Capabilities: [a0] Express (v2) Endpoint, MSI 00 | |
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us | |
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset- | |
MaxPayload 128 bytes, MaxReadReq 512 bytes | |
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend- | |
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s, Exit Latency L0s <2us, L1 <32us | |
ClockPM- Surprise- LLActRep- BwNot- | |
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- | |
LnkSta: Speed 5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- | |
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
Capabilities: [e0] Vital Product Data | |
Not readable | |
05:04.0 VGA compatible controller: ASPEED Technology, Inc. ASPEED Graphics Family (rev 10) (prog-if 00 [VGA controller]) | |
Subsystem: Inventec Corporation Device 0047 | |
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Interrupt: pin A routed to IRQ 16 | |
Region 0: Memory at fb000000 (32-bit, non-prefetchable) | |
Region 1: Memory at fafe0000 (32-bit, non-prefetchable) | |
Region 2: I/O ports at ec00 | |
Capabilities: [40] Power Management version 3 | |
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+) | |
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- |
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root@s001:~ # sysctl dev.ix | |
dev.ix.0.%desc: Intel(R) PRO/10GbE PCI-Express Network Driver, Version - 2.5.15 | |
dev.ix.0.%driver: ix | |
dev.ix.0.%location: slot=0 function=0 | |
dev.ix.0.%pnpinfo: vendor=0x8086 device=0x154d subvendor=0x8086 subdevice=0x7b11 class=0x020000 | |
dev.ix.0.%parent: pci4 | |
dev.ix.0.fc: 3 | |
dev.ix.0.enable_aim: 1 | |
dev.ix.0.advertise_speed: 0 | |
dev.ix.0.dropped: 0 | |
dev.ix.0.mbuf_defrag_failed: 0 | |
dev.ix.0.watchdog_events: 0 | |
dev.ix.0.link_irq: 90 | |
dev.ix.0.queue0.interrupt_rate: 500000 | |
dev.ix.0.queue0.irqs: 139269 | |
dev.ix.0.queue0.txd_head: 40 | |
dev.ix.0.queue0.txd_tail: 40 | |
dev.ix.0.queue0.tso_tx: 62 | |
dev.ix.0.queue0.no_tx_dma_setup: 0 | |
dev.ix.0.queue0.no_desc_avail: 0 | |
dev.ix.0.queue0.tx_packets: 12847 | |
dev.ix.0.queue0.rxd_head: 1582 | |
dev.ix.0.queue0.rxd_tail: 1581 | |
dev.ix.0.queue0.rx_packets: 128558 | |
dev.ix.0.queue0.rx_bytes: 19178432 | |
dev.ix.0.queue0.rx_copies: 120117 | |
dev.ix.0.queue0.lro_queued: 10543 | |
dev.ix.0.queue0.lro_flushed: 10312 | |
dev.ix.0.queue1.interrupt_rate: 500000 | |
dev.ix.0.queue1.irqs: 15022 | |
dev.ix.0.queue1.txd_head: 831 | |
dev.ix.0.queue1.txd_tail: 831 | |
dev.ix.0.queue1.tso_tx: 63 | |
dev.ix.0.queue1.no_tx_dma_setup: 0 | |
dev.ix.0.queue1.no_desc_avail: 0 | |
dev.ix.0.queue1.tx_packets: 7410 | |
dev.ix.0.queue1.rxd_head: 506 | |
dev.ix.0.queue1.rxd_tail: 505 | |
dev.ix.0.queue1.rx_packets: 8698 | |
dev.ix.0.queue1.rx_bytes: 6626819 | |
dev.ix.0.queue1.rx_copies: 4004 | |
dev.ix.0.queue1.lro_queued: 6643 | |
dev.ix.0.queue1.lro_flushed: 6397 | |
dev.ix.0.queue2.interrupt_rate: 71428 | |
dev.ix.0.queue2.irqs: 7960 | |
dev.ix.0.queue2.txd_head: 1509 | |
dev.ix.0.queue2.txd_tail: 1509 | |
dev.ix.0.queue2.tso_tx: 44 | |
dev.ix.0.queue2.no_tx_dma_setup: 0 | |
dev.ix.0.queue2.no_desc_avail: 0 | |
dev.ix.0.queue2.tx_packets: 3967 | |
dev.ix.0.queue2.rxd_head: 221 | |
dev.ix.0.queue2.rxd_tail: 220 | |
dev.ix.0.queue2.rx_packets: 4317 | |
dev.ix.0.queue2.rx_bytes: 1452355 | |
dev.ix.0.queue2.rx_copies: 3100 | |
dev.ix.0.queue2.lro_queued: 1948 | |
dev.ix.0.queue2.lro_flushed: 1909 | |
dev.ix.0.queue3.interrupt_rate: 55555 | |
dev.ix.0.queue3.irqs: 45021 | |
dev.ix.0.queue3.txd_head: 1278 | |
dev.ix.0.queue3.txd_tail: 1280 | |
dev.ix.0.queue3.tso_tx: 131 | |
dev.ix.0.queue3.no_tx_dma_setup: 0 | |
dev.ix.0.queue3.no_desc_avail: 0 | |
dev.ix.0.queue3.tx_packets: 23145 | |
dev.ix.0.queue3.rxd_head: 288 | |
dev.ix.0.queue3.rxd_tail: 287 | |
dev.ix.0.queue3.rx_packets: 22816 | |
dev.ix.0.queue3.rx_bytes: 8695035 | |
dev.ix.0.queue3.rx_copies: 17309 | |
dev.ix.0.queue3.lro_queued: 20641 | |
dev.ix.0.queue3.lro_flushed: 19824 | |
dev.ix.0.queue4.interrupt_rate: 125000 | |
dev.ix.0.queue4.irqs: 34902 | |
dev.ix.0.queue4.txd_head: 1754 | |
dev.ix.0.queue4.txd_tail: 1754 | |
dev.ix.0.queue4.tso_tx: 39 | |
dev.ix.0.queue4.no_tx_dma_setup: 0 | |
dev.ix.0.queue4.no_desc_avail: 0 | |
dev.ix.0.queue4.tx_packets: 16322 | |
dev.ix.0.queue4.rxd_head: 1635 | |
dev.ix.0.queue4.rxd_tail: 1634 | |
dev.ix.0.queue4.rx_packets: 20067 | |
dev.ix.0.queue4.rx_bytes: 15826534 | |
dev.ix.0.queue4.rx_copies: 9669 | |
dev.ix.0.queue4.lro_queued: 17490 | |
dev.ix.0.queue4.lro_flushed: 17077 | |
dev.ix.0.queue5.interrupt_rate: 71428 | |
dev.ix.0.queue5.irqs: 23971 | |
dev.ix.0.queue5.txd_head: 672 | |
dev.ix.0.queue5.txd_tail: 672 | |
dev.ix.0.queue5.tso_tx: 50 | |
dev.ix.0.queue5.no_tx_dma_setup: 0 | |
dev.ix.0.queue5.no_desc_avail: 0 | |
dev.ix.0.queue5.tx_packets: 11792 | |
dev.ix.0.queue5.rxd_head: 938 | |
dev.ix.0.queue5.rxd_tail: 937 | |
dev.ix.0.queue5.rx_packets: 13226 | |
dev.ix.0.queue5.rx_bytes: 10948225 | |
dev.ix.0.queue5.rx_copies: 5754 | |
dev.ix.0.queue5.lro_queued: 10384 | |
dev.ix.0.queue5.lro_flushed: 10167 | |
dev.ix.0.queue6.interrupt_rate: 125000 | |
dev.ix.0.queue6.irqs: 11670 | |
dev.ix.0.queue6.txd_head: 1711 | |
dev.ix.0.queue6.txd_tail: 1711 | |
dev.ix.0.queue6.tso_tx: 60 | |
dev.ix.0.queue6.no_tx_dma_setup: 0 | |
dev.ix.0.queue6.no_desc_avail: 0 | |
dev.ix.0.queue6.tx_packets: 6004 | |
dev.ix.0.queue6.rxd_head: 1929 | |
dev.ix.0.queue6.rxd_tail: 1928 | |
dev.ix.0.queue6.rx_packets: 6025 | |
dev.ix.0.queue6.rx_bytes: 2741708 | |
dev.ix.0.queue6.rx_copies: 4028 | |
dev.ix.0.queue6.lro_queued: 3254 | |
dev.ix.0.queue6.lro_flushed: 3195 | |
dev.ix.0.queue7.interrupt_rate: 500000 | |
dev.ix.0.queue7.irqs: 55291 | |
dev.ix.0.queue7.txd_head: 703 | |
dev.ix.0.queue7.txd_tail: 703 | |
dev.ix.0.queue7.tso_tx: 53 | |
dev.ix.0.queue7.no_tx_dma_setup: 0 | |
dev.ix.0.queue7.no_desc_avail: 0 | |
dev.ix.0.queue7.tx_packets: 8724 | |
dev.ix.0.queue7.rxd_head: 1369 | |
dev.ix.0.queue7.rxd_tail: 1368 | |
dev.ix.0.queue7.rx_packets: 50521 | |
dev.ix.0.queue7.rx_bytes: 26968737 | |
dev.ix.0.queue7.rx_copies: 3544 | |
dev.ix.0.queue7.lro_queued: 10985 | |
dev.ix.0.queue7.lro_flushed: 9504 | |
dev.ix.0.mac_stats.crc_errs: 0 | |
dev.ix.0.mac_stats.ill_errs: 0 | |
dev.ix.0.mac_stats.byte_errs: 0 | |
dev.ix.0.mac_stats.short_discards: 0 | |
dev.ix.0.mac_stats.local_faults: 314 | |
dev.ix.0.mac_stats.remote_faults: 41 | |
dev.ix.0.mac_stats.rec_len_errs: 0 | |
dev.ix.0.mac_stats.xon_txd: 0 | |
dev.ix.0.mac_stats.xon_recvd: 0 | |
dev.ix.0.mac_stats.xoff_txd: 0 | |
dev.ix.0.mac_stats.xoff_recvd: 0 | |
dev.ix.0.mac_stats.total_octets_rcvd: 1623359057 | |
dev.ix.0.mac_stats.good_octets_rcvd: 93454581 | |
dev.ix.0.mac_stats.total_pkts_rcvd: 20948182 | |
dev.ix.0.mac_stats.good_pkts_rcvd: 254226 | |
dev.ix.0.mac_stats.mcast_pkts_rcvd: 0 | |
dev.ix.0.mac_stats.bcast_pkts_rcvd: 149775 | |
dev.ix.0.mac_stats.rx_frames_64: 114120 | |
dev.ix.0.mac_stats.rx_frames_65_127: 51885 | |
dev.ix.0.mac_stats.rx_frames_128_255: 5323 | |
dev.ix.0.mac_stats.rx_frames_256_511: 37206 | |
dev.ix.0.mac_stats.rx_frames_512_1023: 375 | |
dev.ix.0.mac_stats.rx_frames_1024_1522: 45317 | |
dev.ix.0.mac_stats.recv_undersized: 0 | |
dev.ix.0.mac_stats.recv_fragmented: 0 | |
dev.ix.0.mac_stats.recv_oversized: 0 | |
dev.ix.0.mac_stats.recv_jabberd: 0 | |
dev.ix.0.mac_stats.management_pkts_rcvd: 0 | |
dev.ix.0.mac_stats.management_pkts_drpd: 0 | |
dev.ix.0.mac_stats.checksum_errs: 87 | |
dev.ix.0.mac_stats.good_octets_txd: 11698517 | |
dev.ix.0.mac_stats.total_pkts_txd: 90788 | |
dev.ix.0.mac_stats.good_pkts_txd: 90788 | |
dev.ix.0.mac_stats.bcast_pkts_txd: 1712 | |
dev.ix.0.mac_stats.mcast_pkts_txd: 0 | |
dev.ix.0.mac_stats.management_pkts_txd: 0 | |
dev.ix.0.mac_stats.tx_frames_64: 7698 | |
dev.ix.0.mac_stats.tx_frames_65_127: 49145 | |
dev.ix.0.mac_stats.tx_frames_128_255: 32131 | |
dev.ix.0.mac_stats.tx_frames_256_511: 524 | |
dev.ix.0.mac_stats.tx_frames_512_1023: 529 | |
dev.ix.0.mac_stats.tx_frames_1024_1522: 761 | |
dev.ix.1.%desc: Intel(R) PRO/10GbE PCI-Express Network Driver, Version - 2.5.15 | |
dev.ix.1.%driver: ix | |
dev.ix.1.%location: slot=0 function=1 | |
dev.ix.1.%pnpinfo: vendor=0x8086 device=0x154d subvendor=0x8086 subdevice=0x7b11 class=0x020000 | |
dev.ix.1.%parent: pci4 | |
dev.ix.1.fc: 3 | |
dev.ix.1.enable_aim: 1 | |
dev.ix.1.advertise_speed: 0 | |
dev.ix.1.dropped: 0 | |
dev.ix.1.mbuf_defrag_failed: 0 | |
dev.ix.1.watchdog_events: 0 | |
dev.ix.1.link_irq: 4 | |
dev.ix.1.queue0.interrupt_rate: 500000 | |
dev.ix.1.queue0.irqs: 7 | |
dev.ix.1.queue0.txd_head: 3 | |
dev.ix.1.queue0.txd_tail: 3 | |
dev.ix.1.queue0.tso_tx: 0 | |
dev.ix.1.queue0.no_tx_dma_setup: 0 | |
dev.ix.1.queue0.no_desc_avail: 0 | |
dev.ix.1.queue0.tx_packets: 3 | |
dev.ix.1.queue0.rxd_head: 4 | |
dev.ix.1.queue0.rxd_tail: 3 | |
dev.ix.1.queue0.rx_packets: 4 | |
dev.ix.1.queue0.rx_bytes: 240 | |
dev.ix.1.queue0.rx_copies: 4 | |
dev.ix.1.queue0.lro_queued: 0 | |
dev.ix.1.queue0.lro_flushed: 0 | |
dev.ix.1.queue1.interrupt_rate: 100000 | |
dev.ix.1.queue1.irqs: 1207 | |
dev.ix.1.queue1.txd_head: 577 | |
dev.ix.1.queue1.txd_tail: 577 | |
dev.ix.1.queue1.tso_tx: 1 | |
dev.ix.1.queue1.no_tx_dma_setup: 0 | |
dev.ix.1.queue1.no_desc_avail: 0 | |
dev.ix.1.queue1.tx_packets: 984 | |
dev.ix.1.queue1.rxd_head: 526 | |
dev.ix.1.queue1.rxd_tail: 525 | |
dev.ix.1.queue1.rx_packets: 526 | |
dev.ix.1.queue1.rx_bytes: 41635 | |
dev.ix.1.queue1.rx_copies: 521 | |
dev.ix.1.queue1.lro_queued: 524 | |
dev.ix.1.queue1.lro_flushed: 523 | |
dev.ix.1.queue2.interrupt_rate: 31250 | |
dev.ix.1.queue2.irqs: 0 | |
dev.ix.1.queue2.txd_head: 0 | |
dev.ix.1.queue2.txd_tail: 0 | |
dev.ix.1.queue2.tso_tx: 0 | |
dev.ix.1.queue2.no_tx_dma_setup: 0 | |
dev.ix.1.queue2.no_desc_avail: 0 | |
dev.ix.1.queue2.tx_packets: 0 | |
dev.ix.1.queue2.rxd_head: 0 | |
dev.ix.1.queue2.rxd_tail: 2047 | |
dev.ix.1.queue2.rx_packets: 0 | |
dev.ix.1.queue2.rx_bytes: 0 | |
dev.ix.1.queue2.rx_copies: 0 | |
dev.ix.1.queue2.lro_queued: 0 | |
dev.ix.1.queue2.lro_flushed: 0 | |
dev.ix.1.queue3.interrupt_rate: 31250 | |
dev.ix.1.queue3.irqs: 0 | |
dev.ix.1.queue3.txd_head: 0 | |
dev.ix.1.queue3.txd_tail: 0 | |
dev.ix.1.queue3.tso_tx: 0 | |
dev.ix.1.queue3.no_tx_dma_setup: 0 | |
dev.ix.1.queue3.no_desc_avail: 0 | |
dev.ix.1.queue3.tx_packets: 0 | |
dev.ix.1.queue3.rxd_head: 0 | |
dev.ix.1.queue3.rxd_tail: 2047 | |
dev.ix.1.queue3.rx_packets: 0 | |
dev.ix.1.queue3.rx_bytes: 0 | |
dev.ix.1.queue3.rx_copies: 0 | |
dev.ix.1.queue3.lro_queued: 0 | |
dev.ix.1.queue3.lro_flushed: 0 | |
dev.ix.1.queue4.interrupt_rate: 71428 | |
dev.ix.1.queue4.irqs: 4 | |
dev.ix.1.queue4.txd_head: 2 | |
dev.ix.1.queue4.txd_tail: 2 | |
dev.ix.1.queue4.tso_tx: 0 | |
dev.ix.1.queue4.no_tx_dma_setup: 0 | |
dev.ix.1.queue4.no_desc_avail: 0 | |
dev.ix.1.queue4.tx_packets: 2 | |
dev.ix.1.queue4.rxd_head: 2 | |
dev.ix.1.queue4.rxd_tail: 1 | |
dev.ix.1.queue4.rx_packets: 2 | |
dev.ix.1.queue4.rx_bytes: 196 | |
dev.ix.1.queue4.rx_copies: 2 | |
dev.ix.1.queue4.lro_queued: 0 | |
dev.ix.1.queue4.lro_flushed: 0 | |
dev.ix.1.queue5.interrupt_rate: 31250 | |
dev.ix.1.queue5.irqs: 0 | |
dev.ix.1.queue5.txd_head: 0 | |
dev.ix.1.queue5.txd_tail: 0 | |
dev.ix.1.queue5.tso_tx: 0 | |
dev.ix.1.queue5.no_tx_dma_setup: 0 | |
dev.ix.1.queue5.no_desc_avail: 0 | |
dev.ix.1.queue5.tx_packets: 0 | |
dev.ix.1.queue5.rxd_head: 0 | |
dev.ix.1.queue5.rxd_tail: 2047 | |
dev.ix.1.queue5.rx_packets: 0 | |
dev.ix.1.queue5.rx_bytes: 0 | |
dev.ix.1.queue5.rx_copies: 0 | |
dev.ix.1.queue5.lro_queued: 0 | |
dev.ix.1.queue5.lro_flushed: 0 | |
dev.ix.1.queue6.interrupt_rate: 100000 | |
dev.ix.1.queue6.irqs: 33 | |
dev.ix.1.queue6.txd_head: 32 | |
dev.ix.1.queue6.txd_tail: 32 | |
dev.ix.1.queue6.tso_tx: 1 | |
dev.ix.1.queue6.no_tx_dma_setup: 0 | |
dev.ix.1.queue6.no_desc_avail: 0 | |
dev.ix.1.queue6.tx_packets: 15 | |
dev.ix.1.queue6.rxd_head: 21 | |
dev.ix.1.queue6.rxd_tail: 20 | |
dev.ix.1.queue6.rx_packets: 21 | |
dev.ix.1.queue6.rx_bytes: 3909 | |
dev.ix.1.queue6.rx_copies: 19 | |
dev.ix.1.queue6.lro_queued: 19 | |
dev.ix.1.queue6.lro_flushed: 18 | |
dev.ix.1.queue7.interrupt_rate: 31250 | |
dev.ix.1.queue7.irqs: 1 | |
dev.ix.1.queue7.txd_head: 1 | |
dev.ix.1.queue7.txd_tail: 1 | |
dev.ix.1.queue7.tso_tx: 0 | |
dev.ix.1.queue7.no_tx_dma_setup: 0 | |
dev.ix.1.queue7.no_desc_avail: 0 | |
dev.ix.1.queue7.tx_packets: 1 | |
dev.ix.1.queue7.rxd_head: 0 | |
dev.ix.1.queue7.rxd_tail: 2047 | |
dev.ix.1.queue7.rx_packets: 0 | |
dev.ix.1.queue7.rx_bytes: 0 | |
dev.ix.1.queue7.rx_copies: 0 | |
dev.ix.1.queue7.lro_queued: 0 | |
dev.ix.1.queue7.lro_flushed: 0 | |
dev.ix.1.mac_stats.crc_errs: 0 | |
dev.ix.1.mac_stats.ill_errs: 0 | |
dev.ix.1.mac_stats.byte_errs: 0 | |
dev.ix.1.mac_stats.short_discards: 0 | |
dev.ix.1.mac_stats.local_faults: 5 | |
dev.ix.1.mac_stats.remote_faults: 2 | |
dev.ix.1.mac_stats.rec_len_errs: 0 | |
dev.ix.1.mac_stats.xon_txd: 0 | |
dev.ix.1.mac_stats.xon_recvd: 0 | |
dev.ix.1.mac_stats.xoff_txd: 0 | |
dev.ix.1.mac_stats.xoff_recvd: 0 | |
dev.ix.1.mac_stats.total_octets_rcvd: 48192 | |
dev.ix.1.mac_stats.good_octets_rcvd: 48192 | |
dev.ix.1.mac_stats.total_pkts_rcvd: 553 | |
dev.ix.1.mac_stats.good_pkts_rcvd: 553 | |
dev.ix.1.mac_stats.mcast_pkts_rcvd: 0 | |
dev.ix.1.mac_stats.bcast_pkts_rcvd: 4 | |
dev.ix.1.mac_stats.rx_frames_64: 4 | |
dev.ix.1.mac_stats.rx_frames_65_127: 529 | |
dev.ix.1.mac_stats.rx_frames_128_255: 15 | |
dev.ix.1.mac_stats.rx_frames_256_511: 3 | |
dev.ix.1.mac_stats.rx_frames_512_1023: 0 | |
dev.ix.1.mac_stats.rx_frames_1024_1522: 2 | |
dev.ix.1.mac_stats.recv_undersized: 0 | |
dev.ix.1.mac_stats.recv_fragmented: 0 | |
dev.ix.1.mac_stats.recv_oversized: 0 | |
dev.ix.1.mac_stats.recv_jabberd: 0 | |
dev.ix.1.mac_stats.management_pkts_rcvd: 0 | |
dev.ix.1.mac_stats.management_pkts_drpd: 0 | |
dev.ix.1.mac_stats.checksum_errs: 0 | |
dev.ix.1.mac_stats.good_octets_txd: 253928 | |
dev.ix.1.mac_stats.total_pkts_txd: 1007 | |
dev.ix.1.mac_stats.good_pkts_txd: 1007 | |
dev.ix.1.mac_stats.bcast_pkts_txd: 1 | |
dev.ix.1.mac_stats.mcast_pkts_txd: 0 | |
dev.ix.1.mac_stats.management_pkts_txd: 0 | |
dev.ix.1.mac_stats.tx_frames_64: 4 | |
dev.ix.1.mac_stats.tx_frames_65_127: 169 | |
dev.ix.1.mac_stats.tx_frames_128_255: 457 | |
dev.ix.1.mac_stats.tx_frames_256_511: 335 | |
dev.ix.1.mac_stats.tx_frames_512_1023: 38 | |
dev.ix.1.mac_stats.tx_frames_1024_1522: 4 |
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