nmigen -> openlane example

inverter_example.py

from nmigen.build import *
from nmigen.vendor.open_lane import *

class sky130_fd_sc_hd(OpenLANEPlatform):
	openlane_root = environ['OPENLANE_ROOT']
	pdk = "sky130A"
	cell_library = "sky130_fd_sc_hd"
	settings = {
		"PL_TARGET_DENSITY": 0.75,
		"FP_HORIZONTAL_HALO": 6,
		"FP_VERTICAL_HALO": 6,
		"FP_CORE_UTIL": 5,
	}
	connectors  = []
	resources = []

class inv(Elaboratable):
    def __init__(self, width=8):
        self.i = Signal(width)
        self.o = Signal(width)

    def elaborate(self, platform):
        m = Module()

        m.d.comb += self.o.eq(~self.i)

        return m

    def get_ports(self):
        return [self.i, self.o]

if __name__ == "__main__":
    platform = sky130_fd_sc_hd()

    inverter = inv()
    platform.build(inverter, name="inverter", ports=inverter.get_ports())

this isn't upstream. does this actually work?

I don't even know how you found this gist, but yes, it works for the most part, mainly only for purely combinatorial logic at the moment:
see: https://twitter.com/lethalbit/status/1377123750680780806 | https://twitter.com/lethalbit/status/1377313053834948612 | https://twitter.com/lethalbit/status/1377315442813976581

It's not upstream do to some bugs and it needing a lot of work for synchronous logic

why don't you think it's wanted as a PR? can you push the code somewhere? I'm interested in trying it out...

You'll be happy to know that I now have a fork of nmigen with the openlane changes in it on my github, https://github.com/lethalbit/nmigen/tree/openlane and there is an example in tree over at https://github.com/lethalbit/nmigen/blob/openlane/examples/vendor/openlane_asic.py

The process of using it is 500% undocumented at the moment but that's on my todo list

awesome! will give it a try soon. since it emits verilog, why doesn't synchronous logic work? looks like the create_missing_domain needs to be fleshed out with a proper por and oscillator?

Like I said, it's a huge WIP, It needs a lot of work on some things and there is a lot of things that need to be considered, so it's not quite as simple as just throwing a POR and OSC in it.

Anyway, this discussion should be moved away from this gist and over to the fork.