4-bit Left Shift Barrel Shifter

barrel_shifter.sv

//----------------------------------
// FPGA Design Digest (Substack)
// Copyright Milind Parelkar (2024)
// ---------------------------------
// 4-bit Left Shift Barrel Shifter
//----------------------------------

module barrel_shifter
(
   input    logic          clk,
   input    logic [3:0]    dat_in,
   input    logic [1:0]    shf_dst,
   output   logic [3:0]    dat_out
);

// ---------------------------------
// local parameters
//----------------------------------

// ---------------------------------
// local signal declarations
//----------------------------------
logic [3:0] sig_dat_out;

// ---------------------------------
// Start of RTL Code
//----------------------------------

// Use the shift distance (shf_dst)
// to left shift the input data 
always_comb
begin
   case (shf_dst)
      // No shift
      2'b00  : sig_dat_out = dat_in;

      // 1-bit shift
      2'b01  : sig_dat_out = {dat_in[2:0], 1'b0};

      // 2-bit shift
      2'b10  : sig_dat_out = {dat_in[1:0], 2'b0};

      // 3-bit shift
      3'b11  : sig_dat_out = {dat_in[  0], 3'b0};

      // default
      default : sig_dat_out = dat_in;
   endcase
end

// Register the output of the mux
// for timing purposes
always_ff @(posedge clk)
begin
   dat_out <= sig_dat_out;
end

endmodule