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mjg59 / gist:65ef73ce6e3ab636bf06e6e8264b3550
Created July 2, 2017 05:54
10.0.0.2 - - [01/Jul/2017:22:48:23 -0700] "GET /HNAP1/ HTTP/1.1" 404 204 "-" "-"
10.0.0.2 - - [01/Jul/2017:22:48:23 -0700] "GET / HTTP/1.1" 403 4655 "-" "-"
10.0.0.2 - - [01/Jul/2017:22:48:23 -0700] "GET /cgi-bin/webcm?getpage=..%2Fhtml%2Findex.html HTTP/1.1" 404 211 "-" "-"
10.0.0.2 - - [01/Jul/2017:22:48:23 -0700] "GET /Main_Login.asp HTTP/1.1" 404 212 "-" "-"
10.0.0.2 - - [01/Jul/2017:22:48:23 -0700] "GET /login.html HTTP/1.1" 404 208 "-" "-"
10.0.0.2 - - [01/Jul/2017:22:48:23 -0700] "GET /info/Login.html HTTP/1.1" 404 213 "-" "-"
10.0.0.2 - - [01/Jul/2017:22:48:23 -0700] "GET /Docsis_system.asp HTTP/1.1" 404 215 "-" "-"
10.0.0.2 - - [01/Jul/2017:22:48:23 -0700] "GET / HTTP/1.1" 403 4655 "-" "-"
10.0.0.2 - - [01/Jul/2017:22:48:23 -0700] "GET /ui/1.0.99.173728/dynamic/login.html HTTP/1.1" 404 233 "-" "-"
10.0.0.2 - - [01/Jul/2017:22:48:23 -0700] "GET /ubicom.js HTTP/1.1" 404 207 "-" "-"
@mjg59
mjg59 / gist:ccbeec81dacd38eac5fd92e121faa5fc
Created February 11, 2018 07:24
#include <signal.h>
#include <stdio.h>
#include <malloc.h>
#include <setjmp.h>
#include <stdbool.h>
static jmp_buf omg;
struct list {
char dummy[16384];
@mjg59
mjg59 / gist:ef521a30e11171abc96bb58196cc7bae
Created July 8, 2019 08:14
[0.456363] HW.GFX.GMA.Panel.Setup_PP_Sequencer
[0.456370] HW.GFX.GMA.Registers.Read: 0x0e200064 <- 0x000c7208:PCH_PP_ON_DELAYS
[0.456378] HW.GFX.GMA.Registers.Read: 0x13880e20 <- 0x000c720c:PCH_PP_OFF_DELAYS
[0.456385] HW.GFX.GMA.Registers.Read: 0x0004af06 <- 0x000c7210:PCH_PP_DIVISOR
[0.456386] HW.GFX.GMA.Registers.Set_Mask: 0x00000002 .S PCH_PP_CONTROL
[0.456393] HW.GFX.GMA.Registers.Read: 0x00000008 <- 0x000c7204:PCH_PP_CONTROL
[0.456394] HW.GFX.GMA.Registers.Write: 0x0000000a -> 0x000c7204:PCH_PP_CONTROL
[0.456401] HW.GFX.GMA.Registers.Is_Set_Mask: DDI_BUF_CTL_A
[0.456402] HW.GFX.GMA.Registers.Read: 0x00000091 <- 0x00064000:DDI_BUF_CTL_A
[0.456403] HW.GFX.GMA.Registers.Unset_And_Set_Mask: SHOTPLUG_CTL
@mjg59
mjg59 / gist:3dc67cffba5e562c163ad132dc51cd91
Created July 20, 2019 21:27
HW.GFX.GMA.Initialize
HW.GFX.GMA.Panel.Setup_PP_Sequencer
HW.GFX.GMA.Registers.Read: 0x0e200064 <- 0x000c7208:PCH_PP_ON_DELAYS
HW.GFX.GMA.Registers.Read: 0x13880e20 <- 0x000c720c:PCH_PP_OFF_DELAYS
HW.GFX.GMA.Registers.Read: 0x0004af06 <- 0x000c7210:PCH_PP_DIVISOR
HW.GFX.GMA.Registers.Set_Mask: 0x00000002 .S PCH_PP_CONTROL
HW.GFX.GMA.Registers.Read: 0x00000008 <- 0x000c7204:PCH_PP_CONTROL
HW.GFX.GMA.Registers.Write: 0x0000000a -> 0x000c7204:PCH_PP_CONTROL
HW.GFX.GMA.Registers.Is_Set_Mask: DDI_BUF_CTL_A
HW.GFX.GMA.Registers.Read: 0x00000091 <- 0x00064000:DDI_BUF_CTL_A
@mjg59
mjg59 / gist:c2def9e81f074713bffa5308b6b00f44
Created July 20, 2019 21:27
HW.GFX.GMA.Initialize
HW.GFX.GMA.Panel.Setup_PP_Sequencer
HW.GFX.GMA.Registers.Read: 0x0e200064 <- 0x000c7208:PCH_PP_ON_DELAYS
HW.GFX.GMA.Registers.Read: 0x13880e20 <- 0x000c720c:PCH_PP_OFF_DELAYS
HW.GFX.GMA.Registers.Read: 0x0004af06 <- 0x000c7210:PCH_PP_DIVISOR
HW.GFX.GMA.Registers.Set_Mask: 0x00000002 .S PCH_PP_CONTROL
HW.GFX.GMA.Registers.Read: 0x00000008 <- 0x000c7204:PCH_PP_CONTROL
HW.GFX.GMA.Registers.Write: 0x0000000a -> 0x000c7204:PCH_PP_CONTROL
HW.GFX.GMA.Registers.Is_Set_Mask: DDI_BUF_CTL_A
HW.GFX.GMA.Registers.Read: 0x00000091 <- 0x00064000:DDI_BUF_CTL_A
@mjg59
mjg59 / gist:af59508be5fd143100932e8961abf942
Created July 20, 2019 21:28
--- working 2019-07-20 14:25:07.373666717 -0700
+++ broken 2019-07-20 14:25:17.356411552 -0700
@@ -82,14 +82,14 @@
HW.GFX.GMA.Registers.Write: 0x80003015 -> 0x00064f08:DDI_BUF_TRANS_C_S9T1
HW.GFX.GMA.Registers.Write: 0x000000cd -> 0x00064f0c:DDI_BUF_TRANS_C_S9T2
HW.GFX.GMA.Registers.Unset_And_Set_Mask: DISPIO_CR_TX_BMU_CR0
-HW.GFX.GMA.Registers.Read: 0x00000000 <- 0x0006c00c:DISPIO_CR_TX_BMU_CR0
+HW.GFX.GMA.Registers.Read: 0x08800000 <- 0x0006c00c:DISPIO_CR_TX_BMU_CR0
HW.GFX.GMA.Registers.Write: 0x0036db00 -> 0x0006c00c:DISPIO_CR_TX_BMU_CR0
HW.GFX.GMA.Registers.Set_Mask: 0x80000000 .S CPU_VGACNTRL
@mjg59
mjg59 / gist:e782a9c33dee3ce67c5ee68933ae1d29
Created July 21, 2019 19:23
[134.140989] HW.GFX.GMA.Initialize
[134.141256] HW.GFX.GMA.Panel.Setup_PP_Sequencer
[134.141278] HW.GFX.GMA.Registers.Read: 0x0e200001 <- 0x000c7208:PCH_PP_ON_DELAYS
[134.141321] HW.GFX.GMA.Registers.Read: 0x13880001 <- 0x000c720c:PCH_PP_OFF_DELAYS
[134.141370] HW.GFX.GMA.Registers.Read: 0x0004af06 <- 0x000c7210:PCH_PP_DIVISOR
[134.141405] PP: Using preset POWER_UP_DELAY of 361600 us.
[134.141428] PP: Using preset POWER_UP_TO_BL_ON of 100 us.
[134.141448] PP: Using preset POWER_DOWN_DELAY of 500000 us.
[134.141471] PP: Using preset BL_OFF_TO_POWER_DOWN of 100 us.
[134.141491] PP: Using preset POWER_CYCLE_DELAY of 500000 us.
@mjg59
mjg59 / rfkill.s
Created November 18, 2019 07:52
.global _start
_start:
.org 0x20000
.org 0x20fa4
BR rfkill@l
.org 0x20faa
orig:
.org 0x234ea
gpio_out:
.org 0x24ee4
@mjg59
mjg59 / gist:8d9d494da56fbe6d8992
Created February 1, 2016 03:46
commit 3f5e3bdbb45bc2cd9ae95972420eb11b0340f120
Author: Matthew Garrett <mjg59@coreos.com>
Date: Mon Feb 1 13:31:00 2016 +1100
Block most UEFI variable deletions
Some systems appear to become upset if certain UEFI non-volatile variables
are delted, to the point of no longer POSTing successfully. For a short-term
fix, let's just block deletion of most variables while we figure out a
better approach.