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nmigen's ali_hier.py example dogelang
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# TODO: imports, test, m.d.conf and m.d.sync | |
#from nmigen import * | |
#from nmigen.cli import main | |
# helpers: | |
DgModule = subclass Module where | |
If = cond body_func ~> | |
with @@If cond => body_func! | |
Elif = cond body_func ~> | |
with @@Elif cond => body_func! | |
Else = body_func ~> | |
with @@Else => body_func! | |
# TODO: shadow? rename to Builder? | |
DgElaboratable = subclass Elaboratable where | |
elaborate = platform ~> | |
m = DgModule! | |
@produce m platform | |
return m | |
produce = m platform ~> | |
raise NotImplemented | |
drive = signal value -> signal.eq value | |
# alu_hier: | |
Adder = subclass DgElaboratable where | |
__init__ = width ~> | |
@a = Signal width | |
@b = Signal width | |
@o = Signal width | |
produce = m platform ~> | |
m.d.comb += drive @o (@a + @b) | |
Subtractor = subclass DgElaboratable where | |
__init__ = width ~> | |
@a = Signal width | |
@b = Signal width | |
@o = Signal width | |
produce = m platform ~> | |
m.d.comb += drive @o (@a - @b) | |
ALU = subclass DgElaboratable where | |
__init__ = width ~> | |
@op = Signal ! | |
@a = Signal width | |
@b = Signal width | |
@o = Signal width | |
@add = Adder width | |
@sub = Subtractor width | |
produce = m platform ~> | |
m.submodules.add = @add | |
m.submodules.sub = @sub | |
m.d.comb += list' # ew | |
drive @add.a @a | |
drive @sub.a @a | |
drive @add.b @b | |
drive @sub.b @b | |
m.If @op $-> | |
m.d.comb += drive @o @sub.o | |
m.Elif @op $-> | |
m.d.comb += drive @o @sub.o | |
m.Else $-> | |
m.d.comb += drive @o @add.o | |
if __name__ == "__main__": | |
alu = ALU width: 16 | |
main alu ports: list' | |
alu.op | |
alu.a | |
alu.b | |
alu.o |
Author
pbsds
commented
Sep 2, 2020
- nmigen's ali_hier.py example
- dogelang
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