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rockpro64 - bionic-containers-0.7.6-arm64 - pci Samsung 960 EVO 250GB - 4.4.132-1062
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rock64@rockpro64:/mnt/samsung-960-evo-250GB$ sudo iozone -e -I -a -s 100M -r 4k -r 16k -r 512k -r 1024k -r 16384k -i 0 -i 1 -i 2 | |
Iozone: Performance Test of File I/O | |
Version $Revision: 3.429 $ | |
Compiled for 64 bit mode. | |
Build: linux | |
Contributors:William Norcott, Don Capps, Isom Crawford, Kirby Collins | |
Al Slater, Scott Rhine, Mike Wisner, Ken Goss | |
Steve Landherr, Brad Smith, Mark Kelly, Dr. Alain CYR, | |
Randy Dunlap, Mark Montague, Dan Million, Gavin Brebner, | |
Jean-Marc Zucconi, Jeff Blomberg, Benny Halevy, Dave Boone, | |
Erik Habbinga, Kris Strecker, Walter Wong, Joshua Root, | |
Fabrice Bacchella, Zhenghua Xue, Qin Li, Darren Sawyer, | |
Vangel Bojaxhi, Ben England, Vikentsi Lapa. | |
Run began: Wed Jul 18 05:26:06 2018 | |
Include fsync in write timing | |
O_DIRECT feature enabled | |
Auto Mode | |
File size set to 102400 kB | |
Record Size 4 kB | |
Record Size 16 kB | |
Record Size 512 kB | |
Record Size 1024 kB | |
Record Size 16384 kB | |
Command line used: iozone -e -I -a -s 100M -r 4k -r 16k -r 512k -r 1024k -r 16384k -i 0 -i 1 -i 2 | |
Output is in kBytes/sec | |
Time Resolution = 0.000001 seconds. | |
Processor cache size set to 1024 kBytes. | |
Processor cache line size set to 32 bytes. | |
File stride size set to 17 * record size. | |
random random bkwd record stride | |
kB reclen write rewrite read reread read write read rewrite read fwrite frewrite fread freread | |
102400 4 38433 79302 105834 102662 35497 77236 | |
102400 16 136010 245212 285828 287224 129220 229761 | |
102400 512 817004 742109 459952 457776 418119 543264 | |
102400 1024 513989 610949 475218 484782 457843 604607 | |
102400 16384 1048832 987167 1056497 1089687 1097510 1146656 | |
iozone test complete. |
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rock64@rockpro64:/mnt/seagate-green-1.5tb$ sudo iozone -e -I -a -s 100M -r 4k -r 16k -r 512k -r 1024k -r 16384k -i 0 -i 1 -i 2 | |
Iozone: Performance Test of File I/O | |
Version $Revision: 3.429 $ | |
Compiled for 64 bit mode. | |
Build: linux | |
Contributors:William Norcott, Don Capps, Isom Crawford, Kirby Collins | |
Al Slater, Scott Rhine, Mike Wisner, Ken Goss | |
Steve Landherr, Brad Smith, Mark Kelly, Dr. Alain CYR, | |
Randy Dunlap, Mark Montague, Dan Million, Gavin Brebner, | |
Jean-Marc Zucconi, Jeff Blomberg, Benny Halevy, Dave Boone, | |
Erik Habbinga, Kris Strecker, Walter Wong, Joshua Root, | |
Fabrice Bacchella, Zhenghua Xue, Qin Li, Darren Sawyer, | |
Vangel Bojaxhi, Ben England, Vikentsi Lapa. | |
Run began: Wed Jul 18 07:13:31 2018 | |
Include fsync in write timing | |
O_DIRECT feature enabled | |
Auto Mode | |
File size set to 102400 kB | |
Record Size 4 kB | |
Record Size 16 kB | |
Record Size 512 kB | |
Record Size 1024 kB | |
Record Size 16384 kB | |
Command line used: iozone -e -I -a -s 100M -r 4k -r 16k -r 512k -r 1024k -r 16384k -i 0 -i 1 -i 2 | |
Output is in kBytes/sec | |
Time Resolution = 0.000001 seconds. | |
Processor cache size set to 1024 kBytes. | |
Processor cache line size set to 32 bytes. | |
File stride size set to 17 * record size. | |
random random bkwd record stride | |
kB reclen write rewrite read reread read write read rewrite read fwrite frewrite fread freread | |
102400 4 10765 16439 14054 19735 634 932 | |
102400 16 25162 39798 45037 47178 2516 3589 | |
102400 512 88391 90801 98286 95324 41012 63711 | |
102400 1024 93421 100735 99783 105795 57033 85467 | |
102400 16384 103461 110907 114343 112358 113824 99970 | |
iozone test complete. |
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rock64@rockpro64:/mnt$ sudo lspci -vvv | |
00:00.0 PCI bridge: Rockchip Inc. RK3399 PCI Express Root Port Device 0100 (prog-if 00 [Normal decode]) | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort+ <TAbort+ <MAbort+ >SERR+ <PERR+ INTx- | |
Latency: 0 | |
Interrupt: pin A routed to IRQ 239 | |
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 | |
I/O behind bridge: 00000000-00000fff | |
Memory behind bridge: fa000000-fa0fffff | |
Prefetchable memory behind bridge: 00000000-000fffff | |
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- | |
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- | |
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- | |
Capabilities: [80] Power Management version 3 | |
Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0+,D1+,D2-,D3hot+,D3cold-) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME+ | |
Capabilities: [90] MSI: Enable+ Count=1/1 Maskable+ 64bit+ | |
Address: 00000000fee30040 Data: 0000 | |
Masking: 00000000 Pending: 00000000 | |
Capabilities: [b0] MSI-X: Enable- Count=1 Masked- | |
Vector table: BAR=0 offset=00000000 | |
PBA: BAR=0 offset=00000008 | |
Capabilities: [c0] Express (v2) Root Port (Slot+), MSI 00 | |
DevCap: MaxPayload 256 bytes, PhantFunc 0 | |
ExtTag- RBE+ | |
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ | |
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ | |
MaxPayload 128 bytes, MaxReadReq 512 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
LnkCap: Port #0, Speed 5GT/s, Width x4, ASPM L1, Exit Latency L0s <256ns, L1 <8us | |
ClockPM- Surprise- LLActRep- BwNot+ ASPMOptComp+ | |
LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM- AutWidDis- BWInt+ AutBWInt+ | |
LnkSta: Speed 5GT/s, Width x4, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt- | |
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise- | |
Slot #0, PowerLimit 0.000W; Interlock- NoCompl- | |
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- | |
Control: AttnInd Off, PwrInd Off, Power+ Interlock- | |
SltSta: Status: AttnBtn- PowerFlt- MRL+ CmdCplt- PresDet- Interlock- | |
Changed: MRL- PresDet- LinkState- | |
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- | |
RootCap: CRSVisible- | |
RootSta: PME ReqID 0000, PMEStatus- PMEPending- | |
DevCap2: Completion Timeout: Range B, TimeoutDis+, LTR+, OBFF Via message ARIFwd+ | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd- | |
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- | |
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
Compliance De-emphasis: -6dB | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
Capabilities: [100 v2] Advanced Error Reporting | |
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- | |
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- | |
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- | |
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- | |
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ | |
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- | |
Capabilities: [274 v1] Transaction Processing Hints | |
Interrupt vector mode supported | |
Device specific mode supported | |
Steering table in TPH capability structure | |
Kernel driver in use: pcieport | |
01:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961 (prog-if 02 [NVM Express]) | |
Subsystem: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961 | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0 | |
Interrupt: pin A routed to IRQ 238 | |
Region 0: Memory at fa000000 (64-bit, non-prefetchable) [size=16K] | |
Capabilities: [40] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
Capabilities: [50] MSI: Enable- Count=1/32 Maskable- 64bit+ | |
Address: 0000000000000000 Data: 0000 | |
Capabilities: [70] Express (v2) Endpoint, MSI 00 | |
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited | |
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000W | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset- | |
MaxPayload 128 bytes, MaxReadReq 512 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- | |
LnkCap: Port #0, Speed 8GT/s, Width x4, ASPM L1, Exit Latency L0s unlimited, L1 <64us | |
ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+ | |
LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt- | |
LnkSta: Speed 5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- | |
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR+, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis- | |
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
Compliance De-emphasis: -6dB | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
Capabilities: [b0] MSI-X: Enable+ Count=8 Masked- | |
Vector table: BAR=0 offset=00003000 | |
PBA: BAR=0 offset=00002000 | |
Capabilities: [100 v2] Advanced Error Reporting | |
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- | |
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- | |
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- | |
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- | |
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ | |
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- | |
Capabilities: [148 v1] Device Serial Number 00-00-00-00-00-00-00-00 | |
Capabilities: [158 v1] Power Budgeting <?> | |
Capabilities: [168 v1] #19 | |
Capabilities: [188 v1] Latency Tolerance Reporting | |
Max snoop latency: 0ns | |
Max no snoop latency: 0ns | |
Capabilities: [190 v1] L1 PM Substates | |
L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+ | |
PortCommonModeRestoreTime=10us PortTPowerOnTime=10us | |
L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1- | |
T_CommonMode=0us LTR1.2_Threshold=0ns | |
L1SubCtl2: T_PwrOn=10us | |
Kernel driver in use: nvme |
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rock64@rockpro64:~$ sudo lspci -vvv | |
00:00.0 PCI bridge: Rockchip Inc. RK3399 PCI Express Root Port Device 0100 (prog-if 00 [Normal decode]) | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort+ <TAbort+ <MAbort+ >SERR+ <PERR+ INTx- | |
Latency: 0 | |
Interrupt: pin A routed to IRQ 239 | |
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 | |
I/O behind bridge: 00000000-00000fff | |
Memory behind bridge: fa000000-fa0fffff | |
Prefetchable memory behind bridge: 00000000-000fffff | |
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- | |
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- | |
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- | |
Capabilities: [80] Power Management version 3 | |
Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0+,D1+,D2-,D3hot+,D3cold-) | |
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME+ | |
Capabilities: [90] MSI: Enable+ Count=1/1 Maskable+ 64bit+ | |
Address: 00000000fee30040 Data: 0000 | |
Masking: 00000000 Pending: 00000000 | |
Capabilities: [b0] MSI-X: Enable- Count=1 Masked- | |
Vector table: BAR=0 offset=00000000 | |
PBA: BAR=0 offset=00000008 | |
Capabilities: [c0] Express (v2) Root Port (Slot+), MSI 00 | |
DevCap: MaxPayload 256 bytes, PhantFunc 0 | |
ExtTag- RBE+ | |
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ | |
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ | |
MaxPayload 128 bytes, MaxReadReq 512 bytes | |
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
LnkCap: Port #0, Speed 5GT/s, Width x4, ASPM L1, Exit Latency L0s <256ns, L1 <8us | |
ClockPM- Surprise- LLActRep- BwNot+ ASPMOptComp+ | |
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM- AutWidDis- BWInt+ AutBWInt+ | |
LnkSta: Speed 5GT/s, Width x1, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt- | |
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise- | |
Slot #0, PowerLimit 0.000W; Interlock- NoCompl- | |
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- | |
Control: AttnInd Off, PwrInd Off, Power+ Interlock- | |
SltSta: Status: AttnBtn- PowerFlt- MRL+ CmdCplt- PresDet- Interlock- | |
Changed: MRL- PresDet- LinkState- | |
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- | |
RootCap: CRSVisible- | |
RootSta: PME ReqID 0000, PMEStatus- PMEPending- | |
DevCap2: Completion Timeout: Range B, TimeoutDis+, LTR+, OBFF Via message ARIFwd+ | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd- | |
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- | |
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
Compliance De-emphasis: -6dB | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
Capabilities: [100 v2] Advanced Error Reporting | |
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- | |
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- | |
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- | |
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- | |
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ | |
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- | |
Capabilities: [274 v1] Transaction Processing Hints | |
Interrupt vector mode supported | |
Device specific mode supported | |
Steering table in TPH capability structure | |
Kernel driver in use: pcieport | |
01:00.0 SATA controller: ASMedia Technology Inc. ASM1062 Serial ATA Controller (rev 02) (prog-if 01 [AHCI 1.0]) | |
Subsystem: ASMedia Technology Inc. ASM1062 Serial ATA Controller | |
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ | |
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
Latency: 0 | |
Interrupt: pin A routed to IRQ 240 | |
Region 0: I/O ports at <unassigned> [disabled] | |
Region 1: I/O ports at <unassigned> [disabled] | |
Region 2: I/O ports at <unassigned> [disabled] | |
Region 3: I/O ports at <unassigned> [disabled] | |
Region 4: I/O ports at <unassigned> [disabled] | |
Region 5: Memory at fa010000 (32-bit, non-prefetchable) [size=512] | |
[virtual] Expansion ROM at fa000000 [disabled] [size=64K] | |
Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit- | |
Address: fee30040 Data: 0000 | |
Capabilities: [78] Power Management version 3 | |
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) | |
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- | |
Capabilities: [80] Express (v2) Legacy Endpoint, MSI 00 | |
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <1us, L1 <8us | |
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- | |
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ | |
MaxPayload 128 bytes, MaxReadReq 512 bytes | |
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
LnkCap: Port #1, Speed 5GT/s, Width x1, ASPM not supported, Exit Latency L0s unlimited, L1 <2us | |
ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp- | |
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- | |
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- | |
LnkSta: Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- | |
DevCap2: Completion Timeout: Range ABC, TimeoutDis+, LTR-, OBFF Not Supported | |
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- | |
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
Compliance De-emphasis: -6dB | |
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
Capabilities: [100 v1] Virtual Channel | |
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 | |
Arb: Fixed- WRR32- WRR64- WRR128- | |
Ctrl: ArbSelect=Fixed | |
Status: InProgress- | |
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- | |
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- | |
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff | |
Status: NegoPending- InProgress- | |
Kernel driver in use: ahci |
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