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June 9, 2025 22:42
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| /* automatically generated by rust-bindgen 0.65.1 */ | |
| #[repr(C)] | |
| #[derive(Copy, Clone, Debug, Default, Eq, Hash, Ord, PartialEq, PartialOrd)] | |
| pub struct __BindgenBitfieldUnit<Storage> { | |
| storage: Storage, | |
| } | |
| impl<Storage> __BindgenBitfieldUnit<Storage> { | |
| #[inline] | |
| pub const fn new(storage: Storage) -> Self { | |
| Self { storage } | |
| } | |
| } | |
| impl<Storage> __BindgenBitfieldUnit<Storage> | |
| where | |
| Storage: AsRef<[u8]> + AsMut<[u8]>, | |
| { | |
| #[inline] | |
| pub fn get_bit(&self, index: usize) -> bool { | |
| debug_assert!(index / 8 < self.storage.as_ref().len()); | |
| let byte_index = index / 8; | |
| let byte = self.storage.as_ref()[byte_index]; | |
| let bit_index = if cfg!(target_endian = "big") { | |
| 7 - (index % 8) | |
| } else { | |
| index % 8 | |
| }; | |
| let mask = 1 << bit_index; | |
| byte & mask == mask | |
| } | |
| #[inline] | |
| pub fn set_bit(&mut self, index: usize, val: bool) { | |
| debug_assert!(index / 8 < self.storage.as_ref().len()); | |
| let byte_index = index / 8; | |
| let byte = &mut self.storage.as_mut()[byte_index]; | |
| let bit_index = if cfg!(target_endian = "big") { | |
| 7 - (index % 8) | |
| } else { | |
| index % 8 | |
| }; | |
| let mask = 1 << bit_index; | |
| if val { | |
| *byte |= mask; | |
| } else { | |
| *byte &= !mask; | |
| } | |
| } | |
| #[inline] | |
| pub fn get(&self, bit_offset: usize, bit_width: u8) -> u64 { | |
| debug_assert!(bit_width <= 64); | |
| debug_assert!(bit_offset / 8 < self.storage.as_ref().len()); | |
| debug_assert!((bit_offset + (bit_width as usize)) / 8 <= self.storage.as_ref().len()); | |
| let mut val = 0; | |
| for i in 0..(bit_width as usize) { | |
| if self.get_bit(i + bit_offset) { | |
| let index = if cfg!(target_endian = "big") { | |
| bit_width as usize - 1 - i | |
| } else { | |
| i | |
| }; | |
| val |= 1 << index; | |
| } | |
| } | |
| val | |
| } | |
| #[inline] | |
| pub fn set(&mut self, bit_offset: usize, bit_width: u8, val: u64) { | |
| debug_assert!(bit_width <= 64); | |
| debug_assert!(bit_offset / 8 < self.storage.as_ref().len()); | |
| debug_assert!((bit_offset + (bit_width as usize)) / 8 <= self.storage.as_ref().len()); | |
| for i in 0..(bit_width as usize) { | |
| let mask = 1 << i; | |
| let val_bit_is_set = val & mask == mask; | |
| let index = if cfg!(target_endian = "big") { | |
| bit_width as usize - 1 - i | |
| } else { | |
| i | |
| }; | |
| self.set_bit(index + bit_offset, val_bit_is_set); | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default)] | |
| pub struct __IncompleteArrayField<T>(::core::marker::PhantomData<T>, [T; 0]); | |
| impl<T> __IncompleteArrayField<T> { | |
| #[inline] | |
| pub const fn new() -> Self { | |
| __IncompleteArrayField(::core::marker::PhantomData, []) | |
| } | |
| #[inline] | |
| pub fn as_ptr(&self) -> *const T { | |
| self as *const _ as *const T | |
| } | |
| #[inline] | |
| pub fn as_mut_ptr(&mut self) -> *mut T { | |
| self as *mut _ as *mut T | |
| } | |
| #[inline] | |
| pub unsafe fn as_slice(&self, len: usize) -> &[T] { | |
| ::core::slice::from_raw_parts(self.as_ptr(), len) | |
| } | |
| #[inline] | |
| pub unsafe fn as_mut_slice(&mut self, len: usize) -> &mut [T] { | |
| ::core::slice::from_raw_parts_mut(self.as_mut_ptr(), len) | |
| } | |
| } | |
| impl<T> ::core::fmt::Debug for __IncompleteArrayField<T> { | |
| fn fmt(&self, fmt: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { | |
| fmt.write_str("__IncompleteArrayField") | |
| } | |
| } | |
| #[repr(C)] | |
| pub struct __BindgenUnionField<T>(::core::marker::PhantomData<T>); | |
| impl<T> __BindgenUnionField<T> { | |
| #[inline] | |
| pub const fn new() -> Self { | |
| __BindgenUnionField(::core::marker::PhantomData) | |
| } | |
| #[inline] | |
| pub unsafe fn as_ref(&self) -> &T { | |
| ::core::mem::transmute(self) | |
| } | |
| #[inline] | |
| pub unsafe fn as_mut(&mut self) -> &mut T { | |
| ::core::mem::transmute(self) | |
| } | |
| } | |
| impl<T> ::core::default::Default for __BindgenUnionField<T> { | |
| #[inline] | |
| fn default() -> Self { | |
| Self::new() | |
| } | |
| } | |
| impl<T> ::core::clone::Clone for __BindgenUnionField<T> { | |
| #[inline] | |
| fn clone(&self) -> Self { | |
| Self::new() | |
| } | |
| } | |
| impl<T> ::core::marker::Copy for __BindgenUnionField<T> {} | |
| impl<T> ::core::fmt::Debug for __BindgenUnionField<T> { | |
| fn fmt(&self, fmt: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result { | |
| fmt.write_str("__BindgenUnionField") | |
| } | |
| } | |
| impl<T> ::core::hash::Hash for __BindgenUnionField<T> { | |
| fn hash<H: ::core::hash::Hasher>(&self, _state: &mut H) {} | |
| } | |
| impl<T> ::core::cmp::PartialEq for __BindgenUnionField<T> { | |
| fn eq(&self, _other: &__BindgenUnionField<T>) -> bool { | |
| true | |
| } | |
| } | |
| impl<T> ::core::cmp::Eq for __BindgenUnionField<T> {} | |
| pub const CONFIG_RING_BUFFER: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_SECCOMP_FILTER: u32 = 1; | |
| pub const CONFIG_SND_PROC_FS: u32 = 1; | |
| pub const CONFIG_CC_HAS_SANCOV_TRACE_PC: u32 = 1; | |
| pub const CONFIG_DEFAULT_INIT: &[u8; 1usize] = b"\0"; | |
| pub const CONFIG_ARM64_PAGE_SHIFT: u32 = 12; | |
| pub const CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE: u32 = 1; | |
| pub const CONFIG_INPUT_KEYBOARD: u32 = 1; | |
| pub const CONFIG_INET_TABLE_PERTURB_ORDER: u32 = 16; | |
| pub const CONFIG_ARCH_SUPPORTS_INT128: u32 = 1; | |
| pub const CONFIG_MEMORY_ISOLATION: u32 = 1; | |
| pub const CONFIG_RFS_ACCEL: u32 = 1; | |
| pub const CONFIG_ARCH_WANTS_THP_SWAP: u32 = 1; | |
| pub const CONFIG_CRC32: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_READ_LOCK_IRQ: u32 = 1; | |
| pub const CONFIG_I2C_BOARDINFO: u32 = 1; | |
| pub const CONFIG_PCI_ECAM: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_SET_MEMORY: u32 = 1; | |
| pub const CONFIG_GCC11_NO_ARRAY_BOUNDS: u32 = 1; | |
| pub const CONFIG_APPLE_PMGR_PWRSTATE: u32 = 1; | |
| pub const CONFIG_FIX_EARLYCON_MEM: u32 = 1; | |
| pub const CONFIG_INOTIFY_USER: u32 = 1; | |
| pub const CONFIG_HDMI: u32 = 1; | |
| pub const CONFIG_XLNX_EVENT_MANAGER: u32 = 1; | |
| pub const CONFIG_SAMPLES: u32 = 1; | |
| pub const CONFIG_NETWORK_FILESYSTEMS: u32 = 1; | |
| pub const CONFIG_ARM64_VA_BITS: u32 = 39; | |
| pub const CONFIG_GLOB: u32 = 1; | |
| pub const CONFIG_ARCH_WANT_LD_ORPHAN_WARN: u32 = 1; | |
| pub const CONFIG_CGROUP_DEVICE: u32 = 1; | |
| pub const CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC: u32 = 1; | |
| pub const CONFIG_ARCH_SUSPEND_POSSIBLE: u32 = 1; | |
| pub const CONFIG_MMU_LAZY_TLB_REFCOUNT: u32 = 1; | |
| pub const CONFIG_MAC80211_STA_HASH_MAX_SIZE: u32 = 0; | |
| pub const CONFIG_GPIO_ZYNQMP_MODEPIN: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_MMAP_RND_BITS: u32 = 1; | |
| pub const CONFIG_SSB_POSSIBLE: u32 = 1; | |
| pub const CONFIG_SPI_DYNAMIC: u32 = 1; | |
| pub const CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE: u32 = 1; | |
| pub const CONFIG_ZYNQMP_IPI_MBOX: u32 = 1; | |
| pub const CONFIG_USB_OHCI_LITTLE_ENDIAN: u32 = 1; | |
| pub const CONFIG_IOMMU_IO_PGTABLE_LPAE: u32 = 1; | |
| pub const CONFIG_FSNOTIFY: u32 = 1; | |
| pub const CONFIG_CRYPTO_MANAGER_DISABLE_TESTS: u32 = 1; | |
| pub const CONFIG_NET_PTP_CLASSIFY: u32 = 1; | |
| pub const CONFIG_GENERIC_SMP_IDLE_THREAD: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_QUALCOMM: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_NUMA_BALANCING: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_CRASH_DUMP: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_EZCHIP: u32 = 1; | |
| pub const CONFIG_DEFAULT_SECURITY_DAC: u32 = 1; | |
| pub const CONFIG_8139CP: u32 = 1; | |
| pub const CONFIG_HAVE_IRQ_TIME_ACCOUNTING: u32 = 1; | |
| pub const CONFIG_IPV6: u32 = 1; | |
| pub const CONFIG_HAVE_STACKPROTECTOR: u32 = 1; | |
| pub const CONFIG_BQL: u32 = 1; | |
| pub const CONFIG_DEFAULT_TCP_CONG: &[u8; 6usize] = b"cubic\0"; | |
| pub const CONFIG_DEVTMPFS: u32 = 1; | |
| pub const CONFIG_OF_IOMMU: u32 = 1; | |
| pub const CONFIG_APPLE_AIC: u32 = 1; | |
| pub const CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX: u32 = 16; | |
| pub const CONFIG_ARCH_SPARSEMEM_ENABLE: u32 = 1; | |
| pub const CONFIG_WLAN: u32 = 1; | |
| pub const CONFIG_NAMESPACES: u32 = 1; | |
| pub const CONFIG_HAVE_CMPXCHG_DOUBLE: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_HUGE_VMAP: u32 = 1; | |
| pub const CONFIG_SND_CTL_INPUT_VALIDATION: u32 = 1; | |
| pub const CONFIG_DEBUG_RT_MUTEXES: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_MICROCHIP: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_DAVICOM: u32 = 1; | |
| pub const CONFIG_SOFTIRQ_ON_OWN_STACK: u32 = 1; | |
| pub const CONFIG_PAGE_SIZE_LESS_THAN_256KB: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ: u32 = 1; | |
| pub const CONFIG_OF_RESERVED_MEM: u32 = 1; | |
| pub const CONFIG_LZO_DECOMPRESS: u32 = 1; | |
| pub const CONFIG_IOMMU_SUPPORT: u32 = 1; | |
| pub const CONFIG_ARM64_USE_LSE_ATOMICS: u32 = 1; | |
| pub const CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS: u32 = 1; | |
| pub const CONFIG_RD_LZMA: u32 = 1; | |
| pub const CONFIG_GPIO_PL061: u32 = 1; | |
| pub const CONFIG_I2C_XILINX: u32 = 1; | |
| pub const CONFIG_MODULES_USE_ELF_RELA: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_REALTEK: u32 = 1; | |
| pub const CONFIG_ETHERNET: u32 = 1; | |
| pub const CONFIG_HAVE_DMA_CONTIGUOUS: u32 = 1; | |
| pub const CONFIG_DQL: u32 = 1; | |
| pub const CONFIG_SOCK_CGROUP_DATA: u32 = 1; | |
| pub const CONFIG_COREDUMP: u32 = 1; | |
| pub const CONFIG_BCMA_POSSIBLE: u32 = 1; | |
| pub const CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO: u32 = 1; | |
| pub const CONFIG_VGA_ARB: u32 = 1; | |
| pub const CONFIG_SND_SOC: u32 = 1; | |
| pub const CONFIG_DEBUG_LOCK_ALLOC: u32 = 1; | |
| pub const CONFIG_PRINTK: u32 = 1; | |
| pub const CONFIG_TIMERFD: u32 = 1; | |
| pub const CONFIG_TRACEPOINTS: u32 = 1; | |
| pub const CONFIG_XILINX_DMA: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_SYSCALL_WRAPPER: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_SPIN_LOCK_BH: u32 = 1; | |
| pub const CONFIG_SHMEM: u32 = 1; | |
| pub const CONFIG_MIGRATION: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_JUMP_LABEL: u32 = 1; | |
| pub const CONFIG_BUILD_SALT: &[u8; 1usize] = b"\0"; | |
| pub const CONFIG_HAVE_ARCH_PREL32_RELOCATIONS: u32 = 1; | |
| pub const CONFIG_DECOMPRESS_LZMA: u32 = 1; | |
| pub const CONFIG_DEVTMPFS_MOUNT: u32 = 1; | |
| pub const CONFIG_EXCLUSIVE_SYSTEM_RAM: u32 = 1; | |
| pub const CONFIG_HAVE_PREEMPT_DYNAMIC: u32 = 1; | |
| pub const CONFIG_DNOTIFY: u32 = 1; | |
| pub const CONFIG_AS_HAS_ARMV8_3: u32 = 1; | |
| pub const CONFIG_GENERIC_NET_UTILS: u32 = 1; | |
| pub const CONFIG_DEBUG_WW_MUTEX_SLOWPATH: u32 = 1; | |
| pub const CONFIG_GPIOLIB_FASTPATH_LIMIT: u32 = 512; | |
| pub const CONFIG_ARCH_PROC_KCORE_TEXT: u32 = 1; | |
| pub const CONFIG_EXPORTFS: u32 = 1; | |
| pub const CONFIG_HAVE_FUNCTION_ERROR_INJECTION: u32 = 1; | |
| pub const CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT: u32 = 1; | |
| pub const CONFIG_ARM_GIC: u32 = 1; | |
| pub const CONFIG_SERIO: u32 = 1; | |
| pub const CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS: u32 = 1; | |
| pub const CONFIG_KCMP: u32 = 1; | |
| pub const CONFIG_RTC_INTF_SYSFS: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE: u32 = 1; | |
| pub const CONFIG_BLK_DEV_INITRD: u32 = 1; | |
| pub const CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE: u32 = 1; | |
| pub const CONFIG_PCPU_DEV_REFCNT: u32 = 1; | |
| pub const CONFIG_GDB_SCRIPTS: u32 = 1; | |
| pub const CONFIG_SPI_XILINX: u32 = 1; | |
| pub const CONFIG_ZLIB_INFLATE: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_SYNOPSYS: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_DLINK: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_WRITE_LOCK_BH: u32 = 1; | |
| pub const CONFIG_LOCKDEP_STACK_TRACE_BITS: u32 = 19; | |
| pub const CONFIG_RTC_INTF_PROC: u32 = 1; | |
| pub const CONFIG_PM_CLK: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_SPIN_TRYLOCK: u32 = 1; | |
| pub const CONFIG_CMA_SIZE_SEL_MBYTES: u32 = 1; | |
| pub const CONFIG_CC_IMPLICIT_FALLTHROUGH: &[u8; 25usize] = b"-Wimplicit-fallthrough=5\0"; | |
| pub const CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL: u32 = 1; | |
| pub const CONFIG_STACKTRACE_SUPPORT: u32 = 1; | |
| pub const CONFIG_RESET_CONTROLLER: u32 = 1; | |
| pub const CONFIG_RCU_TRACE: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_WRITE_LOCK: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_RALINK: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_MICROCHIP: u32 = 1; | |
| pub const CONFIG_NEED_SG_DMA_FLAGS: u32 = 1; | |
| pub const CONFIG_FUNCTION_ALIGNMENT: u32 = 4; | |
| pub const CONFIG_ARM64_ERRATUM_2658417: u32 = 1; | |
| pub const CONFIG_PCI_HOST_GENERIC: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_ADAPTEC: u32 = 1; | |
| pub const CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS: u32 = 1; | |
| pub const CONFIG_SOCK_RX_QUEUE_MAPPING: u32 = 1; | |
| pub const CONFIG_DRM_BRIDGE: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_SILAN: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_BROADCOM: u32 = 1; | |
| pub const CONFIG_GENERIC_CPU_AUTOPROBE: u32 = 1; | |
| pub const CONFIG_ARM_GIC_V2M: u32 = 1; | |
| pub const CONFIG_RATIONAL: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_INTEL: u32 = 1; | |
| pub const CONFIG_ARM64_LSE_ATOMICS: u32 = 1; | |
| pub const CONFIG_GENERIC_EARLY_IOREMAP: u32 = 1; | |
| pub const CONFIG_ZYNQMP_PM_DOMAINS: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_WANGXUN: u32 = 1; | |
| pub const CONFIG_AMPERE_ERRATUM_AC03_CPU_38: u32 = 1; | |
| pub const CONFIG_BLOCK: u32 = 1; | |
| pub const CONFIG_ARCH_STACKWALK: u32 = 1; | |
| pub const CONFIG_INIT_ENV_ARG_LIMIT: u32 = 32; | |
| pub const CONFIG_ARCH_INLINE_SPIN_UNLOCK: u32 = 1; | |
| pub const CONFIG_AF_UNIX_OOB: u32 = 1; | |
| pub const CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH: u32 = 1; | |
| pub const CONFIG_SND_PCM_XRUN_DEBUG: u32 = 1; | |
| pub const CONFIG_STRICT_KERNEL_RWX: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_KCSAN: u32 = 1; | |
| pub const CONFIG_BUG: u32 = 1; | |
| pub const CONFIG_CONTEXT_SWITCH_TRACER: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_DEBUG_WX: u32 = 1; | |
| pub const CONFIG_OF_OVERLAY: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE: u32 = 1; | |
| pub const CONFIG_PM: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH: u32 = 1; | |
| pub const CONFIG_PPS: u32 = 1; | |
| pub const CONFIG_SPI: u32 = 1; | |
| pub const CONFIG_RTC_SYSTOHC_DEVICE: &[u8; 5usize] = b"rtc0\0"; | |
| pub const CONFIG_OF_IRQ: u32 = 1; | |
| pub const CONFIG_LIBFDT: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_PURELIFI: u32 = 1; | |
| pub const CONFIG_IO_URING: u32 = 1; | |
| pub const CONFIG_VT: u32 = 1; | |
| pub const CONFIG_SECRETMEM: u32 = 1; | |
| pub const CONFIG_DTC: u32 = 1; | |
| pub const CONFIG_REGMAP_SPI: u32 = 1; | |
| pub const CONFIG_SPLIT_PTLOCK_CPUS: u32 = 4; | |
| pub const CONFIG_SBITMAP: u32 = 1; | |
| pub const CONFIG_APPLE_MAILBOX: u32 = 1; | |
| pub const CONFIG_POWER_SUPPLY: u32 = 1; | |
| pub const CONFIG_AS_HAS_ARMV8_4: u32 = 1; | |
| pub const CONFIG_ROCKCHIP_ERRATUM_3588001: u32 = 1; | |
| pub const CONFIG_ARCH_WANTS_NO_INSTR: u32 = 1; | |
| pub const CONFIG_SND_VERBOSE_PRINTK: u32 = 1; | |
| pub const CONFIG_SPI_SPIDEV: u32 = 1; | |
| pub const CONFIG_AS_IS_GNU: u32 = 1; | |
| pub const CONFIG_I2C_GPIO: u32 = 1; | |
| pub const CONFIG_ZONE_DMA: u32 = 1; | |
| pub const CONFIG_IRQ_WORK: u32 = 1; | |
| pub const CONFIG_PCI_MSI: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_SHADOW_CALL_STACK: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET: u32 = 1; | |
| pub const CONFIG_SPI_BITBANG: u32 = 1; | |
| pub const CONFIG_SPARSEMEM_EXTREME: u32 = 1; | |
| pub const CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI: u32 = 1; | |
| pub const CONFIG_VIRTIO_ANCHOR: u32 = 1; | |
| pub const CONFIG_LOG_CPU_MAX_BUF_SHIFT: u32 = 12; | |
| pub const CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419: u32 = 1; | |
| pub const CONFIG_VGA_ARB_MAX_GPUS: u32 = 16; | |
| pub const CONFIG_ARM_ARCH_TIMER: u32 = 1; | |
| pub const CONFIG_EVENT_TRACING: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_NMI_SAFE_THIS_CPU_OPS: u32 = 1; | |
| pub const CONFIG_SG_POOL: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_PACKET_ENGINES: u32 = 1; | |
| pub const CONFIG_DMA_COHERENT_POOL: u32 = 1; | |
| pub const CONFIG_BLK_MQ_PCI: u32 = 1; | |
| pub const CONFIG_FS_IOMAP: u32 = 1; | |
| pub const CONFIG_RD_ZSTD: u32 = 1; | |
| pub const CONFIG_NETDEVICES: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_KCOV: u32 = 1; | |
| pub const CONFIG_CGROUP_FREEZER: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_STACKLEAK: u32 = 1; | |
| pub const CONFIG_EVENTFD: u32 = 1; | |
| pub const CONFIG_LOCKDEP_BITS: u32 = 15; | |
| pub const CONFIG_DEBUG_RWSEMS: u32 = 1; | |
| pub const CONFIG_IPV6_SIT: u32 = 1; | |
| pub const CONFIG_AS_HAS_LDAPR: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS: u32 = 1; | |
| pub const CONFIG_DEBUG_INFO_COMPRESSED_NONE: u32 = 1; | |
| pub const CONFIG_HAVE_EBPF_JIT: u32 = 1; | |
| pub const CONFIG_PROC_PAGE_MONITOR: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_WRITE_UNLOCK: u32 = 1; | |
| pub const CONFIG_BPF: u32 = 1; | |
| pub const CONFIG_RD_LZO: u32 = 1; | |
| pub const CONFIG_HAVE_FUNCTION_GRAPH_RETVAL: u32 = 1; | |
| pub const CONFIG_CC_HAS_ASM_INLINE: u32 = 1; | |
| pub const CONFIG_OF_RESOLVE: u32 = 1; | |
| pub const CONFIG_GPIO_CDEV_V1: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_SEEQ: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_RELR: u32 = 1; | |
| pub const CONFIG_ARCH_FORCE_MAX_ORDER: u32 = 10; | |
| pub const CONFIG_GENERIC_STRNLEN_USER: u32 = 1; | |
| pub const CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_RSI: u32 = 1; | |
| pub const CONFIG_HAVE_DYNAMIC_FTRACE: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_RDC: u32 = 1; | |
| pub const CONFIG_PGTABLE_LEVELS: u32 = 3; | |
| pub const CONFIG_APPLE_RTKIT: u32 = 1; | |
| pub const CONFIG_SPARSE_IRQ: u32 = 1; | |
| pub const CONFIG_RCU_STALL_COMMON: u32 = 1; | |
| pub const CONFIG_DEBUG_BUGVERBOSE: u32 = 1; | |
| pub const CONFIG_BUILDTIME_TABLE_SORT: u32 = 1; | |
| pub const CONFIG_NVMEM: u32 = 1; | |
| pub const CONFIG_INET_TUNNEL: u32 = 1; | |
| pub const CONFIG_GENERIC_CLOCKEVENTS: u32 = 1; | |
| pub const CONFIG_RUSTC_VERSION_TEXT: &[u8; 36usize] = b"rustc 1.75.0 (82e1608df 2023-12-21)\0"; | |
| pub const CONFIG_MFD_CORE: u32 = 1; | |
| pub const CONFIG_SERIAL_AMBA_PL011: u32 = 1; | |
| pub const CONFIG_CONSOLE_TRANSLATIONS: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_ATOMIC_RMW: u32 = 1; | |
| pub const CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED: u32 = 1; | |
| pub const CONFIG_SERIAL_EARLYCON: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_NI: u32 = 1; | |
| pub const CONFIG_CC_HAS_KASAN_SW_TAGS: u32 = 1; | |
| pub const CONFIG_ETHTOOL_NETLINK: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_KEXEC_FILE: u32 = 1; | |
| pub const CONFIG_DUMMY_CONSOLE: u32 = 1; | |
| pub const CONFIG_SERIAL_AMBA_PL011_CONSOLE: u32 = 1; | |
| pub const CONFIG_GENERIC_IOREMAP: u32 = 1; | |
| pub const CONFIG_COMMON_CLK_ZYNQMP: u32 = 1; | |
| pub const CONFIG_ARCH_MMAP_RND_BITS_MAX: u32 = 24; | |
| pub const CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE: u32 = 1; | |
| pub const CONFIG_TRACE_IRQFLAGS_SUPPORT: u32 = 1; | |
| pub const CONFIG_MFD_SYSCON: u32 = 1; | |
| pub const CONFIG_BLK_CGROUP: u32 = 1; | |
| pub const CONFIG_PCIE_BUS_DEFAULT: u32 = 1; | |
| pub const CONFIG_GPIO_VIRTIO: u32 = 1; | |
| pub const CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN: u32 = 11; | |
| pub const CONFIG_CRYPTO_LIB_UTILS: u32 = 1; | |
| pub const CONFIG_RD_GZIP: u32 = 1; | |
| pub const CONFIG_HAVE_REGS_AND_STACK_ACCESS_API: u32 = 1; | |
| pub const CONFIG_BLK_PM: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_READ_LOCK: u32 = 1; | |
| pub const CONFIG_TREE_RCU: u32 = 1; | |
| pub const CONFIG_ALLOW_DEV_COREDUMP: u32 = 1; | |
| pub const CONFIG_SWIOTLB: u32 = 1; | |
| pub const CONFIG_GRO_CELLS: u32 = 1; | |
| pub const CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN: u32 = 1; | |
| pub const CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_CORTINA: u32 = 1; | |
| pub const CONFIG_SND_DEBUG_VERBOSE: u32 = 1; | |
| pub const CONFIG_ELFCORE: u32 = 1; | |
| pub const CONFIG_HAVE_KVM: u32 = 1; | |
| pub const CONFIG_INIT_STACK_NONE: u32 = 1; | |
| pub const CONFIG_BINFMT_ELF: u32 = 1; | |
| pub const CONFIG_HAVE_PERF_REGS: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_ALTEON: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_RENESAS: u32 = 1; | |
| pub const CONFIG_DEBUG_MUTEXES: u32 = 1; | |
| pub const CONFIG_DRM_PANEL_ORIENTATION_QUIRKS: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_AUDITSYSCALL: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ: u32 = 1; | |
| pub const CONFIG_LEGACY_TIOCSTI: u32 = 1; | |
| pub const CONFIG_ARM64_PA_BITS_48: u32 = 1; | |
| pub const CONFIG_CRYPTO_HW: u32 = 1; | |
| pub const CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS: u32 = 1; | |
| pub const CONFIG_HARDIRQS_SW_RESEND: u32 = 1; | |
| pub const CONFIG_SPI_MASTER: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_KEEPINITRD: u32 = 1; | |
| pub const CONFIG_UNMAP_KERNEL_AT_EL0: u32 = 1; | |
| pub const CONFIG_XZ_DEC_X86: u32 = 1; | |
| pub const CONFIG_CONSOLE_LOGLEVEL_QUIET: u32 = 4; | |
| pub const CONFIG_CRC16: u32 = 1; | |
| pub const CONFIG_GENERIC_CALIBRATE_DELAY: u32 = 1; | |
| pub const CONFIG_HZ_PERIODIC: u32 = 1; | |
| pub const CONFIG_TMPFS: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_NETERION: u32 = 1; | |
| pub const CONFIG_RANDSTRUCT_NONE: u32 = 1; | |
| pub const CONFIG_FUTEX: u32 = 1; | |
| pub const CONFIG_UNIX_SCM: u32 = 1; | |
| pub const CONFIG_CONSOLE_LOGLEVEL_DEFAULT: u32 = 7; | |
| pub const CONFIG_REGMAP_I2C: u32 = 1; | |
| pub const CONFIG_GENERIC_SCHED_CLOCK: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_FAST_MULTIPLIER: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_REALTEK: u32 = 1; | |
| pub const CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG: u32 = 1; | |
| pub const CONFIG_RTC_HCTOSYS: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_BITREVERSE: u32 = 1; | |
| pub const CONFIG_SERIAL_CORE_CONSOLE: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_EMULEX: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ: u32 = 1; | |
| pub const CONFIG_LD_ORPHAN_WARN_LEVEL: &[u8; 5usize] = b"warn\0"; | |
| pub const CONFIG_SLUB_DEBUG: u32 = 1; | |
| pub const CONFIG_DMADEVICES: u32 = 1; | |
| pub const CONFIG_PAHOLE_VERSION: u32 = 0; | |
| pub const CONFIG_ARCH_SUPPORTS_CFI_CLANG: u32 = 1; | |
| pub const CONFIG_IPV6_NDISC_NODETYPE: u32 = 1; | |
| pub const CONFIG_ARCH_WANT_DEFAULT_BPF_JIT: u32 = 1; | |
| pub const CONFIG_CGROUP_SCHED: u32 = 1; | |
| pub const CONFIG_QUEUED_RWLOCKS: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_GIGANTIC_PAGE: u32 = 1; | |
| pub const CONFIG_HAVE_DEBUG_KMEMLEAK: u32 = 1; | |
| pub const CONFIG_ARM_GIC_V3_ITS: u32 = 1; | |
| pub const CONFIG_KEYBOARD_GPIO: u32 = 1; | |
| pub const CONFIG_PAGE_SIZE_LESS_THAN_64KB: u32 = 1; | |
| pub const CONFIG_CONTEXT_TRACKING: u32 = 1; | |
| pub const CONFIG_GENERIC_IRQ_IPI: u32 = 1; | |
| pub const CONFIG_IOMMU_IOVA: u32 = 1; | |
| pub const CONFIG_DUMMY_CONSOLE_COLUMNS: u32 = 80; | |
| pub const CONFIG_XXHASH: u32 = 1; | |
| pub const CONFIG_SOUND: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE: u32 = 1; | |
| pub const CONFIG_ARCH_USE_SYM_ANNOTATIONS: u32 = 1; | |
| pub const CONFIG_UNIX: u32 = 1; | |
| pub const CONFIG_CC_CAN_LINK: u32 = 1; | |
| pub const CONFIG_LD_IS_BFD: u32 = 1; | |
| pub const CONFIG_HAVE_CLK: u32 = 1; | |
| pub const CONFIG_CRYPTO_HASH2: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_VERTEXCOM: u32 = 1; | |
| pub const CONFIG_DEFAULT_HOSTNAME: &[u8; 7usize] = b"(none)\0"; | |
| pub const CONFIG_CC_HAS_NO_PROFILE_FN_ATTR: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_READ_UNLOCK: u32 = 1; | |
| pub const CONFIG_MEMBARRIER: u32 = 1; | |
| pub const CONFIG_XPS: u32 = 1; | |
| pub const CONFIG_LZ4_DECOMPRESS: u32 = 1; | |
| pub const CONFIG_ADVISE_SYSCALLS: u32 = 1; | |
| pub const CONFIG_CRYPTO_ALGAPI: u32 = 1; | |
| pub const CONFIG_GENERIC_IRQ_SHOW_LEVEL: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_WIZNET: u32 = 1; | |
| pub const CONFIG_SCHED_MM_CID: u32 = 1; | |
| pub const CONFIG_RD_BZIP2: u32 = 1; | |
| pub const CONFIG_LOCKDEP_STACK_TRACE_HASH_BITS: u32 = 14; | |
| pub const CONFIG_HAVE_ARM_SMCCC_DISCOVERY: u32 = 1; | |
| pub const CONFIG_GPIO_CDEV: u32 = 1; | |
| pub const CONFIG_CC_VERSION_TEXT: &[u8; 30usize] = b"gcc (Debian 12.2.0-14) 12.2.0\0"; | |
| pub const CONFIG_KEYBOARD_ATKBD: u32 = 1; | |
| pub const CONFIG_NET_IP_TUNNEL: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_OKI: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_INTERSIL: u32 = 1; | |
| pub const CONFIG_NVMEM_APPLE_EFUSES: u32 = 1; | |
| pub const CONFIG_FAIR_GROUP_SCHED: u32 = 1; | |
| pub const CONFIG_CRYPTO_HASH: u32 = 1; | |
| pub const CONFIG_EFI_PARTITION: u32 = 1; | |
| pub const CONFIG_TRACE_CLOCK: u32 = 1; | |
| pub const CONFIG_LOG_BUF_SHIFT: u32 = 17; | |
| pub const CONFIG_WLAN_VENDOR_ATH: u32 = 1; | |
| pub const CONFIG_EXTRA_FIRMWARE: &[u8; 1usize] = b"\0"; | |
| pub const CONFIG_NET_VENDOR_8390: u32 = 1; | |
| pub const CONFIG_HAVE_KCSAN_COMPILER: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH: u32 = 1; | |
| pub const CONFIG_CRC32_SLICEBY8: u32 = 1; | |
| pub const CONFIG_DMADEVICES_VDEBUG: u32 = 1; | |
| pub const CONFIG_CPU_RMAP: u32 = 1; | |
| pub const CONFIG_RUST_IS_AVAILABLE: u32 = 1; | |
| pub const CONFIG_ARM64_ERRATUM_843419: u32 = 1; | |
| pub const CONFIG_RTC_DRV_PL031: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ: u32 = 1; | |
| pub const CONFIG_INPUT_VIVALDIFMAP: u32 = 1; | |
| pub const CONFIG_MULTIUSER: u32 = 1; | |
| pub const CONFIG_DMA_OF: u32 = 1; | |
| pub const CONFIG_GENERIC_VDSO_TIME_NS: u32 = 1; | |
| pub const CONFIG_CLANG_VERSION: u32 = 0; | |
| pub const CONFIG_FS_MBCACHE: u32 = 1; | |
| pub const CONFIG_RTC_CLASS: u32 = 1; | |
| pub const CONFIG_EXT4_USE_FOR_EXT2: u32 = 1; | |
| pub const CONFIG_ARM_AMBA: u32 = 1; | |
| pub const CONFIG_TIMER_OF: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_DMA_PREP_COHERENT: u32 = 1; | |
| pub const CONFIG_HAVE_FUNCTION_TRACER: u32 = 1; | |
| pub const CONFIG_GENERIC_PHY: u32 = 1; | |
| pub const CONFIG_ARM64_ERRATUM_2645198: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_PTE_SPECIAL: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_MYRI: u32 = 1; | |
| pub const CONFIG_ARM64_AS_HAS_MTE: u32 = 1; | |
| pub const CONFIG_PM_GENERIC_DOMAINS_OF: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG: u32 = 1; | |
| pub const CONFIG_GENERIC_PCI_IOMAP: u32 = 1; | |
| pub const CONFIG_SLUB: u32 = 1; | |
| pub const CONFIG_XZ_DEC_BCJ: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN: u32 = 1; | |
| pub const CONFIG_I2C: u32 = 1; | |
| pub const CONFIG_MMU_GATHER_TABLE_FREE: u32 = 1; | |
| pub const CONFIG_BINFMT_SCRIPT: u32 = 1; | |
| pub const CONFIG_FRAME_POINTER: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_SPIN_LOCK: u32 = 1; | |
| pub const CONFIG_TICK_CPU_ACCOUNTING: u32 = 1; | |
| pub const CONFIG_VM_EVENT_COUNTERS: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_BROADCOM: u32 = 1; | |
| pub const CONFIG_I2C_SLAVE: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_AMD: u32 = 1; | |
| pub const CONFIG_BASE_FULL: u32 = 1; | |
| pub const CONFIG_CACHESTAT_SYSCALL: u32 = 1; | |
| pub const CONFIG_RSEQ: u32 = 1; | |
| pub const CONFIG_GPIO_SYSFS: u32 = 1; | |
| pub const CONFIG_FW_LOADER: u32 = 1; | |
| pub const CONFIG_KALLSYMS: u32 = 1; | |
| pub const CONFIG_COMMON_CLK: u32 = 1; | |
| pub const CONFIG_PCI: u32 = 1; | |
| pub const CONFIG_RTC_HCTOSYS_DEVICE: &[u8; 5usize] = b"rtc0\0"; | |
| pub const CONFIG_HAVE_ARCH_COMPILER_H: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_FUNGIBLE: u32 = 1; | |
| pub const CONFIG_CONTIG_ALLOC: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_ASIX: u32 = 1; | |
| pub const CONFIG_DECOMPRESS_XZ: u32 = 1; | |
| pub const CONFIG_PCI_QUIRKS: u32 = 1; | |
| pub const CONFIG_MII: u32 = 1; | |
| pub const CONFIG_SIGNALFD: u32 = 1; | |
| pub const CONFIG_NET_CORE: u32 = 1; | |
| pub const CONFIG_EXT4_FS: u32 = 1; | |
| pub const CONFIG_UNINLINE_SPIN_UNLOCK: u32 = 1; | |
| pub const CONFIG_SND_JACK_INPUT_DEV: u32 = 1; | |
| pub const CONFIG_HAVE_SAMPLE_FTRACE_DIRECT: u32 = 1; | |
| pub const CONFIG_XZ_DEC: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_TI: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_ALACRITECH: u32 = 1; | |
| pub const CONFIG_CC_HAVE_SHADOW_CALL_STACK: u32 = 1; | |
| pub const CONFIG_HAS_IOMEM: u32 = 1; | |
| pub const CONFIG_DMA_DIRECT_REMAP: u32 = 1; | |
| pub const CONFIG_GENERIC_IRQ_PROBE: u32 = 1; | |
| pub const CONFIG_APPLE_DART: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ: u32 = 1; | |
| pub const CONFIG_HAVE_MOVE_PUD: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_SETUP_DMA_OPS: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_KASAN_VMALLOC: u32 = 1; | |
| pub const CONFIG_CONSTRUCTORS: u32 = 1; | |
| pub const CONFIG_EPOLL: u32 = 1; | |
| pub const CONFIG_SND_PCM: u32 = 1; | |
| pub const CONFIG_RUST_OVERFLOW_CHECKS: u32 = 1; | |
| pub const CONFIG_GENERIC_PTDUMP: u32 = 1; | |
| pub const CONFIG_AS_HAS_ARMV8_5: u32 = 1; | |
| pub const CONFIG_NET: u32 = 1; | |
| pub const CONFIG_INPUT_EVDEV: u32 = 1; | |
| pub const CONFIG_SND_JACK: u32 = 1; | |
| pub const CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN: u32 = 1; | |
| pub const CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC: u32 = 1; | |
| pub const CONFIG_ARM64_ERRATUM_2441007: u32 = 1; | |
| pub const CONFIG_IRQ_DOMAIN_HIERARCHY: u32 = 1; | |
| pub const CONFIG_PACKET: u32 = 1; | |
| pub const CONFIG_SND_SIMPLE_CARD_UTILS: u32 = 1; | |
| pub const CONFIG_HAVE_CLK_PREPARE: u32 = 1; | |
| pub const CONFIG_SND_CTL_FAST_LOOKUP: u32 = 1; | |
| pub const CONFIG_DUMMY_CONSOLE_ROWS: u32 = 25; | |
| pub const CONFIG_NOP_TRACER: u32 = 1; | |
| pub const CONFIG_INET: u32 = 1; | |
| pub const CONFIG_XZ_DEC_POWERPC: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_HUAWEI: u32 = 1; | |
| pub const CONFIG_FREEZER: u32 = 1; | |
| pub const CONFIG_COMMON_CLK_APPLE_NCO: u32 = 1; | |
| pub const CONFIG_ARM64_4K_PAGES: u32 = 1; | |
| pub const CONFIG_PCI_DOMAINS: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_CHELSIO: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_VMAP_STACK: u32 = 1; | |
| pub const CONFIG_RTC_LIB: u32 = 1; | |
| pub const CONFIG_HAVE_KPROBES: u32 = 1; | |
| pub const CONFIG_HAVE_GENERIC_VDSO: u32 = 1; | |
| pub const CONFIG_GPIOLIB: u32 = 1; | |
| pub const CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT: u32 = 1; | |
| pub const CONFIG_FUTEX_PI: u32 = 1; | |
| pub const CONFIG_GENERIC_CPU_VULNERABILITIES: u32 = 1; | |
| pub const CONFIG_DMA_NONCOHERENT_MMAP: u32 = 1; | |
| pub const CONFIG_SND_SOC_PCM3168A: u32 = 1; | |
| pub const CONFIG_UIO: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_AQUANTIA: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_KASAN: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_SMSC: u32 = 1; | |
| pub const CONFIG_GENERIC_ARCH_TOPOLOGY: u32 = 1; | |
| pub const CONFIG_SERIO_SERPORT: u32 = 1; | |
| pub const CONFIG_CLONE_BACKWARDS: u32 = 1; | |
| pub const CONFIG_HAVE_NMI: u32 = 1; | |
| pub const CONFIG_RD_XZ: u32 = 1; | |
| pub const CONFIG_HAVE_PREEMPT_DYNAMIC_KEY: u32 = 1; | |
| pub const CONFIG_SND_DRIVERS: u32 = 1; | |
| pub const CONFIG_NET_FLOW_LIMIT: u32 = 1; | |
| pub const CONFIG_LOCKDEP_SUPPORT: u32 = 1; | |
| pub const CONFIG_ARCH_WANT_HUGE_PMD_SHARE: u32 = 1; | |
| pub const CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE: u32 = 1; | |
| pub const CONFIG_GENERIC_STRNCPY_FROM_USER: u32 = 1; | |
| pub const CONFIG_HAVE_RSEQ: u32 = 1; | |
| pub const CONFIG_OF_KOBJ: u32 = 1; | |
| pub const CONFIG_CONTEXT_TRACKING_IDLE: u32 = 1; | |
| pub const CONFIG_DEBUG_SPINLOCK: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_DEC: u32 = 1; | |
| pub const CONFIG_ILLEGAL_POINTER_VALUE: i64 = -2401263026318606336; | |
| pub const CONFIG_GENERIC_GETTIMEOFDAY: u32 = 1; | |
| pub const CONFIG_ARCH_USE_MEMTEST: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_PENSANDO: u32 = 1; | |
| pub const CONFIG_NEED_DMA_MAP_STATE: u32 = 1; | |
| pub const CONFIG_SND_HDA_PREALLOC_SIZE: u32 = 64; | |
| pub const CONFIG_SERIO_LIBPS2: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_KASAN_SW_TAGS: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_ATHEROS: u32 = 1; | |
| pub const CONFIG_RELOCATABLE: u32 = 1; | |
| pub const CONFIG_QUEUED_SPINLOCKS: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_SUN: u32 = 1; | |
| pub const CONFIG_PANIC_TIMEOUT: u32 = 0; | |
| pub const CONFIG_HAVE_ARCH_SECCOMP: u32 = 1; | |
| pub const CONFIG_STACKDEPOT: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_XILINX: u32 = 1; | |
| pub const CONFIG_DECOMPRESS_LZ4: u32 = 1; | |
| pub const CONFIG_PREEMPT_NONE: u32 = 1; | |
| pub const CONFIG_SMP: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_CADENCE: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_MICROSOFT: u32 = 1; | |
| pub const CONFIG_TTY: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_I825XX: u32 = 1; | |
| pub const CONFIG_IOMMU_DMA: u32 = 1; | |
| pub const CONFIG_RCU_EXP_CPU_STALL_TIMEOUT: u32 = 0; | |
| pub const CONFIG_GENERIC_ALLOCATOR: u32 = 1; | |
| pub const CONFIG_KALLSYMS_ALL: u32 = 1; | |
| pub const CONFIG_SND_SOC_PCM3168A_I2C: u32 = 1; | |
| pub const CONFIG_GENERIC_BUG: u32 = 1; | |
| pub const CONFIG_HAVE_FTRACE_MCOUNT_RECORD: u32 = 1; | |
| pub const CONFIG_POSIX_TIMERS: u32 = 1; | |
| pub const CONFIG_INET_TCP_DIAG: u32 = 1; | |
| pub const CONFIG_HW_CONSOLE: u32 = 1; | |
| pub const CONFIG_DEVMEM: u32 = 1; | |
| pub const CONFIG_CRYPTO_LIB_SHA1: u32 = 1; | |
| pub const CONFIG_SND_SPI: u32 = 1; | |
| pub const CONFIG_LOCKDEP_CIRCULAR_QUEUE_BITS: u32 = 12; | |
| pub const CONFIG_PREEMPT_NONE_BUILD: u32 = 1; | |
| pub const CONFIG_IRQ_MSI_IOMMU: u32 = 1; | |
| pub const CONFIG_RTC_NVMEM: u32 = 1; | |
| pub const CONFIG_ZSTD_COMMON: u32 = 1; | |
| pub const CONFIG_HAVE_IOREMAP_PROT: u32 = 1; | |
| pub const CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC: u32 = 1; | |
| pub const CONFIG_CC_HAS_KASAN_GENERIC: u32 = 1; | |
| pub const CONFIG_ZYNQMP_POWER: u32 = 1; | |
| pub const CONFIG_HAVE_ARM_SMCCC: u32 = 1; | |
| pub const CONFIG_DEBUG_KERNEL: u32 = 1; | |
| pub const CONFIG_LOCALVERSION: &[u8; 1usize] = b"\0"; | |
| pub const CONFIG_PROVE_RCU: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU: u32 = 1; | |
| pub const CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK: u32 = 1; | |
| pub const CONFIG_CRYPTO: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_BROCADE: u32 = 1; | |
| pub const CONFIG_DEFAULT_MMAP_MIN_ADDR: u32 = 4096; | |
| pub const CONFIG_CMDLINE: &[u8; 42usize] = b"console=ttyAMA0 nokaslr rdinit=/sbin/init\0"; | |
| pub const CONFIG_NET_VENDOR_QLOGIC: u32 = 1; | |
| pub const CONFIG_VIRTIO: u32 = 1; | |
| pub const CONFIG_STRICT_DEVMEM: u32 = 1; | |
| pub const CONFIG_GENERIC_IRQ_SHOW: u32 = 1; | |
| pub const CONFIG_NVMEM_SYSFS: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_ELF_RANDOMIZE: u32 = 1; | |
| pub const CONFIG_HAVE_FUNCTION_ARG_ACCESS_API: u32 = 1; | |
| pub const CONFIG_PANIC_ON_OOPS_VALUE: u32 = 0; | |
| pub const CONFIG_NET_VENDOR_SAMSUNG: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_ADI: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_READ_LOCK_BH: u32 = 1; | |
| pub const CONFIG_SCSI_MOD: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_MICREL: u32 = 1; | |
| pub const CONFIG_CRYPTO_CRC32C: u32 = 1; | |
| pub const CONFIG_SERIAL_CORE: u32 = 1; | |
| pub const CONFIG_HAVE_KRETPROBES: u32 = 1; | |
| pub const CONFIG_CC_HAS_ZERO_CALL_USED_REGS: u32 = 1; | |
| pub const CONFIG_MAILBOX: u32 = 1; | |
| pub const CONFIG_RCU_NEED_SEGCBLIST: u32 = 1; | |
| pub const CONFIG_ARCH_ZYNQMP: u32 = 1; | |
| pub const CONFIG_HAS_DMA: u32 = 1; | |
| pub const CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG: u32 = 1; | |
| pub const CONFIG_ARCH_BINFMT_ELF_STATE: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST: u32 = 1; | |
| pub const CONFIG_CC_HAS_BRANCH_PROT_PAC_RET: u32 = 1; | |
| pub const CONFIG_DMA_DECLARE_COHERENT: u32 = 1; | |
| pub const CONFIG_CGROUP_NET_PRIO: u32 = 1; | |
| pub const CONFIG_DMADEVICES_DEBUG: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_MELLANOX: u32 = 1; | |
| pub const CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_CURRENT_STACK_POINTER: u32 = 1; | |
| pub const CONFIG_PTP_1588_CLOCK: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_CACHE_LINE_SIZE: u32 = 1; | |
| pub const CONFIG_JBD2: u32 = 1; | |
| pub const CONFIG_SPARSEMEM_VMEMMAP: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_MARVELL: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_NVIDIA: u32 = 1; | |
| pub const CONFIG_IRQ_DOMAIN: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_DEBUG_VIRTUAL: u32 = 1; | |
| pub const CONFIG_HAVE_ASM_MODVERSIONS: u32 = 1; | |
| pub const CONFIG_ARCH_MMAP_RND_BITS_MIN: u32 = 18; | |
| pub const CONFIG_ARCH_SUPPORTS_LTO_CLANG: u32 = 1; | |
| pub const CONFIG_DECOMPRESS_BZIP2: u32 = 1; | |
| pub const CONFIG_PER_VMA_LOCK: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_UPROBES: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_STMICRO: u32 = 1; | |
| pub const CONFIG_OF_DYNAMIC: u32 = 1; | |
| pub const CONFIG_XZ_DEC_SPARC: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE: u32 = 1; | |
| pub const CONFIG_OF_GPIO: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_HUGETLBFS: u32 = 1; | |
| pub const CONFIG_ARM64_ERRATUM_2441009: u32 = 1; | |
| pub const CONFIG_DST_CACHE: u32 = 1; | |
| pub const CONFIG_RCU_CPU_STALL_TIMEOUT: u32 = 21; | |
| pub const CONFIG_POSIX_CPU_TIMERS_TASK_WORK: u32 = 1; | |
| pub const CONFIG_SND_VERBOSE_PROCFS: u32 = 1; | |
| pub const CONFIG_LLD_VERSION: u32 = 0; | |
| pub const CONFIG_NEED_SG_DMA_LENGTH: u32 = 1; | |
| pub const CONFIG_TIMER_PROBE: u32 = 1; | |
| pub const CONFIG_POWER_RESET: u32 = 1; | |
| pub const CONFIG_PCIEASPM_DEFAULT: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_AMAZON: u32 = 1; | |
| pub const CONFIG_SPARSEMEM: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_ATMEL: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_HISILICON: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_TEHUTI: u32 = 1; | |
| pub const CONFIG_EDAC_SUPPORT: u32 = 1; | |
| pub const CONFIG_RT_MUTEXES: u32 = 1; | |
| pub const CONFIG_LOCK_SPIN_ON_OWNER: u32 = 1; | |
| pub const CONFIG_PCI_SYSCALL: u32 = 1; | |
| pub const CONFIG_CC_NO_ARRAY_BOUNDS: u32 = 1; | |
| pub const CONFIG_KERNFS: u32 = 1; | |
| pub const CONFIG_I2C_ALGOBIT: u32 = 1; | |
| pub const CONFIG_IOMMU_DEFAULT_DMA_STRICT: u32 = 1; | |
| pub const CONFIG_SND_SIMPLE_CARD: u32 = 1; | |
| pub const CONFIG_EXPERT: u32 = 1; | |
| pub const CONFIG_WIRELESS: u32 = 1; | |
| pub const CONFIG_HZ_250: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_STRICT_KERNEL_RWX: u32 = 1; | |
| pub const CONFIG_LOCK_DEBUGGING_SUPPORT: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE: u32 = 1; | |
| pub const CONFIG_HAVE_RUST: u32 = 1; | |
| pub const CONFIG_FRAME_WARN: u32 = 2048; | |
| pub const CONFIG_IOMMU_IO_PGTABLE_DART: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_AGERE: u32 = 1; | |
| pub const CONFIG_ARCH_MMAP_RND_BITS: u32 = 18; | |
| pub const CONFIG_GENERIC_HWEIGHT: u32 = 1; | |
| pub const CONFIG_INITRAMFS_SOURCE: &[u8; 1usize] = b"\0"; | |
| pub const CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE: u32 = 1; | |
| pub const CONFIG_CGROUPS: u32 = 1; | |
| pub const CONFIG_PROVE_LOCKING: u32 = 1; | |
| pub const CONFIG_HAVE_GCC_PLUGINS: u32 = 1; | |
| pub const CONFIG_STACKTRACE: u32 = 1; | |
| pub const CONFIG_HAVE_PCI: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC: u32 = 1; | |
| pub const CONFIG_HAS_IOPORT: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE: u32 = 1; | |
| pub const CONFIG_CC_HAS_SIGN_RETURN_ADDRESS: u32 = 1; | |
| pub const CONFIG_OF_EARLY_FLATTREE: u32 = 1; | |
| pub const CONFIG_SND_DEBUG: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_ADMTEK: u32 = 1; | |
| pub const CONFIG_CGROUP_CPUACCT: u32 = 1; | |
| pub const CONFIG_HAS_IOPORT_MAP: u32 = 1; | |
| pub const CONFIG_HAVE_FAST_GUP: u32 = 1; | |
| pub const CONFIG_ARM64_PA_BITS: u32 = 48; | |
| pub const CONFIG_NET_VENDOR_VIA: u32 = 1; | |
| pub const CONFIG_HZ: u32 = 250; | |
| pub const CONFIG_RUST: u32 = 1; | |
| pub const CONFIG_I2C_HELPER_AUTO: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_STRICT_MODULE_RWX: u32 = 1; | |
| pub const CONFIG_CC_IS_GCC: u32 = 1; | |
| pub const CONFIG_DMA_OPS: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_ARC: u32 = 1; | |
| pub const CONFIG_AS_HAS_CFI_NEGATE_RA_STATE: u32 = 1; | |
| pub const CONFIG_RANDOMIZE_KSTACK_OFFSET: u32 = 1; | |
| pub const CONFIG_HAVE_PERF_USER_STACK_DUMP: u32 = 1; | |
| pub const CONFIG_LOCKDEP_CHAINS_BITS: u32 = 16; | |
| pub const CONFIG_NLATTR: u32 = 1; | |
| pub const CONFIG_DMATEST: u32 = 1; | |
| pub const CONFIG_TCP_CONG_CUBIC: u32 = 1; | |
| pub const CONFIG_NR_CPUS: u32 = 256; | |
| pub const CONFIG_SYSFS: u32 = 1; | |
| pub const CONFIG_AS_HAS_NON_CONST_LEB128: u32 = 1; | |
| pub const CONFIG_DRM_PANEL_BRIDGE: u32 = 1; | |
| pub const CONFIG_XZ_DEC_ARM: u32 = 1; | |
| pub const CONFIG_PTP_1588_CLOCK_OPTIONAL: u32 = 1; | |
| pub const CONFIG_HAVE_SYSCALL_TRACEPOINTS: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_HUGE_VMALLOC: u32 = 1; | |
| pub const CONFIG_IO_WQ: u32 = 1; | |
| pub const CONFIG_DECOMPRESS_ZSTD: u32 = 1; | |
| pub const CONFIG_TRACING: u32 = 1; | |
| pub const CONFIG_BLK_MQ_VIRTIO: u32 = 1; | |
| pub const CONFIG_APPLE_SART: u32 = 1; | |
| pub const CONFIG_I2C_COMPAT: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_ZYDAS: u32 = 1; | |
| pub const CONFIG_SPARSEMEM_VMEMMAP_ENABLE: u32 = 1; | |
| pub const CONFIG_ARM_GIC_V3: u32 = 1; | |
| pub const CONFIG_ARCH_SUPPORTS_KEXEC_SIG: u32 = 1; | |
| pub const CONFIG_TRACE_IRQFLAGS: u32 = 1; | |
| pub const CONFIG_MSDOS_PARTITION: u32 = 1; | |
| pub const CONFIG_RTC_I2C_AND_SPI: u32 = 1; | |
| pub const CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK: u32 = 1; | |
| pub const CONFIG_ARM_PSCI_FW: u32 = 1; | |
| pub const CONFIG_SYNC_FILE: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_3COM: u32 = 1; | |
| pub const CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK: u32 = 1; | |
| pub const CONFIG_CMA_SIZE_MBYTES: u32 = 128; | |
| pub const CONFIG_HAVE_ARCH_KGDB: u32 = 1; | |
| pub const CONFIG_ARCH_USE_QUEUED_SPINLOCKS: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_ZONE_DMA_SET: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_INTEL: u32 = 1; | |
| pub const CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK: u32 = 1; | |
| pub const CONFIG_ARM64_WORKAROUND_REPEAT_TLBI: u32 = 1; | |
| pub const CONFIG_RPS: u32 = 1; | |
| pub const CONFIG_PM_GENERIC_DOMAINS: u32 = 1; | |
| pub const CONFIG_BINDGEN_VERSION_TEXT: &[u8; 15usize] = b"bindgen 0.65.1\0"; | |
| pub const CONFIG_GENERIC_CSUM: u32 = 1; | |
| pub const CONFIG_GENERIC_IDLE_POLL_SETUP: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_MEDIATEK: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_CISCO: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_PTE_DEVMAP: u32 = 1; | |
| pub const CONFIG_GENERIC_IRQ_IPI_MUX: u32 = 1; | |
| pub const CONFIG_AS_HAS_ARMV8_2: u32 = 1; | |
| pub const CONFIG_XARRAY_MULTI: u32 = 1; | |
| pub const CONFIG_LOCK_MM_AND_FIND_VMA: u32 = 1; | |
| pub const CONFIG_CGROUP_DEBUG: u32 = 1; | |
| pub const CONFIG_PREEMPTIRQ_TRACEPOINTS: u32 = 1; | |
| pub const CONFIG_MUTEX_SPIN_ON_OWNER: u32 = 1; | |
| pub const CONFIG_CGROUP_NET_CLASSID: u32 = 1; | |
| pub const CONFIG_HAVE_FUNCTION_GRAPH_TRACER: u32 = 1; | |
| pub const CONFIG_BUFFER_HEAD: u32 = 1; | |
| pub const CONFIG_HAVE_CMPXCHG_LOCAL: u32 = 1; | |
| pub const CONFIG_TREE_SRCU: u32 = 1; | |
| pub const CONFIG_FUNCTION_ALIGNMENT_4B: u32 = 1; | |
| pub const CONFIG_BASE_SMALL: u32 = 0; | |
| pub const CONFIG_VIDEO_CMDLINE: u32 = 1; | |
| pub const CONFIG_PROC_FS: u32 = 1; | |
| pub const CONFIG_GENERIC_BUG_RELATIVE_POINTERS: u32 = 1; | |
| pub const CONFIG_MMU_GATHER_RCU_TABLE_FREE: u32 = 1; | |
| pub const CONFIG_VIRTIO_MMIO: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_ROCKER: u32 = 1; | |
| pub const CONFIG_MEMFD_CREATE: u32 = 1; | |
| pub const CONFIG_IRQ_FORCED_THREADING: u32 = 1; | |
| pub const CONFIG_ARM64_CONT_PTE_SHIFT: u32 = 4; | |
| pub const CONFIG_SND: u32 = 1; | |
| pub const CONFIG_ARCH_HAVE_ELF_PROT: u32 = 1; | |
| pub const CONFIG_ARCH_USE_GNU_PROPERTY: u32 = 1; | |
| pub const CONFIG_LD_ORPHAN_WARN: u32 = 1; | |
| pub const CONFIG_ARCH_APPLE: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_NATSEMI: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_GOOGLE: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_NETRONOME: u32 = 1; | |
| pub const CONFIG_DMA_ENGINE_RAID: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_FORTIFY_SOURCE: u32 = 1; | |
| pub const CONFIG_GCC_VERSION: u32 = 120200; | |
| pub const CONFIG_CRYPTO_LIB_POLY1305_RSIZE: u32 = 9; | |
| pub const CONFIG_SYSCTL: u32 = 1; | |
| pub const CONFIG_CC_CAN_LINK_STATIC: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_GCOV_PROFILE_ALL: u32 = 1; | |
| pub const CONFIG_PHYS_ADDR_T_64BIT: u32 = 1; | |
| pub const CONFIG_THREAD_INFO_IN_TASK: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_LITEX: u32 = 1; | |
| pub const CONFIG_HAVE_C_RECORDMCOUNT: u32 = 1; | |
| pub const CONFIG_GENERIC_MSI_IRQ: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_TRACEHOOK: u32 = 1; | |
| pub const CONFIG_PCI_DOMAINS_GENERIC: u32 = 1; | |
| pub const CONFIG_ZYNQMP_FIRMWARE: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE: u32 = 1; | |
| pub const CONFIG_NET_NS: u32 = 1; | |
| pub const CONFIG_HAVE_PERF_EVENTS: u32 = 1; | |
| pub const CONFIG_HAVE_ALIGNED_STRUCT_PAGE: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_SOLARFLARE: u32 = 1; | |
| pub const CONFIG_TRACE_IRQFLAGS_NMI: u32 = 1; | |
| pub const CONFIG_KERNEL_MODE_NEON: u32 = 1; | |
| pub const CONFIG_CMA_AREAS: u32 = 7; | |
| pub const CONFIG_LTO_NONE: u32 = 1; | |
| pub const CONFIG_PCIEASPM: u32 = 1; | |
| pub const CONFIG_ARM_GIC_MAX_NR: u32 = 1; | |
| pub const CONFIG_MAX_SKB_FRAGS: u32 = 17; | |
| pub const CONFIG_SND_TIMER: u32 = 1; | |
| pub const CONFIG_BLK_DEV: u32 = 1; | |
| pub const CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT: u32 = 1; | |
| pub const CONFIG_OF_FLATTREE: u32 = 1; | |
| pub const CONFIG_HAVE_ARCH_KFENCE: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_SILABS: u32 = 1; | |
| pub const CONFIG_IOMMU_API: u32 = 1; | |
| pub const CONFIG_TRACING_SUPPORT: u32 = 1; | |
| pub const CONFIG_UNIX98_PTYS: u32 = 1; | |
| pub const CONFIG_NET_RX_BUSY_POLL: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_SOCIONEXT: u32 = 1; | |
| pub const CONFIG_ZONE_DMA32: u32 = 1; | |
| pub const CONFIG_LOCKDEP: u32 = 1; | |
| pub const CONFIG_DRM_PANEL: u32 = 1; | |
| pub const CONFIG_PRINTK_TIME: u32 = 1; | |
| pub const CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT: u32 = 1; | |
| pub const CONFIG_IRQCHIP: u32 = 1; | |
| pub const CONFIG_INET_DIAG: u32 = 1; | |
| pub const CONFIG_ELF_CORE: u32 = 1; | |
| pub const CONFIG_PCI_HOST_COMMON: u32 = 1; | |
| pub const CONFIG_HAVE_CONTEXT_TRACKING_USER: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_ST: u32 = 1; | |
| pub const CONFIG_PCP_BATCH_SCALE_MAX: u32 = 5; | |
| pub const CONFIG_NET_VENDOR_SIS: u32 = 1; | |
| pub const CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE: u32 = 1; | |
| pub const CONFIG_DMA_CMA: u32 = 1; | |
| pub const CONFIG_ARM64_ERRATUM_2966298: u32 = 1; | |
| pub const CONFIG_VT_CONSOLE: u32 = 1; | |
| pub const CONFIG_AS_VERSION: u32 = 24000; | |
| pub const CONFIG_CC_HAS_INT128: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_MARVELL: u32 = 1; | |
| pub const CONFIG_SND_SOC_XTFPGA_I2S: u32 = 1; | |
| pub const CONFIG_AUDIT_ARCH_COMPAT_GENERIC: u32 = 1; | |
| pub const CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE: u32 = 1; | |
| pub const CONFIG_ARM64_CONT_PMD_SHIFT: u32 = 4; | |
| pub const CONFIG_DRM: u32 = 1; | |
| pub const CONFIG_ARM64: u32 = 1; | |
| pub const CONFIG_DEBUG_MISC: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_MICROSEMI: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_TICK_BROADCAST: u32 = 1; | |
| pub const CONFIG_BINARY_PRINTF: u32 = 1; | |
| pub const CONFIG_ZSTD_DECOMPRESS: u32 = 1; | |
| pub const CONFIG_SYSFS_SYSCALL: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_QUANTENNA: u32 = 1; | |
| pub const CONFIG_SND_PCM_TIMER: u32 = 1; | |
| pub const CONFIG_ARCH_HAS_SET_DIRECT_MAP: u32 = 1; | |
| pub const CONFIG_WLAN_VENDOR_TI: u32 = 1; | |
| pub const CONFIG_DMA_SHARED_BUFFER: u32 = 1; | |
| pub const CONFIG_RTC_SYSTOHC: u32 = 1; | |
| pub const CONFIG_OF_ADDRESS: u32 = 1; | |
| pub const CONFIG_DECOMPRESS_GZIP: u32 = 1; | |
| pub const CONFIG_VIRTIO_MENU: u32 = 1; | |
| pub const CONFIG_VIRTIO_BLK: u32 = 1; | |
| pub const CONFIG_DECOMPRESS_LZO: u32 = 1; | |
| pub const CONFIG_64BIT: u32 = 1; | |
| pub const CONFIG_PARTITION_PERCPU: u32 = 1; | |
| pub const CONFIG_I2C_CHARDEV: u32 = 1; | |
| pub const CONFIG_ARCH_USE_QUEUED_RWLOCKS: u32 = 1; | |
| pub const CONFIG_ARCH_KEEP_MEMBLOCK: u32 = 1; | |
| pub const CONFIG_REGMAP_MMIO: u32 = 1; | |
| pub const CONFIG_GENERIC_CLOCKEVENTS_BROADCAST: u32 = 1; | |
| pub const CONFIG_XZ_DEC_ARMTHUMB: u32 = 1; | |
| pub const CONFIG_ARCH_USE_CMPXCHG_LOCKREF: u32 = 1; | |
| pub const CONFIG_ARCH_WANT_FRAME_POINTERS: u32 = 1; | |
| pub const CONFIG_REGMAP: u32 = 1; | |
| pub const CONFIG_HAVE_MOD_ARCH_SPECIFIC: u32 = 1; | |
| pub const CONFIG_SYSCTL_EXCEPTION_TRACE: u32 = 1; | |
| pub const CONFIG_FHANDLE: u32 = 1; | |
| pub const CONFIG_HAVE_SAMPLE_FTRACE_DIRECT_MULTI: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_CAVIUM: u32 = 1; | |
| pub const CONFIG_GPIOLIB_IRQCHIP: u32 = 1; | |
| pub const CONFIG_CMDLINE_FROM_BOOTLOADER: u32 = 1; | |
| pub const CONFIG_PREEMPT_COUNT: u32 = 1; | |
| pub const CONFIG_NET_VENDOR_ENGLEDER: u32 = 1; | |
| pub const CONFIG_CMA: u32 = 1; | |
| pub const CONFIG_RWSEM_SPIN_ON_OWNER: u32 = 1; | |
| pub const CONFIG_ARM_GIC_V3_ITS_PCI: u32 = 1; | |
| pub const CONFIG_CC_HAS_ASM_GOTO_OUTPUT: u32 = 1; | |
| pub const CONFIG_BITREVERSE: u32 = 1; | |
| pub const CONFIG_DEVPORT: u32 = 1; | |
| pub const CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS: u32 = 1; | |
| pub const CONFIG_PTP_1588_CLOCK_KVM: u32 = 1; | |
| pub const CONFIG_LSM: &[u8; 55usize] = b"landlock,lockdown,yama,loadpin,safesetid,integrity,bpf\0"; | |
| pub const CONFIG_ARCH_DMA_ADDR_T_64BIT: u32 = 1; | |
| pub const CONFIG_FILE_LOCKING: u32 = 1; | |
| pub const CONFIG_SND_SOC_I2C_AND_SPI: u32 = 1; | |
| pub const CONFIG_AIO: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_READ_UNLOCK_BH: u32 = 1; | |
| pub const CONFIG_OF: u32 = 1; | |
| pub const CONFIG_GENERIC_TIME_VSYSCALL: u32 = 1; | |
| pub const CONFIG_HAVE_MOVE_PMD: u32 = 1; | |
| pub const CONFIG_IOMMU_IO_PGTABLE: u32 = 1; | |
| pub const CONFIG_KALLSYMS_BASE_RELATIVE: u32 = 1; | |
| pub const CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE: u32 = 1; | |
| pub const CONFIG_AS_HAS_LSE_ATOMICS: u32 = 1; | |
| pub const CONFIG_RTC_INTF_DEV: u32 = 1; | |
| pub const CONFIG_AS_HAS_SHA3: u32 = 1; | |
| pub const CONFIG_HID_SUPPORT: u32 = 1; | |
| pub const CONFIG_DCACHE_WORD_ACCESS: u32 = 1; | |
| pub const CONFIG_CPU_LITTLE_ENDIAN: u32 = 1; | |
| pub const CONFIG_MESSAGE_LOGLEVEL_DEFAULT: u32 = 4; | |
| pub const CONFIG_CMA_ALIGNMENT: u32 = 8; | |
| pub const CONFIG_VIDEO_NOMODESET: u32 = 1; | |
| pub const CONFIG_DMA_ENGINE: u32 = 1; | |
| pub const CONFIG_CGROUP_PIDS: u32 = 1; | |
| pub const CONFIG_DEBUG_INFO: u32 = 1; | |
| pub const CONFIG_CRYPTO_ALGAPI2: u32 = 1; | |
| pub const CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS: u32 = 1; | |
| pub const CONFIG_INPUT: u32 = 1; | |
| pub const CONFIG_PROC_SYSCTL: u32 = 1; | |
| pub const CONFIG_RD_LZ4: u32 = 1; | |
| pub const CONFIG_MMU: u32 = 1; | |
| pub const CONFIG_LD_VERSION: u32 = 24000; | |
| pub const CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY: u32 = 1; | |
| pub const CONFIG_ARM64_VA_BITS_39: u32 = 1; | |
| pub const __LITTLE_ENDIAN: u32 = 1234; | |
| pub const KASAN_ABI_VERSION: u32 = 5; | |
| pub const __BITS_PER_LONG: u32 = 64; | |
| pub const BITS_PER_LONG: u32 = 64; | |
| pub const BITS_PER_LONG_LONG: u32 = 64; | |
| pub const __FD_SETSIZE: u32 = 1024; | |
| pub const KCSAN_ACCESS_WRITE: u32 = 1; | |
| pub const KCSAN_ACCESS_COMPOUND: u32 = 2; | |
| pub const KCSAN_ACCESS_ATOMIC: u32 = 4; | |
| pub const KCSAN_ACCESS_ASSERT: u32 = 8; | |
| pub const KCSAN_ACCESS_SCOPED: u32 = 16; | |
| pub const EPERM: u32 = 1; | |
| pub const ENOENT: u32 = 2; | |
| pub const ESRCH: u32 = 3; | |
| pub const EINTR: u32 = 4; | |
| pub const EIO: u32 = 5; | |
| pub const ENXIO: u32 = 6; | |
| pub const E2BIG: u32 = 7; | |
| pub const ENOEXEC: u32 = 8; | |
| pub const EBADF: u32 = 9; | |
| pub const ECHILD: u32 = 10; | |
| pub const EAGAIN: u32 = 11; | |
| pub const ENOMEM: u32 = 12; | |
| pub const EACCES: u32 = 13; | |
| pub const EFAULT: u32 = 14; | |
| pub const ENOTBLK: u32 = 15; | |
| pub const EBUSY: u32 = 16; | |
| pub const EEXIST: u32 = 17; | |
| pub const EXDEV: u32 = 18; | |
| pub const ENODEV: u32 = 19; | |
| pub const ENOTDIR: u32 = 20; | |
| pub const EISDIR: u32 = 21; | |
| pub const EINVAL: u32 = 22; | |
| pub const ENFILE: u32 = 23; | |
| pub const EMFILE: u32 = 24; | |
| pub const ENOTTY: u32 = 25; | |
| pub const ETXTBSY: u32 = 26; | |
| pub const EFBIG: u32 = 27; | |
| pub const ENOSPC: u32 = 28; | |
| pub const ESPIPE: u32 = 29; | |
| pub const EROFS: u32 = 30; | |
| pub const EMLINK: u32 = 31; | |
| pub const EPIPE: u32 = 32; | |
| pub const EDOM: u32 = 33; | |
| pub const ERANGE: u32 = 34; | |
| pub const EDEADLK: u32 = 35; | |
| pub const ENAMETOOLONG: u32 = 36; | |
| pub const ENOLCK: u32 = 37; | |
| pub const ENOSYS: u32 = 38; | |
| pub const ENOTEMPTY: u32 = 39; | |
| pub const ELOOP: u32 = 40; | |
| pub const EWOULDBLOCK: u32 = 11; | |
| pub const ENOMSG: u32 = 42; | |
| pub const EIDRM: u32 = 43; | |
| pub const ECHRNG: u32 = 44; | |
| pub const EL2NSYNC: u32 = 45; | |
| pub const EL3HLT: u32 = 46; | |
| pub const EL3RST: u32 = 47; | |
| pub const ELNRNG: u32 = 48; | |
| pub const EUNATCH: u32 = 49; | |
| pub const ENOCSI: u32 = 50; | |
| pub const EL2HLT: u32 = 51; | |
| pub const EBADE: u32 = 52; | |
| pub const EBADR: u32 = 53; | |
| pub const EXFULL: u32 = 54; | |
| pub const ENOANO: u32 = 55; | |
| pub const EBADRQC: u32 = 56; | |
| pub const EBADSLT: u32 = 57; | |
| pub const EDEADLOCK: u32 = 35; | |
| pub const EBFONT: u32 = 59; | |
| pub const ENOSTR: u32 = 60; | |
| pub const ENODATA: u32 = 61; | |
| pub const ETIME: u32 = 62; | |
| pub const ENOSR: u32 = 63; | |
| pub const ENONET: u32 = 64; | |
| pub const ENOPKG: u32 = 65; | |
| pub const EREMOTE: u32 = 66; | |
| pub const ENOLINK: u32 = 67; | |
| pub const EADV: u32 = 68; | |
| pub const ESRMNT: u32 = 69; | |
| pub const ECOMM: u32 = 70; | |
| pub const EPROTO: u32 = 71; | |
| pub const EMULTIHOP: u32 = 72; | |
| pub const EDOTDOT: u32 = 73; | |
| pub const EBADMSG: u32 = 74; | |
| pub const EOVERFLOW: u32 = 75; | |
| pub const ENOTUNIQ: u32 = 76; | |
| pub const EBADFD: u32 = 77; | |
| pub const EREMCHG: u32 = 78; | |
| pub const ELIBACC: u32 = 79; | |
| pub const ELIBBAD: u32 = 80; | |
| pub const ELIBSCN: u32 = 81; | |
| pub const ELIBMAX: u32 = 82; | |
| pub const ELIBEXEC: u32 = 83; | |
| pub const EILSEQ: u32 = 84; | |
| pub const ERESTART: u32 = 85; | |
| pub const ESTRPIPE: u32 = 86; | |
| pub const EUSERS: u32 = 87; | |
| pub const ENOTSOCK: u32 = 88; | |
| pub const EDESTADDRREQ: u32 = 89; | |
| pub const EMSGSIZE: u32 = 90; | |
| pub const EPROTOTYPE: u32 = 91; | |
| pub const ENOPROTOOPT: u32 = 92; | |
| pub const EPROTONOSUPPORT: u32 = 93; | |
| pub const ESOCKTNOSUPPORT: u32 = 94; | |
| pub const EOPNOTSUPP: u32 = 95; | |
| pub const EPFNOSUPPORT: u32 = 96; | |
| pub const EAFNOSUPPORT: u32 = 97; | |
| pub const EADDRINUSE: u32 = 98; | |
| pub const EADDRNOTAVAIL: u32 = 99; | |
| pub const ENETDOWN: u32 = 100; | |
| pub const ENETUNREACH: u32 = 101; | |
| pub const ENETRESET: u32 = 102; | |
| pub const ECONNABORTED: u32 = 103; | |
| pub const ECONNRESET: u32 = 104; | |
| pub const ENOBUFS: u32 = 105; | |
| pub const EISCONN: u32 = 106; | |
| pub const ENOTCONN: u32 = 107; | |
| pub const ESHUTDOWN: u32 = 108; | |
| pub const ETOOMANYREFS: u32 = 109; | |
| pub const ETIMEDOUT: u32 = 110; | |
| pub const ECONNREFUSED: u32 = 111; | |
| pub const EHOSTDOWN: u32 = 112; | |
| pub const EHOSTUNREACH: u32 = 113; | |
| pub const EALREADY: u32 = 114; | |
| pub const EINPROGRESS: u32 = 115; | |
| pub const ESTALE: u32 = 116; | |
| pub const EUCLEAN: u32 = 117; | |
| pub const ENOTNAM: u32 = 118; | |
| pub const ENAVAIL: u32 = 119; | |
| pub const EISNAM: u32 = 120; | |
| pub const EREMOTEIO: u32 = 121; | |
| pub const EDQUOT: u32 = 122; | |
| pub const ENOMEDIUM: u32 = 123; | |
| pub const EMEDIUMTYPE: u32 = 124; | |
| pub const ECANCELED: u32 = 125; | |
| pub const ENOKEY: u32 = 126; | |
| pub const EKEYEXPIRED: u32 = 127; | |
| pub const EKEYREVOKED: u32 = 128; | |
| pub const EKEYREJECTED: u32 = 129; | |
| pub const EOWNERDEAD: u32 = 130; | |
| pub const ENOTRECOVERABLE: u32 = 131; | |
| pub const ERFKILL: u32 = 132; | |
| pub const EHWPOISON: u32 = 133; | |
| pub const MAX_ERRNO: u32 = 4095; | |
| pub const KERN_SOH: &[u8; 2usize] = b"\x01\0"; | |
| pub const KERN_SOH_ASCII: u8 = 1u8; | |
| pub const KERN_EMERG: &[u8; 3usize] = b"\x010\0"; | |
| pub const KERN_ALERT: &[u8; 3usize] = b"\x011\0"; | |
| pub const KERN_CRIT: &[u8; 3usize] = b"\x012\0"; | |
| pub const KERN_ERR: &[u8; 3usize] = b"\x013\0"; | |
| pub const KERN_WARNING: &[u8; 3usize] = b"\x014\0"; | |
| pub const KERN_NOTICE: &[u8; 3usize] = b"\x015\0"; | |
| pub const KERN_INFO: &[u8; 3usize] = b"\x016\0"; | |
| pub const KERN_DEBUG: &[u8; 3usize] = b"\x017\0"; | |
| pub const KERN_DEFAULT: &[u8; 1usize] = b"\0"; | |
| pub const KERN_CONT: &[u8; 3usize] = b"\x01c\0"; | |
| pub const LOGLEVEL_SCHED: i32 = -2; | |
| pub const LOGLEVEL_DEFAULT: i32 = -1; | |
| pub const LOGLEVEL_EMERG: u32 = 0; | |
| pub const LOGLEVEL_ALERT: u32 = 1; | |
| pub const LOGLEVEL_CRIT: u32 = 2; | |
| pub const LOGLEVEL_ERR: u32 = 3; | |
| pub const LOGLEVEL_WARNING: u32 = 4; | |
| pub const LOGLEVEL_NOTICE: u32 = 5; | |
| pub const LOGLEVEL_INFO: u32 = 6; | |
| pub const LOGLEVEL_DEBUG: u32 = 7; | |
| pub const BITS_PER_BYTE: u32 = 8; | |
| pub const EXEC_PAGESIZE: u32 = 65536; | |
| pub const HZ: u32 = 100; | |
| pub const NOGROUP: i32 = -1; | |
| pub const MAXHOSTNAMELEN: u32 = 64; | |
| pub const USER_HZ: u32 = 100; | |
| pub const CLOCKS_PER_SEC: u32 = 100; | |
| pub const _Q_LOCKED_OFFSET: u32 = 0; | |
| pub const _Q_LOCKED_BITS: u32 = 8; | |
| pub const _Q_PENDING_OFFSET: u32 = 8; | |
| pub const _Q_PENDING_BITS: u32 = 8; | |
| pub const _Q_TAIL_IDX_OFFSET: u32 = 16; | |
| pub const _Q_TAIL_IDX_BITS: u32 = 2; | |
| pub const _Q_TAIL_CPU_OFFSET: u32 = 18; | |
| pub const _Q_TAIL_CPU_BITS: u32 = 14; | |
| pub const _Q_TAIL_OFFSET: u32 = 16; | |
| pub const _Q_LOCKED_VAL: u32 = 1; | |
| pub const _Q_PENDING_VAL: u32 = 256; | |
| pub const MAX_LOCKDEP_SUBCLASSES: u32 = 8; | |
| pub const XXX_LOCK_USAGE_STATES: u32 = 2; | |
| pub const LOCK_TRACE_STATES: u32 = 10; | |
| pub const NR_LOCKDEP_CACHING_CLASSES: u32 = 2; | |
| pub const LOCKSTAT_POINTS: u32 = 4; | |
| pub const SPINLOCK_MAGIC: u32 = 3735899821; | |
| pub const DEFAULT_RATELIMIT_INTERVAL: u32 = 1250; | |
| pub const DEFAULT_RATELIMIT_BURST: u32 = 10; | |
| pub const PRINTK_MAX_SINGLE_HEADER_LEN: u32 = 2; | |
| pub const MESSAGE_LOGLEVEL_DEFAULT: u32 = 4; | |
| pub const CONSOLE_LOGLEVEL_SILENT: u32 = 0; | |
| pub const CONSOLE_LOGLEVEL_MIN: u32 = 1; | |
| pub const CONSOLE_LOGLEVEL_DEBUG: u32 = 10; | |
| pub const CONSOLE_LOGLEVEL_MOTORMOUTH: u32 = 15; | |
| pub const CONSOLE_LOGLEVEL_DEFAULT: u32 = 7; | |
| pub const CONSOLE_LOGLEVEL_QUIET: u32 = 4; | |
| pub const DEVKMSG_STR_MAX_SIZE: u32 = 10; | |
| pub const FW_BUG: &[u8; 17usize] = b"[Firmware Bug]: \0"; | |
| pub const FW_WARN: &[u8; 18usize] = b"[Firmware Warn]: \0"; | |
| pub const FW_INFO: &[u8; 18usize] = b"[Firmware Info]: \0"; | |
| pub const HW_ERR: &[u8; 19usize] = b"[Hardware Error]: \0"; | |
| pub const DEPRECATED: &[u8; 15usize] = b"[Deprecated]: \0"; | |
| pub const ARM64_ALWAYS_BOOT: u32 = 0; | |
| pub const ARM64_ALWAYS_SYSTEM: u32 = 1; | |
| pub const ARM64_BTI: u32 = 2; | |
| pub const ARM64_HAS_32BIT_EL0_DO_NOT_USE: u32 = 3; | |
| pub const ARM64_HAS_32BIT_EL1: u32 = 4; | |
| pub const ARM64_HAS_ADDRESS_AUTH: u32 = 5; | |
| pub const ARM64_HAS_ADDRESS_AUTH_ARCH_QARMA3: u32 = 6; | |
| pub const ARM64_HAS_ADDRESS_AUTH_ARCH_QARMA5: u32 = 7; | |
| pub const ARM64_HAS_ADDRESS_AUTH_IMP_DEF: u32 = 8; | |
| pub const ARM64_HAS_AMU_EXTN: u32 = 9; | |
| pub const ARM64_HAS_ARMv8_4_TTL: u32 = 10; | |
| pub const ARM64_HAS_CACHE_DIC: u32 = 11; | |
| pub const ARM64_HAS_CACHE_IDC: u32 = 12; | |
| pub const ARM64_HAS_CNP: u32 = 13; | |
| pub const ARM64_HAS_CRC32: u32 = 14; | |
| pub const ARM64_HAS_DCPODP: u32 = 15; | |
| pub const ARM64_HAS_DCPOP: u32 = 16; | |
| pub const ARM64_HAS_DIT: u32 = 17; | |
| pub const ARM64_HAS_E0PD: u32 = 18; | |
| pub const ARM64_HAS_ECV: u32 = 19; | |
| pub const ARM64_HAS_ECV_CNTPOFF: u32 = 20; | |
| pub const ARM64_HAS_EPAN: u32 = 21; | |
| pub const ARM64_HAS_EVT: u32 = 22; | |
| pub const ARM64_HAS_FGT: u32 = 23; | |
| pub const ARM64_HAS_FPSIMD: u32 = 24; | |
| pub const ARM64_HAS_GENERIC_AUTH: u32 = 25; | |
| pub const ARM64_HAS_GENERIC_AUTH_ARCH_QARMA3: u32 = 26; | |
| pub const ARM64_HAS_GENERIC_AUTH_ARCH_QARMA5: u32 = 27; | |
| pub const ARM64_HAS_GENERIC_AUTH_IMP_DEF: u32 = 28; | |
| pub const ARM64_HAS_GIC_CPUIF_SYSREGS: u32 = 29; | |
| pub const ARM64_HAS_GIC_PRIO_MASKING: u32 = 30; | |
| pub const ARM64_HAS_GIC_PRIO_RELAXED_SYNC: u32 = 31; | |
| pub const ARM64_HAS_HCX: u32 = 32; | |
| pub const ARM64_HAS_LDAPR: u32 = 33; | |
| pub const ARM64_HAS_LSE_ATOMICS: u32 = 34; | |
| pub const ARM64_HAS_MOPS: u32 = 35; | |
| pub const ARM64_HAS_NESTED_VIRT: u32 = 36; | |
| pub const ARM64_HAS_NO_HW_PREFETCH: u32 = 37; | |
| pub const ARM64_HAS_PAN: u32 = 38; | |
| pub const ARM64_HAS_S1PIE: u32 = 39; | |
| pub const ARM64_HAS_RAS_EXTN: u32 = 40; | |
| pub const ARM64_HAS_RNG: u32 = 41; | |
| pub const ARM64_HAS_SB: u32 = 42; | |
| pub const ARM64_HAS_STAGE2_FWB: u32 = 43; | |
| pub const ARM64_HAS_TCR2: u32 = 44; | |
| pub const ARM64_HAS_TIDCP1: u32 = 45; | |
| pub const ARM64_HAS_TLB_RANGE: u32 = 46; | |
| pub const ARM64_HAS_VIRT_HOST_EXTN: u32 = 47; | |
| pub const ARM64_HAS_WFXT: u32 = 48; | |
| pub const ARM64_HW_DBM: u32 = 49; | |
| pub const ARM64_KVM_HVHE: u32 = 50; | |
| pub const ARM64_KVM_PROTECTED_MODE: u32 = 51; | |
| pub const ARM64_MISMATCHED_CACHE_TYPE: u32 = 52; | |
| pub const ARM64_MTE: u32 = 53; | |
| pub const ARM64_MTE_ASYMM: u32 = 54; | |
| pub const ARM64_SME: u32 = 55; | |
| pub const ARM64_SME_FA64: u32 = 56; | |
| pub const ARM64_SME2: u32 = 57; | |
| pub const ARM64_SPECTRE_V2: u32 = 58; | |
| pub const ARM64_SPECTRE_V3A: u32 = 59; | |
| pub const ARM64_SPECTRE_V4: u32 = 60; | |
| pub const ARM64_SPECTRE_BHB: u32 = 61; | |
| pub const ARM64_SSBS: u32 = 62; | |
| pub const ARM64_SVE: u32 = 63; | |
| pub const ARM64_UNMAP_KERNEL_AT_EL0: u32 = 64; | |
| pub const ARM64_WORKAROUND_834220: u32 = 65; | |
| pub const ARM64_WORKAROUND_843419: u32 = 66; | |
| pub const ARM64_WORKAROUND_845719: u32 = 67; | |
| pub const ARM64_WORKAROUND_858921: u32 = 68; | |
| pub const ARM64_WORKAROUND_1418040: u32 = 69; | |
| pub const ARM64_WORKAROUND_1463225: u32 = 70; | |
| pub const ARM64_WORKAROUND_1508412: u32 = 71; | |
| pub const ARM64_WORKAROUND_1542419: u32 = 72; | |
| pub const ARM64_WORKAROUND_1742098: u32 = 73; | |
| pub const ARM64_WORKAROUND_1902691: u32 = 74; | |
| pub const ARM64_WORKAROUND_2038923: u32 = 75; | |
| pub const ARM64_WORKAROUND_2064142: u32 = 76; | |
| pub const ARM64_WORKAROUND_2077057: u32 = 77; | |
| pub const ARM64_WORKAROUND_2457168: u32 = 78; | |
| pub const ARM64_WORKAROUND_2645198: u32 = 79; | |
| pub const ARM64_WORKAROUND_2658417: u32 = 80; | |
| pub const ARM64_WORKAROUND_2966298: u32 = 81; | |
| pub const ARM64_WORKAROUND_AMPERE_AC03_CPU_38: u32 = 82; | |
| pub const ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE: u32 = 83; | |
| pub const ARM64_WORKAROUND_TSB_FLUSH_FAILURE: u32 = 84; | |
| pub const ARM64_WORKAROUND_TRBE_WRITE_OUT_OF_RANGE: u32 = 85; | |
| pub const ARM64_WORKAROUND_CAVIUM_23154: u32 = 86; | |
| pub const ARM64_WORKAROUND_CAVIUM_27456: u32 = 87; | |
| pub const ARM64_WORKAROUND_CAVIUM_30115: u32 = 88; | |
| pub const ARM64_WORKAROUND_CAVIUM_TX2_219_PRFM: u32 = 89; | |
| pub const ARM64_WORKAROUND_CAVIUM_TX2_219_TVM: u32 = 90; | |
| pub const ARM64_WORKAROUND_CLEAN_CACHE: u32 = 91; | |
| pub const ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE: u32 = 92; | |
| pub const ARM64_WORKAROUND_NVIDIA_CARMEL_CNP: u32 = 93; | |
| pub const ARM64_WORKAROUND_QCOM_FALKOR_E1003: u32 = 94; | |
| pub const ARM64_WORKAROUND_REPEAT_TLBI: u32 = 95; | |
| pub const ARM64_WORKAROUND_SPECULATIVE_AT: u32 = 96; | |
| pub const ARM64_NCAPS: u32 = 97; | |
| pub const KPROBES_BRK_IMM: u32 = 4; | |
| pub const UPROBES_BRK_IMM: u32 = 5; | |
| pub const KPROBES_BRK_SS_IMM: u32 = 6; | |
| pub const FAULT_BRK_IMM: u32 = 256; | |
| pub const KGDB_DYN_DBG_BRK_IMM: u32 = 1024; | |
| pub const KGDB_COMPILED_DBG_BRK_IMM: u32 = 1025; | |
| pub const BUG_BRK_IMM: u32 = 2048; | |
| pub const KASAN_BRK_IMM: u32 = 2304; | |
| pub const KASAN_BRK_MASK: u32 = 255; | |
| pub const UBSAN_BRK_IMM: u32 = 21760; | |
| pub const UBSAN_BRK_MASK: u32 = 255; | |
| pub const CFI_BRK_IMM_BASE: u32 = 32768; | |
| pub const AARCH64_INSN_SIZE: u32 = 4; | |
| pub const AARCH64_BREAK_MON: u32 = 3558866944; | |
| pub const AARCH64_BREAK_FAULT: u32 = 3558875136; | |
| pub const ARM64_CB_SHIFT: u32 = 15; | |
| pub const __LSE_PREAMBLE: &[u8; 21usize] = b".arch_extension lse\n\0"; | |
| pub const CUT_HERE: &[u8; 38usize] = b"------------[ cut here ]------------\n\0"; | |
| pub const BUGFLAG_WARNING: u32 = 1; | |
| pub const BUGFLAG_ONCE: u32 = 2; | |
| pub const BUGFLAG_DONE: u32 = 4; | |
| pub const BUGFLAG_NO_CUT_HERE: u32 = 8; | |
| pub const PANIC_CPU_INVALID: i32 = -1; | |
| pub const TAINT_PROPRIETARY_MODULE: u32 = 0; | |
| pub const TAINT_FORCED_MODULE: u32 = 1; | |
| pub const TAINT_CPU_OUT_OF_SPEC: u32 = 2; | |
| pub const TAINT_FORCED_RMMOD: u32 = 3; | |
| pub const TAINT_MACHINE_CHECK: u32 = 4; | |
| pub const TAINT_BAD_PAGE: u32 = 5; | |
| pub const TAINT_USER: u32 = 6; | |
| pub const TAINT_DIE: u32 = 7; | |
| pub const TAINT_OVERRIDDEN_ACPI_TABLE: u32 = 8; | |
| pub const TAINT_WARN: u32 = 9; | |
| pub const TAINT_CRAP: u32 = 10; | |
| pub const TAINT_FIRMWARE_WORKAROUND: u32 = 11; | |
| pub const TAINT_OOT_MODULE: u32 = 12; | |
| pub const TAINT_UNSIGNED_MODULE: u32 = 13; | |
| pub const TAINT_SOFTLOCKUP: u32 = 14; | |
| pub const TAINT_LIVEPATCH: u32 = 15; | |
| pub const TAINT_AUX: u32 = 16; | |
| pub const TAINT_RANDSTRUCT: u32 = 17; | |
| pub const TAINT_TEST: u32 = 18; | |
| pub const TAINT_FLAGS_COUNT: u32 = 19; | |
| pub const TAINT_FLAGS_MAX: u32 = 524287; | |
| pub const PAGE_POISON: u32 = 170; | |
| pub const RED_INACTIVE: u64 = 718624318471594843; | |
| pub const RED_ACTIVE: i64 = -2863912482255763264; | |
| pub const SLUB_RED_INACTIVE: u32 = 187; | |
| pub const SLUB_RED_ACTIVE: u32 = 204; | |
| pub const POISON_INUSE: u32 = 90; | |
| pub const POISON_FREE: u32 = 107; | |
| pub const POISON_END: u32 = 165; | |
| pub const POISON_FREE_INITMEM: u32 = 204; | |
| pub const JBD_POISON_FREE: u32 = 91; | |
| pub const JBD2_POISON_FREE: u32 = 92; | |
| pub const POOL_POISON_FREED: u32 = 167; | |
| pub const POOL_POISON_ALLOCATED: u32 = 169; | |
| pub const ATM_POISON_FREE: u32 = 18; | |
| pub const ATM_POISON: u32 = 3735928559; | |
| pub const MUTEX_DEBUG_INIT: u32 = 17; | |
| pub const MUTEX_DEBUG_FREE: u32 = 34; | |
| pub const KEY_DESTROY: u32 = 189; | |
| pub const PREEMPT_BITS: u32 = 8; | |
| pub const SOFTIRQ_BITS: u32 = 8; | |
| pub const HARDIRQ_BITS: u32 = 4; | |
| pub const NMI_BITS: u32 = 4; | |
| pub const PREEMPT_SHIFT: u32 = 0; | |
| pub const SOFTIRQ_SHIFT: u32 = 8; | |
| pub const HARDIRQ_SHIFT: u32 = 16; | |
| pub const NMI_SHIFT: u32 = 20; | |
| pub const PREEMPT_OFFSET: u32 = 1; | |
| pub const SOFTIRQ_OFFSET: u32 = 256; | |
| pub const HARDIRQ_OFFSET: u32 = 65536; | |
| pub const NMI_OFFSET: u32 = 1048576; | |
| pub const SOFTIRQ_DISABLE_OFFSET: u32 = 512; | |
| pub const INIT_PREEMPT_COUNT: u32 = 1; | |
| pub const NR_OPEN: u32 = 1024; | |
| pub const NGROUPS_MAX: u32 = 65536; | |
| pub const ARG_MAX: u32 = 131072; | |
| pub const LINK_MAX: u32 = 127; | |
| pub const MAX_CANON: u32 = 255; | |
| pub const MAX_INPUT: u32 = 255; | |
| pub const NAME_MAX: u32 = 255; | |
| pub const PATH_MAX: u32 = 4096; | |
| pub const PIPE_BUF: u32 = 4096; | |
| pub const XATTR_NAME_MAX: u32 = 255; | |
| pub const XATTR_SIZE_MAX: u32 = 65536; | |
| pub const XATTR_LIST_MAX: u32 = 65536; | |
| pub const RTSIG_MAX: u32 = 32; | |
| pub const UINT_MAX: i32 = -1; | |
| pub const ULONG_MAX: i32 = -1; | |
| pub const ULLONG_MAX: i32 = -1; | |
| pub const UINTPTR_MAX: i32 = -1; | |
| pub const SI_LOAD_SHIFT: u32 = 16; | |
| pub const MSEC_PER_SEC: u32 = 1000; | |
| pub const USEC_PER_MSEC: u32 = 1000; | |
| pub const NSEC_PER_USEC: u32 = 1000; | |
| pub const NSEC_PER_MSEC: u32 = 1000000; | |
| pub const USEC_PER_SEC: u32 = 1000000; | |
| pub const NSEC_PER_SEC: u32 = 1000000000; | |
| pub const PSEC_PER_SEC: u64 = 1000000000000; | |
| pub const FSEC_PER_SEC: u64 = 1000000000000000; | |
| pub const ITIMER_REAL: u32 = 0; | |
| pub const ITIMER_VIRTUAL: u32 = 1; | |
| pub const ITIMER_PROF: u32 = 2; | |
| pub const CLOCK_REALTIME: u32 = 0; | |
| pub const CLOCK_MONOTONIC: u32 = 1; | |
| pub const CLOCK_PROCESS_CPUTIME_ID: u32 = 2; | |
| pub const CLOCK_THREAD_CPUTIME_ID: u32 = 3; | |
| pub const CLOCK_MONOTONIC_RAW: u32 = 4; | |
| pub const CLOCK_REALTIME_COARSE: u32 = 5; | |
| pub const CLOCK_MONOTONIC_COARSE: u32 = 6; | |
| pub const CLOCK_BOOTTIME: u32 = 7; | |
| pub const CLOCK_REALTIME_ALARM: u32 = 8; | |
| pub const CLOCK_BOOTTIME_ALARM: u32 = 9; | |
| pub const CLOCK_SGI_CYCLE: u32 = 10; | |
| pub const CLOCK_TAI: u32 = 11; | |
| pub const MAX_CLOCKS: u32 = 16; | |
| pub const CLOCKS_MASK: u32 = 1; | |
| pub const CLOCKS_MONO: u32 = 1; | |
| pub const TIMER_ABSTIME: u32 = 1; | |
| pub const PSEC_PER_NSEC: u32 = 1000; | |
| pub const TIME_UPTIME_SEC_MAX: u32 = 946080000; | |
| pub const ERESTARTSYS: u32 = 512; | |
| pub const ERESTARTNOINTR: u32 = 513; | |
| pub const ERESTARTNOHAND: u32 = 514; | |
| pub const ENOIOCTLCMD: u32 = 515; | |
| pub const ERESTART_RESTARTBLOCK: u32 = 516; | |
| pub const EPROBE_DEFER: u32 = 517; | |
| pub const EOPENSTALE: u32 = 518; | |
| pub const ENOPARAM: u32 = 519; | |
| pub const EBADHANDLE: u32 = 521; | |
| pub const ENOTSYNC: u32 = 522; | |
| pub const EBADCOOKIE: u32 = 523; | |
| pub const ENOTSUPP: u32 = 524; | |
| pub const ETOOSMALL: u32 = 525; | |
| pub const ESERVERFAULT: u32 = 526; | |
| pub const EBADTYPE: u32 = 527; | |
| pub const EJUKEBOX: u32 = 528; | |
| pub const EIOCBQUEUED: u32 = 529; | |
| pub const ERECALLCONFLICT: u32 = 530; | |
| pub const ENOGRACE: u32 = 531; | |
| pub const BITOP_LE_SWIZZLE: u32 = 0; | |
| pub const SZ_1: u32 = 1; | |
| pub const SZ_2: u32 = 2; | |
| pub const SZ_4: u32 = 4; | |
| pub const SZ_8: u32 = 8; | |
| pub const SZ_16: u32 = 16; | |
| pub const SZ_32: u32 = 32; | |
| pub const SZ_64: u32 = 64; | |
| pub const SZ_128: u32 = 128; | |
| pub const SZ_256: u32 = 256; | |
| pub const SZ_512: u32 = 512; | |
| pub const SZ_1K: u32 = 1024; | |
| pub const SZ_2K: u32 = 2048; | |
| pub const SZ_4K: u32 = 4096; | |
| pub const SZ_8K: u32 = 8192; | |
| pub const SZ_16K: u32 = 16384; | |
| pub const SZ_32K: u32 = 32768; | |
| pub const SZ_64K: u32 = 65536; | |
| pub const SZ_128K: u32 = 131072; | |
| pub const SZ_256K: u32 = 262144; | |
| pub const SZ_512K: u32 = 524288; | |
| pub const SZ_1M: u32 = 1048576; | |
| pub const SZ_2M: u32 = 2097152; | |
| pub const SZ_4M: u32 = 4194304; | |
| pub const SZ_8M: u32 = 8388608; | |
| pub const SZ_16M: u32 = 16777216; | |
| pub const SZ_32M: u32 = 33554432; | |
| pub const SZ_64M: u32 = 67108864; | |
| pub const SZ_128M: u32 = 134217728; | |
| pub const SZ_256M: u32 = 268435456; | |
| pub const SZ_512M: u32 = 536870912; | |
| pub const SZ_1G: u32 = 1073741824; | |
| pub const SZ_2G: u32 = 2147483648; | |
| pub const PAGE_SHIFT: u32 = 12; | |
| pub const PCI_IO_SIZE: u32 = 16777216; | |
| pub const VA_BITS: u32 = 39; | |
| pub const MODULES_VSIZE: u32 = 2147483648; | |
| pub const VA_BITS_MIN: u32 = 39; | |
| pub const KASAN_THREAD_SHIFT: u32 = 0; | |
| pub const MIN_THREAD_SHIFT: u32 = 14; | |
| pub const THREAD_SHIFT: u32 = 14; | |
| pub const THREAD_SIZE_ORDER: u32 = 2; | |
| pub const OVERFLOW_STACK_SIZE: u32 = 4096; | |
| pub const SEGMENT_ALIGN: u32 = 65536; | |
| pub const MT_NORMAL: u32 = 0; | |
| pub const MT_NORMAL_TAGGED: u32 = 1; | |
| pub const MT_NORMAL_NC: u32 = 2; | |
| pub const MT_DEVICE_nGnRnE: u32 = 3; | |
| pub const MT_DEVICE_nGnRE: u32 = 4; | |
| pub const MT_S2_NORMAL: u32 = 15; | |
| pub const MT_S2_DEVICE_nGnRE: u32 = 1; | |
| pub const MT_S2_FWB_NORMAL: u32 = 6; | |
| pub const MT_S2_FWB_DEVICE_nGnRE: u32 = 1; | |
| pub const LINUX_MM_DEBUG_H: u32 = 1; | |
| pub const MIN_FDT_ALIGN: u32 = 8; | |
| pub const MAX_FDT_SIZE: u32 = 2097152; | |
| pub const MIN_KIMG_ALIGN: u32 = 2097152; | |
| pub const MIN_MEMBLOCK_ADDR: u32 = 0; | |
| pub const TIF_SIGPENDING: u32 = 0; | |
| pub const TIF_NEED_RESCHED: u32 = 1; | |
| pub const TIF_NOTIFY_RESUME: u32 = 2; | |
| pub const TIF_FOREIGN_FPSTATE: u32 = 3; | |
| pub const TIF_UPROBE: u32 = 4; | |
| pub const TIF_MTE_ASYNC_FAULT: u32 = 5; | |
| pub const TIF_NOTIFY_SIGNAL: u32 = 6; | |
| pub const TIF_SYSCALL_TRACE: u32 = 8; | |
| pub const TIF_SYSCALL_AUDIT: u32 = 9; | |
| pub const TIF_SYSCALL_TRACEPOINT: u32 = 10; | |
| pub const TIF_SECCOMP: u32 = 11; | |
| pub const TIF_SYSCALL_EMU: u32 = 12; | |
| pub const TIF_MEMDIE: u32 = 18; | |
| pub const TIF_FREEZE: u32 = 19; | |
| pub const TIF_RESTORE_SIGMASK: u32 = 20; | |
| pub const TIF_SINGLESTEP: u32 = 21; | |
| pub const TIF_32BIT: u32 = 22; | |
| pub const TIF_SVE: u32 = 23; | |
| pub const TIF_SVE_VL_INHERIT: u32 = 24; | |
| pub const TIF_SSBD: u32 = 25; | |
| pub const TIF_TAGGED_ADDR: u32 = 26; | |
| pub const TIF_SME: u32 = 27; | |
| pub const TIF_SME_VL_INHERIT: u32 = 28; | |
| pub const _TIF_SIGPENDING: u32 = 1; | |
| pub const _TIF_NEED_RESCHED: u32 = 2; | |
| pub const _TIF_NOTIFY_RESUME: u32 = 4; | |
| pub const _TIF_FOREIGN_FPSTATE: u32 = 8; | |
| pub const _TIF_SYSCALL_TRACE: u32 = 256; | |
| pub const _TIF_SYSCALL_AUDIT: u32 = 512; | |
| pub const _TIF_SYSCALL_TRACEPOINT: u32 = 1024; | |
| pub const _TIF_SECCOMP: u32 = 2048; | |
| pub const _TIF_SYSCALL_EMU: u32 = 4096; | |
| pub const _TIF_UPROBE: u32 = 16; | |
| pub const _TIF_SINGLESTEP: u32 = 2097152; | |
| pub const _TIF_32BIT: u32 = 4194304; | |
| pub const _TIF_SVE: u32 = 8388608; | |
| pub const _TIF_MTE_ASYNC_FAULT: u32 = 32; | |
| pub const _TIF_NOTIFY_SIGNAL: u32 = 64; | |
| pub const _TIF_WORK_MASK: u32 = 127; | |
| pub const _TIF_SYSCALL_WORK: u32 = 7936; | |
| pub const PREEMPT_DISABLE_OFFSET: u32 = 1; | |
| pub const PREEMPT_LOCK_OFFSET: u32 = 1; | |
| pub const SOFTIRQ_LOCK_OFFSET: u32 = 513; | |
| pub const INVALID_HWID: i32 = -1; | |
| pub const MPIDR_UP_BITMASK: u32 = 1073741824; | |
| pub const MPIDR_MT_BITMASK: u32 = 16777216; | |
| pub const MPIDR_LEVEL_BITS_SHIFT: u32 = 3; | |
| pub const MPIDR_LEVEL_BITS: u32 = 8; | |
| pub const MPIDR_LEVEL_MASK: u32 = 255; | |
| pub const MIDR_REVISION_MASK: u32 = 15; | |
| pub const MIDR_PARTNUM_SHIFT: u32 = 4; | |
| pub const MIDR_PARTNUM_MASK: u32 = 65520; | |
| pub const MIDR_ARCHITECTURE_SHIFT: u32 = 16; | |
| pub const MIDR_ARCHITECTURE_MASK: u32 = 983040; | |
| pub const MIDR_VARIANT_SHIFT: u32 = 20; | |
| pub const MIDR_VARIANT_MASK: u32 = 15728640; | |
| pub const MIDR_IMPLEMENTOR_SHIFT: u32 = 24; | |
| pub const MIDR_IMPLEMENTOR_MASK: u32 = 4278190080; | |
| pub const MIDR_CPU_MODEL_MASK: u32 = 4279238640; | |
| pub const ARM_CPU_IMP_ARM: u32 = 65; | |
| pub const ARM_CPU_IMP_APM: u32 = 80; | |
| pub const ARM_CPU_IMP_CAVIUM: u32 = 67; | |
| pub const ARM_CPU_IMP_BRCM: u32 = 66; | |
| pub const ARM_CPU_IMP_QCOM: u32 = 81; | |
| pub const ARM_CPU_IMP_NVIDIA: u32 = 78; | |
| pub const ARM_CPU_IMP_FUJITSU: u32 = 70; | |
| pub const ARM_CPU_IMP_HISI: u32 = 72; | |
| pub const ARM_CPU_IMP_APPLE: u32 = 97; | |
| pub const ARM_CPU_IMP_AMPERE: u32 = 192; | |
| pub const ARM_CPU_PART_AEM_V8: u32 = 3343; | |
| pub const ARM_CPU_PART_FOUNDATION: u32 = 3328; | |
| pub const ARM_CPU_PART_CORTEX_A57: u32 = 3335; | |
| pub const ARM_CPU_PART_CORTEX_A72: u32 = 3336; | |
| pub const ARM_CPU_PART_CORTEX_A53: u32 = 3331; | |
| pub const ARM_CPU_PART_CORTEX_A73: u32 = 3337; | |
| pub const ARM_CPU_PART_CORTEX_A75: u32 = 3338; | |
| pub const ARM_CPU_PART_CORTEX_A35: u32 = 3332; | |
| pub const ARM_CPU_PART_CORTEX_A55: u32 = 3333; | |
| pub const ARM_CPU_PART_CORTEX_A76: u32 = 3339; | |
| pub const ARM_CPU_PART_NEOVERSE_N1: u32 = 3340; | |
| pub const ARM_CPU_PART_CORTEX_A77: u32 = 3341; | |
| pub const ARM_CPU_PART_NEOVERSE_V1: u32 = 3392; | |
| pub const ARM_CPU_PART_CORTEX_A78: u32 = 3393; | |
| pub const ARM_CPU_PART_CORTEX_A78AE: u32 = 3394; | |
| pub const ARM_CPU_PART_CORTEX_X1: u32 = 3396; | |
| pub const ARM_CPU_PART_CORTEX_A510: u32 = 3398; | |
| pub const ARM_CPU_PART_CORTEX_A520: u32 = 3456; | |
| pub const ARM_CPU_PART_CORTEX_A710: u32 = 3399; | |
| pub const ARM_CPU_PART_CORTEX_A715: u32 = 3405; | |
| pub const ARM_CPU_PART_CORTEX_X2: u32 = 3400; | |
| pub const ARM_CPU_PART_NEOVERSE_N2: u32 = 3401; | |
| pub const ARM_CPU_PART_CORTEX_A78C: u32 = 3403; | |
| pub const APM_CPU_PART_XGENE: u32 = 0; | |
| pub const APM_CPU_VAR_POTENZA: u32 = 0; | |
| pub const CAVIUM_CPU_PART_THUNDERX: u32 = 161; | |
| pub const CAVIUM_CPU_PART_THUNDERX_81XX: u32 = 162; | |
| pub const CAVIUM_CPU_PART_THUNDERX_83XX: u32 = 163; | |
| pub const CAVIUM_CPU_PART_THUNDERX2: u32 = 175; | |
| pub const CAVIUM_CPU_PART_OCTX2_98XX: u32 = 177; | |
| pub const CAVIUM_CPU_PART_OCTX2_96XX: u32 = 178; | |
| pub const CAVIUM_CPU_PART_OCTX2_95XX: u32 = 179; | |
| pub const CAVIUM_CPU_PART_OCTX2_95XXN: u32 = 180; | |
| pub const CAVIUM_CPU_PART_OCTX2_95XXMM: u32 = 181; | |
| pub const CAVIUM_CPU_PART_OCTX2_95XXO: u32 = 182; | |
| pub const BRCM_CPU_PART_BRAHMA_B53: u32 = 256; | |
| pub const BRCM_CPU_PART_VULCAN: u32 = 1302; | |
| pub const QCOM_CPU_PART_FALKOR_V1: u32 = 2048; | |
| pub const QCOM_CPU_PART_FALKOR: u32 = 3072; | |
| pub const QCOM_CPU_PART_KRYO: u32 = 512; | |
| pub const QCOM_CPU_PART_KRYO_2XX_GOLD: u32 = 2048; | |
| pub const QCOM_CPU_PART_KRYO_2XX_SILVER: u32 = 2049; | |
| pub const QCOM_CPU_PART_KRYO_3XX_SILVER: u32 = 2051; | |
| pub const QCOM_CPU_PART_KRYO_4XX_GOLD: u32 = 2052; | |
| pub const QCOM_CPU_PART_KRYO_4XX_SILVER: u32 = 2053; | |
| pub const NVIDIA_CPU_PART_DENVER: u32 = 3; | |
| pub const NVIDIA_CPU_PART_CARMEL: u32 = 4; | |
| pub const FUJITSU_CPU_PART_A64FX: u32 = 1; | |
| pub const HISI_CPU_PART_TSV110: u32 = 3329; | |
| pub const APPLE_CPU_PART_M1_ICESTORM: u32 = 34; | |
| pub const APPLE_CPU_PART_M1_FIRESTORM: u32 = 35; | |
| pub const APPLE_CPU_PART_M1_ICESTORM_PRO: u32 = 36; | |
| pub const APPLE_CPU_PART_M1_FIRESTORM_PRO: u32 = 37; | |
| pub const APPLE_CPU_PART_M1_ICESTORM_MAX: u32 = 40; | |
| pub const APPLE_CPU_PART_M1_FIRESTORM_MAX: u32 = 41; | |
| pub const APPLE_CPU_PART_M2_BLIZZARD: u32 = 50; | |
| pub const APPLE_CPU_PART_M2_AVALANCHE: u32 = 51; | |
| pub const APPLE_CPU_PART_M2_BLIZZARD_PRO: u32 = 52; | |
| pub const APPLE_CPU_PART_M2_AVALANCHE_PRO: u32 = 53; | |
| pub const APPLE_CPU_PART_M2_BLIZZARD_MAX: u32 = 56; | |
| pub const APPLE_CPU_PART_M2_AVALANCHE_MAX: u32 = 57; | |
| pub const AMPERE_CPU_PART_AMPERE1: u32 = 2755; | |
| pub const KASAN_TAG_KERNEL: u32 = 255; | |
| pub const KASAN_TAG_INVALID: u32 = 254; | |
| pub const KASAN_TAG_MAX: u32 = 253; | |
| pub const KASAN_TAG_MIN: u32 = 0; | |
| pub const Op0_shift: u32 = 19; | |
| pub const Op0_mask: u32 = 3; | |
| pub const Op1_shift: u32 = 16; | |
| pub const Op1_mask: u32 = 7; | |
| pub const CRn_shift: u32 = 12; | |
| pub const CRn_mask: u32 = 15; | |
| pub const CRm_shift: u32 = 8; | |
| pub const CRm_mask: u32 = 15; | |
| pub const Op2_shift: u32 = 5; | |
| pub const Op2_mask: u32 = 7; | |
| pub const PSTATE_Imm_shift: u32 = 8; | |
| pub const SYS_OSDTRRX_EL1_Op0: u32 = 2; | |
| pub const SYS_OSDTRRX_EL1_Op1: u32 = 0; | |
| pub const SYS_OSDTRRX_EL1_CRn: u32 = 0; | |
| pub const SYS_OSDTRRX_EL1_CRm: u32 = 0; | |
| pub const SYS_OSDTRRX_EL1_Op2: u32 = 2; | |
| pub const OSDTRRX_EL1_DTRRX_SHIFT: u32 = 0; | |
| pub const OSDTRRX_EL1_DTRRX_WIDTH: u32 = 32; | |
| pub const SYS_MDCCINT_EL1_Op0: u32 = 2; | |
| pub const SYS_MDCCINT_EL1_Op1: u32 = 0; | |
| pub const SYS_MDCCINT_EL1_CRn: u32 = 0; | |
| pub const SYS_MDCCINT_EL1_CRm: u32 = 2; | |
| pub const SYS_MDCCINT_EL1_Op2: u32 = 0; | |
| pub const MDCCINT_EL1_RX_SHIFT: u32 = 30; | |
| pub const MDCCINT_EL1_RX_WIDTH: u32 = 1; | |
| pub const MDCCINT_EL1_TX_SHIFT: u32 = 29; | |
| pub const MDCCINT_EL1_TX_WIDTH: u32 = 1; | |
| pub const SYS_MDSCR_EL1_Op0: u32 = 2; | |
| pub const SYS_MDSCR_EL1_Op1: u32 = 0; | |
| pub const SYS_MDSCR_EL1_CRn: u32 = 0; | |
| pub const SYS_MDSCR_EL1_CRm: u32 = 2; | |
| pub const SYS_MDSCR_EL1_Op2: u32 = 2; | |
| pub const MDSCR_EL1_EHBWE_SHIFT: u32 = 35; | |
| pub const MDSCR_EL1_EHBWE_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_EnSPM_SHIFT: u32 = 34; | |
| pub const MDSCR_EL1_EnSPM_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_TTA_SHIFT: u32 = 33; | |
| pub const MDSCR_EL1_TTA_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_EMBWE_SHIFT: u32 = 32; | |
| pub const MDSCR_EL1_EMBWE_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_TFO_SHIFT: u32 = 31; | |
| pub const MDSCR_EL1_TFO_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_RXfull_SHIFT: u32 = 30; | |
| pub const MDSCR_EL1_RXfull_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_TXfull_SHIFT: u32 = 29; | |
| pub const MDSCR_EL1_TXfull_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_RXO_SHIFT: u32 = 27; | |
| pub const MDSCR_EL1_RXO_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_TXU_SHIFT: u32 = 26; | |
| pub const MDSCR_EL1_TXU_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_INTdis_SHIFT: u32 = 22; | |
| pub const MDSCR_EL1_INTdis_WIDTH: u32 = 2; | |
| pub const MDSCR_EL1_TDA_SHIFT: u32 = 21; | |
| pub const MDSCR_EL1_TDA_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_SC2_SHIFT: u32 = 19; | |
| pub const MDSCR_EL1_SC2_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_MDE_SHIFT: u32 = 15; | |
| pub const MDSCR_EL1_MDE_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_HDE_SHIFT: u32 = 14; | |
| pub const MDSCR_EL1_HDE_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_KDE_SHIFT: u32 = 13; | |
| pub const MDSCR_EL1_KDE_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_TDCC_SHIFT: u32 = 12; | |
| pub const MDSCR_EL1_TDCC_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_ERR_SHIFT: u32 = 6; | |
| pub const MDSCR_EL1_ERR_WIDTH: u32 = 1; | |
| pub const MDSCR_EL1_SS_SHIFT: u32 = 0; | |
| pub const MDSCR_EL1_SS_WIDTH: u32 = 1; | |
| pub const SYS_OSDTRTX_EL1_Op0: u32 = 2; | |
| pub const SYS_OSDTRTX_EL1_Op1: u32 = 0; | |
| pub const SYS_OSDTRTX_EL1_CRn: u32 = 0; | |
| pub const SYS_OSDTRTX_EL1_CRm: u32 = 3; | |
| pub const SYS_OSDTRTX_EL1_Op2: u32 = 2; | |
| pub const OSDTRTX_EL1_DTRTX_SHIFT: u32 = 0; | |
| pub const OSDTRTX_EL1_DTRTX_WIDTH: u32 = 32; | |
| pub const SYS_OSECCR_EL1_Op0: u32 = 2; | |
| pub const SYS_OSECCR_EL1_Op1: u32 = 0; | |
| pub const SYS_OSECCR_EL1_CRn: u32 = 0; | |
| pub const SYS_OSECCR_EL1_CRm: u32 = 6; | |
| pub const SYS_OSECCR_EL1_Op2: u32 = 2; | |
| pub const OSECCR_EL1_EDECCR_SHIFT: u32 = 0; | |
| pub const OSECCR_EL1_EDECCR_WIDTH: u32 = 32; | |
| pub const SYS_OSLAR_EL1_Op0: u32 = 2; | |
| pub const SYS_OSLAR_EL1_Op1: u32 = 0; | |
| pub const SYS_OSLAR_EL1_CRn: u32 = 1; | |
| pub const SYS_OSLAR_EL1_CRm: u32 = 0; | |
| pub const SYS_OSLAR_EL1_Op2: u32 = 4; | |
| pub const OSLAR_EL1_OSLK_SHIFT: u32 = 0; | |
| pub const OSLAR_EL1_OSLK_WIDTH: u32 = 1; | |
| pub const SYS_ID_PFR0_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_PFR0_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_PFR0_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_PFR0_EL1_CRm: u32 = 1; | |
| pub const SYS_ID_PFR0_EL1_Op2: u32 = 0; | |
| pub const ID_PFR0_EL1_RAS_SHIFT: u32 = 28; | |
| pub const ID_PFR0_EL1_RAS_WIDTH: u32 = 4; | |
| pub const ID_PFR0_EL1_DIT_SHIFT: u32 = 24; | |
| pub const ID_PFR0_EL1_DIT_WIDTH: u32 = 4; | |
| pub const ID_PFR0_EL1_AMU_SHIFT: u32 = 20; | |
| pub const ID_PFR0_EL1_AMU_WIDTH: u32 = 4; | |
| pub const ID_PFR0_EL1_CSV2_SHIFT: u32 = 16; | |
| pub const ID_PFR0_EL1_CSV2_WIDTH: u32 = 4; | |
| pub const ID_PFR0_EL1_State3_SHIFT: u32 = 12; | |
| pub const ID_PFR0_EL1_State3_WIDTH: u32 = 4; | |
| pub const ID_PFR0_EL1_State2_SHIFT: u32 = 8; | |
| pub const ID_PFR0_EL1_State2_WIDTH: u32 = 4; | |
| pub const ID_PFR0_EL1_State1_SHIFT: u32 = 4; | |
| pub const ID_PFR0_EL1_State1_WIDTH: u32 = 4; | |
| pub const ID_PFR0_EL1_State0_SHIFT: u32 = 0; | |
| pub const ID_PFR0_EL1_State0_WIDTH: u32 = 4; | |
| pub const SYS_ID_PFR1_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_PFR1_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_PFR1_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_PFR1_EL1_CRm: u32 = 1; | |
| pub const SYS_ID_PFR1_EL1_Op2: u32 = 1; | |
| pub const ID_PFR1_EL1_GIC_SHIFT: u32 = 28; | |
| pub const ID_PFR1_EL1_GIC_WIDTH: u32 = 4; | |
| pub const ID_PFR1_EL1_Virt_frac_SHIFT: u32 = 24; | |
| pub const ID_PFR1_EL1_Virt_frac_WIDTH: u32 = 4; | |
| pub const ID_PFR1_EL1_Sec_frac_SHIFT: u32 = 20; | |
| pub const ID_PFR1_EL1_Sec_frac_WIDTH: u32 = 4; | |
| pub const ID_PFR1_EL1_GenTimer_SHIFT: u32 = 16; | |
| pub const ID_PFR1_EL1_GenTimer_WIDTH: u32 = 4; | |
| pub const ID_PFR1_EL1_Virtualization_SHIFT: u32 = 12; | |
| pub const ID_PFR1_EL1_Virtualization_WIDTH: u32 = 4; | |
| pub const ID_PFR1_EL1_MProgMod_SHIFT: u32 = 8; | |
| pub const ID_PFR1_EL1_MProgMod_WIDTH: u32 = 4; | |
| pub const ID_PFR1_EL1_Security_SHIFT: u32 = 4; | |
| pub const ID_PFR1_EL1_Security_WIDTH: u32 = 4; | |
| pub const ID_PFR1_EL1_ProgMod_SHIFT: u32 = 0; | |
| pub const ID_PFR1_EL1_ProgMod_WIDTH: u32 = 4; | |
| pub const SYS_ID_DFR0_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_DFR0_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_DFR0_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_DFR0_EL1_CRm: u32 = 1; | |
| pub const SYS_ID_DFR0_EL1_Op2: u32 = 2; | |
| pub const ID_DFR0_EL1_TraceFilt_SHIFT: u32 = 28; | |
| pub const ID_DFR0_EL1_TraceFilt_WIDTH: u32 = 4; | |
| pub const ID_DFR0_EL1_PerfMon_SHIFT: u32 = 24; | |
| pub const ID_DFR0_EL1_PerfMon_WIDTH: u32 = 4; | |
| pub const ID_DFR0_EL1_MProfDbg_SHIFT: u32 = 20; | |
| pub const ID_DFR0_EL1_MProfDbg_WIDTH: u32 = 4; | |
| pub const ID_DFR0_EL1_MMapTrc_SHIFT: u32 = 16; | |
| pub const ID_DFR0_EL1_MMapTrc_WIDTH: u32 = 4; | |
| pub const ID_DFR0_EL1_CopTrc_SHIFT: u32 = 12; | |
| pub const ID_DFR0_EL1_CopTrc_WIDTH: u32 = 4; | |
| pub const ID_DFR0_EL1_MMapDbg_SHIFT: u32 = 8; | |
| pub const ID_DFR0_EL1_MMapDbg_WIDTH: u32 = 4; | |
| pub const ID_DFR0_EL1_CopSDbg_SHIFT: u32 = 4; | |
| pub const ID_DFR0_EL1_CopSDbg_WIDTH: u32 = 4; | |
| pub const ID_DFR0_EL1_CopDbg_SHIFT: u32 = 0; | |
| pub const ID_DFR0_EL1_CopDbg_WIDTH: u32 = 4; | |
| pub const SYS_ID_AFR0_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AFR0_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AFR0_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AFR0_EL1_CRm: u32 = 1; | |
| pub const SYS_ID_AFR0_EL1_Op2: u32 = 3; | |
| pub const ID_AFR0_EL1_IMPDEF3_SHIFT: u32 = 12; | |
| pub const ID_AFR0_EL1_IMPDEF3_WIDTH: u32 = 4; | |
| pub const ID_AFR0_EL1_IMPDEF2_SHIFT: u32 = 8; | |
| pub const ID_AFR0_EL1_IMPDEF2_WIDTH: u32 = 4; | |
| pub const ID_AFR0_EL1_IMPDEF1_SHIFT: u32 = 4; | |
| pub const ID_AFR0_EL1_IMPDEF1_WIDTH: u32 = 4; | |
| pub const ID_AFR0_EL1_IMPDEF0_SHIFT: u32 = 0; | |
| pub const ID_AFR0_EL1_IMPDEF0_WIDTH: u32 = 4; | |
| pub const SYS_ID_MMFR0_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_MMFR0_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_MMFR0_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_MMFR0_EL1_CRm: u32 = 1; | |
| pub const SYS_ID_MMFR0_EL1_Op2: u32 = 4; | |
| pub const ID_MMFR0_EL1_InnerShr_SHIFT: u32 = 28; | |
| pub const ID_MMFR0_EL1_InnerShr_WIDTH: u32 = 4; | |
| pub const ID_MMFR0_EL1_FCSE_SHIFT: u32 = 24; | |
| pub const ID_MMFR0_EL1_FCSE_WIDTH: u32 = 4; | |
| pub const ID_MMFR0_EL1_AuxReg_SHIFT: u32 = 20; | |
| pub const ID_MMFR0_EL1_AuxReg_WIDTH: u32 = 4; | |
| pub const ID_MMFR0_EL1_TCM_SHIFT: u32 = 16; | |
| pub const ID_MMFR0_EL1_TCM_WIDTH: u32 = 4; | |
| pub const ID_MMFR0_EL1_ShareLvl_SHIFT: u32 = 12; | |
| pub const ID_MMFR0_EL1_ShareLvl_WIDTH: u32 = 4; | |
| pub const ID_MMFR0_EL1_OuterShr_SHIFT: u32 = 8; | |
| pub const ID_MMFR0_EL1_OuterShr_WIDTH: u32 = 4; | |
| pub const ID_MMFR0_EL1_PMSA_SHIFT: u32 = 4; | |
| pub const ID_MMFR0_EL1_PMSA_WIDTH: u32 = 4; | |
| pub const ID_MMFR0_EL1_VMSA_SHIFT: u32 = 0; | |
| pub const ID_MMFR0_EL1_VMSA_WIDTH: u32 = 4; | |
| pub const SYS_ID_MMFR1_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_MMFR1_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_MMFR1_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_MMFR1_EL1_CRm: u32 = 1; | |
| pub const SYS_ID_MMFR1_EL1_Op2: u32 = 5; | |
| pub const ID_MMFR1_EL1_BPred_SHIFT: u32 = 28; | |
| pub const ID_MMFR1_EL1_BPred_WIDTH: u32 = 4; | |
| pub const ID_MMFR1_EL1_L1TstCln_SHIFT: u32 = 24; | |
| pub const ID_MMFR1_EL1_L1TstCln_WIDTH: u32 = 4; | |
| pub const ID_MMFR1_EL1_L1Uni_SHIFT: u32 = 20; | |
| pub const ID_MMFR1_EL1_L1Uni_WIDTH: u32 = 4; | |
| pub const ID_MMFR1_EL1_L1Hvd_SHIFT: u32 = 16; | |
| pub const ID_MMFR1_EL1_L1Hvd_WIDTH: u32 = 4; | |
| pub const ID_MMFR1_EL1_L1UniSW_SHIFT: u32 = 12; | |
| pub const ID_MMFR1_EL1_L1UniSW_WIDTH: u32 = 4; | |
| pub const ID_MMFR1_EL1_L1HvdSW_SHIFT: u32 = 8; | |
| pub const ID_MMFR1_EL1_L1HvdSW_WIDTH: u32 = 4; | |
| pub const ID_MMFR1_EL1_L1UniVA_SHIFT: u32 = 4; | |
| pub const ID_MMFR1_EL1_L1UniVA_WIDTH: u32 = 4; | |
| pub const ID_MMFR1_EL1_L1HvdVA_SHIFT: u32 = 0; | |
| pub const ID_MMFR1_EL1_L1HvdVA_WIDTH: u32 = 4; | |
| pub const SYS_ID_MMFR2_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_MMFR2_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_MMFR2_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_MMFR2_EL1_CRm: u32 = 1; | |
| pub const SYS_ID_MMFR2_EL1_Op2: u32 = 6; | |
| pub const ID_MMFR2_EL1_HWAccFlg_SHIFT: u32 = 28; | |
| pub const ID_MMFR2_EL1_HWAccFlg_WIDTH: u32 = 4; | |
| pub const ID_MMFR2_EL1_WFIStall_SHIFT: u32 = 24; | |
| pub const ID_MMFR2_EL1_WFIStall_WIDTH: u32 = 4; | |
| pub const ID_MMFR2_EL1_MemBarr_SHIFT: u32 = 20; | |
| pub const ID_MMFR2_EL1_MemBarr_WIDTH: u32 = 4; | |
| pub const ID_MMFR2_EL1_UniTLB_SHIFT: u32 = 16; | |
| pub const ID_MMFR2_EL1_UniTLB_WIDTH: u32 = 4; | |
| pub const ID_MMFR2_EL1_HvdTLB_SHIFT: u32 = 12; | |
| pub const ID_MMFR2_EL1_HvdTLB_WIDTH: u32 = 4; | |
| pub const ID_MMFR2_EL1_L1HvdRng_SHIFT: u32 = 8; | |
| pub const ID_MMFR2_EL1_L1HvdRng_WIDTH: u32 = 4; | |
| pub const ID_MMFR2_EL1_L1HvdBG_SHIFT: u32 = 4; | |
| pub const ID_MMFR2_EL1_L1HvdBG_WIDTH: u32 = 4; | |
| pub const ID_MMFR2_EL1_L1HvdFG_SHIFT: u32 = 0; | |
| pub const ID_MMFR2_EL1_L1HvdFG_WIDTH: u32 = 4; | |
| pub const SYS_ID_MMFR3_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_MMFR3_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_MMFR3_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_MMFR3_EL1_CRm: u32 = 1; | |
| pub const SYS_ID_MMFR3_EL1_Op2: u32 = 7; | |
| pub const ID_MMFR3_EL1_Supersec_SHIFT: u32 = 28; | |
| pub const ID_MMFR3_EL1_Supersec_WIDTH: u32 = 4; | |
| pub const ID_MMFR3_EL1_CMemSz_SHIFT: u32 = 24; | |
| pub const ID_MMFR3_EL1_CMemSz_WIDTH: u32 = 4; | |
| pub const ID_MMFR3_EL1_CohWalk_SHIFT: u32 = 20; | |
| pub const ID_MMFR3_EL1_CohWalk_WIDTH: u32 = 4; | |
| pub const ID_MMFR3_EL1_PAN_SHIFT: u32 = 16; | |
| pub const ID_MMFR3_EL1_PAN_WIDTH: u32 = 4; | |
| pub const ID_MMFR3_EL1_MaintBcst_SHIFT: u32 = 12; | |
| pub const ID_MMFR3_EL1_MaintBcst_WIDTH: u32 = 4; | |
| pub const ID_MMFR3_EL1_BPMaint_SHIFT: u32 = 8; | |
| pub const ID_MMFR3_EL1_BPMaint_WIDTH: u32 = 4; | |
| pub const ID_MMFR3_EL1_CMaintSW_SHIFT: u32 = 4; | |
| pub const ID_MMFR3_EL1_CMaintSW_WIDTH: u32 = 4; | |
| pub const ID_MMFR3_EL1_CMaintVA_SHIFT: u32 = 0; | |
| pub const ID_MMFR3_EL1_CMaintVA_WIDTH: u32 = 4; | |
| pub const SYS_ID_ISAR0_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_ISAR0_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_ISAR0_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_ISAR0_EL1_CRm: u32 = 2; | |
| pub const SYS_ID_ISAR0_EL1_Op2: u32 = 0; | |
| pub const ID_ISAR0_EL1_Divide_SHIFT: u32 = 24; | |
| pub const ID_ISAR0_EL1_Divide_WIDTH: u32 = 4; | |
| pub const ID_ISAR0_EL1_Debug_SHIFT: u32 = 20; | |
| pub const ID_ISAR0_EL1_Debug_WIDTH: u32 = 4; | |
| pub const ID_ISAR0_EL1_Coproc_SHIFT: u32 = 16; | |
| pub const ID_ISAR0_EL1_Coproc_WIDTH: u32 = 4; | |
| pub const ID_ISAR0_EL1_CmpBranch_SHIFT: u32 = 12; | |
| pub const ID_ISAR0_EL1_CmpBranch_WIDTH: u32 = 4; | |
| pub const ID_ISAR0_EL1_BitField_SHIFT: u32 = 8; | |
| pub const ID_ISAR0_EL1_BitField_WIDTH: u32 = 4; | |
| pub const ID_ISAR0_EL1_BitCount_SHIFT: u32 = 4; | |
| pub const ID_ISAR0_EL1_BitCount_WIDTH: u32 = 4; | |
| pub const ID_ISAR0_EL1_Swap_SHIFT: u32 = 0; | |
| pub const ID_ISAR0_EL1_Swap_WIDTH: u32 = 4; | |
| pub const SYS_ID_ISAR1_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_ISAR1_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_ISAR1_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_ISAR1_EL1_CRm: u32 = 2; | |
| pub const SYS_ID_ISAR1_EL1_Op2: u32 = 1; | |
| pub const ID_ISAR1_EL1_Jazelle_SHIFT: u32 = 28; | |
| pub const ID_ISAR1_EL1_Jazelle_WIDTH: u32 = 4; | |
| pub const ID_ISAR1_EL1_Interwork_SHIFT: u32 = 24; | |
| pub const ID_ISAR1_EL1_Interwork_WIDTH: u32 = 4; | |
| pub const ID_ISAR1_EL1_Immediate_SHIFT: u32 = 20; | |
| pub const ID_ISAR1_EL1_Immediate_WIDTH: u32 = 4; | |
| pub const ID_ISAR1_EL1_IfThen_SHIFT: u32 = 16; | |
| pub const ID_ISAR1_EL1_IfThen_WIDTH: u32 = 4; | |
| pub const ID_ISAR1_EL1_Extend_SHIFT: u32 = 12; | |
| pub const ID_ISAR1_EL1_Extend_WIDTH: u32 = 4; | |
| pub const ID_ISAR1_EL1_Except_AR_SHIFT: u32 = 8; | |
| pub const ID_ISAR1_EL1_Except_AR_WIDTH: u32 = 4; | |
| pub const ID_ISAR1_EL1_Except_SHIFT: u32 = 4; | |
| pub const ID_ISAR1_EL1_Except_WIDTH: u32 = 4; | |
| pub const ID_ISAR1_EL1_Endian_SHIFT: u32 = 0; | |
| pub const ID_ISAR1_EL1_Endian_WIDTH: u32 = 4; | |
| pub const SYS_ID_ISAR2_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_ISAR2_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_ISAR2_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_ISAR2_EL1_CRm: u32 = 2; | |
| pub const SYS_ID_ISAR2_EL1_Op2: u32 = 2; | |
| pub const ID_ISAR2_EL1_Reversal_SHIFT: u32 = 28; | |
| pub const ID_ISAR2_EL1_Reversal_WIDTH: u32 = 4; | |
| pub const ID_ISAR2_EL1_PSR_AR_SHIFT: u32 = 24; | |
| pub const ID_ISAR2_EL1_PSR_AR_WIDTH: u32 = 4; | |
| pub const ID_ISAR2_EL1_MultU_SHIFT: u32 = 20; | |
| pub const ID_ISAR2_EL1_MultU_WIDTH: u32 = 4; | |
| pub const ID_ISAR2_EL1_MultS_SHIFT: u32 = 16; | |
| pub const ID_ISAR2_EL1_MultS_WIDTH: u32 = 4; | |
| pub const ID_ISAR2_EL1_Mult_SHIFT: u32 = 12; | |
| pub const ID_ISAR2_EL1_Mult_WIDTH: u32 = 4; | |
| pub const ID_ISAR2_EL1_MultiAccessInt_SHIFT: u32 = 8; | |
| pub const ID_ISAR2_EL1_MultiAccessInt_WIDTH: u32 = 4; | |
| pub const ID_ISAR2_EL1_MemHint_SHIFT: u32 = 4; | |
| pub const ID_ISAR2_EL1_MemHint_WIDTH: u32 = 4; | |
| pub const ID_ISAR2_EL1_LoadStore_SHIFT: u32 = 0; | |
| pub const ID_ISAR2_EL1_LoadStore_WIDTH: u32 = 4; | |
| pub const SYS_ID_ISAR3_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_ISAR3_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_ISAR3_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_ISAR3_EL1_CRm: u32 = 2; | |
| pub const SYS_ID_ISAR3_EL1_Op2: u32 = 3; | |
| pub const ID_ISAR3_EL1_T32EE_SHIFT: u32 = 28; | |
| pub const ID_ISAR3_EL1_T32EE_WIDTH: u32 = 4; | |
| pub const ID_ISAR3_EL1_TrueNOP_SHIFT: u32 = 24; | |
| pub const ID_ISAR3_EL1_TrueNOP_WIDTH: u32 = 4; | |
| pub const ID_ISAR3_EL1_T32Copy_SHIFT: u32 = 20; | |
| pub const ID_ISAR3_EL1_T32Copy_WIDTH: u32 = 4; | |
| pub const ID_ISAR3_EL1_TabBranch_SHIFT: u32 = 16; | |
| pub const ID_ISAR3_EL1_TabBranch_WIDTH: u32 = 4; | |
| pub const ID_ISAR3_EL1_SynchPrim_SHIFT: u32 = 12; | |
| pub const ID_ISAR3_EL1_SynchPrim_WIDTH: u32 = 4; | |
| pub const ID_ISAR3_EL1_SVC_SHIFT: u32 = 8; | |
| pub const ID_ISAR3_EL1_SVC_WIDTH: u32 = 4; | |
| pub const ID_ISAR3_EL1_SIMD_SHIFT: u32 = 4; | |
| pub const ID_ISAR3_EL1_SIMD_WIDTH: u32 = 4; | |
| pub const ID_ISAR3_EL1_Saturate_SHIFT: u32 = 0; | |
| pub const ID_ISAR3_EL1_Saturate_WIDTH: u32 = 4; | |
| pub const SYS_ID_ISAR4_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_ISAR4_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_ISAR4_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_ISAR4_EL1_CRm: u32 = 2; | |
| pub const SYS_ID_ISAR4_EL1_Op2: u32 = 4; | |
| pub const ID_ISAR4_EL1_SWP_frac_SHIFT: u32 = 28; | |
| pub const ID_ISAR4_EL1_SWP_frac_WIDTH: u32 = 4; | |
| pub const ID_ISAR4_EL1_PSR_M_SHIFT: u32 = 24; | |
| pub const ID_ISAR4_EL1_PSR_M_WIDTH: u32 = 4; | |
| pub const ID_ISAR4_EL1_SynchPrim_frac_SHIFT: u32 = 20; | |
| pub const ID_ISAR4_EL1_SynchPrim_frac_WIDTH: u32 = 4; | |
| pub const ID_ISAR4_EL1_Barrier_SHIFT: u32 = 16; | |
| pub const ID_ISAR4_EL1_Barrier_WIDTH: u32 = 4; | |
| pub const ID_ISAR4_EL1_SMC_SHIFT: u32 = 12; | |
| pub const ID_ISAR4_EL1_SMC_WIDTH: u32 = 4; | |
| pub const ID_ISAR4_EL1_Writeback_SHIFT: u32 = 8; | |
| pub const ID_ISAR4_EL1_Writeback_WIDTH: u32 = 4; | |
| pub const ID_ISAR4_EL1_WithShifts_SHIFT: u32 = 4; | |
| pub const ID_ISAR4_EL1_WithShifts_WIDTH: u32 = 4; | |
| pub const ID_ISAR4_EL1_Unpriv_SHIFT: u32 = 0; | |
| pub const ID_ISAR4_EL1_Unpriv_WIDTH: u32 = 4; | |
| pub const SYS_ID_ISAR5_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_ISAR5_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_ISAR5_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_ISAR5_EL1_CRm: u32 = 2; | |
| pub const SYS_ID_ISAR5_EL1_Op2: u32 = 5; | |
| pub const ID_ISAR5_EL1_VCMA_SHIFT: u32 = 28; | |
| pub const ID_ISAR5_EL1_VCMA_WIDTH: u32 = 4; | |
| pub const ID_ISAR5_EL1_RDM_SHIFT: u32 = 24; | |
| pub const ID_ISAR5_EL1_RDM_WIDTH: u32 = 4; | |
| pub const ID_ISAR5_EL1_CRC32_SHIFT: u32 = 16; | |
| pub const ID_ISAR5_EL1_CRC32_WIDTH: u32 = 4; | |
| pub const ID_ISAR5_EL1_SHA2_SHIFT: u32 = 12; | |
| pub const ID_ISAR5_EL1_SHA2_WIDTH: u32 = 4; | |
| pub const ID_ISAR5_EL1_SHA1_SHIFT: u32 = 8; | |
| pub const ID_ISAR5_EL1_SHA1_WIDTH: u32 = 4; | |
| pub const ID_ISAR5_EL1_AES_SHIFT: u32 = 4; | |
| pub const ID_ISAR5_EL1_AES_WIDTH: u32 = 4; | |
| pub const ID_ISAR5_EL1_SEVL_SHIFT: u32 = 0; | |
| pub const ID_ISAR5_EL1_SEVL_WIDTH: u32 = 4; | |
| pub const SYS_ID_ISAR6_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_ISAR6_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_ISAR6_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_ISAR6_EL1_CRm: u32 = 2; | |
| pub const SYS_ID_ISAR6_EL1_Op2: u32 = 7; | |
| pub const ID_ISAR6_EL1_I8MM_SHIFT: u32 = 24; | |
| pub const ID_ISAR6_EL1_I8MM_WIDTH: u32 = 4; | |
| pub const ID_ISAR6_EL1_BF16_SHIFT: u32 = 20; | |
| pub const ID_ISAR6_EL1_BF16_WIDTH: u32 = 4; | |
| pub const ID_ISAR6_EL1_SPECRES_SHIFT: u32 = 16; | |
| pub const ID_ISAR6_EL1_SPECRES_WIDTH: u32 = 4; | |
| pub const ID_ISAR6_EL1_SB_SHIFT: u32 = 12; | |
| pub const ID_ISAR6_EL1_SB_WIDTH: u32 = 4; | |
| pub const ID_ISAR6_EL1_FHM_SHIFT: u32 = 8; | |
| pub const ID_ISAR6_EL1_FHM_WIDTH: u32 = 4; | |
| pub const ID_ISAR6_EL1_DP_SHIFT: u32 = 4; | |
| pub const ID_ISAR6_EL1_DP_WIDTH: u32 = 4; | |
| pub const ID_ISAR6_EL1_JSCVT_SHIFT: u32 = 0; | |
| pub const ID_ISAR6_EL1_JSCVT_WIDTH: u32 = 4; | |
| pub const SYS_ID_MMFR4_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_MMFR4_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_MMFR4_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_MMFR4_EL1_CRm: u32 = 2; | |
| pub const SYS_ID_MMFR4_EL1_Op2: u32 = 6; | |
| pub const ID_MMFR4_EL1_EVT_SHIFT: u32 = 28; | |
| pub const ID_MMFR4_EL1_EVT_WIDTH: u32 = 4; | |
| pub const ID_MMFR4_EL1_CCIDX_SHIFT: u32 = 24; | |
| pub const ID_MMFR4_EL1_CCIDX_WIDTH: u32 = 4; | |
| pub const ID_MMFR4_EL1_LSM_SHIFT: u32 = 20; | |
| pub const ID_MMFR4_EL1_LSM_WIDTH: u32 = 4; | |
| pub const ID_MMFR4_EL1_HPDS_SHIFT: u32 = 16; | |
| pub const ID_MMFR4_EL1_HPDS_WIDTH: u32 = 4; | |
| pub const ID_MMFR4_EL1_CnP_SHIFT: u32 = 12; | |
| pub const ID_MMFR4_EL1_CnP_WIDTH: u32 = 4; | |
| pub const ID_MMFR4_EL1_XNX_SHIFT: u32 = 8; | |
| pub const ID_MMFR4_EL1_XNX_WIDTH: u32 = 4; | |
| pub const ID_MMFR4_EL1_AC2_SHIFT: u32 = 4; | |
| pub const ID_MMFR4_EL1_AC2_WIDTH: u32 = 4; | |
| pub const ID_MMFR4_EL1_SpecSEI_SHIFT: u32 = 0; | |
| pub const ID_MMFR4_EL1_SpecSEI_WIDTH: u32 = 4; | |
| pub const SYS_MVFR0_EL1_Op0: u32 = 3; | |
| pub const SYS_MVFR0_EL1_Op1: u32 = 0; | |
| pub const SYS_MVFR0_EL1_CRn: u32 = 0; | |
| pub const SYS_MVFR0_EL1_CRm: u32 = 3; | |
| pub const SYS_MVFR0_EL1_Op2: u32 = 0; | |
| pub const MVFR0_EL1_FPRound_SHIFT: u32 = 28; | |
| pub const MVFR0_EL1_FPRound_WIDTH: u32 = 4; | |
| pub const MVFR0_EL1_FPShVec_SHIFT: u32 = 24; | |
| pub const MVFR0_EL1_FPShVec_WIDTH: u32 = 4; | |
| pub const MVFR0_EL1_FPSqrt_SHIFT: u32 = 20; | |
| pub const MVFR0_EL1_FPSqrt_WIDTH: u32 = 4; | |
| pub const MVFR0_EL1_FPDivide_SHIFT: u32 = 16; | |
| pub const MVFR0_EL1_FPDivide_WIDTH: u32 = 4; | |
| pub const MVFR0_EL1_FPTrap_SHIFT: u32 = 12; | |
| pub const MVFR0_EL1_FPTrap_WIDTH: u32 = 4; | |
| pub const MVFR0_EL1_FPDP_SHIFT: u32 = 8; | |
| pub const MVFR0_EL1_FPDP_WIDTH: u32 = 4; | |
| pub const MVFR0_EL1_FPSP_SHIFT: u32 = 4; | |
| pub const MVFR0_EL1_FPSP_WIDTH: u32 = 4; | |
| pub const MVFR0_EL1_SIMDReg_SHIFT: u32 = 0; | |
| pub const MVFR0_EL1_SIMDReg_WIDTH: u32 = 4; | |
| pub const SYS_MVFR1_EL1_Op0: u32 = 3; | |
| pub const SYS_MVFR1_EL1_Op1: u32 = 0; | |
| pub const SYS_MVFR1_EL1_CRn: u32 = 0; | |
| pub const SYS_MVFR1_EL1_CRm: u32 = 3; | |
| pub const SYS_MVFR1_EL1_Op2: u32 = 1; | |
| pub const MVFR1_EL1_SIMDFMAC_SHIFT: u32 = 28; | |
| pub const MVFR1_EL1_SIMDFMAC_WIDTH: u32 = 4; | |
| pub const MVFR1_EL1_FPHP_SHIFT: u32 = 24; | |
| pub const MVFR1_EL1_FPHP_WIDTH: u32 = 4; | |
| pub const MVFR1_EL1_SIMDHP_SHIFT: u32 = 20; | |
| pub const MVFR1_EL1_SIMDHP_WIDTH: u32 = 4; | |
| pub const MVFR1_EL1_SIMDSP_SHIFT: u32 = 16; | |
| pub const MVFR1_EL1_SIMDSP_WIDTH: u32 = 4; | |
| pub const MVFR1_EL1_SIMDInt_SHIFT: u32 = 12; | |
| pub const MVFR1_EL1_SIMDInt_WIDTH: u32 = 4; | |
| pub const MVFR1_EL1_SIMDLS_SHIFT: u32 = 8; | |
| pub const MVFR1_EL1_SIMDLS_WIDTH: u32 = 4; | |
| pub const MVFR1_EL1_FPDNaN_SHIFT: u32 = 4; | |
| pub const MVFR1_EL1_FPDNaN_WIDTH: u32 = 4; | |
| pub const MVFR1_EL1_FPFtZ_SHIFT: u32 = 0; | |
| pub const MVFR1_EL1_FPFtZ_WIDTH: u32 = 4; | |
| pub const SYS_MVFR2_EL1_Op0: u32 = 3; | |
| pub const SYS_MVFR2_EL1_Op1: u32 = 0; | |
| pub const SYS_MVFR2_EL1_CRn: u32 = 0; | |
| pub const SYS_MVFR2_EL1_CRm: u32 = 3; | |
| pub const SYS_MVFR2_EL1_Op2: u32 = 2; | |
| pub const MVFR2_EL1_FPMisc_SHIFT: u32 = 4; | |
| pub const MVFR2_EL1_FPMisc_WIDTH: u32 = 4; | |
| pub const MVFR2_EL1_SIMDMisc_SHIFT: u32 = 0; | |
| pub const MVFR2_EL1_SIMDMisc_WIDTH: u32 = 4; | |
| pub const SYS_ID_PFR2_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_PFR2_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_PFR2_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_PFR2_EL1_CRm: u32 = 3; | |
| pub const SYS_ID_PFR2_EL1_Op2: u32 = 4; | |
| pub const ID_PFR2_EL1_RAS_frac_SHIFT: u32 = 8; | |
| pub const ID_PFR2_EL1_RAS_frac_WIDTH: u32 = 4; | |
| pub const ID_PFR2_EL1_SSBS_SHIFT: u32 = 4; | |
| pub const ID_PFR2_EL1_SSBS_WIDTH: u32 = 4; | |
| pub const ID_PFR2_EL1_CSV3_SHIFT: u32 = 0; | |
| pub const ID_PFR2_EL1_CSV3_WIDTH: u32 = 4; | |
| pub const SYS_ID_DFR1_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_DFR1_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_DFR1_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_DFR1_EL1_CRm: u32 = 3; | |
| pub const SYS_ID_DFR1_EL1_Op2: u32 = 5; | |
| pub const ID_DFR1_EL1_HPMN0_SHIFT: u32 = 4; | |
| pub const ID_DFR1_EL1_HPMN0_WIDTH: u32 = 4; | |
| pub const ID_DFR1_EL1_MTPMU_SHIFT: u32 = 0; | |
| pub const ID_DFR1_EL1_MTPMU_WIDTH: u32 = 4; | |
| pub const SYS_ID_MMFR5_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_MMFR5_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_MMFR5_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_MMFR5_EL1_CRm: u32 = 3; | |
| pub const SYS_ID_MMFR5_EL1_Op2: u32 = 6; | |
| pub const ID_MMFR5_EL1_nTLBPA_SHIFT: u32 = 4; | |
| pub const ID_MMFR5_EL1_nTLBPA_WIDTH: u32 = 4; | |
| pub const ID_MMFR5_EL1_ETS_SHIFT: u32 = 0; | |
| pub const ID_MMFR5_EL1_ETS_WIDTH: u32 = 4; | |
| pub const SYS_ID_AA64PFR0_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64PFR0_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64PFR0_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64PFR0_EL1_CRm: u32 = 4; | |
| pub const SYS_ID_AA64PFR0_EL1_Op2: u32 = 0; | |
| pub const ID_AA64PFR0_EL1_CSV3_SHIFT: u32 = 60; | |
| pub const ID_AA64PFR0_EL1_CSV3_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_CSV2_SHIFT: u32 = 56; | |
| pub const ID_AA64PFR0_EL1_CSV2_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_RME_SHIFT: u32 = 52; | |
| pub const ID_AA64PFR0_EL1_RME_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_DIT_SHIFT: u32 = 48; | |
| pub const ID_AA64PFR0_EL1_DIT_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_AMU_SHIFT: u32 = 44; | |
| pub const ID_AA64PFR0_EL1_AMU_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_MPAM_SHIFT: u32 = 40; | |
| pub const ID_AA64PFR0_EL1_MPAM_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_SEL2_SHIFT: u32 = 36; | |
| pub const ID_AA64PFR0_EL1_SEL2_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_SVE_SHIFT: u32 = 32; | |
| pub const ID_AA64PFR0_EL1_SVE_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_RAS_SHIFT: u32 = 28; | |
| pub const ID_AA64PFR0_EL1_RAS_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_GIC_SHIFT: u32 = 24; | |
| pub const ID_AA64PFR0_EL1_GIC_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_AdvSIMD_SHIFT: u32 = 20; | |
| pub const ID_AA64PFR0_EL1_AdvSIMD_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_FP_SHIFT: u32 = 16; | |
| pub const ID_AA64PFR0_EL1_FP_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_EL3_SHIFT: u32 = 12; | |
| pub const ID_AA64PFR0_EL1_EL3_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_EL2_SHIFT: u32 = 8; | |
| pub const ID_AA64PFR0_EL1_EL2_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_EL1_SHIFT: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_EL1_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR0_EL1_EL0_SHIFT: u32 = 0; | |
| pub const ID_AA64PFR0_EL1_EL0_WIDTH: u32 = 4; | |
| pub const SYS_ID_AA64PFR1_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64PFR1_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64PFR1_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64PFR1_EL1_CRm: u32 = 4; | |
| pub const SYS_ID_AA64PFR1_EL1_Op2: u32 = 1; | |
| pub const ID_AA64PFR1_EL1_PFAR_SHIFT: u32 = 60; | |
| pub const ID_AA64PFR1_EL1_PFAR_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_DF2_SHIFT: u32 = 56; | |
| pub const ID_AA64PFR1_EL1_DF2_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_MTEX_SHIFT: u32 = 52; | |
| pub const ID_AA64PFR1_EL1_MTEX_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_THE_SHIFT: u32 = 48; | |
| pub const ID_AA64PFR1_EL1_THE_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_GCS_SHIFT: u32 = 44; | |
| pub const ID_AA64PFR1_EL1_GCS_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_MTE_frac_SHIFT: u32 = 40; | |
| pub const ID_AA64PFR1_EL1_MTE_frac_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_NMI_SHIFT: u32 = 36; | |
| pub const ID_AA64PFR1_EL1_NMI_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_CSV2_frac_SHIFT: u32 = 32; | |
| pub const ID_AA64PFR1_EL1_CSV2_frac_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_RNDR_trap_SHIFT: u32 = 28; | |
| pub const ID_AA64PFR1_EL1_RNDR_trap_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_SME_SHIFT: u32 = 24; | |
| pub const ID_AA64PFR1_EL1_SME_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_MPAM_frac_SHIFT: u32 = 16; | |
| pub const ID_AA64PFR1_EL1_MPAM_frac_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_RAS_frac_SHIFT: u32 = 12; | |
| pub const ID_AA64PFR1_EL1_RAS_frac_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_MTE_SHIFT: u32 = 8; | |
| pub const ID_AA64PFR1_EL1_MTE_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_SSBS_SHIFT: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_SSBS_WIDTH: u32 = 4; | |
| pub const ID_AA64PFR1_EL1_BT_SHIFT: u32 = 0; | |
| pub const ID_AA64PFR1_EL1_BT_WIDTH: u32 = 4; | |
| pub const SYS_ID_AA64ZFR0_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64ZFR0_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64ZFR0_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64ZFR0_EL1_CRm: u32 = 4; | |
| pub const SYS_ID_AA64ZFR0_EL1_Op2: u32 = 4; | |
| pub const ID_AA64ZFR0_EL1_F64MM_SHIFT: u32 = 56; | |
| pub const ID_AA64ZFR0_EL1_F64MM_WIDTH: u32 = 4; | |
| pub const ID_AA64ZFR0_EL1_F32MM_SHIFT: u32 = 52; | |
| pub const ID_AA64ZFR0_EL1_F32MM_WIDTH: u32 = 4; | |
| pub const ID_AA64ZFR0_EL1_I8MM_SHIFT: u32 = 44; | |
| pub const ID_AA64ZFR0_EL1_I8MM_WIDTH: u32 = 4; | |
| pub const ID_AA64ZFR0_EL1_SM4_SHIFT: u32 = 40; | |
| pub const ID_AA64ZFR0_EL1_SM4_WIDTH: u32 = 4; | |
| pub const ID_AA64ZFR0_EL1_SHA3_SHIFT: u32 = 32; | |
| pub const ID_AA64ZFR0_EL1_SHA3_WIDTH: u32 = 4; | |
| pub const ID_AA64ZFR0_EL1_B16B16_SHIFT: u32 = 24; | |
| pub const ID_AA64ZFR0_EL1_B16B16_WIDTH: u32 = 4; | |
| pub const ID_AA64ZFR0_EL1_BF16_SHIFT: u32 = 20; | |
| pub const ID_AA64ZFR0_EL1_BF16_WIDTH: u32 = 4; | |
| pub const ID_AA64ZFR0_EL1_BitPerm_SHIFT: u32 = 16; | |
| pub const ID_AA64ZFR0_EL1_BitPerm_WIDTH: u32 = 4; | |
| pub const ID_AA64ZFR0_EL1_AES_SHIFT: u32 = 4; | |
| pub const ID_AA64ZFR0_EL1_AES_WIDTH: u32 = 4; | |
| pub const ID_AA64ZFR0_EL1_SVEver_SHIFT: u32 = 0; | |
| pub const ID_AA64ZFR0_EL1_SVEver_WIDTH: u32 = 4; | |
| pub const SYS_ID_AA64SMFR0_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64SMFR0_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64SMFR0_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64SMFR0_EL1_CRm: u32 = 4; | |
| pub const SYS_ID_AA64SMFR0_EL1_Op2: u32 = 5; | |
| pub const ID_AA64SMFR0_EL1_FA64_SHIFT: u32 = 63; | |
| pub const ID_AA64SMFR0_EL1_FA64_WIDTH: u32 = 1; | |
| pub const ID_AA64SMFR0_EL1_SMEver_SHIFT: u32 = 56; | |
| pub const ID_AA64SMFR0_EL1_SMEver_WIDTH: u32 = 4; | |
| pub const ID_AA64SMFR0_EL1_I16I64_SHIFT: u32 = 52; | |
| pub const ID_AA64SMFR0_EL1_I16I64_WIDTH: u32 = 4; | |
| pub const ID_AA64SMFR0_EL1_F64F64_SHIFT: u32 = 48; | |
| pub const ID_AA64SMFR0_EL1_F64F64_WIDTH: u32 = 1; | |
| pub const ID_AA64SMFR0_EL1_I16I32_SHIFT: u32 = 44; | |
| pub const ID_AA64SMFR0_EL1_I16I32_WIDTH: u32 = 4; | |
| pub const ID_AA64SMFR0_EL1_B16B16_SHIFT: u32 = 43; | |
| pub const ID_AA64SMFR0_EL1_B16B16_WIDTH: u32 = 1; | |
| pub const ID_AA64SMFR0_EL1_F16F16_SHIFT: u32 = 42; | |
| pub const ID_AA64SMFR0_EL1_F16F16_WIDTH: u32 = 1; | |
| pub const ID_AA64SMFR0_EL1_I8I32_SHIFT: u32 = 36; | |
| pub const ID_AA64SMFR0_EL1_I8I32_WIDTH: u32 = 4; | |
| pub const ID_AA64SMFR0_EL1_F16F32_SHIFT: u32 = 35; | |
| pub const ID_AA64SMFR0_EL1_F16F32_WIDTH: u32 = 1; | |
| pub const ID_AA64SMFR0_EL1_B16F32_SHIFT: u32 = 34; | |
| pub const ID_AA64SMFR0_EL1_B16F32_WIDTH: u32 = 1; | |
| pub const ID_AA64SMFR0_EL1_BI32I32_SHIFT: u32 = 33; | |
| pub const ID_AA64SMFR0_EL1_BI32I32_WIDTH: u32 = 1; | |
| pub const ID_AA64SMFR0_EL1_F32F32_SHIFT: u32 = 32; | |
| pub const ID_AA64SMFR0_EL1_F32F32_WIDTH: u32 = 1; | |
| pub const SYS_ID_AA64DFR0_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64DFR0_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64DFR0_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64DFR0_EL1_CRm: u32 = 5; | |
| pub const SYS_ID_AA64DFR0_EL1_Op2: u32 = 0; | |
| pub const ID_AA64DFR0_EL1_HPMN0_SHIFT: u32 = 60; | |
| pub const ID_AA64DFR0_EL1_HPMN0_WIDTH: u32 = 4; | |
| pub const ID_AA64DFR0_EL1_BRBE_SHIFT: u32 = 52; | |
| pub const ID_AA64DFR0_EL1_BRBE_WIDTH: u32 = 4; | |
| pub const ID_AA64DFR0_EL1_MTPMU_SHIFT: u32 = 48; | |
| pub const ID_AA64DFR0_EL1_MTPMU_WIDTH: u32 = 4; | |
| pub const ID_AA64DFR0_EL1_TraceBuffer_SHIFT: u32 = 44; | |
| pub const ID_AA64DFR0_EL1_TraceBuffer_WIDTH: u32 = 4; | |
| pub const ID_AA64DFR0_EL1_TraceFilt_SHIFT: u32 = 40; | |
| pub const ID_AA64DFR0_EL1_TraceFilt_WIDTH: u32 = 4; | |
| pub const ID_AA64DFR0_EL1_DoubleLock_SHIFT: u32 = 36; | |
| pub const ID_AA64DFR0_EL1_DoubleLock_WIDTH: u32 = 4; | |
| pub const ID_AA64DFR0_EL1_PMSVer_SHIFT: u32 = 32; | |
| pub const ID_AA64DFR0_EL1_PMSVer_WIDTH: u32 = 4; | |
| pub const ID_AA64DFR0_EL1_CTX_CMPs_SHIFT: u32 = 28; | |
| pub const ID_AA64DFR0_EL1_CTX_CMPs_WIDTH: u32 = 4; | |
| pub const ID_AA64DFR0_EL1_WRPs_SHIFT: u32 = 20; | |
| pub const ID_AA64DFR0_EL1_WRPs_WIDTH: u32 = 4; | |
| pub const ID_AA64DFR0_EL1_BRPs_SHIFT: u32 = 12; | |
| pub const ID_AA64DFR0_EL1_BRPs_WIDTH: u32 = 4; | |
| pub const ID_AA64DFR0_EL1_PMUVer_SHIFT: u32 = 8; | |
| pub const ID_AA64DFR0_EL1_PMUVer_WIDTH: u32 = 4; | |
| pub const ID_AA64DFR0_EL1_TraceVer_SHIFT: u32 = 4; | |
| pub const ID_AA64DFR0_EL1_TraceVer_WIDTH: u32 = 4; | |
| pub const ID_AA64DFR0_EL1_DebugVer_SHIFT: u32 = 0; | |
| pub const ID_AA64DFR0_EL1_DebugVer_WIDTH: u32 = 4; | |
| pub const SYS_ID_AA64DFR1_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64DFR1_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64DFR1_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64DFR1_EL1_CRm: u32 = 5; | |
| pub const SYS_ID_AA64DFR1_EL1_Op2: u32 = 1; | |
| pub const SYS_ID_AA64AFR0_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64AFR0_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64AFR0_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64AFR0_EL1_CRm: u32 = 5; | |
| pub const SYS_ID_AA64AFR0_EL1_Op2: u32 = 4; | |
| pub const ID_AA64AFR0_EL1_IMPDEF7_SHIFT: u32 = 28; | |
| pub const ID_AA64AFR0_EL1_IMPDEF7_WIDTH: u32 = 4; | |
| pub const ID_AA64AFR0_EL1_IMPDEF6_SHIFT: u32 = 24; | |
| pub const ID_AA64AFR0_EL1_IMPDEF6_WIDTH: u32 = 4; | |
| pub const ID_AA64AFR0_EL1_IMPDEF5_SHIFT: u32 = 20; | |
| pub const ID_AA64AFR0_EL1_IMPDEF5_WIDTH: u32 = 4; | |
| pub const ID_AA64AFR0_EL1_IMPDEF4_SHIFT: u32 = 16; | |
| pub const ID_AA64AFR0_EL1_IMPDEF4_WIDTH: u32 = 4; | |
| pub const ID_AA64AFR0_EL1_IMPDEF3_SHIFT: u32 = 12; | |
| pub const ID_AA64AFR0_EL1_IMPDEF3_WIDTH: u32 = 4; | |
| pub const ID_AA64AFR0_EL1_IMPDEF2_SHIFT: u32 = 8; | |
| pub const ID_AA64AFR0_EL1_IMPDEF2_WIDTH: u32 = 4; | |
| pub const ID_AA64AFR0_EL1_IMPDEF1_SHIFT: u32 = 4; | |
| pub const ID_AA64AFR0_EL1_IMPDEF1_WIDTH: u32 = 4; | |
| pub const ID_AA64AFR0_EL1_IMPDEF0_SHIFT: u32 = 0; | |
| pub const ID_AA64AFR0_EL1_IMPDEF0_WIDTH: u32 = 4; | |
| pub const SYS_ID_AA64AFR1_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64AFR1_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64AFR1_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64AFR1_EL1_CRm: u32 = 5; | |
| pub const SYS_ID_AA64AFR1_EL1_Op2: u32 = 5; | |
| pub const SYS_ID_AA64ISAR0_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64ISAR0_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64ISAR0_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64ISAR0_EL1_CRm: u32 = 6; | |
| pub const SYS_ID_AA64ISAR0_EL1_Op2: u32 = 0; | |
| pub const ID_AA64ISAR0_EL1_RNDR_SHIFT: u32 = 60; | |
| pub const ID_AA64ISAR0_EL1_RNDR_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_TLB_SHIFT: u32 = 56; | |
| pub const ID_AA64ISAR0_EL1_TLB_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_TS_SHIFT: u32 = 52; | |
| pub const ID_AA64ISAR0_EL1_TS_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_FHM_SHIFT: u32 = 48; | |
| pub const ID_AA64ISAR0_EL1_FHM_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_DP_SHIFT: u32 = 44; | |
| pub const ID_AA64ISAR0_EL1_DP_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_SM4_SHIFT: u32 = 40; | |
| pub const ID_AA64ISAR0_EL1_SM4_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_SM3_SHIFT: u32 = 36; | |
| pub const ID_AA64ISAR0_EL1_SM3_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_SHA3_SHIFT: u32 = 32; | |
| pub const ID_AA64ISAR0_EL1_SHA3_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_RDM_SHIFT: u32 = 28; | |
| pub const ID_AA64ISAR0_EL1_RDM_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_TME_SHIFT: u32 = 24; | |
| pub const ID_AA64ISAR0_EL1_TME_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_ATOMIC_SHIFT: u32 = 20; | |
| pub const ID_AA64ISAR0_EL1_ATOMIC_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_CRC32_SHIFT: u32 = 16; | |
| pub const ID_AA64ISAR0_EL1_CRC32_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_SHA2_SHIFT: u32 = 12; | |
| pub const ID_AA64ISAR0_EL1_SHA2_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_SHA1_SHIFT: u32 = 8; | |
| pub const ID_AA64ISAR0_EL1_SHA1_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_AES_SHIFT: u32 = 4; | |
| pub const ID_AA64ISAR0_EL1_AES_WIDTH: u32 = 4; | |
| pub const SYS_ID_AA64ISAR1_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64ISAR1_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64ISAR1_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64ISAR1_EL1_CRm: u32 = 6; | |
| pub const SYS_ID_AA64ISAR1_EL1_Op2: u32 = 1; | |
| pub const ID_AA64ISAR1_EL1_LS64_SHIFT: u32 = 60; | |
| pub const ID_AA64ISAR1_EL1_LS64_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_XS_SHIFT: u32 = 56; | |
| pub const ID_AA64ISAR1_EL1_XS_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_I8MM_SHIFT: u32 = 52; | |
| pub const ID_AA64ISAR1_EL1_I8MM_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_DGH_SHIFT: u32 = 48; | |
| pub const ID_AA64ISAR1_EL1_DGH_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_BF16_SHIFT: u32 = 44; | |
| pub const ID_AA64ISAR1_EL1_BF16_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_SPECRES_SHIFT: u32 = 40; | |
| pub const ID_AA64ISAR1_EL1_SPECRES_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_SB_SHIFT: u32 = 36; | |
| pub const ID_AA64ISAR1_EL1_SB_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_FRINTTS_SHIFT: u32 = 32; | |
| pub const ID_AA64ISAR1_EL1_FRINTTS_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_GPI_SHIFT: u32 = 28; | |
| pub const ID_AA64ISAR1_EL1_GPI_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_GPA_SHIFT: u32 = 24; | |
| pub const ID_AA64ISAR1_EL1_GPA_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_LRCPC_SHIFT: u32 = 20; | |
| pub const ID_AA64ISAR1_EL1_LRCPC_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_FCMA_SHIFT: u32 = 16; | |
| pub const ID_AA64ISAR1_EL1_FCMA_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_JSCVT_SHIFT: u32 = 12; | |
| pub const ID_AA64ISAR1_EL1_JSCVT_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_API_SHIFT: u32 = 8; | |
| pub const ID_AA64ISAR1_EL1_API_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_APA_SHIFT: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_APA_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR1_EL1_DPB_SHIFT: u32 = 0; | |
| pub const ID_AA64ISAR1_EL1_DPB_WIDTH: u32 = 4; | |
| pub const SYS_ID_AA64ISAR2_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64ISAR2_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64ISAR2_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64ISAR2_EL1_CRm: u32 = 6; | |
| pub const SYS_ID_AA64ISAR2_EL1_Op2: u32 = 2; | |
| pub const ID_AA64ISAR2_EL1_CSSC_SHIFT: u32 = 52; | |
| pub const ID_AA64ISAR2_EL1_CSSC_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR2_EL1_RPRFM_SHIFT: u32 = 48; | |
| pub const ID_AA64ISAR2_EL1_RPRFM_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR2_EL1_CLRBHB_SHIFT: u32 = 28; | |
| pub const ID_AA64ISAR2_EL1_CLRBHB_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR2_EL1_PAC_frac_SHIFT: u32 = 24; | |
| pub const ID_AA64ISAR2_EL1_PAC_frac_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR2_EL1_BC_SHIFT: u32 = 20; | |
| pub const ID_AA64ISAR2_EL1_BC_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR2_EL1_MOPS_SHIFT: u32 = 16; | |
| pub const ID_AA64ISAR2_EL1_MOPS_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR2_EL1_APA3_SHIFT: u32 = 12; | |
| pub const ID_AA64ISAR2_EL1_APA3_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR2_EL1_GPA3_SHIFT: u32 = 8; | |
| pub const ID_AA64ISAR2_EL1_GPA3_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR2_EL1_RPRES_SHIFT: u32 = 4; | |
| pub const ID_AA64ISAR2_EL1_RPRES_WIDTH: u32 = 4; | |
| pub const ID_AA64ISAR2_EL1_WFxT_SHIFT: u32 = 0; | |
| pub const ID_AA64ISAR2_EL1_WFxT_WIDTH: u32 = 4; | |
| pub const SYS_ID_AA64MMFR0_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64MMFR0_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64MMFR0_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64MMFR0_EL1_CRm: u32 = 7; | |
| pub const SYS_ID_AA64MMFR0_EL1_Op2: u32 = 0; | |
| pub const ID_AA64MMFR0_EL1_ECV_SHIFT: u32 = 60; | |
| pub const ID_AA64MMFR0_EL1_ECV_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_FGT_SHIFT: u32 = 56; | |
| pub const ID_AA64MMFR0_EL1_FGT_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_EXS_SHIFT: u32 = 44; | |
| pub const ID_AA64MMFR0_EL1_EXS_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_TGRAN4_2_SHIFT: u32 = 40; | |
| pub const ID_AA64MMFR0_EL1_TGRAN4_2_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_TGRAN64_2_SHIFT: u32 = 36; | |
| pub const ID_AA64MMFR0_EL1_TGRAN64_2_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_TGRAN16_2_SHIFT: u32 = 32; | |
| pub const ID_AA64MMFR0_EL1_TGRAN16_2_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_TGRAN4_SHIFT: u32 = 28; | |
| pub const ID_AA64MMFR0_EL1_TGRAN4_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_TGRAN64_SHIFT: u32 = 24; | |
| pub const ID_AA64MMFR0_EL1_TGRAN64_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_TGRAN16_SHIFT: u32 = 20; | |
| pub const ID_AA64MMFR0_EL1_TGRAN16_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_BIGENDEL0_SHIFT: u32 = 16; | |
| pub const ID_AA64MMFR0_EL1_BIGENDEL0_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_SNSMEM_SHIFT: u32 = 12; | |
| pub const ID_AA64MMFR0_EL1_SNSMEM_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_BIGEND_SHIFT: u32 = 8; | |
| pub const ID_AA64MMFR0_EL1_BIGEND_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_ASIDBITS_SHIFT: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_ASIDBITS_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR0_EL1_PARANGE_SHIFT: u32 = 0; | |
| pub const ID_AA64MMFR0_EL1_PARANGE_WIDTH: u32 = 4; | |
| pub const SYS_ID_AA64MMFR1_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64MMFR1_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64MMFR1_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64MMFR1_EL1_CRm: u32 = 7; | |
| pub const SYS_ID_AA64MMFR1_EL1_Op2: u32 = 1; | |
| pub const ID_AA64MMFR1_EL1_ECBHB_SHIFT: u32 = 60; | |
| pub const ID_AA64MMFR1_EL1_ECBHB_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_CMOW_SHIFT: u32 = 56; | |
| pub const ID_AA64MMFR1_EL1_CMOW_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_TIDCP1_SHIFT: u32 = 52; | |
| pub const ID_AA64MMFR1_EL1_TIDCP1_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_nTLBPA_SHIFT: u32 = 48; | |
| pub const ID_AA64MMFR1_EL1_nTLBPA_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_AFP_SHIFT: u32 = 44; | |
| pub const ID_AA64MMFR1_EL1_AFP_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_HCX_SHIFT: u32 = 40; | |
| pub const ID_AA64MMFR1_EL1_HCX_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_ETS_SHIFT: u32 = 36; | |
| pub const ID_AA64MMFR1_EL1_ETS_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_TWED_SHIFT: u32 = 32; | |
| pub const ID_AA64MMFR1_EL1_TWED_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_XNX_SHIFT: u32 = 28; | |
| pub const ID_AA64MMFR1_EL1_XNX_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_SpecSEI_SHIFT: u32 = 24; | |
| pub const ID_AA64MMFR1_EL1_SpecSEI_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_PAN_SHIFT: u32 = 20; | |
| pub const ID_AA64MMFR1_EL1_PAN_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_LO_SHIFT: u32 = 16; | |
| pub const ID_AA64MMFR1_EL1_LO_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_HPDS_SHIFT: u32 = 12; | |
| pub const ID_AA64MMFR1_EL1_HPDS_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_VH_SHIFT: u32 = 8; | |
| pub const ID_AA64MMFR1_EL1_VH_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_VMIDBits_SHIFT: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_VMIDBits_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR1_EL1_HAFDBS_SHIFT: u32 = 0; | |
| pub const ID_AA64MMFR1_EL1_HAFDBS_WIDTH: u32 = 4; | |
| pub const SYS_ID_AA64MMFR2_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64MMFR2_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64MMFR2_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64MMFR2_EL1_CRm: u32 = 7; | |
| pub const SYS_ID_AA64MMFR2_EL1_Op2: u32 = 2; | |
| pub const ID_AA64MMFR2_EL1_E0PD_SHIFT: u32 = 60; | |
| pub const ID_AA64MMFR2_EL1_E0PD_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_EVT_SHIFT: u32 = 56; | |
| pub const ID_AA64MMFR2_EL1_EVT_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_BBM_SHIFT: u32 = 52; | |
| pub const ID_AA64MMFR2_EL1_BBM_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_TTL_SHIFT: u32 = 48; | |
| pub const ID_AA64MMFR2_EL1_TTL_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_FWB_SHIFT: u32 = 40; | |
| pub const ID_AA64MMFR2_EL1_FWB_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_IDS_SHIFT: u32 = 36; | |
| pub const ID_AA64MMFR2_EL1_IDS_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_AT_SHIFT: u32 = 32; | |
| pub const ID_AA64MMFR2_EL1_AT_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_ST_SHIFT: u32 = 28; | |
| pub const ID_AA64MMFR2_EL1_ST_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_NV_SHIFT: u32 = 24; | |
| pub const ID_AA64MMFR2_EL1_NV_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_CCIDX_SHIFT: u32 = 20; | |
| pub const ID_AA64MMFR2_EL1_CCIDX_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_VARange_SHIFT: u32 = 16; | |
| pub const ID_AA64MMFR2_EL1_VARange_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_IESB_SHIFT: u32 = 12; | |
| pub const ID_AA64MMFR2_EL1_IESB_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_LSM_SHIFT: u32 = 8; | |
| pub const ID_AA64MMFR2_EL1_LSM_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_UAO_SHIFT: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_UAO_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR2_EL1_CnP_SHIFT: u32 = 0; | |
| pub const ID_AA64MMFR2_EL1_CnP_WIDTH: u32 = 4; | |
| pub const SYS_ID_AA64MMFR3_EL1_Op0: u32 = 3; | |
| pub const SYS_ID_AA64MMFR3_EL1_Op1: u32 = 0; | |
| pub const SYS_ID_AA64MMFR3_EL1_CRn: u32 = 0; | |
| pub const SYS_ID_AA64MMFR3_EL1_CRm: u32 = 7; | |
| pub const SYS_ID_AA64MMFR3_EL1_Op2: u32 = 3; | |
| pub const ID_AA64MMFR3_EL1_Spec_FPACC_SHIFT: u32 = 60; | |
| pub const ID_AA64MMFR3_EL1_Spec_FPACC_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_ADERR_SHIFT: u32 = 56; | |
| pub const ID_AA64MMFR3_EL1_ADERR_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_SDERR_SHIFT: u32 = 52; | |
| pub const ID_AA64MMFR3_EL1_SDERR_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_ANERR_SHIFT: u32 = 44; | |
| pub const ID_AA64MMFR3_EL1_ANERR_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_SNERR_SHIFT: u32 = 40; | |
| pub const ID_AA64MMFR3_EL1_SNERR_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_D128_2_SHIFT: u32 = 36; | |
| pub const ID_AA64MMFR3_EL1_D128_2_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_D128_SHIFT: u32 = 32; | |
| pub const ID_AA64MMFR3_EL1_D128_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_MEC_SHIFT: u32 = 28; | |
| pub const ID_AA64MMFR3_EL1_MEC_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_AIE_SHIFT: u32 = 24; | |
| pub const ID_AA64MMFR3_EL1_AIE_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_S2POE_SHIFT: u32 = 20; | |
| pub const ID_AA64MMFR3_EL1_S2POE_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_S1POE_SHIFT: u32 = 16; | |
| pub const ID_AA64MMFR3_EL1_S1POE_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_S2PIE_SHIFT: u32 = 12; | |
| pub const ID_AA64MMFR3_EL1_S2PIE_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_S1PIE_SHIFT: u32 = 8; | |
| pub const ID_AA64MMFR3_EL1_S1PIE_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_SCTLRX_SHIFT: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_SCTLRX_WIDTH: u32 = 4; | |
| pub const ID_AA64MMFR3_EL1_TCRX_SHIFT: u32 = 0; | |
| pub const ID_AA64MMFR3_EL1_TCRX_WIDTH: u32 = 4; | |
| pub const SYS_SCTLR_EL1_Op0: u32 = 3; | |
| pub const SYS_SCTLR_EL1_Op1: u32 = 0; | |
| pub const SYS_SCTLR_EL1_CRn: u32 = 1; | |
| pub const SYS_SCTLR_EL1_CRm: u32 = 0; | |
| pub const SYS_SCTLR_EL1_Op2: u32 = 0; | |
| pub const SCTLR_EL1_TIDCP_SHIFT: u32 = 63; | |
| pub const SCTLR_EL1_TIDCP_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_SPINTMASK_SHIFT: u32 = 62; | |
| pub const SCTLR_EL1_SPINTMASK_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_NMI_SHIFT: u32 = 61; | |
| pub const SCTLR_EL1_NMI_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_EnTP2_SHIFT: u32 = 60; | |
| pub const SCTLR_EL1_EnTP2_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_EPAN_SHIFT: u32 = 57; | |
| pub const SCTLR_EL1_EPAN_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_EnALS_SHIFT: u32 = 56; | |
| pub const SCTLR_EL1_EnALS_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_EnAS0_SHIFT: u32 = 55; | |
| pub const SCTLR_EL1_EnAS0_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_EnASR_SHIFT: u32 = 54; | |
| pub const SCTLR_EL1_EnASR_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_TME_SHIFT: u32 = 53; | |
| pub const SCTLR_EL1_TME_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_TME0_SHIFT: u32 = 52; | |
| pub const SCTLR_EL1_TME0_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_TMT_SHIFT: u32 = 51; | |
| pub const SCTLR_EL1_TMT_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_TMT0_SHIFT: u32 = 50; | |
| pub const SCTLR_EL1_TMT0_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_TWEDEL_SHIFT: u32 = 46; | |
| pub const SCTLR_EL1_TWEDEL_WIDTH: u32 = 4; | |
| pub const SCTLR_EL1_TWEDEn_SHIFT: u32 = 45; | |
| pub const SCTLR_EL1_TWEDEn_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_DSSBS_SHIFT: u32 = 44; | |
| pub const SCTLR_EL1_DSSBS_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_ATA_SHIFT: u32 = 43; | |
| pub const SCTLR_EL1_ATA_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_ATA0_SHIFT: u32 = 42; | |
| pub const SCTLR_EL1_ATA0_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_TCF_SHIFT: u32 = 40; | |
| pub const SCTLR_EL1_TCF_WIDTH: u32 = 2; | |
| pub const SCTLR_EL1_TCF0_SHIFT: u32 = 38; | |
| pub const SCTLR_EL1_TCF0_WIDTH: u32 = 2; | |
| pub const SCTLR_EL1_ITFSB_SHIFT: u32 = 37; | |
| pub const SCTLR_EL1_ITFSB_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_BT1_SHIFT: u32 = 36; | |
| pub const SCTLR_EL1_BT1_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_BT0_SHIFT: u32 = 35; | |
| pub const SCTLR_EL1_BT0_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_MSCEn_SHIFT: u32 = 33; | |
| pub const SCTLR_EL1_MSCEn_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_CMOW_SHIFT: u32 = 32; | |
| pub const SCTLR_EL1_CMOW_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_EnIA_SHIFT: u32 = 31; | |
| pub const SCTLR_EL1_EnIA_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_EnIB_SHIFT: u32 = 30; | |
| pub const SCTLR_EL1_EnIB_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_LSMAOE_SHIFT: u32 = 29; | |
| pub const SCTLR_EL1_LSMAOE_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_nTLSMD_SHIFT: u32 = 28; | |
| pub const SCTLR_EL1_nTLSMD_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_EnDA_SHIFT: u32 = 27; | |
| pub const SCTLR_EL1_EnDA_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_UCI_SHIFT: u32 = 26; | |
| pub const SCTLR_EL1_UCI_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_EE_SHIFT: u32 = 25; | |
| pub const SCTLR_EL1_EE_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_E0E_SHIFT: u32 = 24; | |
| pub const SCTLR_EL1_E0E_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_SPAN_SHIFT: u32 = 23; | |
| pub const SCTLR_EL1_SPAN_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_EIS_SHIFT: u32 = 22; | |
| pub const SCTLR_EL1_EIS_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_IESB_SHIFT: u32 = 21; | |
| pub const SCTLR_EL1_IESB_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_TSCXT_SHIFT: u32 = 20; | |
| pub const SCTLR_EL1_TSCXT_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_WXN_SHIFT: u32 = 19; | |
| pub const SCTLR_EL1_WXN_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_nTWE_SHIFT: u32 = 18; | |
| pub const SCTLR_EL1_nTWE_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_nTWI_SHIFT: u32 = 16; | |
| pub const SCTLR_EL1_nTWI_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_UCT_SHIFT: u32 = 15; | |
| pub const SCTLR_EL1_UCT_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_DZE_SHIFT: u32 = 14; | |
| pub const SCTLR_EL1_DZE_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_EnDB_SHIFT: u32 = 13; | |
| pub const SCTLR_EL1_EnDB_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_I_SHIFT: u32 = 12; | |
| pub const SCTLR_EL1_I_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_EOS_SHIFT: u32 = 11; | |
| pub const SCTLR_EL1_EOS_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_EnRCTX_SHIFT: u32 = 10; | |
| pub const SCTLR_EL1_EnRCTX_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_UMA_SHIFT: u32 = 9; | |
| pub const SCTLR_EL1_UMA_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_SED_SHIFT: u32 = 8; | |
| pub const SCTLR_EL1_SED_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_ITD_SHIFT: u32 = 7; | |
| pub const SCTLR_EL1_ITD_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_nAA_SHIFT: u32 = 6; | |
| pub const SCTLR_EL1_nAA_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_CP15BEN_SHIFT: u32 = 5; | |
| pub const SCTLR_EL1_CP15BEN_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_SA0_SHIFT: u32 = 4; | |
| pub const SCTLR_EL1_SA0_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_SA_SHIFT: u32 = 3; | |
| pub const SCTLR_EL1_SA_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_C_SHIFT: u32 = 2; | |
| pub const SCTLR_EL1_C_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_A_SHIFT: u32 = 1; | |
| pub const SCTLR_EL1_A_WIDTH: u32 = 1; | |
| pub const SCTLR_EL1_M_SHIFT: u32 = 0; | |
| pub const SCTLR_EL1_M_WIDTH: u32 = 1; | |
| pub const CPACR_ELx_TTA_SHIFT: u32 = 28; | |
| pub const CPACR_ELx_TTA_WIDTH: u32 = 1; | |
| pub const CPACR_ELx_SMEN_SHIFT: u32 = 24; | |
| pub const CPACR_ELx_SMEN_WIDTH: u32 = 2; | |
| pub const CPACR_ELx_FPEN_SHIFT: u32 = 20; | |
| pub const CPACR_ELx_FPEN_WIDTH: u32 = 2; | |
| pub const CPACR_ELx_ZEN_SHIFT: u32 = 16; | |
| pub const CPACR_ELx_ZEN_WIDTH: u32 = 2; | |
| pub const SYS_CPACR_EL1_Op0: u32 = 3; | |
| pub const SYS_CPACR_EL1_Op1: u32 = 0; | |
| pub const SYS_CPACR_EL1_CRn: u32 = 1; | |
| pub const SYS_CPACR_EL1_CRm: u32 = 0; | |
| pub const SYS_CPACR_EL1_Op2: u32 = 2; | |
| pub const SYS_SMPRI_EL1_Op0: u32 = 3; | |
| pub const SYS_SMPRI_EL1_Op1: u32 = 0; | |
| pub const SYS_SMPRI_EL1_CRn: u32 = 1; | |
| pub const SYS_SMPRI_EL1_CRm: u32 = 2; | |
| pub const SYS_SMPRI_EL1_Op2: u32 = 4; | |
| pub const SMPRI_EL1_PRIORITY_SHIFT: u32 = 0; | |
| pub const SMPRI_EL1_PRIORITY_WIDTH: u32 = 4; | |
| pub const ZCR_ELx_LEN_SHIFT: u32 = 0; | |
| pub const ZCR_ELx_LEN_WIDTH: u32 = 4; | |
| pub const SYS_ZCR_EL1_Op0: u32 = 3; | |
| pub const SYS_ZCR_EL1_Op1: u32 = 0; | |
| pub const SYS_ZCR_EL1_CRn: u32 = 1; | |
| pub const SYS_ZCR_EL1_CRm: u32 = 2; | |
| pub const SYS_ZCR_EL1_Op2: u32 = 0; | |
| pub const SMCR_ELx_FA64_SHIFT: u32 = 31; | |
| pub const SMCR_ELx_FA64_WIDTH: u32 = 1; | |
| pub const SMCR_ELx_EZT0_SHIFT: u32 = 30; | |
| pub const SMCR_ELx_EZT0_WIDTH: u32 = 1; | |
| pub const SMCR_ELx_LEN_SHIFT: u32 = 0; | |
| pub const SMCR_ELx_LEN_WIDTH: u32 = 4; | |
| pub const SYS_SMCR_EL1_Op0: u32 = 3; | |
| pub const SYS_SMCR_EL1_Op1: u32 = 0; | |
| pub const SYS_SMCR_EL1_CRn: u32 = 1; | |
| pub const SYS_SMCR_EL1_CRm: u32 = 2; | |
| pub const SYS_SMCR_EL1_Op2: u32 = 6; | |
| pub const SYS_ALLINT_Op0: u32 = 3; | |
| pub const SYS_ALLINT_Op1: u32 = 0; | |
| pub const SYS_ALLINT_CRn: u32 = 4; | |
| pub const SYS_ALLINT_CRm: u32 = 3; | |
| pub const SYS_ALLINT_Op2: u32 = 0; | |
| pub const ALLINT_ALLINT_SHIFT: u32 = 13; | |
| pub const ALLINT_ALLINT_WIDTH: u32 = 1; | |
| pub const SYS_FAR_EL1_Op0: u32 = 3; | |
| pub const SYS_FAR_EL1_Op1: u32 = 0; | |
| pub const SYS_FAR_EL1_CRn: u32 = 6; | |
| pub const SYS_FAR_EL1_CRm: u32 = 0; | |
| pub const SYS_FAR_EL1_Op2: u32 = 0; | |
| pub const FAR_EL1_ADDR_SHIFT: u32 = 0; | |
| pub const FAR_EL1_ADDR_WIDTH: u32 = 64; | |
| pub const SYS_PMSCR_EL1_Op0: u32 = 3; | |
| pub const SYS_PMSCR_EL1_Op1: u32 = 0; | |
| pub const SYS_PMSCR_EL1_CRn: u32 = 9; | |
| pub const SYS_PMSCR_EL1_CRm: u32 = 9; | |
| pub const SYS_PMSCR_EL1_Op2: u32 = 0; | |
| pub const PMSCR_EL1_PCT_SHIFT: u32 = 6; | |
| pub const PMSCR_EL1_PCT_WIDTH: u32 = 2; | |
| pub const PMSCR_EL1_TS_SHIFT: u32 = 5; | |
| pub const PMSCR_EL1_TS_WIDTH: u32 = 1; | |
| pub const PMSCR_EL1_PA_SHIFT: u32 = 4; | |
| pub const PMSCR_EL1_PA_WIDTH: u32 = 1; | |
| pub const PMSCR_EL1_CX_SHIFT: u32 = 3; | |
| pub const PMSCR_EL1_CX_WIDTH: u32 = 1; | |
| pub const PMSCR_EL1_E1SPE_SHIFT: u32 = 1; | |
| pub const PMSCR_EL1_E1SPE_WIDTH: u32 = 1; | |
| pub const PMSCR_EL1_E0SPE_SHIFT: u32 = 0; | |
| pub const PMSCR_EL1_E0SPE_WIDTH: u32 = 1; | |
| pub const SYS_PMSNEVFR_EL1_Op0: u32 = 3; | |
| pub const SYS_PMSNEVFR_EL1_Op1: u32 = 0; | |
| pub const SYS_PMSNEVFR_EL1_CRn: u32 = 9; | |
| pub const SYS_PMSNEVFR_EL1_CRm: u32 = 9; | |
| pub const SYS_PMSNEVFR_EL1_Op2: u32 = 1; | |
| pub const PMSNEVFR_EL1_E_SHIFT: u32 = 0; | |
| pub const PMSNEVFR_EL1_E_WIDTH: u32 = 64; | |
| pub const SYS_PMSICR_EL1_Op0: u32 = 3; | |
| pub const SYS_PMSICR_EL1_Op1: u32 = 0; | |
| pub const SYS_PMSICR_EL1_CRn: u32 = 9; | |
| pub const SYS_PMSICR_EL1_CRm: u32 = 9; | |
| pub const SYS_PMSICR_EL1_Op2: u32 = 2; | |
| pub const PMSICR_EL1_ECOUNT_SHIFT: u32 = 56; | |
| pub const PMSICR_EL1_ECOUNT_WIDTH: u32 = 8; | |
| pub const PMSICR_EL1_COUNT_SHIFT: u32 = 0; | |
| pub const PMSICR_EL1_COUNT_WIDTH: u32 = 32; | |
| pub const SYS_PMSIRR_EL1_Op0: u32 = 3; | |
| pub const SYS_PMSIRR_EL1_Op1: u32 = 0; | |
| pub const SYS_PMSIRR_EL1_CRn: u32 = 9; | |
| pub const SYS_PMSIRR_EL1_CRm: u32 = 9; | |
| pub const SYS_PMSIRR_EL1_Op2: u32 = 3; | |
| pub const PMSIRR_EL1_INTERVAL_SHIFT: u32 = 8; | |
| pub const PMSIRR_EL1_INTERVAL_WIDTH: u32 = 24; | |
| pub const PMSIRR_EL1_RND_SHIFT: u32 = 0; | |
| pub const PMSIRR_EL1_RND_WIDTH: u32 = 1; | |
| pub const SYS_PMSFCR_EL1_Op0: u32 = 3; | |
| pub const SYS_PMSFCR_EL1_Op1: u32 = 0; | |
| pub const SYS_PMSFCR_EL1_CRn: u32 = 9; | |
| pub const SYS_PMSFCR_EL1_CRm: u32 = 9; | |
| pub const SYS_PMSFCR_EL1_Op2: u32 = 4; | |
| pub const PMSFCR_EL1_ST_SHIFT: u32 = 18; | |
| pub const PMSFCR_EL1_ST_WIDTH: u32 = 1; | |
| pub const PMSFCR_EL1_LD_SHIFT: u32 = 17; | |
| pub const PMSFCR_EL1_LD_WIDTH: u32 = 1; | |
| pub const PMSFCR_EL1_B_SHIFT: u32 = 16; | |
| pub const PMSFCR_EL1_B_WIDTH: u32 = 1; | |
| pub const PMSFCR_EL1_FnE_SHIFT: u32 = 3; | |
| pub const PMSFCR_EL1_FnE_WIDTH: u32 = 1; | |
| pub const PMSFCR_EL1_FL_SHIFT: u32 = 2; | |
| pub const PMSFCR_EL1_FL_WIDTH: u32 = 1; | |
| pub const PMSFCR_EL1_FT_SHIFT: u32 = 1; | |
| pub const PMSFCR_EL1_FT_WIDTH: u32 = 1; | |
| pub const PMSFCR_EL1_FE_SHIFT: u32 = 0; | |
| pub const PMSFCR_EL1_FE_WIDTH: u32 = 1; | |
| pub const SYS_PMSEVFR_EL1_Op0: u32 = 3; | |
| pub const SYS_PMSEVFR_EL1_Op1: u32 = 0; | |
| pub const SYS_PMSEVFR_EL1_CRn: u32 = 9; | |
| pub const SYS_PMSEVFR_EL1_CRm: u32 = 9; | |
| pub const SYS_PMSEVFR_EL1_Op2: u32 = 5; | |
| pub const PMSEVFR_EL1_E_SHIFT: u32 = 0; | |
| pub const PMSEVFR_EL1_E_WIDTH: u32 = 64; | |
| pub const SYS_PMSLATFR_EL1_Op0: u32 = 3; | |
| pub const SYS_PMSLATFR_EL1_Op1: u32 = 0; | |
| pub const SYS_PMSLATFR_EL1_CRn: u32 = 9; | |
| pub const SYS_PMSLATFR_EL1_CRm: u32 = 9; | |
| pub const SYS_PMSLATFR_EL1_Op2: u32 = 6; | |
| pub const PMSLATFR_EL1_MINLAT_SHIFT: u32 = 0; | |
| pub const PMSLATFR_EL1_MINLAT_WIDTH: u32 = 16; | |
| pub const SYS_PMSIDR_EL1_Op0: u32 = 3; | |
| pub const SYS_PMSIDR_EL1_Op1: u32 = 0; | |
| pub const SYS_PMSIDR_EL1_CRn: u32 = 9; | |
| pub const SYS_PMSIDR_EL1_CRm: u32 = 9; | |
| pub const SYS_PMSIDR_EL1_Op2: u32 = 7; | |
| pub const PMSIDR_EL1_PBT_SHIFT: u32 = 24; | |
| pub const PMSIDR_EL1_PBT_WIDTH: u32 = 1; | |
| pub const PMSIDR_EL1_FORMAT_SHIFT: u32 = 20; | |
| pub const PMSIDR_EL1_FORMAT_WIDTH: u32 = 4; | |
| pub const PMSIDR_EL1_COUNTSIZE_SHIFT: u32 = 16; | |
| pub const PMSIDR_EL1_COUNTSIZE_WIDTH: u32 = 4; | |
| pub const PMSIDR_EL1_MAXSIZE_SHIFT: u32 = 12; | |
| pub const PMSIDR_EL1_MAXSIZE_WIDTH: u32 = 4; | |
| pub const PMSIDR_EL1_INTERVAL_SHIFT: u32 = 8; | |
| pub const PMSIDR_EL1_INTERVAL_WIDTH: u32 = 4; | |
| pub const PMSIDR_EL1_FnE_SHIFT: u32 = 6; | |
| pub const PMSIDR_EL1_FnE_WIDTH: u32 = 1; | |
| pub const PMSIDR_EL1_ERND_SHIFT: u32 = 5; | |
| pub const PMSIDR_EL1_ERND_WIDTH: u32 = 1; | |
| pub const PMSIDR_EL1_LDS_SHIFT: u32 = 4; | |
| pub const PMSIDR_EL1_LDS_WIDTH: u32 = 1; | |
| pub const PMSIDR_EL1_ARCHINST_SHIFT: u32 = 3; | |
| pub const PMSIDR_EL1_ARCHINST_WIDTH: u32 = 1; | |
| pub const PMSIDR_EL1_FL_SHIFT: u32 = 2; | |
| pub const PMSIDR_EL1_FL_WIDTH: u32 = 1; | |
| pub const PMSIDR_EL1_FT_SHIFT: u32 = 1; | |
| pub const PMSIDR_EL1_FT_WIDTH: u32 = 1; | |
| pub const PMSIDR_EL1_FE_SHIFT: u32 = 0; | |
| pub const PMSIDR_EL1_FE_WIDTH: u32 = 1; | |
| pub const SYS_PMBLIMITR_EL1_Op0: u32 = 3; | |
| pub const SYS_PMBLIMITR_EL1_Op1: u32 = 0; | |
| pub const SYS_PMBLIMITR_EL1_CRn: u32 = 9; | |
| pub const SYS_PMBLIMITR_EL1_CRm: u32 = 10; | |
| pub const SYS_PMBLIMITR_EL1_Op2: u32 = 0; | |
| pub const PMBLIMITR_EL1_LIMIT_SHIFT: u32 = 12; | |
| pub const PMBLIMITR_EL1_LIMIT_WIDTH: u32 = 52; | |
| pub const PMBLIMITR_EL1_PMFZ_SHIFT: u32 = 5; | |
| pub const PMBLIMITR_EL1_PMFZ_WIDTH: u32 = 1; | |
| pub const PMBLIMITR_EL1_FM_SHIFT: u32 = 1; | |
| pub const PMBLIMITR_EL1_FM_WIDTH: u32 = 2; | |
| pub const PMBLIMITR_EL1_E_SHIFT: u32 = 0; | |
| pub const PMBLIMITR_EL1_E_WIDTH: u32 = 1; | |
| pub const SYS_PMBPTR_EL1_Op0: u32 = 3; | |
| pub const SYS_PMBPTR_EL1_Op1: u32 = 0; | |
| pub const SYS_PMBPTR_EL1_CRn: u32 = 9; | |
| pub const SYS_PMBPTR_EL1_CRm: u32 = 10; | |
| pub const SYS_PMBPTR_EL1_Op2: u32 = 1; | |
| pub const PMBPTR_EL1_PTR_SHIFT: u32 = 0; | |
| pub const PMBPTR_EL1_PTR_WIDTH: u32 = 64; | |
| pub const SYS_PMBSR_EL1_Op0: u32 = 3; | |
| pub const SYS_PMBSR_EL1_Op1: u32 = 0; | |
| pub const SYS_PMBSR_EL1_CRn: u32 = 9; | |
| pub const SYS_PMBSR_EL1_CRm: u32 = 10; | |
| pub const SYS_PMBSR_EL1_Op2: u32 = 3; | |
| pub const PMBSR_EL1_EC_SHIFT: u32 = 26; | |
| pub const PMBSR_EL1_EC_WIDTH: u32 = 6; | |
| pub const PMBSR_EL1_DL_SHIFT: u32 = 19; | |
| pub const PMBSR_EL1_DL_WIDTH: u32 = 1; | |
| pub const PMBSR_EL1_EA_SHIFT: u32 = 18; | |
| pub const PMBSR_EL1_EA_WIDTH: u32 = 1; | |
| pub const PMBSR_EL1_S_SHIFT: u32 = 17; | |
| pub const PMBSR_EL1_S_WIDTH: u32 = 1; | |
| pub const PMBSR_EL1_COLL_SHIFT: u32 = 16; | |
| pub const PMBSR_EL1_COLL_WIDTH: u32 = 1; | |
| pub const PMBSR_EL1_MSS_SHIFT: u32 = 0; | |
| pub const PMBSR_EL1_MSS_WIDTH: u32 = 16; | |
| pub const SYS_PMBIDR_EL1_Op0: u32 = 3; | |
| pub const SYS_PMBIDR_EL1_Op1: u32 = 0; | |
| pub const SYS_PMBIDR_EL1_CRn: u32 = 9; | |
| pub const SYS_PMBIDR_EL1_CRm: u32 = 10; | |
| pub const SYS_PMBIDR_EL1_Op2: u32 = 7; | |
| pub const PMBIDR_EL1_EA_SHIFT: u32 = 8; | |
| pub const PMBIDR_EL1_EA_WIDTH: u32 = 4; | |
| pub const PMBIDR_EL1_F_SHIFT: u32 = 5; | |
| pub const PMBIDR_EL1_F_WIDTH: u32 = 1; | |
| pub const PMBIDR_EL1_P_SHIFT: u32 = 4; | |
| pub const PMBIDR_EL1_P_WIDTH: u32 = 1; | |
| pub const PMBIDR_EL1_ALIGN_SHIFT: u32 = 0; | |
| pub const PMBIDR_EL1_ALIGN_WIDTH: u32 = 4; | |
| pub const CONTEXTIDR_ELx_PROCID_SHIFT: u32 = 0; | |
| pub const CONTEXTIDR_ELx_PROCID_WIDTH: u32 = 32; | |
| pub const SYS_CONTEXTIDR_EL1_Op0: u32 = 3; | |
| pub const SYS_CONTEXTIDR_EL1_Op1: u32 = 0; | |
| pub const SYS_CONTEXTIDR_EL1_CRn: u32 = 13; | |
| pub const SYS_CONTEXTIDR_EL1_CRm: u32 = 0; | |
| pub const SYS_CONTEXTIDR_EL1_Op2: u32 = 1; | |
| pub const SYS_TPIDR_EL1_Op0: u32 = 3; | |
| pub const SYS_TPIDR_EL1_Op1: u32 = 0; | |
| pub const SYS_TPIDR_EL1_CRn: u32 = 13; | |
| pub const SYS_TPIDR_EL1_CRm: u32 = 0; | |
| pub const SYS_TPIDR_EL1_Op2: u32 = 4; | |
| pub const TPIDR_EL1_ThreadID_SHIFT: u32 = 0; | |
| pub const TPIDR_EL1_ThreadID_WIDTH: u32 = 64; | |
| pub const SYS_SCXTNUM_EL1_Op0: u32 = 3; | |
| pub const SYS_SCXTNUM_EL1_Op1: u32 = 0; | |
| pub const SYS_SCXTNUM_EL1_CRn: u32 = 13; | |
| pub const SYS_SCXTNUM_EL1_CRm: u32 = 0; | |
| pub const SYS_SCXTNUM_EL1_Op2: u32 = 7; | |
| pub const SCXTNUM_EL1_SoftwareContextNumber_SHIFT: u32 = 0; | |
| pub const SCXTNUM_EL1_SoftwareContextNumber_WIDTH: u32 = 64; | |
| pub const SYS_CCSIDR_EL1_Op0: u32 = 3; | |
| pub const SYS_CCSIDR_EL1_Op1: u32 = 1; | |
| pub const SYS_CCSIDR_EL1_CRn: u32 = 0; | |
| pub const SYS_CCSIDR_EL1_CRm: u32 = 0; | |
| pub const SYS_CCSIDR_EL1_Op2: u32 = 0; | |
| pub const CCSIDR_EL1_NumSets_SHIFT: u32 = 13; | |
| pub const CCSIDR_EL1_NumSets_WIDTH: u32 = 15; | |
| pub const CCSIDR_EL1_Associativity_SHIFT: u32 = 3; | |
| pub const CCSIDR_EL1_Associativity_WIDTH: u32 = 10; | |
| pub const CCSIDR_EL1_LineSize_SHIFT: u32 = 0; | |
| pub const CCSIDR_EL1_LineSize_WIDTH: u32 = 3; | |
| pub const SYS_CLIDR_EL1_Op0: u32 = 3; | |
| pub const SYS_CLIDR_EL1_Op1: u32 = 1; | |
| pub const SYS_CLIDR_EL1_CRn: u32 = 0; | |
| pub const SYS_CLIDR_EL1_CRm: u32 = 0; | |
| pub const SYS_CLIDR_EL1_Op2: u32 = 1; | |
| pub const CLIDR_EL1_Ttypen_SHIFT: u32 = 33; | |
| pub const CLIDR_EL1_Ttypen_WIDTH: u32 = 14; | |
| pub const CLIDR_EL1_ICB_SHIFT: u32 = 30; | |
| pub const CLIDR_EL1_ICB_WIDTH: u32 = 3; | |
| pub const CLIDR_EL1_LoUU_SHIFT: u32 = 27; | |
| pub const CLIDR_EL1_LoUU_WIDTH: u32 = 3; | |
| pub const CLIDR_EL1_LoC_SHIFT: u32 = 24; | |
| pub const CLIDR_EL1_LoC_WIDTH: u32 = 3; | |
| pub const CLIDR_EL1_LoUIS_SHIFT: u32 = 21; | |
| pub const CLIDR_EL1_LoUIS_WIDTH: u32 = 3; | |
| pub const CLIDR_EL1_Ctype7_SHIFT: u32 = 18; | |
| pub const CLIDR_EL1_Ctype7_WIDTH: u32 = 3; | |
| pub const CLIDR_EL1_Ctype6_SHIFT: u32 = 15; | |
| pub const CLIDR_EL1_Ctype6_WIDTH: u32 = 3; | |
| pub const CLIDR_EL1_Ctype5_SHIFT: u32 = 12; | |
| pub const CLIDR_EL1_Ctype5_WIDTH: u32 = 3; | |
| pub const CLIDR_EL1_Ctype4_SHIFT: u32 = 9; | |
| pub const CLIDR_EL1_Ctype4_WIDTH: u32 = 3; | |
| pub const CLIDR_EL1_Ctype3_SHIFT: u32 = 6; | |
| pub const CLIDR_EL1_Ctype3_WIDTH: u32 = 3; | |
| pub const CLIDR_EL1_Ctype2_SHIFT: u32 = 3; | |
| pub const CLIDR_EL1_Ctype2_WIDTH: u32 = 3; | |
| pub const CLIDR_EL1_Ctype1_SHIFT: u32 = 0; | |
| pub const CLIDR_EL1_Ctype1_WIDTH: u32 = 3; | |
| pub const SYS_CCSIDR2_EL1_Op0: u32 = 3; | |
| pub const SYS_CCSIDR2_EL1_Op1: u32 = 1; | |
| pub const SYS_CCSIDR2_EL1_CRn: u32 = 0; | |
| pub const SYS_CCSIDR2_EL1_CRm: u32 = 0; | |
| pub const SYS_CCSIDR2_EL1_Op2: u32 = 2; | |
| pub const CCSIDR2_EL1_NumSets_SHIFT: u32 = 0; | |
| pub const CCSIDR2_EL1_NumSets_WIDTH: u32 = 24; | |
| pub const SYS_GMID_EL1_Op0: u32 = 3; | |
| pub const SYS_GMID_EL1_Op1: u32 = 1; | |
| pub const SYS_GMID_EL1_CRn: u32 = 0; | |
| pub const SYS_GMID_EL1_CRm: u32 = 0; | |
| pub const SYS_GMID_EL1_Op2: u32 = 4; | |
| pub const GMID_EL1_BS_SHIFT: u32 = 0; | |
| pub const GMID_EL1_BS_WIDTH: u32 = 4; | |
| pub const SYS_SMIDR_EL1_Op0: u32 = 3; | |
| pub const SYS_SMIDR_EL1_Op1: u32 = 1; | |
| pub const SYS_SMIDR_EL1_CRn: u32 = 0; | |
| pub const SYS_SMIDR_EL1_CRm: u32 = 0; | |
| pub const SYS_SMIDR_EL1_Op2: u32 = 6; | |
| pub const SMIDR_EL1_IMPLEMENTER_SHIFT: u32 = 24; | |
| pub const SMIDR_EL1_IMPLEMENTER_WIDTH: u32 = 8; | |
| pub const SMIDR_EL1_REVISION_SHIFT: u32 = 16; | |
| pub const SMIDR_EL1_REVISION_WIDTH: u32 = 8; | |
| pub const SMIDR_EL1_SMPS_SHIFT: u32 = 15; | |
| pub const SMIDR_EL1_SMPS_WIDTH: u32 = 1; | |
| pub const SMIDR_EL1_AFFINITY_SHIFT: u32 = 0; | |
| pub const SMIDR_EL1_AFFINITY_WIDTH: u32 = 12; | |
| pub const SYS_CSSELR_EL1_Op0: u32 = 3; | |
| pub const SYS_CSSELR_EL1_Op1: u32 = 2; | |
| pub const SYS_CSSELR_EL1_CRn: u32 = 0; | |
| pub const SYS_CSSELR_EL1_CRm: u32 = 0; | |
| pub const SYS_CSSELR_EL1_Op2: u32 = 0; | |
| pub const CSSELR_EL1_TnD_SHIFT: u32 = 4; | |
| pub const CSSELR_EL1_TnD_WIDTH: u32 = 1; | |
| pub const CSSELR_EL1_Level_SHIFT: u32 = 1; | |
| pub const CSSELR_EL1_Level_WIDTH: u32 = 3; | |
| pub const CSSELR_EL1_InD_SHIFT: u32 = 0; | |
| pub const CSSELR_EL1_InD_WIDTH: u32 = 1; | |
| pub const SYS_CTR_EL0_Op0: u32 = 3; | |
| pub const SYS_CTR_EL0_Op1: u32 = 3; | |
| pub const SYS_CTR_EL0_CRn: u32 = 0; | |
| pub const SYS_CTR_EL0_CRm: u32 = 0; | |
| pub const SYS_CTR_EL0_Op2: u32 = 1; | |
| pub const CTR_EL0_TminLine_SHIFT: u32 = 32; | |
| pub const CTR_EL0_TminLine_WIDTH: u32 = 6; | |
| pub const CTR_EL0_DIC_SHIFT: u32 = 29; | |
| pub const CTR_EL0_DIC_WIDTH: u32 = 1; | |
| pub const CTR_EL0_IDC_SHIFT: u32 = 28; | |
| pub const CTR_EL0_IDC_WIDTH: u32 = 1; | |
| pub const CTR_EL0_CWG_SHIFT: u32 = 24; | |
| pub const CTR_EL0_CWG_WIDTH: u32 = 4; | |
| pub const CTR_EL0_ERG_SHIFT: u32 = 20; | |
| pub const CTR_EL0_ERG_WIDTH: u32 = 4; | |
| pub const CTR_EL0_DminLine_SHIFT: u32 = 16; | |
| pub const CTR_EL0_DminLine_WIDTH: u32 = 4; | |
| pub const CTR_EL0_L1Ip_SHIFT: u32 = 14; | |
| pub const CTR_EL0_L1Ip_WIDTH: u32 = 2; | |
| pub const CTR_EL0_IminLine_SHIFT: u32 = 0; | |
| pub const CTR_EL0_IminLine_WIDTH: u32 = 4; | |
| pub const SYS_DCZID_EL0_Op0: u32 = 3; | |
| pub const SYS_DCZID_EL0_Op1: u32 = 3; | |
| pub const SYS_DCZID_EL0_CRn: u32 = 0; | |
| pub const SYS_DCZID_EL0_CRm: u32 = 0; | |
| pub const SYS_DCZID_EL0_Op2: u32 = 7; | |
| pub const DCZID_EL0_DZP_SHIFT: u32 = 4; | |
| pub const DCZID_EL0_DZP_WIDTH: u32 = 1; | |
| pub const DCZID_EL0_BS_SHIFT: u32 = 0; | |
| pub const DCZID_EL0_BS_WIDTH: u32 = 4; | |
| pub const SYS_SVCR_Op0: u32 = 3; | |
| pub const SYS_SVCR_Op1: u32 = 3; | |
| pub const SYS_SVCR_CRn: u32 = 4; | |
| pub const SYS_SVCR_CRm: u32 = 2; | |
| pub const SYS_SVCR_Op2: u32 = 2; | |
| pub const SVCR_ZA_SHIFT: u32 = 1; | |
| pub const SVCR_ZA_WIDTH: u32 = 1; | |
| pub const SVCR_SM_SHIFT: u32 = 0; | |
| pub const SVCR_SM_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_nAMAIR2_EL1_SHIFT: u32 = 63; | |
| pub const HFGxTR_EL2_nAMAIR2_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_nMAIR2_EL1_SHIFT: u32 = 62; | |
| pub const HFGxTR_EL2_nMAIR2_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_nS2POR_EL1_SHIFT: u32 = 61; | |
| pub const HFGxTR_EL2_nS2POR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_nPOR_EL1_SHIFT: u32 = 60; | |
| pub const HFGxTR_EL2_nPOR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_nPOR_EL0_SHIFT: u32 = 59; | |
| pub const HFGxTR_EL2_nPOR_EL0_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_nPIR_EL1_SHIFT: u32 = 58; | |
| pub const HFGxTR_EL2_nPIR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_nPIRE0_EL1_SHIFT: u32 = 57; | |
| pub const HFGxTR_EL2_nPIRE0_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_nRCWMASK_EL1_SHIFT: u32 = 56; | |
| pub const HFGxTR_EL2_nRCWMASK_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_nTPIDR2_EL0_SHIFT: u32 = 55; | |
| pub const HFGxTR_EL2_nTPIDR2_EL0_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_nSMPRI_EL1_SHIFT: u32 = 54; | |
| pub const HFGxTR_EL2_nSMPRI_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_nGCS_EL1_SHIFT: u32 = 53; | |
| pub const HFGxTR_EL2_nGCS_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_nGCS_EL0_SHIFT: u32 = 52; | |
| pub const HFGxTR_EL2_nGCS_EL0_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_nACCDATA_EL1_SHIFT: u32 = 50; | |
| pub const HFGxTR_EL2_nACCDATA_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_ERXADDR_EL1_SHIFT: u32 = 49; | |
| pub const HFGxTR_EL2_ERXADDR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_ERXPFGCDN_EL1_SHIFT: u32 = 48; | |
| pub const HFGxTR_EL2_ERXPFGCDN_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_ERXPFGCTL_EL1_SHIFT: u32 = 47; | |
| pub const HFGxTR_EL2_ERXPFGCTL_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_ERXPFGF_EL1_SHIFT: u32 = 46; | |
| pub const HFGxTR_EL2_ERXPFGF_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_ERXMISCn_EL1_SHIFT: u32 = 45; | |
| pub const HFGxTR_EL2_ERXMISCn_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_ERXSTATUS_EL1_SHIFT: u32 = 44; | |
| pub const HFGxTR_EL2_ERXSTATUS_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_ERXCTLR_EL1_SHIFT: u32 = 43; | |
| pub const HFGxTR_EL2_ERXCTLR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_ERXFR_EL1_SHIFT: u32 = 42; | |
| pub const HFGxTR_EL2_ERXFR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_ERRSELR_EL1_SHIFT: u32 = 41; | |
| pub const HFGxTR_EL2_ERRSELR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_ERRIDR_EL1_SHIFT: u32 = 40; | |
| pub const HFGxTR_EL2_ERRIDR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_ICC_IGRPENn_EL1_SHIFT: u32 = 39; | |
| pub const HFGxTR_EL2_ICC_IGRPENn_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_VBAR_EL1_SHIFT: u32 = 38; | |
| pub const HFGxTR_EL2_VBAR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_TTBR1_EL1_SHIFT: u32 = 37; | |
| pub const HFGxTR_EL2_TTBR1_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_TTBR0_EL1_SHIFT: u32 = 36; | |
| pub const HFGxTR_EL2_TTBR0_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_TPIDR_EL0_SHIFT: u32 = 35; | |
| pub const HFGxTR_EL2_TPIDR_EL0_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_TPIDRRO_EL0_SHIFT: u32 = 34; | |
| pub const HFGxTR_EL2_TPIDRRO_EL0_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_TPIDR_EL1_SHIFT: u32 = 33; | |
| pub const HFGxTR_EL2_TPIDR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_TCR_EL1_SHIFT: u32 = 32; | |
| pub const HFGxTR_EL2_TCR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_SCXTNUM_EL0_SHIFT: u32 = 31; | |
| pub const HFGxTR_EL2_SCXTNUM_EL0_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_SCXTNUM_EL1_SHIFT: u32 = 30; | |
| pub const HFGxTR_EL2_SCXTNUM_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_SCTLR_EL1_SHIFT: u32 = 29; | |
| pub const HFGxTR_EL2_SCTLR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_REVIDR_EL1_SHIFT: u32 = 28; | |
| pub const HFGxTR_EL2_REVIDR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_PAR_EL1_SHIFT: u32 = 27; | |
| pub const HFGxTR_EL2_PAR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_MPIDR_EL1_SHIFT: u32 = 26; | |
| pub const HFGxTR_EL2_MPIDR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_MIDR_EL1_SHIFT: u32 = 25; | |
| pub const HFGxTR_EL2_MIDR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_MAIR_EL1_SHIFT: u32 = 24; | |
| pub const HFGxTR_EL2_MAIR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_LORSA_EL1_SHIFT: u32 = 23; | |
| pub const HFGxTR_EL2_LORSA_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_LORN_EL1_SHIFT: u32 = 22; | |
| pub const HFGxTR_EL2_LORN_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_LORID_EL1_SHIFT: u32 = 21; | |
| pub const HFGxTR_EL2_LORID_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_LOREA_EL1_SHIFT: u32 = 20; | |
| pub const HFGxTR_EL2_LOREA_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_LORC_EL1_SHIFT: u32 = 19; | |
| pub const HFGxTR_EL2_LORC_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_ISR_EL1_SHIFT: u32 = 18; | |
| pub const HFGxTR_EL2_ISR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_FAR_EL1_SHIFT: u32 = 17; | |
| pub const HFGxTR_EL2_FAR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_ESR_EL1_SHIFT: u32 = 16; | |
| pub const HFGxTR_EL2_ESR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_DCZID_EL0_SHIFT: u32 = 15; | |
| pub const HFGxTR_EL2_DCZID_EL0_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_CTR_EL0_SHIFT: u32 = 14; | |
| pub const HFGxTR_EL2_CTR_EL0_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_CSSELR_EL1_SHIFT: u32 = 13; | |
| pub const HFGxTR_EL2_CSSELR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_CPACR_EL1_SHIFT: u32 = 12; | |
| pub const HFGxTR_EL2_CPACR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_CONTEXTIDR_EL1_SHIFT: u32 = 11; | |
| pub const HFGxTR_EL2_CONTEXTIDR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_CLIDR_EL1_SHIFT: u32 = 10; | |
| pub const HFGxTR_EL2_CLIDR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_CCSIDR_EL1_SHIFT: u32 = 9; | |
| pub const HFGxTR_EL2_CCSIDR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_APIBKey_SHIFT: u32 = 8; | |
| pub const HFGxTR_EL2_APIBKey_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_APIAKey_SHIFT: u32 = 7; | |
| pub const HFGxTR_EL2_APIAKey_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_APGAKey_SHIFT: u32 = 6; | |
| pub const HFGxTR_EL2_APGAKey_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_APDBKey_SHIFT: u32 = 5; | |
| pub const HFGxTR_EL2_APDBKey_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_APDAKey_SHIFT: u32 = 4; | |
| pub const HFGxTR_EL2_APDAKey_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_AMAIR_EL1_SHIFT: u32 = 3; | |
| pub const HFGxTR_EL2_AMAIR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_AIDR_EL1_SHIFT: u32 = 2; | |
| pub const HFGxTR_EL2_AIDR_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_AFSR1_EL1_SHIFT: u32 = 1; | |
| pub const HFGxTR_EL2_AFSR1_EL1_WIDTH: u32 = 1; | |
| pub const HFGxTR_EL2_AFSR0_EL1_SHIFT: u32 = 0; | |
| pub const HFGxTR_EL2_AFSR0_EL1_WIDTH: u32 = 1; | |
| pub const SYS_HFGRTR_EL2_Op0: u32 = 3; | |
| pub const SYS_HFGRTR_EL2_Op1: u32 = 4; | |
| pub const SYS_HFGRTR_EL2_CRn: u32 = 1; | |
| pub const SYS_HFGRTR_EL2_CRm: u32 = 1; | |
| pub const SYS_HFGRTR_EL2_Op2: u32 = 4; | |
| pub const SYS_HFGWTR_EL2_Op0: u32 = 3; | |
| pub const SYS_HFGWTR_EL2_Op1: u32 = 4; | |
| pub const SYS_HFGWTR_EL2_CRn: u32 = 1; | |
| pub const SYS_HFGWTR_EL2_CRm: u32 = 1; | |
| pub const SYS_HFGWTR_EL2_Op2: u32 = 5; | |
| pub const SYS_HFGITR_EL2_Op0: u32 = 3; | |
| pub const SYS_HFGITR_EL2_Op1: u32 = 4; | |
| pub const SYS_HFGITR_EL2_CRn: u32 = 1; | |
| pub const SYS_HFGITR_EL2_CRm: u32 = 1; | |
| pub const SYS_HFGITR_EL2_Op2: u32 = 6; | |
| pub const HFGITR_EL2_COSPRCTX_SHIFT: u32 = 60; | |
| pub const HFGITR_EL2_COSPRCTX_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_nGCSEPP_SHIFT: u32 = 59; | |
| pub const HFGITR_EL2_nGCSEPP_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_nGCSSTR_EL1_SHIFT: u32 = 58; | |
| pub const HFGITR_EL2_nGCSSTR_EL1_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_nGCSPUSHM_EL1_SHIFT: u32 = 57; | |
| pub const HFGITR_EL2_nGCSPUSHM_EL1_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_nBRBIALL_SHIFT: u32 = 56; | |
| pub const HFGITR_EL2_nBRBIALL_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_nBRBINJ_SHIFT: u32 = 55; | |
| pub const HFGITR_EL2_nBRBINJ_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_DCCVAC_SHIFT: u32 = 54; | |
| pub const HFGITR_EL2_DCCVAC_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_SVC_EL1_SHIFT: u32 = 53; | |
| pub const HFGITR_EL2_SVC_EL1_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_SVC_EL0_SHIFT: u32 = 52; | |
| pub const HFGITR_EL2_SVC_EL0_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_ERET_SHIFT: u32 = 51; | |
| pub const HFGITR_EL2_ERET_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_CPPRCTX_SHIFT: u32 = 50; | |
| pub const HFGITR_EL2_CPPRCTX_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_DVPRCTX_SHIFT: u32 = 49; | |
| pub const HFGITR_EL2_DVPRCTX_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_CFPRCTX_SHIFT: u32 = 48; | |
| pub const HFGITR_EL2_CFPRCTX_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVAALE1_SHIFT: u32 = 47; | |
| pub const HFGITR_EL2_TLBIVAALE1_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVALE1_SHIFT: u32 = 46; | |
| pub const HFGITR_EL2_TLBIVALE1_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVAAE1_SHIFT: u32 = 45; | |
| pub const HFGITR_EL2_TLBIVAAE1_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIASIDE1_SHIFT: u32 = 44; | |
| pub const HFGITR_EL2_TLBIASIDE1_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVAE1_SHIFT: u32 = 43; | |
| pub const HFGITR_EL2_TLBIVAE1_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVMALLE1_SHIFT: u32 = 42; | |
| pub const HFGITR_EL2_TLBIVMALLE1_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIRVAALE1_SHIFT: u32 = 41; | |
| pub const HFGITR_EL2_TLBIRVAALE1_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIRVALE1_SHIFT: u32 = 40; | |
| pub const HFGITR_EL2_TLBIRVALE1_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIRVAAE1_SHIFT: u32 = 39; | |
| pub const HFGITR_EL2_TLBIRVAAE1_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIRVAE1_SHIFT: u32 = 38; | |
| pub const HFGITR_EL2_TLBIRVAE1_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIRVAALE1IS_SHIFT: u32 = 37; | |
| pub const HFGITR_EL2_TLBIRVAALE1IS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIRVALE1IS_SHIFT: u32 = 36; | |
| pub const HFGITR_EL2_TLBIRVALE1IS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIRVAAE1IS_SHIFT: u32 = 35; | |
| pub const HFGITR_EL2_TLBIRVAAE1IS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIRVAE1IS_SHIFT: u32 = 34; | |
| pub const HFGITR_EL2_TLBIRVAE1IS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVAALE1IS_SHIFT: u32 = 33; | |
| pub const HFGITR_EL2_TLBIVAALE1IS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVALE1IS_SHIFT: u32 = 32; | |
| pub const HFGITR_EL2_TLBIVALE1IS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVAAE1IS_SHIFT: u32 = 31; | |
| pub const HFGITR_EL2_TLBIVAAE1IS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIASIDE1IS_SHIFT: u32 = 30; | |
| pub const HFGITR_EL2_TLBIASIDE1IS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVAE1IS_SHIFT: u32 = 29; | |
| pub const HFGITR_EL2_TLBIVAE1IS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVMALLE1IS_SHIFT: u32 = 28; | |
| pub const HFGITR_EL2_TLBIVMALLE1IS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIRVAALE1OS_SHIFT: u32 = 27; | |
| pub const HFGITR_EL2_TLBIRVAALE1OS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIRVALE1OS_SHIFT: u32 = 26; | |
| pub const HFGITR_EL2_TLBIRVALE1OS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIRVAAE1OS_SHIFT: u32 = 25; | |
| pub const HFGITR_EL2_TLBIRVAAE1OS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIRVAE1OS_SHIFT: u32 = 24; | |
| pub const HFGITR_EL2_TLBIRVAE1OS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVAALE1OS_SHIFT: u32 = 23; | |
| pub const HFGITR_EL2_TLBIVAALE1OS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVALE1OS_SHIFT: u32 = 22; | |
| pub const HFGITR_EL2_TLBIVALE1OS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVAAE1OS_SHIFT: u32 = 21; | |
| pub const HFGITR_EL2_TLBIVAAE1OS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIASIDE1OS_SHIFT: u32 = 20; | |
| pub const HFGITR_EL2_TLBIASIDE1OS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVAE1OS_SHIFT: u32 = 19; | |
| pub const HFGITR_EL2_TLBIVAE1OS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_TLBIVMALLE1OS_SHIFT: u32 = 18; | |
| pub const HFGITR_EL2_TLBIVMALLE1OS_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_ATS1E1WP_SHIFT: u32 = 17; | |
| pub const HFGITR_EL2_ATS1E1WP_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_ATS1E1RP_SHIFT: u32 = 16; | |
| pub const HFGITR_EL2_ATS1E1RP_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_ATS1E0W_SHIFT: u32 = 15; | |
| pub const HFGITR_EL2_ATS1E0W_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_ATS1E0R_SHIFT: u32 = 14; | |
| pub const HFGITR_EL2_ATS1E0R_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_ATS1E1W_SHIFT: u32 = 13; | |
| pub const HFGITR_EL2_ATS1E1W_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_ATS1E1R_SHIFT: u32 = 12; | |
| pub const HFGITR_EL2_ATS1E1R_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_DCZVA_SHIFT: u32 = 11; | |
| pub const HFGITR_EL2_DCZVA_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_DCCIVAC_SHIFT: u32 = 10; | |
| pub const HFGITR_EL2_DCCIVAC_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_DCCVADP_SHIFT: u32 = 9; | |
| pub const HFGITR_EL2_DCCVADP_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_DCCVAP_SHIFT: u32 = 8; | |
| pub const HFGITR_EL2_DCCVAP_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_DCCVAU_SHIFT: u32 = 7; | |
| pub const HFGITR_EL2_DCCVAU_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_DCCISW_SHIFT: u32 = 6; | |
| pub const HFGITR_EL2_DCCISW_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_DCCSW_SHIFT: u32 = 5; | |
| pub const HFGITR_EL2_DCCSW_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_DCISW_SHIFT: u32 = 4; | |
| pub const HFGITR_EL2_DCISW_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_DCIVAC_SHIFT: u32 = 3; | |
| pub const HFGITR_EL2_DCIVAC_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_ICIVAU_SHIFT: u32 = 2; | |
| pub const HFGITR_EL2_ICIVAU_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_ICIALLU_SHIFT: u32 = 1; | |
| pub const HFGITR_EL2_ICIALLU_WIDTH: u32 = 1; | |
| pub const HFGITR_EL2_ICIALLUIS_SHIFT: u32 = 0; | |
| pub const HFGITR_EL2_ICIALLUIS_WIDTH: u32 = 1; | |
| pub const SYS_HDFGRTR_EL2_Op0: u32 = 3; | |
| pub const SYS_HDFGRTR_EL2_Op1: u32 = 4; | |
| pub const SYS_HDFGRTR_EL2_CRn: u32 = 3; | |
| pub const SYS_HDFGRTR_EL2_CRm: u32 = 1; | |
| pub const SYS_HDFGRTR_EL2_Op2: u32 = 4; | |
| pub const HDFGRTR_EL2_PMBIDR_EL1_SHIFT: u32 = 63; | |
| pub const HDFGRTR_EL2_PMBIDR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_nPMSNEVFR_EL1_SHIFT: u32 = 62; | |
| pub const HDFGRTR_EL2_nPMSNEVFR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_nBRBDATA_SHIFT: u32 = 61; | |
| pub const HDFGRTR_EL2_nBRBDATA_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_nBRBCTL_SHIFT: u32 = 60; | |
| pub const HDFGRTR_EL2_nBRBCTL_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_nBRBIDR_SHIFT: u32 = 59; | |
| pub const HDFGRTR_EL2_nBRBIDR_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMCEIDn_EL0_SHIFT: u32 = 58; | |
| pub const HDFGRTR_EL2_PMCEIDn_EL0_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMUSERENR_EL0_SHIFT: u32 = 57; | |
| pub const HDFGRTR_EL2_PMUSERENR_EL0_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRBTRG_EL1_SHIFT: u32 = 56; | |
| pub const HDFGRTR_EL2_TRBTRG_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRBSR_EL1_SHIFT: u32 = 55; | |
| pub const HDFGRTR_EL2_TRBSR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRBPTR_EL1_SHIFT: u32 = 54; | |
| pub const HDFGRTR_EL2_TRBPTR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRBMAR_EL1_SHIFT: u32 = 53; | |
| pub const HDFGRTR_EL2_TRBMAR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRBLIMITR_EL1_SHIFT: u32 = 52; | |
| pub const HDFGRTR_EL2_TRBLIMITR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRBIDR_EL1_SHIFT: u32 = 51; | |
| pub const HDFGRTR_EL2_TRBIDR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRBBASER_EL1_SHIFT: u32 = 50; | |
| pub const HDFGRTR_EL2_TRBBASER_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRCVICTLR_SHIFT: u32 = 48; | |
| pub const HDFGRTR_EL2_TRCVICTLR_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRCSTATR_SHIFT: u32 = 47; | |
| pub const HDFGRTR_EL2_TRCSTATR_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRCSSCSRn_SHIFT: u32 = 46; | |
| pub const HDFGRTR_EL2_TRCSSCSRn_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRCSEQSTR_SHIFT: u32 = 45; | |
| pub const HDFGRTR_EL2_TRCSEQSTR_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRCPRGCTLR_SHIFT: u32 = 44; | |
| pub const HDFGRTR_EL2_TRCPRGCTLR_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRCOSLSR_SHIFT: u32 = 43; | |
| pub const HDFGRTR_EL2_TRCOSLSR_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRCIMSPECn_SHIFT: u32 = 41; | |
| pub const HDFGRTR_EL2_TRCIMSPECn_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRCID_SHIFT: u32 = 40; | |
| pub const HDFGRTR_EL2_TRCID_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRCCNTVRn_SHIFT: u32 = 37; | |
| pub const HDFGRTR_EL2_TRCCNTVRn_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRCCLAIM_SHIFT: u32 = 36; | |
| pub const HDFGRTR_EL2_TRCCLAIM_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRCAUXCTLR_SHIFT: u32 = 35; | |
| pub const HDFGRTR_EL2_TRCAUXCTLR_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRCAUTHSTATUS_SHIFT: u32 = 34; | |
| pub const HDFGRTR_EL2_TRCAUTHSTATUS_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_TRC_SHIFT: u32 = 33; | |
| pub const HDFGRTR_EL2_TRC_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMSLATFR_EL1_SHIFT: u32 = 32; | |
| pub const HDFGRTR_EL2_PMSLATFR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMSIRR_EL1_SHIFT: u32 = 31; | |
| pub const HDFGRTR_EL2_PMSIRR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMSIDR_EL1_SHIFT: u32 = 30; | |
| pub const HDFGRTR_EL2_PMSIDR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMSICR_EL1_SHIFT: u32 = 29; | |
| pub const HDFGRTR_EL2_PMSICR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMSFCR_EL1_SHIFT: u32 = 28; | |
| pub const HDFGRTR_EL2_PMSFCR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMSEVFR_EL1_SHIFT: u32 = 27; | |
| pub const HDFGRTR_EL2_PMSEVFR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMSCR_EL1_SHIFT: u32 = 26; | |
| pub const HDFGRTR_EL2_PMSCR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMBSR_EL1_SHIFT: u32 = 25; | |
| pub const HDFGRTR_EL2_PMBSR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMBPTR_EL1_SHIFT: u32 = 24; | |
| pub const HDFGRTR_EL2_PMBPTR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMBLIMITR_EL1_SHIFT: u32 = 23; | |
| pub const HDFGRTR_EL2_PMBLIMITR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMMIR_EL1_SHIFT: u32 = 22; | |
| pub const HDFGRTR_EL2_PMMIR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMSELR_EL0_SHIFT: u32 = 19; | |
| pub const HDFGRTR_EL2_PMSELR_EL0_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMOVS_SHIFT: u32 = 18; | |
| pub const HDFGRTR_EL2_PMOVS_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMINTEN_SHIFT: u32 = 17; | |
| pub const HDFGRTR_EL2_PMINTEN_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMCNTEN_SHIFT: u32 = 16; | |
| pub const HDFGRTR_EL2_PMCNTEN_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMCCNTR_EL0_SHIFT: u32 = 15; | |
| pub const HDFGRTR_EL2_PMCCNTR_EL0_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMCCFILTR_EL0_SHIFT: u32 = 14; | |
| pub const HDFGRTR_EL2_PMCCFILTR_EL0_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMEVTYPERn_EL0_SHIFT: u32 = 13; | |
| pub const HDFGRTR_EL2_PMEVTYPERn_EL0_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_PMEVCNTRn_EL0_SHIFT: u32 = 12; | |
| pub const HDFGRTR_EL2_PMEVCNTRn_EL0_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_OSDLR_EL1_SHIFT: u32 = 11; | |
| pub const HDFGRTR_EL2_OSDLR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_OSECCR_EL1_SHIFT: u32 = 10; | |
| pub const HDFGRTR_EL2_OSECCR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_OSLSR_EL1_SHIFT: u32 = 9; | |
| pub const HDFGRTR_EL2_OSLSR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_DBGPRCR_EL1_SHIFT: u32 = 7; | |
| pub const HDFGRTR_EL2_DBGPRCR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_DBGAUTHSTATUS_EL1_SHIFT: u32 = 6; | |
| pub const HDFGRTR_EL2_DBGAUTHSTATUS_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_DBGCLAIM_SHIFT: u32 = 5; | |
| pub const HDFGRTR_EL2_DBGCLAIM_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_MDSCR_EL1_SHIFT: u32 = 4; | |
| pub const HDFGRTR_EL2_MDSCR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_DBGWVRn_EL1_SHIFT: u32 = 3; | |
| pub const HDFGRTR_EL2_DBGWVRn_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_DBGWCRn_EL1_SHIFT: u32 = 2; | |
| pub const HDFGRTR_EL2_DBGWCRn_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_DBGBVRn_EL1_SHIFT: u32 = 1; | |
| pub const HDFGRTR_EL2_DBGBVRn_EL1_WIDTH: u32 = 1; | |
| pub const HDFGRTR_EL2_DBGBCRn_EL1_SHIFT: u32 = 0; | |
| pub const HDFGRTR_EL2_DBGBCRn_EL1_WIDTH: u32 = 1; | |
| pub const SYS_HDFGWTR_EL2_Op0: u32 = 3; | |
| pub const SYS_HDFGWTR_EL2_Op1: u32 = 4; | |
| pub const SYS_HDFGWTR_EL2_CRn: u32 = 3; | |
| pub const SYS_HDFGWTR_EL2_CRm: u32 = 1; | |
| pub const SYS_HDFGWTR_EL2_Op2: u32 = 5; | |
| pub const HDFGWTR_EL2_nPMSNEVFR_EL1_SHIFT: u32 = 62; | |
| pub const HDFGWTR_EL2_nPMSNEVFR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_nBRBDATA_SHIFT: u32 = 61; | |
| pub const HDFGWTR_EL2_nBRBDATA_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_nBRBCTL_SHIFT: u32 = 60; | |
| pub const HDFGWTR_EL2_nBRBCTL_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMUSERENR_EL0_SHIFT: u32 = 57; | |
| pub const HDFGWTR_EL2_PMUSERENR_EL0_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRBTRG_EL1_SHIFT: u32 = 56; | |
| pub const HDFGWTR_EL2_TRBTRG_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRBSR_EL1_SHIFT: u32 = 55; | |
| pub const HDFGWTR_EL2_TRBSR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRBPTR_EL1_SHIFT: u32 = 54; | |
| pub const HDFGWTR_EL2_TRBPTR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRBMAR_EL1_SHIFT: u32 = 53; | |
| pub const HDFGWTR_EL2_TRBMAR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRBLIMITR_EL1_SHIFT: u32 = 52; | |
| pub const HDFGWTR_EL2_TRBLIMITR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRBBASER_EL1_SHIFT: u32 = 50; | |
| pub const HDFGWTR_EL2_TRBBASER_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRFCR_EL1_SHIFT: u32 = 49; | |
| pub const HDFGWTR_EL2_TRFCR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRCVICTLR_SHIFT: u32 = 48; | |
| pub const HDFGWTR_EL2_TRCVICTLR_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRCSSCSRn_SHIFT: u32 = 46; | |
| pub const HDFGWTR_EL2_TRCSSCSRn_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRCSEQSTR_SHIFT: u32 = 45; | |
| pub const HDFGWTR_EL2_TRCSEQSTR_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRCPRGCTLR_SHIFT: u32 = 44; | |
| pub const HDFGWTR_EL2_TRCPRGCTLR_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRCOSLAR_SHIFT: u32 = 42; | |
| pub const HDFGWTR_EL2_TRCOSLAR_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRCIMSPECn_SHIFT: u32 = 41; | |
| pub const HDFGWTR_EL2_TRCIMSPECn_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRCCNTVRn_SHIFT: u32 = 37; | |
| pub const HDFGWTR_EL2_TRCCNTVRn_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRCCLAIM_SHIFT: u32 = 36; | |
| pub const HDFGWTR_EL2_TRCCLAIM_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRCAUXCTLR_SHIFT: u32 = 35; | |
| pub const HDFGWTR_EL2_TRCAUXCTLR_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_TRC_SHIFT: u32 = 33; | |
| pub const HDFGWTR_EL2_TRC_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMSLATFR_EL1_SHIFT: u32 = 32; | |
| pub const HDFGWTR_EL2_PMSLATFR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMSIRR_EL1_SHIFT: u32 = 31; | |
| pub const HDFGWTR_EL2_PMSIRR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMSICR_EL1_SHIFT: u32 = 29; | |
| pub const HDFGWTR_EL2_PMSICR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMSFCR_EL1_SHIFT: u32 = 28; | |
| pub const HDFGWTR_EL2_PMSFCR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMSEVFR_EL1_SHIFT: u32 = 27; | |
| pub const HDFGWTR_EL2_PMSEVFR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMSCR_EL1_SHIFT: u32 = 26; | |
| pub const HDFGWTR_EL2_PMSCR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMBSR_EL1_SHIFT: u32 = 25; | |
| pub const HDFGWTR_EL2_PMBSR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMBPTR_EL1_SHIFT: u32 = 24; | |
| pub const HDFGWTR_EL2_PMBPTR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMBLIMITR_EL1_SHIFT: u32 = 23; | |
| pub const HDFGWTR_EL2_PMBLIMITR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMCR_EL0_SHIFT: u32 = 21; | |
| pub const HDFGWTR_EL2_PMCR_EL0_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMSWINC_EL0_SHIFT: u32 = 20; | |
| pub const HDFGWTR_EL2_PMSWINC_EL0_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMSELR_EL0_SHIFT: u32 = 19; | |
| pub const HDFGWTR_EL2_PMSELR_EL0_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMOVS_SHIFT: u32 = 18; | |
| pub const HDFGWTR_EL2_PMOVS_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMINTEN_SHIFT: u32 = 17; | |
| pub const HDFGWTR_EL2_PMINTEN_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMCNTEN_SHIFT: u32 = 16; | |
| pub const HDFGWTR_EL2_PMCNTEN_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMCCNTR_EL0_SHIFT: u32 = 15; | |
| pub const HDFGWTR_EL2_PMCCNTR_EL0_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMCCFILTR_EL0_SHIFT: u32 = 14; | |
| pub const HDFGWTR_EL2_PMCCFILTR_EL0_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMEVTYPERn_EL0_SHIFT: u32 = 13; | |
| pub const HDFGWTR_EL2_PMEVTYPERn_EL0_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_PMEVCNTRn_EL0_SHIFT: u32 = 12; | |
| pub const HDFGWTR_EL2_PMEVCNTRn_EL0_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_OSDLR_EL1_SHIFT: u32 = 11; | |
| pub const HDFGWTR_EL2_OSDLR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_OSECCR_EL1_SHIFT: u32 = 10; | |
| pub const HDFGWTR_EL2_OSECCR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_OSLAR_EL1_SHIFT: u32 = 8; | |
| pub const HDFGWTR_EL2_OSLAR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_DBGPRCR_EL1_SHIFT: u32 = 7; | |
| pub const HDFGWTR_EL2_DBGPRCR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_DBGCLAIM_SHIFT: u32 = 5; | |
| pub const HDFGWTR_EL2_DBGCLAIM_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_MDSCR_EL1_SHIFT: u32 = 4; | |
| pub const HDFGWTR_EL2_MDSCR_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_DBGWVRn_EL1_SHIFT: u32 = 3; | |
| pub const HDFGWTR_EL2_DBGWVRn_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_DBGWCRn_EL1_SHIFT: u32 = 2; | |
| pub const HDFGWTR_EL2_DBGWCRn_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_DBGBVRn_EL1_SHIFT: u32 = 1; | |
| pub const HDFGWTR_EL2_DBGBVRn_EL1_WIDTH: u32 = 1; | |
| pub const HDFGWTR_EL2_DBGBCRn_EL1_SHIFT: u32 = 0; | |
| pub const HDFGWTR_EL2_DBGBCRn_EL1_WIDTH: u32 = 1; | |
| pub const SYS_ZCR_EL2_Op0: u32 = 3; | |
| pub const SYS_ZCR_EL2_Op1: u32 = 4; | |
| pub const SYS_ZCR_EL2_CRn: u32 = 1; | |
| pub const SYS_ZCR_EL2_CRm: u32 = 2; | |
| pub const SYS_ZCR_EL2_Op2: u32 = 0; | |
| pub const SYS_HCRX_EL2_Op0: u32 = 3; | |
| pub const SYS_HCRX_EL2_Op1: u32 = 4; | |
| pub const SYS_HCRX_EL2_CRn: u32 = 1; | |
| pub const SYS_HCRX_EL2_CRm: u32 = 2; | |
| pub const SYS_HCRX_EL2_Op2: u32 = 2; | |
| pub const HCRX_EL2_GCSEn_SHIFT: u32 = 22; | |
| pub const HCRX_EL2_GCSEn_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_EnIDCP128_SHIFT: u32 = 21; | |
| pub const HCRX_EL2_EnIDCP128_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_EnSDERR_SHIFT: u32 = 20; | |
| pub const HCRX_EL2_EnSDERR_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_TMEA_SHIFT: u32 = 19; | |
| pub const HCRX_EL2_TMEA_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_EnSNERR_SHIFT: u32 = 18; | |
| pub const HCRX_EL2_EnSNERR_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_D128En_SHIFT: u32 = 17; | |
| pub const HCRX_EL2_D128En_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_PTTWI_SHIFT: u32 = 16; | |
| pub const HCRX_EL2_PTTWI_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_SCTLR2En_SHIFT: u32 = 15; | |
| pub const HCRX_EL2_SCTLR2En_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_TCR2En_SHIFT: u32 = 14; | |
| pub const HCRX_EL2_TCR2En_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_MSCEn_SHIFT: u32 = 11; | |
| pub const HCRX_EL2_MSCEn_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_MCE2_SHIFT: u32 = 10; | |
| pub const HCRX_EL2_MCE2_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_CMOW_SHIFT: u32 = 9; | |
| pub const HCRX_EL2_CMOW_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_VFNMI_SHIFT: u32 = 8; | |
| pub const HCRX_EL2_VFNMI_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_VINMI_SHIFT: u32 = 7; | |
| pub const HCRX_EL2_VINMI_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_TALLINT_SHIFT: u32 = 6; | |
| pub const HCRX_EL2_TALLINT_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_SMPME_SHIFT: u32 = 5; | |
| pub const HCRX_EL2_SMPME_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_FGTnXS_SHIFT: u32 = 4; | |
| pub const HCRX_EL2_FGTnXS_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_FnXS_SHIFT: u32 = 3; | |
| pub const HCRX_EL2_FnXS_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_EnASR_SHIFT: u32 = 2; | |
| pub const HCRX_EL2_EnASR_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_EnALS_SHIFT: u32 = 1; | |
| pub const HCRX_EL2_EnALS_WIDTH: u32 = 1; | |
| pub const HCRX_EL2_EnAS0_SHIFT: u32 = 0; | |
| pub const HCRX_EL2_EnAS0_WIDTH: u32 = 1; | |
| pub const SYS_SMPRIMAP_EL2_Op0: u32 = 3; | |
| pub const SYS_SMPRIMAP_EL2_Op1: u32 = 4; | |
| pub const SYS_SMPRIMAP_EL2_CRn: u32 = 1; | |
| pub const SYS_SMPRIMAP_EL2_CRm: u32 = 2; | |
| pub const SYS_SMPRIMAP_EL2_Op2: u32 = 5; | |
| pub const SMPRIMAP_EL2_P15_SHIFT: u32 = 60; | |
| pub const SMPRIMAP_EL2_P15_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P14_SHIFT: u32 = 56; | |
| pub const SMPRIMAP_EL2_P14_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P13_SHIFT: u32 = 52; | |
| pub const SMPRIMAP_EL2_P13_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P12_SHIFT: u32 = 48; | |
| pub const SMPRIMAP_EL2_P12_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P11_SHIFT: u32 = 44; | |
| pub const SMPRIMAP_EL2_P11_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P10_SHIFT: u32 = 40; | |
| pub const SMPRIMAP_EL2_P10_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_F9_SHIFT: u32 = 36; | |
| pub const SMPRIMAP_EL2_F9_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P8_SHIFT: u32 = 32; | |
| pub const SMPRIMAP_EL2_P8_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P7_SHIFT: u32 = 28; | |
| pub const SMPRIMAP_EL2_P7_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P6_SHIFT: u32 = 24; | |
| pub const SMPRIMAP_EL2_P6_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P5_SHIFT: u32 = 20; | |
| pub const SMPRIMAP_EL2_P5_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P4_SHIFT: u32 = 16; | |
| pub const SMPRIMAP_EL2_P4_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P3_SHIFT: u32 = 12; | |
| pub const SMPRIMAP_EL2_P3_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P2_SHIFT: u32 = 8; | |
| pub const SMPRIMAP_EL2_P2_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P1_SHIFT: u32 = 4; | |
| pub const SMPRIMAP_EL2_P1_WIDTH: u32 = 4; | |
| pub const SMPRIMAP_EL2_P0_SHIFT: u32 = 0; | |
| pub const SMPRIMAP_EL2_P0_WIDTH: u32 = 4; | |
| pub const SYS_SMCR_EL2_Op0: u32 = 3; | |
| pub const SYS_SMCR_EL2_Op1: u32 = 4; | |
| pub const SYS_SMCR_EL2_CRn: u32 = 1; | |
| pub const SYS_SMCR_EL2_CRm: u32 = 2; | |
| pub const SYS_SMCR_EL2_Op2: u32 = 6; | |
| pub const SYS_DACR32_EL2_Op0: u32 = 3; | |
| pub const SYS_DACR32_EL2_Op1: u32 = 4; | |
| pub const SYS_DACR32_EL2_CRn: u32 = 3; | |
| pub const SYS_DACR32_EL2_CRm: u32 = 0; | |
| pub const SYS_DACR32_EL2_Op2: u32 = 0; | |
| pub const DACR32_EL2_D15_SHIFT: u32 = 30; | |
| pub const DACR32_EL2_D15_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D14_SHIFT: u32 = 28; | |
| pub const DACR32_EL2_D14_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D13_SHIFT: u32 = 26; | |
| pub const DACR32_EL2_D13_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D12_SHIFT: u32 = 24; | |
| pub const DACR32_EL2_D12_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D11_SHIFT: u32 = 22; | |
| pub const DACR32_EL2_D11_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D10_SHIFT: u32 = 20; | |
| pub const DACR32_EL2_D10_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D9_SHIFT: u32 = 18; | |
| pub const DACR32_EL2_D9_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D8_SHIFT: u32 = 16; | |
| pub const DACR32_EL2_D8_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D7_SHIFT: u32 = 14; | |
| pub const DACR32_EL2_D7_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D6_SHIFT: u32 = 12; | |
| pub const DACR32_EL2_D6_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D5_SHIFT: u32 = 10; | |
| pub const DACR32_EL2_D5_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D4_SHIFT: u32 = 8; | |
| pub const DACR32_EL2_D4_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D3_SHIFT: u32 = 6; | |
| pub const DACR32_EL2_D3_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D2_SHIFT: u32 = 4; | |
| pub const DACR32_EL2_D2_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D1_SHIFT: u32 = 2; | |
| pub const DACR32_EL2_D1_WIDTH: u32 = 2; | |
| pub const DACR32_EL2_D0_SHIFT: u32 = 0; | |
| pub const DACR32_EL2_D0_WIDTH: u32 = 2; | |
| pub const SYS_FAR_EL2_Op0: u32 = 3; | |
| pub const SYS_FAR_EL2_Op1: u32 = 4; | |
| pub const SYS_FAR_EL2_CRn: u32 = 6; | |
| pub const SYS_FAR_EL2_CRm: u32 = 0; | |
| pub const SYS_FAR_EL2_Op2: u32 = 0; | |
| pub const FAR_EL2_ADDR_SHIFT: u32 = 0; | |
| pub const FAR_EL2_ADDR_WIDTH: u32 = 64; | |
| pub const SYS_PMSCR_EL2_Op0: u32 = 3; | |
| pub const SYS_PMSCR_EL2_Op1: u32 = 4; | |
| pub const SYS_PMSCR_EL2_CRn: u32 = 9; | |
| pub const SYS_PMSCR_EL2_CRm: u32 = 9; | |
| pub const SYS_PMSCR_EL2_Op2: u32 = 0; | |
| pub const PMSCR_EL2_PCT_SHIFT: u32 = 6; | |
| pub const PMSCR_EL2_PCT_WIDTH: u32 = 2; | |
| pub const PMSCR_EL2_TS_SHIFT: u32 = 5; | |
| pub const PMSCR_EL2_TS_WIDTH: u32 = 1; | |
| pub const PMSCR_EL2_PA_SHIFT: u32 = 4; | |
| pub const PMSCR_EL2_PA_WIDTH: u32 = 1; | |
| pub const PMSCR_EL2_CX_SHIFT: u32 = 3; | |
| pub const PMSCR_EL2_CX_WIDTH: u32 = 1; | |
| pub const PMSCR_EL2_E2SPE_SHIFT: u32 = 1; | |
| pub const PMSCR_EL2_E2SPE_WIDTH: u32 = 1; | |
| pub const PMSCR_EL2_E0HSPE_SHIFT: u32 = 0; | |
| pub const PMSCR_EL2_E0HSPE_WIDTH: u32 = 1; | |
| pub const SYS_CONTEXTIDR_EL2_Op0: u32 = 3; | |
| pub const SYS_CONTEXTIDR_EL2_Op1: u32 = 4; | |
| pub const SYS_CONTEXTIDR_EL2_CRn: u32 = 13; | |
| pub const SYS_CONTEXTIDR_EL2_CRm: u32 = 0; | |
| pub const SYS_CONTEXTIDR_EL2_Op2: u32 = 1; | |
| pub const SYS_CNTPOFF_EL2_Op0: u32 = 3; | |
| pub const SYS_CNTPOFF_EL2_Op1: u32 = 4; | |
| pub const SYS_CNTPOFF_EL2_CRn: u32 = 14; | |
| pub const SYS_CNTPOFF_EL2_CRm: u32 = 0; | |
| pub const SYS_CNTPOFF_EL2_Op2: u32 = 6; | |
| pub const CNTPOFF_EL2_PhysicalOffset_SHIFT: u32 = 0; | |
| pub const CNTPOFF_EL2_PhysicalOffset_WIDTH: u32 = 64; | |
| pub const SYS_CPACR_EL12_Op0: u32 = 3; | |
| pub const SYS_CPACR_EL12_Op1: u32 = 5; | |
| pub const SYS_CPACR_EL12_CRn: u32 = 1; | |
| pub const SYS_CPACR_EL12_CRm: u32 = 0; | |
| pub const SYS_CPACR_EL12_Op2: u32 = 2; | |
| pub const SYS_ZCR_EL12_Op0: u32 = 3; | |
| pub const SYS_ZCR_EL12_Op1: u32 = 5; | |
| pub const SYS_ZCR_EL12_CRn: u32 = 1; | |
| pub const SYS_ZCR_EL12_CRm: u32 = 2; | |
| pub const SYS_ZCR_EL12_Op2: u32 = 0; | |
| pub const SYS_SMCR_EL12_Op0: u32 = 3; | |
| pub const SYS_SMCR_EL12_Op1: u32 = 5; | |
| pub const SYS_SMCR_EL12_CRn: u32 = 1; | |
| pub const SYS_SMCR_EL12_CRm: u32 = 2; | |
| pub const SYS_SMCR_EL12_Op2: u32 = 6; | |
| pub const SYS_FAR_EL12_Op0: u32 = 3; | |
| pub const SYS_FAR_EL12_Op1: u32 = 5; | |
| pub const SYS_FAR_EL12_CRn: u32 = 6; | |
| pub const SYS_FAR_EL12_CRm: u32 = 0; | |
| pub const SYS_FAR_EL12_Op2: u32 = 0; | |
| pub const FAR_EL12_ADDR_SHIFT: u32 = 0; | |
| pub const FAR_EL12_ADDR_WIDTH: u32 = 64; | |
| pub const SYS_CONTEXTIDR_EL12_Op0: u32 = 3; | |
| pub const SYS_CONTEXTIDR_EL12_Op1: u32 = 5; | |
| pub const SYS_CONTEXTIDR_EL12_CRn: u32 = 13; | |
| pub const SYS_CONTEXTIDR_EL12_CRm: u32 = 0; | |
| pub const SYS_CONTEXTIDR_EL12_Op2: u32 = 1; | |
| pub const TTBRx_EL1_ASID_SHIFT: u32 = 48; | |
| pub const TTBRx_EL1_ASID_WIDTH: u32 = 16; | |
| pub const TTBRx_EL1_BADDR_SHIFT: u32 = 1; | |
| pub const TTBRx_EL1_BADDR_WIDTH: u32 = 47; | |
| pub const TTBRx_EL1_CnP_SHIFT: u32 = 0; | |
| pub const TTBRx_EL1_CnP_WIDTH: u32 = 1; | |
| pub const SYS_TTBR0_EL1_Op0: u32 = 3; | |
| pub const SYS_TTBR0_EL1_Op1: u32 = 0; | |
| pub const SYS_TTBR0_EL1_CRn: u32 = 2; | |
| pub const SYS_TTBR0_EL1_CRm: u32 = 0; | |
| pub const SYS_TTBR0_EL1_Op2: u32 = 0; | |
| pub const SYS_TTBR1_EL1_Op0: u32 = 3; | |
| pub const SYS_TTBR1_EL1_Op1: u32 = 0; | |
| pub const SYS_TTBR1_EL1_CRn: u32 = 2; | |
| pub const SYS_TTBR1_EL1_CRm: u32 = 0; | |
| pub const SYS_TTBR1_EL1_Op2: u32 = 1; | |
| pub const TCR2_EL1x_DisCH1_SHIFT: u32 = 15; | |
| pub const TCR2_EL1x_DisCH1_WIDTH: u32 = 1; | |
| pub const TCR2_EL1x_DisCH0_SHIFT: u32 = 14; | |
| pub const TCR2_EL1x_DisCH0_WIDTH: u32 = 1; | |
| pub const TCR2_EL1x_HAFT_SHIFT: u32 = 11; | |
| pub const TCR2_EL1x_HAFT_WIDTH: u32 = 1; | |
| pub const TCR2_EL1x_PTTWI_SHIFT: u32 = 10; | |
| pub const TCR2_EL1x_PTTWI_WIDTH: u32 = 1; | |
| pub const TCR2_EL1x_D128_SHIFT: u32 = 5; | |
| pub const TCR2_EL1x_D128_WIDTH: u32 = 1; | |
| pub const TCR2_EL1x_AIE_SHIFT: u32 = 4; | |
| pub const TCR2_EL1x_AIE_WIDTH: u32 = 1; | |
| pub const TCR2_EL1x_POE_SHIFT: u32 = 3; | |
| pub const TCR2_EL1x_POE_WIDTH: u32 = 1; | |
| pub const TCR2_EL1x_E0POE_SHIFT: u32 = 2; | |
| pub const TCR2_EL1x_E0POE_WIDTH: u32 = 1; | |
| pub const TCR2_EL1x_PIE_SHIFT: u32 = 1; | |
| pub const TCR2_EL1x_PIE_WIDTH: u32 = 1; | |
| pub const TCR2_EL1x_PnCH_SHIFT: u32 = 0; | |
| pub const TCR2_EL1x_PnCH_WIDTH: u32 = 1; | |
| pub const SYS_TCR2_EL1_Op0: u32 = 3; | |
| pub const SYS_TCR2_EL1_Op1: u32 = 0; | |
| pub const SYS_TCR2_EL1_CRn: u32 = 2; | |
| pub const SYS_TCR2_EL1_CRm: u32 = 0; | |
| pub const SYS_TCR2_EL1_Op2: u32 = 3; | |
| pub const SYS_TCR2_EL12_Op0: u32 = 3; | |
| pub const SYS_TCR2_EL12_Op1: u32 = 5; | |
| pub const SYS_TCR2_EL12_CRn: u32 = 2; | |
| pub const SYS_TCR2_EL12_CRm: u32 = 0; | |
| pub const SYS_TCR2_EL12_Op2: u32 = 3; | |
| pub const SYS_TCR2_EL2_Op0: u32 = 3; | |
| pub const SYS_TCR2_EL2_Op1: u32 = 4; | |
| pub const SYS_TCR2_EL2_CRn: u32 = 2; | |
| pub const SYS_TCR2_EL2_CRm: u32 = 0; | |
| pub const SYS_TCR2_EL2_Op2: u32 = 3; | |
| pub const TCR2_EL2_DisCH1_SHIFT: u32 = 15; | |
| pub const TCR2_EL2_DisCH1_WIDTH: u32 = 1; | |
| pub const TCR2_EL2_DisCH0_SHIFT: u32 = 14; | |
| pub const TCR2_EL2_DisCH0_WIDTH: u32 = 1; | |
| pub const TCR2_EL2_AMEC1_SHIFT: u32 = 13; | |
| pub const TCR2_EL2_AMEC1_WIDTH: u32 = 1; | |
| pub const TCR2_EL2_AMEC0_SHIFT: u32 = 12; | |
| pub const TCR2_EL2_AMEC0_WIDTH: u32 = 1; | |
| pub const TCR2_EL2_HAFT_SHIFT: u32 = 11; | |
| pub const TCR2_EL2_HAFT_WIDTH: u32 = 1; | |
| pub const TCR2_EL2_PTTWI_SHIFT: u32 = 10; | |
| pub const TCR2_EL2_PTTWI_WIDTH: u32 = 1; | |
| pub const TCR2_EL2_SKL1_SHIFT: u32 = 8; | |
| pub const TCR2_EL2_SKL1_WIDTH: u32 = 2; | |
| pub const TCR2_EL2_SKL0_SHIFT: u32 = 6; | |
| pub const TCR2_EL2_SKL0_WIDTH: u32 = 2; | |
| pub const TCR2_EL2_D128_SHIFT: u32 = 5; | |
| pub const TCR2_EL2_D128_WIDTH: u32 = 1; | |
| pub const TCR2_EL2_AIE_SHIFT: u32 = 4; | |
| pub const TCR2_EL2_AIE_WIDTH: u32 = 1; | |
| pub const TCR2_EL2_POE_SHIFT: u32 = 3; | |
| pub const TCR2_EL2_POE_WIDTH: u32 = 1; | |
| pub const TCR2_EL2_E0POE_SHIFT: u32 = 2; | |
| pub const TCR2_EL2_E0POE_WIDTH: u32 = 1; | |
| pub const TCR2_EL2_PIE_SHIFT: u32 = 1; | |
| pub const TCR2_EL2_PIE_WIDTH: u32 = 1; | |
| pub const TCR2_EL2_PnCH_SHIFT: u32 = 0; | |
| pub const TCR2_EL2_PnCH_WIDTH: u32 = 1; | |
| pub const PIRx_ELx_Perm15_SHIFT: u32 = 60; | |
| pub const PIRx_ELx_Perm15_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm14_SHIFT: u32 = 56; | |
| pub const PIRx_ELx_Perm14_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm13_SHIFT: u32 = 52; | |
| pub const PIRx_ELx_Perm13_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm12_SHIFT: u32 = 48; | |
| pub const PIRx_ELx_Perm12_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm11_SHIFT: u32 = 44; | |
| pub const PIRx_ELx_Perm11_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm10_SHIFT: u32 = 40; | |
| pub const PIRx_ELx_Perm10_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm9_SHIFT: u32 = 36; | |
| pub const PIRx_ELx_Perm9_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm8_SHIFT: u32 = 32; | |
| pub const PIRx_ELx_Perm8_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm7_SHIFT: u32 = 28; | |
| pub const PIRx_ELx_Perm7_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm6_SHIFT: u32 = 24; | |
| pub const PIRx_ELx_Perm6_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm5_SHIFT: u32 = 20; | |
| pub const PIRx_ELx_Perm5_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm4_SHIFT: u32 = 16; | |
| pub const PIRx_ELx_Perm4_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm3_SHIFT: u32 = 12; | |
| pub const PIRx_ELx_Perm3_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm2_SHIFT: u32 = 8; | |
| pub const PIRx_ELx_Perm2_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm1_SHIFT: u32 = 4; | |
| pub const PIRx_ELx_Perm1_WIDTH: u32 = 4; | |
| pub const PIRx_ELx_Perm0_SHIFT: u32 = 0; | |
| pub const PIRx_ELx_Perm0_WIDTH: u32 = 4; | |
| pub const SYS_PIRE0_EL1_Op0: u32 = 3; | |
| pub const SYS_PIRE0_EL1_Op1: u32 = 0; | |
| pub const SYS_PIRE0_EL1_CRn: u32 = 10; | |
| pub const SYS_PIRE0_EL1_CRm: u32 = 2; | |
| pub const SYS_PIRE0_EL1_Op2: u32 = 2; | |
| pub const SYS_PIRE0_EL12_Op0: u32 = 3; | |
| pub const SYS_PIRE0_EL12_Op1: u32 = 5; | |
| pub const SYS_PIRE0_EL12_CRn: u32 = 10; | |
| pub const SYS_PIRE0_EL12_CRm: u32 = 2; | |
| pub const SYS_PIRE0_EL12_Op2: u32 = 2; | |
| pub const SYS_PIR_EL1_Op0: u32 = 3; | |
| pub const SYS_PIR_EL1_Op1: u32 = 0; | |
| pub const SYS_PIR_EL1_CRn: u32 = 10; | |
| pub const SYS_PIR_EL1_CRm: u32 = 2; | |
| pub const SYS_PIR_EL1_Op2: u32 = 3; | |
| pub const SYS_PIR_EL12_Op0: u32 = 3; | |
| pub const SYS_PIR_EL12_Op1: u32 = 5; | |
| pub const SYS_PIR_EL12_CRn: u32 = 10; | |
| pub const SYS_PIR_EL12_CRm: u32 = 2; | |
| pub const SYS_PIR_EL12_Op2: u32 = 3; | |
| pub const SYS_PIR_EL2_Op0: u32 = 3; | |
| pub const SYS_PIR_EL2_Op1: u32 = 4; | |
| pub const SYS_PIR_EL2_CRn: u32 = 10; | |
| pub const SYS_PIR_EL2_CRm: u32 = 2; | |
| pub const SYS_PIR_EL2_Op2: u32 = 3; | |
| pub const SYS_LORSA_EL1_Op0: u32 = 3; | |
| pub const SYS_LORSA_EL1_Op1: u32 = 0; | |
| pub const SYS_LORSA_EL1_CRn: u32 = 10; | |
| pub const SYS_LORSA_EL1_CRm: u32 = 4; | |
| pub const SYS_LORSA_EL1_Op2: u32 = 0; | |
| pub const LORSA_EL1_SA_SHIFT: u32 = 16; | |
| pub const LORSA_EL1_SA_WIDTH: u32 = 36; | |
| pub const LORSA_EL1_Valid_SHIFT: u32 = 0; | |
| pub const LORSA_EL1_Valid_WIDTH: u32 = 1; | |
| pub const SYS_LOREA_EL1_Op0: u32 = 3; | |
| pub const SYS_LOREA_EL1_Op1: u32 = 0; | |
| pub const SYS_LOREA_EL1_CRn: u32 = 10; | |
| pub const SYS_LOREA_EL1_CRm: u32 = 4; | |
| pub const SYS_LOREA_EL1_Op2: u32 = 1; | |
| pub const LOREA_EL1_EA_51_48_SHIFT: u32 = 48; | |
| pub const LOREA_EL1_EA_51_48_WIDTH: u32 = 4; | |
| pub const LOREA_EL1_EA_47_16_SHIFT: u32 = 16; | |
| pub const LOREA_EL1_EA_47_16_WIDTH: u32 = 32; | |
| pub const SYS_LORN_EL1_Op0: u32 = 3; | |
| pub const SYS_LORN_EL1_Op1: u32 = 0; | |
| pub const SYS_LORN_EL1_CRn: u32 = 10; | |
| pub const SYS_LORN_EL1_CRm: u32 = 4; | |
| pub const SYS_LORN_EL1_Op2: u32 = 2; | |
| pub const LORN_EL1_Num_SHIFT: u32 = 0; | |
| pub const LORN_EL1_Num_WIDTH: u32 = 8; | |
| pub const SYS_LORC_EL1_Op0: u32 = 3; | |
| pub const SYS_LORC_EL1_Op1: u32 = 0; | |
| pub const SYS_LORC_EL1_CRn: u32 = 10; | |
| pub const SYS_LORC_EL1_CRm: u32 = 4; | |
| pub const SYS_LORC_EL1_Op2: u32 = 3; | |
| pub const LORC_EL1_DS_SHIFT: u32 = 2; | |
| pub const LORC_EL1_DS_WIDTH: u32 = 8; | |
| pub const LORC_EL1_EN_SHIFT: u32 = 0; | |
| pub const LORC_EL1_EN_WIDTH: u32 = 1; | |
| pub const SYS_LORID_EL1_Op0: u32 = 3; | |
| pub const SYS_LORID_EL1_Op1: u32 = 0; | |
| pub const SYS_LORID_EL1_CRn: u32 = 10; | |
| pub const SYS_LORID_EL1_CRm: u32 = 4; | |
| pub const SYS_LORID_EL1_Op2: u32 = 7; | |
| pub const LORID_EL1_LD_SHIFT: u32 = 16; | |
| pub const LORID_EL1_LD_WIDTH: u32 = 8; | |
| pub const LORID_EL1_LR_SHIFT: u32 = 0; | |
| pub const LORID_EL1_LR_WIDTH: u32 = 8; | |
| pub const SYS_ISR_EL1_Op0: u32 = 3; | |
| pub const SYS_ISR_EL1_Op1: u32 = 0; | |
| pub const SYS_ISR_EL1_CRn: u32 = 12; | |
| pub const SYS_ISR_EL1_CRm: u32 = 1; | |
| pub const SYS_ISR_EL1_Op2: u32 = 0; | |
| pub const ISR_EL1_IS_SHIFT: u32 = 10; | |
| pub const ISR_EL1_IS_WIDTH: u32 = 1; | |
| pub const ISR_EL1_FS_SHIFT: u32 = 9; | |
| pub const ISR_EL1_FS_WIDTH: u32 = 1; | |
| pub const ISR_EL1_A_SHIFT: u32 = 8; | |
| pub const ISR_EL1_A_WIDTH: u32 = 1; | |
| pub const ISR_EL1_I_SHIFT: u32 = 7; | |
| pub const ISR_EL1_I_WIDTH: u32 = 1; | |
| pub const ISR_EL1_F_SHIFT: u32 = 6; | |
| pub const ISR_EL1_F_WIDTH: u32 = 1; | |
| pub const SYS_ICC_NMIAR1_EL1_Op0: u32 = 3; | |
| pub const SYS_ICC_NMIAR1_EL1_Op1: u32 = 0; | |
| pub const SYS_ICC_NMIAR1_EL1_CRn: u32 = 12; | |
| pub const SYS_ICC_NMIAR1_EL1_CRm: u32 = 9; | |
| pub const SYS_ICC_NMIAR1_EL1_Op2: u32 = 5; | |
| pub const ICC_NMIAR1_EL1_INTID_SHIFT: u32 = 0; | |
| pub const ICC_NMIAR1_EL1_INTID_WIDTH: u32 = 24; | |
| pub const SYS_TRBLIMITR_EL1_Op0: u32 = 3; | |
| pub const SYS_TRBLIMITR_EL1_Op1: u32 = 0; | |
| pub const SYS_TRBLIMITR_EL1_CRn: u32 = 9; | |
| pub const SYS_TRBLIMITR_EL1_CRm: u32 = 11; | |
| pub const SYS_TRBLIMITR_EL1_Op2: u32 = 0; | |
| pub const TRBLIMITR_EL1_LIMIT_SHIFT: u32 = 12; | |
| pub const TRBLIMITR_EL1_LIMIT_WIDTH: u32 = 52; | |
| pub const TRBLIMITR_EL1_XE_SHIFT: u32 = 6; | |
| pub const TRBLIMITR_EL1_XE_WIDTH: u32 = 1; | |
| pub const TRBLIMITR_EL1_nVM_SHIFT: u32 = 5; | |
| pub const TRBLIMITR_EL1_nVM_WIDTH: u32 = 1; | |
| pub const TRBLIMITR_EL1_TM_SHIFT: u32 = 3; | |
| pub const TRBLIMITR_EL1_TM_WIDTH: u32 = 2; | |
| pub const TRBLIMITR_EL1_FM_SHIFT: u32 = 1; | |
| pub const TRBLIMITR_EL1_FM_WIDTH: u32 = 2; | |
| pub const TRBLIMITR_EL1_E_SHIFT: u32 = 0; | |
| pub const TRBLIMITR_EL1_E_WIDTH: u32 = 1; | |
| pub const SYS_TRBPTR_EL1_Op0: u32 = 3; | |
| pub const SYS_TRBPTR_EL1_Op1: u32 = 0; | |
| pub const SYS_TRBPTR_EL1_CRn: u32 = 9; | |
| pub const SYS_TRBPTR_EL1_CRm: u32 = 11; | |
| pub const SYS_TRBPTR_EL1_Op2: u32 = 1; | |
| pub const TRBPTR_EL1_PTR_SHIFT: u32 = 0; | |
| pub const TRBPTR_EL1_PTR_WIDTH: u32 = 64; | |
| pub const SYS_TRBBASER_EL1_Op0: u32 = 3; | |
| pub const SYS_TRBBASER_EL1_Op1: u32 = 0; | |
| pub const SYS_TRBBASER_EL1_CRn: u32 = 9; | |
| pub const SYS_TRBBASER_EL1_CRm: u32 = 11; | |
| pub const SYS_TRBBASER_EL1_Op2: u32 = 2; | |
| pub const TRBBASER_EL1_BASE_SHIFT: u32 = 12; | |
| pub const TRBBASER_EL1_BASE_WIDTH: u32 = 52; | |
| pub const SYS_TRBSR_EL1_Op0: u32 = 3; | |
| pub const SYS_TRBSR_EL1_Op1: u32 = 0; | |
| pub const SYS_TRBSR_EL1_CRn: u32 = 9; | |
| pub const SYS_TRBSR_EL1_CRm: u32 = 11; | |
| pub const SYS_TRBSR_EL1_Op2: u32 = 3; | |
| pub const TRBSR_EL1_MSS2_SHIFT: u32 = 32; | |
| pub const TRBSR_EL1_MSS2_WIDTH: u32 = 24; | |
| pub const TRBSR_EL1_EC_SHIFT: u32 = 26; | |
| pub const TRBSR_EL1_EC_WIDTH: u32 = 6; | |
| pub const TRBSR_EL1_DAT_SHIFT: u32 = 23; | |
| pub const TRBSR_EL1_DAT_WIDTH: u32 = 1; | |
| pub const TRBSR_EL1_IRQ_SHIFT: u32 = 22; | |
| pub const TRBSR_EL1_IRQ_WIDTH: u32 = 1; | |
| pub const TRBSR_EL1_TRG_SHIFT: u32 = 21; | |
| pub const TRBSR_EL1_TRG_WIDTH: u32 = 1; | |
| pub const TRBSR_EL1_WRAP_SHIFT: u32 = 20; | |
| pub const TRBSR_EL1_WRAP_WIDTH: u32 = 1; | |
| pub const TRBSR_EL1_EA_SHIFT: u32 = 18; | |
| pub const TRBSR_EL1_EA_WIDTH: u32 = 1; | |
| pub const TRBSR_EL1_S_SHIFT: u32 = 17; | |
| pub const TRBSR_EL1_S_WIDTH: u32 = 1; | |
| pub const TRBSR_EL1_MSS_SHIFT: u32 = 0; | |
| pub const TRBSR_EL1_MSS_WIDTH: u32 = 16; | |
| pub const SYS_TRBMAR_EL1_Op0: u32 = 3; | |
| pub const SYS_TRBMAR_EL1_Op1: u32 = 0; | |
| pub const SYS_TRBMAR_EL1_CRn: u32 = 9; | |
| pub const SYS_TRBMAR_EL1_CRm: u32 = 11; | |
| pub const SYS_TRBMAR_EL1_Op2: u32 = 4; | |
| pub const TRBMAR_EL1_PAS_SHIFT: u32 = 10; | |
| pub const TRBMAR_EL1_PAS_WIDTH: u32 = 2; | |
| pub const TRBMAR_EL1_SH_SHIFT: u32 = 8; | |
| pub const TRBMAR_EL1_SH_WIDTH: u32 = 2; | |
| pub const TRBMAR_EL1_Attr_SHIFT: u32 = 0; | |
| pub const TRBMAR_EL1_Attr_WIDTH: u32 = 8; | |
| pub const SYS_TRBTRG_EL1_Op0: u32 = 3; | |
| pub const SYS_TRBTRG_EL1_Op1: u32 = 0; | |
| pub const SYS_TRBTRG_EL1_CRn: u32 = 9; | |
| pub const SYS_TRBTRG_EL1_CRm: u32 = 11; | |
| pub const SYS_TRBTRG_EL1_Op2: u32 = 6; | |
| pub const TRBTRG_EL1_TRG_SHIFT: u32 = 0; | |
| pub const TRBTRG_EL1_TRG_WIDTH: u32 = 32; | |
| pub const SYS_TRBIDR_EL1_Op0: u32 = 3; | |
| pub const SYS_TRBIDR_EL1_Op1: u32 = 0; | |
| pub const SYS_TRBIDR_EL1_CRn: u32 = 9; | |
| pub const SYS_TRBIDR_EL1_CRm: u32 = 11; | |
| pub const SYS_TRBIDR_EL1_Op2: u32 = 7; | |
| pub const TRBIDR_EL1_EA_SHIFT: u32 = 8; | |
| pub const TRBIDR_EL1_EA_WIDTH: u32 = 4; | |
| pub const TRBIDR_EL1_F_SHIFT: u32 = 5; | |
| pub const TRBIDR_EL1_F_WIDTH: u32 = 1; | |
| pub const TRBIDR_EL1_P_SHIFT: u32 = 4; | |
| pub const TRBIDR_EL1_P_WIDTH: u32 = 1; | |
| pub const TRBIDR_EL1_Align_SHIFT: u32 = 0; | |
| pub const TRBIDR_EL1_Align_WIDTH: u32 = 4; | |
| pub const OSLSR_EL1_OSLM_NI: u32 = 0; | |
| pub const PMBSR_EL1_FAULT_FSC_SHIFT: u32 = 0; | |
| pub const PMBSR_EL1_BUF_BSC_SHIFT: u32 = 0; | |
| pub const PMBSR_EL1_BUF_BSC_FULL: u32 = 1; | |
| pub const TRBSR_EL1_BSC_SHIFT: u32 = 0; | |
| pub const AT_Op0: u32 = 1; | |
| pub const AT_CRn: u32 = 7; | |
| pub const SCTLR_ELx_EE_SHIFT: u32 = 25; | |
| pub const SCTLR_ELx_ENIA_SHIFT: u32 = 31; | |
| pub const ENDIAN_SET_EL2: u32 = 0; | |
| pub const ENDIAN_SET_EL1: u32 = 0; | |
| pub const ID_AA64PFR0_EL1_ELx_64BIT_ONLY: u32 = 1; | |
| pub const ID_AA64PFR0_EL1_ELx_32BIT_64BIT: u32 = 2; | |
| pub const ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MIN: u32 = 0; | |
| pub const ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MAX: u32 = 7; | |
| pub const ID_AA64MMFR0_EL1_TGRAN64_SUPPORTED_MIN: u32 = 0; | |
| pub const ID_AA64MMFR0_EL1_TGRAN64_SUPPORTED_MAX: u32 = 7; | |
| pub const ID_AA64MMFR0_EL1_TGRAN16_SUPPORTED_MIN: u32 = 1; | |
| pub const ID_AA64MMFR0_EL1_TGRAN16_SUPPORTED_MAX: u32 = 15; | |
| pub const ARM64_MIN_PARANGE_BITS: u32 = 32; | |
| pub const ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_DEFAULT: u32 = 0; | |
| pub const ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_NONE: u32 = 1; | |
| pub const ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_MIN: u32 = 2; | |
| pub const ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_MAX: u32 = 7; | |
| pub const ID_AA64MMFR0_EL1_TGRAN_SHIFT: u32 = 28; | |
| pub const ID_AA64MMFR0_EL1_TGRAN_SUPPORTED_MIN: u32 = 0; | |
| pub const ID_AA64MMFR0_EL1_TGRAN_SUPPORTED_MAX: u32 = 7; | |
| pub const ID_AA64MMFR0_EL1_TGRAN_2_SHIFT: u32 = 40; | |
| pub const SYS_GCR_EL1_EXCL_MASK: u32 = 65535; | |
| pub const KERNEL_GCR_EL1_EXCL: u32 = 65535; | |
| pub const SYS_RGSR_EL1_TAG_MASK: u32 = 15; | |
| pub const SYS_RGSR_EL1_SEED_SHIFT: u32 = 8; | |
| pub const SYS_RGSR_EL1_SEED_MASK: u32 = 65535; | |
| pub const SYS_TFSR_EL1_TF0_SHIFT: u32 = 0; | |
| pub const SYS_TFSR_EL1_TF1_SHIFT: u32 = 1; | |
| pub const TRFCR_ELx_TS_SHIFT: u32 = 5; | |
| pub const TRFCR_ELx_TS_MASK: u32 = 96; | |
| pub const TRFCR_ELx_TS_VIRTUAL: u32 = 32; | |
| pub const TRFCR_ELx_TS_GUEST_PHYSICAL: u32 = 64; | |
| pub const TRFCR_ELx_TS_PHYSICAL: u32 = 96; | |
| pub const ICH_MISR_EOI: u32 = 1; | |
| pub const ICH_MISR_U: u32 = 2; | |
| pub const ICH_LR_VIRTUAL_ID_MASK: u32 = 4294967295; | |
| pub const ICH_LR_EOI: u64 = 2199023255552; | |
| pub const ICH_LR_GROUP: u64 = 1152921504606846976; | |
| pub const ICH_LR_HW: u64 = 2305843009213693952; | |
| pub const ICH_LR_STATE: i64 = -4611686018427387904; | |
| pub const ICH_LR_PENDING_BIT: u64 = 4611686018427387904; | |
| pub const ICH_LR_ACTIVE_BIT: i64 = -9223372036854775808; | |
| pub const ICH_LR_PHYS_ID_SHIFT: u32 = 32; | |
| pub const ICH_LR_PHYS_ID_MASK: u64 = 4393751543808; | |
| pub const ICH_LR_PRIORITY_SHIFT: u32 = 48; | |
| pub const ICH_LR_PRIORITY_MASK: u64 = 71776119061217280; | |
| pub const ICH_HCR_EN: u32 = 1; | |
| pub const ICH_HCR_UIE: u32 = 2; | |
| pub const ICH_HCR_NPIE: u32 = 8; | |
| pub const ICH_HCR_TC: u32 = 1024; | |
| pub const ICH_HCR_TALL0: u32 = 2048; | |
| pub const ICH_HCR_TALL1: u32 = 4096; | |
| pub const ICH_HCR_TDIR: u32 = 16384; | |
| pub const ICH_HCR_EOIcount_SHIFT: u32 = 27; | |
| pub const ICH_HCR_EOIcount_MASK: u32 = 4160749568; | |
| pub const ICH_VMCR_ACK_CTL_SHIFT: u32 = 2; | |
| pub const ICH_VMCR_ACK_CTL_MASK: u32 = 4; | |
| pub const ICH_VMCR_FIQ_EN_SHIFT: u32 = 3; | |
| pub const ICH_VMCR_FIQ_EN_MASK: u32 = 8; | |
| pub const ICH_VMCR_CBPR_SHIFT: u32 = 4; | |
| pub const ICH_VMCR_CBPR_MASK: u32 = 16; | |
| pub const ICH_VMCR_EOIM_SHIFT: u32 = 9; | |
| pub const ICH_VMCR_EOIM_MASK: u32 = 512; | |
| pub const ICH_VMCR_BPR1_SHIFT: u32 = 18; | |
| pub const ICH_VMCR_BPR1_MASK: u32 = 1835008; | |
| pub const ICH_VMCR_BPR0_SHIFT: u32 = 21; | |
| pub const ICH_VMCR_BPR0_MASK: u32 = 14680064; | |
| pub const ICH_VMCR_PMR_SHIFT: u32 = 24; | |
| pub const ICH_VMCR_PMR_MASK: u32 = 4278190080; | |
| pub const ICH_VMCR_ENG0_SHIFT: u32 = 0; | |
| pub const ICH_VMCR_ENG0_MASK: u32 = 1; | |
| pub const ICH_VMCR_ENG1_SHIFT: u32 = 1; | |
| pub const ICH_VMCR_ENG1_MASK: u32 = 2; | |
| pub const ICH_VTR_PRI_BITS_SHIFT: u32 = 29; | |
| pub const ICH_VTR_PRI_BITS_MASK: u32 = 3758096384; | |
| pub const ICH_VTR_ID_BITS_SHIFT: u32 = 23; | |
| pub const ICH_VTR_ID_BITS_MASK: u32 = 58720256; | |
| pub const ICH_VTR_SEIS_SHIFT: u32 = 22; | |
| pub const ICH_VTR_SEIS_MASK: u32 = 4194304; | |
| pub const ICH_VTR_A3V_SHIFT: u32 = 21; | |
| pub const ICH_VTR_A3V_MASK: u32 = 2097152; | |
| pub const ICH_VTR_TDS_SHIFT: u32 = 19; | |
| pub const ICH_VTR_TDS_MASK: u32 = 524288; | |
| pub const PIE_NONE_O: u32 = 0; | |
| pub const PIE_R_O: u32 = 1; | |
| pub const PIE_X_O: u32 = 2; | |
| pub const PIE_RX_O: u32 = 3; | |
| pub const PIE_RW_O: u32 = 5; | |
| pub const PIE_RWnX_O: u32 = 6; | |
| pub const PIE_RWX_O: u32 = 7; | |
| pub const PIE_R: u32 = 8; | |
| pub const PIE_GCS: u32 = 9; | |
| pub const PIE_RX: u32 = 10; | |
| pub const PIE_RW: u32 = 12; | |
| pub const PIE_RWX: u32 = 14; | |
| pub const ARM64_FEATURE_FIELD_BITS: u32 = 4; | |
| pub const HWCAP_FP: u32 = 1; | |
| pub const HWCAP_ASIMD: u32 = 2; | |
| pub const HWCAP_EVTSTRM: u32 = 4; | |
| pub const HWCAP_AES: u32 = 8; | |
| pub const HWCAP_PMULL: u32 = 16; | |
| pub const HWCAP_SHA1: u32 = 32; | |
| pub const HWCAP_SHA2: u32 = 64; | |
| pub const HWCAP_CRC32: u32 = 128; | |
| pub const HWCAP_ATOMICS: u32 = 256; | |
| pub const HWCAP_FPHP: u32 = 512; | |
| pub const HWCAP_ASIMDHP: u32 = 1024; | |
| pub const HWCAP_CPUID: u32 = 2048; | |
| pub const HWCAP_ASIMDRDM: u32 = 4096; | |
| pub const HWCAP_JSCVT: u32 = 8192; | |
| pub const HWCAP_FCMA: u32 = 16384; | |
| pub const HWCAP_LRCPC: u32 = 32768; | |
| pub const HWCAP_DCPOP: u32 = 65536; | |
| pub const HWCAP_SHA3: u32 = 131072; | |
| pub const HWCAP_SM3: u32 = 262144; | |
| pub const HWCAP_SM4: u32 = 524288; | |
| pub const HWCAP_ASIMDDP: u32 = 1048576; | |
| pub const HWCAP_SHA512: u32 = 2097152; | |
| pub const HWCAP_SVE: u32 = 4194304; | |
| pub const HWCAP_ASIMDFHM: u32 = 8388608; | |
| pub const HWCAP_DIT: u32 = 16777216; | |
| pub const HWCAP_USCAT: u32 = 33554432; | |
| pub const HWCAP_ILRCPC: u32 = 67108864; | |
| pub const HWCAP_FLAGM: u32 = 134217728; | |
| pub const HWCAP_SSBS: u32 = 268435456; | |
| pub const HWCAP_SB: u32 = 536870912; | |
| pub const HWCAP_PACA: u32 = 1073741824; | |
| pub const HWCAP_PACG: u32 = 2147483648; | |
| pub const HWCAP2_DCPODP: u32 = 1; | |
| pub const HWCAP2_SVE2: u32 = 2; | |
| pub const HWCAP2_SVEAES: u32 = 4; | |
| pub const HWCAP2_SVEPMULL: u32 = 8; | |
| pub const HWCAP2_SVEBITPERM: u32 = 16; | |
| pub const HWCAP2_SVESHA3: u32 = 32; | |
| pub const HWCAP2_SVESM4: u32 = 64; | |
| pub const HWCAP2_FLAGM2: u32 = 128; | |
| pub const HWCAP2_FRINT: u32 = 256; | |
| pub const HWCAP2_SVEI8MM: u32 = 512; | |
| pub const HWCAP2_SVEF32MM: u32 = 1024; | |
| pub const HWCAP2_SVEF64MM: u32 = 2048; | |
| pub const HWCAP2_SVEBF16: u32 = 4096; | |
| pub const HWCAP2_I8MM: u32 = 8192; | |
| pub const HWCAP2_BF16: u32 = 16384; | |
| pub const HWCAP2_DGH: u32 = 32768; | |
| pub const HWCAP2_RNG: u32 = 65536; | |
| pub const HWCAP2_BTI: u32 = 131072; | |
| pub const HWCAP2_MTE: u32 = 262144; | |
| pub const HWCAP2_ECV: u32 = 524288; | |
| pub const HWCAP2_AFP: u32 = 1048576; | |
| pub const HWCAP2_RPRES: u32 = 2097152; | |
| pub const HWCAP2_MTE3: u32 = 4194304; | |
| pub const HWCAP2_SME: u32 = 8388608; | |
| pub const HWCAP2_SME_I16I64: u32 = 16777216; | |
| pub const HWCAP2_SME_F64F64: u32 = 33554432; | |
| pub const HWCAP2_SME_I8I32: u32 = 67108864; | |
| pub const HWCAP2_SME_F16F32: u32 = 134217728; | |
| pub const HWCAP2_SME_B16F32: u32 = 268435456; | |
| pub const HWCAP2_SME_F32F32: u32 = 536870912; | |
| pub const HWCAP2_SME_FA64: u32 = 1073741824; | |
| pub const HWCAP2_WFXT: u32 = 2147483648; | |
| pub const HWCAP2_EBF16: u64 = 4294967296; | |
| pub const HWCAP2_SVE_EBF16: u64 = 8589934592; | |
| pub const HWCAP2_CSSC: u64 = 17179869184; | |
| pub const HWCAP2_RPRFM: u64 = 34359738368; | |
| pub const HWCAP2_SVE2P1: u64 = 68719476736; | |
| pub const HWCAP2_SME2: u64 = 137438953472; | |
| pub const HWCAP2_SME2P1: u64 = 274877906944; | |
| pub const HWCAP2_SME_I16I32: u64 = 549755813888; | |
| pub const HWCAP2_SME_BI32I32: u64 = 1099511627776; | |
| pub const HWCAP2_SME_B16B16: u64 = 2199023255552; | |
| pub const HWCAP2_SME_F16F16: u64 = 4398046511104; | |
| pub const HWCAP2_MOPS: u64 = 8796093022208; | |
| pub const HWCAP2_HBC: u64 = 17592186044416; | |
| pub const HWCAP2_SVE_B16B16: u64 = 35184372088832; | |
| pub const HWCAP2_LRCPC3: u64 = 70368744177664; | |
| pub const HWCAP2_LSE128: u64 = 140737488355328; | |
| pub const COMPAT_HWCAP_SWP: u32 = 1; | |
| pub const COMPAT_HWCAP_HALF: u32 = 2; | |
| pub const COMPAT_HWCAP_THUMB: u32 = 4; | |
| pub const COMPAT_HWCAP_26BIT: u32 = 8; | |
| pub const COMPAT_HWCAP_FAST_MULT: u32 = 16; | |
| pub const COMPAT_HWCAP_FPA: u32 = 32; | |
| pub const COMPAT_HWCAP_VFP: u32 = 64; | |
| pub const COMPAT_HWCAP_EDSP: u32 = 128; | |
| pub const COMPAT_HWCAP_JAVA: u32 = 256; | |
| pub const COMPAT_HWCAP_IWMMXT: u32 = 512; | |
| pub const COMPAT_HWCAP_CRUNCH: u32 = 1024; | |
| pub const COMPAT_HWCAP_THUMBEE: u32 = 2048; | |
| pub const COMPAT_HWCAP_NEON: u32 = 4096; | |
| pub const COMPAT_HWCAP_VFPv3: u32 = 8192; | |
| pub const COMPAT_HWCAP_VFPV3D16: u32 = 16384; | |
| pub const COMPAT_HWCAP_TLS: u32 = 32768; | |
| pub const COMPAT_HWCAP_VFPv4: u32 = 65536; | |
| pub const COMPAT_HWCAP_IDIVA: u32 = 131072; | |
| pub const COMPAT_HWCAP_IDIVT: u32 = 262144; | |
| pub const COMPAT_HWCAP_IDIV: u32 = 393216; | |
| pub const COMPAT_HWCAP_VFPD32: u32 = 524288; | |
| pub const COMPAT_HWCAP_LPAE: u32 = 1048576; | |
| pub const COMPAT_HWCAP_EVTSTRM: u32 = 2097152; | |
| pub const COMPAT_HWCAP_FPHP: u32 = 4194304; | |
| pub const COMPAT_HWCAP_ASIMDHP: u32 = 8388608; | |
| pub const COMPAT_HWCAP_ASIMDDP: u32 = 16777216; | |
| pub const COMPAT_HWCAP_ASIMDFHM: u32 = 33554432; | |
| pub const COMPAT_HWCAP_ASIMDBF16: u32 = 67108864; | |
| pub const COMPAT_HWCAP_I8MM: u32 = 134217728; | |
| pub const COMPAT_HWCAP2_AES: u32 = 1; | |
| pub const COMPAT_HWCAP2_PMULL: u32 = 2; | |
| pub const COMPAT_HWCAP2_SHA1: u32 = 4; | |
| pub const COMPAT_HWCAP2_SHA2: u32 = 8; | |
| pub const COMPAT_HWCAP2_CRC32: u32 = 16; | |
| pub const COMPAT_HWCAP2_SB: u32 = 32; | |
| pub const COMPAT_HWCAP2_SSBS: u32 = 64; | |
| pub const MAX_CPU_FEATURES: u32 = 128; | |
| pub const ARM64_SW_FEATURE_OVERRIDE_NOKASLR: u32 = 0; | |
| pub const ARM64_SW_FEATURE_OVERRIDE_HVHE: u32 = 4; | |
| pub const STATIC_CALL_SITE_TAIL: u32 = 1; | |
| pub const STATIC_CALL_SITE_INIT: u32 = 2; | |
| pub const STATIC_CALL_SITE_FLAGS: u32 = 3; | |
| pub const STACK_MAGIC: u32 = 3735928559; | |
| pub const READ: u32 = 0; | |
| pub const WRITE: u32 = 1; | |
| pub const NR_CPUS: u32 = 256; | |
| pub const MIN_THREADS_LEFT_FOR_ROOT: u32 = 4; | |
| pub const PIDS_PER_CPU_DEFAULT: u32 = 1024; | |
| pub const PIDS_PER_CPU_MIN: u32 = 8; | |
| pub const BITMAP_MEM_ALIGNMENT: u32 = 8; | |
| pub const BITMAP_MEM_MASK: u32 = 7; | |
| pub const ___GFP_DMA: u32 = 1; | |
| pub const ___GFP_HIGHMEM: u32 = 2; | |
| pub const ___GFP_DMA32: u32 = 4; | |
| pub const ___GFP_MOVABLE: u32 = 8; | |
| pub const ___GFP_RECLAIMABLE: u32 = 16; | |
| pub const ___GFP_HIGH: u32 = 32; | |
| pub const ___GFP_IO: u32 = 64; | |
| pub const ___GFP_FS: u32 = 128; | |
| pub const ___GFP_ZERO: u32 = 256; | |
| pub const ___GFP_DIRECT_RECLAIM: u32 = 1024; | |
| pub const ___GFP_KSWAPD_RECLAIM: u32 = 2048; | |
| pub const ___GFP_WRITE: u32 = 4096; | |
| pub const ___GFP_NOWARN: u32 = 8192; | |
| pub const ___GFP_RETRY_MAYFAIL: u32 = 16384; | |
| pub const ___GFP_NOFAIL: u32 = 32768; | |
| pub const ___GFP_NORETRY: u32 = 65536; | |
| pub const ___GFP_MEMALLOC: u32 = 131072; | |
| pub const ___GFP_COMP: u32 = 262144; | |
| pub const ___GFP_NOMEMALLOC: u32 = 524288; | |
| pub const ___GFP_HARDWALL: u32 = 1048576; | |
| pub const ___GFP_THISNODE: u32 = 2097152; | |
| pub const ___GFP_ACCOUNT: u32 = 4194304; | |
| pub const ___GFP_ZEROTAGS: u32 = 8388608; | |
| pub const ___GFP_SKIP_ZERO: u32 = 0; | |
| pub const ___GFP_SKIP_KASAN: u32 = 0; | |
| pub const ___GFP_NOLOCKDEP: u32 = 67108864; | |
| pub const NODES_SHIFT: u32 = 0; | |
| pub const MAX_NUMNODES: u32 = 1; | |
| pub const NUMA_NO_NODE: i32 = -1; | |
| pub const NUMA_NO_MEMBLK: i32 = -1; | |
| pub const __SVE_VQ_BYTES: u32 = 16; | |
| pub const __SVE_VQ_MIN: u32 = 1; | |
| pub const __SVE_VQ_MAX: u32 = 512; | |
| pub const __SVE_VL_MIN: u32 = 16; | |
| pub const __SVE_VL_MAX: u32 = 8192; | |
| pub const __SVE_NUM_ZREGS: u32 = 32; | |
| pub const __SVE_NUM_PREGS: u32 = 16; | |
| pub const __SVE_ZREGS_OFFSET: u32 = 0; | |
| pub const PSR_MODE_EL0t: u32 = 0; | |
| pub const PSR_MODE_EL1t: u32 = 4; | |
| pub const PSR_MODE_EL1h: u32 = 5; | |
| pub const PSR_MODE_EL2t: u32 = 8; | |
| pub const PSR_MODE_EL2h: u32 = 9; | |
| pub const PSR_MODE_EL3t: u32 = 12; | |
| pub const PSR_MODE_EL3h: u32 = 13; | |
| pub const PSR_MODE_MASK: u32 = 15; | |
| pub const PSR_MODE32_BIT: u32 = 16; | |
| pub const PSR_F_BIT: u32 = 64; | |
| pub const PSR_I_BIT: u32 = 128; | |
| pub const PSR_A_BIT: u32 = 256; | |
| pub const PSR_D_BIT: u32 = 512; | |
| pub const PSR_BTYPE_MASK: u32 = 3072; | |
| pub const PSR_SSBS_BIT: u32 = 4096; | |
| pub const PSR_PAN_BIT: u32 = 4194304; | |
| pub const PSR_UAO_BIT: u32 = 8388608; | |
| pub const PSR_DIT_BIT: u32 = 16777216; | |
| pub const PSR_TCO_BIT: u32 = 33554432; | |
| pub const PSR_V_BIT: u32 = 268435456; | |
| pub const PSR_C_BIT: u32 = 536870912; | |
| pub const PSR_Z_BIT: u32 = 1073741824; | |
| pub const PSR_N_BIT: u32 = 2147483648; | |
| pub const PSR_BTYPE_SHIFT: u32 = 10; | |
| pub const PSR_f: u32 = 4278190080; | |
| pub const PSR_s: u32 = 16711680; | |
| pub const PSR_x: u32 = 65280; | |
| pub const PSR_c: u32 = 255; | |
| pub const PSR_BTYPE_NONE: u32 = 0; | |
| pub const PSR_BTYPE_JC: u32 = 1024; | |
| pub const PSR_BTYPE_C: u32 = 2048; | |
| pub const PSR_BTYPE_J: u32 = 3072; | |
| pub const PTRACE_SYSEMU: u32 = 31; | |
| pub const PTRACE_SYSEMU_SINGLESTEP: u32 = 32; | |
| pub const PTRACE_PEEKMTETAGS: u32 = 33; | |
| pub const PTRACE_POKEMTETAGS: u32 = 34; | |
| pub const SVE_PT_REGS_MASK: u32 = 1; | |
| pub const SVE_PT_REGS_FPSIMD: u32 = 0; | |
| pub const SVE_PT_REGS_SVE: u32 = 1; | |
| pub const SVE_PT_VL_INHERIT: u32 = 2; | |
| pub const SVE_PT_VL_ONEXEC: u32 = 4; | |
| pub const ZA_PT_VL_INHERIT: u32 = 2; | |
| pub const ZA_PT_VL_ONEXEC: u32 = 4; | |
| pub const CurrentEL_EL1: u32 = 4; | |
| pub const CurrentEL_EL2: u32 = 8; | |
| pub const INIT_PSTATE_EL1: u32 = 965; | |
| pub const INIT_PSTATE_EL2: u32 = 969; | |
| pub const GIC_PRIO_IRQON: u32 = 224; | |
| pub const __GIC_PRIO_IRQOFF: u32 = 96; | |
| pub const __GIC_PRIO_IRQOFF_NS: u32 = 160; | |
| pub const GIC_PRIO_PSR_I_SET: u32 = 16; | |
| pub const PSR_MODE_THREAD_BIT: u32 = 1; | |
| pub const PSR_IL_BIT: u32 = 1048576; | |
| pub const COMPAT_PTRACE_GETREGS: u32 = 12; | |
| pub const COMPAT_PTRACE_SETREGS: u32 = 13; | |
| pub const COMPAT_PTRACE_GET_THREAD_AREA: u32 = 22; | |
| pub const COMPAT_PTRACE_SET_SYSCALL: u32 = 23; | |
| pub const COMPAT_PTRACE_GETVFPREGS: u32 = 27; | |
| pub const COMPAT_PTRACE_SETVFPREGS: u32 = 28; | |
| pub const COMPAT_PTRACE_GETHBPREGS: u32 = 29; | |
| pub const COMPAT_PTRACE_SETHBPREGS: u32 = 30; | |
| pub const PSR_AA32_MODE_MASK: u32 = 31; | |
| pub const PSR_AA32_MODE_USR: u32 = 16; | |
| pub const PSR_AA32_MODE_FIQ: u32 = 17; | |
| pub const PSR_AA32_MODE_IRQ: u32 = 18; | |
| pub const PSR_AA32_MODE_SVC: u32 = 19; | |
| pub const PSR_AA32_MODE_ABT: u32 = 23; | |
| pub const PSR_AA32_MODE_HYP: u32 = 26; | |
| pub const PSR_AA32_MODE_UND: u32 = 27; | |
| pub const PSR_AA32_MODE_SYS: u32 = 31; | |
| pub const PSR_AA32_T_BIT: u32 = 32; | |
| pub const PSR_AA32_F_BIT: u32 = 64; | |
| pub const PSR_AA32_I_BIT: u32 = 128; | |
| pub const PSR_AA32_A_BIT: u32 = 256; | |
| pub const PSR_AA32_E_BIT: u32 = 512; | |
| pub const PSR_AA32_PAN_BIT: u32 = 4194304; | |
| pub const PSR_AA32_SSBS_BIT: u32 = 8388608; | |
| pub const PSR_AA32_DIT_BIT: u32 = 16777216; | |
| pub const PSR_AA32_Q_BIT: u32 = 134217728; | |
| pub const PSR_AA32_V_BIT: u32 = 268435456; | |
| pub const PSR_AA32_C_BIT: u32 = 536870912; | |
| pub const PSR_AA32_Z_BIT: u32 = 1073741824; | |
| pub const PSR_AA32_N_BIT: u32 = 2147483648; | |
| pub const PSR_AA32_IT_MASK: u32 = 100727808; | |
| pub const PSR_AA32_GE_MASK: u32 = 983040; | |
| pub const PSR_AA32_ENDSTATE: u32 = 0; | |
| pub const COMPAT_PSR_DIT_BIT: u32 = 2097152; | |
| pub const COMPAT_PT_TEXT_ADDR: u32 = 65536; | |
| pub const COMPAT_PT_DATA_ADDR: u32 = 65540; | |
| pub const COMPAT_PT_TEXT_END_ADDR: u32 = 65544; | |
| pub const NO_SYSCALL: i32 = -1; | |
| pub const COMPAT_USER_SZ: u32 = 296; | |
| pub const NR_REG_ARGUMENTS: u32 = 8; | |
| pub const PER_CPU_SHARED_ALIGNED_SECTION: &[u8; 1usize] = b"\0"; | |
| pub const PER_CPU_ALIGNED_SECTION: &[u8; 1usize] = b"\0"; | |
| pub const PER_CPU_FIRST_SECTION: &[u8; 8usize] = b"..first\0"; | |
| pub const PER_CPU_BASE_SECTION: &[u8; 14usize] = b".data..percpu\0"; | |
| pub const CPU_STUCK_REASON_SHIFT: u32 = 8; | |
| pub const CPU_MMU_OFF: i32 = -1; | |
| pub const CPU_BOOT_SUCCESS: u32 = 0; | |
| pub const CPU_KILL_ME: u32 = 1; | |
| pub const CPU_STUCK_IN_KERNEL: u32 = 2; | |
| pub const CPU_PANIC_KERNEL: u32 = 3; | |
| pub const L1_CACHE_SHIFT: u32 = 6; | |
| pub const L1_CACHE_BYTES: u32 = 64; | |
| pub const CLIDR_LOUU_SHIFT: u32 = 27; | |
| pub const CLIDR_LOC_SHIFT: u32 = 24; | |
| pub const CLIDR_LOUIS_SHIFT: u32 = 21; | |
| pub const ARCH_DMA_MINALIGN: u32 = 128; | |
| pub const ARCH_KMALLOC_MINALIGN: u32 = 8; | |
| pub const MTE_TAG_SHIFT: u32 = 56; | |
| pub const MTE_TAG_SIZE: u32 = 4; | |
| pub const ICACHEF_ALIASING: u32 = 0; | |
| pub const ICACHEF_VPIPT: u32 = 1; | |
| pub const SMP_CACHE_BYTES: u32 = 64; | |
| pub const INTERNODE_CACHE_SHIFT: u32 = 6; | |
| pub const MAX_LOCKDEP_KEYS_BITS: u32 = 13; | |
| pub const MAX_LOCKDEP_KEYS: u32 = 8192; | |
| pub const INITIAL_CHAIN_KEY: i32 = -1; | |
| pub const LOCKDEP_RECURSION_BITS: u32 = 16; | |
| pub const LOCKDEP_OFF: u32 = 65536; | |
| pub const LOCKDEP_RECURSION_MASK: u32 = 65535; | |
| pub const LOCK_STATE_UNKNOWN: i32 = -1; | |
| pub const LOCK_STATE_NOT_HELD: u32 = 0; | |
| pub const LOCK_STATE_HELD: u32 = 1; | |
| pub const force_read_lock_recursive: u32 = 0; | |
| pub const SINGLE_DEPTH_NESTING: u32 = 1; | |
| pub const LOCK_SECTION_END: &[u8; 12usize] = b".previous\n\t\0"; | |
| pub const RWLOCK_MAGIC: u32 = 3736018669; | |
| pub const NET_IP_ALIGN: u32 = 0; | |
| pub const MTE_CTRL_GCR_USER_EXCL_SHIFT: u32 = 0; | |
| pub const MTE_CTRL_GCR_USER_EXCL_MASK: u32 = 65535; | |
| pub const MTE_CTRL_TCF_SYNC: u32 = 65536; | |
| pub const MTE_CTRL_TCF_ASYNC: u32 = 131072; | |
| pub const MTE_CTRL_TCF_ASYMM: u32 = 262144; | |
| pub const HVC_SET_VECTORS: u32 = 0; | |
| pub const HVC_SOFT_RESTART: u32 = 1; | |
| pub const HVC_RESET_VECTORS: u32 = 2; | |
| pub const HVC_FINALISE_EL2: u32 = 3; | |
| pub const HVC_STUB_HCALL_NR: u32 = 4; | |
| pub const HVC_STUB_ERR: u32 = 195938833; | |
| pub const BOOT_CPU_MODE_EL1: u32 = 3601; | |
| pub const BOOT_CPU_MODE_EL2: u32 = 3602; | |
| pub const ARM64_VECTOR_TABLE_LEN: u32 = 2048; | |
| pub const AARCH64_BREAKPOINT_EL1: u32 = 1; | |
| pub const AARCH64_BREAKPOINT_EL0: u32 = 2; | |
| pub const DBG_HMC_HYP: u32 = 8192; | |
| pub const ARM_BREAKPOINT_EXECUTE: u32 = 0; | |
| pub const ARM_BREAKPOINT_LOAD: u32 = 1; | |
| pub const ARM_BREAKPOINT_STORE: u32 = 2; | |
| pub const AARCH64_ESR_ACCESS_MASK: u32 = 64; | |
| pub const ARM_BREAKPOINT_LEN_1: u32 = 1; | |
| pub const ARM_BREAKPOINT_LEN_2: u32 = 3; | |
| pub const ARM_BREAKPOINT_LEN_3: u32 = 7; | |
| pub const ARM_BREAKPOINT_LEN_4: u32 = 15; | |
| pub const ARM_BREAKPOINT_LEN_5: u32 = 31; | |
| pub const ARM_BREAKPOINT_LEN_6: u32 = 63; | |
| pub const ARM_BREAKPOINT_LEN_7: u32 = 127; | |
| pub const ARM_BREAKPOINT_LEN_8: u32 = 255; | |
| pub const ARM_KERNEL_STEP_NONE: u32 = 0; | |
| pub const ARM_KERNEL_STEP_ACTIVE: u32 = 1; | |
| pub const ARM_KERNEL_STEP_SUSPEND: u32 = 2; | |
| pub const ARM_MAX_BRP: u32 = 16; | |
| pub const ARM_MAX_WRP: u32 = 16; | |
| pub const AARCH64_DBG_REG_BVR: u32 = 0; | |
| pub const AARCH64_DBG_REG_BCR: u32 = 16; | |
| pub const AARCH64_DBG_REG_WVR: u32 = 32; | |
| pub const AARCH64_DBG_REG_WCR: u32 = 48; | |
| pub const __PAGETABLE_P4D_FOLDED: u32 = 1; | |
| pub const PTRS_PER_P4D: u32 = 1; | |
| pub const __PAGETABLE_PUD_FOLDED: u32 = 1; | |
| pub const PTRS_PER_PUD: u32 = 1; | |
| pub const PTRS_PER_PTE: u32 = 512; | |
| pub const PTRS_PER_PMD: u32 = 512; | |
| pub const CONT_PTE_SHIFT: u32 = 16; | |
| pub const CONT_PTES: u32 = 16; | |
| pub const PTE_PI_IDX_0: u32 = 6; | |
| pub const PTE_PI_IDX_1: u32 = 51; | |
| pub const PTE_PI_IDX_2: u32 = 53; | |
| pub const PTE_PI_IDX_3: u32 = 54; | |
| pub const PHYS_MASK_SHIFT: u32 = 48; | |
| pub const TCR_T0SZ_OFFSET: u32 = 0; | |
| pub const TCR_T1SZ_OFFSET: u32 = 16; | |
| pub const TCR_TxSZ_WIDTH: u32 = 6; | |
| pub const TCR_EPD0_SHIFT: u32 = 7; | |
| pub const TCR_IRGN0_SHIFT: u32 = 8; | |
| pub const TCR_EPD1_SHIFT: u32 = 23; | |
| pub const TCR_IRGN1_SHIFT: u32 = 24; | |
| pub const TCR_ORGN0_SHIFT: u32 = 10; | |
| pub const TCR_ORGN1_SHIFT: u32 = 26; | |
| pub const TCR_SH0_SHIFT: u32 = 12; | |
| pub const TCR_SH1_SHIFT: u32 = 28; | |
| pub const TCR_TG0_SHIFT: u32 = 14; | |
| pub const TCR_TG1_SHIFT: u32 = 30; | |
| pub const TCR_IPS_SHIFT: u32 = 32; | |
| pub const PR_SET_PDEATHSIG: u32 = 1; | |
| pub const PR_GET_PDEATHSIG: u32 = 2; | |
| pub const PR_GET_DUMPABLE: u32 = 3; | |
| pub const PR_SET_DUMPABLE: u32 = 4; | |
| pub const PR_GET_UNALIGN: u32 = 5; | |
| pub const PR_SET_UNALIGN: u32 = 6; | |
| pub const PR_UNALIGN_NOPRINT: u32 = 1; | |
| pub const PR_UNALIGN_SIGBUS: u32 = 2; | |
| pub const PR_GET_KEEPCAPS: u32 = 7; | |
| pub const PR_SET_KEEPCAPS: u32 = 8; | |
| pub const PR_GET_FPEMU: u32 = 9; | |
| pub const PR_SET_FPEMU: u32 = 10; | |
| pub const PR_FPEMU_NOPRINT: u32 = 1; | |
| pub const PR_FPEMU_SIGFPE: u32 = 2; | |
| pub const PR_GET_FPEXC: u32 = 11; | |
| pub const PR_SET_FPEXC: u32 = 12; | |
| pub const PR_FP_EXC_SW_ENABLE: u32 = 128; | |
| pub const PR_FP_EXC_DIV: u32 = 65536; | |
| pub const PR_FP_EXC_OVF: u32 = 131072; | |
| pub const PR_FP_EXC_UND: u32 = 262144; | |
| pub const PR_FP_EXC_RES: u32 = 524288; | |
| pub const PR_FP_EXC_INV: u32 = 1048576; | |
| pub const PR_FP_EXC_DISABLED: u32 = 0; | |
| pub const PR_FP_EXC_NONRECOV: u32 = 1; | |
| pub const PR_FP_EXC_ASYNC: u32 = 2; | |
| pub const PR_FP_EXC_PRECISE: u32 = 3; | |
| pub const PR_GET_TIMING: u32 = 13; | |
| pub const PR_SET_TIMING: u32 = 14; | |
| pub const PR_TIMING_STATISTICAL: u32 = 0; | |
| pub const PR_TIMING_TIMESTAMP: u32 = 1; | |
| pub const PR_SET_NAME: u32 = 15; | |
| pub const PR_GET_NAME: u32 = 16; | |
| pub const PR_GET_ENDIAN: u32 = 19; | |
| pub const PR_SET_ENDIAN: u32 = 20; | |
| pub const PR_ENDIAN_BIG: u32 = 0; | |
| pub const PR_ENDIAN_LITTLE: u32 = 1; | |
| pub const PR_ENDIAN_PPC_LITTLE: u32 = 2; | |
| pub const PR_GET_SECCOMP: u32 = 21; | |
| pub const PR_SET_SECCOMP: u32 = 22; | |
| pub const PR_CAPBSET_READ: u32 = 23; | |
| pub const PR_CAPBSET_DROP: u32 = 24; | |
| pub const PR_GET_TSC: u32 = 25; | |
| pub const PR_SET_TSC: u32 = 26; | |
| pub const PR_TSC_ENABLE: u32 = 1; | |
| pub const PR_TSC_SIGSEGV: u32 = 2; | |
| pub const PR_GET_SECUREBITS: u32 = 27; | |
| pub const PR_SET_SECUREBITS: u32 = 28; | |
| pub const PR_SET_TIMERSLACK: u32 = 29; | |
| pub const PR_GET_TIMERSLACK: u32 = 30; | |
| pub const PR_TASK_PERF_EVENTS_DISABLE: u32 = 31; | |
| pub const PR_TASK_PERF_EVENTS_ENABLE: u32 = 32; | |
| pub const PR_MCE_KILL: u32 = 33; | |
| pub const PR_MCE_KILL_CLEAR: u32 = 0; | |
| pub const PR_MCE_KILL_SET: u32 = 1; | |
| pub const PR_MCE_KILL_LATE: u32 = 0; | |
| pub const PR_MCE_KILL_EARLY: u32 = 1; | |
| pub const PR_MCE_KILL_DEFAULT: u32 = 2; | |
| pub const PR_MCE_KILL_GET: u32 = 34; | |
| pub const PR_SET_MM: u32 = 35; | |
| pub const PR_SET_MM_START_CODE: u32 = 1; | |
| pub const PR_SET_MM_END_CODE: u32 = 2; | |
| pub const PR_SET_MM_START_DATA: u32 = 3; | |
| pub const PR_SET_MM_END_DATA: u32 = 4; | |
| pub const PR_SET_MM_START_STACK: u32 = 5; | |
| pub const PR_SET_MM_START_BRK: u32 = 6; | |
| pub const PR_SET_MM_BRK: u32 = 7; | |
| pub const PR_SET_MM_ARG_START: u32 = 8; | |
| pub const PR_SET_MM_ARG_END: u32 = 9; | |
| pub const PR_SET_MM_ENV_START: u32 = 10; | |
| pub const PR_SET_MM_ENV_END: u32 = 11; | |
| pub const PR_SET_MM_AUXV: u32 = 12; | |
| pub const PR_SET_MM_EXE_FILE: u32 = 13; | |
| pub const PR_SET_MM_MAP: u32 = 14; | |
| pub const PR_SET_MM_MAP_SIZE: u32 = 15; | |
| pub const PR_SET_PTRACER: u32 = 1499557217; | |
| pub const PR_SET_CHILD_SUBREAPER: u32 = 36; | |
| pub const PR_GET_CHILD_SUBREAPER: u32 = 37; | |
| pub const PR_SET_NO_NEW_PRIVS: u32 = 38; | |
| pub const PR_GET_NO_NEW_PRIVS: u32 = 39; | |
| pub const PR_GET_TID_ADDRESS: u32 = 40; | |
| pub const PR_SET_THP_DISABLE: u32 = 41; | |
| pub const PR_GET_THP_DISABLE: u32 = 42; | |
| pub const PR_MPX_ENABLE_MANAGEMENT: u32 = 43; | |
| pub const PR_MPX_DISABLE_MANAGEMENT: u32 = 44; | |
| pub const PR_SET_FP_MODE: u32 = 45; | |
| pub const PR_GET_FP_MODE: u32 = 46; | |
| pub const PR_FP_MODE_FR: u32 = 1; | |
| pub const PR_FP_MODE_FRE: u32 = 2; | |
| pub const PR_CAP_AMBIENT: u32 = 47; | |
| pub const PR_CAP_AMBIENT_IS_SET: u32 = 1; | |
| pub const PR_CAP_AMBIENT_RAISE: u32 = 2; | |
| pub const PR_CAP_AMBIENT_LOWER: u32 = 3; | |
| pub const PR_CAP_AMBIENT_CLEAR_ALL: u32 = 4; | |
| pub const PR_SVE_SET_VL: u32 = 50; | |
| pub const PR_SVE_SET_VL_ONEXEC: u32 = 262144; | |
| pub const PR_SVE_GET_VL: u32 = 51; | |
| pub const PR_SVE_VL_LEN_MASK: u32 = 65535; | |
| pub const PR_SVE_VL_INHERIT: u32 = 131072; | |
| pub const PR_GET_SPECULATION_CTRL: u32 = 52; | |
| pub const PR_SET_SPECULATION_CTRL: u32 = 53; | |
| pub const PR_SPEC_STORE_BYPASS: u32 = 0; | |
| pub const PR_SPEC_INDIRECT_BRANCH: u32 = 1; | |
| pub const PR_SPEC_L1D_FLUSH: u32 = 2; | |
| pub const PR_SPEC_NOT_AFFECTED: u32 = 0; | |
| pub const PR_SPEC_PRCTL: u32 = 1; | |
| pub const PR_SPEC_ENABLE: u32 = 2; | |
| pub const PR_SPEC_DISABLE: u32 = 4; | |
| pub const PR_SPEC_FORCE_DISABLE: u32 = 8; | |
| pub const PR_SPEC_DISABLE_NOEXEC: u32 = 16; | |
| pub const PR_PAC_RESET_KEYS: u32 = 54; | |
| pub const PR_PAC_APIAKEY: u32 = 1; | |
| pub const PR_PAC_APIBKEY: u32 = 2; | |
| pub const PR_PAC_APDAKEY: u32 = 4; | |
| pub const PR_PAC_APDBKEY: u32 = 8; | |
| pub const PR_PAC_APGAKEY: u32 = 16; | |
| pub const PR_SET_TAGGED_ADDR_CTRL: u32 = 55; | |
| pub const PR_GET_TAGGED_ADDR_CTRL: u32 = 56; | |
| pub const PR_TAGGED_ADDR_ENABLE: u32 = 1; | |
| pub const PR_MTE_TCF_NONE: u32 = 0; | |
| pub const PR_MTE_TCF_SYNC: u32 = 2; | |
| pub const PR_MTE_TCF_ASYNC: u32 = 4; | |
| pub const PR_MTE_TCF_MASK: u32 = 6; | |
| pub const PR_MTE_TAG_SHIFT: u32 = 3; | |
| pub const PR_MTE_TAG_MASK: u32 = 524280; | |
| pub const PR_MTE_TCF_SHIFT: u32 = 1; | |
| pub const PR_SET_IO_FLUSHER: u32 = 57; | |
| pub const PR_GET_IO_FLUSHER: u32 = 58; | |
| pub const PR_SET_SYSCALL_USER_DISPATCH: u32 = 59; | |
| pub const PR_SYS_DISPATCH_OFF: u32 = 0; | |
| pub const PR_SYS_DISPATCH_ON: u32 = 1; | |
| pub const SYSCALL_DISPATCH_FILTER_ALLOW: u32 = 0; | |
| pub const SYSCALL_DISPATCH_FILTER_BLOCK: u32 = 1; | |
| pub const PR_PAC_SET_ENABLED_KEYS: u32 = 60; | |
| pub const PR_PAC_GET_ENABLED_KEYS: u32 = 61; | |
| pub const PR_SCHED_CORE: u32 = 62; | |
| pub const PR_SCHED_CORE_GET: u32 = 0; | |
| pub const PR_SCHED_CORE_CREATE: u32 = 1; | |
| pub const PR_SCHED_CORE_SHARE_TO: u32 = 2; | |
| pub const PR_SCHED_CORE_SHARE_FROM: u32 = 3; | |
| pub const PR_SCHED_CORE_MAX: u32 = 4; | |
| pub const PR_SCHED_CORE_SCOPE_THREAD: u32 = 0; | |
| pub const PR_SCHED_CORE_SCOPE_THREAD_GROUP: u32 = 1; | |
| pub const PR_SCHED_CORE_SCOPE_PROCESS_GROUP: u32 = 2; | |
| pub const PR_SME_SET_VL: u32 = 63; | |
| pub const PR_SME_SET_VL_ONEXEC: u32 = 262144; | |
| pub const PR_SME_GET_VL: u32 = 64; | |
| pub const PR_SME_VL_LEN_MASK: u32 = 65535; | |
| pub const PR_SME_VL_INHERIT: u32 = 131072; | |
| pub const PR_SET_MDWE: u32 = 65; | |
| pub const PR_MDWE_REFUSE_EXEC_GAIN: u32 = 1; | |
| pub const PR_MDWE_NO_INHERIT: u32 = 2; | |
| pub const PR_GET_MDWE: u32 = 66; | |
| pub const PR_SET_VMA: u32 = 1398164801; | |
| pub const PR_SET_VMA_ANON_NAME: u32 = 0; | |
| pub const PR_GET_AUXV: u32 = 1096112214; | |
| pub const PR_SET_MEMORY_MERGE: u32 = 67; | |
| pub const PR_GET_MEMORY_MERGE: u32 = 68; | |
| pub const PR_RISCV_V_SET_CONTROL: u32 = 69; | |
| pub const PR_RISCV_V_GET_CONTROL: u32 = 70; | |
| pub const PR_RISCV_V_VSTATE_CTRL_DEFAULT: u32 = 0; | |
| pub const PR_RISCV_V_VSTATE_CTRL_OFF: u32 = 1; | |
| pub const PR_RISCV_V_VSTATE_CTRL_ON: u32 = 2; | |
| pub const PR_RISCV_V_VSTATE_CTRL_INHERIT: u32 = 16; | |
| pub const PR_RISCV_V_VSTATE_CTRL_CUR_MASK: u32 = 3; | |
| pub const PR_RISCV_V_VSTATE_CTRL_NEXT_MASK: u32 = 12; | |
| pub const PR_RISCV_V_VSTATE_CTRL_MASK: u32 = 31; | |
| pub const _IOC_NRBITS: u32 = 8; | |
| pub const _IOC_TYPEBITS: u32 = 8; | |
| pub const _IOC_SIZEBITS: u32 = 14; | |
| pub const _IOC_DIRBITS: u32 = 2; | |
| pub const _IOC_NRMASK: u32 = 255; | |
| pub const _IOC_TYPEMASK: u32 = 255; | |
| pub const _IOC_SIZEMASK: u32 = 16383; | |
| pub const _IOC_DIRMASK: u32 = 3; | |
| pub const _IOC_NRSHIFT: u32 = 0; | |
| pub const _IOC_TYPESHIFT: u32 = 8; | |
| pub const _IOC_SIZESHIFT: u32 = 16; | |
| pub const _IOC_DIRSHIFT: u32 = 30; | |
| pub const _IOC_NONE: u32 = 0; | |
| pub const _IOC_WRITE: u32 = 1; | |
| pub const _IOC_READ: u32 = 2; | |
| pub const IOC_IN: u32 = 1073741824; | |
| pub const IOC_OUT: u32 = 2147483648; | |
| pub const IOC_INOUT: u32 = 3221225472; | |
| pub const IOCSIZE_MASK: u32 = 1073676288; | |
| pub const IOCSIZE_SHIFT: u32 = 16; | |
| pub const GRND_NONBLOCK: u32 = 1; | |
| pub const GRND_RANDOM: u32 = 2; | |
| pub const GRND_INSECURE: u32 = 4; | |
| pub const PERCPU_MODULE_RESERVE: u32 = 0; | |
| pub const PCPU_MIN_ALLOC_SHIFT: u32 = 2; | |
| pub const PCPU_MIN_ALLOC_SIZE: u32 = 4; | |
| pub const PERCPU_DYNAMIC_SIZE_SHIFT: u32 = 10; | |
| pub const PERCPU_DYNAMIC_EARLY_SIZE: u32 = 20480; | |
| pub const PERCPU_DYNAMIC_RESERVE: u32 = 28672; | |
| pub const PR_PAC_ENABLED_KEYS_MASK: u32 = 15; | |
| pub const BP_HARDEN_EL2_SLOTS: u32 = 4; | |
| pub const __BP_HARDEN_HYP_VECS_SZ: u32 = 6144; | |
| pub const FPSIMD_MAGIC: u32 = 1179680769; | |
| pub const ESR_MAGIC: u32 = 1163088385; | |
| pub const EXTRA_MAGIC: u32 = 1163416577; | |
| pub const SVE_MAGIC: u32 = 1398162689; | |
| pub const SVE_SIG_FLAG_SM: u32 = 1; | |
| pub const TPIDR2_MAGIC: u32 = 1414547714; | |
| pub const ZA_MAGIC: u32 = 1412850501; | |
| pub const ZT_MAGIC: u32 = 1515474433; | |
| pub const SVE_VQ_BYTES: u32 = 16; | |
| pub const SVE_VQ_MIN: u32 = 1; | |
| pub const SVE_VQ_MAX: u32 = 512; | |
| pub const SVE_VL_MIN: u32 = 16; | |
| pub const SVE_VL_MAX: u32 = 8192; | |
| pub const SVE_NUM_ZREGS: u32 = 32; | |
| pub const SVE_NUM_PREGS: u32 = 16; | |
| pub const ZT_SIG_REG_SIZE: u32 = 512; | |
| pub const ZT_SIG_REG_BYTES: u32 = 64; | |
| pub const SME_VQ_MAX: u32 = 16; | |
| pub const VL_ARCH_MAX: u32 = 256; | |
| pub const _QW_WAITING: u32 = 256; | |
| pub const _QW_LOCKED: u32 = 255; | |
| pub const _QW_WMASK: u32 = 511; | |
| pub const _QR_SHIFT: u32 = 9; | |
| pub const _QR_BIAS: u32 = 512; | |
| pub const STAT_HAVE_NSEC: u32 = 1; | |
| pub const S_IFMT: u32 = 61440; | |
| pub const S_IFSOCK: u32 = 49152; | |
| pub const S_IFLNK: u32 = 40960; | |
| pub const S_IFREG: u32 = 32768; | |
| pub const S_IFBLK: u32 = 24576; | |
| pub const S_IFDIR: u32 = 16384; | |
| pub const S_IFCHR: u32 = 8192; | |
| pub const S_IFIFO: u32 = 4096; | |
| pub const S_ISUID: u32 = 2048; | |
| pub const S_ISGID: u32 = 1024; | |
| pub const S_ISVTX: u32 = 512; | |
| pub const S_IRWXU: u32 = 448; | |
| pub const S_IRUSR: u32 = 256; | |
| pub const S_IWUSR: u32 = 128; | |
| pub const S_IXUSR: u32 = 64; | |
| pub const S_IRWXG: u32 = 56; | |
| pub const S_IRGRP: u32 = 32; | |
| pub const S_IWGRP: u32 = 16; | |
| pub const S_IXGRP: u32 = 8; | |
| pub const S_IRWXO: u32 = 7; | |
| pub const S_IROTH: u32 = 4; | |
| pub const S_IWOTH: u32 = 2; | |
| pub const S_IXOTH: u32 = 1; | |
| pub const STATX_TYPE: u32 = 1; | |
| pub const STATX_MODE: u32 = 2; | |
| pub const STATX_NLINK: u32 = 4; | |
| pub const STATX_UID: u32 = 8; | |
| pub const STATX_GID: u32 = 16; | |
| pub const STATX_ATIME: u32 = 32; | |
| pub const STATX_MTIME: u32 = 64; | |
| pub const STATX_CTIME: u32 = 128; | |
| pub const STATX_INO: u32 = 256; | |
| pub const STATX_SIZE: u32 = 512; | |
| pub const STATX_BLOCKS: u32 = 1024; | |
| pub const STATX_BASIC_STATS: u32 = 2047; | |
| pub const STATX_BTIME: u32 = 2048; | |
| pub const STATX_MNT_ID: u32 = 4096; | |
| pub const STATX_DIOALIGN: u32 = 8192; | |
| pub const STATX__RESERVED: u32 = 2147483648; | |
| pub const STATX_ATTR_COMPRESSED: u32 = 4; | |
| pub const STATX_ATTR_IMMUTABLE: u32 = 16; | |
| pub const STATX_ATTR_APPEND: u32 = 32; | |
| pub const STATX_ATTR_NODUMP: u32 = 64; | |
| pub const STATX_ATTR_ENCRYPTED: u32 = 2048; | |
| pub const STATX_ATTR_AUTOMOUNT: u32 = 4096; | |
| pub const STATX_ATTR_MOUNT_ROOT: u32 = 8192; | |
| pub const STATX_ATTR_VERITY: u32 = 1048576; | |
| pub const STATX_ATTR_DAX: u32 = 2097152; | |
| pub const S_IRWXUGO: u32 = 511; | |
| pub const S_IALLUGO: u32 = 4095; | |
| pub const S_IRUGO: u32 = 292; | |
| pub const S_IWUGO: u32 = 146; | |
| pub const S_IXUGO: u32 = 73; | |
| pub const UTIME_NOW: u32 = 1073741823; | |
| pub const UTIME_OMIT: u32 = 1073741822; | |
| pub const NTP_API: u32 = 4; | |
| pub const ADJ_OFFSET: u32 = 1; | |
| pub const ADJ_FREQUENCY: u32 = 2; | |
| pub const ADJ_MAXERROR: u32 = 4; | |
| pub const ADJ_ESTERROR: u32 = 8; | |
| pub const ADJ_STATUS: u32 = 16; | |
| pub const ADJ_TIMECONST: u32 = 32; | |
| pub const ADJ_TAI: u32 = 128; | |
| pub const ADJ_SETOFFSET: u32 = 256; | |
| pub const ADJ_MICRO: u32 = 4096; | |
| pub const ADJ_NANO: u32 = 8192; | |
| pub const ADJ_TICK: u32 = 16384; | |
| pub const MOD_OFFSET: u32 = 1; | |
| pub const MOD_FREQUENCY: u32 = 2; | |
| pub const MOD_MAXERROR: u32 = 4; | |
| pub const MOD_ESTERROR: u32 = 8; | |
| pub const MOD_STATUS: u32 = 16; | |
| pub const MOD_TIMECONST: u32 = 32; | |
| pub const MOD_TAI: u32 = 128; | |
| pub const MOD_MICRO: u32 = 4096; | |
| pub const MOD_NANO: u32 = 8192; | |
| pub const STA_PLL: u32 = 1; | |
| pub const STA_PPSFREQ: u32 = 2; | |
| pub const STA_PPSTIME: u32 = 4; | |
| pub const STA_FLL: u32 = 8; | |
| pub const STA_INS: u32 = 16; | |
| pub const STA_DEL: u32 = 32; | |
| pub const STA_UNSYNC: u32 = 64; | |
| pub const STA_FREQHOLD: u32 = 128; | |
| pub const STA_PPSSIGNAL: u32 = 256; | |
| pub const STA_PPSJITTER: u32 = 512; | |
| pub const STA_PPSWANDER: u32 = 1024; | |
| pub const STA_PPSERROR: u32 = 2048; | |
| pub const STA_CLOCKERR: u32 = 4096; | |
| pub const STA_NANO: u32 = 8192; | |
| pub const STA_MODE: u32 = 16384; | |
| pub const STA_CLK: u32 = 32768; | |
| pub const STA_RONLY: u32 = 65280; | |
| pub const TIME_OK: u32 = 0; | |
| pub const TIME_INS: u32 = 1; | |
| pub const TIME_DEL: u32 = 2; | |
| pub const TIME_OOP: u32 = 3; | |
| pub const TIME_WAIT: u32 = 4; | |
| pub const TIME_ERROR: u32 = 5; | |
| pub const TIME_BAD: u32 = 5; | |
| pub const ADJ_ADJTIME: u32 = 32768; | |
| pub const ADJ_OFFSET_SINGLESHOT: u32 = 1; | |
| pub const ADJ_OFFSET_READONLY: u32 = 8192; | |
| pub const ARCH_TIMER_CTRL_ENABLE: u32 = 1; | |
| pub const ARCH_TIMER_CTRL_IT_MASK: u32 = 2; | |
| pub const ARCH_TIMER_CTRL_IT_STAT: u32 = 4; | |
| pub const CNTHCTL_EL1PCTEN: u32 = 1; | |
| pub const CNTHCTL_EL1PCEN: u32 = 2; | |
| pub const CNTHCTL_EVNTEN: u32 = 4; | |
| pub const CNTHCTL_EVNTDIR: u32 = 8; | |
| pub const CNTHCTL_EVNTI: u32 = 240; | |
| pub const CNTHCTL_ECV: u32 = 4096; | |
| pub const ARCH_TIMER_PHYS_ACCESS: u32 = 0; | |
| pub const ARCH_TIMER_VIRT_ACCESS: u32 = 1; | |
| pub const ARCH_TIMER_MEM_PHYS_ACCESS: u32 = 2; | |
| pub const ARCH_TIMER_MEM_VIRT_ACCESS: u32 = 3; | |
| pub const ARCH_TIMER_MEM_MAX_FRAMES: u32 = 8; | |
| pub const ARCH_TIMER_USR_PCT_ACCESS_EN: u32 = 1; | |
| pub const ARCH_TIMER_USR_VCT_ACCESS_EN: u32 = 2; | |
| pub const ARCH_TIMER_VIRT_EVT_EN: u32 = 4; | |
| pub const ARCH_TIMER_EVT_TRIGGER_SHIFT: u32 = 4; | |
| pub const ARCH_TIMER_EVT_TRIGGER_MASK: u32 = 240; | |
| pub const ARCH_TIMER_USR_VT_ACCESS_EN: u32 = 256; | |
| pub const ARCH_TIMER_USR_PT_ACCESS_EN: u32 = 512; | |
| pub const ARCH_TIMER_EVT_INTERVAL_SCALE: u32 = 131072; | |
| pub const ARCH_TIMER_EVT_STREAM_PERIOD_US: u32 = 100; | |
| pub const ARCH_TIMER_EVT_STREAM_FREQ: u32 = 10000; | |
| pub const SHIFT_PLL: u32 = 2; | |
| pub const SHIFT_FLL: u32 = 2; | |
| pub const MAXTC: u32 = 10; | |
| pub const SHIFT_USEC: u32 = 16; | |
| pub const PPM_SCALE_INV_SHIFT: u32 = 19; | |
| pub const MAXPHASE: u32 = 500000000; | |
| pub const MAXFREQ: u32 = 500000; | |
| pub const MINSEC: u32 = 256; | |
| pub const MAXSEC: u32 = 2048; | |
| pub const NTP_PHASE_LIMIT: u32 = 16000000; | |
| pub const NTP_SCALE_SHIFT: u32 = 32; | |
| pub const NTP_INTERVAL_FREQ: u32 = 250; | |
| pub const NTP_INTERVAL_LENGTH: u32 = 4000000; | |
| pub const PIT_TICK_RATE: u32 = 1193182; | |
| pub const DEFAULT_OVERFLOWUID: u32 = 65534; | |
| pub const DEFAULT_OVERFLOWGID: u32 = 65534; | |
| pub const DEFAULT_FS_OVERFLOWUID: u32 = 65534; | |
| pub const DEFAULT_FS_OVERFLOWGID: u32 = 65534; | |
| pub const KSTAT_ATTR_FS_IOC_FLAGS: u32 = 1050740; | |
| pub const KSTAT_ATTR_VFS_FLAGS: u32 = 48; | |
| pub const STATX_CHANGE_COOKIE: u32 = 1073741824; | |
| pub const STATX_ATTR_CHANGE_MONOTONIC: i64 = -9223372036854775808; | |
| pub const BUILD_ID_SIZE_MAX: u32 = 20; | |
| pub const WNOHANG: u32 = 1; | |
| pub const WUNTRACED: u32 = 2; | |
| pub const WSTOPPED: u32 = 2; | |
| pub const WEXITED: u32 = 4; | |
| pub const WCONTINUED: u32 = 8; | |
| pub const WNOWAIT: u32 = 16777216; | |
| pub const __WNOTHREAD: u32 = 536870912; | |
| pub const __WALL: u32 = 1073741824; | |
| pub const __WCLONE: u32 = 2147483648; | |
| pub const P_ALL: u32 = 0; | |
| pub const P_PID: u32 = 1; | |
| pub const P_PGID: u32 = 2; | |
| pub const P_PIDFD: u32 = 3; | |
| pub const WQ_FLAG_EXCLUSIVE: u32 = 1; | |
| pub const WQ_FLAG_WOKEN: u32 = 2; | |
| pub const WQ_FLAG_CUSTOM: u32 = 4; | |
| pub const WQ_FLAG_DONE: u32 = 8; | |
| pub const WQ_FLAG_PRIORITY: u32 = 16; | |
| pub const OSQ_UNLOCKED_VAL: u32 = 0; | |
| pub const KCSAN_SEQLOCK_REGION_MAX: u32 = 1000; | |
| pub const first_online_node: u32 = 0; | |
| pub const first_memory_node: u32 = 0; | |
| pub const nr_node_ids: u32 = 1; | |
| pub const nr_online_nodes: u32 = 1; | |
| pub const PB_migratetype_bits: u32 = 3; | |
| pub const NR_PAGEFLAGS: u32 = 22; | |
| pub const MAX_NR_ZONES: u32 = 4; | |
| pub const NR_CPUS_BITS: u32 = 8; | |
| pub const SPINLOCK_SIZE: u32 = 64; | |
| pub const LRU_GEN_WIDTH: u32 = 0; | |
| pub const __LRU_REFS_WIDTH: u32 = 0; | |
| pub const ZONES_SHIFT: u32 = 2; | |
| pub const ZONES_WIDTH: u32 = 2; | |
| pub const MAX_PHYSMEM_BITS: u32 = 48; | |
| pub const SECTION_SIZE_BITS: u32 = 27; | |
| pub const SECTIONS_SHIFT: u32 = 21; | |
| pub const SECTIONS_WIDTH: u32 = 0; | |
| pub const NODES_WIDTH: u32 = 0; | |
| pub const KASAN_TAG_WIDTH: u32 = 0; | |
| pub const LAST_CPUPID_SHIFT: u32 = 0; | |
| pub const LAST_CPUPID_WIDTH: u32 = 0; | |
| pub const AT_SYSINFO_EHDR: u32 = 33; | |
| pub const AT_MINSIGSTKSZ: u32 = 51; | |
| pub const AT_VECTOR_SIZE_ARCH: u32 = 2; | |
| pub const AT_NULL: u32 = 0; | |
| pub const AT_IGNORE: u32 = 1; | |
| pub const AT_EXECFD: u32 = 2; | |
| pub const AT_PHDR: u32 = 3; | |
| pub const AT_PHENT: u32 = 4; | |
| pub const AT_PHNUM: u32 = 5; | |
| pub const AT_PAGESZ: u32 = 6; | |
| pub const AT_BASE: u32 = 7; | |
| pub const AT_FLAGS: u32 = 8; | |
| pub const AT_ENTRY: u32 = 9; | |
| pub const AT_NOTELF: u32 = 10; | |
| pub const AT_UID: u32 = 11; | |
| pub const AT_EUID: u32 = 12; | |
| pub const AT_GID: u32 = 13; | |
| pub const AT_EGID: u32 = 14; | |
| pub const AT_PLATFORM: u32 = 15; | |
| pub const AT_HWCAP: u32 = 16; | |
| pub const AT_CLKTCK: u32 = 17; | |
| pub const AT_SECURE: u32 = 23; | |
| pub const AT_BASE_PLATFORM: u32 = 24; | |
| pub const AT_RANDOM: u32 = 25; | |
| pub const AT_HWCAP2: u32 = 26; | |
| pub const AT_RSEQ_FEATURE_SIZE: u32 = 27; | |
| pub const AT_RSEQ_ALIGN: u32 = 28; | |
| pub const AT_EXECFN: u32 = 31; | |
| pub const AT_VECTOR_SIZE_BASE: u32 = 22; | |
| pub const NUM_ACTIVE_RCU_POLL_OLDSTATE: u32 = 2; | |
| pub const NUM_ACTIVE_RCU_POLL_FULL_OLDSTATE: u32 = 4; | |
| pub const MAPLE_NODE_SLOTS: u32 = 31; | |
| pub const MAPLE_RANGE64_SLOTS: u32 = 16; | |
| pub const MAPLE_ARANGE64_SLOTS: u32 = 10; | |
| pub const MAPLE_ALLOC_SLOTS: u32 = 30; | |
| pub const MAPLE_NODE_MASK: u32 = 255; | |
| pub const MT_FLAGS_ALLOC_RANGE: u32 = 1; | |
| pub const MT_FLAGS_USE_RCU: u32 = 2; | |
| pub const MT_FLAGS_HEIGHT_OFFSET: u32 = 2; | |
| pub const MT_FLAGS_HEIGHT_MASK: u32 = 124; | |
| pub const MT_FLAGS_LOCK_MASK: u32 = 768; | |
| pub const MT_FLAGS_LOCK_IRQ: u32 = 256; | |
| pub const MT_FLAGS_LOCK_BH: u32 = 512; | |
| pub const MT_FLAGS_LOCK_EXTERN: u32 = 768; | |
| pub const MAPLE_HEIGHT_MAX: u32 = 31; | |
| pub const MAPLE_NODE_TYPE_MASK: u32 = 15; | |
| pub const MAPLE_NODE_TYPE_SHIFT: u32 = 3; | |
| pub const MAPLE_RESERVED_RANGE: u32 = 4096; | |
| pub const RWSEM_UNLOCKED_VALUE: u32 = 0; | |
| pub const UPROBE_HANDLER_REMOVE: u32 = 1; | |
| pub const UPROBE_HANDLER_MASK: u32 = 1; | |
| pub const MAX_URETPROBE_DEPTH: u32 = 64; | |
| pub const TICK_NSEC: u32 = 4000000; | |
| pub const HZ_TO_MSEC_SHR32: u32 = 29; | |
| pub const MSEC_TO_HZ_SHR32: u32 = 33; | |
| pub const HZ_TO_MSEC_NUM: u32 = 4; | |
| pub const HZ_TO_MSEC_DEN: u32 = 1; | |
| pub const MSEC_TO_HZ_NUM: u32 = 1; | |
| pub const MSEC_TO_HZ_DEN: u32 = 4; | |
| pub const HZ_TO_USEC_SHR32: u32 = 20; | |
| pub const USEC_TO_HZ_SHR32: u32 = 43; | |
| pub const HZ_TO_USEC_NUM: u32 = 4000; | |
| pub const HZ_TO_USEC_DEN: u32 = 1; | |
| pub const USEC_TO_HZ_NUM: u32 = 1; | |
| pub const USEC_TO_HZ_DEN: u32 = 4000; | |
| pub const HZ_TO_NSEC_NUM: u32 = 4000000; | |
| pub const HZ_TO_NSEC_DEN: u32 = 1; | |
| pub const NSEC_TO_HZ_NUM: u32 = 1; | |
| pub const NSEC_TO_HZ_DEN: u32 = 4000000; | |
| pub const SHIFT_HZ: u32 = 8; | |
| pub const TICK_USEC: u32 = 4000; | |
| pub const USER_TICK_USEC: u32 = 10000; | |
| pub const SEC_JIFFIE_SC: u32 = 23; | |
| pub const NSEC_JIFFIE_SC: u32 = 53; | |
| pub const TIMESTAMP_SIZE: u32 = 30; | |
| pub const LOW_RES_NSEC: u32 = 4000000; | |
| pub const KTIME_LOW_RES: u32 = 4000000; | |
| pub const TIMER_CPUMASK: u32 = 262143; | |
| pub const TIMER_MIGRATING: u32 = 262144; | |
| pub const TIMER_BASEMASK: u32 = 524287; | |
| pub const TIMER_DEFERRABLE: u32 = 524288; | |
| pub const TIMER_PINNED: u32 = 1048576; | |
| pub const TIMER_IRQSAFE: u32 = 2097152; | |
| pub const TIMER_INIT_FLAGS: u32 = 3670016; | |
| pub const TIMER_ARRAYSHIFT: u32 = 22; | |
| pub const TIMER_ARRAYMASK: u32 = 4290772992; | |
| pub const TIMER_TRACE_FLAGMASK: u32 = 3932160; | |
| pub const NEXT_TIMER_MAX_DELTA: u32 = 1073741823; | |
| pub const MMCF_AARCH32: u32 = 1; | |
| pub const USER_ASID_BIT: u32 = 48; | |
| pub const AT_VECTOR_SIZE: u32 = 50; | |
| pub const INIT_PASID: u32 = 0; | |
| pub const ENCODE_PAGE_BITS: u32 = 3; | |
| pub const MM_MT_FLAGS: u32 = 771; | |
| pub const PAGEFLAGS_MASK: u32 = 4194303; | |
| pub const PAGE_POISON_PATTERN: i32 = -1; | |
| pub const FOLIO_PF_ANY: u32 = 0; | |
| pub const FOLIO_PF_HEAD: u32 = 0; | |
| pub const FOLIO_PF_ONLY_HEAD: u32 = 0; | |
| pub const FOLIO_PF_NO_TAIL: u32 = 0; | |
| pub const FOLIO_PF_NO_COMPOUND: u32 = 0; | |
| pub const FOLIO_PF_SECOND: u32 = 1; | |
| pub const __PG_HWPOISON: u32 = 0; | |
| pub const PAGE_MAPPING_ANON: u32 = 1; | |
| pub const PAGE_MAPPING_MOVABLE: u32 = 2; | |
| pub const PAGE_MAPPING_KSM: u32 = 3; | |
| pub const PAGE_MAPPING_FLAGS: u32 = 3; | |
| pub const PAGE_TYPE_BASE: u32 = 4026531840; | |
| pub const PAGE_MAPCOUNT_RESERVE: i32 = -128; | |
| pub const PG_buddy: u32 = 128; | |
| pub const PG_offline: u32 = 256; | |
| pub const PG_table: u32 = 512; | |
| pub const PG_guard: u32 = 1024; | |
| pub const MAX_ORDER: u32 = 10; | |
| pub const MAX_ORDER_NR_PAGES: u32 = 1024; | |
| pub const PAGE_ALLOC_COSTLY_ORDER: u32 = 3; | |
| pub const MIGRATETYPE_MASK: u32 = 7; | |
| pub const NR_VM_NUMA_EVENT_ITEMS: u32 = 0; | |
| pub const LRU_BASE: u32 = 0; | |
| pub const LRU_ACTIVE: u32 = 1; | |
| pub const LRU_FILE: u32 = 2; | |
| pub const WORKINGSET_ANON: u32 = 0; | |
| pub const WORKINGSET_FILE: u32 = 1; | |
| pub const ANON_AND_FILE: u32 = 2; | |
| pub const MIN_NR_GENS: u32 = 2; | |
| pub const MAX_NR_GENS: u32 = 4; | |
| pub const MAX_NR_TIERS: u32 = 4; | |
| pub const NR_PCP_THP: u32 = 0; | |
| pub const ASYNC_AND_SYNC: u32 = 2; | |
| pub const ZONEID_SHIFT: u32 = 2; | |
| pub const ZONES_MASK: u32 = 3; | |
| pub const NODES_MASK: u32 = 0; | |
| pub const SECTIONS_MASK: u32 = 0; | |
| pub const LAST_CPUPID_MASK: u32 = 0; | |
| pub const KASAN_TAG_MASK: u32 = 0; | |
| pub const ZONEID_MASK: u32 = 3; | |
| pub const DEF_PRIORITY: u32 = 12; | |
| pub const MAX_ZONES_PER_ZONELIST: u32 = 4; | |
| pub const RCU_DONE_TAIL: u32 = 0; | |
| pub const RCU_WAIT_TAIL: u32 = 1; | |
| pub const RCU_NEXT_READY_TAIL: u32 = 2; | |
| pub const RCU_NEXT_TAIL: u32 = 3; | |
| pub const RCU_CBLIST_NSEGS: u32 = 4; | |
| pub const RCU_FANOUT: u32 = 64; | |
| pub const RCU_FANOUT_LEAF: u32 = 16; | |
| pub const RCU_FANOUT_1: u32 = 16; | |
| pub const RCU_FANOUT_2: u32 = 1024; | |
| pub const RCU_FANOUT_3: u32 = 65536; | |
| pub const RCU_FANOUT_4: u32 = 4194304; | |
| pub const RCU_NUM_LVLS: u32 = 2; | |
| pub const NUM_RCU_LVL_0: u32 = 1; | |
| pub const SRCU_SIZE_SMALL: u32 = 0; | |
| pub const SRCU_SIZE_ALLOC: u32 = 1; | |
| pub const SRCU_SIZE_WAIT_BARRIER: u32 = 2; | |
| pub const SRCU_SIZE_WAIT_CALL: u32 = 3; | |
| pub const SRCU_SIZE_WAIT_CBS1: u32 = 4; | |
| pub const SRCU_SIZE_WAIT_CBS2: u32 = 5; | |
| pub const SRCU_SIZE_WAIT_CBS3: u32 = 6; | |
| pub const SRCU_SIZE_WAIT_CBS4: u32 = 7; | |
| pub const SRCU_SIZE_BIG: u32 = 8; | |
| pub const SRCU_STATE_IDLE: u32 = 0; | |
| pub const SRCU_STATE_SCAN1: u32 = 1; | |
| pub const SRCU_STATE_SCAN2: u32 = 2; | |
| pub const SRCU_NMI_UNKNOWN: u32 = 0; | |
| pub const SRCU_NMI_UNSAFE: u32 = 1; | |
| pub const SRCU_NMI_SAFE: u32 = 2; | |
| pub const NOTIFY_DONE: u32 = 0; | |
| pub const NOTIFY_OK: u32 = 1; | |
| pub const NOTIFY_STOP_MASK: u32 = 32768; | |
| pub const NOTIFY_BAD: u32 = 32770; | |
| pub const NOTIFY_STOP: u32 = 32769; | |
| pub const NETLINK_URELEASE: u32 = 1; | |
| pub const KBD_KEYCODE: u32 = 1; | |
| pub const KBD_UNBOUND_KEYCODE: u32 = 2; | |
| pub const KBD_UNICODE: u32 = 3; | |
| pub const KBD_KEYSYM: u32 = 4; | |
| pub const KBD_POST_KEYSYM: u32 = 5; | |
| pub const PA_SECTION_SHIFT: u32 = 27; | |
| pub const PFN_SECTION_SHIFT: u32 = 15; | |
| pub const NR_MEM_SECTIONS: u32 = 2097152; | |
| pub const PAGES_PER_SECTION: u32 = 32768; | |
| pub const PAGE_SECTION_MASK: i32 = -32768; | |
| pub const SUBSECTION_SHIFT: u32 = 21; | |
| pub const SUBSECTION_SIZE: u32 = 2097152; | |
| pub const PFN_SUBSECTION_SHIFT: u32 = 9; | |
| pub const PAGES_PER_SUBSECTION: u32 = 512; | |
| pub const PAGE_SUBSECTION_MASK: i32 = -512; | |
| pub const SUBSECTIONS_PER_SECTION: u32 = 64; | |
| pub const LOCAL_DISTANCE: u32 = 10; | |
| pub const REMOTE_DISTANCE: u32 = 20; | |
| pub const DISTANCE_BITS: u32 = 8; | |
| pub const RECLAIM_DISTANCE: u32 = 30; | |
| pub const PENALTY_FOR_NODE_WITH_CPUS: u32 = 1; | |
| pub const GFP_MOVABLE_SHIFT: u32 = 3; | |
| pub const GFP_ZONES_SHIFT: u32 = 2; | |
| pub const CTL_MAXNAME: u32 = 10; | |
| pub const SYSCTL_PERM_EMPTY_DIR: u32 = 1; | |
| pub const UMH_NO_WAIT: u32 = 0; | |
| pub const UMH_WAIT_EXEC: u32 = 1; | |
| pub const UMH_WAIT_PROC: u32 = 2; | |
| pub const UMH_KILLABLE: u32 = 4; | |
| pub const UMH_FREEZABLE: u32 = 8; | |
| pub const KMOD_PATH_LEN: u32 = 256; | |
| pub const R_ARM_NONE: u32 = 0; | |
| pub const R_AARCH64_NONE: u32 = 256; | |
| pub const R_AARCH64_ABS64: u32 = 257; | |
| pub const R_AARCH64_ABS32: u32 = 258; | |
| pub const R_AARCH64_ABS16: u32 = 259; | |
| pub const R_AARCH64_PREL64: u32 = 260; | |
| pub const R_AARCH64_PREL32: u32 = 261; | |
| pub const R_AARCH64_PREL16: u32 = 262; | |
| pub const R_AARCH64_MOVW_UABS_G0: u32 = 263; | |
| pub const R_AARCH64_MOVW_UABS_G0_NC: u32 = 264; | |
| pub const R_AARCH64_MOVW_UABS_G1: u32 = 265; | |
| pub const R_AARCH64_MOVW_UABS_G1_NC: u32 = 266; | |
| pub const R_AARCH64_MOVW_UABS_G2: u32 = 267; | |
| pub const R_AARCH64_MOVW_UABS_G2_NC: u32 = 268; | |
| pub const R_AARCH64_MOVW_UABS_G3: u32 = 269; | |
| pub const R_AARCH64_MOVW_SABS_G0: u32 = 270; | |
| pub const R_AARCH64_MOVW_SABS_G1: u32 = 271; | |
| pub const R_AARCH64_MOVW_SABS_G2: u32 = 272; | |
| pub const R_AARCH64_LD_PREL_LO19: u32 = 273; | |
| pub const R_AARCH64_ADR_PREL_LO21: u32 = 274; | |
| pub const R_AARCH64_ADR_PREL_PG_HI21: u32 = 275; | |
| pub const R_AARCH64_ADR_PREL_PG_HI21_NC: u32 = 276; | |
| pub const R_AARCH64_ADD_ABS_LO12_NC: u32 = 277; | |
| pub const R_AARCH64_LDST8_ABS_LO12_NC: u32 = 278; | |
| pub const R_AARCH64_TSTBR14: u32 = 279; | |
| pub const R_AARCH64_CONDBR19: u32 = 280; | |
| pub const R_AARCH64_JUMP26: u32 = 282; | |
| pub const R_AARCH64_CALL26: u32 = 283; | |
| pub const R_AARCH64_LDST16_ABS_LO12_NC: u32 = 284; | |
| pub const R_AARCH64_LDST32_ABS_LO12_NC: u32 = 285; | |
| pub const R_AARCH64_LDST64_ABS_LO12_NC: u32 = 286; | |
| pub const R_AARCH64_LDST128_ABS_LO12_NC: u32 = 299; | |
| pub const R_AARCH64_MOVW_PREL_G0: u32 = 287; | |
| pub const R_AARCH64_MOVW_PREL_G0_NC: u32 = 288; | |
| pub const R_AARCH64_MOVW_PREL_G1: u32 = 289; | |
| pub const R_AARCH64_MOVW_PREL_G1_NC: u32 = 290; | |
| pub const R_AARCH64_MOVW_PREL_G2: u32 = 291; | |
| pub const R_AARCH64_MOVW_PREL_G2_NC: u32 = 292; | |
| pub const R_AARCH64_MOVW_PREL_G3: u32 = 293; | |
| pub const R_AARCH64_RELATIVE: u32 = 1027; | |
| pub const ELF_PLATFORM_SIZE: u32 = 16; | |
| pub const ELF_PLATFORM: &[u8; 8usize] = b"aarch64\0"; | |
| pub const EM_NONE: u32 = 0; | |
| pub const EM_M32: u32 = 1; | |
| pub const EM_SPARC: u32 = 2; | |
| pub const EM_386: u32 = 3; | |
| pub const EM_68K: u32 = 4; | |
| pub const EM_88K: u32 = 5; | |
| pub const EM_486: u32 = 6; | |
| pub const EM_860: u32 = 7; | |
| pub const EM_MIPS: u32 = 8; | |
| pub const EM_MIPS_RS3_LE: u32 = 10; | |
| pub const EM_MIPS_RS4_BE: u32 = 10; | |
| pub const EM_PARISC: u32 = 15; | |
| pub const EM_SPARC32PLUS: u32 = 18; | |
| pub const EM_PPC: u32 = 20; | |
| pub const EM_PPC64: u32 = 21; | |
| pub const EM_SPU: u32 = 23; | |
| pub const EM_ARM: u32 = 40; | |
| pub const EM_SH: u32 = 42; | |
| pub const EM_SPARCV9: u32 = 43; | |
| pub const EM_H8_300: u32 = 46; | |
| pub const EM_IA_64: u32 = 50; | |
| pub const EM_X86_64: u32 = 62; | |
| pub const EM_S390: u32 = 22; | |
| pub const EM_CRIS: u32 = 76; | |
| pub const EM_M32R: u32 = 88; | |
| pub const EM_MN10300: u32 = 89; | |
| pub const EM_OPENRISC: u32 = 92; | |
| pub const EM_ARCOMPACT: u32 = 93; | |
| pub const EM_XTENSA: u32 = 94; | |
| pub const EM_BLACKFIN: u32 = 106; | |
| pub const EM_UNICORE: u32 = 110; | |
| pub const EM_ALTERA_NIOS2: u32 = 113; | |
| pub const EM_TI_C6000: u32 = 140; | |
| pub const EM_HEXAGON: u32 = 164; | |
| pub const EM_NDS32: u32 = 167; | |
| pub const EM_AARCH64: u32 = 183; | |
| pub const EM_TILEPRO: u32 = 188; | |
| pub const EM_MICROBLAZE: u32 = 189; | |
| pub const EM_TILEGX: u32 = 191; | |
| pub const EM_ARCV2: u32 = 195; | |
| pub const EM_RISCV: u32 = 243; | |
| pub const EM_BPF: u32 = 247; | |
| pub const EM_CSKY: u32 = 252; | |
| pub const EM_LOONGARCH: u32 = 258; | |
| pub const EM_FRV: u32 = 21569; | |
| pub const EM_ALPHA: u32 = 36902; | |
| pub const EM_CYGNUS_M32R: u32 = 36929; | |
| pub const EM_S390_OLD: u32 = 41872; | |
| pub const EM_CYGNUS_MN10300: u32 = 48879; | |
| pub const PT_NULL: u32 = 0; | |
| pub const PT_LOAD: u32 = 1; | |
| pub const PT_DYNAMIC: u32 = 2; | |
| pub const PT_INTERP: u32 = 3; | |
| pub const PT_NOTE: u32 = 4; | |
| pub const PT_SHLIB: u32 = 5; | |
| pub const PT_PHDR: u32 = 6; | |
| pub const PT_TLS: u32 = 7; | |
| pub const PT_LOOS: u32 = 1610612736; | |
| pub const PT_HIOS: u32 = 1879048191; | |
| pub const PT_LOPROC: u32 = 1879048192; | |
| pub const PT_HIPROC: u32 = 2147483647; | |
| pub const PT_GNU_EH_FRAME: u32 = 1685382480; | |
| pub const PT_GNU_STACK: u32 = 1685382481; | |
| pub const PT_GNU_RELRO: u32 = 1685382482; | |
| pub const PT_GNU_PROPERTY: u32 = 1685382483; | |
| pub const PT_AARCH64_MEMTAG_MTE: u32 = 1879048194; | |
| pub const PN_XNUM: u32 = 65535; | |
| pub const ET_NONE: u32 = 0; | |
| pub const ET_REL: u32 = 1; | |
| pub const ET_EXEC: u32 = 2; | |
| pub const ET_DYN: u32 = 3; | |
| pub const ET_CORE: u32 = 4; | |
| pub const ET_LOPROC: u32 = 65280; | |
| pub const ET_HIPROC: u32 = 65535; | |
| pub const DT_NULL: u32 = 0; | |
| pub const DT_NEEDED: u32 = 1; | |
| pub const DT_PLTRELSZ: u32 = 2; | |
| pub const DT_PLTGOT: u32 = 3; | |
| pub const DT_HASH: u32 = 4; | |
| pub const DT_STRTAB: u32 = 5; | |
| pub const DT_SYMTAB: u32 = 6; | |
| pub const DT_RELA: u32 = 7; | |
| pub const DT_RELASZ: u32 = 8; | |
| pub const DT_RELAENT: u32 = 9; | |
| pub const DT_STRSZ: u32 = 10; | |
| pub const DT_SYMENT: u32 = 11; | |
| pub const DT_INIT: u32 = 12; | |
| pub const DT_FINI: u32 = 13; | |
| pub const DT_SONAME: u32 = 14; | |
| pub const DT_RPATH: u32 = 15; | |
| pub const DT_SYMBOLIC: u32 = 16; | |
| pub const DT_REL: u32 = 17; | |
| pub const DT_RELSZ: u32 = 18; | |
| pub const DT_RELENT: u32 = 19; | |
| pub const DT_PLTREL: u32 = 20; | |
| pub const DT_DEBUG: u32 = 21; | |
| pub const DT_TEXTREL: u32 = 22; | |
| pub const DT_JMPREL: u32 = 23; | |
| pub const DT_ENCODING: u32 = 32; | |
| pub const OLD_DT_LOOS: u32 = 1610612736; | |
| pub const DT_LOOS: u32 = 1610612749; | |
| pub const DT_HIOS: u32 = 1879044096; | |
| pub const DT_VALRNGLO: u32 = 1879047424; | |
| pub const DT_VALRNGHI: u32 = 1879047679; | |
| pub const DT_ADDRRNGLO: u32 = 1879047680; | |
| pub const DT_ADDRRNGHI: u32 = 1879047935; | |
| pub const DT_VERSYM: u32 = 1879048176; | |
| pub const DT_RELACOUNT: u32 = 1879048185; | |
| pub const DT_RELCOUNT: u32 = 1879048186; | |
| pub const DT_FLAGS_1: u32 = 1879048187; | |
| pub const DT_VERDEF: u32 = 1879048188; | |
| pub const DT_VERDEFNUM: u32 = 1879048189; | |
| pub const DT_VERNEED: u32 = 1879048190; | |
| pub const DT_VERNEEDNUM: u32 = 1879048191; | |
| pub const OLD_DT_HIOS: u32 = 1879048191; | |
| pub const DT_LOPROC: u32 = 1879048192; | |
| pub const DT_HIPROC: u32 = 2147483647; | |
| pub const STB_LOCAL: u32 = 0; | |
| pub const STB_GLOBAL: u32 = 1; | |
| pub const STB_WEAK: u32 = 2; | |
| pub const STT_NOTYPE: u32 = 0; | |
| pub const STT_OBJECT: u32 = 1; | |
| pub const STT_FUNC: u32 = 2; | |
| pub const STT_SECTION: u32 = 3; | |
| pub const STT_FILE: u32 = 4; | |
| pub const STT_COMMON: u32 = 5; | |
| pub const STT_TLS: u32 = 6; | |
| pub const EI_NIDENT: u32 = 16; | |
| pub const PF_R: u32 = 4; | |
| pub const PF_W: u32 = 2; | |
| pub const PF_X: u32 = 1; | |
| pub const SHT_NULL: u32 = 0; | |
| pub const SHT_PROGBITS: u32 = 1; | |
| pub const SHT_SYMTAB: u32 = 2; | |
| pub const SHT_STRTAB: u32 = 3; | |
| pub const SHT_RELA: u32 = 4; | |
| pub const SHT_HASH: u32 = 5; | |
| pub const SHT_DYNAMIC: u32 = 6; | |
| pub const SHT_NOTE: u32 = 7; | |
| pub const SHT_NOBITS: u32 = 8; | |
| pub const SHT_REL: u32 = 9; | |
| pub const SHT_SHLIB: u32 = 10; | |
| pub const SHT_DYNSYM: u32 = 11; | |
| pub const SHT_NUM: u32 = 12; | |
| pub const SHT_LOPROC: u32 = 1879048192; | |
| pub const SHT_HIPROC: u32 = 2147483647; | |
| pub const SHT_LOUSER: u32 = 2147483648; | |
| pub const SHT_HIUSER: u32 = 4294967295; | |
| pub const SHF_WRITE: u32 = 1; | |
| pub const SHF_ALLOC: u32 = 2; | |
| pub const SHF_EXECINSTR: u32 = 4; | |
| pub const SHF_RELA_LIVEPATCH: u32 = 1048576; | |
| pub const SHF_RO_AFTER_INIT: u32 = 2097152; | |
| pub const SHF_MASKPROC: u32 = 4026531840; | |
| pub const SHN_UNDEF: u32 = 0; | |
| pub const SHN_LORESERVE: u32 = 65280; | |
| pub const SHN_LOPROC: u32 = 65280; | |
| pub const SHN_HIPROC: u32 = 65311; | |
| pub const SHN_LIVEPATCH: u32 = 65312; | |
| pub const SHN_ABS: u32 = 65521; | |
| pub const SHN_COMMON: u32 = 65522; | |
| pub const SHN_HIRESERVE: u32 = 65535; | |
| pub const EI_MAG0: u32 = 0; | |
| pub const EI_MAG1: u32 = 1; | |
| pub const EI_MAG2: u32 = 2; | |
| pub const EI_MAG3: u32 = 3; | |
| pub const EI_CLASS: u32 = 4; | |
| pub const EI_DATA: u32 = 5; | |
| pub const EI_VERSION: u32 = 6; | |
| pub const EI_OSABI: u32 = 7; | |
| pub const EI_PAD: u32 = 8; | |
| pub const ELFMAG0: u32 = 127; | |
| pub const ELFMAG1: u8 = 69u8; | |
| pub const ELFMAG2: u8 = 76u8; | |
| pub const ELFMAG3: u8 = 70u8; | |
| pub const ELFMAG: &[u8; 5usize] = b"\x7FELF\0"; | |
| pub const SELFMAG: u32 = 4; | |
| pub const ELFCLASSNONE: u32 = 0; | |
| pub const ELFCLASS32: u32 = 1; | |
| pub const ELFCLASS64: u32 = 2; | |
| pub const ELFCLASSNUM: u32 = 3; | |
| pub const ELFDATANONE: u32 = 0; | |
| pub const ELFDATA2LSB: u32 = 1; | |
| pub const ELFDATA2MSB: u32 = 2; | |
| pub const EV_NONE: u32 = 0; | |
| pub const EV_CURRENT: u32 = 1; | |
| pub const EV_NUM: u32 = 2; | |
| pub const ELFOSABI_NONE: u32 = 0; | |
| pub const ELFOSABI_LINUX: u32 = 3; | |
| pub const ELF_OSABI: u32 = 0; | |
| pub const NT_PRSTATUS: u32 = 1; | |
| pub const NT_PRFPREG: u32 = 2; | |
| pub const NT_PRPSINFO: u32 = 3; | |
| pub const NT_TASKSTRUCT: u32 = 4; | |
| pub const NT_AUXV: u32 = 6; | |
| pub const NT_SIGINFO: u32 = 1397311305; | |
| pub const NT_FILE: u32 = 1179208773; | |
| pub const NT_PRXFPREG: u32 = 1189489535; | |
| pub const NT_PPC_VMX: u32 = 256; | |
| pub const NT_PPC_SPE: u32 = 257; | |
| pub const NT_PPC_VSX: u32 = 258; | |
| pub const NT_PPC_TAR: u32 = 259; | |
| pub const NT_PPC_PPR: u32 = 260; | |
| pub const NT_PPC_DSCR: u32 = 261; | |
| pub const NT_PPC_EBB: u32 = 262; | |
| pub const NT_PPC_PMU: u32 = 263; | |
| pub const NT_PPC_TM_CGPR: u32 = 264; | |
| pub const NT_PPC_TM_CFPR: u32 = 265; | |
| pub const NT_PPC_TM_CVMX: u32 = 266; | |
| pub const NT_PPC_TM_CVSX: u32 = 267; | |
| pub const NT_PPC_TM_SPR: u32 = 268; | |
| pub const NT_PPC_TM_CTAR: u32 = 269; | |
| pub const NT_PPC_TM_CPPR: u32 = 270; | |
| pub const NT_PPC_TM_CDSCR: u32 = 271; | |
| pub const NT_PPC_PKEY: u32 = 272; | |
| pub const NT_PPC_DEXCR: u32 = 273; | |
| pub const NT_PPC_HASHKEYR: u32 = 274; | |
| pub const NT_386_TLS: u32 = 512; | |
| pub const NT_386_IOPERM: u32 = 513; | |
| pub const NT_X86_XSTATE: u32 = 514; | |
| pub const NT_X86_SHSTK: u32 = 516; | |
| pub const NT_S390_HIGH_GPRS: u32 = 768; | |
| pub const NT_S390_TIMER: u32 = 769; | |
| pub const NT_S390_TODCMP: u32 = 770; | |
| pub const NT_S390_TODPREG: u32 = 771; | |
| pub const NT_S390_CTRS: u32 = 772; | |
| pub const NT_S390_PREFIX: u32 = 773; | |
| pub const NT_S390_LAST_BREAK: u32 = 774; | |
| pub const NT_S390_SYSTEM_CALL: u32 = 775; | |
| pub const NT_S390_TDB: u32 = 776; | |
| pub const NT_S390_VXRS_LOW: u32 = 777; | |
| pub const NT_S390_VXRS_HIGH: u32 = 778; | |
| pub const NT_S390_GS_CB: u32 = 779; | |
| pub const NT_S390_GS_BC: u32 = 780; | |
| pub const NT_S390_RI_CB: u32 = 781; | |
| pub const NT_S390_PV_CPU_DATA: u32 = 782; | |
| pub const NT_ARM_VFP: u32 = 1024; | |
| pub const NT_ARM_TLS: u32 = 1025; | |
| pub const NT_ARM_HW_BREAK: u32 = 1026; | |
| pub const NT_ARM_HW_WATCH: u32 = 1027; | |
| pub const NT_ARM_SYSTEM_CALL: u32 = 1028; | |
| pub const NT_ARM_SVE: u32 = 1029; | |
| pub const NT_ARM_PAC_MASK: u32 = 1030; | |
| pub const NT_ARM_PACA_KEYS: u32 = 1031; | |
| pub const NT_ARM_PACG_KEYS: u32 = 1032; | |
| pub const NT_ARM_TAGGED_ADDR_CTRL: u32 = 1033; | |
| pub const NT_ARM_PAC_ENABLED_KEYS: u32 = 1034; | |
| pub const NT_ARM_SSVE: u32 = 1035; | |
| pub const NT_ARM_ZA: u32 = 1036; | |
| pub const NT_ARM_ZT: u32 = 1037; | |
| pub const NT_ARC_V2: u32 = 1536; | |
| pub const NT_VMCOREDD: u32 = 1792; | |
| pub const NT_MIPS_DSP: u32 = 2048; | |
| pub const NT_MIPS_FP_MODE: u32 = 2049; | |
| pub const NT_MIPS_MSA: u32 = 2050; | |
| pub const NT_RISCV_CSR: u32 = 2304; | |
| pub const NT_RISCV_VECTOR: u32 = 2305; | |
| pub const NT_LOONGARCH_CPUCFG: u32 = 2560; | |
| pub const NT_LOONGARCH_CSR: u32 = 2561; | |
| pub const NT_LOONGARCH_LSX: u32 = 2562; | |
| pub const NT_LOONGARCH_LASX: u32 = 2563; | |
| pub const NT_LOONGARCH_LBT: u32 = 2564; | |
| pub const NT_LOONGARCH_HW_BREAK: u32 = 2565; | |
| pub const NT_LOONGARCH_HW_WATCH: u32 = 2566; | |
| pub const NT_GNU_PROPERTY_TYPE_0: u32 = 5; | |
| pub const GNU_PROPERTY_AARCH64_FEATURE_1_AND: u32 = 3221225472; | |
| pub const GNU_PROPERTY_AARCH64_FEATURE_1_BTI: u32 = 1; | |
| pub const MINORBITS: u32 = 20; | |
| pub const MINORMASK: u32 = 1048575; | |
| pub const LIST_BL_LOCKMASK: u32 = 1; | |
| pub const GOLDEN_RATIO_32: u32 = 1640531527; | |
| pub const GOLDEN_RATIO_64: u64 = 7046029254386353131; | |
| pub const DNAME_INLINE_LEN: u32 = 32; | |
| pub const DCACHE_OP_HASH: u32 = 1; | |
| pub const DCACHE_OP_COMPARE: u32 = 2; | |
| pub const DCACHE_OP_REVALIDATE: u32 = 4; | |
| pub const DCACHE_OP_DELETE: u32 = 8; | |
| pub const DCACHE_OP_PRUNE: u32 = 16; | |
| pub const DCACHE_DISCONNECTED: u32 = 32; | |
| pub const DCACHE_REFERENCED: u32 = 64; | |
| pub const DCACHE_DONTCACHE: u32 = 128; | |
| pub const DCACHE_CANT_MOUNT: u32 = 256; | |
| pub const DCACHE_GENOCIDE: u32 = 512; | |
| pub const DCACHE_SHRINK_LIST: u32 = 1024; | |
| pub const DCACHE_OP_WEAK_REVALIDATE: u32 = 2048; | |
| pub const DCACHE_NFSFS_RENAMED: u32 = 4096; | |
| pub const DCACHE_COOKIE: u32 = 8192; | |
| pub const DCACHE_FSNOTIFY_PARENT_WATCHED: u32 = 16384; | |
| pub const DCACHE_DENTRY_KILLED: u32 = 32768; | |
| pub const DCACHE_MOUNTED: u32 = 65536; | |
| pub const DCACHE_NEED_AUTOMOUNT: u32 = 131072; | |
| pub const DCACHE_MANAGE_TRANSIT: u32 = 262144; | |
| pub const DCACHE_MANAGED_DENTRY: u32 = 458752; | |
| pub const DCACHE_LRU_LIST: u32 = 524288; | |
| pub const DCACHE_ENTRY_TYPE: u32 = 7340032; | |
| pub const DCACHE_MISS_TYPE: u32 = 0; | |
| pub const DCACHE_WHITEOUT_TYPE: u32 = 1048576; | |
| pub const DCACHE_DIRECTORY_TYPE: u32 = 2097152; | |
| pub const DCACHE_AUTODIR_TYPE: u32 = 3145728; | |
| pub const DCACHE_REGULAR_TYPE: u32 = 4194304; | |
| pub const DCACHE_SPECIAL_TYPE: u32 = 5242880; | |
| pub const DCACHE_SYMLINK_TYPE: u32 = 6291456; | |
| pub const DCACHE_MAY_FREE: u32 = 8388608; | |
| pub const DCACHE_FALLTHRU: u32 = 16777216; | |
| pub const DCACHE_NOKEY_NAME: u32 = 33554432; | |
| pub const DCACHE_OP_REAL: u32 = 67108864; | |
| pub const DCACHE_PAR_LOOKUP: u32 = 268435456; | |
| pub const DCACHE_DENTRY_CURSOR: u32 = 536870912; | |
| pub const DCACHE_NORCU: u32 = 1073741824; | |
| pub const SHRINKER_UNIT_BITS: u32 = 64; | |
| pub const SHRINK_STOP: i32 = -1; | |
| pub const SHRINK_EMPTY: i32 = -2; | |
| pub const DEFAULT_SEEKS: u32 = 2; | |
| pub const CSIGNAL: u32 = 255; | |
| pub const CLONE_VM: u32 = 256; | |
| pub const CLONE_FS: u32 = 512; | |
| pub const CLONE_FILES: u32 = 1024; | |
| pub const CLONE_SIGHAND: u32 = 2048; | |
| pub const CLONE_PIDFD: u32 = 4096; | |
| pub const CLONE_PTRACE: u32 = 8192; | |
| pub const CLONE_VFORK: u32 = 16384; | |
| pub const CLONE_PARENT: u32 = 32768; | |
| pub const CLONE_THREAD: u32 = 65536; | |
| pub const CLONE_NEWNS: u32 = 131072; | |
| pub const CLONE_SYSVSEM: u32 = 262144; | |
| pub const CLONE_SETTLS: u32 = 524288; | |
| pub const CLONE_PARENT_SETTID: u32 = 1048576; | |
| pub const CLONE_CHILD_CLEARTID: u32 = 2097152; | |
| pub const CLONE_DETACHED: u32 = 4194304; | |
| pub const CLONE_UNTRACED: u32 = 8388608; | |
| pub const CLONE_CHILD_SETTID: u32 = 16777216; | |
| pub const CLONE_NEWCGROUP: u32 = 33554432; | |
| pub const CLONE_NEWUTS: u32 = 67108864; | |
| pub const CLONE_NEWIPC: u32 = 134217728; | |
| pub const CLONE_NEWUSER: u32 = 268435456; | |
| pub const CLONE_NEWPID: u32 = 536870912; | |
| pub const CLONE_NEWNET: u32 = 1073741824; | |
| pub const CLONE_IO: u32 = 2147483648; | |
| pub const CLONE_CLEAR_SIGHAND: u64 = 4294967296; | |
| pub const CLONE_INTO_CGROUP: u64 = 8589934592; | |
| pub const CLONE_NEWTIME: u32 = 128; | |
| pub const CLONE_ARGS_SIZE_VER0: u32 = 64; | |
| pub const CLONE_ARGS_SIZE_VER1: u32 = 80; | |
| pub const CLONE_ARGS_SIZE_VER2: u32 = 88; | |
| pub const SCHED_NORMAL: u32 = 0; | |
| pub const SCHED_FIFO: u32 = 1; | |
| pub const SCHED_RR: u32 = 2; | |
| pub const SCHED_BATCH: u32 = 3; | |
| pub const SCHED_IDLE: u32 = 5; | |
| pub const SCHED_DEADLINE: u32 = 6; | |
| pub const SCHED_RESET_ON_FORK: u32 = 1073741824; | |
| pub const SCHED_FLAG_RESET_ON_FORK: u32 = 1; | |
| pub const SCHED_FLAG_RECLAIM: u32 = 2; | |
| pub const SCHED_FLAG_DL_OVERRUN: u32 = 4; | |
| pub const SCHED_FLAG_KEEP_POLICY: u32 = 8; | |
| pub const SCHED_FLAG_KEEP_PARAMS: u32 = 16; | |
| pub const SCHED_FLAG_UTIL_CLAMP_MIN: u32 = 32; | |
| pub const SCHED_FLAG_UTIL_CLAMP_MAX: u32 = 64; | |
| pub const SCHED_FLAG_KEEP_ALL: u32 = 24; | |
| pub const SCHED_FLAG_UTIL_CLAMP: u32 = 96; | |
| pub const SCHED_FLAG_ALL: u32 = 127; | |
| pub const IPC_CREAT: u32 = 512; | |
| pub const IPC_EXCL: u32 = 1024; | |
| pub const IPC_NOWAIT: u32 = 2048; | |
| pub const IPC_DIPC: u32 = 4096; | |
| pub const IPC_OWN: u32 = 8192; | |
| pub const IPC_RMID: u32 = 0; | |
| pub const IPC_SET: u32 = 1; | |
| pub const IPC_STAT: u32 = 2; | |
| pub const IPC_INFO: u32 = 3; | |
| pub const IPC_OLD: u32 = 0; | |
| pub const IPC_64: u32 = 256; | |
| pub const SEMOP: u32 = 1; | |
| pub const SEMGET: u32 = 2; | |
| pub const SEMCTL: u32 = 3; | |
| pub const SEMTIMEDOP: u32 = 4; | |
| pub const MSGSND: u32 = 11; | |
| pub const MSGRCV: u32 = 12; | |
| pub const MSGGET: u32 = 13; | |
| pub const MSGCTL: u32 = 14; | |
| pub const SHMAT: u32 = 21; | |
| pub const SHMDT: u32 = 22; | |
| pub const SHMGET: u32 = 23; | |
| pub const SHMCTL: u32 = 24; | |
| pub const DIPC: u32 = 25; | |
| pub const SEM_UNDO: u32 = 4096; | |
| pub const GETPID: u32 = 11; | |
| pub const GETVAL: u32 = 12; | |
| pub const GETALL: u32 = 13; | |
| pub const GETNCNT: u32 = 14; | |
| pub const GETZCNT: u32 = 15; | |
| pub const SETVAL: u32 = 16; | |
| pub const SETALL: u32 = 17; | |
| pub const SEM_STAT: u32 = 18; | |
| pub const SEM_INFO: u32 = 19; | |
| pub const SEM_STAT_ANY: u32 = 20; | |
| pub const SEMMNI: u32 = 32000; | |
| pub const SEMMSL: u32 = 32000; | |
| pub const SEMMNS: u32 = 1024000000; | |
| pub const SEMOPM: u32 = 500; | |
| pub const SEMVMX: u32 = 32767; | |
| pub const SEMAEM: u32 = 32767; | |
| pub const SEMUME: u32 = 500; | |
| pub const SEMMNU: u32 = 1024000000; | |
| pub const SEMMAP: u32 = 1024000000; | |
| pub const SEMUSZ: u32 = 20; | |
| pub const HUGETLB_FLAG_ENCODE_SHIFT: u32 = 26; | |
| pub const HUGETLB_FLAG_ENCODE_MASK: u32 = 63; | |
| pub const HUGETLB_FLAG_ENCODE_16KB: u32 = 939524096; | |
| pub const HUGETLB_FLAG_ENCODE_64KB: u32 = 1073741824; | |
| pub const HUGETLB_FLAG_ENCODE_512KB: u32 = 1275068416; | |
| pub const HUGETLB_FLAG_ENCODE_1MB: u32 = 1342177280; | |
| pub const HUGETLB_FLAG_ENCODE_2MB: u32 = 1409286144; | |
| pub const HUGETLB_FLAG_ENCODE_8MB: u32 = 1543503872; | |
| pub const HUGETLB_FLAG_ENCODE_16MB: u32 = 1610612736; | |
| pub const HUGETLB_FLAG_ENCODE_32MB: u32 = 1677721600; | |
| pub const HUGETLB_FLAG_ENCODE_256MB: u32 = 1879048192; | |
| pub const HUGETLB_FLAG_ENCODE_512MB: u32 = 1946157056; | |
| pub const HUGETLB_FLAG_ENCODE_1GB: u32 = 2013265920; | |
| pub const HUGETLB_FLAG_ENCODE_2GB: u32 = 2080374784; | |
| pub const HUGETLB_FLAG_ENCODE_16GB: u32 = 2281701376; | |
| pub const SHMMIN: u32 = 1; | |
| pub const SHMMNI: u32 = 4096; | |
| pub const SHMMAX: i32 = -16777217; | |
| pub const SHMALL: i32 = -16777217; | |
| pub const SHMSEG: u32 = 4096; | |
| pub const SHM_R: u32 = 256; | |
| pub const SHM_W: u32 = 128; | |
| pub const SHM_HUGETLB: u32 = 2048; | |
| pub const SHM_NORESERVE: u32 = 4096; | |
| pub const SHM_HUGE_SHIFT: u32 = 26; | |
| pub const SHM_HUGE_MASK: u32 = 63; | |
| pub const SHM_HUGE_64KB: u32 = 1073741824; | |
| pub const SHM_HUGE_512KB: u32 = 1275068416; | |
| pub const SHM_HUGE_1MB: u32 = 1342177280; | |
| pub const SHM_HUGE_2MB: u32 = 1409286144; | |
| pub const SHM_HUGE_8MB: u32 = 1543503872; | |
| pub const SHM_HUGE_16MB: u32 = 1610612736; | |
| pub const SHM_HUGE_32MB: u32 = 1677721600; | |
| pub const SHM_HUGE_256MB: u32 = 1879048192; | |
| pub const SHM_HUGE_512MB: u32 = 1946157056; | |
| pub const SHM_HUGE_1GB: u32 = 2013265920; | |
| pub const SHM_HUGE_2GB: u32 = 2080374784; | |
| pub const SHM_HUGE_16GB: u32 = 2281701376; | |
| pub const SHM_RDONLY: u32 = 4096; | |
| pub const SHM_RND: u32 = 8192; | |
| pub const SHM_REMAP: u32 = 16384; | |
| pub const SHM_EXEC: u32 = 32768; | |
| pub const SHM_LOCK: u32 = 11; | |
| pub const SHM_UNLOCK: u32 = 12; | |
| pub const SHM_STAT: u32 = 13; | |
| pub const SHM_INFO: u32 = 14; | |
| pub const SHM_STAT_ANY: u32 = 15; | |
| pub const KMSAN_RETVAL_SIZE: u32 = 800; | |
| pub const KMSAN_PARAM_SIZE: u32 = 800; | |
| pub const MONOTONIC_RES_NSEC: u32 = 4000000; | |
| pub const KTIME_MONOTONIC_RES: u32 = 4000000; | |
| pub const HRTIMER_STATE_INACTIVE: u32 = 0; | |
| pub const HRTIMER_STATE_ENQUEUED: u32 = 1; | |
| pub const SECCOMP_MODE_DISABLED: u32 = 0; | |
| pub const SECCOMP_MODE_STRICT: u32 = 1; | |
| pub const SECCOMP_MODE_FILTER: u32 = 2; | |
| pub const SECCOMP_SET_MODE_STRICT: u32 = 0; | |
| pub const SECCOMP_SET_MODE_FILTER: u32 = 1; | |
| pub const SECCOMP_GET_ACTION_AVAIL: u32 = 2; | |
| pub const SECCOMP_GET_NOTIF_SIZES: u32 = 3; | |
| pub const SECCOMP_FILTER_FLAG_TSYNC: u32 = 1; | |
| pub const SECCOMP_FILTER_FLAG_LOG: u32 = 2; | |
| pub const SECCOMP_FILTER_FLAG_SPEC_ALLOW: u32 = 4; | |
| pub const SECCOMP_FILTER_FLAG_NEW_LISTENER: u32 = 8; | |
| pub const SECCOMP_FILTER_FLAG_TSYNC_ESRCH: u32 = 16; | |
| pub const SECCOMP_FILTER_FLAG_WAIT_KILLABLE_RECV: u32 = 32; | |
| pub const SECCOMP_RET_KILL_PROCESS: u32 = 2147483648; | |
| pub const SECCOMP_RET_KILL_THREAD: u32 = 0; | |
| pub const SECCOMP_RET_KILL: u32 = 0; | |
| pub const SECCOMP_RET_TRAP: u32 = 196608; | |
| pub const SECCOMP_RET_ERRNO: u32 = 327680; | |
| pub const SECCOMP_RET_USER_NOTIF: u32 = 2143289344; | |
| pub const SECCOMP_RET_TRACE: u32 = 2146435072; | |
| pub const SECCOMP_RET_LOG: u32 = 2147221504; | |
| pub const SECCOMP_RET_ALLOW: u32 = 2147418112; | |
| pub const SECCOMP_RET_ACTION_FULL: u32 = 4294901760; | |
| pub const SECCOMP_RET_ACTION: u32 = 2147418112; | |
| pub const SECCOMP_RET_DATA: u32 = 65535; | |
| pub const SECCOMP_USER_NOTIF_FLAG_CONTINUE: u32 = 1; | |
| pub const SECCOMP_USER_NOTIF_FD_SYNC_WAKE_UP: u32 = 1; | |
| pub const SECCOMP_ADDFD_FLAG_SETFD: u32 = 1; | |
| pub const SECCOMP_ADDFD_FLAG_SEND: u32 = 2; | |
| pub const SECCOMP_IOC_MAGIC: u8 = 33u8; | |
| pub const SECCOMP_FILTER_FLAG_MASK: u32 = 63; | |
| pub const SECCOMP_NOTIFY_ADDFD_SIZE_VER0: u32 = 24; | |
| pub const SECCOMP_NOTIFY_ADDFD_SIZE_LATEST: u32 = 24; | |
| pub const RUSAGE_SELF: u32 = 0; | |
| pub const RUSAGE_CHILDREN: i32 = -1; | |
| pub const RUSAGE_BOTH: i32 = -2; | |
| pub const RUSAGE_THREAD: u32 = 1; | |
| pub const RLIM64_INFINITY: i32 = -1; | |
| pub const PRIO_MIN: i32 = -20; | |
| pub const PRIO_MAX: u32 = 20; | |
| pub const PRIO_PROCESS: u32 = 0; | |
| pub const PRIO_PGRP: u32 = 1; | |
| pub const PRIO_USER: u32 = 2; | |
| pub const _STK_LIM: u32 = 8388608; | |
| pub const MLOCK_LIMIT: u32 = 8388608; | |
| pub const RLIMIT_CPU: u32 = 0; | |
| pub const RLIMIT_FSIZE: u32 = 1; | |
| pub const RLIMIT_DATA: u32 = 2; | |
| pub const RLIMIT_STACK: u32 = 3; | |
| pub const RLIMIT_CORE: u32 = 4; | |
| pub const RLIMIT_RSS: u32 = 5; | |
| pub const RLIMIT_NPROC: u32 = 6; | |
| pub const RLIMIT_NOFILE: u32 = 7; | |
| pub const RLIMIT_MEMLOCK: u32 = 8; | |
| pub const RLIMIT_AS: u32 = 9; | |
| pub const RLIMIT_LOCKS: u32 = 10; | |
| pub const RLIMIT_SIGPENDING: u32 = 11; | |
| pub const RLIMIT_MSGQUEUE: u32 = 12; | |
| pub const RLIMIT_NICE: u32 = 13; | |
| pub const RLIMIT_RTPRIO: u32 = 14; | |
| pub const RLIMIT_RTTIME: u32 = 15; | |
| pub const RLIM_NLIMITS: u32 = 16; | |
| pub const RLIM_INFINITY: i32 = -1; | |
| pub const MAX_NICE: u32 = 19; | |
| pub const MIN_NICE: i32 = -20; | |
| pub const NICE_WIDTH: u32 = 40; | |
| pub const MAX_RT_PRIO: u32 = 100; | |
| pub const MAX_PRIO: u32 = 140; | |
| pub const DEFAULT_PRIO: u32 = 120; | |
| pub const SA_RESTORER: u32 = 67108864; | |
| pub const MINSIGSTKSZ: u32 = 5120; | |
| pub const SIGSTKSZ: u32 = 16384; | |
| pub const _NSIG: u32 = 64; | |
| pub const _NSIG_BPW: u32 = 64; | |
| pub const _NSIG_WORDS: u32 = 1; | |
| pub const SIGHUP: u32 = 1; | |
| pub const SIGINT: u32 = 2; | |
| pub const SIGQUIT: u32 = 3; | |
| pub const SIGILL: u32 = 4; | |
| pub const SIGTRAP: u32 = 5; | |
| pub const SIGABRT: u32 = 6; | |
| pub const SIGIOT: u32 = 6; | |
| pub const SIGBUS: u32 = 7; | |
| pub const SIGFPE: u32 = 8; | |
| pub const SIGKILL: u32 = 9; | |
| pub const SIGUSR1: u32 = 10; | |
| pub const SIGSEGV: u32 = 11; | |
| pub const SIGUSR2: u32 = 12; | |
| pub const SIGPIPE: u32 = 13; | |
| pub const SIGALRM: u32 = 14; | |
| pub const SIGTERM: u32 = 15; | |
| pub const SIGSTKFLT: u32 = 16; | |
| pub const SIGCHLD: u32 = 17; | |
| pub const SIGCONT: u32 = 18; | |
| pub const SIGSTOP: u32 = 19; | |
| pub const SIGTSTP: u32 = 20; | |
| pub const SIGTTIN: u32 = 21; | |
| pub const SIGTTOU: u32 = 22; | |
| pub const SIGURG: u32 = 23; | |
| pub const SIGXCPU: u32 = 24; | |
| pub const SIGXFSZ: u32 = 25; | |
| pub const SIGVTALRM: u32 = 26; | |
| pub const SIGPROF: u32 = 27; | |
| pub const SIGWINCH: u32 = 28; | |
| pub const SIGIO: u32 = 29; | |
| pub const SIGPOLL: u32 = 29; | |
| pub const SIGPWR: u32 = 30; | |
| pub const SIGSYS: u32 = 31; | |
| pub const SIGUNUSED: u32 = 31; | |
| pub const SIGRTMIN: u32 = 32; | |
| pub const SIGRTMAX: u32 = 64; | |
| pub const SA_NOCLDSTOP: u32 = 1; | |
| pub const SA_NOCLDWAIT: u32 = 2; | |
| pub const SA_SIGINFO: u32 = 4; | |
| pub const SA_UNSUPPORTED: u32 = 1024; | |
| pub const SA_EXPOSE_TAGBITS: u32 = 2048; | |
| pub const SA_ONSTACK: u32 = 134217728; | |
| pub const SA_RESTART: u32 = 268435456; | |
| pub const SA_NODEFER: u32 = 1073741824; | |
| pub const SA_RESETHAND: u32 = 2147483648; | |
| pub const SA_NOMASK: u32 = 1073741824; | |
| pub const SA_ONESHOT: u32 = 2147483648; | |
| pub const SIG_BLOCK: u32 = 0; | |
| pub const SIG_UNBLOCK: u32 = 1; | |
| pub const SIG_SETMASK: u32 = 2; | |
| pub const SI_MAX_SIZE: u32 = 128; | |
| pub const SI_USER: u32 = 0; | |
| pub const SI_KERNEL: u32 = 128; | |
| pub const SI_QUEUE: i32 = -1; | |
| pub const SI_TIMER: i32 = -2; | |
| pub const SI_MESGQ: i32 = -3; | |
| pub const SI_ASYNCIO: i32 = -4; | |
| pub const SI_SIGIO: i32 = -5; | |
| pub const SI_TKILL: i32 = -6; | |
| pub const SI_DETHREAD: i32 = -7; | |
| pub const SI_ASYNCNL: i32 = -60; | |
| pub const ILL_ILLOPC: u32 = 1; | |
| pub const ILL_ILLOPN: u32 = 2; | |
| pub const ILL_ILLADR: u32 = 3; | |
| pub const ILL_ILLTRP: u32 = 4; | |
| pub const ILL_PRVOPC: u32 = 5; | |
| pub const ILL_PRVREG: u32 = 6; | |
| pub const ILL_COPROC: u32 = 7; | |
| pub const ILL_BADSTK: u32 = 8; | |
| pub const ILL_BADIADDR: u32 = 9; | |
| pub const __ILL_BREAK: u32 = 10; | |
| pub const __ILL_BNDMOD: u32 = 11; | |
| pub const NSIGILL: u32 = 11; | |
| pub const FPE_INTDIV: u32 = 1; | |
| pub const FPE_INTOVF: u32 = 2; | |
| pub const FPE_FLTDIV: u32 = 3; | |
| pub const FPE_FLTOVF: u32 = 4; | |
| pub const FPE_FLTUND: u32 = 5; | |
| pub const FPE_FLTRES: u32 = 6; | |
| pub const FPE_FLTINV: u32 = 7; | |
| pub const FPE_FLTSUB: u32 = 8; | |
| pub const __FPE_DECOVF: u32 = 9; | |
| pub const __FPE_DECDIV: u32 = 10; | |
| pub const __FPE_DECERR: u32 = 11; | |
| pub const __FPE_INVASC: u32 = 12; | |
| pub const __FPE_INVDEC: u32 = 13; | |
| pub const FPE_FLTUNK: u32 = 14; | |
| pub const FPE_CONDTRAP: u32 = 15; | |
| pub const NSIGFPE: u32 = 15; | |
| pub const SEGV_MAPERR: u32 = 1; | |
| pub const SEGV_ACCERR: u32 = 2; | |
| pub const SEGV_BNDERR: u32 = 3; | |
| pub const SEGV_PKUERR: u32 = 4; | |
| pub const SEGV_ACCADI: u32 = 5; | |
| pub const SEGV_ADIDERR: u32 = 6; | |
| pub const SEGV_ADIPERR: u32 = 7; | |
| pub const SEGV_MTEAERR: u32 = 8; | |
| pub const SEGV_MTESERR: u32 = 9; | |
| pub const SEGV_CPERR: u32 = 10; | |
| pub const NSIGSEGV: u32 = 10; | |
| pub const BUS_ADRALN: u32 = 1; | |
| pub const BUS_ADRERR: u32 = 2; | |
| pub const BUS_OBJERR: u32 = 3; | |
| pub const BUS_MCEERR_AR: u32 = 4; | |
| pub const BUS_MCEERR_AO: u32 = 5; | |
| pub const NSIGBUS: u32 = 5; | |
| pub const TRAP_BRKPT: u32 = 1; | |
| pub const TRAP_TRACE: u32 = 2; | |
| pub const TRAP_BRANCH: u32 = 3; | |
| pub const TRAP_HWBKPT: u32 = 4; | |
| pub const TRAP_UNK: u32 = 5; | |
| pub const TRAP_PERF: u32 = 6; | |
| pub const NSIGTRAP: u32 = 6; | |
| pub const TRAP_PERF_FLAG_ASYNC: u32 = 1; | |
| pub const CLD_EXITED: u32 = 1; | |
| pub const CLD_KILLED: u32 = 2; | |
| pub const CLD_DUMPED: u32 = 3; | |
| pub const CLD_TRAPPED: u32 = 4; | |
| pub const CLD_STOPPED: u32 = 5; | |
| pub const CLD_CONTINUED: u32 = 6; | |
| pub const NSIGCHLD: u32 = 6; | |
| pub const POLL_IN: u32 = 1; | |
| pub const POLL_OUT: u32 = 2; | |
| pub const POLL_MSG: u32 = 3; | |
| pub const POLL_ERR: u32 = 4; | |
| pub const POLL_PRI: u32 = 5; | |
| pub const POLL_HUP: u32 = 6; | |
| pub const NSIGPOLL: u32 = 6; | |
| pub const SYS_SECCOMP: u32 = 1; | |
| pub const SYS_USER_DISPATCH: u32 = 2; | |
| pub const NSIGSYS: u32 = 2; | |
| pub const EMT_TAGOVF: u32 = 1; | |
| pub const NSIGEMT: u32 = 1; | |
| pub const SIGEV_SIGNAL: u32 = 0; | |
| pub const SIGEV_NONE: u32 = 1; | |
| pub const SIGEV_THREAD: u32 = 2; | |
| pub const SIGEV_THREAD_ID: u32 = 4; | |
| pub const SIGEV_MAX_SIZE: u32 = 64; | |
| pub const SS_ONSTACK: u32 = 1; | |
| pub const SS_DISABLE: u32 = 2; | |
| pub const SS_AUTODISARM: u32 = 2147483648; | |
| pub const SS_FLAG_BITS: u32 = 2147483648; | |
| pub const SIGQUEUE_PREALLOC: u32 = 1; | |
| pub const SA_IMMUTABLE: u32 = 8388608; | |
| pub const __ARCH_UAPI_SA_FLAGS: u32 = 67108864; | |
| pub const UAPI_SA_FLAGS: u32 = 3690989575; | |
| pub const ALARMTIMER_STATE_INACTIVE: u32 = 0; | |
| pub const ALARMTIMER_STATE_ENQUEUED: u32 = 1; | |
| pub const CPUCLOCK_PERTHREAD_MASK: u32 = 4; | |
| pub const CPUCLOCK_CLOCK_MASK: u32 = 3; | |
| pub const CPUCLOCK_PROF: u32 = 0; | |
| pub const CPUCLOCK_VIRT: u32 = 1; | |
| pub const CPUCLOCK_SCHED: u32 = 2; | |
| pub const CPUCLOCK_MAX: u32 = 3; | |
| pub const CLOCKFD: u32 = 3; | |
| pub const CLOCKFD_MASK: u32 = 7; | |
| pub const REQUEUE_PENDING: u32 = 1; | |
| pub const MAX_DA_NAME_LEN: u32 = 24; | |
| pub const KM_MAX_IDX: u32 = 16; | |
| pub const TASK_RUNNING: u32 = 0; | |
| pub const TASK_INTERRUPTIBLE: u32 = 1; | |
| pub const TASK_UNINTERRUPTIBLE: u32 = 2; | |
| pub const __TASK_STOPPED: u32 = 4; | |
| pub const __TASK_TRACED: u32 = 8; | |
| pub const EXIT_DEAD: u32 = 16; | |
| pub const EXIT_ZOMBIE: u32 = 32; | |
| pub const EXIT_TRACE: u32 = 48; | |
| pub const TASK_PARKED: u32 = 64; | |
| pub const TASK_DEAD: u32 = 128; | |
| pub const TASK_WAKEKILL: u32 = 256; | |
| pub const TASK_WAKING: u32 = 512; | |
| pub const TASK_NOLOAD: u32 = 1024; | |
| pub const TASK_NEW: u32 = 2048; | |
| pub const TASK_RTLOCK_WAIT: u32 = 4096; | |
| pub const TASK_FREEZABLE: u32 = 8192; | |
| pub const TASK_FROZEN: u32 = 32768; | |
| pub const TASK_STATE_MAX: u32 = 65536; | |
| pub const TASK_ANY: u32 = 65535; | |
| pub const TASK_KILLABLE: u32 = 258; | |
| pub const TASK_STOPPED: u32 = 260; | |
| pub const TASK_TRACED: u32 = 8; | |
| pub const TASK_IDLE: u32 = 1026; | |
| pub const TASK_NORMAL: u32 = 3; | |
| pub const TASK_REPORT: u32 = 127; | |
| pub const SCHED_FIXEDPOINT_SHIFT: u32 = 10; | |
| pub const SCHED_FIXEDPOINT_SCALE: u32 = 1024; | |
| pub const SCHED_CAPACITY_SHIFT: u32 = 10; | |
| pub const SCHED_CAPACITY_SCALE: u32 = 1024; | |
| pub const UTIL_EST_WEIGHT_SHIFT: u32 = 2; | |
| pub const UTIL_AVG_UNCHANGED: u32 = 2147483648; | |
| pub const MAX_LOCK_DEPTH: u32 = 48; | |
| pub const TASK_REPORT_IDLE: u32 = 128; | |
| pub const TASK_REPORT_MAX: u32 = 256; | |
| pub const PF_VCPU: u32 = 1; | |
| pub const PF_IDLE: u32 = 2; | |
| pub const PF_EXITING: u32 = 4; | |
| pub const PF_POSTCOREDUMP: u32 = 8; | |
| pub const PF_IO_WORKER: u32 = 16; | |
| pub const PF_WQ_WORKER: u32 = 32; | |
| pub const PF_FORKNOEXEC: u32 = 64; | |
| pub const PF_MCE_PROCESS: u32 = 128; | |
| pub const PF_SUPERPRIV: u32 = 256; | |
| pub const PF_DUMPCORE: u32 = 512; | |
| pub const PF_SIGNALED: u32 = 1024; | |
| pub const PF_MEMALLOC: u32 = 2048; | |
| pub const PF_NPROC_EXCEEDED: u32 = 4096; | |
| pub const PF_USED_MATH: u32 = 8192; | |
| pub const PF_USER_WORKER: u32 = 16384; | |
| pub const PF_NOFREEZE: u32 = 32768; | |
| pub const PF__HOLE__00010000: u32 = 65536; | |
| pub const PF_KSWAPD: u32 = 131072; | |
| pub const PF_MEMALLOC_NOFS: u32 = 262144; | |
| pub const PF_MEMALLOC_NOIO: u32 = 524288; | |
| pub const PF_LOCAL_THROTTLE: u32 = 1048576; | |
| pub const PF_KTHREAD: u32 = 2097152; | |
| pub const PF_RANDOMIZE: u32 = 4194304; | |
| pub const PF__HOLE__00800000: u32 = 8388608; | |
| pub const PF__HOLE__01000000: u32 = 16777216; | |
| pub const PF__HOLE__02000000: u32 = 33554432; | |
| pub const PF_NO_SETAFFINITY: u32 = 67108864; | |
| pub const PF_MCE_EARLY: u32 = 134217728; | |
| pub const PF_MEMALLOC_PIN: u32 = 268435456; | |
| pub const PF__HOLE__20000000: u32 = 536870912; | |
| pub const PF__HOLE__40000000: u32 = 1073741824; | |
| pub const PF_SUSPEND_TASK: u32 = 2147483648; | |
| pub const PFA_NO_NEW_PRIVS: u32 = 0; | |
| pub const PFA_SPREAD_PAGE: u32 = 1; | |
| pub const PFA_SPREAD_SLAB: u32 = 2; | |
| pub const PFA_SPEC_SSB_DISABLE: u32 = 3; | |
| pub const PFA_SPEC_SSB_FORCE_DISABLE: u32 = 4; | |
| pub const PFA_SPEC_IB_DISABLE: u32 = 5; | |
| pub const PFA_SPEC_IB_FORCE_DISABLE: u32 = 6; | |
| pub const PFA_SPEC_SSB_NOEXEC: u32 = 7; | |
| pub const MIGHT_RESCHED_RCU_SHIFT: u32 = 8; | |
| pub const MIGHT_RESCHED_PREEMPT_MASK: u32 = 255; | |
| pub const PREEMPT_LOCK_RESCHED_OFFSETS: u32 = 1; | |
| pub const BITS_PER_XA_VALUE: u32 = 63; | |
| pub const XA_MAX_MARKS: u32 = 3; | |
| pub const RADIX_TREE_ENTRY_MASK: u32 = 3; | |
| pub const RADIX_TREE_INTERNAL_NODE: u32 = 2; | |
| pub const RADIX_TREE_MAX_TAGS: u32 = 3; | |
| pub const _LINUX_CAPABILITY_VERSION_1: u32 = 429392688; | |
| pub const _LINUX_CAPABILITY_U32S_1: u32 = 1; | |
| pub const _LINUX_CAPABILITY_VERSION_2: u32 = 537333798; | |
| pub const _LINUX_CAPABILITY_U32S_2: u32 = 2; | |
| pub const _LINUX_CAPABILITY_VERSION_3: u32 = 537396514; | |
| pub const _LINUX_CAPABILITY_U32S_3: u32 = 2; | |
| pub const VFS_CAP_REVISION_MASK: u32 = 4278190080; | |
| pub const VFS_CAP_REVISION_SHIFT: u32 = 24; | |
| pub const VFS_CAP_FLAGS_MASK: i64 = -4278190081; | |
| pub const VFS_CAP_FLAGS_EFFECTIVE: u32 = 1; | |
| pub const VFS_CAP_REVISION_1: u32 = 16777216; | |
| pub const VFS_CAP_U32_1: u32 = 1; | |
| pub const VFS_CAP_REVISION_2: u32 = 33554432; | |
| pub const VFS_CAP_U32_2: u32 = 2; | |
| pub const VFS_CAP_REVISION_3: u32 = 50331648; | |
| pub const VFS_CAP_U32_3: u32 = 2; | |
| pub const VFS_CAP_U32: u32 = 2; | |
| pub const VFS_CAP_REVISION: u32 = 50331648; | |
| pub const CAP_CHOWN: u32 = 0; | |
| pub const CAP_DAC_OVERRIDE: u32 = 1; | |
| pub const CAP_DAC_READ_SEARCH: u32 = 2; | |
| pub const CAP_FOWNER: u32 = 3; | |
| pub const CAP_FSETID: u32 = 4; | |
| pub const CAP_KILL: u32 = 5; | |
| pub const CAP_SETGID: u32 = 6; | |
| pub const CAP_SETUID: u32 = 7; | |
| pub const CAP_SETPCAP: u32 = 8; | |
| pub const CAP_LINUX_IMMUTABLE: u32 = 9; | |
| pub const CAP_NET_BIND_SERVICE: u32 = 10; | |
| pub const CAP_NET_BROADCAST: u32 = 11; | |
| pub const CAP_NET_ADMIN: u32 = 12; | |
| pub const CAP_NET_RAW: u32 = 13; | |
| pub const CAP_IPC_LOCK: u32 = 14; | |
| pub const CAP_IPC_OWNER: u32 = 15; | |
| pub const CAP_SYS_MODULE: u32 = 16; | |
| pub const CAP_SYS_RAWIO: u32 = 17; | |
| pub const CAP_SYS_CHROOT: u32 = 18; | |
| pub const CAP_SYS_PTRACE: u32 = 19; | |
| pub const CAP_SYS_PACCT: u32 = 20; | |
| pub const CAP_SYS_ADMIN: u32 = 21; | |
| pub const CAP_SYS_BOOT: u32 = 22; | |
| pub const CAP_SYS_NICE: u32 = 23; | |
| pub const CAP_SYS_RESOURCE: u32 = 24; | |
| pub const CAP_SYS_TIME: u32 = 25; | |
| pub const CAP_SYS_TTY_CONFIG: u32 = 26; | |
| pub const CAP_MKNOD: u32 = 27; | |
| pub const CAP_LEASE: u32 = 28; | |
| pub const CAP_AUDIT_WRITE: u32 = 29; | |
| pub const CAP_AUDIT_CONTROL: u32 = 30; | |
| pub const CAP_SETFCAP: u32 = 31; | |
| pub const CAP_MAC_OVERRIDE: u32 = 32; | |
| pub const CAP_MAC_ADMIN: u32 = 33; | |
| pub const CAP_SYSLOG: u32 = 34; | |
| pub const CAP_WAKE_ALARM: u32 = 35; | |
| pub const CAP_BLOCK_SUSPEND: u32 = 36; | |
| pub const CAP_AUDIT_READ: u32 = 37; | |
| pub const CAP_PERFMON: u32 = 38; | |
| pub const CAP_BPF: u32 = 39; | |
| pub const CAP_CHECKPOINT_RESTORE: u32 = 40; | |
| pub const CAP_LAST_CAP: u32 = 40; | |
| pub const _KERNEL_CAPABILITY_VERSION: u32 = 537396514; | |
| pub const O_DIRECTORY: u32 = 16384; | |
| pub const O_NOFOLLOW: u32 = 32768; | |
| pub const O_DIRECT: u32 = 65536; | |
| pub const O_LARGEFILE: u32 = 131072; | |
| pub const O_ACCMODE: u32 = 3; | |
| pub const O_RDONLY: u32 = 0; | |
| pub const O_WRONLY: u32 = 1; | |
| pub const O_RDWR: u32 = 2; | |
| pub const O_CREAT: u32 = 64; | |
| pub const O_EXCL: u32 = 128; | |
| pub const O_NOCTTY: u32 = 256; | |
| pub const O_TRUNC: u32 = 512; | |
| pub const O_APPEND: u32 = 1024; | |
| pub const O_NONBLOCK: u32 = 2048; | |
| pub const O_DSYNC: u32 = 4096; | |
| pub const FASYNC: u32 = 8192; | |
| pub const O_NOATIME: u32 = 262144; | |
| pub const O_CLOEXEC: u32 = 524288; | |
| pub const __O_SYNC: u32 = 1048576; | |
| pub const O_SYNC: u32 = 1052672; | |
| pub const O_PATH: u32 = 2097152; | |
| pub const __O_TMPFILE: u32 = 4194304; | |
| pub const O_TMPFILE: u32 = 4210688; | |
| pub const O_NDELAY: u32 = 2048; | |
| pub const F_DUPFD: u32 = 0; | |
| pub const F_GETFD: u32 = 1; | |
| pub const F_SETFD: u32 = 2; | |
| pub const F_GETFL: u32 = 3; | |
| pub const F_SETFL: u32 = 4; | |
| pub const F_GETLK: u32 = 5; | |
| pub const F_SETLK: u32 = 6; | |
| pub const F_SETLKW: u32 = 7; | |
| pub const F_SETOWN: u32 = 8; | |
| pub const F_GETOWN: u32 = 9; | |
| pub const F_SETSIG: u32 = 10; | |
| pub const F_GETSIG: u32 = 11; | |
| pub const F_GETLK64: u32 = 12; | |
| pub const F_SETLK64: u32 = 13; | |
| pub const F_SETLKW64: u32 = 14; | |
| pub const F_SETOWN_EX: u32 = 15; | |
| pub const F_GETOWN_EX: u32 = 16; | |
| pub const F_GETOWNER_UIDS: u32 = 17; | |
| pub const F_OFD_GETLK: u32 = 36; | |
| pub const F_OFD_SETLK: u32 = 37; | |
| pub const F_OFD_SETLKW: u32 = 38; | |
| pub const F_OWNER_TID: u32 = 0; | |
| pub const F_OWNER_PID: u32 = 1; | |
| pub const F_OWNER_PGRP: u32 = 2; | |
| pub const FD_CLOEXEC: u32 = 1; | |
| pub const F_RDLCK: u32 = 0; | |
| pub const F_WRLCK: u32 = 1; | |
| pub const F_UNLCK: u32 = 2; | |
| pub const F_EXLCK: u32 = 4; | |
| pub const F_SHLCK: u32 = 8; | |
| pub const LOCK_SH: u32 = 1; | |
| pub const LOCK_EX: u32 = 2; | |
| pub const LOCK_NB: u32 = 4; | |
| pub const LOCK_UN: u32 = 8; | |
| pub const LOCK_MAND: u32 = 32; | |
| pub const LOCK_READ: u32 = 64; | |
| pub const LOCK_WRITE: u32 = 128; | |
| pub const LOCK_RW: u32 = 192; | |
| pub const F_LINUX_SPECIFIC_BASE: u32 = 1024; | |
| pub const RESOLVE_NO_XDEV: u32 = 1; | |
| pub const RESOLVE_NO_MAGICLINKS: u32 = 2; | |
| pub const RESOLVE_NO_SYMLINKS: u32 = 4; | |
| pub const RESOLVE_BENEATH: u32 = 8; | |
| pub const RESOLVE_IN_ROOT: u32 = 16; | |
| pub const RESOLVE_CACHED: u32 = 32; | |
| pub const F_SETLEASE: u32 = 1024; | |
| pub const F_GETLEASE: u32 = 1025; | |
| pub const F_CANCELLK: u32 = 1029; | |
| pub const F_DUPFD_CLOEXEC: u32 = 1030; | |
| pub const F_NOTIFY: u32 = 1026; | |
| pub const F_SETPIPE_SZ: u32 = 1031; | |
| pub const F_GETPIPE_SZ: u32 = 1032; | |
| pub const F_ADD_SEALS: u32 = 1033; | |
| pub const F_GET_SEALS: u32 = 1034; | |
| pub const F_SEAL_SEAL: u32 = 1; | |
| pub const F_SEAL_SHRINK: u32 = 2; | |
| pub const F_SEAL_GROW: u32 = 4; | |
| pub const F_SEAL_WRITE: u32 = 8; | |
| pub const F_SEAL_FUTURE_WRITE: u32 = 16; | |
| pub const F_SEAL_EXEC: u32 = 32; | |
| pub const F_GET_RW_HINT: u32 = 1035; | |
| pub const F_SET_RW_HINT: u32 = 1036; | |
| pub const F_GET_FILE_RW_HINT: u32 = 1037; | |
| pub const F_SET_FILE_RW_HINT: u32 = 1038; | |
| pub const RWH_WRITE_LIFE_NOT_SET: u32 = 0; | |
| pub const RWH_WRITE_LIFE_NONE: u32 = 1; | |
| pub const RWH_WRITE_LIFE_SHORT: u32 = 2; | |
| pub const RWH_WRITE_LIFE_MEDIUM: u32 = 3; | |
| pub const RWH_WRITE_LIFE_LONG: u32 = 4; | |
| pub const RWH_WRITE_LIFE_EXTREME: u32 = 5; | |
| pub const RWF_WRITE_LIFE_NOT_SET: u32 = 0; | |
| pub const DN_ACCESS: u32 = 1; | |
| pub const DN_MODIFY: u32 = 2; | |
| pub const DN_CREATE: u32 = 4; | |
| pub const DN_DELETE: u32 = 8; | |
| pub const DN_RENAME: u32 = 16; | |
| pub const DN_ATTRIB: u32 = 32; | |
| pub const DN_MULTISHOT: u32 = 2147483648; | |
| pub const AT_FDCWD: i32 = -100; | |
| pub const AT_SYMLINK_NOFOLLOW: u32 = 256; | |
| pub const AT_EACCESS: u32 = 512; | |
| pub const AT_REMOVEDIR: u32 = 512; | |
| pub const AT_SYMLINK_FOLLOW: u32 = 1024; | |
| pub const AT_NO_AUTOMOUNT: u32 = 2048; | |
| pub const AT_EMPTY_PATH: u32 = 4096; | |
| pub const AT_STATX_SYNC_TYPE: u32 = 24576; | |
| pub const AT_STATX_SYNC_AS_STAT: u32 = 0; | |
| pub const AT_STATX_FORCE_SYNC: u32 = 8192; | |
| pub const AT_STATX_DONT_SYNC: u32 = 16384; | |
| pub const AT_RECURSIVE: u32 = 32768; | |
| pub const AT_HANDLE_FID: u32 = 512; | |
| pub const AT_GETATTR_NOSEC: u32 = 2147483648; | |
| pub const VALID_OPEN_FLAGS: u32 = 8388547; | |
| pub const VALID_RESOLVE_FLAGS: u32 = 63; | |
| pub const OPEN_HOW_SIZE_VER0: u32 = 24; | |
| pub const OPEN_HOW_SIZE_LATEST: u32 = 24; | |
| pub const SIGEMT_MASK: u32 = 0; | |
| pub const JOBCTL_STOP_SIGMASK: u32 = 65535; | |
| pub const JOBCTL_STOP_DEQUEUED_BIT: u32 = 16; | |
| pub const JOBCTL_STOP_PENDING_BIT: u32 = 17; | |
| pub const JOBCTL_STOP_CONSUME_BIT: u32 = 18; | |
| pub const JOBCTL_TRAP_STOP_BIT: u32 = 19; | |
| pub const JOBCTL_TRAP_NOTIFY_BIT: u32 = 20; | |
| pub const JOBCTL_TRAPPING_BIT: u32 = 21; | |
| pub const JOBCTL_LISTENING_BIT: u32 = 22; | |
| pub const JOBCTL_TRAP_FREEZE_BIT: u32 = 23; | |
| pub const JOBCTL_PTRACE_FROZEN_BIT: u32 = 24; | |
| pub const JOBCTL_STOPPED_BIT: u32 = 26; | |
| pub const JOBCTL_TRACED_BIT: u32 = 27; | |
| pub const JOBCTL_STOP_DEQUEUED: u32 = 65536; | |
| pub const JOBCTL_STOP_PENDING: u32 = 131072; | |
| pub const JOBCTL_STOP_CONSUME: u32 = 262144; | |
| pub const JOBCTL_TRAP_STOP: u32 = 524288; | |
| pub const JOBCTL_TRAP_NOTIFY: u32 = 1048576; | |
| pub const JOBCTL_TRAPPING: u32 = 2097152; | |
| pub const JOBCTL_LISTENING: u32 = 4194304; | |
| pub const JOBCTL_TRAP_FREEZE: u32 = 8388608; | |
| pub const JOBCTL_PTRACE_FROZEN: u32 = 16777216; | |
| pub const JOBCTL_STOPPED: u32 = 67108864; | |
| pub const JOBCTL_TRACED: u32 = 134217728; | |
| pub const JOBCTL_TRAP_MASK: u32 = 1572864; | |
| pub const JOBCTL_PENDING_MASK: u32 = 1703936; | |
| pub const SWAPPER_PGTABLE_LEVELS: u32 = 2; | |
| pub const EARLY_KASLR: u32 = 0; | |
| pub const EX_TYPE_NONE: u32 = 0; | |
| pub const EX_TYPE_BPF: u32 = 1; | |
| pub const EX_TYPE_UACCESS_ERR_ZERO: u32 = 2; | |
| pub const EX_TYPE_KACCESS_ERR_ZERO: u32 = 3; | |
| pub const EX_TYPE_LOAD_UNALIGNED_ZEROPAD: u32 = 4; | |
| pub const EX_DATA_REG_ERR_SHIFT: u32 = 0; | |
| pub const EX_DATA_REG_ZERO_SHIFT: u32 = 5; | |
| pub const EX_DATA_REG_DATA_SHIFT: u32 = 0; | |
| pub const EX_DATA_REG_ADDR_SHIFT: u32 = 5; | |
| pub const PG_mte_tagged: u32 = 0; | |
| pub const CLONE_LEGACY_FLAGS: u32 = 4294967295; | |
| pub const SIGNAL_STOP_STOPPED: u32 = 1; | |
| pub const SIGNAL_STOP_CONTINUED: u32 = 2; | |
| pub const SIGNAL_GROUP_EXIT: u32 = 4; | |
| pub const SIGNAL_CLD_STOPPED: u32 = 16; | |
| pub const SIGNAL_CLD_CONTINUED: u32 = 32; | |
| pub const SIGNAL_CLD_MASK: u32 = 48; | |
| pub const SIGNAL_UNKILLABLE: u32 = 64; | |
| pub const SIGNAL_STOP_MASK: u32 = 51; | |
| pub const UUID_SIZE: u32 = 16; | |
| pub const UUID_STRING_LEN: u32 = 36; | |
| pub const RR_TIMESLICE: u32 = 25; | |
| pub const IOPRIO_CLASS_SHIFT: u32 = 13; | |
| pub const IOPRIO_NR_CLASSES: u32 = 8; | |
| pub const IOPRIO_CLASS_MASK: u32 = 7; | |
| pub const IOPRIO_PRIO_MASK: u32 = 8191; | |
| pub const IOPRIO_LEVEL_NR_BITS: u32 = 3; | |
| pub const IOPRIO_NR_LEVELS: u32 = 8; | |
| pub const IOPRIO_LEVEL_MASK: u32 = 7; | |
| pub const IOPRIO_BE_NR: u32 = 8; | |
| pub const IOPRIO_NORM: u32 = 4; | |
| pub const IOPRIO_BE_NORM: u32 = 4; | |
| pub const IOPRIO_HINT_SHIFT: u32 = 3; | |
| pub const IOPRIO_HINT_NR_BITS: u32 = 10; | |
| pub const IOPRIO_NR_HINTS: u32 = 1024; | |
| pub const IOPRIO_HINT_MASK: u32 = 1023; | |
| pub const S_DT_SHIFT: u32 = 12; | |
| pub const S_DT_MASK: u32 = 15; | |
| pub const DT_UNKNOWN: u32 = 0; | |
| pub const DT_FIFO: u32 = 1; | |
| pub const DT_CHR: u32 = 2; | |
| pub const DT_DIR: u32 = 4; | |
| pub const DT_BLK: u32 = 6; | |
| pub const DT_REG: u32 = 8; | |
| pub const DT_LNK: u32 = 10; | |
| pub const DT_SOCK: u32 = 12; | |
| pub const DT_WHT: u32 = 14; | |
| pub const DT_MAX: u32 = 16; | |
| pub const FT_UNKNOWN: u32 = 0; | |
| pub const FT_REG_FILE: u32 = 1; | |
| pub const FT_DIR: u32 = 2; | |
| pub const FT_CHRDEV: u32 = 3; | |
| pub const FT_BLKDEV: u32 = 4; | |
| pub const FT_FIFO: u32 = 5; | |
| pub const FT_SOCK: u32 = 6; | |
| pub const FT_SYMLINK: u32 = 7; | |
| pub const FT_MAX: u32 = 8; | |
| pub const MNT_NOSUID: u32 = 1; | |
| pub const MNT_NODEV: u32 = 2; | |
| pub const MNT_NOEXEC: u32 = 4; | |
| pub const MNT_NOATIME: u32 = 8; | |
| pub const MNT_NODIRATIME: u32 = 16; | |
| pub const MNT_RELATIME: u32 = 32; | |
| pub const MNT_READONLY: u32 = 64; | |
| pub const MNT_NOSYMFOLLOW: u32 = 128; | |
| pub const MNT_SHRINKABLE: u32 = 256; | |
| pub const MNT_WRITE_HOLD: u32 = 512; | |
| pub const MNT_SHARED: u32 = 4096; | |
| pub const MNT_UNBINDABLE: u32 = 8192; | |
| pub const MNT_SHARED_MASK: u32 = 8192; | |
| pub const MNT_USER_SETTABLE_MASK: u32 = 255; | |
| pub const MNT_ATIME_MASK: u32 = 56; | |
| pub const MNT_INTERNAL: u32 = 16384; | |
| pub const MNT_LOCK_ATIME: u32 = 262144; | |
| pub const MNT_LOCK_NOEXEC: u32 = 524288; | |
| pub const MNT_LOCK_NOSUID: u32 = 1048576; | |
| pub const MNT_LOCK_NODEV: u32 = 2097152; | |
| pub const MNT_LOCK_READONLY: u32 = 4194304; | |
| pub const MNT_LOCKED: u32 = 8388608; | |
| pub const MNT_DOOMED: u32 = 16777216; | |
| pub const MNT_SYNC_UMOUNT: u32 = 33554432; | |
| pub const MNT_MARKED: u32 = 67108864; | |
| pub const MNT_UMOUNT: u32 = 134217728; | |
| pub const MNT_CURSOR: u32 = 268435456; | |
| pub const SLAB_DEBUG_OBJECTS: u32 = 0; | |
| pub const SLAB_FAILSLAB: u32 = 0; | |
| pub const SLAB_ACCOUNT: u32 = 0; | |
| pub const SLAB_KASAN: u32 = 0; | |
| pub const SLAB_SKIP_KFENCE: u32 = 0; | |
| pub const KMALLOC_SHIFT_HIGH: u32 = 13; | |
| pub const KMALLOC_SHIFT_MAX: u32 = 22; | |
| pub const KMALLOC_SHIFT_LOW: u32 = 3; | |
| pub const KMALLOC_MAX_SIZE: u32 = 4194304; | |
| pub const KMALLOC_MAX_CACHE_SIZE: u32 = 8192; | |
| pub const KMALLOC_MAX_ORDER: u32 = 10; | |
| pub const KMALLOC_MIN_SIZE: u32 = 8; | |
| pub const RANDOM_KMALLOC_CACHES_NR: u32 = 0; | |
| pub const INR_OPEN_CUR: u32 = 1024; | |
| pub const INR_OPEN_MAX: u32 = 4096; | |
| pub const BLOCK_SIZE_BITS: u32 = 10; | |
| pub const BLOCK_SIZE: u32 = 1024; | |
| pub const SEEK_SET: u32 = 0; | |
| pub const SEEK_CUR: u32 = 1; | |
| pub const SEEK_END: u32 = 2; | |
| pub const SEEK_DATA: u32 = 3; | |
| pub const SEEK_HOLE: u32 = 4; | |
| pub const SEEK_MAX: u32 = 4; | |
| pub const RENAME_NOREPLACE: u32 = 1; | |
| pub const RENAME_EXCHANGE: u32 = 2; | |
| pub const RENAME_WHITEOUT: u32 = 4; | |
| pub const FILE_DEDUPE_RANGE_SAME: u32 = 0; | |
| pub const FILE_DEDUPE_RANGE_DIFFERS: u32 = 1; | |
| pub const NR_FILE: u32 = 8192; | |
| pub const FS_XFLAG_REALTIME: u32 = 1; | |
| pub const FS_XFLAG_PREALLOC: u32 = 2; | |
| pub const FS_XFLAG_IMMUTABLE: u32 = 8; | |
| pub const FS_XFLAG_APPEND: u32 = 16; | |
| pub const FS_XFLAG_SYNC: u32 = 32; | |
| pub const FS_XFLAG_NOATIME: u32 = 64; | |
| pub const FS_XFLAG_NODUMP: u32 = 128; | |
| pub const FS_XFLAG_RTINHERIT: u32 = 256; | |
| pub const FS_XFLAG_PROJINHERIT: u32 = 512; | |
| pub const FS_XFLAG_NOSYMLINKS: u32 = 1024; | |
| pub const FS_XFLAG_EXTSIZE: u32 = 2048; | |
| pub const FS_XFLAG_EXTSZINHERIT: u32 = 4096; | |
| pub const FS_XFLAG_NODEFRAG: u32 = 8192; | |
| pub const FS_XFLAG_FILESTREAM: u32 = 16384; | |
| pub const FS_XFLAG_DAX: u32 = 32768; | |
| pub const FS_XFLAG_COWEXTSIZE: u32 = 65536; | |
| pub const FS_XFLAG_HASATTR: u32 = 2147483648; | |
| pub const BMAP_IOCTL: u32 = 1; | |
| pub const FSLABEL_MAX: u32 = 256; | |
| pub const FS_SECRM_FL: u32 = 1; | |
| pub const FS_UNRM_FL: u32 = 2; | |
| pub const FS_COMPR_FL: u32 = 4; | |
| pub const FS_SYNC_FL: u32 = 8; | |
| pub const FS_IMMUTABLE_FL: u32 = 16; | |
| pub const FS_APPEND_FL: u32 = 32; | |
| pub const FS_NODUMP_FL: u32 = 64; | |
| pub const FS_NOATIME_FL: u32 = 128; | |
| pub const FS_DIRTY_FL: u32 = 256; | |
| pub const FS_COMPRBLK_FL: u32 = 512; | |
| pub const FS_NOCOMP_FL: u32 = 1024; | |
| pub const FS_ENCRYPT_FL: u32 = 2048; | |
| pub const FS_BTREE_FL: u32 = 4096; | |
| pub const FS_INDEX_FL: u32 = 4096; | |
| pub const FS_IMAGIC_FL: u32 = 8192; | |
| pub const FS_JOURNAL_DATA_FL: u32 = 16384; | |
| pub const FS_NOTAIL_FL: u32 = 32768; | |
| pub const FS_DIRSYNC_FL: u32 = 65536; | |
| pub const FS_TOPDIR_FL: u32 = 131072; | |
| pub const FS_HUGE_FILE_FL: u32 = 262144; | |
| pub const FS_EXTENT_FL: u32 = 524288; | |
| pub const FS_VERITY_FL: u32 = 1048576; | |
| pub const FS_EA_INODE_FL: u32 = 2097152; | |
| pub const FS_EOFBLOCKS_FL: u32 = 4194304; | |
| pub const FS_NOCOW_FL: u32 = 8388608; | |
| pub const FS_DAX_FL: u32 = 33554432; | |
| pub const FS_INLINE_DATA_FL: u32 = 268435456; | |
| pub const FS_PROJINHERIT_FL: u32 = 536870912; | |
| pub const FS_CASEFOLD_FL: u32 = 1073741824; | |
| pub const FS_RESERVED_FL: u32 = 2147483648; | |
| pub const FS_FL_USER_VISIBLE: u32 = 253951; | |
| pub const FS_FL_USER_MODIFIABLE: u32 = 229631; | |
| pub const SYNC_FILE_RANGE_WAIT_BEFORE: u32 = 1; | |
| pub const SYNC_FILE_RANGE_WRITE: u32 = 2; | |
| pub const SYNC_FILE_RANGE_WAIT_AFTER: u32 = 4; | |
| pub const SYNC_FILE_RANGE_WRITE_AND_WAIT: u32 = 7; | |
| pub const PAGE_IS_WPALLOWED: u32 = 1; | |
| pub const PAGE_IS_WRITTEN: u32 = 2; | |
| pub const PAGE_IS_FILE: u32 = 4; | |
| pub const PAGE_IS_PRESENT: u32 = 8; | |
| pub const PAGE_IS_SWAPPED: u32 = 16; | |
| pub const PAGE_IS_PFNZERO: u32 = 32; | |
| pub const PAGE_IS_HUGE: u32 = 64; | |
| pub const PM_SCAN_WP_MATCHING: u32 = 1; | |
| pub const PM_SCAN_CHECK_WPASYNC: u32 = 2; | |
| pub const MAY_EXEC: u32 = 1; | |
| pub const MAY_WRITE: u32 = 2; | |
| pub const MAY_READ: u32 = 4; | |
| pub const MAY_APPEND: u32 = 8; | |
| pub const MAY_ACCESS: u32 = 16; | |
| pub const MAY_OPEN: u32 = 32; | |
| pub const MAY_CHDIR: u32 = 64; | |
| pub const MAY_NOT_BLOCK: u32 = 128; | |
| pub const ATTR_MODE: u32 = 1; | |
| pub const ATTR_UID: u32 = 2; | |
| pub const ATTR_GID: u32 = 4; | |
| pub const ATTR_SIZE: u32 = 8; | |
| pub const ATTR_ATIME: u32 = 16; | |
| pub const ATTR_MTIME: u32 = 32; | |
| pub const ATTR_CTIME: u32 = 64; | |
| pub const ATTR_ATIME_SET: u32 = 128; | |
| pub const ATTR_MTIME_SET: u32 = 256; | |
| pub const ATTR_FORCE: u32 = 512; | |
| pub const ATTR_KILL_SUID: u32 = 2048; | |
| pub const ATTR_KILL_SGID: u32 = 4096; | |
| pub const ATTR_FILE: u32 = 8192; | |
| pub const ATTR_KILL_PRIV: u32 = 16384; | |
| pub const ATTR_OPEN: u32 = 32768; | |
| pub const ATTR_TIMES_SET: u32 = 65536; | |
| pub const ATTR_TOUCH: u32 = 131072; | |
| pub const WHITEOUT_MODE: u32 = 0; | |
| pub const WHITEOUT_DEV: u32 = 0; | |
| pub const XQM_USRQUOTA: u32 = 0; | |
| pub const XQM_GRPQUOTA: u32 = 1; | |
| pub const XQM_PRJQUOTA: u32 = 2; | |
| pub const XQM_MAXQUOTAS: u32 = 3; | |
| pub const FS_DQUOT_VERSION: u32 = 1; | |
| pub const FS_DQ_ISOFT: u32 = 1; | |
| pub const FS_DQ_IHARD: u32 = 2; | |
| pub const FS_DQ_BSOFT: u32 = 4; | |
| pub const FS_DQ_BHARD: u32 = 8; | |
| pub const FS_DQ_RTBSOFT: u32 = 16; | |
| pub const FS_DQ_RTBHARD: u32 = 32; | |
| pub const FS_DQ_LIMIT_MASK: u32 = 63; | |
| pub const FS_DQ_BTIMER: u32 = 64; | |
| pub const FS_DQ_ITIMER: u32 = 128; | |
| pub const FS_DQ_RTBTIMER: u32 = 256; | |
| pub const FS_DQ_TIMER_MASK: u32 = 448; | |
| pub const FS_DQ_BWARNS: u32 = 512; | |
| pub const FS_DQ_IWARNS: u32 = 1024; | |
| pub const FS_DQ_RTBWARNS: u32 = 2048; | |
| pub const FS_DQ_WARNS_MASK: u32 = 3584; | |
| pub const FS_DQ_BCOUNT: u32 = 4096; | |
| pub const FS_DQ_ICOUNT: u32 = 8192; | |
| pub const FS_DQ_RTBCOUNT: u32 = 16384; | |
| pub const FS_DQ_ACCT_MASK: u32 = 28672; | |
| pub const FS_DQ_BIGTIME: u32 = 32768; | |
| pub const FS_QUOTA_UDQ_ACCT: u32 = 1; | |
| pub const FS_QUOTA_UDQ_ENFD: u32 = 2; | |
| pub const FS_QUOTA_GDQ_ACCT: u32 = 4; | |
| pub const FS_QUOTA_GDQ_ENFD: u32 = 8; | |
| pub const FS_QUOTA_PDQ_ACCT: u32 = 16; | |
| pub const FS_QUOTA_PDQ_ENFD: u32 = 32; | |
| pub const FS_USER_QUOTA: u32 = 1; | |
| pub const FS_PROJ_QUOTA: u32 = 2; | |
| pub const FS_GROUP_QUOTA: u32 = 4; | |
| pub const FS_QSTAT_VERSION: u32 = 1; | |
| pub const FS_QSTATV_VERSION1: u32 = 1; | |
| pub const V1_INIT_ALLOC: u32 = 1; | |
| pub const V1_INIT_REWRITE: u32 = 1; | |
| pub const V1_DEL_ALLOC: u32 = 0; | |
| pub const V1_DEL_REWRITE: u32 = 2; | |
| pub const QTREE_INIT_ALLOC: u32 = 4; | |
| pub const QTREE_INIT_REWRITE: u32 = 2; | |
| pub const QTREE_DEL_ALLOC: u32 = 0; | |
| pub const QTREE_DEL_REWRITE: u32 = 6; | |
| pub const V2_INIT_ALLOC: u32 = 4; | |
| pub const V2_INIT_REWRITE: u32 = 2; | |
| pub const V2_DEL_ALLOC: u32 = 0; | |
| pub const V2_DEL_REWRITE: u32 = 6; | |
| pub const OVERFLOW_PROJID: u32 = 65534; | |
| pub const __DQUOT_VERSION__: &[u8; 12usize] = b"dquot_6.6.0\0"; | |
| pub const MAXQUOTAS: u32 = 3; | |
| pub const USRQUOTA: u32 = 0; | |
| pub const GRPQUOTA: u32 = 1; | |
| pub const PRJQUOTA: u32 = 2; | |
| pub const SUBCMDMASK: u32 = 255; | |
| pub const SUBCMDSHIFT: u32 = 8; | |
| pub const Q_SYNC: u32 = 8388609; | |
| pub const Q_QUOTAON: u32 = 8388610; | |
| pub const Q_QUOTAOFF: u32 = 8388611; | |
| pub const Q_GETFMT: u32 = 8388612; | |
| pub const Q_GETINFO: u32 = 8388613; | |
| pub const Q_SETINFO: u32 = 8388614; | |
| pub const Q_GETQUOTA: u32 = 8388615; | |
| pub const Q_SETQUOTA: u32 = 8388616; | |
| pub const Q_GETNEXTQUOTA: u32 = 8388617; | |
| pub const QFMT_VFS_OLD: u32 = 1; | |
| pub const QFMT_VFS_V0: u32 = 2; | |
| pub const QFMT_OCFS2: u32 = 3; | |
| pub const QFMT_VFS_V1: u32 = 4; | |
| pub const QFMT_SHMEM: u32 = 5; | |
| pub const QIF_DQBLKSIZE_BITS: u32 = 10; | |
| pub const QIF_DQBLKSIZE: u32 = 1024; | |
| pub const IIF_BGRACE: u32 = 1; | |
| pub const IIF_IGRACE: u32 = 2; | |
| pub const IIF_FLAGS: u32 = 4; | |
| pub const IIF_ALL: u32 = 7; | |
| pub const QUOTA_NL_NOWARN: u32 = 0; | |
| pub const QUOTA_NL_IHARDWARN: u32 = 1; | |
| pub const QUOTA_NL_ISOFTLONGWARN: u32 = 2; | |
| pub const QUOTA_NL_ISOFTWARN: u32 = 3; | |
| pub const QUOTA_NL_BHARDWARN: u32 = 4; | |
| pub const QUOTA_NL_BSOFTLONGWARN: u32 = 5; | |
| pub const QUOTA_NL_BSOFTWARN: u32 = 6; | |
| pub const QUOTA_NL_IHARDBELOW: u32 = 7; | |
| pub const QUOTA_NL_ISOFTBELOW: u32 = 8; | |
| pub const QUOTA_NL_BHARDBELOW: u32 = 9; | |
| pub const QUOTA_NL_BSOFTBELOW: u32 = 10; | |
| pub const QTYPE_MASK_USR: u32 = 1; | |
| pub const QTYPE_MASK_GRP: u32 = 2; | |
| pub const QTYPE_MASK_PRJ: u32 = 4; | |
| pub const DQ_MOD_B: u32 = 0; | |
| pub const DQ_BLKS_B: u32 = 1; | |
| pub const DQ_INODES_B: u32 = 2; | |
| pub const DQ_FAKE_B: u32 = 3; | |
| pub const DQ_READ_B: u32 = 4; | |
| pub const DQ_ACTIVE_B: u32 = 5; | |
| pub const DQ_RELEASING_B: u32 = 6; | |
| pub const DQ_LASTSET_B: u32 = 7; | |
| pub const QC_INO_SOFT: u32 = 1; | |
| pub const QC_INO_HARD: u32 = 2; | |
| pub const QC_SPC_SOFT: u32 = 4; | |
| pub const QC_SPC_HARD: u32 = 8; | |
| pub const QC_RT_SPC_SOFT: u32 = 16; | |
| pub const QC_RT_SPC_HARD: u32 = 32; | |
| pub const QC_LIMIT_MASK: u32 = 63; | |
| pub const QC_SPC_TIMER: u32 = 64; | |
| pub const QC_INO_TIMER: u32 = 128; | |
| pub const QC_RT_SPC_TIMER: u32 = 256; | |
| pub const QC_TIMER_MASK: u32 = 448; | |
| pub const QC_SPC_WARNS: u32 = 512; | |
| pub const QC_INO_WARNS: u32 = 1024; | |
| pub const QC_RT_SPC_WARNS: u32 = 2048; | |
| pub const QC_WARNS_MASK: u32 = 3584; | |
| pub const QC_SPACE: u32 = 4096; | |
| pub const QC_INO_COUNT: u32 = 8192; | |
| pub const QC_RT_SPACE: u32 = 16384; | |
| pub const QC_ACCT_MASK: u32 = 28672; | |
| pub const QC_FLAGS: u32 = 32768; | |
| pub const QCI_SYSFILE: u32 = 1; | |
| pub const QCI_ROOT_SQUASH: u32 = 2; | |
| pub const QCI_ACCT_ENABLED: u32 = 4; | |
| pub const QCI_LIMITS_ENFORCED: u32 = 8; | |
| pub const FILESYSTEM_MAX_STACK_DEPTH: u32 = 2; | |
| pub const IOCB_EVENTFD: u32 = 65536; | |
| pub const IOCB_DIRECT: u32 = 131072; | |
| pub const IOCB_WRITE: u32 = 262144; | |
| pub const IOCB_WAITQ: u32 = 524288; | |
| pub const IOCB_NOIO: u32 = 1048576; | |
| pub const IOCB_ALLOC_CACHE: u32 = 2097152; | |
| pub const IOCB_DIO_CALLER_COMP: u32 = 4194304; | |
| pub const IOP_FASTPERM: u32 = 1; | |
| pub const IOP_LOOKUP: u32 = 2; | |
| pub const IOP_NOFOLLOW: u32 = 4; | |
| pub const IOP_XATTR: u32 = 8; | |
| pub const IOP_DEFAULT_READLINK: u32 = 16; | |
| pub const MAX_NON_LFS: u32 = 2147483647; | |
| pub const FASYNC_MAGIC: u32 = 17921; | |
| pub const SB_ENC_STRICT_MODE_FL: u32 = 1; | |
| pub const MNT_FORCE: u32 = 1; | |
| pub const MNT_DETACH: u32 = 2; | |
| pub const MNT_EXPIRE: u32 = 4; | |
| pub const UMOUNT_NOFOLLOW: u32 = 8; | |
| pub const UMOUNT_UNUSED: u32 = 2147483648; | |
| pub const SB_I_CGROUPWB: u32 = 1; | |
| pub const SB_I_NOEXEC: u32 = 2; | |
| pub const SB_I_NODEV: u32 = 4; | |
| pub const SB_I_STABLE_WRITES: u32 = 8; | |
| pub const SB_I_USERNS_VISIBLE: u32 = 16; | |
| pub const SB_I_IMA_UNVERIFIABLE_SIGNATURE: u32 = 32; | |
| pub const SB_I_UNTRUSTED_MOUNTER: u32 = 64; | |
| pub const SB_I_SKIP_SYNC: u32 = 256; | |
| pub const SB_I_PERSB_BDI: u32 = 512; | |
| pub const SB_I_TS_EXPIRY_WARNED: u32 = 1024; | |
| pub const SB_I_RETIRED: u32 = 2048; | |
| pub const SB_I_NOUMASK: u32 = 4096; | |
| pub const NOMMU_MAP_COPY: u32 = 1; | |
| pub const NOMMU_MAP_DIRECT: u32 = 8; | |
| pub const REMAP_FILE_DEDUP: u32 = 1; | |
| pub const REMAP_FILE_CAN_SHORTEN: u32 = 2; | |
| pub const REMAP_FILE_ADVISORY: u32 = 2; | |
| pub const COPY_FILE_SPLICE: u32 = 1; | |
| pub const S_SYNC: u32 = 1; | |
| pub const S_NOATIME: u32 = 2; | |
| pub const S_APPEND: u32 = 4; | |
| pub const S_IMMUTABLE: u32 = 8; | |
| pub const S_DEAD: u32 = 16; | |
| pub const S_NOQUOTA: u32 = 32; | |
| pub const S_DIRSYNC: u32 = 64; | |
| pub const S_NOCMTIME: u32 = 128; | |
| pub const S_SWAPFILE: u32 = 256; | |
| pub const S_PRIVATE: u32 = 512; | |
| pub const S_IMA: u32 = 1024; | |
| pub const S_AUTOMOUNT: u32 = 2048; | |
| pub const S_NOSEC: u32 = 4096; | |
| pub const S_DAX: u32 = 0; | |
| pub const S_ENCRYPTED: u32 = 16384; | |
| pub const S_CASEFOLD: u32 = 32768; | |
| pub const S_VERITY: u32 = 65536; | |
| pub const S_KERNEL_FILE: u32 = 131072; | |
| pub const I_DIRTY_SYNC: u32 = 1; | |
| pub const I_DIRTY_DATASYNC: u32 = 2; | |
| pub const I_DIRTY_PAGES: u32 = 4; | |
| pub const __I_NEW: u32 = 3; | |
| pub const I_NEW: u32 = 8; | |
| pub const I_WILL_FREE: u32 = 16; | |
| pub const I_FREEING: u32 = 32; | |
| pub const I_CLEAR: u32 = 64; | |
| pub const __I_SYNC: u32 = 7; | |
| pub const I_SYNC: u32 = 128; | |
| pub const I_REFERENCED: u32 = 256; | |
| pub const __I_DIO_WAKEUP: u32 = 9; | |
| pub const I_DIO_WAKEUP: u32 = 512; | |
| pub const I_LINKABLE: u32 = 1024; | |
| pub const I_DIRTY_TIME: u32 = 2048; | |
| pub const I_WB_SWITCH: u32 = 8192; | |
| pub const I_OVL_INUSE: u32 = 16384; | |
| pub const I_CREATING: u32 = 32768; | |
| pub const I_DONTCACHE: u32 = 65536; | |
| pub const I_SYNC_QUEUED: u32 = 131072; | |
| pub const I_PINNING_FSCACHE_WB: u32 = 262144; | |
| pub const I_DIRTY_INODE: u32 = 3; | |
| pub const I_DIRTY: u32 = 7; | |
| pub const I_DIRTY_ALL: u32 = 2055; | |
| pub const FS_REQUIRES_DEV: u32 = 1; | |
| pub const FS_BINARY_MOUNTDATA: u32 = 2; | |
| pub const FS_HAS_SUBTYPE: u32 = 4; | |
| pub const FS_USERNS_MOUNT: u32 = 8; | |
| pub const FS_DISALLOW_NOTIFY_PERM: u32 = 16; | |
| pub const FS_ALLOW_IDMAP: u32 = 32; | |
| pub const FS_RENAME_DOES_D_MOVE: u32 = 32768; | |
| pub const CHRDEV_MAJOR_MAX: u32 = 512; | |
| pub const CHRDEV_MAJOR_DYN_END: u32 = 234; | |
| pub const CHRDEV_MAJOR_DYN_EXT_START: u32 = 511; | |
| pub const CHRDEV_MAJOR_DYN_EXT_END: u32 = 384; | |
| pub const STACK_RND_MASK: u32 = 262143; | |
| pub const COMPAT_ELF_PLATFORM: &[u8; 4usize] = b"v8l\0"; | |
| pub const ARM64_ELF_BTI: u32 = 1; | |
| pub const ELF32_GNU_PROPERTY_ALIGN: u32 = 4; | |
| pub const ELF64_GNU_PROPERTY_ALIGN: u32 = 8; | |
| pub const ELF_GNU_PROPERTY_ALIGN: u32 = 8; | |
| pub const IDR_FREE: u32 = 0; | |
| pub const IDA_CHUNK_SIZE: u32 = 128; | |
| pub const KERNFS_TYPE_MASK: u32 = 15; | |
| pub const KERNFS_FLAG_MASK: i32 = -16; | |
| pub const KERNFS_MAX_USER_XATTRS: u32 = 128; | |
| pub const KERNFS_USER_XATTR_SIZE_LIMIT: u32 = 131072; | |
| pub const SYSFS_PREALLOC: u32 = 4096; | |
| pub const UEVENT_HELPER_PATH_LEN: u32 = 256; | |
| pub const UEVENT_NUM_ENVP: u32 = 64; | |
| pub const UEVENT_BUFFER_SIZE: u32 = 2048; | |
| pub const TRACEPOINT_DEFS_H: u32 = 1; | |
| pub const CLS_BITS: u32 = 6; | |
| pub const _DPRINTK_CLASS_DFLT: u32 = 63; | |
| pub const _DPRINTK_FLAGS_NONE: u32 = 0; | |
| pub const _DPRINTK_FLAGS_PRINT: u32 = 1; | |
| pub const _DPRINTK_FLAGS_INCL_MODNAME: u32 = 2; | |
| pub const _DPRINTK_FLAGS_INCL_FUNCNAME: u32 = 4; | |
| pub const _DPRINTK_FLAGS_INCL_LINENO: u32 = 8; | |
| pub const _DPRINTK_FLAGS_INCL_TID: u32 = 16; | |
| pub const _DPRINTK_FLAGS_INCL_SOURCENAME: u32 = 32; | |
| pub const _DPRINTK_FLAGS_INCL_ANY: u32 = 62; | |
| pub const _DPRINTK_FLAGS_DEFAULT: u32 = 0; | |
| pub const KUNIT_PARAM_DESC_SIZE: u32 = 128; | |
| pub const KUNIT_STATUS_COMMENT_SIZE: u32 = 256; | |
| pub const KUNIT_INDENT_LEN: u32 = 4; | |
| pub const KUNIT_SUBTEST_INDENT: &[u8; 5usize] = b" \0"; | |
| pub const KUNIT_SUBSUBTEST_INDENT: &[u8; 9usize] = b" \0"; | |
| pub const FIOSETOWN: u32 = 35073; | |
| pub const SIOCSPGRP: u32 = 35074; | |
| pub const FIOGETOWN: u32 = 35075; | |
| pub const SIOCGPGRP: u32 = 35076; | |
| pub const SIOCATMARK: u32 = 35077; | |
| pub const SIOCGSTAMP_OLD: u32 = 35078; | |
| pub const SIOCGSTAMPNS_OLD: u32 = 35079; | |
| pub const SOL_SOCKET: u32 = 1; | |
| pub const SO_DEBUG: u32 = 1; | |
| pub const SO_REUSEADDR: u32 = 2; | |
| pub const SO_TYPE: u32 = 3; | |
| pub const SO_ERROR: u32 = 4; | |
| pub const SO_DONTROUTE: u32 = 5; | |
| pub const SO_BROADCAST: u32 = 6; | |
| pub const SO_SNDBUF: u32 = 7; | |
| pub const SO_RCVBUF: u32 = 8; | |
| pub const SO_SNDBUFFORCE: u32 = 32; | |
| pub const SO_RCVBUFFORCE: u32 = 33; | |
| pub const SO_KEEPALIVE: u32 = 9; | |
| pub const SO_OOBINLINE: u32 = 10; | |
| pub const SO_NO_CHECK: u32 = 11; | |
| pub const SO_PRIORITY: u32 = 12; | |
| pub const SO_LINGER: u32 = 13; | |
| pub const SO_BSDCOMPAT: u32 = 14; | |
| pub const SO_REUSEPORT: u32 = 15; | |
| pub const SO_PASSCRED: u32 = 16; | |
| pub const SO_PEERCRED: u32 = 17; | |
| pub const SO_RCVLOWAT: u32 = 18; | |
| pub const SO_SNDLOWAT: u32 = 19; | |
| pub const SO_RCVTIMEO_OLD: u32 = 20; | |
| pub const SO_SNDTIMEO_OLD: u32 = 21; | |
| pub const SO_SECURITY_AUTHENTICATION: u32 = 22; | |
| pub const SO_SECURITY_ENCRYPTION_TRANSPORT: u32 = 23; | |
| pub const SO_SECURITY_ENCRYPTION_NETWORK: u32 = 24; | |
| pub const SO_BINDTODEVICE: u32 = 25; | |
| pub const SO_ATTACH_FILTER: u32 = 26; | |
| pub const SO_DETACH_FILTER: u32 = 27; | |
| pub const SO_GET_FILTER: u32 = 26; | |
| pub const SO_PEERNAME: u32 = 28; | |
| pub const SO_ACCEPTCONN: u32 = 30; | |
| pub const SO_PEERSEC: u32 = 31; | |
| pub const SO_PASSSEC: u32 = 34; | |
| pub const SO_MARK: u32 = 36; | |
| pub const SO_PROTOCOL: u32 = 38; | |
| pub const SO_DOMAIN: u32 = 39; | |
| pub const SO_RXQ_OVFL: u32 = 40; | |
| pub const SO_WIFI_STATUS: u32 = 41; | |
| pub const SCM_WIFI_STATUS: u32 = 41; | |
| pub const SO_PEEK_OFF: u32 = 42; | |
| pub const SO_NOFCS: u32 = 43; | |
| pub const SO_LOCK_FILTER: u32 = 44; | |
| pub const SO_SELECT_ERR_QUEUE: u32 = 45; | |
| pub const SO_BUSY_POLL: u32 = 46; | |
| pub const SO_MAX_PACING_RATE: u32 = 47; | |
| pub const SO_BPF_EXTENSIONS: u32 = 48; | |
| pub const SO_INCOMING_CPU: u32 = 49; | |
| pub const SO_ATTACH_BPF: u32 = 50; | |
| pub const SO_DETACH_BPF: u32 = 27; | |
| pub const SO_ATTACH_REUSEPORT_CBPF: u32 = 51; | |
| pub const SO_ATTACH_REUSEPORT_EBPF: u32 = 52; | |
| pub const SO_CNX_ADVICE: u32 = 53; | |
| pub const SCM_TIMESTAMPING_OPT_STATS: u32 = 54; | |
| pub const SO_MEMINFO: u32 = 55; | |
| pub const SO_INCOMING_NAPI_ID: u32 = 56; | |
| pub const SO_COOKIE: u32 = 57; | |
| pub const SCM_TIMESTAMPING_PKTINFO: u32 = 58; | |
| pub const SO_PEERGROUPS: u32 = 59; | |
| pub const SO_ZEROCOPY: u32 = 60; | |
| pub const SO_TXTIME: u32 = 61; | |
| pub const SCM_TXTIME: u32 = 61; | |
| pub const SO_BINDTOIFINDEX: u32 = 62; | |
| pub const SO_TIMESTAMP_OLD: u32 = 29; | |
| pub const SO_TIMESTAMPNS_OLD: u32 = 35; | |
| pub const SO_TIMESTAMPING_OLD: u32 = 37; | |
| pub const SO_TIMESTAMP_NEW: u32 = 63; | |
| pub const SO_TIMESTAMPNS_NEW: u32 = 64; | |
| pub const SO_TIMESTAMPING_NEW: u32 = 65; | |
| pub const SO_RCVTIMEO_NEW: u32 = 66; | |
| pub const SO_SNDTIMEO_NEW: u32 = 67; | |
| pub const SO_DETACH_REUSEPORT_BPF: u32 = 68; | |
| pub const SO_PREFER_BUSY_POLL: u32 = 69; | |
| pub const SO_BUSY_POLL_BUDGET: u32 = 70; | |
| pub const SO_NETNS_COOKIE: u32 = 71; | |
| pub const SO_BUF_LOCK: u32 = 72; | |
| pub const SO_RESERVE_MEM: u32 = 73; | |
| pub const SO_TXREHASH: u32 = 74; | |
| pub const SO_RCVMARK: u32 = 75; | |
| pub const SO_PASSPIDFD: u32 = 76; | |
| pub const SO_PEERPIDFD: u32 = 77; | |
| pub const SOCK_IOC_TYPE: u32 = 137; | |
| pub const SIOCGSTAMP: u32 = 35078; | |
| pub const SIOCGSTAMPNS: u32 = 35079; | |
| pub const SIOCADDRT: u32 = 35083; | |
| pub const SIOCDELRT: u32 = 35084; | |
| pub const SIOCRTMSG: u32 = 35085; | |
| pub const SIOCGIFNAME: u32 = 35088; | |
| pub const SIOCSIFLINK: u32 = 35089; | |
| pub const SIOCGIFCONF: u32 = 35090; | |
| pub const SIOCGIFFLAGS: u32 = 35091; | |
| pub const SIOCSIFFLAGS: u32 = 35092; | |
| pub const SIOCGIFADDR: u32 = 35093; | |
| pub const SIOCSIFADDR: u32 = 35094; | |
| pub const SIOCGIFDSTADDR: u32 = 35095; | |
| pub const SIOCSIFDSTADDR: u32 = 35096; | |
| pub const SIOCGIFBRDADDR: u32 = 35097; | |
| pub const SIOCSIFBRDADDR: u32 = 35098; | |
| pub const SIOCGIFNETMASK: u32 = 35099; | |
| pub const SIOCSIFNETMASK: u32 = 35100; | |
| pub const SIOCGIFMETRIC: u32 = 35101; | |
| pub const SIOCSIFMETRIC: u32 = 35102; | |
| pub const SIOCGIFMEM: u32 = 35103; | |
| pub const SIOCSIFMEM: u32 = 35104; | |
| pub const SIOCGIFMTU: u32 = 35105; | |
| pub const SIOCSIFMTU: u32 = 35106; | |
| pub const SIOCSIFNAME: u32 = 35107; | |
| pub const SIOCSIFHWADDR: u32 = 35108; | |
| pub const SIOCGIFENCAP: u32 = 35109; | |
| pub const SIOCSIFENCAP: u32 = 35110; | |
| pub const SIOCGIFHWADDR: u32 = 35111; | |
| pub const SIOCGIFSLAVE: u32 = 35113; | |
| pub const SIOCSIFSLAVE: u32 = 35120; | |
| pub const SIOCADDMULTI: u32 = 35121; | |
| pub const SIOCDELMULTI: u32 = 35122; | |
| pub const SIOCGIFINDEX: u32 = 35123; | |
| pub const SIOGIFINDEX: u32 = 35123; | |
| pub const SIOCSIFPFLAGS: u32 = 35124; | |
| pub const SIOCGIFPFLAGS: u32 = 35125; | |
| pub const SIOCDIFADDR: u32 = 35126; | |
| pub const SIOCSIFHWBROADCAST: u32 = 35127; | |
| pub const SIOCGIFCOUNT: u32 = 35128; | |
| pub const SIOCGIFBR: u32 = 35136; | |
| pub const SIOCSIFBR: u32 = 35137; | |
| pub const SIOCGIFTXQLEN: u32 = 35138; | |
| pub const SIOCSIFTXQLEN: u32 = 35139; | |
| pub const SIOCETHTOOL: u32 = 35142; | |
| pub const SIOCGMIIPHY: u32 = 35143; | |
| pub const SIOCGMIIREG: u32 = 35144; | |
| pub const SIOCSMIIREG: u32 = 35145; | |
| pub const SIOCWANDEV: u32 = 35146; | |
| pub const SIOCOUTQNSD: u32 = 35147; | |
| pub const SIOCGSKNS: u32 = 35148; | |
| pub const SIOCDARP: u32 = 35155; | |
| pub const SIOCGARP: u32 = 35156; | |
| pub const SIOCSARP: u32 = 35157; | |
| pub const SIOCDRARP: u32 = 35168; | |
| pub const SIOCGRARP: u32 = 35169; | |
| pub const SIOCSRARP: u32 = 35170; | |
| pub const SIOCGIFMAP: u32 = 35184; | |
| pub const SIOCSIFMAP: u32 = 35185; | |
| pub const SIOCADDDLCI: u32 = 35200; | |
| pub const SIOCDELDLCI: u32 = 35201; | |
| pub const SIOCGIFVLAN: u32 = 35202; | |
| pub const SIOCSIFVLAN: u32 = 35203; | |
| pub const SIOCBONDENSLAVE: u32 = 35216; | |
| pub const SIOCBONDRELEASE: u32 = 35217; | |
| pub const SIOCBONDSETHWADDR: u32 = 35218; | |
| pub const SIOCBONDSLAVEINFOQUERY: u32 = 35219; | |
| pub const SIOCBONDINFOQUERY: u32 = 35220; | |
| pub const SIOCBONDCHANGEACTIVE: u32 = 35221; | |
| pub const SIOCBRADDBR: u32 = 35232; | |
| pub const SIOCBRDELBR: u32 = 35233; | |
| pub const SIOCBRADDIF: u32 = 35234; | |
| pub const SIOCBRDELIF: u32 = 35235; | |
| pub const SIOCSHWTSTAMP: u32 = 35248; | |
| pub const SIOCGHWTSTAMP: u32 = 35249; | |
| pub const SIOCDEVPRIVATE: u32 = 35312; | |
| pub const SIOCPROTOPRIVATE: u32 = 35296; | |
| pub const UIO_FASTIOV: u32 = 8; | |
| pub const UIO_MAXIOV: u32 = 1024; | |
| pub const ITER_SOURCE: u32 = 1; | |
| pub const ITER_DEST: u32 = 0; | |
| pub const _K_SS_MAXSIZE: u32 = 128; | |
| pub const SOCK_SNDBUF_LOCK: u32 = 1; | |
| pub const SOCK_RCVBUF_LOCK: u32 = 2; | |
| pub const SOCK_BUF_LOCK_MASK: u32 = 3; | |
| pub const SOCK_TXREHASH_DEFAULT: u32 = 255; | |
| pub const SOCK_TXREHASH_DISABLED: u32 = 0; | |
| pub const SOCK_TXREHASH_ENABLED: u32 = 1; | |
| pub const SCM_RIGHTS: u32 = 1; | |
| pub const SCM_CREDENTIALS: u32 = 2; | |
| pub const SCM_SECURITY: u32 = 3; | |
| pub const SCM_PIDFD: u32 = 4; | |
| pub const AF_UNSPEC: u32 = 0; | |
| pub const AF_UNIX: u32 = 1; | |
| pub const AF_LOCAL: u32 = 1; | |
| pub const AF_INET: u32 = 2; | |
| pub const AF_AX25: u32 = 3; | |
| pub const AF_IPX: u32 = 4; | |
| pub const AF_APPLETALK: u32 = 5; | |
| pub const AF_NETROM: u32 = 6; | |
| pub const AF_BRIDGE: u32 = 7; | |
| pub const AF_ATMPVC: u32 = 8; | |
| pub const AF_X25: u32 = 9; | |
| pub const AF_INET6: u32 = 10; | |
| pub const AF_ROSE: u32 = 11; | |
| pub const AF_DECnet: u32 = 12; | |
| pub const AF_NETBEUI: u32 = 13; | |
| pub const AF_SECURITY: u32 = 14; | |
| pub const AF_KEY: u32 = 15; | |
| pub const AF_NETLINK: u32 = 16; | |
| pub const AF_ROUTE: u32 = 16; | |
| pub const AF_PACKET: u32 = 17; | |
| pub const AF_ASH: u32 = 18; | |
| pub const AF_ECONET: u32 = 19; | |
| pub const AF_ATMSVC: u32 = 20; | |
| pub const AF_RDS: u32 = 21; | |
| pub const AF_SNA: u32 = 22; | |
| pub const AF_IRDA: u32 = 23; | |
| pub const AF_PPPOX: u32 = 24; | |
| pub const AF_WANPIPE: u32 = 25; | |
| pub const AF_LLC: u32 = 26; | |
| pub const AF_IB: u32 = 27; | |
| pub const AF_MPLS: u32 = 28; | |
| pub const AF_CAN: u32 = 29; | |
| pub const AF_TIPC: u32 = 30; | |
| pub const AF_BLUETOOTH: u32 = 31; | |
| pub const AF_IUCV: u32 = 32; | |
| pub const AF_RXRPC: u32 = 33; | |
| pub const AF_ISDN: u32 = 34; | |
| pub const AF_PHONET: u32 = 35; | |
| pub const AF_IEEE802154: u32 = 36; | |
| pub const AF_CAIF: u32 = 37; | |
| pub const AF_ALG: u32 = 38; | |
| pub const AF_NFC: u32 = 39; | |
| pub const AF_VSOCK: u32 = 40; | |
| pub const AF_KCM: u32 = 41; | |
| pub const AF_QIPCRTR: u32 = 42; | |
| pub const AF_SMC: u32 = 43; | |
| pub const AF_XDP: u32 = 44; | |
| pub const AF_MCTP: u32 = 45; | |
| pub const AF_MAX: u32 = 46; | |
| pub const PF_UNSPEC: u32 = 0; | |
| pub const PF_UNIX: u32 = 1; | |
| pub const PF_LOCAL: u32 = 1; | |
| pub const PF_INET: u32 = 2; | |
| pub const PF_AX25: u32 = 3; | |
| pub const PF_IPX: u32 = 4; | |
| pub const PF_APPLETALK: u32 = 5; | |
| pub const PF_NETROM: u32 = 6; | |
| pub const PF_BRIDGE: u32 = 7; | |
| pub const PF_ATMPVC: u32 = 8; | |
| pub const PF_X25: u32 = 9; | |
| pub const PF_INET6: u32 = 10; | |
| pub const PF_ROSE: u32 = 11; | |
| pub const PF_DECnet: u32 = 12; | |
| pub const PF_NETBEUI: u32 = 13; | |
| pub const PF_SECURITY: u32 = 14; | |
| pub const PF_KEY: u32 = 15; | |
| pub const PF_NETLINK: u32 = 16; | |
| pub const PF_ROUTE: u32 = 16; | |
| pub const PF_PACKET: u32 = 17; | |
| pub const PF_ASH: u32 = 18; | |
| pub const PF_ECONET: u32 = 19; | |
| pub const PF_ATMSVC: u32 = 20; | |
| pub const PF_RDS: u32 = 21; | |
| pub const PF_SNA: u32 = 22; | |
| pub const PF_IRDA: u32 = 23; | |
| pub const PF_PPPOX: u32 = 24; | |
| pub const PF_WANPIPE: u32 = 25; | |
| pub const PF_LLC: u32 = 26; | |
| pub const PF_IB: u32 = 27; | |
| pub const PF_MPLS: u32 = 28; | |
| pub const PF_CAN: u32 = 29; | |
| pub const PF_TIPC: u32 = 30; | |
| pub const PF_BLUETOOTH: u32 = 31; | |
| pub const PF_IUCV: u32 = 32; | |
| pub const PF_RXRPC: u32 = 33; | |
| pub const PF_ISDN: u32 = 34; | |
| pub const PF_PHONET: u32 = 35; | |
| pub const PF_IEEE802154: u32 = 36; | |
| pub const PF_CAIF: u32 = 37; | |
| pub const PF_ALG: u32 = 38; | |
| pub const PF_NFC: u32 = 39; | |
| pub const PF_VSOCK: u32 = 40; | |
| pub const PF_KCM: u32 = 41; | |
| pub const PF_QIPCRTR: u32 = 42; | |
| pub const PF_SMC: u32 = 43; | |
| pub const PF_XDP: u32 = 44; | |
| pub const PF_MCTP: u32 = 45; | |
| pub const PF_MAX: u32 = 46; | |
| pub const SOMAXCONN: u32 = 4096; | |
| pub const MSG_OOB: u32 = 1; | |
| pub const MSG_PEEK: u32 = 2; | |
| pub const MSG_DONTROUTE: u32 = 4; | |
| pub const MSG_TRYHARD: u32 = 4; | |
| pub const MSG_CTRUNC: u32 = 8; | |
| pub const MSG_PROBE: u32 = 16; | |
| pub const MSG_TRUNC: u32 = 32; | |
| pub const MSG_DONTWAIT: u32 = 64; | |
| pub const MSG_EOR: u32 = 128; | |
| pub const MSG_WAITALL: u32 = 256; | |
| pub const MSG_FIN: u32 = 512; | |
| pub const MSG_SYN: u32 = 1024; | |
| pub const MSG_CONFIRM: u32 = 2048; | |
| pub const MSG_RST: u32 = 4096; | |
| pub const MSG_ERRQUEUE: u32 = 8192; | |
| pub const MSG_NOSIGNAL: u32 = 16384; | |
| pub const MSG_MORE: u32 = 32768; | |
| pub const MSG_WAITFORONE: u32 = 65536; | |
| pub const MSG_SENDPAGE_NOPOLICY: u32 = 65536; | |
| pub const MSG_BATCH: u32 = 262144; | |
| pub const MSG_EOF: u32 = 512; | |
| pub const MSG_NO_SHARED_FRAGS: u32 = 524288; | |
| pub const MSG_SENDPAGE_DECRYPTED: u32 = 1048576; | |
| pub const MSG_ZEROCOPY: u32 = 67108864; | |
| pub const MSG_SPLICE_PAGES: u32 = 134217728; | |
| pub const MSG_FASTOPEN: u32 = 536870912; | |
| pub const MSG_CMSG_CLOEXEC: u32 = 1073741824; | |
| pub const MSG_CMSG_COMPAT: u32 = 0; | |
| pub const MSG_INTERNAL_SENDMSG_FLAGS: u32 = 135331840; | |
| pub const SOL_IP: u32 = 0; | |
| pub const SOL_TCP: u32 = 6; | |
| pub const SOL_UDP: u32 = 17; | |
| pub const SOL_IPV6: u32 = 41; | |
| pub const SOL_ICMPV6: u32 = 58; | |
| pub const SOL_SCTP: u32 = 132; | |
| pub const SOL_UDPLITE: u32 = 136; | |
| pub const SOL_RAW: u32 = 255; | |
| pub const SOL_IPX: u32 = 256; | |
| pub const SOL_AX25: u32 = 257; | |
| pub const SOL_ATALK: u32 = 258; | |
| pub const SOL_NETROM: u32 = 259; | |
| pub const SOL_ROSE: u32 = 260; | |
| pub const SOL_DECNET: u32 = 261; | |
| pub const SOL_X25: u32 = 262; | |
| pub const SOL_PACKET: u32 = 263; | |
| pub const SOL_ATM: u32 = 264; | |
| pub const SOL_AAL: u32 = 265; | |
| pub const SOL_IRDA: u32 = 266; | |
| pub const SOL_NETBEUI: u32 = 267; | |
| pub const SOL_LLC: u32 = 268; | |
| pub const SOL_DCCP: u32 = 269; | |
| pub const SOL_NETLINK: u32 = 270; | |
| pub const SOL_TIPC: u32 = 271; | |
| pub const SOL_RXRPC: u32 = 272; | |
| pub const SOL_PPPOL2TP: u32 = 273; | |
| pub const SOL_BLUETOOTH: u32 = 274; | |
| pub const SOL_PNPIPE: u32 = 275; | |
| pub const SOL_RDS: u32 = 276; | |
| pub const SOL_IUCV: u32 = 277; | |
| pub const SOL_CAIF: u32 = 278; | |
| pub const SOL_ALG: u32 = 279; | |
| pub const SOL_NFC: u32 = 280; | |
| pub const SOL_KCM: u32 = 281; | |
| pub const SOL_TLS: u32 = 282; | |
| pub const SOL_XDP: u32 = 283; | |
| pub const SOL_MPTCP: u32 = 284; | |
| pub const SOL_MCTP: u32 = 285; | |
| pub const SOL_SMC: u32 = 286; | |
| pub const SOL_VSOCK: u32 = 287; | |
| pub const IPX_TYPE: u32 = 1; | |
| pub const __UAPI_DEF_IF_IFCONF: u32 = 1; | |
| pub const __UAPI_DEF_IF_IFMAP: u32 = 1; | |
| pub const __UAPI_DEF_IF_IFNAMSIZ: u32 = 1; | |
| pub const __UAPI_DEF_IF_IFREQ: u32 = 1; | |
| pub const __UAPI_DEF_IF_NET_DEVICE_FLAGS: u32 = 1; | |
| pub const __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO: u32 = 1; | |
| pub const __UAPI_DEF_IN_ADDR: u32 = 1; | |
| pub const __UAPI_DEF_IN_IPPROTO: u32 = 1; | |
| pub const __UAPI_DEF_IN_PKTINFO: u32 = 1; | |
| pub const __UAPI_DEF_IP_MREQ: u32 = 1; | |
| pub const __UAPI_DEF_SOCKADDR_IN: u32 = 1; | |
| pub const __UAPI_DEF_IN_CLASS: u32 = 1; | |
| pub const __UAPI_DEF_IN6_ADDR: u32 = 1; | |
| pub const __UAPI_DEF_IN6_ADDR_ALT: u32 = 1; | |
| pub const __UAPI_DEF_SOCKADDR_IN6: u32 = 1; | |
| pub const __UAPI_DEF_IPV6_MREQ: u32 = 1; | |
| pub const __UAPI_DEF_IPPROTO_V6: u32 = 1; | |
| pub const __UAPI_DEF_IPV6_OPTIONS: u32 = 1; | |
| pub const __UAPI_DEF_IN6_PKTINFO: u32 = 1; | |
| pub const __UAPI_DEF_IP6_MTUINFO: u32 = 1; | |
| pub const __UAPI_DEF_SOCKADDR_IPX: u32 = 1; | |
| pub const __UAPI_DEF_IPX_ROUTE_DEFINITION: u32 = 1; | |
| pub const __UAPI_DEF_IPX_INTERFACE_DEFINITION: u32 = 1; | |
| pub const __UAPI_DEF_IPX_CONFIG_DATA: u32 = 1; | |
| pub const __UAPI_DEF_IPX_ROUTE_DEF: u32 = 1; | |
| pub const __UAPI_DEF_XATTR: u32 = 1; | |
| pub const IFNAMSIZ: u32 = 16; | |
| pub const IFALIASZ: u32 = 256; | |
| pub const ALTIFNAMSIZ: u32 = 128; | |
| pub const GENERIC_HDLC_VERSION: u32 = 4; | |
| pub const CLOCK_DEFAULT: u32 = 0; | |
| pub const CLOCK_EXT: u32 = 1; | |
| pub const CLOCK_INT: u32 = 2; | |
| pub const CLOCK_TXINT: u32 = 3; | |
| pub const CLOCK_TXFROMRX: u32 = 4; | |
| pub const ENCODING_DEFAULT: u32 = 0; | |
| pub const ENCODING_NRZ: u32 = 1; | |
| pub const ENCODING_NRZI: u32 = 2; | |
| pub const ENCODING_FM_MARK: u32 = 3; | |
| pub const ENCODING_FM_SPACE: u32 = 4; | |
| pub const ENCODING_MANCHESTER: u32 = 5; | |
| pub const PARITY_DEFAULT: u32 = 0; | |
| pub const PARITY_NONE: u32 = 1; | |
| pub const PARITY_CRC16_PR0: u32 = 2; | |
| pub const PARITY_CRC16_PR1: u32 = 3; | |
| pub const PARITY_CRC16_PR0_CCITT: u32 = 4; | |
| pub const PARITY_CRC16_PR1_CCITT: u32 = 5; | |
| pub const PARITY_CRC32_PR0_CCITT: u32 = 6; | |
| pub const PARITY_CRC32_PR1_CCITT: u32 = 7; | |
| pub const LMI_DEFAULT: u32 = 0; | |
| pub const LMI_NONE: u32 = 1; | |
| pub const LMI_ANSI: u32 = 2; | |
| pub const LMI_CCITT: u32 = 3; | |
| pub const LMI_CISCO: u32 = 4; | |
| pub const IF_GET_IFACE: u32 = 1; | |
| pub const IF_GET_PROTO: u32 = 2; | |
| pub const IF_IFACE_V35: u32 = 4096; | |
| pub const IF_IFACE_V24: u32 = 4097; | |
| pub const IF_IFACE_X21: u32 = 4098; | |
| pub const IF_IFACE_T1: u32 = 4099; | |
| pub const IF_IFACE_E1: u32 = 4100; | |
| pub const IF_IFACE_SYNC_SERIAL: u32 = 4101; | |
| pub const IF_IFACE_X21D: u32 = 4102; | |
| pub const IF_PROTO_HDLC: u32 = 8192; | |
| pub const IF_PROTO_PPP: u32 = 8193; | |
| pub const IF_PROTO_CISCO: u32 = 8194; | |
| pub const IF_PROTO_FR: u32 = 8195; | |
| pub const IF_PROTO_FR_ADD_PVC: u32 = 8196; | |
| pub const IF_PROTO_FR_DEL_PVC: u32 = 8197; | |
| pub const IF_PROTO_X25: u32 = 8198; | |
| pub const IF_PROTO_HDLC_ETH: u32 = 8199; | |
| pub const IF_PROTO_FR_ADD_ETH_PVC: u32 = 8200; | |
| pub const IF_PROTO_FR_DEL_ETH_PVC: u32 = 8201; | |
| pub const IF_PROTO_FR_PVC: u32 = 8202; | |
| pub const IF_PROTO_FR_ETH_PVC: u32 = 8203; | |
| pub const IF_PROTO_RAW: u32 = 8204; | |
| pub const IFHWADDRLEN: u32 = 6; | |
| pub const IOCB_FLAG_RESFD: u32 = 1; | |
| pub const IOCB_FLAG_IOPRIO: u32 = 2; | |
| pub const __NR_io_setup: u32 = 0; | |
| pub const __NR_io_destroy: u32 = 1; | |
| pub const __NR_io_submit: u32 = 2; | |
| pub const __NR_io_cancel: u32 = 3; | |
| pub const __NR_io_getevents: u32 = 4; | |
| pub const __NR_setxattr: u32 = 5; | |
| pub const __NR_lsetxattr: u32 = 6; | |
| pub const __NR_fsetxattr: u32 = 7; | |
| pub const __NR_getxattr: u32 = 8; | |
| pub const __NR_lgetxattr: u32 = 9; | |
| pub const __NR_fgetxattr: u32 = 10; | |
| pub const __NR_listxattr: u32 = 11; | |
| pub const __NR_llistxattr: u32 = 12; | |
| pub const __NR_flistxattr: u32 = 13; | |
| pub const __NR_removexattr: u32 = 14; | |
| pub const __NR_lremovexattr: u32 = 15; | |
| pub const __NR_fremovexattr: u32 = 16; | |
| pub const __NR_getcwd: u32 = 17; | |
| pub const __NR_lookup_dcookie: u32 = 18; | |
| pub const __NR_eventfd2: u32 = 19; | |
| pub const __NR_epoll_create1: u32 = 20; | |
| pub const __NR_epoll_ctl: u32 = 21; | |
| pub const __NR_epoll_pwait: u32 = 22; | |
| pub const __NR_dup: u32 = 23; | |
| pub const __NR_dup3: u32 = 24; | |
| pub const __NR3264_fcntl: u32 = 25; | |
| pub const __NR_inotify_init1: u32 = 26; | |
| pub const __NR_inotify_add_watch: u32 = 27; | |
| pub const __NR_inotify_rm_watch: u32 = 28; | |
| pub const __NR_ioctl: u32 = 29; | |
| pub const __NR_ioprio_set: u32 = 30; | |
| pub const __NR_ioprio_get: u32 = 31; | |
| pub const __NR_flock: u32 = 32; | |
| pub const __NR_mknodat: u32 = 33; | |
| pub const __NR_mkdirat: u32 = 34; | |
| pub const __NR_unlinkat: u32 = 35; | |
| pub const __NR_symlinkat: u32 = 36; | |
| pub const __NR_linkat: u32 = 37; | |
| pub const __NR_renameat: u32 = 38; | |
| pub const __NR_umount2: u32 = 39; | |
| pub const __NR_mount: u32 = 40; | |
| pub const __NR_pivot_root: u32 = 41; | |
| pub const __NR_nfsservctl: u32 = 42; | |
| pub const __NR3264_statfs: u32 = 43; | |
| pub const __NR3264_fstatfs: u32 = 44; | |
| pub const __NR3264_truncate: u32 = 45; | |
| pub const __NR3264_ftruncate: u32 = 46; | |
| pub const __NR_fallocate: u32 = 47; | |
| pub const __NR_faccessat: u32 = 48; | |
| pub const __NR_chdir: u32 = 49; | |
| pub const __NR_fchdir: u32 = 50; | |
| pub const __NR_chroot: u32 = 51; | |
| pub const __NR_fchmod: u32 = 52; | |
| pub const __NR_fchmodat: u32 = 53; | |
| pub const __NR_fchownat: u32 = 54; | |
| pub const __NR_fchown: u32 = 55; | |
| pub const __NR_openat: u32 = 56; | |
| pub const __NR_close: u32 = 57; | |
| pub const __NR_vhangup: u32 = 58; | |
| pub const __NR_pipe2: u32 = 59; | |
| pub const __NR_quotactl: u32 = 60; | |
| pub const __NR_getdents64: u32 = 61; | |
| pub const __NR3264_lseek: u32 = 62; | |
| pub const __NR_read: u32 = 63; | |
| pub const __NR_write: u32 = 64; | |
| pub const __NR_readv: u32 = 65; | |
| pub const __NR_writev: u32 = 66; | |
| pub const __NR_pread64: u32 = 67; | |
| pub const __NR_pwrite64: u32 = 68; | |
| pub const __NR_preadv: u32 = 69; | |
| pub const __NR_pwritev: u32 = 70; | |
| pub const __NR3264_sendfile: u32 = 71; | |
| pub const __NR_pselect6: u32 = 72; | |
| pub const __NR_ppoll: u32 = 73; | |
| pub const __NR_signalfd4: u32 = 74; | |
| pub const __NR_vmsplice: u32 = 75; | |
| pub const __NR_splice: u32 = 76; | |
| pub const __NR_tee: u32 = 77; | |
| pub const __NR_readlinkat: u32 = 78; | |
| pub const __NR3264_fstatat: u32 = 79; | |
| pub const __NR3264_fstat: u32 = 80; | |
| pub const __NR_sync: u32 = 81; | |
| pub const __NR_fsync: u32 = 82; | |
| pub const __NR_fdatasync: u32 = 83; | |
| pub const __NR_sync_file_range: u32 = 84; | |
| pub const __NR_timerfd_create: u32 = 85; | |
| pub const __NR_timerfd_settime: u32 = 86; | |
| pub const __NR_timerfd_gettime: u32 = 87; | |
| pub const __NR_utimensat: u32 = 88; | |
| pub const __NR_acct: u32 = 89; | |
| pub const __NR_capget: u32 = 90; | |
| pub const __NR_capset: u32 = 91; | |
| pub const __NR_personality: u32 = 92; | |
| pub const __NR_exit: u32 = 93; | |
| pub const __NR_exit_group: u32 = 94; | |
| pub const __NR_waitid: u32 = 95; | |
| pub const __NR_set_tid_address: u32 = 96; | |
| pub const __NR_unshare: u32 = 97; | |
| pub const __NR_futex: u32 = 98; | |
| pub const __NR_set_robust_list: u32 = 99; | |
| pub const __NR_get_robust_list: u32 = 100; | |
| pub const __NR_nanosleep: u32 = 101; | |
| pub const __NR_getitimer: u32 = 102; | |
| pub const __NR_setitimer: u32 = 103; | |
| pub const __NR_kexec_load: u32 = 104; | |
| pub const __NR_init_module: u32 = 105; | |
| pub const __NR_delete_module: u32 = 106; | |
| pub const __NR_timer_create: u32 = 107; | |
| pub const __NR_timer_gettime: u32 = 108; | |
| pub const __NR_timer_getoverrun: u32 = 109; | |
| pub const __NR_timer_settime: u32 = 110; | |
| pub const __NR_timer_delete: u32 = 111; | |
| pub const __NR_clock_settime: u32 = 112; | |
| pub const __NR_clock_gettime: u32 = 113; | |
| pub const __NR_clock_getres: u32 = 114; | |
| pub const __NR_clock_nanosleep: u32 = 115; | |
| pub const __NR_syslog: u32 = 116; | |
| pub const __NR_ptrace: u32 = 117; | |
| pub const __NR_sched_setparam: u32 = 118; | |
| pub const __NR_sched_setscheduler: u32 = 119; | |
| pub const __NR_sched_getscheduler: u32 = 120; | |
| pub const __NR_sched_getparam: u32 = 121; | |
| pub const __NR_sched_setaffinity: u32 = 122; | |
| pub const __NR_sched_getaffinity: u32 = 123; | |
| pub const __NR_sched_yield: u32 = 124; | |
| pub const __NR_sched_get_priority_max: u32 = 125; | |
| pub const __NR_sched_get_priority_min: u32 = 126; | |
| pub const __NR_sched_rr_get_interval: u32 = 127; | |
| pub const __NR_restart_syscall: u32 = 128; | |
| pub const __NR_kill: u32 = 129; | |
| pub const __NR_tkill: u32 = 130; | |
| pub const __NR_tgkill: u32 = 131; | |
| pub const __NR_sigaltstack: u32 = 132; | |
| pub const __NR_rt_sigsuspend: u32 = 133; | |
| pub const __NR_rt_sigaction: u32 = 134; | |
| pub const __NR_rt_sigprocmask: u32 = 135; | |
| pub const __NR_rt_sigpending: u32 = 136; | |
| pub const __NR_rt_sigtimedwait: u32 = 137; | |
| pub const __NR_rt_sigqueueinfo: u32 = 138; | |
| pub const __NR_rt_sigreturn: u32 = 139; | |
| pub const __NR_setpriority: u32 = 140; | |
| pub const __NR_getpriority: u32 = 141; | |
| pub const __NR_reboot: u32 = 142; | |
| pub const __NR_setregid: u32 = 143; | |
| pub const __NR_setgid: u32 = 144; | |
| pub const __NR_setreuid: u32 = 145; | |
| pub const __NR_setuid: u32 = 146; | |
| pub const __NR_setresuid: u32 = 147; | |
| pub const __NR_getresuid: u32 = 148; | |
| pub const __NR_setresgid: u32 = 149; | |
| pub const __NR_getresgid: u32 = 150; | |
| pub const __NR_setfsuid: u32 = 151; | |
| pub const __NR_setfsgid: u32 = 152; | |
| pub const __NR_times: u32 = 153; | |
| pub const __NR_setpgid: u32 = 154; | |
| pub const __NR_getpgid: u32 = 155; | |
| pub const __NR_getsid: u32 = 156; | |
| pub const __NR_setsid: u32 = 157; | |
| pub const __NR_getgroups: u32 = 158; | |
| pub const __NR_setgroups: u32 = 159; | |
| pub const __NR_uname: u32 = 160; | |
| pub const __NR_sethostname: u32 = 161; | |
| pub const __NR_setdomainname: u32 = 162; | |
| pub const __NR_getrlimit: u32 = 163; | |
| pub const __NR_setrlimit: u32 = 164; | |
| pub const __NR_getrusage: u32 = 165; | |
| pub const __NR_umask: u32 = 166; | |
| pub const __NR_prctl: u32 = 167; | |
| pub const __NR_getcpu: u32 = 168; | |
| pub const __NR_gettimeofday: u32 = 169; | |
| pub const __NR_settimeofday: u32 = 170; | |
| pub const __NR_adjtimex: u32 = 171; | |
| pub const __NR_getpid: u32 = 172; | |
| pub const __NR_getppid: u32 = 173; | |
| pub const __NR_getuid: u32 = 174; | |
| pub const __NR_geteuid: u32 = 175; | |
| pub const __NR_getgid: u32 = 176; | |
| pub const __NR_getegid: u32 = 177; | |
| pub const __NR_gettid: u32 = 178; | |
| pub const __NR_sysinfo: u32 = 179; | |
| pub const __NR_mq_open: u32 = 180; | |
| pub const __NR_mq_unlink: u32 = 181; | |
| pub const __NR_mq_timedsend: u32 = 182; | |
| pub const __NR_mq_timedreceive: u32 = 183; | |
| pub const __NR_mq_notify: u32 = 184; | |
| pub const __NR_mq_getsetattr: u32 = 185; | |
| pub const __NR_msgget: u32 = 186; | |
| pub const __NR_msgctl: u32 = 187; | |
| pub const __NR_msgrcv: u32 = 188; | |
| pub const __NR_msgsnd: u32 = 189; | |
| pub const __NR_semget: u32 = 190; | |
| pub const __NR_semctl: u32 = 191; | |
| pub const __NR_semtimedop: u32 = 192; | |
| pub const __NR_semop: u32 = 193; | |
| pub const __NR_shmget: u32 = 194; | |
| pub const __NR_shmctl: u32 = 195; | |
| pub const __NR_shmat: u32 = 196; | |
| pub const __NR_shmdt: u32 = 197; | |
| pub const __NR_socket: u32 = 198; | |
| pub const __NR_socketpair: u32 = 199; | |
| pub const __NR_bind: u32 = 200; | |
| pub const __NR_listen: u32 = 201; | |
| pub const __NR_accept: u32 = 202; | |
| pub const __NR_connect: u32 = 203; | |
| pub const __NR_getsockname: u32 = 204; | |
| pub const __NR_getpeername: u32 = 205; | |
| pub const __NR_sendto: u32 = 206; | |
| pub const __NR_recvfrom: u32 = 207; | |
| pub const __NR_setsockopt: u32 = 208; | |
| pub const __NR_getsockopt: u32 = 209; | |
| pub const __NR_shutdown: u32 = 210; | |
| pub const __NR_sendmsg: u32 = 211; | |
| pub const __NR_recvmsg: u32 = 212; | |
| pub const __NR_readahead: u32 = 213; | |
| pub const __NR_brk: u32 = 214; | |
| pub const __NR_munmap: u32 = 215; | |
| pub const __NR_mremap: u32 = 216; | |
| pub const __NR_add_key: u32 = 217; | |
| pub const __NR_request_key: u32 = 218; | |
| pub const __NR_keyctl: u32 = 219; | |
| pub const __NR_clone: u32 = 220; | |
| pub const __NR_execve: u32 = 221; | |
| pub const __NR3264_mmap: u32 = 222; | |
| pub const __NR3264_fadvise64: u32 = 223; | |
| pub const __NR_swapon: u32 = 224; | |
| pub const __NR_swapoff: u32 = 225; | |
| pub const __NR_mprotect: u32 = 226; | |
| pub const __NR_msync: u32 = 227; | |
| pub const __NR_mlock: u32 = 228; | |
| pub const __NR_munlock: u32 = 229; | |
| pub const __NR_mlockall: u32 = 230; | |
| pub const __NR_munlockall: u32 = 231; | |
| pub const __NR_mincore: u32 = 232; | |
| pub const __NR_madvise: u32 = 233; | |
| pub const __NR_remap_file_pages: u32 = 234; | |
| pub const __NR_mbind: u32 = 235; | |
| pub const __NR_get_mempolicy: u32 = 236; | |
| pub const __NR_set_mempolicy: u32 = 237; | |
| pub const __NR_migrate_pages: u32 = 238; | |
| pub const __NR_move_pages: u32 = 239; | |
| pub const __NR_rt_tgsigqueueinfo: u32 = 240; | |
| pub const __NR_perf_event_open: u32 = 241; | |
| pub const __NR_accept4: u32 = 242; | |
| pub const __NR_recvmmsg: u32 = 243; | |
| pub const __NR_arch_specific_syscall: u32 = 244; | |
| pub const __NR_wait4: u32 = 260; | |
| pub const __NR_prlimit64: u32 = 261; | |
| pub const __NR_fanotify_init: u32 = 262; | |
| pub const __NR_fanotify_mark: u32 = 263; | |
| pub const __NR_name_to_handle_at: u32 = 264; | |
| pub const __NR_open_by_handle_at: u32 = 265; | |
| pub const __NR_clock_adjtime: u32 = 266; | |
| pub const __NR_syncfs: u32 = 267; | |
| pub const __NR_setns: u32 = 268; | |
| pub const __NR_sendmmsg: u32 = 269; | |
| pub const __NR_process_vm_readv: u32 = 270; | |
| pub const __NR_process_vm_writev: u32 = 271; | |
| pub const __NR_kcmp: u32 = 272; | |
| pub const __NR_finit_module: u32 = 273; | |
| pub const __NR_sched_setattr: u32 = 274; | |
| pub const __NR_sched_getattr: u32 = 275; | |
| pub const __NR_renameat2: u32 = 276; | |
| pub const __NR_seccomp: u32 = 277; | |
| pub const __NR_getrandom: u32 = 278; | |
| pub const __NR_memfd_create: u32 = 279; | |
| pub const __NR_bpf: u32 = 280; | |
| pub const __NR_execveat: u32 = 281; | |
| pub const __NR_userfaultfd: u32 = 282; | |
| pub const __NR_membarrier: u32 = 283; | |
| pub const __NR_mlock2: u32 = 284; | |
| pub const __NR_copy_file_range: u32 = 285; | |
| pub const __NR_preadv2: u32 = 286; | |
| pub const __NR_pwritev2: u32 = 287; | |
| pub const __NR_pkey_mprotect: u32 = 288; | |
| pub const __NR_pkey_alloc: u32 = 289; | |
| pub const __NR_pkey_free: u32 = 290; | |
| pub const __NR_statx: u32 = 291; | |
| pub const __NR_io_pgetevents: u32 = 292; | |
| pub const __NR_rseq: u32 = 293; | |
| pub const __NR_kexec_file_load: u32 = 294; | |
| pub const __NR_pidfd_send_signal: u32 = 424; | |
| pub const __NR_io_uring_setup: u32 = 425; | |
| pub const __NR_io_uring_enter: u32 = 426; | |
| pub const __NR_io_uring_register: u32 = 427; | |
| pub const __NR_open_tree: u32 = 428; | |
| pub const __NR_move_mount: u32 = 429; | |
| pub const __NR_fsopen: u32 = 430; | |
| pub const __NR_fsconfig: u32 = 431; | |
| pub const __NR_fsmount: u32 = 432; | |
| pub const __NR_fspick: u32 = 433; | |
| pub const __NR_pidfd_open: u32 = 434; | |
| pub const __NR_clone3: u32 = 435; | |
| pub const __NR_close_range: u32 = 436; | |
| pub const __NR_openat2: u32 = 437; | |
| pub const __NR_pidfd_getfd: u32 = 438; | |
| pub const __NR_faccessat2: u32 = 439; | |
| pub const __NR_process_madvise: u32 = 440; | |
| pub const __NR_epoll_pwait2: u32 = 441; | |
| pub const __NR_mount_setattr: u32 = 442; | |
| pub const __NR_quotactl_fd: u32 = 443; | |
| pub const __NR_landlock_create_ruleset: u32 = 444; | |
| pub const __NR_landlock_add_rule: u32 = 445; | |
| pub const __NR_landlock_restrict_self: u32 = 446; | |
| pub const __NR_memfd_secret: u32 = 447; | |
| pub const __NR_process_mrelease: u32 = 448; | |
| pub const __NR_futex_waitv: u32 = 449; | |
| pub const __NR_set_mempolicy_home_node: u32 = 450; | |
| pub const __NR_cachestat: u32 = 451; | |
| pub const __NR_fchmodat2: u32 = 452; | |
| pub const __NR_map_shadow_stack: u32 = 453; | |
| pub const __NR_futex_wake: u32 = 454; | |
| pub const __NR_futex_wait: u32 = 455; | |
| pub const __NR_futex_requeue: u32 = 456; | |
| pub const __NR_syscalls: u32 = 457; | |
| pub const __NR_fcntl: u32 = 25; | |
| pub const __NR_statfs: u32 = 43; | |
| pub const __NR_fstatfs: u32 = 44; | |
| pub const __NR_truncate: u32 = 45; | |
| pub const __NR_ftruncate: u32 = 46; | |
| pub const __NR_lseek: u32 = 62; | |
| pub const __NR_sendfile: u32 = 71; | |
| pub const __NR_newfstatat: u32 = 79; | |
| pub const __NR_fstat: u32 = 80; | |
| pub const __NR_mmap: u32 = 222; | |
| pub const __NR_fadvise64: u32 = 223; | |
| pub const NR_syscalls: u32 = 457; | |
| pub const COMPAT_USER_HZ: u32 = 100; | |
| pub const COMPAT_RLIM_INFINITY: u32 = 4294967295; | |
| pub const COMPAT_OFF_T_MAX: u32 = 2147483647; | |
| pub const _COMPAT_NSIG: u32 = 64; | |
| pub const _COMPAT_NSIG_BPW: u32 = 32; | |
| pub const COMPAT_USE_64BIT_TIME: u32 = 0; | |
| pub const COMPAT_MINSIGSTKSZ: u32 = 5120; | |
| pub const _COMPAT_NSIG_WORDS: u32 = 2; | |
| pub const NR_IRQS: u32 = 64; | |
| pub const ESR_ELx_EC_UNKNOWN: u32 = 0; | |
| pub const ESR_ELx_EC_WFx: u32 = 1; | |
| pub const ESR_ELx_EC_CP15_32: u32 = 3; | |
| pub const ESR_ELx_EC_CP15_64: u32 = 4; | |
| pub const ESR_ELx_EC_CP14_MR: u32 = 5; | |
| pub const ESR_ELx_EC_CP14_LS: u32 = 6; | |
| pub const ESR_ELx_EC_FP_ASIMD: u32 = 7; | |
| pub const ESR_ELx_EC_CP10_ID: u32 = 8; | |
| pub const ESR_ELx_EC_PAC: u32 = 9; | |
| pub const ESR_ELx_EC_CP14_64: u32 = 12; | |
| pub const ESR_ELx_EC_BTI: u32 = 13; | |
| pub const ESR_ELx_EC_ILL: u32 = 14; | |
| pub const ESR_ELx_EC_SVC32: u32 = 17; | |
| pub const ESR_ELx_EC_HVC32: u32 = 18; | |
| pub const ESR_ELx_EC_SMC32: u32 = 19; | |
| pub const ESR_ELx_EC_SVC64: u32 = 21; | |
| pub const ESR_ELx_EC_HVC64: u32 = 22; | |
| pub const ESR_ELx_EC_SMC64: u32 = 23; | |
| pub const ESR_ELx_EC_SYS64: u32 = 24; | |
| pub const ESR_ELx_EC_SVE: u32 = 25; | |
| pub const ESR_ELx_EC_ERET: u32 = 26; | |
| pub const ESR_ELx_EC_FPAC: u32 = 28; | |
| pub const ESR_ELx_EC_SME: u32 = 29; | |
| pub const ESR_ELx_EC_IMP_DEF: u32 = 31; | |
| pub const ESR_ELx_EC_IABT_LOW: u32 = 32; | |
| pub const ESR_ELx_EC_IABT_CUR: u32 = 33; | |
| pub const ESR_ELx_EC_PC_ALIGN: u32 = 34; | |
| pub const ESR_ELx_EC_DABT_LOW: u32 = 36; | |
| pub const ESR_ELx_EC_DABT_CUR: u32 = 37; | |
| pub const ESR_ELx_EC_SP_ALIGN: u32 = 38; | |
| pub const ESR_ELx_EC_MOPS: u32 = 39; | |
| pub const ESR_ELx_EC_FP_EXC32: u32 = 40; | |
| pub const ESR_ELx_EC_FP_EXC64: u32 = 44; | |
| pub const ESR_ELx_EC_SERROR: u32 = 47; | |
| pub const ESR_ELx_EC_BREAKPT_LOW: u32 = 48; | |
| pub const ESR_ELx_EC_BREAKPT_CUR: u32 = 49; | |
| pub const ESR_ELx_EC_SOFTSTP_LOW: u32 = 50; | |
| pub const ESR_ELx_EC_SOFTSTP_CUR: u32 = 51; | |
| pub const ESR_ELx_EC_WATCHPT_LOW: u32 = 52; | |
| pub const ESR_ELx_EC_WATCHPT_CUR: u32 = 53; | |
| pub const ESR_ELx_EC_BKPT32: u32 = 56; | |
| pub const ESR_ELx_EC_VECTOR32: u32 = 58; | |
| pub const ESR_ELx_EC_BRK64: u32 = 60; | |
| pub const ESR_ELx_EC_MAX: u32 = 63; | |
| pub const ESR_ELx_EC_SHIFT: u32 = 26; | |
| pub const ESR_ELx_EC_WIDTH: u32 = 6; | |
| pub const ESR_ELx_IL_SHIFT: u32 = 25; | |
| pub const ESR_ELx_ISS2_SHIFT: u32 = 32; | |
| pub const ESR_ELx_WNR_SHIFT: u32 = 6; | |
| pub const ESR_ELx_IDS_SHIFT: u32 = 24; | |
| pub const ESR_ELx_AET_SHIFT: u32 = 10; | |
| pub const ESR_ELx_SET_SHIFT: u32 = 11; | |
| pub const ESR_ELx_FnV_SHIFT: u32 = 10; | |
| pub const ESR_ELx_EA_SHIFT: u32 = 9; | |
| pub const ESR_ELx_S1PTW_SHIFT: u32 = 7; | |
| pub const ESR_ELx_FSC: u32 = 63; | |
| pub const ESR_ELx_FSC_TYPE: u32 = 60; | |
| pub const ESR_ELx_FSC_LEVEL: u32 = 3; | |
| pub const ESR_ELx_FSC_EXTABT: u32 = 16; | |
| pub const ESR_ELx_FSC_MTE: u32 = 17; | |
| pub const ESR_ELx_FSC_SERROR: u32 = 17; | |
| pub const ESR_ELx_FSC_ACCESS: u32 = 8; | |
| pub const ESR_ELx_FSC_FAULT: u32 = 4; | |
| pub const ESR_ELx_FSC_PERM: u32 = 12; | |
| pub const ESR_ELx_FSC_SEA_TTW0: u32 = 20; | |
| pub const ESR_ELx_FSC_SEA_TTW1: u32 = 21; | |
| pub const ESR_ELx_FSC_SEA_TTW2: u32 = 22; | |
| pub const ESR_ELx_FSC_SEA_TTW3: u32 = 23; | |
| pub const ESR_ELx_FSC_SECC: u32 = 24; | |
| pub const ESR_ELx_FSC_SECC_TTW0: u32 = 28; | |
| pub const ESR_ELx_FSC_SECC_TTW1: u32 = 29; | |
| pub const ESR_ELx_FSC_SECC_TTW2: u32 = 30; | |
| pub const ESR_ELx_FSC_SECC_TTW3: u32 = 31; | |
| pub const ESR_ELx_ISV_SHIFT: u32 = 24; | |
| pub const ESR_ELx_SAS_SHIFT: u32 = 22; | |
| pub const ESR_ELx_SSE_SHIFT: u32 = 21; | |
| pub const ESR_ELx_SRT_SHIFT: u32 = 16; | |
| pub const ESR_ELx_SF_SHIFT: u32 = 15; | |
| pub const ESR_ELx_AR_SHIFT: u32 = 14; | |
| pub const ESR_ELx_CM_SHIFT: u32 = 8; | |
| pub const ESR_ELx_TnD_SHIFT: u32 = 10; | |
| pub const ESR_ELx_TagAccess_SHIFT: u32 = 9; | |
| pub const ESR_ELx_GCS_SHIFT: u32 = 8; | |
| pub const ESR_ELx_Overlay_SHIFT: u32 = 6; | |
| pub const ESR_ELx_DirtyBit_SHIFT: u32 = 5; | |
| pub const ESR_ELx_Xs_SHIFT: u32 = 0; | |
| pub const ESR_ELx_COND_SHIFT: u32 = 20; | |
| pub const ESR_ELx_BRK64_ISS_COMMENT_MASK: u32 = 65535; | |
| pub const ESR_ELx_SYS64_ISS_RES0_SHIFT: u32 = 22; | |
| pub const ESR_ELx_SYS64_ISS_DIR_MASK: u32 = 1; | |
| pub const ESR_ELx_SYS64_ISS_DIR_READ: u32 = 1; | |
| pub const ESR_ELx_SYS64_ISS_DIR_WRITE: u32 = 0; | |
| pub const ESR_ELx_SYS64_ISS_RT_SHIFT: u32 = 5; | |
| pub const ESR_ELx_SYS64_ISS_CRM_SHIFT: u32 = 1; | |
| pub const ESR_ELx_SYS64_ISS_CRN_SHIFT: u32 = 10; | |
| pub const ESR_ELx_SYS64_ISS_OP1_SHIFT: u32 = 14; | |
| pub const ESR_ELx_SYS64_ISS_OP2_SHIFT: u32 = 17; | |
| pub const ESR_ELx_SYS64_ISS_OP0_SHIFT: u32 = 20; | |
| pub const ESR_ELx_SYS64_ISS_CRM_DC_CIVAC: u32 = 14; | |
| pub const ESR_ELx_SYS64_ISS_CRM_DC_CVADP: u32 = 13; | |
| pub const ESR_ELx_SYS64_ISS_CRM_DC_CVAP: u32 = 12; | |
| pub const ESR_ELx_SYS64_ISS_CRM_DC_CVAU: u32 = 11; | |
| pub const ESR_ELx_SYS64_ISS_CRM_DC_CVAC: u32 = 10; | |
| pub const ESR_ELx_SYS64_ISS_CRM_IC_IVAU: u32 = 5; | |
| pub const ESR_ELx_ERET_ISS_ERET: u32 = 2; | |
| pub const ESR_ELx_ERET_ISS_ERETA: u32 = 1; | |
| pub const ESR_ELx_CP15_32_ISS_DIR_MASK: u32 = 1; | |
| pub const ESR_ELx_CP15_32_ISS_DIR_READ: u32 = 1; | |
| pub const ESR_ELx_CP15_32_ISS_DIR_WRITE: u32 = 0; | |
| pub const ESR_ELx_CP15_32_ISS_RT_SHIFT: u32 = 5; | |
| pub const ESR_ELx_CP15_32_ISS_CRM_SHIFT: u32 = 1; | |
| pub const ESR_ELx_CP15_32_ISS_CRN_SHIFT: u32 = 10; | |
| pub const ESR_ELx_CP15_32_ISS_OP1_SHIFT: u32 = 14; | |
| pub const ESR_ELx_CP15_32_ISS_OP2_SHIFT: u32 = 17; | |
| pub const ESR_ELx_CP15_64_ISS_DIR_MASK: u32 = 1; | |
| pub const ESR_ELx_CP15_64_ISS_DIR_READ: u32 = 1; | |
| pub const ESR_ELx_CP15_64_ISS_DIR_WRITE: u32 = 0; | |
| pub const ESR_ELx_CP15_64_ISS_RT_SHIFT: u32 = 5; | |
| pub const ESR_ELx_CP15_64_ISS_RT2_SHIFT: u32 = 10; | |
| pub const ESR_ELx_CP15_64_ISS_OP1_SHIFT: u32 = 16; | |
| pub const ESR_ELx_CP15_64_ISS_CRM_SHIFT: u32 = 1; | |
| pub const ESR_ELx_SME_ISS_SME_DISABLED: u32 = 0; | |
| pub const ESR_ELx_SME_ISS_ILL: u32 = 1; | |
| pub const ESR_ELx_SME_ISS_SM_DISABLED: u32 = 2; | |
| pub const ESR_ELx_SME_ISS_ZA_DISABLED: u32 = 3; | |
| pub const ESR_ELx_SME_ISS_ZT_DISABLED: u32 = 4; | |
| pub const HCR_ATA_SHIFT: u32 = 56; | |
| pub const HCR_RW_SHIFT: u32 = 31; | |
| pub const HCR_BSU: u32 = 3072; | |
| pub const TCR_EL2_RES1: u32 = 2155872256; | |
| pub const TCR_EL2_TBI: u32 = 1048576; | |
| pub const TCR_EL2_PS_SHIFT: u32 = 16; | |
| pub const TCR_EL2_PS_MASK: u32 = 458752; | |
| pub const TCR_EL2_PS_40B: u32 = 131072; | |
| pub const TCR_EL2_T0SZ_MASK: u32 = 63; | |
| pub const VTCR_EL2_RES1: u32 = 2147483648; | |
| pub const VTCR_EL2_HD: u32 = 4194304; | |
| pub const VTCR_EL2_HA: u32 = 2097152; | |
| pub const VTCR_EL2_PS_SHIFT: u32 = 16; | |
| pub const VTCR_EL2_PS_MASK: u32 = 458752; | |
| pub const VTCR_EL2_SL0_SHIFT: u32 = 6; | |
| pub const VTCR_EL2_SL0_MASK: u32 = 192; | |
| pub const VTCR_EL2_T0SZ_MASK: u32 = 63; | |
| pub const VTCR_EL2_VS_SHIFT: u32 = 19; | |
| pub const VTCR_EL2_VS_8BIT: u32 = 0; | |
| pub const VTCR_EL2_VS_16BIT: u32 = 524288; | |
| pub const VTCR_EL2_TGRAN_SL0_BASE: u32 = 2; | |
| pub const CPTR_EL2_TFP_SHIFT: u32 = 10; | |
| pub const CPTR_EL2_TCPAC: u32 = 2147483648; | |
| pub const CPTR_EL2_TAM: u32 = 1073741824; | |
| pub const CPTR_EL2_TTA: u32 = 1048576; | |
| pub const CPTR_EL2_TSM: u32 = 4096; | |
| pub const CPTR_EL2_TFP: u32 = 1024; | |
| pub const CPTR_EL2_TZ: u32 = 256; | |
| pub const CPTR_NVHE_EL2_RES1: u32 = 13055; | |
| pub const __HCRX_EL2_MASK: u32 = 0; | |
| pub const CPACR_EL1_TTA: u32 = 268435456; | |
| pub const MMU_NOTIFIER_RANGE_BLOCKABLE: u32 = 1; | |
| pub const TLBI_TTL_TG_4K: u32 = 1; | |
| pub const TLBI_TTL_TG_16K: u32 = 2; | |
| pub const TLBI_TTL_TG_64K: u32 = 3; | |
| pub const MAX_DVM_OPS: u32 = 512; | |
| pub const FIX_BTMAPS_SLOTS: u32 = 7; | |
| pub const HUGE_MAX_HSTATE: u32 = 4; | |
| pub const __SWP_TYPE_SHIFT: u32 = 3; | |
| pub const __SWP_TYPE_BITS: u32 = 5; | |
| pub const __SWP_OFFSET_BITS: u32 = 50; | |
| pub const __SWP_TYPE_MASK: u32 = 31; | |
| pub const __SWP_OFFSET_SHIFT: u32 = 8; | |
| pub const __SWP_OFFSET_MASK: u64 = 1125899906842623; | |
| pub const USER_PGTABLES_CEILING: u32 = 0; | |
| pub const FIRST_USER_ADDRESS: u32 = 0; | |
| pub const __PGTBL_PGD_MODIFIED: u32 = 0; | |
| pub const __PGTBL_P4D_MODIFIED: u32 = 1; | |
| pub const __PGTBL_PUD_MODIFIED: u32 = 2; | |
| pub const __PGTBL_PMD_MODIFIED: u32 = 3; | |
| pub const __PGTBL_PTE_MODIFIED: u32 = 4; | |
| pub const MAX_PTRS_PER_PTE: u32 = 512; | |
| pub const MAX_PTRS_PER_PMD: u32 = 512; | |
| pub const MAX_PTRS_PER_PUD: u32 = 1; | |
| pub const MAX_PTRS_PER_P4D: u32 = 1; | |
| pub const IO_SPACE_LIMIT: u32 = 16777215; | |
| pub const SWNODE_GRAPH_PORT_NAME_FMT: &[u8; 8usize] = b"port@%u\0"; | |
| pub const SWNODE_GRAPH_ENDPOINT_NAME_FMT: &[u8; 12usize] = b"endpoint@%u\0"; | |
| pub const NR_FWNODE_REFERENCE_ARGS: u32 = 8; | |
| pub const PIO_INDIRECT_SIZE: u32 = 0; | |
| pub const MMIO_UPPER_LIMIT: u32 = 16777215; | |
| pub const VM_IOREMAP: u32 = 1; | |
| pub const VM_ALLOC: u32 = 2; | |
| pub const VM_MAP: u32 = 4; | |
| pub const VM_USERMAP: u32 = 8; | |
| pub const VM_DMA_COHERENT: u32 = 16; | |
| pub const VM_UNINITIALIZED: u32 = 32; | |
| pub const VM_NO_GUARD: u32 = 64; | |
| pub const VM_KASAN: u32 = 128; | |
| pub const VM_FLUSH_RESET_PERMS: u32 = 256; | |
| pub const VM_MAP_PUT_PAGES: u32 = 512; | |
| pub const VM_ALLOW_HUGE_VMAP: u32 = 1024; | |
| pub const VM_DEFER_KMEMLEAK: u32 = 0; | |
| pub const ARCH_PAGE_TABLE_SYNC_MASK: u32 = 0; | |
| pub const NR_IRQS_LEGACY: u32 = 0; | |
| pub const ARCH_IRQ_INIT_FLAGS: u32 = 0; | |
| pub const IRQ_DEFAULT_INIT_FLAGS: u32 = 0; | |
| pub const INVALID_HWIRQ: i32 = -1; | |
| pub const __ARCH_IRQ_EXIT_IRQS_DISABLED: u32 = 1; | |
| pub const IRQF_TRIGGER_NONE: u32 = 0; | |
| pub const IRQF_TRIGGER_RISING: u32 = 1; | |
| pub const IRQF_TRIGGER_FALLING: u32 = 2; | |
| pub const IRQF_TRIGGER_HIGH: u32 = 4; | |
| pub const IRQF_TRIGGER_LOW: u32 = 8; | |
| pub const IRQF_TRIGGER_MASK: u32 = 15; | |
| pub const IRQF_TRIGGER_PROBE: u32 = 16; | |
| pub const IRQF_SHARED: u32 = 128; | |
| pub const IRQF_PROBE_SHARED: u32 = 256; | |
| pub const __IRQF_TIMER: u32 = 512; | |
| pub const IRQF_PERCPU: u32 = 1024; | |
| pub const IRQF_NOBALANCING: u32 = 2048; | |
| pub const IRQF_IRQPOLL: u32 = 4096; | |
| pub const IRQF_ONESHOT: u32 = 8192; | |
| pub const IRQF_NO_SUSPEND: u32 = 16384; | |
| pub const IRQF_FORCE_RESUME: u32 = 32768; | |
| pub const IRQF_NO_THREAD: u32 = 65536; | |
| pub const IRQF_EARLY_RESUME: u32 = 131072; | |
| pub const IRQF_COND_SUSPEND: u32 = 262144; | |
| pub const IRQF_NO_AUTOEN: u32 = 524288; | |
| pub const IRQF_NO_DEBUG: u32 = 1048576; | |
| pub const IRQF_TIMER: u32 = 82432; | |
| pub const IRQ_NOTCONNECTED: u32 = 2147483648; | |
| pub const IRQ_AFFINITY_MAX_SETS: u32 = 4; | |
| pub const TRACE_CONTEXT_BITS: u32 = 4; | |
| pub const STACK_DEPOT_EXTRA_BITS: u32 = 5; | |
| pub const IORESOURCE_BITS: u32 = 255; | |
| pub const IORESOURCE_TYPE_BITS: u32 = 7936; | |
| pub const IORESOURCE_IO: u32 = 256; | |
| pub const IORESOURCE_MEM: u32 = 512; | |
| pub const IORESOURCE_REG: u32 = 768; | |
| pub const IORESOURCE_IRQ: u32 = 1024; | |
| pub const IORESOURCE_DMA: u32 = 2048; | |
| pub const IORESOURCE_BUS: u32 = 4096; | |
| pub const IORESOURCE_PREFETCH: u32 = 8192; | |
| pub const IORESOURCE_READONLY: u32 = 16384; | |
| pub const IORESOURCE_CACHEABLE: u32 = 32768; | |
| pub const IORESOURCE_RANGELENGTH: u32 = 65536; | |
| pub const IORESOURCE_SHADOWABLE: u32 = 131072; | |
| pub const IORESOURCE_SIZEALIGN: u32 = 262144; | |
| pub const IORESOURCE_STARTALIGN: u32 = 524288; | |
| pub const IORESOURCE_MEM_64: u32 = 1048576; | |
| pub const IORESOURCE_WINDOW: u32 = 2097152; | |
| pub const IORESOURCE_MUXED: u32 = 4194304; | |
| pub const IORESOURCE_EXT_TYPE_BITS: u32 = 16777216; | |
| pub const IORESOURCE_SYSRAM: u32 = 16777216; | |
| pub const IORESOURCE_SYSRAM_DRIVER_MANAGED: u32 = 33554432; | |
| pub const IORESOURCE_SYSRAM_MERGEABLE: u32 = 67108864; | |
| pub const IORESOURCE_EXCLUSIVE: u32 = 134217728; | |
| pub const IORESOURCE_DISABLED: u32 = 268435456; | |
| pub const IORESOURCE_UNSET: u32 = 536870912; | |
| pub const IORESOURCE_AUTO: u32 = 1073741824; | |
| pub const IORESOURCE_BUSY: u32 = 2147483648; | |
| pub const IORESOURCE_SYSTEM_RAM: u32 = 16777728; | |
| pub const IORESOURCE_IRQ_HIGHEDGE: u32 = 1; | |
| pub const IORESOURCE_IRQ_LOWEDGE: u32 = 2; | |
| pub const IORESOURCE_IRQ_HIGHLEVEL: u32 = 4; | |
| pub const IORESOURCE_IRQ_LOWLEVEL: u32 = 8; | |
| pub const IORESOURCE_IRQ_SHAREABLE: u32 = 16; | |
| pub const IORESOURCE_IRQ_OPTIONAL: u32 = 32; | |
| pub const IORESOURCE_IRQ_WAKECAPABLE: u32 = 64; | |
| pub const IORESOURCE_DMA_TYPE_MASK: u32 = 3; | |
| pub const IORESOURCE_DMA_8BIT: u32 = 0; | |
| pub const IORESOURCE_DMA_8AND16BIT: u32 = 1; | |
| pub const IORESOURCE_DMA_16BIT: u32 = 2; | |
| pub const IORESOURCE_DMA_MASTER: u32 = 4; | |
| pub const IORESOURCE_DMA_BYTE: u32 = 8; | |
| pub const IORESOURCE_DMA_WORD: u32 = 16; | |
| pub const IORESOURCE_DMA_SPEED_MASK: u32 = 192; | |
| pub const IORESOURCE_DMA_COMPATIBLE: u32 = 0; | |
| pub const IORESOURCE_DMA_TYPEA: u32 = 64; | |
| pub const IORESOURCE_DMA_TYPEB: u32 = 128; | |
| pub const IORESOURCE_DMA_TYPEF: u32 = 192; | |
| pub const IORESOURCE_MEM_WRITEABLE: u32 = 1; | |
| pub const IORESOURCE_MEM_CACHEABLE: u32 = 2; | |
| pub const IORESOURCE_MEM_RANGELENGTH: u32 = 4; | |
| pub const IORESOURCE_MEM_TYPE_MASK: u32 = 24; | |
| pub const IORESOURCE_MEM_8BIT: u32 = 0; | |
| pub const IORESOURCE_MEM_16BIT: u32 = 8; | |
| pub const IORESOURCE_MEM_8AND16BIT: u32 = 16; | |
| pub const IORESOURCE_MEM_32BIT: u32 = 24; | |
| pub const IORESOURCE_MEM_SHADOWABLE: u32 = 32; | |
| pub const IORESOURCE_MEM_EXPANSIONROM: u32 = 64; | |
| pub const IORESOURCE_MEM_NONPOSTED: u32 = 128; | |
| pub const IORESOURCE_IO_16BIT_ADDR: u32 = 1; | |
| pub const IORESOURCE_IO_FIXED: u32 = 2; | |
| pub const IORESOURCE_IO_SPARSE: u32 = 4; | |
| pub const IORESOURCE_ROM_ENABLE: u32 = 1; | |
| pub const IORESOURCE_ROM_SHADOW: u32 = 2; | |
| pub const IORESOURCE_PCI_FIXED: u32 = 16; | |
| pub const IORESOURCE_PCI_EA_BEI: u32 = 32; | |
| pub const PGMAP_ALTMAP_VALID: u32 = 1; | |
| pub const MAPCOUNT_ELF_CORE_MARGIN: u32 = 5; | |
| pub const VM_NONE: u32 = 0; | |
| pub const VM_READ: u32 = 1; | |
| pub const VM_WRITE: u32 = 2; | |
| pub const VM_EXEC: u32 = 4; | |
| pub const VM_SHARED: u32 = 8; | |
| pub const VM_MAYREAD: u32 = 16; | |
| pub const VM_MAYWRITE: u32 = 32; | |
| pub const VM_MAYEXEC: u32 = 64; | |
| pub const VM_MAYSHARE: u32 = 128; | |
| pub const VM_GROWSDOWN: u32 = 256; | |
| pub const VM_UFFD_MISSING: u32 = 512; | |
| pub const VM_PFNMAP: u32 = 1024; | |
| pub const VM_UFFD_WP: u32 = 4096; | |
| pub const VM_LOCKED: u32 = 8192; | |
| pub const VM_IO: u32 = 16384; | |
| pub const VM_SEQ_READ: u32 = 32768; | |
| pub const VM_RAND_READ: u32 = 65536; | |
| pub const VM_DONTCOPY: u32 = 131072; | |
| pub const VM_DONTEXPAND: u32 = 262144; | |
| pub const VM_LOCKONFAULT: u32 = 524288; | |
| pub const VM_ACCOUNT: u32 = 1048576; | |
| pub const VM_NORESERVE: u32 = 2097152; | |
| pub const VM_HUGETLB: u32 = 4194304; | |
| pub const VM_SYNC: u32 = 8388608; | |
| pub const VM_ARCH_1: u32 = 16777216; | |
| pub const VM_WIPEONFORK: u32 = 33554432; | |
| pub const VM_DONTDUMP: u32 = 67108864; | |
| pub const VM_SOFTDIRTY: u32 = 0; | |
| pub const VM_MIXEDMAP: u32 = 268435456; | |
| pub const VM_HUGEPAGE: u32 = 536870912; | |
| pub const VM_NOHUGEPAGE: u32 = 1073741824; | |
| pub const VM_MERGEABLE: u32 = 2147483648; | |
| pub const VM_SHADOW_STACK: u32 = 0; | |
| pub const VM_ARM64_BTI: u32 = 16777216; | |
| pub const VM_ARCH_CLEAR: u32 = 16777216; | |
| pub const VM_MTE: u32 = 0; | |
| pub const VM_MTE_ALLOWED: u32 = 0; | |
| pub const VM_GROWSUP: u32 = 0; | |
| pub const VM_UFFD_MINOR: u32 = 0; | |
| pub const VM_DATA_FLAGS_NON_EXEC: u32 = 115; | |
| pub const VM_DATA_FLAGS_EXEC: u32 = 119; | |
| pub const VM_STARTGAP_FLAGS: u32 = 256; | |
| pub const VM_STACK: u32 = 256; | |
| pub const VM_STACK_EARLY: u32 = 0; | |
| pub const VM_ACCESS_FLAGS: u32 = 7; | |
| pub const VM_SPECIAL: u32 = 268715008; | |
| pub const VM_NO_KHUGEPAGED: u32 = 272909312; | |
| pub const VM_INIT_DEF_MASK: u32 = 1073741824; | |
| pub const VM_LOCKED_MASK: u32 = 532480; | |
| pub const SUID_DUMP_DISABLE: u32 = 0; | |
| pub const SUID_DUMP_USER: u32 = 1; | |
| pub const SUID_DUMP_ROOT: u32 = 2; | |
| pub const MMF_DUMPABLE_BITS: u32 = 2; | |
| pub const MMF_DUMPABLE_MASK: u32 = 3; | |
| pub const MMF_DUMP_ANON_PRIVATE: u32 = 2; | |
| pub const MMF_DUMP_ANON_SHARED: u32 = 3; | |
| pub const MMF_DUMP_MAPPED_PRIVATE: u32 = 4; | |
| pub const MMF_DUMP_MAPPED_SHARED: u32 = 5; | |
| pub const MMF_DUMP_ELF_HEADERS: u32 = 6; | |
| pub const MMF_DUMP_HUGETLB_PRIVATE: u32 = 7; | |
| pub const MMF_DUMP_HUGETLB_SHARED: u32 = 8; | |
| pub const MMF_DUMP_DAX_PRIVATE: u32 = 9; | |
| pub const MMF_DUMP_DAX_SHARED: u32 = 10; | |
| pub const MMF_DUMP_FILTER_SHIFT: u32 = 2; | |
| pub const MMF_DUMP_FILTER_BITS: u32 = 9; | |
| pub const MMF_DUMP_FILTER_MASK: u32 = 2044; | |
| pub const MMF_DUMP_MASK_DEFAULT_ELF: u32 = 64; | |
| pub const MMF_VM_MERGEABLE: u32 = 16; | |
| pub const MMF_VM_HUGEPAGE: u32 = 17; | |
| pub const MMF_HAS_UPROBES: u32 = 19; | |
| pub const MMF_RECALC_UPROBES: u32 = 20; | |
| pub const MMF_OOM_SKIP: u32 = 21; | |
| pub const MMF_UNSTABLE: u32 = 22; | |
| pub const MMF_HUGE_ZERO_PAGE: u32 = 23; | |
| pub const MMF_DISABLE_THP: u32 = 24; | |
| pub const MMF_DISABLE_THP_MASK: u32 = 16777216; | |
| pub const MMF_OOM_REAP_QUEUED: u32 = 25; | |
| pub const MMF_MULTIPROCESS: u32 = 26; | |
| pub const MMF_HAS_PINNED: u32 = 27; | |
| pub const MMF_HAS_MDWE: u32 = 28; | |
| pub const MMF_HAS_MDWE_MASK: u32 = 268435456; | |
| pub const MMF_HAS_MDWE_NO_INHERIT: u32 = 29; | |
| pub const MMF_VM_MERGE_ANY: u32 = 30; | |
| pub const MMF_VM_MERGE_ANY_MASK: u32 = 1073741824; | |
| pub const MMF_INIT_MASK: u32 = 1358956543; | |
| pub const transparent_hugepage_flags: u32 = 0; | |
| pub const GUP_PIN_COUNTING_BIAS: u32 = 1024; | |
| pub const MM_CP_TRY_CHANGE_WRITABLE: u32 = 1; | |
| pub const MM_CP_PROT_NUMA: u32 = 2; | |
| pub const MM_CP_UFFD_WP: u32 = 4; | |
| pub const MM_CP_UFFD_WP_RESOLVE: u32 = 8; | |
| pub const MM_CP_UFFD_WP_ALL: u32 = 12; | |
| pub const VM_UNMAPPED_AREA_TOPDOWN: u32 = 1; | |
| pub const VMEMMAP_RESERVE_NR: u32 = 2; | |
| pub const KSYM_NAME_LEN: u32 = 512; | |
| pub const MAX_PID_NS_LEVEL: u32 = 32; | |
| pub const MEMFD_NOEXEC_SCOPE_EXEC: u32 = 0; | |
| pub const MEMFD_NOEXEC_SCOPE_NOEXEC_SEAL: u32 = 1; | |
| pub const MEMFD_NOEXEC_SCOPE_NOEXEC_ENFORCED: u32 = 2; | |
| pub const PIDNS_ADDING: u32 = 2147483648; | |
| pub const PTRACE_TRACEME: u32 = 0; | |
| pub const PTRACE_PEEKTEXT: u32 = 1; | |
| pub const PTRACE_PEEKDATA: u32 = 2; | |
| pub const PTRACE_PEEKUSR: u32 = 3; | |
| pub const PTRACE_POKETEXT: u32 = 4; | |
| pub const PTRACE_POKEDATA: u32 = 5; | |
| pub const PTRACE_POKEUSR: u32 = 6; | |
| pub const PTRACE_CONT: u32 = 7; | |
| pub const PTRACE_KILL: u32 = 8; | |
| pub const PTRACE_SINGLESTEP: u32 = 9; | |
| pub const PTRACE_ATTACH: u32 = 16; | |
| pub const PTRACE_DETACH: u32 = 17; | |
| pub const PTRACE_SYSCALL: u32 = 24; | |
| pub const PTRACE_SETOPTIONS: u32 = 16896; | |
| pub const PTRACE_GETEVENTMSG: u32 = 16897; | |
| pub const PTRACE_GETSIGINFO: u32 = 16898; | |
| pub const PTRACE_SETSIGINFO: u32 = 16899; | |
| pub const PTRACE_GETREGSET: u32 = 16900; | |
| pub const PTRACE_SETREGSET: u32 = 16901; | |
| pub const PTRACE_SEIZE: u32 = 16902; | |
| pub const PTRACE_INTERRUPT: u32 = 16903; | |
| pub const PTRACE_LISTEN: u32 = 16904; | |
| pub const PTRACE_PEEKSIGINFO: u32 = 16905; | |
| pub const PTRACE_GETSIGMASK: u32 = 16906; | |
| pub const PTRACE_SETSIGMASK: u32 = 16907; | |
| pub const PTRACE_SECCOMP_GET_FILTER: u32 = 16908; | |
| pub const PTRACE_SECCOMP_GET_METADATA: u32 = 16909; | |
| pub const PTRACE_GET_SYSCALL_INFO: u32 = 16910; | |
| pub const PTRACE_SYSCALL_INFO_NONE: u32 = 0; | |
| pub const PTRACE_SYSCALL_INFO_ENTRY: u32 = 1; | |
| pub const PTRACE_SYSCALL_INFO_EXIT: u32 = 2; | |
| pub const PTRACE_SYSCALL_INFO_SECCOMP: u32 = 3; | |
| pub const PTRACE_GET_RSEQ_CONFIGURATION: u32 = 16911; | |
| pub const PTRACE_SET_SYSCALL_USER_DISPATCH_CONFIG: u32 = 16912; | |
| pub const PTRACE_GET_SYSCALL_USER_DISPATCH_CONFIG: u32 = 16913; | |
| pub const PTRACE_EVENTMSG_SYSCALL_ENTRY: u32 = 1; | |
| pub const PTRACE_EVENTMSG_SYSCALL_EXIT: u32 = 2; | |
| pub const PTRACE_PEEKSIGINFO_SHARED: u32 = 1; | |
| pub const PTRACE_EVENT_FORK: u32 = 1; | |
| pub const PTRACE_EVENT_VFORK: u32 = 2; | |
| pub const PTRACE_EVENT_CLONE: u32 = 3; | |
| pub const PTRACE_EVENT_EXEC: u32 = 4; | |
| pub const PTRACE_EVENT_VFORK_DONE: u32 = 5; | |
| pub const PTRACE_EVENT_EXIT: u32 = 6; | |
| pub const PTRACE_EVENT_SECCOMP: u32 = 7; | |
| pub const PTRACE_EVENT_STOP: u32 = 128; | |
| pub const PTRACE_O_TRACESYSGOOD: u32 = 1; | |
| pub const PTRACE_O_TRACEFORK: u32 = 2; | |
| pub const PTRACE_O_TRACEVFORK: u32 = 4; | |
| pub const PTRACE_O_TRACECLONE: u32 = 8; | |
| pub const PTRACE_O_TRACEEXEC: u32 = 16; | |
| pub const PTRACE_O_TRACEVFORKDONE: u32 = 32; | |
| pub const PTRACE_O_TRACEEXIT: u32 = 64; | |
| pub const PTRACE_O_TRACESECCOMP: u32 = 128; | |
| pub const PTRACE_O_EXITKILL: u32 = 1048576; | |
| pub const PTRACE_O_SUSPEND_SECCOMP: u32 = 2097152; | |
| pub const PTRACE_O_MASK: u32 = 3145983; | |
| pub const PT_SEIZED: u32 = 65536; | |
| pub const PT_PTRACED: u32 = 1; | |
| pub const PT_OPT_FLAG_SHIFT: u32 = 3; | |
| pub const PT_EXITKILL: u32 = 8388608; | |
| pub const PT_SUSPEND_SECCOMP: u32 = 16777216; | |
| pub const PTRACE_MODE_READ: u32 = 1; | |
| pub const PTRACE_MODE_ATTACH: u32 = 2; | |
| pub const PTRACE_MODE_NOAUDIT: u32 = 4; | |
| pub const PTRACE_MODE_FSCREDS: u32 = 8; | |
| pub const PTRACE_MODE_REALCREDS: u32 = 16; | |
| pub const PTRACE_MODE_READ_FSCREDS: u32 = 9; | |
| pub const PTRACE_MODE_READ_REALCREDS: u32 = 17; | |
| pub const PTRACE_MODE_ATTACH_FSCREDS: u32 = 10; | |
| pub const PTRACE_MODE_ATTACH_REALCREDS: u32 = 18; | |
| pub const A32_RN_OFFSET: u32 = 16; | |
| pub const A32_RT_OFFSET: u32 = 12; | |
| pub const A32_RT2_OFFSET: u32 = 0; | |
| pub const MCOUNT_INSN_SIZE: u32 = 4; | |
| pub const FTRACE_PLT_IDX: u32 = 0; | |
| pub const NR_FTRACE_PLTS: u32 = 1; | |
| pub const ARCH_FTRACE_SHIFT_STACK_TRACER: u32 = 1; | |
| pub const ARCH_SUPPORTS_FTRACE_OPS: u32 = 0; | |
| pub const ftrace_direct_func_count: u32 = 0; | |
| pub const OBJPOOL_NR_OBJECT_MAX: u32 = 16777216; | |
| pub const OBJPOOL_OBJECT_SIZE_MAX: u32 = 65536; | |
| pub const KPROBE_FLAG_GONE: u32 = 1; | |
| pub const KPROBE_FLAG_DISABLED: u32 = 2; | |
| pub const KPROBE_FLAG_OPTIMIZED: u32 = 4; | |
| pub const KPROBE_FLAG_FTRACE: u32 = 8; | |
| pub const KPROBE_FLAG_ON_FUNC_ENTRY: u32 = 16; | |
| pub const KRETPROBE_MAX_DATA_SIZE: u32 = 4096; | |
| pub const DBG_MDSCR_SS: u32 = 1; | |
| pub const DBG_SPSR_SS: u32 = 2097152; | |
| pub const DBG_MDSCR_KDE: u32 = 8192; | |
| pub const DBG_MDSCR_MDE: u32 = 32768; | |
| pub const DBG_MDSCR_MASK: i32 = -40961; | |
| pub const DBG_ESR_EVT_HWBP: u32 = 0; | |
| pub const DBG_ESR_EVT_HWSS: u32 = 1; | |
| pub const DBG_ESR_EVT_HWWP: u32 = 2; | |
| pub const DBG_ESR_EVT_BRK: u32 = 6; | |
| pub const BREAK_INSTR_SIZE: u32 = 4; | |
| pub const AARCH64_BREAK_KGDB_DYN_DBG: u32 = 3558899712; | |
| pub const CACHE_FLUSH_IS_SAFE: u32 = 1; | |
| pub const BRK64_OPCODE_KPROBES: u32 = 3558867072; | |
| pub const BRK64_OPCODE_KPROBES_SS: u32 = 3558867136; | |
| pub const BRK64_OPCODE_UPROBES: u32 = 3558867104; | |
| pub const DBG_ESR_EVT_BKPT: u32 = 4; | |
| pub const DBG_ESR_EVT_VECC: u32 = 5; | |
| pub const AARCH32_BREAK_ARM: u32 = 133169648; | |
| pub const AARCH32_BREAK_THUMB: u32 = 56833; | |
| pub const AARCH32_BREAK_THUMB2_LO: u32 = 63472; | |
| pub const AARCH32_BREAK_THUMB2_HI: u32 = 40960; | |
| pub const DBG_ARCH_ID_RESERVED: u32 = 0; | |
| pub const DBG_HOOK_HANDLED: u32 = 0; | |
| pub const DBG_HOOK_ERROR: u32 = 1; | |
| pub const _GP_REGS: u32 = 33; | |
| pub const _FP_REGS: u32 = 32; | |
| pub const _EXTRA_REGS: u32 = 3; | |
| pub const GP_REG_BYTES: u32 = 264; | |
| pub const DBG_MAX_REG_NUM: u32 = 68; | |
| pub const BUFMAX: u32 = 2048; | |
| pub const NUMREGBYTES: u32 = 788; | |
| pub const ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE: u32 = 1; | |
| pub const IPV6_FL_A_GET: u32 = 0; | |
| pub const IPV6_FL_A_PUT: u32 = 1; | |
| pub const IPV6_FL_A_RENEW: u32 = 2; | |
| pub const IPV6_FL_F_CREATE: u32 = 1; | |
| pub const IPV6_FL_F_EXCL: u32 = 2; | |
| pub const IPV6_FL_F_REFLECT: u32 = 4; | |
| pub const IPV6_FL_F_REMOTE: u32 = 8; | |
| pub const IPV6_FL_S_NONE: u32 = 0; | |
| pub const IPV6_FL_S_EXCL: u32 = 1; | |
| pub const IPV6_FL_S_PROCESS: u32 = 2; | |
| pub const IPV6_FL_S_USER: u32 = 3; | |
| pub const IPV6_FL_S_ANY: u32 = 255; | |
| pub const IPV6_FLOWINFO_FLOWLABEL: u32 = 1048575; | |
| pub const IPV6_FLOWINFO_PRIORITY: u32 = 267386880; | |
| pub const IPV6_PRIORITY_UNCHARACTERIZED: u32 = 0; | |
| pub const IPV6_PRIORITY_FILLER: u32 = 256; | |
| pub const IPV6_PRIORITY_UNATTENDED: u32 = 512; | |
| pub const IPV6_PRIORITY_RESERVED1: u32 = 768; | |
| pub const IPV6_PRIORITY_BULK: u32 = 1024; | |
| pub const IPV6_PRIORITY_RESERVED2: u32 = 1280; | |
| pub const IPV6_PRIORITY_INTERACTIVE: u32 = 1536; | |
| pub const IPV6_PRIORITY_CONTROL: u32 = 1792; | |
| pub const IPV6_PRIORITY_8: u32 = 2048; | |
| pub const IPV6_PRIORITY_9: u32 = 2304; | |
| pub const IPV6_PRIORITY_10: u32 = 2560; | |
| pub const IPV6_PRIORITY_11: u32 = 2816; | |
| pub const IPV6_PRIORITY_12: u32 = 3072; | |
| pub const IPV6_PRIORITY_13: u32 = 3328; | |
| pub const IPV6_PRIORITY_14: u32 = 3584; | |
| pub const IPV6_PRIORITY_15: u32 = 3840; | |
| pub const IPPROTO_HOPOPTS: u32 = 0; | |
| pub const IPPROTO_ROUTING: u32 = 43; | |
| pub const IPPROTO_FRAGMENT: u32 = 44; | |
| pub const IPPROTO_ICMPV6: u32 = 58; | |
| pub const IPPROTO_NONE: u32 = 59; | |
| pub const IPPROTO_DSTOPTS: u32 = 60; | |
| pub const IPPROTO_MH: u32 = 135; | |
| pub const IPV6_TLV_PAD1: u32 = 0; | |
| pub const IPV6_TLV_PADN: u32 = 1; | |
| pub const IPV6_TLV_ROUTERALERT: u32 = 5; | |
| pub const IPV6_TLV_CALIPSO: u32 = 7; | |
| pub const IPV6_TLV_IOAM: u32 = 49; | |
| pub const IPV6_TLV_JUMBO: u32 = 194; | |
| pub const IPV6_TLV_HAO: u32 = 201; | |
| pub const IPV6_ADDRFORM: u32 = 1; | |
| pub const IPV6_2292PKTINFO: u32 = 2; | |
| pub const IPV6_2292HOPOPTS: u32 = 3; | |
| pub const IPV6_2292DSTOPTS: u32 = 4; | |
| pub const IPV6_2292RTHDR: u32 = 5; | |
| pub const IPV6_2292PKTOPTIONS: u32 = 6; | |
| pub const IPV6_CHECKSUM: u32 = 7; | |
| pub const IPV6_2292HOPLIMIT: u32 = 8; | |
| pub const IPV6_NEXTHOP: u32 = 9; | |
| pub const IPV6_AUTHHDR: u32 = 10; | |
| pub const IPV6_FLOWINFO: u32 = 11; | |
| pub const IPV6_UNICAST_HOPS: u32 = 16; | |
| pub const IPV6_MULTICAST_IF: u32 = 17; | |
| pub const IPV6_MULTICAST_HOPS: u32 = 18; | |
| pub const IPV6_MULTICAST_LOOP: u32 = 19; | |
| pub const IPV6_ADD_MEMBERSHIP: u32 = 20; | |
| pub const IPV6_DROP_MEMBERSHIP: u32 = 21; | |
| pub const IPV6_ROUTER_ALERT: u32 = 22; | |
| pub const IPV6_MTU_DISCOVER: u32 = 23; | |
| pub const IPV6_MTU: u32 = 24; | |
| pub const IPV6_RECVERR: u32 = 25; | |
| pub const IPV6_V6ONLY: u32 = 26; | |
| pub const IPV6_JOIN_ANYCAST: u32 = 27; | |
| pub const IPV6_LEAVE_ANYCAST: u32 = 28; | |
| pub const IPV6_MULTICAST_ALL: u32 = 29; | |
| pub const IPV6_ROUTER_ALERT_ISOLATE: u32 = 30; | |
| pub const IPV6_RECVERR_RFC4884: u32 = 31; | |
| pub const IPV6_PMTUDISC_DONT: u32 = 0; | |
| pub const IPV6_PMTUDISC_WANT: u32 = 1; | |
| pub const IPV6_PMTUDISC_DO: u32 = 2; | |
| pub const IPV6_PMTUDISC_PROBE: u32 = 3; | |
| pub const IPV6_PMTUDISC_INTERFACE: u32 = 4; | |
| pub const IPV6_PMTUDISC_OMIT: u32 = 5; | |
| pub const IPV6_FLOWLABEL_MGR: u32 = 32; | |
| pub const IPV6_FLOWINFO_SEND: u32 = 33; | |
| pub const IPV6_IPSEC_POLICY: u32 = 34; | |
| pub const IPV6_XFRM_POLICY: u32 = 35; | |
| pub const IPV6_HDRINCL: u32 = 36; | |
| pub const IPV6_RECVPKTINFO: u32 = 49; | |
| pub const IPV6_PKTINFO: u32 = 50; | |
| pub const IPV6_RECVHOPLIMIT: u32 = 51; | |
| pub const IPV6_HOPLIMIT: u32 = 52; | |
| pub const IPV6_RECVHOPOPTS: u32 = 53; | |
| pub const IPV6_HOPOPTS: u32 = 54; | |
| pub const IPV6_RTHDRDSTOPTS: u32 = 55; | |
| pub const IPV6_RECVRTHDR: u32 = 56; | |
| pub const IPV6_RTHDR: u32 = 57; | |
| pub const IPV6_RECVDSTOPTS: u32 = 58; | |
| pub const IPV6_DSTOPTS: u32 = 59; | |
| pub const IPV6_RECVPATHMTU: u32 = 60; | |
| pub const IPV6_PATHMTU: u32 = 61; | |
| pub const IPV6_DONTFRAG: u32 = 62; | |
| pub const IPV6_RECVTCLASS: u32 = 66; | |
| pub const IPV6_TCLASS: u32 = 67; | |
| pub const IPV6_AUTOFLOWLABEL: u32 = 70; | |
| pub const IPV6_ADDR_PREFERENCES: u32 = 72; | |
| pub const IPV6_PREFER_SRC_TMP: u32 = 1; | |
| pub const IPV6_PREFER_SRC_PUBLIC: u32 = 2; | |
| pub const IPV6_PREFER_SRC_PUBTMP_DEFAULT: u32 = 256; | |
| pub const IPV6_PREFER_SRC_COA: u32 = 4; | |
| pub const IPV6_PREFER_SRC_HOME: u32 = 1024; | |
| pub const IPV6_PREFER_SRC_CGA: u32 = 8; | |
| pub const IPV6_PREFER_SRC_NONCGA: u32 = 2048; | |
| pub const IPV6_MINHOPCOUNT: u32 = 73; | |
| pub const IPV6_ORIGDSTADDR: u32 = 74; | |
| pub const IPV6_RECVORIGDSTADDR: u32 = 74; | |
| pub const IPV6_TRANSPARENT: u32 = 75; | |
| pub const IPV6_UNICAST_IF: u32 = 76; | |
| pub const IPV6_RECVFRAGSIZE: u32 = 77; | |
| pub const IPV6_FREEBIND: u32 = 78; | |
| pub const PRINTK_INFO_SUBSYSTEM_LEN: u32 = 16; | |
| pub const PRINTK_INFO_DEVICE_LEN: u32 = 48; | |
| pub const SCHED_CPUFREQ_IOWAIT: u32 = 1; | |
| pub const SDF_SHARED_CHILD: u32 = 1; | |
| pub const SDF_SHARED_PARENT: u32 = 2; | |
| pub const SDF_NEEDS_GROUPS: u32 = 4; | |
| pub const SDTL_OVERLAP: u32 = 1; | |
| pub const PM_EVENT_INVALID: i32 = -1; | |
| pub const PM_EVENT_ON: u32 = 0; | |
| pub const PM_EVENT_FREEZE: u32 = 1; | |
| pub const PM_EVENT_SUSPEND: u32 = 2; | |
| pub const PM_EVENT_HIBERNATE: u32 = 4; | |
| pub const PM_EVENT_QUIESCE: u32 = 8; | |
| pub const PM_EVENT_RESUME: u32 = 16; | |
| pub const PM_EVENT_THAW: u32 = 32; | |
| pub const PM_EVENT_RESTORE: u32 = 64; | |
| pub const PM_EVENT_RECOVER: u32 = 128; | |
| pub const PM_EVENT_USER: u32 = 256; | |
| pub const PM_EVENT_REMOTE: u32 = 512; | |
| pub const PM_EVENT_AUTO: u32 = 1024; | |
| pub const PM_EVENT_SLEEP: u32 = 6; | |
| pub const PM_EVENT_USER_SUSPEND: u32 = 258; | |
| pub const PM_EVENT_USER_RESUME: u32 = 272; | |
| pub const PM_EVENT_REMOTE_RESUME: u32 = 528; | |
| pub const PM_EVENT_AUTO_SUSPEND: u32 = 1026; | |
| pub const PM_EVENT_AUTO_RESUME: u32 = 1040; | |
| pub const PM_EVENT_PRETHAW: u32 = 8; | |
| pub const SG_CHAIN: u32 = 1; | |
| pub const SG_END: u32 = 2; | |
| pub const SG_PAGE_LINK_MASK: u32 = 3; | |
| pub const SG_DMA_BUS_ADDRESS: u32 = 1; | |
| pub const SG_DMA_SWIOTLB: u32 = 2; | |
| pub const SG_CHUNK_SIZE: u32 = 128; | |
| pub const SG_MAX_SEGMENTS: u32 = 2048; | |
| pub const SG_MITER_ATOMIC: u32 = 1; | |
| pub const SG_MITER_TO_SG: u32 = 2; | |
| pub const SG_MITER_FROM_SG: u32 = 4; | |
| pub const DMA_ATTR_WEAK_ORDERING: u32 = 2; | |
| pub const DMA_ATTR_WRITE_COMBINE: u32 = 4; | |
| pub const DMA_ATTR_NO_KERNEL_MAPPING: u32 = 16; | |
| pub const DMA_ATTR_SKIP_CPU_SYNC: u32 = 32; | |
| pub const DMA_ATTR_FORCE_CONTIGUOUS: u32 = 64; | |
| pub const DMA_ATTR_ALLOC_SINGLE_PAGES: u32 = 128; | |
| pub const DMA_ATTR_NO_WARN: u32 = 256; | |
| pub const DMA_ATTR_PRIVILEGED: u32 = 512; | |
| pub const SIPHASH_CONST_0: u64 = 8317987319222330741; | |
| pub const SIPHASH_CONST_1: u64 = 7237128888997146477; | |
| pub const SIPHASH_CONST_2: u64 = 7816392313619706465; | |
| pub const SIPHASH_CONST_3: u64 = 8387220255154660723; | |
| pub const HSIPHASH_CONST_0: u32 = 0; | |
| pub const HSIPHASH_CONST_1: u32 = 0; | |
| pub const HSIPHASH_CONST_2: u32 = 1819895653; | |
| pub const HSIPHASH_CONST_3: u32 = 1952801890; | |
| pub const ETH_ALEN: u32 = 6; | |
| pub const ETH_TLEN: u32 = 2; | |
| pub const ETH_HLEN: u32 = 14; | |
| pub const ETH_ZLEN: u32 = 60; | |
| pub const ETH_DATA_LEN: u32 = 1500; | |
| pub const ETH_FRAME_LEN: u32 = 1514; | |
| pub const ETH_FCS_LEN: u32 = 4; | |
| pub const ETH_MIN_MTU: u32 = 68; | |
| pub const ETH_MAX_MTU: u32 = 65535; | |
| pub const ETH_P_LOOP: u32 = 96; | |
| pub const ETH_P_PUP: u32 = 512; | |
| pub const ETH_P_PUPAT: u32 = 513; | |
| pub const ETH_P_TSN: u32 = 8944; | |
| pub const ETH_P_ERSPAN2: u32 = 8939; | |
| pub const ETH_P_IP: u32 = 2048; | |
| pub const ETH_P_X25: u32 = 2053; | |
| pub const ETH_P_ARP: u32 = 2054; | |
| pub const ETH_P_BPQ: u32 = 2303; | |
| pub const ETH_P_IEEEPUP: u32 = 2560; | |
| pub const ETH_P_IEEEPUPAT: u32 = 2561; | |
| pub const ETH_P_BATMAN: u32 = 17157; | |
| pub const ETH_P_DEC: u32 = 24576; | |
| pub const ETH_P_DNA_DL: u32 = 24577; | |
| pub const ETH_P_DNA_RC: u32 = 24578; | |
| pub const ETH_P_DNA_RT: u32 = 24579; | |
| pub const ETH_P_LAT: u32 = 24580; | |
| pub const ETH_P_DIAG: u32 = 24581; | |
| pub const ETH_P_CUST: u32 = 24582; | |
| pub const ETH_P_SCA: u32 = 24583; | |
| pub const ETH_P_TEB: u32 = 25944; | |
| pub const ETH_P_RARP: u32 = 32821; | |
| pub const ETH_P_ATALK: u32 = 32923; | |
| pub const ETH_P_AARP: u32 = 33011; | |
| pub const ETH_P_8021Q: u32 = 33024; | |
| pub const ETH_P_ERSPAN: u32 = 35006; | |
| pub const ETH_P_IPX: u32 = 33079; | |
| pub const ETH_P_IPV6: u32 = 34525; | |
| pub const ETH_P_PAUSE: u32 = 34824; | |
| pub const ETH_P_SLOW: u32 = 34825; | |
| pub const ETH_P_WCCP: u32 = 34878; | |
| pub const ETH_P_MPLS_UC: u32 = 34887; | |
| pub const ETH_P_MPLS_MC: u32 = 34888; | |
| pub const ETH_P_ATMMPOA: u32 = 34892; | |
| pub const ETH_P_PPP_DISC: u32 = 34915; | |
| pub const ETH_P_PPP_SES: u32 = 34916; | |
| pub const ETH_P_LINK_CTL: u32 = 34924; | |
| pub const ETH_P_ATMFATE: u32 = 34948; | |
| pub const ETH_P_PAE: u32 = 34958; | |
| pub const ETH_P_PROFINET: u32 = 34962; | |
| pub const ETH_P_REALTEK: u32 = 34969; | |
| pub const ETH_P_AOE: u32 = 34978; | |
| pub const ETH_P_ETHERCAT: u32 = 34980; | |
| pub const ETH_P_8021AD: u32 = 34984; | |
| pub const ETH_P_802_EX1: u32 = 34997; | |
| pub const ETH_P_PREAUTH: u32 = 35015; | |
| pub const ETH_P_TIPC: u32 = 35018; | |
| pub const ETH_P_LLDP: u32 = 35020; | |
| pub const ETH_P_MRP: u32 = 35043; | |
| pub const ETH_P_MACSEC: u32 = 35045; | |
| pub const ETH_P_8021AH: u32 = 35047; | |
| pub const ETH_P_MVRP: u32 = 35061; | |
| pub const ETH_P_1588: u32 = 35063; | |
| pub const ETH_P_NCSI: u32 = 35064; | |
| pub const ETH_P_PRP: u32 = 35067; | |
| pub const ETH_P_CFM: u32 = 35074; | |
| pub const ETH_P_FCOE: u32 = 35078; | |
| pub const ETH_P_IBOE: u32 = 35093; | |
| pub const ETH_P_TDLS: u32 = 35085; | |
| pub const ETH_P_FIP: u32 = 35092; | |
| pub const ETH_P_80221: u32 = 35095; | |
| pub const ETH_P_HSR: u32 = 35119; | |
| pub const ETH_P_NSH: u32 = 35151; | |
| pub const ETH_P_LOOPBACK: u32 = 36864; | |
| pub const ETH_P_QINQ1: u32 = 37120; | |
| pub const ETH_P_QINQ2: u32 = 37376; | |
| pub const ETH_P_QINQ3: u32 = 37632; | |
| pub const ETH_P_EDSA: u32 = 56026; | |
| pub const ETH_P_DSA_8021Q: u32 = 56027; | |
| pub const ETH_P_DSA_A5PSW: u32 = 57345; | |
| pub const ETH_P_IFE: u32 = 60734; | |
| pub const ETH_P_AF_IUCV: u32 = 64507; | |
| pub const ETH_P_802_3_MIN: u32 = 1536; | |
| pub const ETH_P_802_3: u32 = 1; | |
| pub const ETH_P_AX25: u32 = 2; | |
| pub const ETH_P_ALL: u32 = 3; | |
| pub const ETH_P_802_2: u32 = 4; | |
| pub const ETH_P_SNAP: u32 = 5; | |
| pub const ETH_P_DDCMP: u32 = 6; | |
| pub const ETH_P_WAN_PPP: u32 = 7; | |
| pub const ETH_P_PPP_MP: u32 = 8; | |
| pub const ETH_P_LOCALTALK: u32 = 9; | |
| pub const ETH_P_CAN: u32 = 12; | |
| pub const ETH_P_CANFD: u32 = 13; | |
| pub const ETH_P_CANXL: u32 = 14; | |
| pub const ETH_P_PPPTALK: u32 = 16; | |
| pub const ETH_P_TR_802_2: u32 = 17; | |
| pub const ETH_P_MOBITEX: u32 = 21; | |
| pub const ETH_P_CONTROL: u32 = 22; | |
| pub const ETH_P_IRDA: u32 = 23; | |
| pub const ETH_P_ECONET: u32 = 24; | |
| pub const ETH_P_HDLC: u32 = 25; | |
| pub const ETH_P_ARCNET: u32 = 26; | |
| pub const ETH_P_DSA: u32 = 27; | |
| pub const ETH_P_TRAILER: u32 = 28; | |
| pub const ETH_P_PHONET: u32 = 245; | |
| pub const ETH_P_IEEE802154: u32 = 246; | |
| pub const ETH_P_CAIF: u32 = 247; | |
| pub const ETH_P_XDSA: u32 = 248; | |
| pub const ETH_P_MAP: u32 = 249; | |
| pub const ETH_P_MCTP: u32 = 250; | |
| pub const __UAPI_DEF_ETHHDR: u32 = 1; | |
| pub const FLOW_DIS_MPLS_MAX: u32 = 7; | |
| pub const FLOW_DIS_TUN_OPTS_MAX: u32 = 255; | |
| pub const FLOW_DIS_CFM_MDL_MAX: u32 = 7; | |
| pub const FLOW_KEYS_DIGEST_LEN: u32 = 16; | |
| pub const PACKET_HOST: u32 = 0; | |
| pub const PACKET_BROADCAST: u32 = 1; | |
| pub const PACKET_MULTICAST: u32 = 2; | |
| pub const PACKET_OTHERHOST: u32 = 3; | |
| pub const PACKET_OUTGOING: u32 = 4; | |
| pub const PACKET_LOOPBACK: u32 = 5; | |
| pub const PACKET_USER: u32 = 6; | |
| pub const PACKET_KERNEL: u32 = 7; | |
| pub const PACKET_FASTROUTE: u32 = 6; | |
| pub const PACKET_ADD_MEMBERSHIP: u32 = 1; | |
| pub const PACKET_DROP_MEMBERSHIP: u32 = 2; | |
| pub const PACKET_RECV_OUTPUT: u32 = 3; | |
| pub const PACKET_RX_RING: u32 = 5; | |
| pub const PACKET_STATISTICS: u32 = 6; | |
| pub const PACKET_COPY_THRESH: u32 = 7; | |
| pub const PACKET_AUXDATA: u32 = 8; | |
| pub const PACKET_ORIGDEV: u32 = 9; | |
| pub const PACKET_VERSION: u32 = 10; | |
| pub const PACKET_HDRLEN: u32 = 11; | |
| pub const PACKET_RESERVE: u32 = 12; | |
| pub const PACKET_TX_RING: u32 = 13; | |
| pub const PACKET_LOSS: u32 = 14; | |
| pub const PACKET_VNET_HDR: u32 = 15; | |
| pub const PACKET_TX_TIMESTAMP: u32 = 16; | |
| pub const PACKET_TIMESTAMP: u32 = 17; | |
| pub const PACKET_FANOUT: u32 = 18; | |
| pub const PACKET_TX_HAS_OFF: u32 = 19; | |
| pub const PACKET_QDISC_BYPASS: u32 = 20; | |
| pub const PACKET_ROLLOVER_STATS: u32 = 21; | |
| pub const PACKET_FANOUT_DATA: u32 = 22; | |
| pub const PACKET_IGNORE_OUTGOING: u32 = 23; | |
| pub const PACKET_VNET_HDR_SZ: u32 = 24; | |
| pub const PACKET_FANOUT_HASH: u32 = 0; | |
| pub const PACKET_FANOUT_LB: u32 = 1; | |
| pub const PACKET_FANOUT_CPU: u32 = 2; | |
| pub const PACKET_FANOUT_ROLLOVER: u32 = 3; | |
| pub const PACKET_FANOUT_RND: u32 = 4; | |
| pub const PACKET_FANOUT_QM: u32 = 5; | |
| pub const PACKET_FANOUT_CBPF: u32 = 6; | |
| pub const PACKET_FANOUT_EBPF: u32 = 7; | |
| pub const PACKET_FANOUT_FLAG_ROLLOVER: u32 = 4096; | |
| pub const PACKET_FANOUT_FLAG_UNIQUEID: u32 = 8192; | |
| pub const PACKET_FANOUT_FLAG_IGNORE_OUTGOING: u32 = 16384; | |
| pub const PACKET_FANOUT_FLAG_DEFRAG: u32 = 32768; | |
| pub const TP_STATUS_KERNEL: u32 = 0; | |
| pub const TP_STATUS_USER: u32 = 1; | |
| pub const TP_STATUS_COPY: u32 = 2; | |
| pub const TP_STATUS_LOSING: u32 = 4; | |
| pub const TP_STATUS_CSUMNOTREADY: u32 = 8; | |
| pub const TP_STATUS_VLAN_VALID: u32 = 16; | |
| pub const TP_STATUS_BLK_TMO: u32 = 32; | |
| pub const TP_STATUS_VLAN_TPID_VALID: u32 = 64; | |
| pub const TP_STATUS_CSUM_VALID: u32 = 128; | |
| pub const TP_STATUS_GSO_TCP: u32 = 256; | |
| pub const TP_STATUS_AVAILABLE: u32 = 0; | |
| pub const TP_STATUS_SEND_REQUEST: u32 = 1; | |
| pub const TP_STATUS_SENDING: u32 = 2; | |
| pub const TP_STATUS_WRONG_FORMAT: u32 = 4; | |
| pub const TP_STATUS_TS_SOFTWARE: u32 = 536870912; | |
| pub const TP_STATUS_TS_SYS_HARDWARE: u32 = 1073741824; | |
| pub const TP_STATUS_TS_RAW_HARDWARE: u32 = 2147483648; | |
| pub const TP_FT_REQ_FILL_RXHASH: u32 = 1; | |
| pub const TPACKET_ALIGNMENT: u32 = 16; | |
| pub const PACKET_MR_MULTICAST: u32 = 0; | |
| pub const PACKET_MR_PROMISC: u32 = 1; | |
| pub const PACKET_MR_ALLMULTI: u32 = 2; | |
| pub const PACKET_MR_UNICAST: u32 = 3; | |
| pub const LOOPBACK_IFINDEX: u32 = 1; | |
| pub const FLOWI_FLAG_ANYSRC: u32 = 1; | |
| pub const FLOWI_FLAG_KNOWN_NH: u32 = 2; | |
| pub const SKB_DROP_REASON_SUBSYS_SHIFT: u32 = 16; | |
| pub const CHECKSUM_NONE: u32 = 0; | |
| pub const CHECKSUM_UNNECESSARY: u32 = 1; | |
| pub const CHECKSUM_COMPLETE: u32 = 2; | |
| pub const CHECKSUM_PARTIAL: u32 = 3; | |
| pub const SKB_MAX_CSUM_LEVEL: u32 = 3; | |
| pub const MAX_SKB_FRAGS: u32 = 17; | |
| pub const GSO_BY_FRAGS: u32 = 65535; | |
| pub const SKB_DATAREF_SHIFT: u32 = 16; | |
| pub const SKB_DATAREF_MASK: u32 = 65535; | |
| pub const NET_SKBUFF_DATA_USES_OFFSET: u32 = 1; | |
| pub const CLONED_MASK: u32 = 1; | |
| pub const PKT_TYPE_MAX: u32 = 7; | |
| pub const SKB_MONO_DELIVERY_TIME_MASK: u32 = 1; | |
| pub const TC_AT_INGRESS_MASK: u32 = 2; | |
| pub const SKB_ALLOC_FCLONE: u32 = 1; | |
| pub const SKB_ALLOC_RX: u32 = 2; | |
| pub const SKB_ALLOC_NAPI: u32 = 4; | |
| pub const SKB_DST_NOREF: u32 = 1; | |
| pub const SKB_DST_PTRMASK: i32 = -2; | |
| pub const ENCAP_TYPE_ETHER: u32 = 0; | |
| pub const ENCAP_TYPE_IPPROTO: u32 = 1; | |
| pub const CHECKSUM_BREAK: u32 = 76; | |
| pub const NPROTO: u32 = 46; | |
| pub const SYS_SOCKET: u32 = 1; | |
| pub const SYS_BIND: u32 = 2; | |
| pub const SYS_CONNECT: u32 = 3; | |
| pub const SYS_LISTEN: u32 = 4; | |
| pub const SYS_ACCEPT: u32 = 5; | |
| pub const SYS_GETSOCKNAME: u32 = 6; | |
| pub const SYS_GETPEERNAME: u32 = 7; | |
| pub const SYS_SOCKETPAIR: u32 = 8; | |
| pub const SYS_SEND: u32 = 9; | |
| pub const SYS_RECV: u32 = 10; | |
| pub const SYS_SENDTO: u32 = 11; | |
| pub const SYS_RECVFROM: u32 = 12; | |
| pub const SYS_SHUTDOWN: u32 = 13; | |
| pub const SYS_SETSOCKOPT: u32 = 14; | |
| pub const SYS_GETSOCKOPT: u32 = 15; | |
| pub const SYS_SENDMSG: u32 = 16; | |
| pub const SYS_RECVMSG: u32 = 17; | |
| pub const SYS_ACCEPT4: u32 = 18; | |
| pub const SYS_RECVMMSG: u32 = 19; | |
| pub const SYS_SENDMMSG: u32 = 20; | |
| pub const __SO_ACCEPTCON: u32 = 65536; | |
| pub const SOCKWQ_ASYNC_NOSPACE: u32 = 0; | |
| pub const SOCKWQ_ASYNC_WAITDATA: u32 = 1; | |
| pub const SOCK_NOSPACE: u32 = 2; | |
| pub const SOCK_PASSCRED: u32 = 3; | |
| pub const SOCK_PASSSEC: u32 = 4; | |
| pub const SOCK_SUPPORT_ZC: u32 = 5; | |
| pub const SOCK_CUSTOM_SOCKOPT: u32 = 6; | |
| pub const SOCK_PASSPIDFD: u32 = 7; | |
| pub const SOCK_TYPE_MASK: u32 = 15; | |
| pub const SOCK_CLOEXEC: u32 = 524288; | |
| pub const SOCK_NONBLOCK: u32 = 2048; | |
| pub const FDPUT_FPUT: u32 = 1; | |
| pub const FDPUT_POS_UNLOCK: u32 = 2; | |
| pub const CAP_OPT_NONE: u32 = 0; | |
| pub const SECURITY_LSM_NATIVE_LABELS: u32 = 1; | |
| pub const LSM_SETID_ID: u32 = 1; | |
| pub const LSM_SETID_RE: u32 = 2; | |
| pub const LSM_SETID_RES: u32 = 4; | |
| pub const LSM_SETID_FS: u32 = 8; | |
| pub const LSM_PRLIMIT_READ: u32 = 1; | |
| pub const LSM_PRLIMIT_WRITE: u32 = 2; | |
| pub const LSM_UNSAFE_SHARE: u32 = 1; | |
| pub const LSM_UNSAFE_PTRACE: u32 = 2; | |
| pub const LSM_UNSAFE_NO_NEW_PRIVS: u32 = 4; | |
| pub const SCM_MAX_FD: u32 = 253; | |
| pub const NETLINK_ROUTE: u32 = 0; | |
| pub const NETLINK_UNUSED: u32 = 1; | |
| pub const NETLINK_USERSOCK: u32 = 2; | |
| pub const NETLINK_FIREWALL: u32 = 3; | |
| pub const NETLINK_SOCK_DIAG: u32 = 4; | |
| pub const NETLINK_NFLOG: u32 = 5; | |
| pub const NETLINK_XFRM: u32 = 6; | |
| pub const NETLINK_SELINUX: u32 = 7; | |
| pub const NETLINK_ISCSI: u32 = 8; | |
| pub const NETLINK_AUDIT: u32 = 9; | |
| pub const NETLINK_FIB_LOOKUP: u32 = 10; | |
| pub const NETLINK_CONNECTOR: u32 = 11; | |
| pub const NETLINK_NETFILTER: u32 = 12; | |
| pub const NETLINK_IP6_FW: u32 = 13; | |
| pub const NETLINK_DNRTMSG: u32 = 14; | |
| pub const NETLINK_KOBJECT_UEVENT: u32 = 15; | |
| pub const NETLINK_GENERIC: u32 = 16; | |
| pub const NETLINK_SCSITRANSPORT: u32 = 18; | |
| pub const NETLINK_ECRYPTFS: u32 = 19; | |
| pub const NETLINK_RDMA: u32 = 20; | |
| pub const NETLINK_CRYPTO: u32 = 21; | |
| pub const NETLINK_SMC: u32 = 22; | |
| pub const NETLINK_INET_DIAG: u32 = 4; | |
| pub const MAX_LINKS: u32 = 32; | |
| pub const NLM_F_REQUEST: u32 = 1; | |
| pub const NLM_F_MULTI: u32 = 2; | |
| pub const NLM_F_ACK: u32 = 4; | |
| pub const NLM_F_ECHO: u32 = 8; | |
| pub const NLM_F_DUMP_INTR: u32 = 16; | |
| pub const NLM_F_DUMP_FILTERED: u32 = 32; | |
| pub const NLM_F_ROOT: u32 = 256; | |
| pub const NLM_F_MATCH: u32 = 512; | |
| pub const NLM_F_ATOMIC: u32 = 1024; | |
| pub const NLM_F_DUMP: u32 = 768; | |
| pub const NLM_F_REPLACE: u32 = 256; | |
| pub const NLM_F_EXCL: u32 = 512; | |
| pub const NLM_F_CREATE: u32 = 1024; | |
| pub const NLM_F_APPEND: u32 = 2048; | |
| pub const NLM_F_NONREC: u32 = 256; | |
| pub const NLM_F_BULK: u32 = 512; | |
| pub const NLM_F_CAPPED: u32 = 256; | |
| pub const NLM_F_ACK_TLVS: u32 = 512; | |
| pub const NLMSG_ALIGNTO: u32 = 4; | |
| pub const NLMSG_NOOP: u32 = 1; | |
| pub const NLMSG_ERROR: u32 = 2; | |
| pub const NLMSG_DONE: u32 = 3; | |
| pub const NLMSG_OVERRUN: u32 = 4; | |
| pub const NLMSG_MIN_TYPE: u32 = 16; | |
| pub const NETLINK_ADD_MEMBERSHIP: u32 = 1; | |
| pub const NETLINK_DROP_MEMBERSHIP: u32 = 2; | |
| pub const NETLINK_PKTINFO: u32 = 3; | |
| pub const NETLINK_BROADCAST_ERROR: u32 = 4; | |
| pub const NETLINK_NO_ENOBUFS: u32 = 5; | |
| pub const NETLINK_LISTEN_ALL_NSID: u32 = 8; | |
| pub const NETLINK_LIST_MEMBERSHIPS: u32 = 9; | |
| pub const NETLINK_CAP_ACK: u32 = 10; | |
| pub const NETLINK_EXT_ACK: u32 = 11; | |
| pub const NETLINK_GET_STRICT_CHK: u32 = 12; | |
| pub const NET_MAJOR: u32 = 36; | |
| pub const NLA_F_NESTED: u32 = 32768; | |
| pub const NLA_F_NET_BYTEORDER: u32 = 16384; | |
| pub const NLA_TYPE_MASK: i32 = -49153; | |
| pub const NLA_ALIGNTO: u32 = 4; | |
| pub const NL_CFG_F_NONROOT_RECV: u32 = 1; | |
| pub const NL_CFG_F_NONROOT_SEND: u32 = 2; | |
| pub const NETLINK_MAX_COOKIE_LEN: u32 = 20; | |
| pub const NETLINK_MAX_FMTMSG_LEN: u32 = 80; | |
| pub const ETH_MDIO_SUPPORTS_C22: u32 = 1; | |
| pub const ETH_MDIO_SUPPORTS_C45: u32 = 2; | |
| pub const ETHTOOL_FWVERS_LEN: u32 = 32; | |
| pub const ETHTOOL_BUSINFO_LEN: u32 = 32; | |
| pub const ETHTOOL_EROMVERS_LEN: u32 = 32; | |
| pub const SOPASS_MAX: u32 = 6; | |
| pub const PFC_STORM_PREVENTION_AUTO: u32 = 65535; | |
| pub const PFC_STORM_PREVENTION_DISABLE: u32 = 0; | |
| pub const DOWNSHIFT_DEV_DEFAULT_COUNT: u32 = 255; | |
| pub const DOWNSHIFT_DEV_DISABLE: u32 = 0; | |
| pub const ETHTOOL_PHY_FAST_LINK_DOWN_ON: u32 = 0; | |
| pub const ETHTOOL_PHY_FAST_LINK_DOWN_OFF: u32 = 255; | |
| pub const ETHTOOL_PHY_EDPD_DFLT_TX_MSECS: u32 = 65535; | |
| pub const ETHTOOL_PHY_EDPD_NO_TX: u32 = 65534; | |
| pub const ETHTOOL_PHY_EDPD_DISABLE: u32 = 0; | |
| pub const ETH_GSTRING_LEN: u32 = 32; | |
| pub const ETH_RX_NFC_IP4: u32 = 1; | |
| pub const ETHTOOL_RX_FLOW_SPEC_RING: u32 = 4294967295; | |
| pub const ETHTOOL_RX_FLOW_SPEC_RING_VF: u64 = 1095216660480; | |
| pub const ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF: u32 = 32; | |
| pub const ETH_RXFH_CONTEXT_ALLOC: u32 = 4294967295; | |
| pub const ETH_RXFH_INDIR_NO_CHANGE: u32 = 4294967295; | |
| pub const ETHTOOL_RXNTUPLE_ACTION_DROP: i32 = -1; | |
| pub const ETHTOOL_RXNTUPLE_ACTION_CLEAR: i32 = -2; | |
| pub const ETHTOOL_FLASH_MAX_FILENAME: u32 = 128; | |
| pub const ETH_FW_DUMP_DISABLE: u32 = 0; | |
| pub const MAX_NUM_QUEUE: u32 = 4096; | |
| pub const ETHTOOL_GSET: u32 = 1; | |
| pub const ETHTOOL_SSET: u32 = 2; | |
| pub const ETHTOOL_GDRVINFO: u32 = 3; | |
| pub const ETHTOOL_GREGS: u32 = 4; | |
| pub const ETHTOOL_GWOL: u32 = 5; | |
| pub const ETHTOOL_SWOL: u32 = 6; | |
| pub const ETHTOOL_GMSGLVL: u32 = 7; | |
| pub const ETHTOOL_SMSGLVL: u32 = 8; | |
| pub const ETHTOOL_NWAY_RST: u32 = 9; | |
| pub const ETHTOOL_GLINK: u32 = 10; | |
| pub const ETHTOOL_GEEPROM: u32 = 11; | |
| pub const ETHTOOL_SEEPROM: u32 = 12; | |
| pub const ETHTOOL_GCOALESCE: u32 = 14; | |
| pub const ETHTOOL_SCOALESCE: u32 = 15; | |
| pub const ETHTOOL_GRINGPARAM: u32 = 16; | |
| pub const ETHTOOL_SRINGPARAM: u32 = 17; | |
| pub const ETHTOOL_GPAUSEPARAM: u32 = 18; | |
| pub const ETHTOOL_SPAUSEPARAM: u32 = 19; | |
| pub const ETHTOOL_GRXCSUM: u32 = 20; | |
| pub const ETHTOOL_SRXCSUM: u32 = 21; | |
| pub const ETHTOOL_GTXCSUM: u32 = 22; | |
| pub const ETHTOOL_STXCSUM: u32 = 23; | |
| pub const ETHTOOL_GSG: u32 = 24; | |
| pub const ETHTOOL_SSG: u32 = 25; | |
| pub const ETHTOOL_TEST: u32 = 26; | |
| pub const ETHTOOL_GSTRINGS: u32 = 27; | |
| pub const ETHTOOL_PHYS_ID: u32 = 28; | |
| pub const ETHTOOL_GSTATS: u32 = 29; | |
| pub const ETHTOOL_GTSO: u32 = 30; | |
| pub const ETHTOOL_STSO: u32 = 31; | |
| pub const ETHTOOL_GPERMADDR: u32 = 32; | |
| pub const ETHTOOL_GUFO: u32 = 33; | |
| pub const ETHTOOL_SUFO: u32 = 34; | |
| pub const ETHTOOL_GGSO: u32 = 35; | |
| pub const ETHTOOL_SGSO: u32 = 36; | |
| pub const ETHTOOL_GFLAGS: u32 = 37; | |
| pub const ETHTOOL_SFLAGS: u32 = 38; | |
| pub const ETHTOOL_GPFLAGS: u32 = 39; | |
| pub const ETHTOOL_SPFLAGS: u32 = 40; | |
| pub const ETHTOOL_GRXFH: u32 = 41; | |
| pub const ETHTOOL_SRXFH: u32 = 42; | |
| pub const ETHTOOL_GGRO: u32 = 43; | |
| pub const ETHTOOL_SGRO: u32 = 44; | |
| pub const ETHTOOL_GRXRINGS: u32 = 45; | |
| pub const ETHTOOL_GRXCLSRLCNT: u32 = 46; | |
| pub const ETHTOOL_GRXCLSRULE: u32 = 47; | |
| pub const ETHTOOL_GRXCLSRLALL: u32 = 48; | |
| pub const ETHTOOL_SRXCLSRLDEL: u32 = 49; | |
| pub const ETHTOOL_SRXCLSRLINS: u32 = 50; | |
| pub const ETHTOOL_FLASHDEV: u32 = 51; | |
| pub const ETHTOOL_RESET: u32 = 52; | |
| pub const ETHTOOL_SRXNTUPLE: u32 = 53; | |
| pub const ETHTOOL_GRXNTUPLE: u32 = 54; | |
| pub const ETHTOOL_GSSET_INFO: u32 = 55; | |
| pub const ETHTOOL_GRXFHINDIR: u32 = 56; | |
| pub const ETHTOOL_SRXFHINDIR: u32 = 57; | |
| pub const ETHTOOL_GFEATURES: u32 = 58; | |
| pub const ETHTOOL_SFEATURES: u32 = 59; | |
| pub const ETHTOOL_GCHANNELS: u32 = 60; | |
| pub const ETHTOOL_SCHANNELS: u32 = 61; | |
| pub const ETHTOOL_SET_DUMP: u32 = 62; | |
| pub const ETHTOOL_GET_DUMP_FLAG: u32 = 63; | |
| pub const ETHTOOL_GET_DUMP_DATA: u32 = 64; | |
| pub const ETHTOOL_GET_TS_INFO: u32 = 65; | |
| pub const ETHTOOL_GMODULEINFO: u32 = 66; | |
| pub const ETHTOOL_GMODULEEEPROM: u32 = 67; | |
| pub const ETHTOOL_GEEE: u32 = 68; | |
| pub const ETHTOOL_SEEE: u32 = 69; | |
| pub const ETHTOOL_GRSSH: u32 = 70; | |
| pub const ETHTOOL_SRSSH: u32 = 71; | |
| pub const ETHTOOL_GTUNABLE: u32 = 72; | |
| pub const ETHTOOL_STUNABLE: u32 = 73; | |
| pub const ETHTOOL_GPHYSTATS: u32 = 74; | |
| pub const ETHTOOL_PERQUEUE: u32 = 75; | |
| pub const ETHTOOL_GLINKSETTINGS: u32 = 76; | |
| pub const ETHTOOL_SLINKSETTINGS: u32 = 77; | |
| pub const ETHTOOL_PHY_GTUNABLE: u32 = 78; | |
| pub const ETHTOOL_PHY_STUNABLE: u32 = 79; | |
| pub const ETHTOOL_GFECPARAM: u32 = 80; | |
| pub const ETHTOOL_SFECPARAM: u32 = 81; | |
| pub const SPARC_ETH_GSET: u32 = 1; | |
| pub const SPARC_ETH_SSET: u32 = 2; | |
| pub const SPEED_10: u32 = 10; | |
| pub const SPEED_100: u32 = 100; | |
| pub const SPEED_1000: u32 = 1000; | |
| pub const SPEED_2500: u32 = 2500; | |
| pub const SPEED_5000: u32 = 5000; | |
| pub const SPEED_10000: u32 = 10000; | |
| pub const SPEED_14000: u32 = 14000; | |
| pub const SPEED_20000: u32 = 20000; | |
| pub const SPEED_25000: u32 = 25000; | |
| pub const SPEED_40000: u32 = 40000; | |
| pub const SPEED_50000: u32 = 50000; | |
| pub const SPEED_56000: u32 = 56000; | |
| pub const SPEED_100000: u32 = 100000; | |
| pub const SPEED_200000: u32 = 200000; | |
| pub const SPEED_400000: u32 = 400000; | |
| pub const SPEED_800000: u32 = 800000; | |
| pub const SPEED_UNKNOWN: i32 = -1; | |
| pub const DUPLEX_HALF: u32 = 0; | |
| pub const DUPLEX_FULL: u32 = 1; | |
| pub const DUPLEX_UNKNOWN: u32 = 255; | |
| pub const MASTER_SLAVE_CFG_UNSUPPORTED: u32 = 0; | |
| pub const MASTER_SLAVE_CFG_UNKNOWN: u32 = 1; | |
| pub const MASTER_SLAVE_CFG_MASTER_PREFERRED: u32 = 2; | |
| pub const MASTER_SLAVE_CFG_SLAVE_PREFERRED: u32 = 3; | |
| pub const MASTER_SLAVE_CFG_MASTER_FORCE: u32 = 4; | |
| pub const MASTER_SLAVE_CFG_SLAVE_FORCE: u32 = 5; | |
| pub const MASTER_SLAVE_STATE_UNSUPPORTED: u32 = 0; | |
| pub const MASTER_SLAVE_STATE_UNKNOWN: u32 = 1; | |
| pub const MASTER_SLAVE_STATE_MASTER: u32 = 2; | |
| pub const MASTER_SLAVE_STATE_SLAVE: u32 = 3; | |
| pub const MASTER_SLAVE_STATE_ERR: u32 = 4; | |
| pub const RATE_MATCH_NONE: u32 = 0; | |
| pub const RATE_MATCH_PAUSE: u32 = 1; | |
| pub const RATE_MATCH_CRS: u32 = 2; | |
| pub const RATE_MATCH_OPEN_LOOP: u32 = 3; | |
| pub const PORT_TP: u32 = 0; | |
| pub const PORT_AUI: u32 = 1; | |
| pub const PORT_MII: u32 = 2; | |
| pub const PORT_FIBRE: u32 = 3; | |
| pub const PORT_BNC: u32 = 4; | |
| pub const PORT_DA: u32 = 5; | |
| pub const PORT_NONE: u32 = 239; | |
| pub const PORT_OTHER: u32 = 255; | |
| pub const XCVR_INTERNAL: u32 = 0; | |
| pub const XCVR_EXTERNAL: u32 = 1; | |
| pub const XCVR_DUMMY1: u32 = 2; | |
| pub const XCVR_DUMMY2: u32 = 3; | |
| pub const XCVR_DUMMY3: u32 = 4; | |
| pub const AUTONEG_DISABLE: u32 = 0; | |
| pub const AUTONEG_ENABLE: u32 = 1; | |
| pub const ETH_TP_MDI_INVALID: u32 = 0; | |
| pub const ETH_TP_MDI: u32 = 1; | |
| pub const ETH_TP_MDI_X: u32 = 2; | |
| pub const ETH_TP_MDI_AUTO: u32 = 3; | |
| pub const WAKE_PHY: u32 = 1; | |
| pub const WAKE_UCAST: u32 = 2; | |
| pub const WAKE_MCAST: u32 = 4; | |
| pub const WAKE_BCAST: u32 = 8; | |
| pub const WAKE_ARP: u32 = 16; | |
| pub const WAKE_MAGIC: u32 = 32; | |
| pub const WAKE_MAGICSECURE: u32 = 64; | |
| pub const WAKE_FILTER: u32 = 128; | |
| pub const WOL_MODE_COUNT: u32 = 8; | |
| pub const RXH_XFRM_SYM_XOR: u32 = 1; | |
| pub const TCP_V4_FLOW: u32 = 1; | |
| pub const UDP_V4_FLOW: u32 = 2; | |
| pub const SCTP_V4_FLOW: u32 = 3; | |
| pub const AH_ESP_V4_FLOW: u32 = 4; | |
| pub const TCP_V6_FLOW: u32 = 5; | |
| pub const UDP_V6_FLOW: u32 = 6; | |
| pub const SCTP_V6_FLOW: u32 = 7; | |
| pub const AH_ESP_V6_FLOW: u32 = 8; | |
| pub const AH_V4_FLOW: u32 = 9; | |
| pub const ESP_V4_FLOW: u32 = 10; | |
| pub const AH_V6_FLOW: u32 = 11; | |
| pub const ESP_V6_FLOW: u32 = 12; | |
| pub const IPV4_USER_FLOW: u32 = 13; | |
| pub const IP_USER_FLOW: u32 = 13; | |
| pub const IPV6_USER_FLOW: u32 = 14; | |
| pub const IPV4_FLOW: u32 = 16; | |
| pub const IPV6_FLOW: u32 = 17; | |
| pub const ETHER_FLOW: u32 = 18; | |
| pub const FLOW_EXT: u32 = 2147483648; | |
| pub const FLOW_MAC_EXT: u32 = 1073741824; | |
| pub const FLOW_RSS: u32 = 536870912; | |
| pub const RXH_L2DA: u32 = 2; | |
| pub const RXH_VLAN: u32 = 4; | |
| pub const RXH_L3_PROTO: u32 = 8; | |
| pub const RXH_IP_SRC: u32 = 16; | |
| pub const RXH_IP_DST: u32 = 32; | |
| pub const RXH_L4_B_0_1: u32 = 64; | |
| pub const RXH_L4_B_2_3: u32 = 128; | |
| pub const RXH_DISCARD: u32 = 2147483648; | |
| pub const RX_CLS_FLOW_DISC: i32 = -1; | |
| pub const RX_CLS_FLOW_WAKE: i32 = -2; | |
| pub const RX_CLS_LOC_SPECIAL: u32 = 2147483648; | |
| pub const RX_CLS_LOC_ANY: u32 = 4294967295; | |
| pub const RX_CLS_LOC_FIRST: u32 = 4294967294; | |
| pub const RX_CLS_LOC_LAST: u32 = 4294967293; | |
| pub const ETH_MODULE_SFF_8079: u32 = 1; | |
| pub const ETH_MODULE_SFF_8079_LEN: u32 = 256; | |
| pub const ETH_MODULE_SFF_8472: u32 = 2; | |
| pub const ETH_MODULE_SFF_8472_LEN: u32 = 512; | |
| pub const ETH_MODULE_SFF_8636: u32 = 3; | |
| pub const ETH_MODULE_SFF_8636_LEN: u32 = 256; | |
| pub const ETH_MODULE_SFF_8436: u32 = 4; | |
| pub const ETH_MODULE_SFF_8436_LEN: u32 = 256; | |
| pub const ETH_MODULE_SFF_8636_MAX_LEN: u32 = 640; | |
| pub const ETH_MODULE_SFF_8436_MAX_LEN: u32 = 640; | |
| pub const ETH_RESET_SHARED_SHIFT: u32 = 16; | |
| pub const ETH_RSS_HASH_UNKNOWN: u32 = 0; | |
| pub const ETH_RSS_HASH_NO_CHANGE: u32 = 0; | |
| pub const ETHTOOL_STAT_NOT_SET: i32 = -1; | |
| pub const ETHTOOL_MAX_LANES: u32 = 8; | |
| pub const ETHTOOL_RMON_HIST_MAX: u32 = 10; | |
| pub const ETH_MODULE_EEPROM_PAGE_LEN: u32 = 128; | |
| pub const ETH_MODULE_MAX_I2C_ADDRESS: u32 = 127; | |
| pub const NR_OPEN_DEFAULT: u32 = 64; | |
| pub const NR_OPEN_MAX: i32 = -1; | |
| pub const MII_BMCR: u32 = 0; | |
| pub const MII_BMSR: u32 = 1; | |
| pub const MII_PHYSID1: u32 = 2; | |
| pub const MII_PHYSID2: u32 = 3; | |
| pub const MII_ADVERTISE: u32 = 4; | |
| pub const MII_LPA: u32 = 5; | |
| pub const MII_EXPANSION: u32 = 6; | |
| pub const MII_CTRL1000: u32 = 9; | |
| pub const MII_STAT1000: u32 = 10; | |
| pub const MII_MMD_CTRL: u32 = 13; | |
| pub const MII_MMD_DATA: u32 = 14; | |
| pub const MII_ESTATUS: u32 = 15; | |
| pub const MII_DCOUNTER: u32 = 18; | |
| pub const MII_FCSCOUNTER: u32 = 19; | |
| pub const MII_NWAYTEST: u32 = 20; | |
| pub const MII_RERRCOUNTER: u32 = 21; | |
| pub const MII_SREVISION: u32 = 22; | |
| pub const MII_RESV1: u32 = 23; | |
| pub const MII_LBRERROR: u32 = 24; | |
| pub const MII_PHYADDR: u32 = 25; | |
| pub const MII_RESV2: u32 = 26; | |
| pub const MII_TPISTATUS: u32 = 27; | |
| pub const MII_NCONFIG: u32 = 28; | |
| pub const BMCR_RESV: u32 = 63; | |
| pub const BMCR_SPEED1000: u32 = 64; | |
| pub const BMCR_CTST: u32 = 128; | |
| pub const BMCR_FULLDPLX: u32 = 256; | |
| pub const BMCR_ANRESTART: u32 = 512; | |
| pub const BMCR_ISOLATE: u32 = 1024; | |
| pub const BMCR_PDOWN: u32 = 2048; | |
| pub const BMCR_ANENABLE: u32 = 4096; | |
| pub const BMCR_SPEED100: u32 = 8192; | |
| pub const BMCR_LOOPBACK: u32 = 16384; | |
| pub const BMCR_RESET: u32 = 32768; | |
| pub const BMCR_SPEED10: u32 = 0; | |
| pub const BMSR_ERCAP: u32 = 1; | |
| pub const BMSR_JCD: u32 = 2; | |
| pub const BMSR_LSTATUS: u32 = 4; | |
| pub const BMSR_ANEGCAPABLE: u32 = 8; | |
| pub const BMSR_RFAULT: u32 = 16; | |
| pub const BMSR_ANEGCOMPLETE: u32 = 32; | |
| pub const BMSR_RESV: u32 = 192; | |
| pub const BMSR_ESTATEN: u32 = 256; | |
| pub const BMSR_100HALF2: u32 = 512; | |
| pub const BMSR_100FULL2: u32 = 1024; | |
| pub const BMSR_10HALF: u32 = 2048; | |
| pub const BMSR_10FULL: u32 = 4096; | |
| pub const BMSR_100HALF: u32 = 8192; | |
| pub const BMSR_100FULL: u32 = 16384; | |
| pub const BMSR_100BASE4: u32 = 32768; | |
| pub const ADVERTISE_SLCT: u32 = 31; | |
| pub const ADVERTISE_CSMA: u32 = 1; | |
| pub const ADVERTISE_10HALF: u32 = 32; | |
| pub const ADVERTISE_1000XFULL: u32 = 32; | |
| pub const ADVERTISE_10FULL: u32 = 64; | |
| pub const ADVERTISE_1000XHALF: u32 = 64; | |
| pub const ADVERTISE_100HALF: u32 = 128; | |
| pub const ADVERTISE_1000XPAUSE: u32 = 128; | |
| pub const ADVERTISE_100FULL: u32 = 256; | |
| pub const ADVERTISE_1000XPSE_ASYM: u32 = 256; | |
| pub const ADVERTISE_100BASE4: u32 = 512; | |
| pub const ADVERTISE_PAUSE_CAP: u32 = 1024; | |
| pub const ADVERTISE_PAUSE_ASYM: u32 = 2048; | |
| pub const ADVERTISE_RESV: u32 = 4096; | |
| pub const ADVERTISE_RFAULT: u32 = 8192; | |
| pub const ADVERTISE_LPACK: u32 = 16384; | |
| pub const ADVERTISE_NPAGE: u32 = 32768; | |
| pub const ADVERTISE_FULL: u32 = 321; | |
| pub const ADVERTISE_ALL: u32 = 480; | |
| pub const LPA_SLCT: u32 = 31; | |
| pub const LPA_10HALF: u32 = 32; | |
| pub const LPA_1000XFULL: u32 = 32; | |
| pub const LPA_10FULL: u32 = 64; | |
| pub const LPA_1000XHALF: u32 = 64; | |
| pub const LPA_100HALF: u32 = 128; | |
| pub const LPA_1000XPAUSE: u32 = 128; | |
| pub const LPA_100FULL: u32 = 256; | |
| pub const LPA_1000XPAUSE_ASYM: u32 = 256; | |
| pub const LPA_100BASE4: u32 = 512; | |
| pub const LPA_PAUSE_CAP: u32 = 1024; | |
| pub const LPA_PAUSE_ASYM: u32 = 2048; | |
| pub const LPA_RESV: u32 = 4096; | |
| pub const LPA_RFAULT: u32 = 8192; | |
| pub const LPA_LPACK: u32 = 16384; | |
| pub const LPA_NPAGE: u32 = 32768; | |
| pub const LPA_DUPLEX: u32 = 320; | |
| pub const LPA_100: u32 = 896; | |
| pub const EXPANSION_NWAY: u32 = 1; | |
| pub const EXPANSION_LCWP: u32 = 2; | |
| pub const EXPANSION_ENABLENPAGE: u32 = 4; | |
| pub const EXPANSION_NPCAPABLE: u32 = 8; | |
| pub const EXPANSION_MFAULTS: u32 = 16; | |
| pub const EXPANSION_RESV: u32 = 65504; | |
| pub const ESTATUS_1000_XFULL: u32 = 32768; | |
| pub const ESTATUS_1000_XHALF: u32 = 16384; | |
| pub const ESTATUS_1000_TFULL: u32 = 8192; | |
| pub const ESTATUS_1000_THALF: u32 = 4096; | |
| pub const NWAYTEST_RESV1: u32 = 255; | |
| pub const NWAYTEST_LOOPBACK: u32 = 256; | |
| pub const NWAYTEST_RESV2: u32 = 65024; | |
| pub const ADVERTISE_SGMII: u32 = 1; | |
| pub const LPA_SGMII: u32 = 1; | |
| pub const LPA_SGMII_SPD_MASK: u32 = 3072; | |
| pub const LPA_SGMII_FULL_DUPLEX: u32 = 4096; | |
| pub const LPA_SGMII_DPX_SPD_MASK: u32 = 7168; | |
| pub const LPA_SGMII_10: u32 = 0; | |
| pub const LPA_SGMII_10HALF: u32 = 0; | |
| pub const LPA_SGMII_10FULL: u32 = 4096; | |
| pub const LPA_SGMII_100: u32 = 1024; | |
| pub const LPA_SGMII_100HALF: u32 = 1024; | |
| pub const LPA_SGMII_100FULL: u32 = 5120; | |
| pub const LPA_SGMII_1000: u32 = 2048; | |
| pub const LPA_SGMII_1000HALF: u32 = 2048; | |
| pub const LPA_SGMII_1000FULL: u32 = 6144; | |
| pub const LPA_SGMII_LINK: u32 = 32768; | |
| pub const ADVERTISE_1000FULL: u32 = 512; | |
| pub const ADVERTISE_1000HALF: u32 = 256; | |
| pub const CTL1000_PREFER_MASTER: u32 = 1024; | |
| pub const CTL1000_AS_MASTER: u32 = 2048; | |
| pub const CTL1000_ENABLE_MASTER: u32 = 4096; | |
| pub const LPA_1000MSFAIL: u32 = 32768; | |
| pub const LPA_1000MSRES: u32 = 16384; | |
| pub const LPA_1000LOCALRXOK: u32 = 8192; | |
| pub const LPA_1000REMRXOK: u32 = 4096; | |
| pub const LPA_1000FULL: u32 = 2048; | |
| pub const LPA_1000HALF: u32 = 1024; | |
| pub const FLOW_CTRL_TX: u32 = 1; | |
| pub const FLOW_CTRL_RX: u32 = 2; | |
| pub const MII_MMD_CTRL_DEVAD_MASK: u32 = 31; | |
| pub const MII_MMD_CTRL_ADDR: u32 = 0; | |
| pub const MII_MMD_CTRL_NOINCR: u32 = 16384; | |
| pub const MII_MMD_CTRL_INCR_RDWT: u32 = 32768; | |
| pub const MII_MMD_CTRL_INCR_ON_WT: u32 = 49152; | |
| pub const MDIO_MMD_PMAPMD: u32 = 1; | |
| pub const MDIO_MMD_WIS: u32 = 2; | |
| pub const MDIO_MMD_PCS: u32 = 3; | |
| pub const MDIO_MMD_PHYXS: u32 = 4; | |
| pub const MDIO_MMD_DTEXS: u32 = 5; | |
| pub const MDIO_MMD_TC: u32 = 6; | |
| pub const MDIO_MMD_AN: u32 = 7; | |
| pub const MDIO_MMD_C22EXT: u32 = 29; | |
| pub const MDIO_MMD_VEND1: u32 = 30; | |
| pub const MDIO_MMD_VEND2: u32 = 31; | |
| pub const MDIO_CTRL1: u32 = 0; | |
| pub const MDIO_STAT1: u32 = 1; | |
| pub const MDIO_DEVID1: u32 = 2; | |
| pub const MDIO_DEVID2: u32 = 3; | |
| pub const MDIO_SPEED: u32 = 4; | |
| pub const MDIO_DEVS1: u32 = 5; | |
| pub const MDIO_DEVS2: u32 = 6; | |
| pub const MDIO_CTRL2: u32 = 7; | |
| pub const MDIO_STAT2: u32 = 8; | |
| pub const MDIO_PMA_TXDIS: u32 = 9; | |
| pub const MDIO_PMA_RXDET: u32 = 10; | |
| pub const MDIO_PMA_EXTABLE: u32 = 11; | |
| pub const MDIO_PKGID1: u32 = 14; | |
| pub const MDIO_PKGID2: u32 = 15; | |
| pub const MDIO_AN_ADVERTISE: u32 = 16; | |
| pub const MDIO_AN_LPA: u32 = 19; | |
| pub const MDIO_PCS_EEE_ABLE: u32 = 20; | |
| pub const MDIO_PCS_EEE_ABLE2: u32 = 21; | |
| pub const MDIO_PMA_NG_EXTABLE: u32 = 21; | |
| pub const MDIO_PCS_EEE_WK_ERR: u32 = 22; | |
| pub const MDIO_PHYXS_LNSTAT: u32 = 24; | |
| pub const MDIO_AN_EEE_ADV: u32 = 60; | |
| pub const MDIO_AN_EEE_LPABLE: u32 = 61; | |
| pub const MDIO_AN_EEE_ADV2: u32 = 62; | |
| pub const MDIO_AN_EEE_LPABLE2: u32 = 63; | |
| pub const MDIO_AN_CTRL2: u32 = 64; | |
| pub const MDIO_PMA_10GBT_SWAPPOL: u32 = 130; | |
| pub const MDIO_PMA_10GBT_TXPWR: u32 = 131; | |
| pub const MDIO_PMA_10GBT_SNR: u32 = 133; | |
| pub const MDIO_PMA_10GBR_FSRT_CSR: u32 = 147; | |
| pub const MDIO_PMA_10GBR_FECABLE: u32 = 170; | |
| pub const MDIO_PCS_10GBX_STAT1: u32 = 24; | |
| pub const MDIO_PCS_10GBRT_STAT1: u32 = 32; | |
| pub const MDIO_PCS_10GBRT_STAT2: u32 = 33; | |
| pub const MDIO_AN_10GBT_CTRL: u32 = 32; | |
| pub const MDIO_AN_10GBT_STAT: u32 = 33; | |
| pub const MDIO_B10L_PMA_CTRL: u32 = 2294; | |
| pub const MDIO_PMA_10T1L_STAT: u32 = 2295; | |
| pub const MDIO_PCS_10T1L_CTRL: u32 = 2278; | |
| pub const MDIO_PMA_PMD_BT1: u32 = 18; | |
| pub const MDIO_AN_T1_CTRL: u32 = 512; | |
| pub const MDIO_AN_T1_STAT: u32 = 513; | |
| pub const MDIO_AN_T1_ADV_L: u32 = 514; | |
| pub const MDIO_AN_T1_ADV_M: u32 = 515; | |
| pub const MDIO_AN_T1_ADV_H: u32 = 516; | |
| pub const MDIO_AN_T1_LP_L: u32 = 517; | |
| pub const MDIO_AN_T1_LP_M: u32 = 518; | |
| pub const MDIO_AN_T1_LP_H: u32 = 519; | |
| pub const MDIO_AN_10BT1_AN_CTRL: u32 = 526; | |
| pub const MDIO_AN_10BT1_AN_STAT: u32 = 527; | |
| pub const MDIO_PMA_PMD_BT1_CTRL: u32 = 2100; | |
| pub const MDIO_PCS_1000BT1_CTRL: u32 = 2304; | |
| pub const MDIO_PCS_1000BT1_STAT: u32 = 2305; | |
| pub const MDIO_PMA_LASI_RXCTRL: u32 = 36864; | |
| pub const MDIO_PMA_LASI_TXCTRL: u32 = 36865; | |
| pub const MDIO_PMA_LASI_CTRL: u32 = 36866; | |
| pub const MDIO_PMA_LASI_RXSTAT: u32 = 36867; | |
| pub const MDIO_PMA_LASI_TXSTAT: u32 = 36868; | |
| pub const MDIO_PMA_LASI_STAT: u32 = 36869; | |
| pub const MDIO_CTRL1_SPEEDSELEXT: u32 = 8256; | |
| pub const MDIO_CTRL1_SPEEDSEL: u32 = 8316; | |
| pub const MDIO_CTRL1_FULLDPLX: u32 = 256; | |
| pub const MDIO_CTRL1_LPOWER: u32 = 2048; | |
| pub const MDIO_CTRL1_RESET: u32 = 32768; | |
| pub const MDIO_PMA_CTRL1_LOOPBACK: u32 = 1; | |
| pub const MDIO_PMA_CTRL1_SPEED1000: u32 = 64; | |
| pub const MDIO_PMA_CTRL1_SPEED100: u32 = 8192; | |
| pub const MDIO_PCS_CTRL1_LOOPBACK: u32 = 16384; | |
| pub const MDIO_PHYXS_CTRL1_LOOPBACK: u32 = 16384; | |
| pub const MDIO_AN_CTRL1_RESTART: u32 = 512; | |
| pub const MDIO_AN_CTRL1_ENABLE: u32 = 4096; | |
| pub const MDIO_AN_CTRL1_XNP: u32 = 8192; | |
| pub const MDIO_PCS_CTRL1_CLKSTOP_EN: u32 = 1024; | |
| pub const MDIO_CTRL1_SPEED10G: u32 = 8256; | |
| pub const MDIO_CTRL1_SPEED10P2B: u32 = 8260; | |
| pub const MDIO_CTRL1_SPEED2_5G: u32 = 8280; | |
| pub const MDIO_CTRL1_SPEED5G: u32 = 8284; | |
| pub const MDIO_STAT1_LPOWERABLE: u32 = 2; | |
| pub const MDIO_STAT1_LSTATUS: u32 = 4; | |
| pub const MDIO_STAT1_FAULT: u32 = 128; | |
| pub const MDIO_AN_STAT1_LPABLE: u32 = 1; | |
| pub const MDIO_AN_STAT1_ABLE: u32 = 8; | |
| pub const MDIO_AN_STAT1_RFAULT: u32 = 16; | |
| pub const MDIO_AN_STAT1_COMPLETE: u32 = 32; | |
| pub const MDIO_AN_STAT1_PAGE: u32 = 64; | |
| pub const MDIO_AN_STAT1_XNP: u32 = 128; | |
| pub const MDIO_SPEED_10G: u32 = 1; | |
| pub const MDIO_PMA_SPEED_2B: u32 = 2; | |
| pub const MDIO_PMA_SPEED_10P: u32 = 4; | |
| pub const MDIO_PMA_SPEED_1000: u32 = 16; | |
| pub const MDIO_PMA_SPEED_100: u32 = 32; | |
| pub const MDIO_PMA_SPEED_10: u32 = 64; | |
| pub const MDIO_PCS_SPEED_10P2B: u32 = 2; | |
| pub const MDIO_PCS_SPEED_2_5G: u32 = 64; | |
| pub const MDIO_PCS_SPEED_5G: u32 = 128; | |
| pub const MDIO_PMA_CTRL2_TYPE: u32 = 15; | |
| pub const MDIO_PMA_CTRL2_10GBCX4: u32 = 0; | |
| pub const MDIO_PMA_CTRL2_10GBEW: u32 = 1; | |
| pub const MDIO_PMA_CTRL2_10GBLW: u32 = 2; | |
| pub const MDIO_PMA_CTRL2_10GBSW: u32 = 3; | |
| pub const MDIO_PMA_CTRL2_10GBLX4: u32 = 4; | |
| pub const MDIO_PMA_CTRL2_10GBER: u32 = 5; | |
| pub const MDIO_PMA_CTRL2_10GBLR: u32 = 6; | |
| pub const MDIO_PMA_CTRL2_10GBSR: u32 = 7; | |
| pub const MDIO_PMA_CTRL2_10GBLRM: u32 = 8; | |
| pub const MDIO_PMA_CTRL2_10GBT: u32 = 9; | |
| pub const MDIO_PMA_CTRL2_10GBKX4: u32 = 10; | |
| pub const MDIO_PMA_CTRL2_10GBKR: u32 = 11; | |
| pub const MDIO_PMA_CTRL2_1000BT: u32 = 12; | |
| pub const MDIO_PMA_CTRL2_1000BKX: u32 = 13; | |
| pub const MDIO_PMA_CTRL2_100BTX: u32 = 14; | |
| pub const MDIO_PMA_CTRL2_10BT: u32 = 15; | |
| pub const MDIO_PMA_CTRL2_2_5GBT: u32 = 48; | |
| pub const MDIO_PMA_CTRL2_5GBT: u32 = 49; | |
| pub const MDIO_PMA_CTRL2_BASET1: u32 = 61; | |
| pub const MDIO_PCS_CTRL2_TYPE: u32 = 3; | |
| pub const MDIO_PCS_CTRL2_10GBR: u32 = 0; | |
| pub const MDIO_PCS_CTRL2_10GBX: u32 = 1; | |
| pub const MDIO_PCS_CTRL2_10GBW: u32 = 2; | |
| pub const MDIO_PCS_CTRL2_10GBT: u32 = 3; | |
| pub const MDIO_STAT2_RXFAULT: u32 = 1024; | |
| pub const MDIO_STAT2_TXFAULT: u32 = 2048; | |
| pub const MDIO_STAT2_DEVPRST: u32 = 49152; | |
| pub const MDIO_STAT2_DEVPRST_VAL: u32 = 32768; | |
| pub const MDIO_PMA_STAT2_LBABLE: u32 = 1; | |
| pub const MDIO_PMA_STAT2_10GBEW: u32 = 2; | |
| pub const MDIO_PMA_STAT2_10GBLW: u32 = 4; | |
| pub const MDIO_PMA_STAT2_10GBSW: u32 = 8; | |
| pub const MDIO_PMA_STAT2_10GBLX4: u32 = 16; | |
| pub const MDIO_PMA_STAT2_10GBER: u32 = 32; | |
| pub const MDIO_PMA_STAT2_10GBLR: u32 = 64; | |
| pub const MDIO_PMA_STAT2_10GBSR: u32 = 128; | |
| pub const MDIO_PMD_STAT2_TXDISAB: u32 = 256; | |
| pub const MDIO_PMA_STAT2_EXTABLE: u32 = 512; | |
| pub const MDIO_PMA_STAT2_RXFLTABLE: u32 = 4096; | |
| pub const MDIO_PMA_STAT2_TXFLTABLE: u32 = 8192; | |
| pub const MDIO_PCS_STAT2_10GBR: u32 = 1; | |
| pub const MDIO_PCS_STAT2_10GBX: u32 = 2; | |
| pub const MDIO_PCS_STAT2_10GBW: u32 = 4; | |
| pub const MDIO_PCS_STAT2_RXFLTABLE: u32 = 4096; | |
| pub const MDIO_PCS_STAT2_TXFLTABLE: u32 = 8192; | |
| pub const MDIO_PMD_TXDIS_GLOBAL: u32 = 1; | |
| pub const MDIO_PMD_TXDIS_0: u32 = 2; | |
| pub const MDIO_PMD_TXDIS_1: u32 = 4; | |
| pub const MDIO_PMD_TXDIS_2: u32 = 8; | |
| pub const MDIO_PMD_TXDIS_3: u32 = 16; | |
| pub const MDIO_PMD_RXDET_GLOBAL: u32 = 1; | |
| pub const MDIO_PMD_RXDET_0: u32 = 2; | |
| pub const MDIO_PMD_RXDET_1: u32 = 4; | |
| pub const MDIO_PMD_RXDET_2: u32 = 8; | |
| pub const MDIO_PMD_RXDET_3: u32 = 16; | |
| pub const MDIO_PMA_EXTABLE_10GCX4: u32 = 1; | |
| pub const MDIO_PMA_EXTABLE_10GBLRM: u32 = 2; | |
| pub const MDIO_PMA_EXTABLE_10GBT: u32 = 4; | |
| pub const MDIO_PMA_EXTABLE_10GBKX4: u32 = 8; | |
| pub const MDIO_PMA_EXTABLE_10GBKR: u32 = 16; | |
| pub const MDIO_PMA_EXTABLE_1000BT: u32 = 32; | |
| pub const MDIO_PMA_EXTABLE_1000BKX: u32 = 64; | |
| pub const MDIO_PMA_EXTABLE_100BTX: u32 = 128; | |
| pub const MDIO_PMA_EXTABLE_10BT: u32 = 256; | |
| pub const MDIO_PMA_EXTABLE_BT1: u32 = 2048; | |
| pub const MDIO_PMA_EXTABLE_NBT: u32 = 16384; | |
| pub const MDIO_PHYXS_LNSTAT_SYNC0: u32 = 1; | |
| pub const MDIO_PHYXS_LNSTAT_SYNC1: u32 = 2; | |
| pub const MDIO_PHYXS_LNSTAT_SYNC2: u32 = 4; | |
| pub const MDIO_PHYXS_LNSTAT_SYNC3: u32 = 8; | |
| pub const MDIO_PHYXS_LNSTAT_ALIGN: u32 = 4096; | |
| pub const MDIO_PMA_10GBT_SWAPPOL_ABNX: u32 = 1; | |
| pub const MDIO_PMA_10GBT_SWAPPOL_CDNX: u32 = 2; | |
| pub const MDIO_PMA_10GBT_SWAPPOL_AREV: u32 = 256; | |
| pub const MDIO_PMA_10GBT_SWAPPOL_BREV: u32 = 512; | |
| pub const MDIO_PMA_10GBT_SWAPPOL_CREV: u32 = 1024; | |
| pub const MDIO_PMA_10GBT_SWAPPOL_DREV: u32 = 2048; | |
| pub const MDIO_PMA_10GBT_TXPWR_SHORT: u32 = 1; | |
| pub const MDIO_PMA_10GBT_SNR_BIAS: u32 = 32768; | |
| pub const MDIO_PMA_10GBT_SNR_MAX: u32 = 127; | |
| pub const MDIO_PMA_10GBR_FECABLE_ABLE: u32 = 1; | |
| pub const MDIO_PMA_10GBR_FECABLE_ERRABLE: u32 = 2; | |
| pub const MDIO_PMA_10GBR_FSRT_ENABLE: u32 = 1; | |
| pub const MDIO_PCS_10GBRT_STAT1_BLKLK: u32 = 1; | |
| pub const MDIO_PCS_10GBRT_STAT2_ERR: u32 = 255; | |
| pub const MDIO_PCS_10GBRT_STAT2_BER: u32 = 16128; | |
| pub const MDIO_AN_10GBT_CTRL_ADVFSRT2_5G: u32 = 32; | |
| pub const MDIO_AN_10GBT_CTRL_ADV2_5G: u32 = 128; | |
| pub const MDIO_AN_10GBT_CTRL_ADV5G: u32 = 256; | |
| pub const MDIO_AN_10GBT_CTRL_ADV10G: u32 = 4096; | |
| pub const MDIO_AN_10GBT_STAT_LP2_5G: u32 = 32; | |
| pub const MDIO_AN_10GBT_STAT_LP5G: u32 = 64; | |
| pub const MDIO_AN_10GBT_STAT_LPTRR: u32 = 512; | |
| pub const MDIO_AN_10GBT_STAT_LPLTABLE: u32 = 1024; | |
| pub const MDIO_AN_10GBT_STAT_LP10G: u32 = 2048; | |
| pub const MDIO_AN_10GBT_STAT_REMOK: u32 = 4096; | |
| pub const MDIO_AN_10GBT_STAT_LOCOK: u32 = 8192; | |
| pub const MDIO_AN_10GBT_STAT_MS: u32 = 16384; | |
| pub const MDIO_AN_10GBT_STAT_MSFLT: u32 = 32768; | |
| pub const MDIO_PMA_10T1L_CTRL_LB_EN: u32 = 1; | |
| pub const MDIO_PMA_10T1L_CTRL_EEE_EN: u32 = 1024; | |
| pub const MDIO_PMA_10T1L_CTRL_LOW_POWER: u32 = 2048; | |
| pub const MDIO_PMA_10T1L_CTRL_2V4_EN: u32 = 4096; | |
| pub const MDIO_PMA_10T1L_CTRL_TX_DIS: u32 = 16384; | |
| pub const MDIO_PMA_10T1L_CTRL_PMA_RST: u32 = 32768; | |
| pub const MDIO_PMA_10T1L_STAT_LINK: u32 = 1; | |
| pub const MDIO_PMA_10T1L_STAT_FAULT: u32 = 2; | |
| pub const MDIO_PMA_10T1L_STAT_POLARITY: u32 = 4; | |
| pub const MDIO_PMA_10T1L_STAT_RECV_FAULT: u32 = 512; | |
| pub const MDIO_PMA_10T1L_STAT_EEE: u32 = 1024; | |
| pub const MDIO_PMA_10T1L_STAT_LOW_POWER: u32 = 2048; | |
| pub const MDIO_PMA_10T1L_STAT_2V4_ABLE: u32 = 4096; | |
| pub const MDIO_PMA_10T1L_STAT_LB_ABLE: u32 = 8192; | |
| pub const MDIO_PCS_10T1L_CTRL_LB: u32 = 16384; | |
| pub const MDIO_PCS_10T1L_CTRL_RESET: u32 = 32768; | |
| pub const MDIO_PMA_PMD_BT1_B100_ABLE: u32 = 1; | |
| pub const MDIO_PMA_PMD_BT1_B1000_ABLE: u32 = 2; | |
| pub const MDIO_PMA_PMD_BT1_B10L_ABLE: u32 = 4; | |
| pub const MDIO_AN_T1_ADV_L_PAUSE_CAP: u32 = 1024; | |
| pub const MDIO_AN_T1_ADV_L_PAUSE_ASYM: u32 = 2048; | |
| pub const MDIO_AN_T1_ADV_L_FORCE_MS: u32 = 4096; | |
| pub const MDIO_AN_T1_ADV_L_REMOTE_FAULT: u32 = 8192; | |
| pub const MDIO_AN_T1_ADV_L_ACK: u32 = 16384; | |
| pub const MDIO_AN_T1_ADV_L_NEXT_PAGE_REQ: u32 = 32768; | |
| pub const MDIO_AN_T1_ADV_M_B10L: u32 = 16384; | |
| pub const MDIO_AN_T1_ADV_M_MST: u32 = 16; | |
| pub const MDIO_AN_T1_ADV_H_10L_TX_HI_REQ: u32 = 4096; | |
| pub const MDIO_AN_T1_ADV_H_10L_TX_HI: u32 = 8192; | |
| pub const MDIO_AN_T1_LP_L_PAUSE_CAP: u32 = 1024; | |
| pub const MDIO_AN_T1_LP_L_PAUSE_ASYM: u32 = 2048; | |
| pub const MDIO_AN_T1_LP_L_FORCE_MS: u32 = 4096; | |
| pub const MDIO_AN_T1_LP_L_REMOTE_FAULT: u32 = 8192; | |
| pub const MDIO_AN_T1_LP_L_ACK: u32 = 16384; | |
| pub const MDIO_AN_T1_LP_L_NEXT_PAGE_REQ: u32 = 32768; | |
| pub const MDIO_AN_T1_LP_M_MST: u32 = 16; | |
| pub const MDIO_AN_T1_LP_M_B10L: u32 = 16384; | |
| pub const MDIO_AN_T1_LP_H_10L_TX_HI_REQ: u32 = 4096; | |
| pub const MDIO_AN_T1_LP_H_10L_TX_HI: u32 = 8192; | |
| pub const MDIO_AN_10BT1_AN_CTRL_ADV_EEE_T1L: u32 = 16384; | |
| pub const MDIO_AN_10BT1_AN_STAT_LPA_EEE_T1L: u32 = 16384; | |
| pub const MDIO_PMA_PMD_BT1_CTRL_STRAP: u32 = 15; | |
| pub const MDIO_PMA_PMD_BT1_CTRL_STRAP_B1000: u32 = 1; | |
| pub const MDIO_PMA_PMD_BT1_CTRL_CFG_MST: u32 = 16384; | |
| pub const MDIO_PCS_1000BT1_CTRL_LOW_POWER: u32 = 2048; | |
| pub const MDIO_PCS_1000BT1_CTRL_DISABLE_TX: u32 = 16384; | |
| pub const MDIO_PCS_1000BT1_CTRL_RESET: u32 = 32768; | |
| pub const MDIO_PCS_1000BT1_STAT_LINK: u32 = 4; | |
| pub const MDIO_PCS_1000BT1_STAT_FAULT: u32 = 128; | |
| pub const MDIO_AN_EEE_ADV_100TX: u32 = 2; | |
| pub const MDIO_AN_EEE_ADV_1000T: u32 = 4; | |
| pub const MDIO_EEE_100TX: u32 = 2; | |
| pub const MDIO_EEE_1000T: u32 = 4; | |
| pub const MDIO_EEE_10GT: u32 = 8; | |
| pub const MDIO_EEE_1000KX: u32 = 16; | |
| pub const MDIO_EEE_10GKX4: u32 = 32; | |
| pub const MDIO_EEE_10GKR: u32 = 64; | |
| pub const MDIO_EEE_40GR_FW: u32 = 256; | |
| pub const MDIO_EEE_40GR_DS: u32 = 512; | |
| pub const MDIO_EEE_100GR_FW: u32 = 4096; | |
| pub const MDIO_EEE_100GR_DS: u32 = 8192; | |
| pub const MDIO_EEE_2_5GT: u32 = 1; | |
| pub const MDIO_EEE_5GT: u32 = 2; | |
| pub const MDIO_AN_THP_BP2_5GT: u32 = 8; | |
| pub const MDIO_PMA_NG_EXTABLE_2_5GBT: u32 = 1; | |
| pub const MDIO_PMA_NG_EXTABLE_5GBT: u32 = 2; | |
| pub const MDIO_PMA_LASI_RX_PHYXSLFLT: u32 = 1; | |
| pub const MDIO_PMA_LASI_RX_PCSLFLT: u32 = 8; | |
| pub const MDIO_PMA_LASI_RX_PMALFLT: u32 = 16; | |
| pub const MDIO_PMA_LASI_RX_OPTICPOWERFLT: u32 = 32; | |
| pub const MDIO_PMA_LASI_RX_WISLFLT: u32 = 512; | |
| pub const MDIO_PMA_LASI_TX_PHYXSLFLT: u32 = 1; | |
| pub const MDIO_PMA_LASI_TX_PCSLFLT: u32 = 8; | |
| pub const MDIO_PMA_LASI_TX_PMALFLT: u32 = 16; | |
| pub const MDIO_PMA_LASI_TX_LASERPOWERFLT: u32 = 128; | |
| pub const MDIO_PMA_LASI_TX_LASERTEMPFLT: u32 = 256; | |
| pub const MDIO_PMA_LASI_TX_LASERBICURRFLT: u32 = 512; | |
| pub const MDIO_PMA_LASI_LSALARM: u32 = 1; | |
| pub const MDIO_PMA_LASI_TXALARM: u32 = 2; | |
| pub const MDIO_PMA_LASI_RXALARM: u32 = 4; | |
| pub const MDIO_PHY_ID_C45: u32 = 32768; | |
| pub const MDIO_PHY_ID_PRTAD: u32 = 992; | |
| pub const MDIO_PHY_ID_DEVAD: u32 = 31; | |
| pub const MDIO_PHY_ID_C45_MASK: u32 = 33791; | |
| pub const MDIO_USXGMII_EEE_CLK_STP: u32 = 128; | |
| pub const MDIO_USXGMII_EEE: u32 = 256; | |
| pub const MDIO_USXGMII_SPD_MASK: u32 = 3584; | |
| pub const MDIO_USXGMII_FULL_DUPLEX: u32 = 4096; | |
| pub const MDIO_USXGMII_DPX_SPD_MASK: u32 = 7680; | |
| pub const MDIO_USXGMII_10: u32 = 0; | |
| pub const MDIO_USXGMII_10HALF: u32 = 0; | |
| pub const MDIO_USXGMII_10FULL: u32 = 4096; | |
| pub const MDIO_USXGMII_100: u32 = 512; | |
| pub const MDIO_USXGMII_100HALF: u32 = 512; | |
| pub const MDIO_USXGMII_100FULL: u32 = 4608; | |
| pub const MDIO_USXGMII_1000: u32 = 1024; | |
| pub const MDIO_USXGMII_1000HALF: u32 = 1024; | |
| pub const MDIO_USXGMII_1000FULL: u32 = 5120; | |
| pub const MDIO_USXGMII_10G: u32 = 1536; | |
| pub const MDIO_USXGMII_10GHALF: u32 = 1536; | |
| pub const MDIO_USXGMII_10GFULL: u32 = 5632; | |
| pub const MDIO_USXGMII_2500: u32 = 2048; | |
| pub const MDIO_USXGMII_2500HALF: u32 = 2048; | |
| pub const MDIO_USXGMII_2500FULL: u32 = 6144; | |
| pub const MDIO_USXGMII_5000: u32 = 2560; | |
| pub const MDIO_USXGMII_5000HALF: u32 = 2560; | |
| pub const MDIO_USXGMII_5000FULL: u32 = 6656; | |
| pub const MDIO_USXGMII_LINK: u32 = 32768; | |
| pub const PCI_ANY_ID: i32 = -1; | |
| pub const IEEE1394_MATCH_VENDOR_ID: u32 = 1; | |
| pub const IEEE1394_MATCH_MODEL_ID: u32 = 2; | |
| pub const IEEE1394_MATCH_SPECIFIER_ID: u32 = 4; | |
| pub const IEEE1394_MATCH_VERSION: u32 = 8; | |
| pub const USB_DEVICE_ID_MATCH_VENDOR: u32 = 1; | |
| pub const USB_DEVICE_ID_MATCH_PRODUCT: u32 = 2; | |
| pub const USB_DEVICE_ID_MATCH_DEV_LO: u32 = 4; | |
| pub const USB_DEVICE_ID_MATCH_DEV_HI: u32 = 8; | |
| pub const USB_DEVICE_ID_MATCH_DEV_CLASS: u32 = 16; | |
| pub const USB_DEVICE_ID_MATCH_DEV_SUBCLASS: u32 = 32; | |
| pub const USB_DEVICE_ID_MATCH_DEV_PROTOCOL: u32 = 64; | |
| pub const USB_DEVICE_ID_MATCH_INT_CLASS: u32 = 128; | |
| pub const USB_DEVICE_ID_MATCH_INT_SUBCLASS: u32 = 256; | |
| pub const USB_DEVICE_ID_MATCH_INT_PROTOCOL: u32 = 512; | |
| pub const USB_DEVICE_ID_MATCH_INT_NUMBER: u32 = 1024; | |
| pub const HID_ANY_ID: i32 = -1; | |
| pub const HID_BUS_ANY: u32 = 65535; | |
| pub const HID_GROUP_ANY: u32 = 0; | |
| pub const CCW_DEVICE_ID_MATCH_CU_TYPE: u32 = 1; | |
| pub const CCW_DEVICE_ID_MATCH_CU_MODEL: u32 = 2; | |
| pub const CCW_DEVICE_ID_MATCH_DEVICE_TYPE: u32 = 4; | |
| pub const CCW_DEVICE_ID_MATCH_DEVICE_MODEL: u32 = 8; | |
| pub const AP_DEVICE_ID_MATCH_CARD_TYPE: u32 = 1; | |
| pub const AP_DEVICE_ID_MATCH_QUEUE_TYPE: u32 = 2; | |
| pub const ACPI_ID_LEN: u32 = 16; | |
| pub const PNP_ID_LEN: u32 = 8; | |
| pub const PNP_MAX_DEVICES: u32 = 8; | |
| pub const SERIO_ANY: u32 = 255; | |
| pub const PCMCIA_DEV_ID_MATCH_MANF_ID: u32 = 1; | |
| pub const PCMCIA_DEV_ID_MATCH_CARD_ID: u32 = 2; | |
| pub const PCMCIA_DEV_ID_MATCH_FUNC_ID: u32 = 4; | |
| pub const PCMCIA_DEV_ID_MATCH_FUNCTION: u32 = 8; | |
| pub const PCMCIA_DEV_ID_MATCH_PROD_ID1: u32 = 16; | |
| pub const PCMCIA_DEV_ID_MATCH_PROD_ID2: u32 = 32; | |
| pub const PCMCIA_DEV_ID_MATCH_PROD_ID3: u32 = 64; | |
| pub const PCMCIA_DEV_ID_MATCH_PROD_ID4: u32 = 128; | |
| pub const PCMCIA_DEV_ID_MATCH_DEVICE_NO: u32 = 256; | |
| pub const PCMCIA_DEV_ID_MATCH_FAKE_CIS: u32 = 512; | |
| pub const PCMCIA_DEV_ID_MATCH_ANONYMOUS: u32 = 1024; | |
| pub const INPUT_DEVICE_ID_EV_MAX: u32 = 31; | |
| pub const INPUT_DEVICE_ID_KEY_MIN_INTERESTING: u32 = 113; | |
| pub const INPUT_DEVICE_ID_KEY_MAX: u32 = 767; | |
| pub const INPUT_DEVICE_ID_REL_MAX: u32 = 15; | |
| pub const INPUT_DEVICE_ID_ABS_MAX: u32 = 63; | |
| pub const INPUT_DEVICE_ID_MSC_MAX: u32 = 7; | |
| pub const INPUT_DEVICE_ID_LED_MAX: u32 = 15; | |
| pub const INPUT_DEVICE_ID_SND_MAX: u32 = 7; | |
| pub const INPUT_DEVICE_ID_FF_MAX: u32 = 127; | |
| pub const INPUT_DEVICE_ID_SW_MAX: u32 = 16; | |
| pub const INPUT_DEVICE_ID_PROP_MAX: u32 = 31; | |
| pub const INPUT_DEVICE_ID_MATCH_BUS: u32 = 1; | |
| pub const INPUT_DEVICE_ID_MATCH_VENDOR: u32 = 2; | |
| pub const INPUT_DEVICE_ID_MATCH_PRODUCT: u32 = 4; | |
| pub const INPUT_DEVICE_ID_MATCH_VERSION: u32 = 8; | |
| pub const INPUT_DEVICE_ID_MATCH_EVBIT: u32 = 16; | |
| pub const INPUT_DEVICE_ID_MATCH_KEYBIT: u32 = 32; | |
| pub const INPUT_DEVICE_ID_MATCH_RELBIT: u32 = 64; | |
| pub const INPUT_DEVICE_ID_MATCH_ABSBIT: u32 = 128; | |
| pub const INPUT_DEVICE_ID_MATCH_MSCIT: u32 = 256; | |
| pub const INPUT_DEVICE_ID_MATCH_LEDBIT: u32 = 512; | |
| pub const INPUT_DEVICE_ID_MATCH_SNDBIT: u32 = 1024; | |
| pub const INPUT_DEVICE_ID_MATCH_FFBIT: u32 = 2048; | |
| pub const INPUT_DEVICE_ID_MATCH_SWBIT: u32 = 4096; | |
| pub const INPUT_DEVICE_ID_MATCH_PROPBIT: u32 = 8192; | |
| pub const EISA_SIG_LEN: u32 = 8; | |
| pub const EISA_DEVICE_MODALIAS_FMT: &[u8; 9usize] = b"eisa:s%s\0"; | |
| pub const PA_HWTYPE_ANY_ID: u32 = 255; | |
| pub const PA_HVERSION_REV_ANY_ID: u32 = 255; | |
| pub const PA_HVERSION_ANY_ID: u32 = 65535; | |
| pub const PA_SVERSION_ANY_ID: u32 = 4294967295; | |
| pub const SDIO_ANY_ID: i32 = -1; | |
| pub const SSB_ANY_VENDOR: u32 = 65535; | |
| pub const SSB_ANY_ID: u32 = 65535; | |
| pub const SSB_ANY_REV: u32 = 255; | |
| pub const BCMA_ANY_MANUF: u32 = 65535; | |
| pub const BCMA_ANY_ID: u32 = 65535; | |
| pub const BCMA_ANY_REV: u32 = 255; | |
| pub const BCMA_ANY_CLASS: u32 = 255; | |
| pub const VIRTIO_DEV_ANY_ID: u32 = 4294967295; | |
| pub const RPMSG_NAME_SIZE: u32 = 32; | |
| pub const RPMSG_DEVICE_MODALIAS_FMT: &[u8; 9usize] = b"rpmsg:%s\0"; | |
| pub const I2C_NAME_SIZE: u32 = 20; | |
| pub const I2C_MODULE_PREFIX: &[u8; 5usize] = b"i2c:\0"; | |
| pub const PCI_EPF_NAME_SIZE: u32 = 20; | |
| pub const PCI_EPF_MODULE_PREFIX: &[u8; 9usize] = b"pci_epf:\0"; | |
| pub const I3C_MATCH_DCR: u32 = 1; | |
| pub const I3C_MATCH_MANUF: u32 = 2; | |
| pub const I3C_MATCH_PART: u32 = 4; | |
| pub const I3C_MATCH_EXTRA_INFO: u32 = 8; | |
| pub const SPI_NAME_SIZE: u32 = 32; | |
| pub const SPI_MODULE_PREFIX: &[u8; 5usize] = b"spi:\0"; | |
| pub const SLIMBUS_NAME_SIZE: u32 = 32; | |
| pub const SLIMBUS_MODULE_PREFIX: &[u8; 6usize] = b"slim:\0"; | |
| pub const APR_NAME_SIZE: u32 = 32; | |
| pub const APR_MODULE_PREFIX: &[u8; 5usize] = b"apr:\0"; | |
| pub const SPMI_NAME_SIZE: u32 = 32; | |
| pub const SPMI_MODULE_PREFIX: &[u8; 6usize] = b"spmi:\0"; | |
| pub const PLATFORM_NAME_SIZE: u32 = 20; | |
| pub const PLATFORM_MODULE_PREFIX: &[u8; 10usize] = b"platform:\0"; | |
| pub const MDIO_NAME_SIZE: u32 = 32; | |
| pub const MDIO_MODULE_PREFIX: &[u8; 6usize] = b"mdio:\0"; | |
| pub const MDIO_ID_FMT: &[u8; 65usize] = | |
| b"%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u%u\0"; | |
| pub const ZORRO_WILDCARD: u32 = 4294967295; | |
| pub const ZORRO_DEVICE_MODALIAS_FMT: &[u8; 12usize] = b"zorro:i%08X\0"; | |
| pub const ISAPNP_ANY_ID: u32 = 65535; | |
| pub const X86_VENDOR_ANY: u32 = 65535; | |
| pub const X86_FAMILY_ANY: u32 = 0; | |
| pub const X86_MODEL_ANY: u32 = 0; | |
| pub const X86_STEPPING_ANY: u32 = 0; | |
| pub const X86_FEATURE_ANY: u32 = 0; | |
| pub const IPACK_ANY_FORMAT: u32 = 255; | |
| pub const IPACK_ANY_ID: i32 = -1; | |
| pub const MEI_CL_MODULE_PREFIX: &[u8; 5usize] = b"mei:\0"; | |
| pub const MEI_CL_NAME_SIZE: u32 = 32; | |
| pub const MEI_CL_VERSION_ANY: u32 = 255; | |
| pub const RIO_ANY_ID: u32 = 65535; | |
| pub const TBSVC_MATCH_PROTOCOL_KEY: u32 = 1; | |
| pub const TBSVC_MATCH_PROTOCOL_ID: u32 = 2; | |
| pub const TBSVC_MATCH_PROTOCOL_VERSION: u32 = 4; | |
| pub const TBSVC_MATCH_PROTOCOL_REVISION: u32 = 8; | |
| pub const TYPEC_ANY_MODE: u32 = 7; | |
| pub const WMI_MODULE_PREFIX: &[u8; 5usize] = b"wmi:\0"; | |
| pub const MHI_DEVICE_MODALIAS_FMT: &[u8; 7usize] = b"mhi:%s\0"; | |
| pub const MHI_NAME_SIZE: u32 = 32; | |
| pub const MHI_EP_DEVICE_MODALIAS_FMT: &[u8; 10usize] = b"mhi_ep:%s\0"; | |
| pub const AUXILIARY_NAME_SIZE: u32 = 32; | |
| pub const AUXILIARY_MODULE_PREFIX: &[u8; 11usize] = b"auxiliary:\0"; | |
| pub const SSAM_MATCH_TARGET: u32 = 1; | |
| pub const SSAM_MATCH_INSTANCE: u32 = 2; | |
| pub const SSAM_MATCH_FUNCTION: u32 = 4; | |
| pub const ISHTP_MODULE_PREFIX: &[u8; 7usize] = b"ishtp:\0"; | |
| pub const CDX_ANY_ID: u32 = 65535; | |
| pub const MDIO_DEVICE_FLAG_PHY: u32 = 1; | |
| pub const MDIO_PRTAD_NONE: i32 = -1; | |
| pub const MDIO_DEVAD_NONE: i32 = -1; | |
| pub const MDIO_SUPPORTS_C22: u32 = 1; | |
| pub const MDIO_SUPPORTS_C45: u32 = 2; | |
| pub const MDIO_EMULATE_C22: u32 = 4; | |
| pub const LEDS_TRIG_TYPE_EDGE: u32 = 0; | |
| pub const LEDS_TRIG_TYPE_LEVEL: u32 = 1; | |
| pub const LEDS_BOOST_OFF: u32 = 0; | |
| pub const LEDS_BOOST_ADAPTIVE: u32 = 1; | |
| pub const LEDS_BOOST_FIXED: u32 = 2; | |
| pub const LED_COLOR_ID_WHITE: u32 = 0; | |
| pub const LED_COLOR_ID_RED: u32 = 1; | |
| pub const LED_COLOR_ID_GREEN: u32 = 2; | |
| pub const LED_COLOR_ID_BLUE: u32 = 3; | |
| pub const LED_COLOR_ID_AMBER: u32 = 4; | |
| pub const LED_COLOR_ID_VIOLET: u32 = 5; | |
| pub const LED_COLOR_ID_YELLOW: u32 = 6; | |
| pub const LED_COLOR_ID_IR: u32 = 7; | |
| pub const LED_COLOR_ID_MULTI: u32 = 8; | |
| pub const LED_COLOR_ID_RGB: u32 = 9; | |
| pub const LED_COLOR_ID_PURPLE: u32 = 10; | |
| pub const LED_COLOR_ID_ORANGE: u32 = 11; | |
| pub const LED_COLOR_ID_PINK: u32 = 12; | |
| pub const LED_COLOR_ID_CYAN: u32 = 13; | |
| pub const LED_COLOR_ID_LIME: u32 = 14; | |
| pub const LED_COLOR_ID_MAX: u32 = 15; | |
| pub const LED_FUNCTION_CAPSLOCK: &[u8; 9usize] = b"capslock\0"; | |
| pub const LED_FUNCTION_SCROLLLOCK: &[u8; 11usize] = b"scrolllock\0"; | |
| pub const LED_FUNCTION_NUMLOCK: &[u8; 8usize] = b"numlock\0"; | |
| pub const LED_FUNCTION_KBD_BACKLIGHT: &[u8; 14usize] = b"kbd_backlight\0"; | |
| pub const LED_FUNCTION_POWER: &[u8; 6usize] = b"power\0"; | |
| pub const LED_FUNCTION_DISK: &[u8; 5usize] = b"disk\0"; | |
| pub const LED_FUNCTION_CHARGING: &[u8; 9usize] = b"charging\0"; | |
| pub const LED_FUNCTION_STATUS: &[u8; 7usize] = b"status\0"; | |
| pub const LED_FUNCTION_MICMUTE: &[u8; 8usize] = b"micmute\0"; | |
| pub const LED_FUNCTION_MUTE: &[u8; 5usize] = b"mute\0"; | |
| pub const LED_FUNCTION_PLAYER1: &[u8; 9usize] = b"player-1\0"; | |
| pub const LED_FUNCTION_PLAYER2: &[u8; 9usize] = b"player-2\0"; | |
| pub const LED_FUNCTION_PLAYER3: &[u8; 9usize] = b"player-3\0"; | |
| pub const LED_FUNCTION_PLAYER4: &[u8; 9usize] = b"player-4\0"; | |
| pub const LED_FUNCTION_PLAYER5: &[u8; 9usize] = b"player-5\0"; | |
| pub const LED_FUNCTION_ACTIVITY: &[u8; 9usize] = b"activity\0"; | |
| pub const LED_FUNCTION_ALARM: &[u8; 6usize] = b"alarm\0"; | |
| pub const LED_FUNCTION_BACKLIGHT: &[u8; 10usize] = b"backlight\0"; | |
| pub const LED_FUNCTION_BLUETOOTH: &[u8; 10usize] = b"bluetooth\0"; | |
| pub const LED_FUNCTION_BOOT: &[u8; 5usize] = b"boot\0"; | |
| pub const LED_FUNCTION_CPU: &[u8; 4usize] = b"cpu\0"; | |
| pub const LED_FUNCTION_DEBUG: &[u8; 6usize] = b"debug\0"; | |
| pub const LED_FUNCTION_DISK_ACTIVITY: &[u8; 14usize] = b"disk-activity\0"; | |
| pub const LED_FUNCTION_DISK_ERR: &[u8; 9usize] = b"disk-err\0"; | |
| pub const LED_FUNCTION_DISK_READ: &[u8; 10usize] = b"disk-read\0"; | |
| pub const LED_FUNCTION_DISK_WRITE: &[u8; 11usize] = b"disk-write\0"; | |
| pub const LED_FUNCTION_FAULT: &[u8; 6usize] = b"fault\0"; | |
| pub const LED_FUNCTION_FLASH: &[u8; 6usize] = b"flash\0"; | |
| pub const LED_FUNCTION_HEARTBEAT: &[u8; 10usize] = b"heartbeat\0"; | |
| pub const LED_FUNCTION_INDICATOR: &[u8; 10usize] = b"indicator\0"; | |
| pub const LED_FUNCTION_LAN: &[u8; 4usize] = b"lan\0"; | |
| pub const LED_FUNCTION_MAIL: &[u8; 5usize] = b"mail\0"; | |
| pub const LED_FUNCTION_MTD: &[u8; 4usize] = b"mtd\0"; | |
| pub const LED_FUNCTION_PANIC: &[u8; 6usize] = b"panic\0"; | |
| pub const LED_FUNCTION_PROGRAMMING: &[u8; 12usize] = b"programming\0"; | |
| pub const LED_FUNCTION_RX: &[u8; 3usize] = b"rx\0"; | |
| pub const LED_FUNCTION_SD: &[u8; 3usize] = b"sd\0"; | |
| pub const LED_FUNCTION_STANDBY: &[u8; 8usize] = b"standby\0"; | |
| pub const LED_FUNCTION_TORCH: &[u8; 6usize] = b"torch\0"; | |
| pub const LED_FUNCTION_TX: &[u8; 3usize] = b"tx\0"; | |
| pub const LED_FUNCTION_USB: &[u8; 4usize] = b"usb\0"; | |
| pub const LED_FUNCTION_WAN: &[u8; 4usize] = b"wan\0"; | |
| pub const LED_FUNCTION_WLAN: &[u8; 5usize] = b"wlan\0"; | |
| pub const LED_FUNCTION_WPS: &[u8; 4usize] = b"wps\0"; | |
| pub const LED_BLINK_SW: u32 = 0; | |
| pub const LED_BLINK_ONESHOT: u32 = 1; | |
| pub const LED_BLINK_ONESHOT_STOP: u32 = 2; | |
| pub const LED_BLINK_INVERT: u32 = 3; | |
| pub const LED_BLINK_BRIGHTNESS_CHANGE: u32 = 4; | |
| pub const LED_BLINK_DISABLE: u32 = 5; | |
| pub const LED_SET_BRIGHTNESS_OFF: u32 = 6; | |
| pub const LED_SET_BRIGHTNESS: u32 = 7; | |
| pub const LED_SET_BLINK: u32 = 8; | |
| pub const GPIO_LED_NO_BLINK_LOW: u32 = 0; | |
| pub const GPIO_LED_NO_BLINK_HIGH: u32 = 1; | |
| pub const GPIO_LED_BLINK: u32 = 2; | |
| pub const MAX_UDELAY_MS: u32 = 5; | |
| pub const PHY_POLL: i32 = -1; | |
| pub const PHY_MAC_INTERRUPT: i32 = -2; | |
| pub const PHY_IS_INTERNAL: u32 = 1; | |
| pub const PHY_RST_AFTER_CLK_EN: u32 = 2; | |
| pub const PHY_POLL_CABLE_TEST: u32 = 4; | |
| pub const PHY_ALWAYS_CALL_SUSPEND: u32 = 8; | |
| pub const MDIO_DEVICE_IS_PHY: u32 = 2147483648; | |
| pub const PHY_INIT_TIMEOUT: u32 = 100000; | |
| pub const PHY_FORCE_TIMEOUT: u32 = 10; | |
| pub const PHY_MAX_ADDR: u32 = 32; | |
| pub const PHY_ID_FMT: &[u8; 8usize] = b"%s:%02x\0"; | |
| pub const MII_BUS_ID_SIZE: u32 = 61; | |
| pub const PHY_SHARED_F_INIT_DONE: u32 = 0; | |
| pub const PHY_SHARED_F_PROBE_DONE: u32 = 1; | |
| pub const MDIO_MMD_NUM: u32 = 32; | |
| pub const PHY_F_NO_IRQ: u32 = 2147483648; | |
| pub const PHY_PAIR_ALL: i32 = -1; | |
| pub const PHY_ANY_ID: &[u8; 14usize] = b"MATCH ANY PHY\0"; | |
| pub const PHY_ANY_UID: u32 = 4294967295; | |
| pub const POLLIN: u32 = 1; | |
| pub const POLLPRI: u32 = 2; | |
| pub const POLLOUT: u32 = 4; | |
| pub const POLLERR: u32 = 8; | |
| pub const POLLHUP: u32 = 16; | |
| pub const POLLNVAL: u32 = 32; | |
| pub const POLLRDNORM: u32 = 64; | |
| pub const POLLRDBAND: u32 = 128; | |
| pub const POLLWRNORM: u32 = 256; | |
| pub const POLLWRBAND: u32 = 512; | |
| pub const POLLMSG: u32 = 1024; | |
| pub const POLLREMOVE: u32 = 4096; | |
| pub const POLLRDHUP: u32 = 8192; | |
| pub const EPOLL_CLOEXEC: u32 = 524288; | |
| pub const EPOLL_CTL_ADD: u32 = 1; | |
| pub const EPOLL_CTL_DEL: u32 = 2; | |
| pub const EPOLL_CTL_MOD: u32 = 3; | |
| pub const MAX_STACK_ALLOC: u32 = 768; | |
| pub const FRONTEND_STACK_ALLOC: u32 = 256; | |
| pub const SELECT_STACK_ALLOC: u32 = 256; | |
| pub const POLL_STACK_ALLOC: u32 = 256; | |
| pub const WQUEUES_STACK_ALLOC: u32 = 512; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct ftrace_branch_data { | |
| pub func: *const core::ffi::c_char, | |
| pub file: *const core::ffi::c_char, | |
| pub line: core::ffi::c_uint, | |
| pub __bindgen_anon_1: ftrace_branch_data__bindgen_ty_1, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union ftrace_branch_data__bindgen_ty_1 { | |
| pub __bindgen_anon_1: ftrace_branch_data__bindgen_ty_1__bindgen_ty_1, | |
| pub __bindgen_anon_2: ftrace_branch_data__bindgen_ty_1__bindgen_ty_2, | |
| pub miss_hit: [core::ffi::c_ulong; 2usize], | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct ftrace_branch_data__bindgen_ty_1__bindgen_ty_1 { | |
| pub correct: core::ffi::c_ulong, | |
| pub incorrect: core::ffi::c_ulong, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct ftrace_branch_data__bindgen_ty_1__bindgen_ty_2 { | |
| pub miss: core::ffi::c_ulong, | |
| pub hit: core::ffi::c_ulong, | |
| } | |
| impl Default for ftrace_branch_data__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for ftrace_branch_data { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct ftrace_likely_data { | |
| pub data: ftrace_branch_data, | |
| pub constant: core::ffi::c_ulong, | |
| } | |
| impl Default for ftrace_likely_data { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn ftrace_likely_update( | |
| f: *mut ftrace_likely_data, | |
| val: core::ffi::c_int, | |
| expect: core::ffi::c_int, | |
| is_constant: core::ffi::c_int, | |
| ); | |
| } | |
| pub type __s8 = core::ffi::c_schar; | |
| pub type __u8 = core::ffi::c_uchar; | |
| pub type __s16 = core::ffi::c_short; | |
| pub type __u16 = core::ffi::c_ushort; | |
| pub type __s32 = core::ffi::c_int; | |
| pub type __u32 = core::ffi::c_uint; | |
| pub type __s64 = core::ffi::c_longlong; | |
| pub type __u64 = core::ffi::c_ulonglong; | |
| pub type s8 = __s8; | |
| pub type u8_ = __u8; | |
| pub type s16 = __s16; | |
| pub type u16_ = __u16; | |
| pub type s32 = __s32; | |
| pub type u32_ = __u32; | |
| pub type s64 = __s64; | |
| pub type u64_ = __u64; | |
| pub const false_: _bindgen_ty_1 = 0; | |
| pub const true_: _bindgen_ty_1 = 1; | |
| pub type _bindgen_ty_1 = core::ffi::c_uint; | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct __kernel_fd_set { | |
| pub fds_bits: [core::ffi::c_ulong; 16usize], | |
| } | |
| pub type __kernel_sighandler_t = | |
| ::core::option::Option<unsafe extern "C" fn(arg1: core::ffi::c_int)>; | |
| pub type __kernel_key_t = core::ffi::c_int; | |
| pub type __kernel_mqd_t = core::ffi::c_int; | |
| pub type __kernel_old_uid_t = core::ffi::c_ushort; | |
| pub type __kernel_old_gid_t = core::ffi::c_ushort; | |
| pub type __kernel_long_t = core::ffi::c_long; | |
| pub type __kernel_ulong_t = core::ffi::c_ulong; | |
| pub type __kernel_ino_t = __kernel_ulong_t; | |
| pub type __kernel_mode_t = core::ffi::c_uint; | |
| pub type __kernel_pid_t = core::ffi::c_int; | |
| pub type __kernel_ipc_pid_t = core::ffi::c_int; | |
| pub type __kernel_uid_t = core::ffi::c_uint; | |
| pub type __kernel_gid_t = core::ffi::c_uint; | |
| pub type __kernel_suseconds_t = __kernel_long_t; | |
| pub type __kernel_daddr_t = core::ffi::c_int; | |
| pub type __kernel_uid32_t = core::ffi::c_uint; | |
| pub type __kernel_gid32_t = core::ffi::c_uint; | |
| pub type __kernel_old_dev_t = core::ffi::c_uint; | |
| pub type __kernel_size_t = __kernel_ulong_t; | |
| pub type __kernel_ssize_t = __kernel_long_t; | |
| pub type __kernel_ptrdiff_t = __kernel_long_t; | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct __kernel_fsid_t { | |
| pub val: [core::ffi::c_int; 2usize], | |
| } | |
| pub type __kernel_off_t = __kernel_long_t; | |
| pub type __kernel_loff_t = core::ffi::c_longlong; | |
| pub type __kernel_old_time_t = __kernel_long_t; | |
| pub type __kernel_time64_t = core::ffi::c_longlong; | |
| pub type __kernel_clock_t = __kernel_long_t; | |
| pub type __kernel_timer_t = core::ffi::c_int; | |
| pub type __kernel_clockid_t = core::ffi::c_int; | |
| pub type __kernel_caddr_t = *mut core::ffi::c_char; | |
| pub type __kernel_uid16_t = core::ffi::c_ushort; | |
| pub type __kernel_gid16_t = core::ffi::c_ushort; | |
| pub type __s128 = i128; | |
| pub type __u128 = u128; | |
| pub type __le16 = __u16; | |
| pub type __be16 = __u16; | |
| pub type __le32 = __u32; | |
| pub type __be32 = __u32; | |
| pub type __le64 = __u64; | |
| pub type __be64 = __u64; | |
| pub type __sum16 = __u16; | |
| pub type __wsum = __u32; | |
| pub type __poll_t = core::ffi::c_uint; | |
| pub type s128 = __s128; | |
| pub type u128_ = __u128; | |
| pub type __kernel_dev_t = u32_; | |
| pub type fd_set = __kernel_fd_set; | |
| pub type dev_t = __kernel_dev_t; | |
| pub type ino_t = __kernel_ulong_t; | |
| pub type mode_t = __kernel_mode_t; | |
| pub type umode_t = core::ffi::c_ushort; | |
| pub type nlink_t = u32_; | |
| pub type off_t = __kernel_off_t; | |
| pub type pid_t = __kernel_pid_t; | |
| pub type daddr_t = __kernel_daddr_t; | |
| pub type key_t = __kernel_key_t; | |
| pub type suseconds_t = __kernel_suseconds_t; | |
| pub type timer_t = __kernel_timer_t; | |
| pub type clockid_t = __kernel_clockid_t; | |
| pub type mqd_t = __kernel_mqd_t; | |
| pub type bool_ = bool; | |
| pub type uid_t = __kernel_uid32_t; | |
| pub type gid_t = __kernel_gid32_t; | |
| pub type uid16_t = __kernel_uid16_t; | |
| pub type gid16_t = __kernel_gid16_t; | |
| pub type loff_t = __kernel_loff_t; | |
| pub type clock_t = __kernel_clock_t; | |
| pub type caddr_t = __kernel_caddr_t; | |
| pub type u_char = core::ffi::c_uchar; | |
| pub type u_short = core::ffi::c_ushort; | |
| pub type u_int = core::ffi::c_uint; | |
| pub type u_long = core::ffi::c_ulong; | |
| pub type unchar = core::ffi::c_uchar; | |
| pub type ushort = core::ffi::c_ushort; | |
| pub type uint = core::ffi::c_uint; | |
| pub type ulong = core::ffi::c_ulong; | |
| pub type u_int8_t = u8_; | |
| pub type u_int16_t = u16_; | |
| pub type u_int32_t = u32_; | |
| pub type u_int64_t = u64_; | |
| pub type sector_t = u64_; | |
| pub type blkcnt_t = u64_; | |
| pub type dma_addr_t = u64_; | |
| pub type gfp_t = core::ffi::c_uint; | |
| pub type slab_flags_t = core::ffi::c_uint; | |
| pub type fmode_t = core::ffi::c_uint; | |
| pub type phys_addr_t = u64_; | |
| pub type resource_size_t = phys_addr_t; | |
| pub type irq_hw_number_t = core::ffi::c_ulong; | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct atomic_t { | |
| pub counter: core::ffi::c_int, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct atomic64_t { | |
| pub counter: s64, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct rcuref_t { | |
| pub refcnt: atomic_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct list_head { | |
| pub next: *mut list_head, | |
| pub prev: *mut list_head, | |
| } | |
| impl Default for list_head { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct hlist_head { | |
| pub first: *mut hlist_node, | |
| } | |
| impl Default for hlist_head { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct hlist_node { | |
| pub next: *mut hlist_node, | |
| pub pprev: *mut *mut hlist_node, | |
| } | |
| impl Default for hlist_node { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct ustat { | |
| pub f_tfree: __kernel_daddr_t, | |
| pub f_tinode: core::ffi::c_ulong, | |
| pub f_fname: [core::ffi::c_char; 6usize], | |
| pub f_fpack: [core::ffi::c_char; 6usize], | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct callback_head { | |
| pub next: *mut callback_head, | |
| pub func: ::core::option::Option<unsafe extern "C" fn(head: *mut callback_head)>, | |
| } | |
| impl Default for callback_head { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type rcu_callback_t = ::core::option::Option<unsafe extern "C" fn(head: *mut callback_head)>; | |
| pub type call_rcu_func_t = | |
| ::core::option::Option<unsafe extern "C" fn(head: *mut callback_head, func: rcu_callback_t)>; | |
| pub type swap_r_func_t = ::core::option::Option< | |
| unsafe extern "C" fn( | |
| a: *mut core::ffi::c_void, | |
| b: *mut core::ffi::c_void, | |
| size: core::ffi::c_int, | |
| priv_: *const core::ffi::c_void, | |
| ), | |
| >; | |
| pub type swap_func_t = ::core::option::Option< | |
| unsafe extern "C" fn( | |
| a: *mut core::ffi::c_void, | |
| b: *mut core::ffi::c_void, | |
| size: core::ffi::c_int, | |
| ), | |
| >; | |
| pub type cmp_r_func_t = ::core::option::Option< | |
| unsafe extern "C" fn( | |
| a: *const core::ffi::c_void, | |
| b: *const core::ffi::c_void, | |
| priv_: *const core::ffi::c_void, | |
| ) -> core::ffi::c_int, | |
| >; | |
| pub type cmp_func_t = ::core::option::Option< | |
| unsafe extern "C" fn( | |
| a: *const core::ffi::c_void, | |
| b: *const core::ffi::c_void, | |
| ) -> core::ffi::c_int, | |
| >; | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct kcsan_scoped_access {} | |
| pub type va_list = [u64; 4usize]; | |
| pub type initcall_t = ::core::option::Option<unsafe extern "C" fn() -> core::ffi::c_int>; | |
| pub type exitcall_t = ::core::option::Option<unsafe extern "C" fn()>; | |
| pub type initcall_entry_t = core::ffi::c_int; | |
| extern "C" { | |
| pub static mut __con_initcall_start: [initcall_entry_t; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __con_initcall_end: [initcall_entry_t; 0usize]; | |
| } | |
| pub type ctor_fn_t = ::core::option::Option<unsafe extern "C" fn()>; | |
| extern "C" { | |
| pub fn do_one_initcall(fn_: initcall_t) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut boot_command_line: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut saved_command_line: *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub static mut saved_command_line_len: core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub static mut reset_devices: core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn setup_arch(arg1: *mut *mut core::ffi::c_char); | |
| } | |
| extern "C" { | |
| pub fn prepare_namespace(); | |
| } | |
| extern "C" { | |
| pub fn init_rootfs(); | |
| } | |
| extern "C" { | |
| pub fn init_IRQ(); | |
| } | |
| extern "C" { | |
| pub fn time_init(); | |
| } | |
| extern "C" { | |
| pub fn poking_init(); | |
| } | |
| extern "C" { | |
| pub fn pgtable_cache_init(); | |
| } | |
| extern "C" { | |
| pub static mut __initcall_start: [initcall_entry_t; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __initcall0_start: [initcall_entry_t; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __initcall1_start: [initcall_entry_t; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __initcall2_start: [initcall_entry_t; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __initcall3_start: [initcall_entry_t; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __initcall4_start: [initcall_entry_t; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __initcall5_start: [initcall_entry_t; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __initcall6_start: [initcall_entry_t; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __initcall7_start: [initcall_entry_t; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __initcall_end: [initcall_entry_t; 0usize]; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct file_system_type { | |
| pub name: *const core::ffi::c_char, | |
| pub fs_flags: core::ffi::c_int, | |
| pub init_fs_context: | |
| ::core::option::Option<unsafe extern "C" fn(arg1: *mut fs_context) -> core::ffi::c_int>, | |
| pub parameters: *const fs_parameter_spec, | |
| pub mount: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut file_system_type, | |
| arg2: core::ffi::c_int, | |
| arg3: *const core::ffi::c_char, | |
| arg4: *mut core::ffi::c_void, | |
| ) -> *mut dentry, | |
| >, | |
| pub kill_sb: ::core::option::Option<unsafe extern "C" fn(arg1: *mut super_block)>, | |
| pub owner: *mut module, | |
| pub next: *mut file_system_type, | |
| pub fs_supers: hlist_head, | |
| pub s_lock_key: lock_class_key, | |
| pub s_umount_key: lock_class_key, | |
| pub s_vfs_rename_key: lock_class_key, | |
| pub s_writers_key: [lock_class_key; 3usize], | |
| pub i_lock_key: lock_class_key, | |
| pub i_mutex_key: lock_class_key, | |
| pub invalidate_lock_key: lock_class_key, | |
| pub i_mutex_dir_key: lock_class_key, | |
| } | |
| impl Default for file_system_type { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub static mut rootfs_fs_type: file_system_type; | |
| } | |
| extern "C" { | |
| pub static mut rodata_enabled: bool_; | |
| } | |
| extern "C" { | |
| pub fn mark_rodata_ro(); | |
| } | |
| extern "C" { | |
| pub static mut late_time_init: ::core::option::Option<unsafe extern "C" fn()>; | |
| } | |
| extern "C" { | |
| pub static mut initcall_debug: bool_; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct module { | |
| _unused: [u8; 0], | |
| } | |
| extern "C" { | |
| pub static mut __this_module: module; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct qspinlock { | |
| pub __bindgen_anon_1: qspinlock__bindgen_ty_1, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union qspinlock__bindgen_ty_1 { | |
| pub val: atomic_t, | |
| pub __bindgen_anon_1: qspinlock__bindgen_ty_1__bindgen_ty_1, | |
| pub __bindgen_anon_2: qspinlock__bindgen_ty_1__bindgen_ty_2, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct qspinlock__bindgen_ty_1__bindgen_ty_1 { | |
| pub locked: u8_, | |
| pub pending: u8_, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct qspinlock__bindgen_ty_1__bindgen_ty_2 { | |
| pub locked_pending: u16_, | |
| pub tail: u16_, | |
| } | |
| impl Default for qspinlock__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for qspinlock { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type arch_spinlock_t = qspinlock; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct qrwlock { | |
| pub __bindgen_anon_1: qrwlock__bindgen_ty_1, | |
| pub wait_lock: arch_spinlock_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union qrwlock__bindgen_ty_1 { | |
| pub cnts: atomic_t, | |
| pub __bindgen_anon_1: qrwlock__bindgen_ty_1__bindgen_ty_1, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct qrwlock__bindgen_ty_1__bindgen_ty_1 { | |
| pub wlocked: u8_, | |
| pub __lstate: [u8_; 3usize], | |
| } | |
| impl Default for qrwlock__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for qrwlock { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type arch_rwlock_t = qrwlock; | |
| pub const lockdep_wait_type_LD_WAIT_INV: lockdep_wait_type = 0; | |
| pub const lockdep_wait_type_LD_WAIT_FREE: lockdep_wait_type = 1; | |
| pub const lockdep_wait_type_LD_WAIT_SPIN: lockdep_wait_type = 2; | |
| pub const lockdep_wait_type_LD_WAIT_CONFIG: lockdep_wait_type = 2; | |
| pub const lockdep_wait_type_LD_WAIT_SLEEP: lockdep_wait_type = 3; | |
| pub const lockdep_wait_type_LD_WAIT_MAX: lockdep_wait_type = 4; | |
| pub type lockdep_wait_type = core::ffi::c_uint; | |
| pub const lockdep_lock_type_LD_LOCK_NORMAL: lockdep_lock_type = 0; | |
| pub const lockdep_lock_type_LD_LOCK_PERCPU: lockdep_lock_type = 1; | |
| pub const lockdep_lock_type_LD_LOCK_WAIT_OVERRIDE: lockdep_lock_type = 2; | |
| pub const lockdep_lock_type_LD_LOCK_MAX: lockdep_lock_type = 3; | |
| pub type lockdep_lock_type = core::ffi::c_uint; | |
| #[repr(C, packed)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct lockdep_subclass_key { | |
| pub __one_byte: core::ffi::c_char, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct lock_class_key { | |
| pub __bindgen_anon_1: lock_class_key__bindgen_ty_1, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union lock_class_key__bindgen_ty_1 { | |
| pub hash_entry: hlist_node, | |
| pub subkeys: [lockdep_subclass_key; 8usize], | |
| } | |
| impl Default for lock_class_key__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for lock_class_key { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub static mut __lockdep_no_validate__: lock_class_key; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct lock_trace { | |
| _unused: [u8; 0], | |
| } | |
| pub type lock_cmp_fn = ::core::option::Option< | |
| unsafe extern "C" fn(a: *const lockdep_map, b: *const lockdep_map) -> core::ffi::c_int, | |
| >; | |
| pub type lock_print_fn = ::core::option::Option<unsafe extern "C" fn(map: *const lockdep_map)>; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct lock_class { | |
| pub hash_entry: hlist_node, | |
| pub lock_entry: list_head, | |
| pub locks_after: list_head, | |
| pub locks_before: list_head, | |
| pub key: *const lockdep_subclass_key, | |
| pub cmp_fn: lock_cmp_fn, | |
| pub print_fn: lock_print_fn, | |
| pub subclass: core::ffi::c_uint, | |
| pub dep_gen_id: core::ffi::c_uint, | |
| pub usage_mask: core::ffi::c_ulong, | |
| pub usage_traces: [*const lock_trace; 10usize], | |
| pub name_version: core::ffi::c_int, | |
| pub name: *const core::ffi::c_char, | |
| pub wait_type_inner: u8_, | |
| pub wait_type_outer: u8_, | |
| pub lock_type: u8_, | |
| } | |
| impl Default for lock_class { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct lockdep_map { | |
| pub key: *mut lock_class_key, | |
| pub class_cache: [*mut lock_class; 2usize], | |
| pub name: *const core::ffi::c_char, | |
| pub wait_type_outer: u8_, | |
| pub wait_type_inner: u8_, | |
| pub lock_type: u8_, | |
| } | |
| impl Default for lockdep_map { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct pin_cookie { | |
| pub val: core::ffi::c_uint, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct raw_spinlock { | |
| pub raw_lock: arch_spinlock_t, | |
| pub magic: core::ffi::c_uint, | |
| pub owner_cpu: core::ffi::c_uint, | |
| pub owner: *mut core::ffi::c_void, | |
| pub dep_map: lockdep_map, | |
| } | |
| impl Default for raw_spinlock { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type raw_spinlock_t = raw_spinlock; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct ratelimit_state { | |
| pub lock: raw_spinlock_t, | |
| pub interval: core::ffi::c_int, | |
| pub burst: core::ffi::c_int, | |
| pub printed: core::ffi::c_int, | |
| pub missed: core::ffi::c_int, | |
| pub begin: core::ffi::c_ulong, | |
| pub flags: core::ffi::c_ulong, | |
| } | |
| impl Default for ratelimit_state { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn ___ratelimit( | |
| rs: *mut ratelimit_state, | |
| func: *const core::ffi::c_char, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static linux_banner: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static linux_proc_banner: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut oops_in_progress: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut console_printk: [core::ffi::c_int; 0usize]; | |
| } | |
| extern "C" { | |
| pub fn console_verbose(); | |
| } | |
| extern "C" { | |
| pub static mut devkmsg_log_str: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut suppress_printk: core::ffi::c_int; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct va_format { | |
| pub fmt: *const core::ffi::c_char, | |
| pub va: *mut va_list, | |
| } | |
| impl Default for va_format { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn vprintk_emit( | |
| facility: core::ffi::c_int, | |
| level: core::ffi::c_int, | |
| dev_info: *const dev_printk_info, | |
| fmt: *const core::ffi::c_char, | |
| args: va_list, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn vprintk(fmt: *const core::ffi::c_char, args: va_list) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn _printk(fmt: *const core::ffi::c_char, ...) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn _printk_deferred(fmt: *const core::ffi::c_char, ...) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn __printk_safe_enter(); | |
| } | |
| extern "C" { | |
| pub fn __printk_safe_exit(); | |
| } | |
| extern "C" { | |
| pub fn __printk_ratelimit(func: *const core::ffi::c_char) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn printk_timed_ratelimit( | |
| caller_jiffies: *mut core::ffi::c_ulong, | |
| interval_msec: core::ffi::c_uint, | |
| ) -> bool_; | |
| } | |
| extern "C" { | |
| pub static mut printk_delay_msec: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut dmesg_restrict: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn wake_up_klogd(); | |
| } | |
| extern "C" { | |
| pub fn log_buf_addr_get() -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn log_buf_len_get() -> u32_; | |
| } | |
| extern "C" { | |
| pub fn log_buf_vmcoreinfo_setup(); | |
| } | |
| extern "C" { | |
| pub fn setup_log_buf(early: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn dump_stack_set_arch_desc(fmt: *const core::ffi::c_char, ...); | |
| } | |
| extern "C" { | |
| pub fn dump_stack_print_info(log_lvl: *const core::ffi::c_char); | |
| } | |
| extern "C" { | |
| pub fn show_regs_print_info(log_lvl: *const core::ffi::c_char); | |
| } | |
| extern "C" { | |
| pub fn dump_stack_lvl(log_lvl: *const core::ffi::c_char); | |
| } | |
| extern "C" { | |
| pub fn dump_stack(); | |
| } | |
| extern "C" { | |
| pub fn printk_trigger_flush(); | |
| } | |
| extern "C" { | |
| pub fn __printk_cpu_sync_try_get() -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn __printk_cpu_sync_wait(); | |
| } | |
| extern "C" { | |
| pub fn __printk_cpu_sync_put(); | |
| } | |
| extern "C" { | |
| pub static mut kptr_restrict: core::ffi::c_int; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct file_operations { | |
| pub owner: *mut module, | |
| pub llseek: ::core::option::Option< | |
| unsafe extern "C" fn(arg1: *mut file, arg2: loff_t, arg3: core::ffi::c_int) -> loff_t, | |
| >, | |
| pub read: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut file, | |
| arg2: *mut core::ffi::c_char, | |
| arg3: usize, | |
| arg4: *mut loff_t, | |
| ) -> isize, | |
| >, | |
| pub write: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut file, | |
| arg2: *const core::ffi::c_char, | |
| arg3: usize, | |
| arg4: *mut loff_t, | |
| ) -> isize, | |
| >, | |
| pub read_iter: ::core::option::Option< | |
| unsafe extern "C" fn(arg1: *mut kiocb, arg2: *mut iov_iter) -> isize, | |
| >, | |
| pub write_iter: ::core::option::Option< | |
| unsafe extern "C" fn(arg1: *mut kiocb, arg2: *mut iov_iter) -> isize, | |
| >, | |
| pub iopoll: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| kiocb: *mut kiocb, | |
| arg1: *mut io_comp_batch, | |
| flags: core::ffi::c_uint, | |
| ) -> core::ffi::c_int, | |
| >, | |
| pub iterate_shared: ::core::option::Option< | |
| unsafe extern "C" fn(arg1: *mut file, arg2: *mut dir_context) -> core::ffi::c_int, | |
| >, | |
| pub poll: ::core::option::Option< | |
| unsafe extern "C" fn(arg1: *mut file, arg2: *mut poll_table_struct) -> __poll_t, | |
| >, | |
| pub unlocked_ioctl: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut file, | |
| arg2: core::ffi::c_uint, | |
| arg3: core::ffi::c_ulong, | |
| ) -> core::ffi::c_long, | |
| >, | |
| pub compat_ioctl: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut file, | |
| arg2: core::ffi::c_uint, | |
| arg3: core::ffi::c_ulong, | |
| ) -> core::ffi::c_long, | |
| >, | |
| pub mmap: ::core::option::Option< | |
| unsafe extern "C" fn(arg1: *mut file, arg2: *mut vm_area_struct) -> core::ffi::c_int, | |
| >, | |
| pub mmap_supported_flags: core::ffi::c_ulong, | |
| pub open: ::core::option::Option< | |
| unsafe extern "C" fn(arg1: *mut inode, arg2: *mut file) -> core::ffi::c_int, | |
| >, | |
| pub flush: ::core::option::Option< | |
| unsafe extern "C" fn(arg1: *mut file, id: fl_owner_t) -> core::ffi::c_int, | |
| >, | |
| pub release: ::core::option::Option< | |
| unsafe extern "C" fn(arg1: *mut inode, arg2: *mut file) -> core::ffi::c_int, | |
| >, | |
| pub fsync: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut file, | |
| arg2: loff_t, | |
| arg3: loff_t, | |
| datasync: core::ffi::c_int, | |
| ) -> core::ffi::c_int, | |
| >, | |
| pub fasync: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: core::ffi::c_int, | |
| arg2: *mut file, | |
| arg3: core::ffi::c_int, | |
| ) -> core::ffi::c_int, | |
| >, | |
| pub lock: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut file, | |
| arg2: core::ffi::c_int, | |
| arg3: *mut file_lock, | |
| ) -> core::ffi::c_int, | |
| >, | |
| pub get_unmapped_area: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut file, | |
| arg2: core::ffi::c_ulong, | |
| arg3: core::ffi::c_ulong, | |
| arg4: core::ffi::c_ulong, | |
| arg5: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong, | |
| >, | |
| pub check_flags: | |
| ::core::option::Option<unsafe extern "C" fn(arg1: core::ffi::c_int) -> core::ffi::c_int>, | |
| pub flock: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut file, | |
| arg2: core::ffi::c_int, | |
| arg3: *mut file_lock, | |
| ) -> core::ffi::c_int, | |
| >, | |
| pub splice_write: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut pipe_inode_info, | |
| arg2: *mut file, | |
| arg3: *mut loff_t, | |
| arg4: usize, | |
| arg5: core::ffi::c_uint, | |
| ) -> isize, | |
| >, | |
| pub splice_read: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut file, | |
| arg2: *mut loff_t, | |
| arg3: *mut pipe_inode_info, | |
| arg4: usize, | |
| arg5: core::ffi::c_uint, | |
| ) -> isize, | |
| >, | |
| pub splice_eof: ::core::option::Option<unsafe extern "C" fn(file: *mut file)>, | |
| pub setlease: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut file, | |
| arg2: core::ffi::c_int, | |
| arg3: *mut *mut file_lock, | |
| arg4: *mut *mut core::ffi::c_void, | |
| ) -> core::ffi::c_int, | |
| >, | |
| pub fallocate: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| file: *mut file, | |
| mode: core::ffi::c_int, | |
| offset: loff_t, | |
| len: loff_t, | |
| ) -> core::ffi::c_long, | |
| >, | |
| pub show_fdinfo: ::core::option::Option<unsafe extern "C" fn(m: *mut seq_file, f: *mut file)>, | |
| pub copy_file_range: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut file, | |
| arg2: loff_t, | |
| arg3: *mut file, | |
| arg4: loff_t, | |
| arg5: usize, | |
| arg6: core::ffi::c_uint, | |
| ) -> isize, | |
| >, | |
| pub remap_file_range: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| file_in: *mut file, | |
| pos_in: loff_t, | |
| file_out: *mut file, | |
| pos_out: loff_t, | |
| len: loff_t, | |
| remap_flags: core::ffi::c_uint, | |
| ) -> loff_t, | |
| >, | |
| pub fadvise: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut file, | |
| arg2: loff_t, | |
| arg3: loff_t, | |
| arg4: core::ffi::c_int, | |
| ) -> core::ffi::c_int, | |
| >, | |
| pub uring_cmd: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| ioucmd: *mut io_uring_cmd, | |
| issue_flags: core::ffi::c_uint, | |
| ) -> core::ffi::c_int, | |
| >, | |
| pub uring_cmd_iopoll: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: *mut io_uring_cmd, | |
| arg2: *mut io_comp_batch, | |
| poll_flags: core::ffi::c_uint, | |
| ) -> core::ffi::c_int, | |
| >, | |
| } | |
| impl Default for file_operations { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub static kmsg_fops: file_operations; | |
| } | |
| pub const DUMP_PREFIX_NONE: _bindgen_ty_2 = 0; | |
| pub const DUMP_PREFIX_ADDRESS: _bindgen_ty_2 = 1; | |
| pub const DUMP_PREFIX_OFFSET: _bindgen_ty_2 = 2; | |
| pub type _bindgen_ty_2 = core::ffi::c_uint; | |
| extern "C" { | |
| pub fn hex_dump_to_buffer( | |
| buf: *const core::ffi::c_void, | |
| len: usize, | |
| rowsize: core::ffi::c_int, | |
| groupsize: core::ffi::c_int, | |
| linebuf: *mut core::ffi::c_char, | |
| linebuflen: usize, | |
| ascii: bool_, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn print_hex_dump( | |
| level: *const core::ffi::c_char, | |
| prefix_str: *const core::ffi::c_char, | |
| prefix_type: core::ffi::c_int, | |
| rowsize: core::ffi::c_int, | |
| groupsize: core::ffi::c_int, | |
| buf: *const core::ffi::c_void, | |
| len: usize, | |
| ascii: bool_, | |
| ); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct string_stream { | |
| _unused: [u8; 0], | |
| } | |
| pub const kunit_assert_type_KUNIT_ASSERTION: kunit_assert_type = 0; | |
| pub const kunit_assert_type_KUNIT_EXPECTATION: kunit_assert_type = 1; | |
| pub type kunit_assert_type = core::ffi::c_uint; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct kunit_loc { | |
| pub line: core::ffi::c_int, | |
| pub file: *const core::ffi::c_char, | |
| } | |
| impl Default for kunit_loc { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct kunit_assert {} | |
| pub type assert_format_t = ::core::option::Option< | |
| unsafe extern "C" fn( | |
| assert: *const kunit_assert, | |
| message: *const va_format, | |
| stream: *mut string_stream, | |
| ), | |
| >; | |
| extern "C" { | |
| pub fn kunit_assert_prologue( | |
| loc: *const kunit_loc, | |
| type_: kunit_assert_type, | |
| stream: *mut string_stream, | |
| ); | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct kunit_fail_assert { | |
| pub assert: kunit_assert, | |
| } | |
| extern "C" { | |
| pub fn kunit_fail_assert_format( | |
| assert: *const kunit_assert, | |
| message: *const va_format, | |
| stream: *mut string_stream, | |
| ); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct kunit_unary_assert { | |
| pub assert: kunit_assert, | |
| pub condition: *const core::ffi::c_char, | |
| pub expected_true: bool_, | |
| } | |
| impl Default for kunit_unary_assert { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn kunit_unary_assert_format( | |
| assert: *const kunit_assert, | |
| message: *const va_format, | |
| stream: *mut string_stream, | |
| ); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct kunit_ptr_not_err_assert { | |
| pub assert: kunit_assert, | |
| pub text: *const core::ffi::c_char, | |
| pub value: *const core::ffi::c_void, | |
| } | |
| impl Default for kunit_ptr_not_err_assert { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn kunit_ptr_not_err_assert_format( | |
| assert: *const kunit_assert, | |
| message: *const va_format, | |
| stream: *mut string_stream, | |
| ); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct kunit_binary_assert_text { | |
| pub operation: *const core::ffi::c_char, | |
| pub left_text: *const core::ffi::c_char, | |
| pub right_text: *const core::ffi::c_char, | |
| } | |
| impl Default for kunit_binary_assert_text { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct kunit_binary_assert { | |
| pub assert: kunit_assert, | |
| pub text: *const kunit_binary_assert_text, | |
| pub left_value: core::ffi::c_longlong, | |
| pub right_value: core::ffi::c_longlong, | |
| } | |
| impl Default for kunit_binary_assert { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn kunit_binary_assert_format( | |
| assert: *const kunit_assert, | |
| message: *const va_format, | |
| stream: *mut string_stream, | |
| ); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct kunit_binary_ptr_assert { | |
| pub assert: kunit_assert, | |
| pub text: *const kunit_binary_assert_text, | |
| pub left_value: *const core::ffi::c_void, | |
| pub right_value: *const core::ffi::c_void, | |
| } | |
| impl Default for kunit_binary_ptr_assert { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn kunit_binary_ptr_assert_format( | |
| assert: *const kunit_assert, | |
| message: *const va_format, | |
| stream: *mut string_stream, | |
| ); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct kunit_binary_str_assert { | |
| pub assert: kunit_assert, | |
| pub text: *const kunit_binary_assert_text, | |
| pub left_value: *const core::ffi::c_char, | |
| pub right_value: *const core::ffi::c_char, | |
| } | |
| impl Default for kunit_binary_str_assert { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn kunit_binary_str_assert_format( | |
| assert: *const kunit_assert, | |
| message: *const va_format, | |
| stream: *mut string_stream, | |
| ); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct kunit_mem_assert { | |
| pub assert: kunit_assert, | |
| pub text: *const kunit_binary_assert_text, | |
| pub left_value: *const core::ffi::c_void, | |
| pub right_value: *const core::ffi::c_void, | |
| pub size: usize, | |
| } | |
| impl Default for kunit_mem_assert { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn kunit_mem_assert_format( | |
| assert: *const kunit_assert, | |
| message: *const va_format, | |
| stream: *mut string_stream, | |
| ); | |
| } | |
| pub type kunit_try_catch_func_t = | |
| ::core::option::Option<unsafe extern "C" fn(arg1: *mut core::ffi::c_void)>; | |
| #[repr(C)] | |
| #[repr(align(8))] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct kunit_try_catch { | |
| pub _bindgen_opaque_blob: [u64; 6usize], | |
| } | |
| extern "C" { | |
| pub fn kunit_try_catch_run(try_catch: *mut kunit_try_catch, context: *mut core::ffi::c_void); | |
| } | |
| extern "C" { | |
| pub fn kunit_try_catch_throw(try_catch: *mut kunit_try_catch) -> !; | |
| } | |
| extern "C" { | |
| pub static mut static_key_initialized: bool_; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct static_key { | |
| pub enabled: atomic_t, | |
| } | |
| pub const jump_label_type_JUMP_LABEL_NOP: jump_label_type = 0; | |
| pub const jump_label_type_JUMP_LABEL_JMP: jump_label_type = 1; | |
| pub type jump_label_type = core::ffi::c_uint; | |
| #[repr(C)] | |
| #[repr(align(16))] | |
| #[derive(Copy, Clone)] | |
| pub union __u128_halves { | |
| pub full: u128_, | |
| pub __bindgen_anon_1: __u128_halves__bindgen_ty_1, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct __u128_halves__bindgen_ty_1 { | |
| pub low: u64_, | |
| pub high: u64_, | |
| } | |
| impl Default for __u128_halves { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[repr(align(4))] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct alt_instr { | |
| pub _bindgen_opaque_blob: [u32; 3usize], | |
| } | |
| pub type alternative_cb_t = ::core::option::Option< | |
| unsafe extern "C" fn( | |
| alt: *mut alt_instr, | |
| origptr: *mut __le32, | |
| updptr: *mut __le32, | |
| nr_inst: core::ffi::c_int, | |
| ), | |
| >; | |
| extern "C" { | |
| pub fn apply_boot_alternatives(); | |
| } | |
| extern "C" { | |
| pub fn apply_alternatives_all(); | |
| } | |
| extern "C" { | |
| pub fn alternative_is_applied(cpucap: u16_) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn alt_cb_patch_nops( | |
| alt: *mut alt_instr, | |
| origptr: *mut __le32, | |
| updptr: *mut __le32, | |
| nr_inst: core::ffi::c_int, | |
| ); | |
| } | |
| pub type atomic_long_t = atomic64_t; | |
| extern "C" { | |
| pub static mut panic_blink: | |
| ::core::option::Option<unsafe extern "C" fn(state: core::ffi::c_int) -> core::ffi::c_long>; | |
| } | |
| extern "C" { | |
| pub fn panic(fmt: *const core::ffi::c_char, ...) -> !; | |
| } | |
| extern "C" { | |
| pub fn nmi_panic(regs: *mut pt_regs, msg: *const core::ffi::c_char); | |
| } | |
| extern "C" { | |
| pub fn check_panic_on_warn(origin: *const core::ffi::c_char); | |
| } | |
| extern "C" { | |
| pub fn oops_enter(); | |
| } | |
| extern "C" { | |
| pub fn oops_exit(); | |
| } | |
| extern "C" { | |
| pub fn oops_may_print() -> bool_; | |
| } | |
| extern "C" { | |
| pub static mut panic_timeout: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut panic_print: core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub static mut panic_on_oops: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut panic_on_unrecovered_nmi: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut panic_on_io_nmi: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut panic_on_warn: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut panic_on_taint: core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub static mut panic_on_taint_nousertaint: bool_; | |
| } | |
| extern "C" { | |
| pub static mut sysctl_panic_on_rcu_stall: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut sysctl_max_rcu_stall_to_panic: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut sysctl_panic_on_stackoverflow: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut crash_kexec_post_notifiers: bool_; | |
| } | |
| extern "C" { | |
| pub fn __stack_chk_fail(); | |
| } | |
| extern "C" { | |
| pub fn abort() -> !; | |
| } | |
| extern "C" { | |
| pub static mut panic_cpu: atomic_t; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct taint_flag { | |
| pub c_true: core::ffi::c_char, | |
| pub c_false: core::ffi::c_char, | |
| pub module: bool_, | |
| } | |
| extern "C" { | |
| pub static taint_flags: [taint_flag; 19usize]; | |
| } | |
| pub const lockdep_ok_LOCKDEP_STILL_OK: lockdep_ok = 0; | |
| pub const lockdep_ok_LOCKDEP_NOW_UNRELIABLE: lockdep_ok = 1; | |
| pub type lockdep_ok = core::ffi::c_uint; | |
| extern "C" { | |
| pub fn print_tainted() -> *const core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn add_taint(flag: core::ffi::c_uint, arg1: lockdep_ok); | |
| } | |
| extern "C" { | |
| pub fn test_taint(flag: core::ffi::c_uint) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn get_taint() -> core::ffi::c_ulong; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct warn_args { | |
| _unused: [u8; 0], | |
| } | |
| extern "C" { | |
| pub fn __warn( | |
| file: *const core::ffi::c_char, | |
| line: core::ffi::c_int, | |
| caller: *mut core::ffi::c_void, | |
| taint: core::ffi::c_uint, | |
| regs: *mut pt_regs, | |
| args: *mut warn_args, | |
| ); | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct bug_entry { | |
| pub bug_addr_disp: core::ffi::c_int, | |
| pub file_disp: core::ffi::c_int, | |
| pub line: core::ffi::c_ushort, | |
| pub flags: core::ffi::c_ushort, | |
| } | |
| extern "C" { | |
| pub fn warn_slowpath_fmt( | |
| file: *const core::ffi::c_char, | |
| line: core::ffi::c_int, | |
| taint: core::ffi::c_uint, | |
| fmt: *const core::ffi::c_char, | |
| ... | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __warn_printk(fmt: *const core::ffi::c_char, ...); | |
| } | |
| pub const bug_trap_type_BUG_TRAP_TYPE_NONE: bug_trap_type = 0; | |
| pub const bug_trap_type_BUG_TRAP_TYPE_WARN: bug_trap_type = 1; | |
| pub const bug_trap_type_BUG_TRAP_TYPE_BUG: bug_trap_type = 2; | |
| pub type bug_trap_type = core::ffi::c_uint; | |
| extern "C" { | |
| pub fn bug_get_file_line( | |
| bug: *mut bug_entry, | |
| file: *mut *const core::ffi::c_char, | |
| line: *mut core::ffi::c_uint, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn find_bug(bugaddr: core::ffi::c_ulong) -> *mut bug_entry; | |
| } | |
| extern "C" { | |
| pub fn report_bug(bug_addr: core::ffi::c_ulong, regs: *mut pt_regs) -> bug_trap_type; | |
| } | |
| extern "C" { | |
| pub fn is_valid_bugaddr(addr: core::ffi::c_ulong) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn generic_bug_clear_once(); | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct static_key_true { | |
| pub key: static_key, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct static_key_false { | |
| pub key: static_key, | |
| } | |
| extern "C" { | |
| pub fn ____wrong_branch_error() -> bool_; | |
| } | |
| #[repr(C)] | |
| #[derive(Default)] | |
| pub struct sysinfo { | |
| pub uptime: __kernel_long_t, | |
| pub loads: [__kernel_ulong_t; 3usize], | |
| pub totalram: __kernel_ulong_t, | |
| pub freeram: __kernel_ulong_t, | |
| pub sharedram: __kernel_ulong_t, | |
| pub bufferram: __kernel_ulong_t, | |
| pub totalswap: __kernel_ulong_t, | |
| pub freeswap: __kernel_ulong_t, | |
| pub procs: __u16, | |
| pub pad: __u16, | |
| pub totalhigh: __kernel_ulong_t, | |
| pub freehigh: __kernel_ulong_t, | |
| pub mem_unit: __u32, | |
| pub _f: __IncompleteArrayField<core::ffi::c_char>, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct s16_fract { | |
| pub numerator: __s16, | |
| pub denominator: __s16, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct u16_fract { | |
| pub numerator: __u16, | |
| pub denominator: __u16, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct s32_fract { | |
| pub numerator: __s32, | |
| pub denominator: __s32, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct u32_fract { | |
| pub numerator: __u32, | |
| pub denominator: __u32, | |
| } | |
| extern "C" { | |
| pub fn int_pow(base: u64_, exp: core::ffi::c_uint) -> u64_; | |
| } | |
| extern "C" { | |
| pub fn int_sqrt(arg1: core::ffi::c_ulong) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn iter_div_u64_rem(dividend: u64_, divisor: u32_, remainder: *mut u64_) -> u32_; | |
| } | |
| extern "C" { | |
| pub fn mul_u64_u64_div_u64(a: u64_, mul: u64_, div: u64_) -> u64_; | |
| } | |
| pub type time64_t = __s64; | |
| pub type timeu64_t = __u64; | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct __kernel_timespec { | |
| pub tv_sec: __kernel_time64_t, | |
| pub tv_nsec: core::ffi::c_longlong, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct __kernel_itimerspec { | |
| pub it_interval: __kernel_timespec, | |
| pub it_value: __kernel_timespec, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct __kernel_old_timeval { | |
| pub tv_sec: __kernel_long_t, | |
| pub tv_usec: __kernel_long_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct __kernel_old_timespec { | |
| pub tv_sec: __kernel_old_time_t, | |
| pub tv_nsec: core::ffi::c_long, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct __kernel_old_itimerval { | |
| pub it_interval: __kernel_old_timeval, | |
| pub it_value: __kernel_old_timeval, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct __kernel_sock_timeval { | |
| pub tv_sec: __s64, | |
| pub tv_usec: __s64, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct timezone { | |
| pub tz_minuteswest: core::ffi::c_int, | |
| pub tz_dsttime: core::ffi::c_int, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct timespec64 { | |
| pub tv_sec: time64_t, | |
| pub tv_nsec: core::ffi::c_long, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct itimerspec64 { | |
| pub it_interval: timespec64, | |
| pub it_value: timespec64, | |
| } | |
| extern "C" { | |
| pub fn set_normalized_timespec64(ts: *mut timespec64, sec: time64_t, nsec: s64); | |
| } | |
| extern "C" { | |
| pub fn ns_to_timespec64(nsec: s64) -> timespec64; | |
| } | |
| extern "C" { | |
| pub fn timespec64_add_safe(lhs: timespec64, rhs: timespec64) -> timespec64; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct timespec { | |
| _unused: [u8; 0], | |
| } | |
| pub const timespec_type_TT_NONE: timespec_type = 0; | |
| pub const timespec_type_TT_NATIVE: timespec_type = 1; | |
| pub const timespec_type_TT_COMPAT: timespec_type = 2; | |
| pub type timespec_type = core::ffi::c_uint; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct restart_block { | |
| pub arch_data: core::ffi::c_ulong, | |
| pub fn_: | |
| ::core::option::Option<unsafe extern "C" fn(arg1: *mut restart_block) -> core::ffi::c_long>, | |
| pub __bindgen_anon_1: restart_block__bindgen_ty_1, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union restart_block__bindgen_ty_1 { | |
| pub futex: restart_block__bindgen_ty_1__bindgen_ty_1, | |
| pub nanosleep: restart_block__bindgen_ty_1__bindgen_ty_2, | |
| pub poll: restart_block__bindgen_ty_1__bindgen_ty_3, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct restart_block__bindgen_ty_1__bindgen_ty_1 { | |
| pub uaddr: *mut u32_, | |
| pub val: u32_, | |
| pub flags: u32_, | |
| pub bitset: u32_, | |
| pub time: u64_, | |
| pub uaddr2: *mut u32_, | |
| } | |
| impl Default for restart_block__bindgen_ty_1__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct restart_block__bindgen_ty_1__bindgen_ty_2 { | |
| pub clockid: clockid_t, | |
| pub type_: timespec_type, | |
| pub __bindgen_anon_1: restart_block__bindgen_ty_1__bindgen_ty_2__bindgen_ty_1, | |
| pub expires: u64_, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union restart_block__bindgen_ty_1__bindgen_ty_2__bindgen_ty_1 { | |
| pub rmtp: *mut __kernel_timespec, | |
| pub compat_rmtp: *mut old_timespec32, | |
| } | |
| impl Default for restart_block__bindgen_ty_1__bindgen_ty_2__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for restart_block__bindgen_ty_1__bindgen_ty_2 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct restart_block__bindgen_ty_1__bindgen_ty_3 { | |
| pub ufds: *mut pollfd, | |
| pub nfds: core::ffi::c_int, | |
| pub has_timeout: core::ffi::c_int, | |
| pub tv_sec: core::ffi::c_ulong, | |
| pub tv_nsec: core::ffi::c_ulong, | |
| } | |
| impl Default for restart_block__bindgen_ty_1__bindgen_ty_3 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for restart_block__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for restart_block { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn do_no_restart_syscall(parm: *mut restart_block) -> core::ffi::c_long; | |
| } | |
| extern "C" { | |
| pub fn __sw_hweight8(w: core::ffi::c_uint) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn __sw_hweight16(w: core::ffi::c_uint) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn __sw_hweight32(w: core::ffi::c_uint) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn __sw_hweight64(w: __u64) -> core::ffi::c_ulong; | |
| } | |
| pub const BAD_STACK: _bindgen_ty_3 = -1; | |
| pub const NOT_STACK: _bindgen_ty_3 = 0; | |
| pub const GOOD_FRAME: _bindgen_ty_3 = 1; | |
| pub const GOOD_STACK: _bindgen_ty_3 = 2; | |
| pub type _bindgen_ty_3 = core::ffi::c_int; | |
| extern "C" { | |
| pub fn dump_page(page: *mut page, reason: *const core::ffi::c_char); | |
| } | |
| extern "C" { | |
| pub fn dump_vma(vma: *const vm_area_struct); | |
| } | |
| extern "C" { | |
| pub fn dump_mm(mm: *const mm_struct); | |
| } | |
| extern "C" { | |
| pub fn vma_iter_dump_tree(vmi: *const vma_iterator); | |
| } | |
| extern "C" { | |
| pub static mut memstart_addr: s64; | |
| } | |
| extern "C" { | |
| pub static mut kimage_vaddr: u64_; | |
| } | |
| extern "C" { | |
| pub static mut kimage_voffset: u64_; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct pfn_t { | |
| pub val: u64_, | |
| } | |
| extern "C" { | |
| pub fn dump_mem_limit(); | |
| } | |
| extern "C" { | |
| #[link_name = "\u{1}sp"] | |
| pub static mut current_stack_pointer: core::ffi::c_ulong; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct thread_info { | |
| pub flags: core::ffi::c_ulong, | |
| pub __bindgen_anon_1: thread_info__bindgen_ty_1, | |
| pub cpu: u32_, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union thread_info__bindgen_ty_1 { | |
| pub preempt_count: u64_, | |
| pub preempt: thread_info__bindgen_ty_1__bindgen_ty_1, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct thread_info__bindgen_ty_1__bindgen_ty_1 { | |
| pub count: u32_, | |
| pub need_resched: u32_, | |
| } | |
| impl Default for thread_info__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for thread_info { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn arch_setup_new_exec(); | |
| } | |
| extern "C" { | |
| pub fn __bad_copy_from(); | |
| } | |
| extern "C" { | |
| pub fn __bad_copy_to(); | |
| } | |
| extern "C" { | |
| pub fn __copy_overflow(size: core::ffi::c_int, count: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn arch_task_cache_init(); | |
| } | |
| extern "C" { | |
| pub fn arch_release_task_struct(tsk: *mut task_struct); | |
| } | |
| extern "C" { | |
| pub fn arch_dup_task_struct(dst: *mut task_struct, src: *mut task_struct) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn migrate_disable(); | |
| } | |
| extern "C" { | |
| pub fn migrate_enable(); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct class_preempt_t { | |
| pub lock: *mut core::ffi::c_void, | |
| } | |
| impl Default for class_preempt_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct class_preempt_notrace_t { | |
| pub lock: *mut core::ffi::c_void, | |
| } | |
| impl Default for class_preempt_notrace_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct class_migrate_t { | |
| pub lock: *mut core::ffi::c_void, | |
| } | |
| impl Default for class_migrate_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn __field_overflow(); | |
| } | |
| extern "C" { | |
| pub fn __bad_mask(); | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct midr_range { | |
| pub model: u32_, | |
| pub rv_min: u32_, | |
| pub rv_max: u32_, | |
| } | |
| pub const CAP_HWCAP: _bindgen_ty_4 = 1; | |
| pub type _bindgen_ty_4 = core::ffi::c_uint; | |
| extern "C" { | |
| pub static hex_asc: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static hex_asc_upper: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub fn hex_to_bin(ch: core::ffi::c_uchar) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn hex2bin(dst: *mut u8_, src: *const core::ffi::c_char, count: usize) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn bin2hex( | |
| dst: *mut core::ffi::c_char, | |
| src: *const core::ffi::c_void, | |
| count: usize, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn mac_pton(s: *const core::ffi::c_char, mac: *mut u8_) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn _kstrtoul( | |
| s: *const core::ffi::c_char, | |
| base: core::ffi::c_uint, | |
| res: *mut core::ffi::c_ulong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn _kstrtol( | |
| s: *const core::ffi::c_char, | |
| base: core::ffi::c_uint, | |
| res: *mut core::ffi::c_long, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtoull( | |
| s: *const core::ffi::c_char, | |
| base: core::ffi::c_uint, | |
| res: *mut core::ffi::c_ulonglong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtoll( | |
| s: *const core::ffi::c_char, | |
| base: core::ffi::c_uint, | |
| res: *mut core::ffi::c_longlong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtouint( | |
| s: *const core::ffi::c_char, | |
| base: core::ffi::c_uint, | |
| res: *mut core::ffi::c_uint, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtoint( | |
| s: *const core::ffi::c_char, | |
| base: core::ffi::c_uint, | |
| res: *mut core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtou16( | |
| s: *const core::ffi::c_char, | |
| base: core::ffi::c_uint, | |
| res: *mut u16_, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtos16( | |
| s: *const core::ffi::c_char, | |
| base: core::ffi::c_uint, | |
| res: *mut s16, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtou8( | |
| s: *const core::ffi::c_char, | |
| base: core::ffi::c_uint, | |
| res: *mut u8_, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtos8( | |
| s: *const core::ffi::c_char, | |
| base: core::ffi::c_uint, | |
| res: *mut s8, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtobool(s: *const core::ffi::c_char, res: *mut bool_) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtoull_from_user( | |
| s: *const core::ffi::c_char, | |
| count: usize, | |
| base: core::ffi::c_uint, | |
| res: *mut core::ffi::c_ulonglong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtoll_from_user( | |
| s: *const core::ffi::c_char, | |
| count: usize, | |
| base: core::ffi::c_uint, | |
| res: *mut core::ffi::c_longlong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtoul_from_user( | |
| s: *const core::ffi::c_char, | |
| count: usize, | |
| base: core::ffi::c_uint, | |
| res: *mut core::ffi::c_ulong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtol_from_user( | |
| s: *const core::ffi::c_char, | |
| count: usize, | |
| base: core::ffi::c_uint, | |
| res: *mut core::ffi::c_long, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtouint_from_user( | |
| s: *const core::ffi::c_char, | |
| count: usize, | |
| base: core::ffi::c_uint, | |
| res: *mut core::ffi::c_uint, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtoint_from_user( | |
| s: *const core::ffi::c_char, | |
| count: usize, | |
| base: core::ffi::c_uint, | |
| res: *mut core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtou16_from_user( | |
| s: *const core::ffi::c_char, | |
| count: usize, | |
| base: core::ffi::c_uint, | |
| res: *mut u16_, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtos16_from_user( | |
| s: *const core::ffi::c_char, | |
| count: usize, | |
| base: core::ffi::c_uint, | |
| res: *mut s16, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtou8_from_user( | |
| s: *const core::ffi::c_char, | |
| count: usize, | |
| base: core::ffi::c_uint, | |
| res: *mut u8_, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtos8_from_user( | |
| s: *const core::ffi::c_char, | |
| count: usize, | |
| base: core::ffi::c_uint, | |
| res: *mut s8, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kstrtobool_from_user( | |
| s: *const core::ffi::c_char, | |
| count: usize, | |
| res: *mut bool_, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn simple_strtoul( | |
| arg1: *const core::ffi::c_char, | |
| arg2: *mut *mut core::ffi::c_char, | |
| arg3: core::ffi::c_uint, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn simple_strtol( | |
| arg1: *const core::ffi::c_char, | |
| arg2: *mut *mut core::ffi::c_char, | |
| arg3: core::ffi::c_uint, | |
| ) -> core::ffi::c_long; | |
| } | |
| extern "C" { | |
| pub fn simple_strtoull( | |
| arg1: *const core::ffi::c_char, | |
| arg2: *mut *mut core::ffi::c_char, | |
| arg3: core::ffi::c_uint, | |
| ) -> core::ffi::c_ulonglong; | |
| } | |
| extern "C" { | |
| pub fn simple_strtoll( | |
| arg1: *const core::ffi::c_char, | |
| arg2: *mut *mut core::ffi::c_char, | |
| arg3: core::ffi::c_uint, | |
| ) -> core::ffi::c_longlong; | |
| } | |
| extern "C" { | |
| pub fn num_to_str( | |
| buf: *mut core::ffi::c_char, | |
| size: core::ffi::c_int, | |
| num: core::ffi::c_ulonglong, | |
| width: core::ffi::c_uint, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn sprintf( | |
| buf: *mut core::ffi::c_char, | |
| fmt: *const core::ffi::c_char, | |
| ... | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn vsprintf( | |
| buf: *mut core::ffi::c_char, | |
| arg1: *const core::ffi::c_char, | |
| arg2: [u64; 4usize], | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn snprintf( | |
| buf: *mut core::ffi::c_char, | |
| size: core::ffi::c_ulong, | |
| fmt: *const core::ffi::c_char, | |
| ... | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn vsnprintf( | |
| buf: *mut core::ffi::c_char, | |
| size: core::ffi::c_ulong, | |
| fmt: *const core::ffi::c_char, | |
| args: [u64; 4usize], | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn scnprintf( | |
| buf: *mut core::ffi::c_char, | |
| size: usize, | |
| fmt: *const core::ffi::c_char, | |
| ... | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn vscnprintf( | |
| buf: *mut core::ffi::c_char, | |
| size: usize, | |
| fmt: *const core::ffi::c_char, | |
| args: va_list, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kasprintf(gfp: gfp_t, fmt: *const core::ffi::c_char, ...) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn kvasprintf( | |
| gfp: gfp_t, | |
| fmt: *const core::ffi::c_char, | |
| args: va_list, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn kvasprintf_const( | |
| gfp: gfp_t, | |
| fmt: *const core::ffi::c_char, | |
| args: va_list, | |
| ) -> *const core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn sscanf( | |
| arg1: *const core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| ... | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn vsscanf( | |
| arg1: *const core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| arg3: [u64; 4usize], | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut no_hash_pointers: bool_; | |
| } | |
| extern "C" { | |
| pub fn no_hash_pointers_enable(str_: *mut core::ffi::c_char) -> core::ffi::c_int; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct static_call_site { | |
| pub addr: s32, | |
| pub key: s32, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct static_call_key { | |
| pub func: *mut core::ffi::c_void, | |
| } | |
| impl Default for static_call_key { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct user { | |
| _unused: [u8; 0], | |
| } | |
| extern "C" { | |
| pub fn __might_fault(file: *const core::ffi::c_char, line: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn do_exit(error_code: core::ffi::c_long) -> !; | |
| } | |
| extern "C" { | |
| pub fn get_option( | |
| str_: *mut *mut core::ffi::c_char, | |
| pint: *mut core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn get_options( | |
| str_: *const core::ffi::c_char, | |
| nints: core::ffi::c_int, | |
| ints: *mut core::ffi::c_int, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn memparse( | |
| ptr: *const core::ffi::c_char, | |
| retptr: *mut *mut core::ffi::c_char, | |
| ) -> core::ffi::c_ulonglong; | |
| } | |
| extern "C" { | |
| pub fn parse_option_str( | |
| str_: *const core::ffi::c_char, | |
| option: *const core::ffi::c_char, | |
| ) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn next_arg( | |
| args: *mut core::ffi::c_char, | |
| param: *mut *mut core::ffi::c_char, | |
| val: *mut *mut core::ffi::c_char, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn core_kernel_text(addr: core::ffi::c_ulong) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn __kernel_text_address(addr: core::ffi::c_ulong) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kernel_text_address(addr: core::ffi::c_ulong) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn func_ptr_is_kernel_text(ptr: *mut core::ffi::c_void) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn bust_spinlocks(yes: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub static mut root_mountflags: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut early_boot_irqs_disabled: bool_; | |
| } | |
| pub const system_states_SYSTEM_BOOTING: system_states = 0; | |
| pub const system_states_SYSTEM_SCHEDULING: system_states = 1; | |
| pub const system_states_SYSTEM_FREEING_INITMEM: system_states = 2; | |
| pub const system_states_SYSTEM_RUNNING: system_states = 3; | |
| pub const system_states_SYSTEM_HALT: system_states = 4; | |
| pub const system_states_SYSTEM_POWER_OFF: system_states = 5; | |
| pub const system_states_SYSTEM_RESTART: system_states = 6; | |
| pub const system_states_SYSTEM_SUSPEND: system_states = 7; | |
| pub type system_states = core::ffi::c_uint; | |
| extern "C" { | |
| pub static mut system_state: system_states; | |
| } | |
| pub const ftrace_dump_mode_DUMP_NONE: ftrace_dump_mode = 0; | |
| pub const ftrace_dump_mode_DUMP_ALL: ftrace_dump_mode = 1; | |
| pub const ftrace_dump_mode_DUMP_ORIG: ftrace_dump_mode = 2; | |
| pub type ftrace_dump_mode = core::ffi::c_uint; | |
| extern "C" { | |
| pub fn tracing_on(); | |
| } | |
| extern "C" { | |
| pub fn tracing_off(); | |
| } | |
| extern "C" { | |
| pub fn tracing_is_on() -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn tracing_snapshot(); | |
| } | |
| extern "C" { | |
| pub fn tracing_snapshot_alloc(); | |
| } | |
| extern "C" { | |
| pub fn tracing_start(); | |
| } | |
| extern "C" { | |
| pub fn tracing_stop(); | |
| } | |
| extern "C" { | |
| pub fn __trace_bprintk( | |
| ip: core::ffi::c_ulong, | |
| fmt: *const core::ffi::c_char, | |
| ... | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn __trace_printk( | |
| ip: core::ffi::c_ulong, | |
| fmt: *const core::ffi::c_char, | |
| ... | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn __trace_bputs( | |
| ip: core::ffi::c_ulong, | |
| str_: *const core::ffi::c_char, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn __trace_puts( | |
| ip: core::ffi::c_ulong, | |
| str_: *const core::ffi::c_char, | |
| size: core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn trace_dump_stack(skip: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn __ftrace_vbprintk( | |
| ip: core::ffi::c_ulong, | |
| fmt: *const core::ffi::c_char, | |
| ap: va_list, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn __ftrace_vprintk( | |
| ip: core::ffi::c_ulong, | |
| fmt: *const core::ffi::c_char, | |
| ap: va_list, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn ftrace_dump(oops_dump_mode: ftrace_dump_mode); | |
| } | |
| extern "C" { | |
| pub fn _find_next_bit( | |
| addr1: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_ulong, | |
| start: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn _find_next_and_bit( | |
| addr1: *const core::ffi::c_ulong, | |
| addr2: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_ulong, | |
| start: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn _find_next_andnot_bit( | |
| addr1: *const core::ffi::c_ulong, | |
| addr2: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_ulong, | |
| start: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn _find_next_or_bit( | |
| addr1: *const core::ffi::c_ulong, | |
| addr2: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_ulong, | |
| start: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn _find_next_zero_bit( | |
| addr: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_ulong, | |
| start: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn _find_first_bit( | |
| addr: *const core::ffi::c_ulong, | |
| size: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn __find_nth_bit( | |
| addr: *const core::ffi::c_ulong, | |
| size: core::ffi::c_ulong, | |
| n: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn __find_nth_and_bit( | |
| addr1: *const core::ffi::c_ulong, | |
| addr2: *const core::ffi::c_ulong, | |
| size: core::ffi::c_ulong, | |
| n: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn __find_nth_andnot_bit( | |
| addr1: *const core::ffi::c_ulong, | |
| addr2: *const core::ffi::c_ulong, | |
| size: core::ffi::c_ulong, | |
| n: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn __find_nth_and_andnot_bit( | |
| addr1: *const core::ffi::c_ulong, | |
| addr2: *const core::ffi::c_ulong, | |
| addr3: *const core::ffi::c_ulong, | |
| size: core::ffi::c_ulong, | |
| n: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn _find_first_and_bit( | |
| addr1: *const core::ffi::c_ulong, | |
| addr2: *const core::ffi::c_ulong, | |
| size: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn _find_first_zero_bit( | |
| addr: *const core::ffi::c_ulong, | |
| size: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn _find_last_bit( | |
| addr: *const core::ffi::c_ulong, | |
| size: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn find_next_clump8( | |
| clump: *mut core::ffi::c_ulong, | |
| addr: *const core::ffi::c_ulong, | |
| size: core::ffi::c_ulong, | |
| offset: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn strndup_user( | |
| arg1: *const core::ffi::c_char, | |
| arg2: core::ffi::c_long, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn memdup_user(arg1: *const core::ffi::c_void, arg2: usize) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn vmemdup_user(arg1: *const core::ffi::c_void, arg2: usize) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn memdup_user_nul(arg1: *const core::ffi::c_void, arg2: usize) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn strrchr(arg1: *const core::ffi::c_char, c: core::ffi::c_int) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strchr(arg1: *const core::ffi::c_char, c: core::ffi::c_int) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strcmp( | |
| arg1: *const core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn strncmp( | |
| arg1: *const core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| arg3: core::ffi::c_ulong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn strlen(arg1: *const core::ffi::c_char) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn strnlen(arg1: *const core::ffi::c_char, arg2: __kernel_size_t) -> __kernel_size_t; | |
| } | |
| extern "C" { | |
| pub fn memcmp( | |
| arg1: *const core::ffi::c_void, | |
| arg2: *const core::ffi::c_void, | |
| arg3: core::ffi::c_ulong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn memchr( | |
| arg1: *const core::ffi::c_void, | |
| arg2: core::ffi::c_int, | |
| arg3: core::ffi::c_ulong, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn memcpy( | |
| arg1: *mut core::ffi::c_void, | |
| arg2: *const core::ffi::c_void, | |
| arg3: core::ffi::c_ulong, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn __memcpy( | |
| arg1: *mut core::ffi::c_void, | |
| arg2: *const core::ffi::c_void, | |
| arg3: __kernel_size_t, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn memmove( | |
| arg1: *mut core::ffi::c_void, | |
| arg2: *const core::ffi::c_void, | |
| arg3: core::ffi::c_ulong, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn __memmove( | |
| arg1: *mut core::ffi::c_void, | |
| arg2: *const core::ffi::c_void, | |
| arg3: __kernel_size_t, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn memset( | |
| arg1: *mut core::ffi::c_void, | |
| arg2: core::ffi::c_int, | |
| arg3: core::ffi::c_ulong, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn __memset( | |
| arg1: *mut core::ffi::c_void, | |
| arg2: core::ffi::c_int, | |
| arg3: __kernel_size_t, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn strcpy( | |
| arg1: *mut core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strncpy( | |
| arg1: *mut core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| arg3: core::ffi::c_ulong, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strlcpy( | |
| arg1: *mut core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| arg3: usize, | |
| ) -> usize; | |
| } | |
| extern "C" { | |
| pub fn strscpy( | |
| arg1: *mut core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| arg3: usize, | |
| ) -> isize; | |
| } | |
| extern "C" { | |
| pub fn strscpy_pad( | |
| dest: *mut core::ffi::c_char, | |
| src: *const core::ffi::c_char, | |
| count: usize, | |
| ) -> isize; | |
| } | |
| extern "C" { | |
| pub fn strcat( | |
| arg1: *mut core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strncat( | |
| arg1: *mut core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| arg3: core::ffi::c_ulong, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strlcat( | |
| arg1: *mut core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| arg3: __kernel_size_t, | |
| ) -> usize; | |
| } | |
| extern "C" { | |
| pub fn strcasecmp( | |
| s1: *const core::ffi::c_char, | |
| s2: *const core::ffi::c_char, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn strncasecmp( | |
| s1: *const core::ffi::c_char, | |
| s2: *const core::ffi::c_char, | |
| n: core::ffi::c_ulong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn strchrnul( | |
| arg1: *const core::ffi::c_char, | |
| arg2: core::ffi::c_int, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strnchrnul( | |
| arg1: *const core::ffi::c_char, | |
| arg2: usize, | |
| arg3: core::ffi::c_int, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strnchr( | |
| arg1: *const core::ffi::c_char, | |
| arg2: usize, | |
| arg3: core::ffi::c_int, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn skip_spaces(arg1: *const core::ffi::c_char) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strim(arg1: *mut core::ffi::c_char) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strstr( | |
| arg1: *const core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strnstr( | |
| arg1: *const core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| arg3: usize, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strpbrk( | |
| arg1: *const core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strsep( | |
| arg1: *mut *mut core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn strspn( | |
| arg1: *const core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn strcspn( | |
| arg1: *const core::ffi::c_char, | |
| arg2: *const core::ffi::c_char, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn memset16(arg1: *mut u16, arg2: u16, arg3: __kernel_size_t) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn memset32(arg1: *mut u32, arg2: u32, arg3: __kernel_size_t) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn memset64(arg1: *mut u64, arg2: u64, arg3: __kernel_size_t) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn __memcat_p( | |
| a: *mut *mut core::ffi::c_void, | |
| b: *mut *mut core::ffi::c_void, | |
| ) -> *mut *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn memscan( | |
| arg1: *mut core::ffi::c_void, | |
| arg2: core::ffi::c_int, | |
| arg3: __kernel_size_t, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn bcmp( | |
| arg1: *const core::ffi::c_void, | |
| arg2: *const core::ffi::c_void, | |
| arg3: core::ffi::c_ulong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn memchr_inv( | |
| s: *const core::ffi::c_void, | |
| c: core::ffi::c_int, | |
| n: usize, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn strreplace( | |
| str_: *mut core::ffi::c_char, | |
| old: core::ffi::c_char, | |
| new: core::ffi::c_char, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn kfree_const(x: *const core::ffi::c_void); | |
| } | |
| extern "C" { | |
| pub fn kstrdup(s: *const core::ffi::c_char, gfp: gfp_t) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn kstrdup_const(s: *const core::ffi::c_char, gfp: gfp_t) -> *const core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn kstrndup(s: *const core::ffi::c_char, len: usize, gfp: gfp_t) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn kmemdup(src: *const core::ffi::c_void, len: usize, gfp: gfp_t) | |
| -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn kvmemdup( | |
| src: *const core::ffi::c_void, | |
| len: usize, | |
| gfp: gfp_t, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn kmemdup_nul( | |
| s: *const core::ffi::c_char, | |
| len: usize, | |
| gfp: gfp_t, | |
| ) -> *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn argv_split( | |
| gfp: gfp_t, | |
| str_: *const core::ffi::c_char, | |
| argcp: *mut core::ffi::c_int, | |
| ) -> *mut *mut core::ffi::c_char; | |
| } | |
| extern "C" { | |
| pub fn argv_free(argv: *mut *mut core::ffi::c_char); | |
| } | |
| extern "C" { | |
| pub fn sysfs_streq(s1: *const core::ffi::c_char, s2: *const core::ffi::c_char) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn match_string( | |
| array: *const *const core::ffi::c_char, | |
| n: usize, | |
| string: *const core::ffi::c_char, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn __sysfs_match_string( | |
| array: *const *const core::ffi::c_char, | |
| n: usize, | |
| s: *const core::ffi::c_char, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn vbin_printf( | |
| bin_buf: *mut u32_, | |
| size: usize, | |
| fmt: *const core::ffi::c_char, | |
| args: va_list, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn bstr_printf( | |
| buf: *mut core::ffi::c_char, | |
| size: usize, | |
| fmt: *const core::ffi::c_char, | |
| bin_buf: *const u32_, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn bprintf( | |
| bin_buf: *mut u32_, | |
| size: usize, | |
| fmt: *const core::ffi::c_char, | |
| ... | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn memory_read_from_buffer( | |
| to: *mut core::ffi::c_void, | |
| count: usize, | |
| ppos: *mut loff_t, | |
| from: *const core::ffi::c_void, | |
| available: usize, | |
| ) -> isize; | |
| } | |
| extern "C" { | |
| pub fn ptr_to_hashval( | |
| ptr: *const core::ffi::c_void, | |
| hashval_out: *mut core::ffi::c_ulong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn memweight(ptr: *const core::ffi::c_void, bytes: usize) -> usize; | |
| } | |
| extern "C" { | |
| pub fn memcpy_and_pad( | |
| dest: *mut core::ffi::c_void, | |
| dest_len: usize, | |
| src: *const core::ffi::c_void, | |
| count: usize, | |
| pad: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn bitmap_parse_user( | |
| ubuf: *const core::ffi::c_char, | |
| ulen: core::ffi::c_uint, | |
| dst: *mut core::ffi::c_ulong, | |
| nbits: core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn bitmap_print_to_pagebuf( | |
| list: bool_, | |
| buf: *mut core::ffi::c_char, | |
| maskp: *const core::ffi::c_ulong, | |
| nmaskbits: core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn bitmap_print_bitmask_to_buf( | |
| buf: *mut core::ffi::c_char, | |
| maskp: *const core::ffi::c_ulong, | |
| nmaskbits: core::ffi::c_int, | |
| off: loff_t, | |
| count: usize, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn bitmap_print_list_to_buf( | |
| buf: *mut core::ffi::c_char, | |
| maskp: *const core::ffi::c_ulong, | |
| nmaskbits: core::ffi::c_int, | |
| off: loff_t, | |
| count: usize, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn bitmap_parse( | |
| buf: *const core::ffi::c_char, | |
| buflen: core::ffi::c_uint, | |
| dst: *mut core::ffi::c_ulong, | |
| nbits: core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn bitmap_parselist( | |
| buf: *const core::ffi::c_char, | |
| maskp: *mut core::ffi::c_ulong, | |
| nmaskbits: core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn bitmap_parselist_user( | |
| ubuf: *const core::ffi::c_char, | |
| ulen: core::ffi::c_uint, | |
| dst: *mut core::ffi::c_ulong, | |
| nbits: core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn bitmap_alloc(nbits: core::ffi::c_uint, flags: gfp_t) -> *mut core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn bitmap_zalloc(nbits: core::ffi::c_uint, flags: gfp_t) -> *mut core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn bitmap_alloc_node( | |
| nbits: core::ffi::c_uint, | |
| flags: gfp_t, | |
| node: core::ffi::c_int, | |
| ) -> *mut core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn bitmap_zalloc_node( | |
| nbits: core::ffi::c_uint, | |
| flags: gfp_t, | |
| node: core::ffi::c_int, | |
| ) -> *mut core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn bitmap_free(bitmap: *const core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn devm_bitmap_alloc( | |
| dev: *mut device, | |
| nbits: core::ffi::c_uint, | |
| flags: gfp_t, | |
| ) -> *mut core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn devm_bitmap_zalloc( | |
| dev: *mut device, | |
| nbits: core::ffi::c_uint, | |
| flags: gfp_t, | |
| ) -> *mut core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn __bitmap_equal( | |
| bitmap1: *const core::ffi::c_ulong, | |
| bitmap2: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn __bitmap_or_equal( | |
| src1: *const core::ffi::c_ulong, | |
| src2: *const core::ffi::c_ulong, | |
| src3: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn __bitmap_complement( | |
| dst: *mut core::ffi::c_ulong, | |
| src: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __bitmap_shift_right( | |
| dst: *mut core::ffi::c_ulong, | |
| src: *const core::ffi::c_ulong, | |
| shift: core::ffi::c_uint, | |
| nbits: core::ffi::c_uint, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __bitmap_shift_left( | |
| dst: *mut core::ffi::c_ulong, | |
| src: *const core::ffi::c_ulong, | |
| shift: core::ffi::c_uint, | |
| nbits: core::ffi::c_uint, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn bitmap_cut( | |
| dst: *mut core::ffi::c_ulong, | |
| src: *const core::ffi::c_ulong, | |
| first: core::ffi::c_uint, | |
| cut: core::ffi::c_uint, | |
| nbits: core::ffi::c_uint, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __bitmap_and( | |
| dst: *mut core::ffi::c_ulong, | |
| bitmap1: *const core::ffi::c_ulong, | |
| bitmap2: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn __bitmap_or( | |
| dst: *mut core::ffi::c_ulong, | |
| bitmap1: *const core::ffi::c_ulong, | |
| bitmap2: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __bitmap_xor( | |
| dst: *mut core::ffi::c_ulong, | |
| bitmap1: *const core::ffi::c_ulong, | |
| bitmap2: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __bitmap_andnot( | |
| dst: *mut core::ffi::c_ulong, | |
| bitmap1: *const core::ffi::c_ulong, | |
| bitmap2: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn __bitmap_replace( | |
| dst: *mut core::ffi::c_ulong, | |
| old: *const core::ffi::c_ulong, | |
| new: *const core::ffi::c_ulong, | |
| mask: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __bitmap_intersects( | |
| bitmap1: *const core::ffi::c_ulong, | |
| bitmap2: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn __bitmap_subset( | |
| bitmap1: *const core::ffi::c_ulong, | |
| bitmap2: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn __bitmap_weight( | |
| bitmap: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn __bitmap_weight_and( | |
| bitmap1: *const core::ffi::c_ulong, | |
| bitmap2: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn __bitmap_set( | |
| map: *mut core::ffi::c_ulong, | |
| start: core::ffi::c_uint, | |
| len: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __bitmap_clear( | |
| map: *mut core::ffi::c_ulong, | |
| start: core::ffi::c_uint, | |
| len: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn bitmap_find_next_zero_area_off( | |
| map: *mut core::ffi::c_ulong, | |
| size: core::ffi::c_ulong, | |
| start: core::ffi::c_ulong, | |
| nr: core::ffi::c_uint, | |
| align_mask: core::ffi::c_ulong, | |
| align_offset: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn bitmap_remap( | |
| dst: *mut core::ffi::c_ulong, | |
| src: *const core::ffi::c_ulong, | |
| old: *const core::ffi::c_ulong, | |
| new: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn bitmap_bitremap( | |
| oldbit: core::ffi::c_int, | |
| old: *const core::ffi::c_ulong, | |
| new: *const core::ffi::c_ulong, | |
| bits: core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn bitmap_onto( | |
| dst: *mut core::ffi::c_ulong, | |
| orig: *const core::ffi::c_ulong, | |
| relmap: *const core::ffi::c_ulong, | |
| bits: core::ffi::c_uint, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn bitmap_fold( | |
| dst: *mut core::ffi::c_ulong, | |
| orig: *const core::ffi::c_ulong, | |
| sz: core::ffi::c_uint, | |
| nbits: core::ffi::c_uint, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn bitmap_from_arr32( | |
| bitmap: *mut core::ffi::c_ulong, | |
| buf: *const u32_, | |
| nbits: core::ffi::c_uint, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn bitmap_to_arr32( | |
| buf: *mut u32_, | |
| bitmap: *const core::ffi::c_ulong, | |
| nbits: core::ffi::c_uint, | |
| ); | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct cpumask { | |
| pub bits: [core::ffi::c_ulong; 4usize], | |
| } | |
| pub type cpumask_t = cpumask; | |
| extern "C" { | |
| pub static mut nr_cpu_ids: core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub static mut __cpu_possible_mask: cpumask; | |
| } | |
| extern "C" { | |
| pub static mut __cpu_online_mask: cpumask; | |
| } | |
| extern "C" { | |
| pub static mut __cpu_present_mask: cpumask; | |
| } | |
| extern "C" { | |
| pub static mut __cpu_active_mask: cpumask; | |
| } | |
| extern "C" { | |
| pub static mut __cpu_dying_mask: cpumask; | |
| } | |
| extern "C" { | |
| pub static mut __num_online_cpus: atomic_t; | |
| } | |
| extern "C" { | |
| pub static mut cpus_booted_once_mask: cpumask_t; | |
| } | |
| extern "C" { | |
| pub fn cpumask_local_spread(i: core::ffi::c_uint, node: core::ffi::c_int) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn cpumask_any_and_distribute( | |
| src1p: *const cpumask, | |
| src2p: *const cpumask, | |
| ) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn cpumask_any_distribute(srcp: *const cpumask) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn cpumask_next_wrap( | |
| n: core::ffi::c_int, | |
| mask: *const cpumask, | |
| start: core::ffi::c_int, | |
| wrap: bool_, | |
| ) -> core::ffi::c_uint; | |
| } | |
| pub type cpumask_var_t = [cpumask; 1usize]; | |
| extern "C" { | |
| pub static cpu_all_bits: [core::ffi::c_ulong; 4usize]; | |
| } | |
| extern "C" { | |
| pub fn init_cpu_present(src: *const cpumask); | |
| } | |
| extern "C" { | |
| pub fn init_cpu_possible(src: *const cpumask); | |
| } | |
| extern "C" { | |
| pub fn init_cpu_online(src: *const cpumask); | |
| } | |
| extern "C" { | |
| pub fn set_cpu_online(cpu: core::ffi::c_uint, online: bool_); | |
| } | |
| extern "C" { | |
| pub static mut cpu_bit_bitmap: [[core::ffi::c_ulong; 4usize]; 65usize]; | |
| } | |
| pub const ftr_type_FTR_EXACT: ftr_type = 0; | |
| pub const ftr_type_FTR_LOWER_SAFE: ftr_type = 1; | |
| pub const ftr_type_FTR_HIGHER_SAFE: ftr_type = 2; | |
| pub const ftr_type_FTR_HIGHER_OR_ZERO_SAFE: ftr_type = 3; | |
| pub type ftr_type = core::ffi::c_uint; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct arm64_ftr_bits { | |
| pub sign: bool_, | |
| pub visible: bool_, | |
| pub strict: bool_, | |
| pub type_: ftr_type, | |
| pub shift: u8_, | |
| pub width: u8_, | |
| pub safe_val: s64, | |
| } | |
| impl Default for arm64_ftr_bits { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct arm64_ftr_override { | |
| pub val: u64_, | |
| pub mask: u64_, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct arm64_ftr_reg { | |
| pub name: *const core::ffi::c_char, | |
| pub strict_mask: u64_, | |
| pub user_mask: u64_, | |
| pub sys_val: u64_, | |
| pub user_val: u64_, | |
| pub override_: *mut arm64_ftr_override, | |
| pub ftr_bits: *const arm64_ftr_bits, | |
| } | |
| impl Default for arm64_ftr_reg { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub static mut arm64_ftr_reg_ctrel0: arm64_ftr_reg; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct arm64_cpu_capabilities { | |
| pub desc: *const core::ffi::c_char, | |
| pub capability: u16_, | |
| pub type_: u16_, | |
| pub matches: ::core::option::Option< | |
| unsafe extern "C" fn(caps: *const arm64_cpu_capabilities, scope: core::ffi::c_int) -> bool_, | |
| >, | |
| pub cpu_enable: | |
| ::core::option::Option<unsafe extern "C" fn(cap: *const arm64_cpu_capabilities)>, | |
| pub __bindgen_anon_1: arm64_cpu_capabilities__bindgen_ty_1, | |
| pub match_list: *const arm64_cpu_capabilities, | |
| pub cpus: *const cpumask, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union arm64_cpu_capabilities__bindgen_ty_1 { | |
| pub __bindgen_anon_1: arm64_cpu_capabilities__bindgen_ty_1__bindgen_ty_1, | |
| pub midr_range_list: *const midr_range, | |
| pub __bindgen_anon_2: arm64_cpu_capabilities__bindgen_ty_1__bindgen_ty_2, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct arm64_cpu_capabilities__bindgen_ty_1__bindgen_ty_1 { | |
| pub midr_range: midr_range, | |
| pub fixed_revs: *const arm64_cpu_capabilities__bindgen_ty_1__bindgen_ty_1_arm64_midr_revidr, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct arm64_cpu_capabilities__bindgen_ty_1__bindgen_ty_1_arm64_midr_revidr { | |
| pub midr_rv: u32_, | |
| pub revidr_mask: u32_, | |
| } | |
| impl Default for arm64_cpu_capabilities__bindgen_ty_1__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct arm64_cpu_capabilities__bindgen_ty_1__bindgen_ty_2 { | |
| pub sys_reg: u32_, | |
| pub field_pos: u8_, | |
| pub field_width: u8_, | |
| pub min_field_value: u8_, | |
| pub hwcap_type: u8_, | |
| pub sign: bool_, | |
| pub hwcap: core::ffi::c_ulong, | |
| } | |
| impl Default for arm64_cpu_capabilities__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for arm64_cpu_capabilities { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub static mut system_cpucaps: [core::ffi::c_ulong; 2usize]; | |
| } | |
| extern "C" { | |
| pub static mut boot_cpucaps: [core::ffi::c_ulong; 2usize]; | |
| } | |
| extern "C" { | |
| pub fn this_cpu_has_cap(cap: core::ffi::c_uint) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn cpu_set_feature(num: core::ffi::c_uint); | |
| } | |
| extern "C" { | |
| pub fn cpu_have_feature(num: core::ffi::c_uint) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn cpu_get_elf_hwcap() -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn cpu_get_elf_hwcap2() -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn setup_system_features(); | |
| } | |
| extern "C" { | |
| pub fn setup_user_features(); | |
| } | |
| extern "C" { | |
| pub fn check_local_cpu_capabilities(); | |
| } | |
| extern "C" { | |
| pub fn read_sanitised_ftr_reg(id: u32_) -> u64_; | |
| } | |
| extern "C" { | |
| pub fn __read_sysreg_by_encoding(sys_id: u32_) -> u64_; | |
| } | |
| extern "C" { | |
| pub fn system_32bit_el0_cpumask() -> *const cpumask; | |
| } | |
| extern "C" { | |
| pub static mut arm64_mismatched_32bit_el0: static_key_false; | |
| } | |
| extern "C" { | |
| pub fn do_emulate_mrs(regs: *mut pt_regs, sys_reg: u32_, rt: u32_) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn try_emulate_mrs(regs: *mut pt_regs, isn: u32_) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn get_cpu_with_amu_feat() -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn arm64_ftr_safe_value(ftrp: *const arm64_ftr_bits, new: s64, cur: s64) -> s64; | |
| } | |
| extern "C" { | |
| pub fn get_arm64_ftr_reg(sys_id: u32_) -> *mut arm64_ftr_reg; | |
| } | |
| extern "C" { | |
| pub static mut id_aa64mmfr1_override: arm64_ftr_override; | |
| } | |
| extern "C" { | |
| pub static mut id_aa64pfr0_override: arm64_ftr_override; | |
| } | |
| extern "C" { | |
| pub static mut id_aa64pfr1_override: arm64_ftr_override; | |
| } | |
| extern "C" { | |
| pub static mut id_aa64zfr0_override: arm64_ftr_override; | |
| } | |
| extern "C" { | |
| pub static mut id_aa64smfr0_override: arm64_ftr_override; | |
| } | |
| extern "C" { | |
| pub static mut id_aa64isar1_override: arm64_ftr_override; | |
| } | |
| extern "C" { | |
| pub static mut id_aa64isar2_override: arm64_ftr_override; | |
| } | |
| extern "C" { | |
| pub static mut arm64_sw_feature_override: arm64_ftr_override; | |
| } | |
| extern "C" { | |
| pub fn get_kvm_ipa_limit() -> u32_; | |
| } | |
| extern "C" { | |
| pub fn dump_cpu_features(); | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct user_pt_regs { | |
| pub regs: [__u64; 31usize], | |
| pub sp: __u64, | |
| pub pc: __u64, | |
| pub pstate: __u64, | |
| } | |
| #[repr(C)] | |
| #[repr(align(16))] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct user_fpsimd_state { | |
| pub vregs: [__uint128_t; 32usize], | |
| pub fpsr: __u32, | |
| pub fpcr: __u32, | |
| pub __reserved: [__u32; 2usize], | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct user_hwdebug_state { | |
| pub dbg_info: __u32, | |
| pub pad: __u32, | |
| pub dbg_regs: [user_hwdebug_state__bindgen_ty_1; 16usize], | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct user_hwdebug_state__bindgen_ty_1 { | |
| pub addr: __u64, | |
| pub ctrl: __u32, | |
| pub pad: __u32, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct user_sve_header { | |
| pub size: __u32, | |
| pub max_size: __u32, | |
| pub vl: __u16, | |
| pub max_vl: __u16, | |
| pub flags: __u16, | |
| pub __reserved: __u16, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct user_pac_mask { | |
| pub data_mask: __u64, | |
| pub insn_mask: __u64, | |
| } | |
| #[repr(C)] | |
| #[repr(align(16))] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct user_pac_address_keys { | |
| pub apiakey: __uint128_t, | |
| pub apibkey: __uint128_t, | |
| pub apdakey: __uint128_t, | |
| pub apdbkey: __uint128_t, | |
| } | |
| #[repr(C)] | |
| #[repr(align(16))] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct user_pac_generic_keys { | |
| pub apgakey: __uint128_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct user_za_header { | |
| pub size: __u32, | |
| pub max_size: __u32, | |
| pub vl: __u16, | |
| pub max_vl: __u16, | |
| pub flags: __u16, | |
| pub __reserved: __u16, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct pt_regs { | |
| pub __bindgen_anon_1: pt_regs__bindgen_ty_1, | |
| pub orig_x0: u64_, | |
| pub syscallno: s32, | |
| pub unused2: u32_, | |
| pub sdei_ttbr1: u64_, | |
| pub pmr_save: u64_, | |
| pub stackframe: [u64_; 2usize], | |
| pub lockdep_hardirqs: u64_, | |
| pub exit_rcu: u64_, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union pt_regs__bindgen_ty_1 { | |
| pub user_regs: user_pt_regs, | |
| pub __bindgen_anon_1: pt_regs__bindgen_ty_1__bindgen_ty_1, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct pt_regs__bindgen_ty_1__bindgen_ty_1 { | |
| pub regs: [u64_; 31usize], | |
| pub sp: u64_, | |
| pub pc: u64_, | |
| pub pstate: u64_, | |
| } | |
| impl Default for pt_regs__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for pt_regs { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn regs_query_register_offset(name: *const core::ffi::c_char) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn regs_get_kernel_stack_nth( | |
| regs: *mut pt_regs, | |
| n: core::ffi::c_uint, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn valid_user_regs(regs: *mut user_pt_regs, task: *mut task_struct) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn profile_pc(regs: *mut pt_regs) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn __bad_size_call_parameter(); | |
| } | |
| extern "C" { | |
| pub static mut __per_cpu_offset: [core::ffi::c_ulong; 256usize]; | |
| } | |
| extern "C" { | |
| pub fn lockdep_softirqs_on(ip: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn lockdep_softirqs_off(ip: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn lockdep_hardirqs_on_prepare(); | |
| } | |
| extern "C" { | |
| pub fn lockdep_hardirqs_on(ip: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn lockdep_hardirqs_off(ip: core::ffi::c_ulong); | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct irqtrace_events { | |
| pub irq_events: core::ffi::c_uint, | |
| pub hardirq_enable_ip: core::ffi::c_ulong, | |
| pub hardirq_disable_ip: core::ffi::c_ulong, | |
| pub hardirq_enable_event: core::ffi::c_uint, | |
| pub hardirq_disable_event: core::ffi::c_uint, | |
| pub softirq_disable_ip: core::ffi::c_ulong, | |
| pub softirq_enable_ip: core::ffi::c_ulong, | |
| pub softirq_disable_event: core::ffi::c_uint, | |
| pub softirq_enable_event: core::ffi::c_uint, | |
| } | |
| extern "C" { | |
| pub static mut hardirqs_enabled: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut hardirq_context: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn trace_hardirqs_on_prepare(); | |
| } | |
| extern "C" { | |
| pub fn trace_hardirqs_off_finish(); | |
| } | |
| extern "C" { | |
| pub fn trace_hardirqs_on(); | |
| } | |
| extern "C" { | |
| pub fn trace_hardirqs_off(); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct class_irq_t { | |
| pub lock: *mut core::ffi::c_void, | |
| } | |
| impl Default for class_irq_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct class_irqsave_t { | |
| pub lock: *mut core::ffi::c_void, | |
| pub flags: core::ffi::c_ulong, | |
| } | |
| impl Default for class_irqsave_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn __local_bh_disable_ip(ip: core::ffi::c_ulong, cnt: core::ffi::c_uint); | |
| } | |
| extern "C" { | |
| pub fn _local_bh_enable(); | |
| } | |
| extern "C" { | |
| pub fn __local_bh_enable_ip(ip: core::ffi::c_ulong, cnt: core::ffi::c_uint); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct llist_head { | |
| pub first: *mut llist_node, | |
| } | |
| impl Default for llist_head { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct llist_node { | |
| pub next: *mut llist_node, | |
| } | |
| impl Default for llist_node { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn llist_add_batch( | |
| new_first: *mut llist_node, | |
| new_last: *mut llist_node, | |
| head: *mut llist_head, | |
| ) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn llist_del_first(head: *mut llist_head) -> *mut llist_node; | |
| } | |
| extern "C" { | |
| pub fn llist_del_first_this(head: *mut llist_head, this: *mut llist_node) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn llist_reverse_order(head: *mut llist_node) -> *mut llist_node; | |
| } | |
| pub const CSD_FLAG_LOCK: _bindgen_ty_5 = 1; | |
| pub const IRQ_WORK_PENDING: _bindgen_ty_5 = 1; | |
| pub const IRQ_WORK_BUSY: _bindgen_ty_5 = 2; | |
| pub const IRQ_WORK_LAZY: _bindgen_ty_5 = 4; | |
| pub const IRQ_WORK_HARD_IRQ: _bindgen_ty_5 = 8; | |
| pub const IRQ_WORK_CLAIMED: _bindgen_ty_5 = 3; | |
| pub const CSD_TYPE_ASYNC: _bindgen_ty_5 = 0; | |
| pub const CSD_TYPE_SYNC: _bindgen_ty_5 = 16; | |
| pub const CSD_TYPE_IRQ_WORK: _bindgen_ty_5 = 32; | |
| pub const CSD_TYPE_TTWU: _bindgen_ty_5 = 48; | |
| pub const CSD_FLAG_TYPE_MASK: _bindgen_ty_5 = 240; | |
| pub type _bindgen_ty_5 = core::ffi::c_uint; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct __call_single_node { | |
| pub llist: llist_node, | |
| pub __bindgen_anon_1: __call_single_node__bindgen_ty_1, | |
| pub src: u16_, | |
| pub dst: u16_, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union __call_single_node__bindgen_ty_1 { | |
| pub u_flags: core::ffi::c_uint, | |
| pub a_flags: atomic_t, | |
| } | |
| impl Default for __call_single_node__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for __call_single_node { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type smp_call_func_t = | |
| ::core::option::Option<unsafe extern "C" fn(info: *mut core::ffi::c_void)>; | |
| pub type smp_cond_func_t = ::core::option::Option< | |
| unsafe extern "C" fn(cpu: core::ffi::c_int, info: *mut core::ffi::c_void) -> bool_, | |
| >; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct __call_single_data { | |
| pub node: __call_single_node, | |
| pub func: smp_call_func_t, | |
| pub info: *mut core::ffi::c_void, | |
| } | |
| impl Default for __call_single_data { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type call_single_data_t = __call_single_data; | |
| extern "C" { | |
| pub fn __smp_call_single_queue(cpu: core::ffi::c_int, node: *mut llist_node); | |
| } | |
| extern "C" { | |
| pub static mut total_cpus: core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn smp_call_function_single( | |
| cpuid: core::ffi::c_int, | |
| func: smp_call_func_t, | |
| info: *mut core::ffi::c_void, | |
| wait: core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn on_each_cpu_cond_mask( | |
| cond_func: smp_cond_func_t, | |
| func: smp_call_func_t, | |
| info: *mut core::ffi::c_void, | |
| wait: bool_, | |
| mask: *const cpumask, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn smp_call_function_single_async( | |
| cpu: core::ffi::c_int, | |
| csd: *mut call_single_data_t, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn panic_smp_self_stop() -> !; | |
| } | |
| extern "C" { | |
| pub fn nmi_panic_self_stop(regs: *mut pt_regs) -> !; | |
| } | |
| extern "C" { | |
| pub fn crash_smp_send_stop(); | |
| } | |
| extern "C" { | |
| pub static mut cpu_number: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut __cpu_logical_map: [u64_; 256usize]; | |
| } | |
| extern "C" { | |
| pub fn cpu_logical_map(cpu: core::ffi::c_uint) -> u64_; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct seq_file { | |
| _unused: [u8; 0], | |
| } | |
| extern "C" { | |
| pub fn smp_init_cpus(); | |
| } | |
| extern "C" { | |
| pub fn set_smp_ipi_range(ipi_base: core::ffi::c_int, nr_ipi: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn secondary_start_kernel(); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct secondary_data { | |
| pub task: *mut task_struct, | |
| pub status: core::ffi::c_long, | |
| } | |
| impl Default for secondary_data { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub static mut secondary_data: secondary_data; | |
| } | |
| extern "C" { | |
| pub static mut __early_cpu_boot_status: core::ffi::c_long; | |
| } | |
| extern "C" { | |
| pub fn secondary_entry(); | |
| } | |
| extern "C" { | |
| pub fn arch_send_call_function_single_ipi(cpu: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn arch_send_call_function_ipi_mask(mask: *const cpumask); | |
| } | |
| extern "C" { | |
| pub fn __cpu_disable() -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn cpu_die() -> !; | |
| } | |
| extern "C" { | |
| pub fn cpu_die_early() -> !; | |
| } | |
| extern "C" { | |
| pub fn cpus_are_stuck_in_kernel() -> bool_; | |
| } | |
| extern "C" { | |
| pub fn smp_crash_stop_failed() -> bool_; | |
| } | |
| extern "C" { | |
| pub fn smp_send_stop(); | |
| } | |
| extern "C" { | |
| pub fn arch_smp_send_reschedule(cpu: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn smp_prepare_cpus(max_cpus: core::ffi::c_uint); | |
| } | |
| extern "C" { | |
| pub fn __cpu_up(cpunum: core::ffi::c_uint, tidle: *mut task_struct) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn smp_cpus_done(max_cpus: core::ffi::c_uint); | |
| } | |
| extern "C" { | |
| pub fn smp_call_function( | |
| func: smp_call_func_t, | |
| info: *mut core::ffi::c_void, | |
| wait: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn smp_call_function_many( | |
| mask: *const cpumask, | |
| func: smp_call_func_t, | |
| info: *mut core::ffi::c_void, | |
| wait: bool_, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn smp_call_function_any( | |
| mask: *const cpumask, | |
| func: smp_call_func_t, | |
| info: *mut core::ffi::c_void, | |
| wait: core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn kick_all_cpus_sync(); | |
| } | |
| extern "C" { | |
| pub fn wake_up_all_idle_cpus(); | |
| } | |
| extern "C" { | |
| pub fn call_function_init(); | |
| } | |
| extern "C" { | |
| pub fn generic_smp_call_function_single_interrupt(); | |
| } | |
| extern "C" { | |
| pub fn smp_prepare_boot_cpu(); | |
| } | |
| extern "C" { | |
| pub static mut setup_max_cpus: core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn setup_nr_cpu_ids(); | |
| } | |
| extern "C" { | |
| pub fn smp_init(); | |
| } | |
| extern "C" { | |
| pub static mut __boot_cpu_id: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn arch_disable_smp_support(); | |
| } | |
| extern "C" { | |
| pub fn arch_thaw_secondary_cpus_begin(); | |
| } | |
| extern "C" { | |
| pub fn arch_thaw_secondary_cpus_end(); | |
| } | |
| extern "C" { | |
| pub fn smp_setup_processor_id(); | |
| } | |
| extern "C" { | |
| pub fn smp_call_on_cpu( | |
| cpu: core::ffi::c_uint, | |
| func: ::core::option::Option< | |
| unsafe extern "C" fn(arg1: *mut core::ffi::c_void) -> core::ffi::c_int, | |
| >, | |
| par: *mut core::ffi::c_void, | |
| phys: bool_, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn smpcfd_prepare_cpu(cpu: core::ffi::c_uint) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn smpcfd_dead_cpu(cpu: core::ffi::c_uint) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn smpcfd_dying_cpu(cpu: core::ffi::c_uint) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut __icache_flags: core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn cache_line_size() -> core::ffi::c_int; | |
| } | |
| #[repr(C)] | |
| #[repr(align(64))] | |
| pub struct cacheline_padding { | |
| pub x: __IncompleteArrayField<core::ffi::c_char>, | |
| } | |
| impl Default for cacheline_padding { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub static mut debug_locks: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut debug_locks_silent: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn debug_locks_off() -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn debug_show_all_locks(); | |
| } | |
| extern "C" { | |
| pub fn debug_show_held_locks(task: *mut task_struct); | |
| } | |
| extern "C" { | |
| pub fn debug_check_no_locks_freed(from: *const core::ffi::c_void, len: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn debug_check_no_locks_held(); | |
| } | |
| pub type stack_trace_consume_fn = ::core::option::Option< | |
| unsafe extern "C" fn(cookie: *mut core::ffi::c_void, addr: core::ffi::c_ulong) -> bool_, | |
| >; | |
| extern "C" { | |
| pub fn arch_stack_walk( | |
| consume_entry: stack_trace_consume_fn, | |
| cookie: *mut core::ffi::c_void, | |
| task: *mut task_struct, | |
| regs: *mut pt_regs, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn arch_stack_walk_reliable( | |
| consume_entry: stack_trace_consume_fn, | |
| cookie: *mut core::ffi::c_void, | |
| task: *mut task_struct, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn arch_stack_walk_user( | |
| consume_entry: stack_trace_consume_fn, | |
| cookie: *mut core::ffi::c_void, | |
| regs: *const pt_regs, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn stack_trace_print( | |
| trace: *const core::ffi::c_ulong, | |
| nr_entries: core::ffi::c_uint, | |
| spaces: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn stack_trace_snprint( | |
| buf: *mut core::ffi::c_char, | |
| size: usize, | |
| entries: *const core::ffi::c_ulong, | |
| nr_entries: core::ffi::c_uint, | |
| spaces: core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn stack_trace_save( | |
| store: *mut core::ffi::c_ulong, | |
| size: core::ffi::c_uint, | |
| skipnr: core::ffi::c_uint, | |
| ) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn stack_trace_save_tsk( | |
| task: *mut task_struct, | |
| store: *mut core::ffi::c_ulong, | |
| size: core::ffi::c_uint, | |
| skipnr: core::ffi::c_uint, | |
| ) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn stack_trace_save_regs( | |
| regs: *mut pt_regs, | |
| store: *mut core::ffi::c_ulong, | |
| size: core::ffi::c_uint, | |
| skipnr: core::ffi::c_uint, | |
| ) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn stack_trace_save_user( | |
| store: *mut core::ffi::c_ulong, | |
| size: core::ffi::c_uint, | |
| ) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn filter_irq_stacks( | |
| entries: *mut core::ffi::c_ulong, | |
| nr_entries: core::ffi::c_uint, | |
| ) -> core::ffi::c_uint; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct lock_list { | |
| pub entry: list_head, | |
| pub class: *mut lock_class, | |
| pub links_to: *mut lock_class, | |
| pub trace: *const lock_trace, | |
| pub distance: u16_, | |
| pub dep: u8_, | |
| pub only_xr: u8_, | |
| pub parent: *mut lock_list, | |
| } | |
| impl Default for lock_list { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct lock_chain { | |
| pub _bitfield_align_1: [u32; 0], | |
| pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize]>, | |
| pub entry: hlist_node, | |
| pub chain_key: u64_, | |
| } | |
| impl Default for lock_chain { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl lock_chain { | |
| #[inline] | |
| pub fn irq_context(&self) -> core::ffi::c_uint { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 2u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_irq_context(&mut self, val: core::ffi::c_uint) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(0usize, 2u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn depth(&self) -> core::ffi::c_uint { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 6u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_depth(&mut self, val: core::ffi::c_uint) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(2usize, 6u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn base(&self) -> core::ffi::c_uint { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_base(&mut self, val: core::ffi::c_uint) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(8usize, 24u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn new_bitfield_1( | |
| irq_context: core::ffi::c_uint, | |
| depth: core::ffi::c_uint, | |
| base: core::ffi::c_uint, | |
| ) -> __BindgenBitfieldUnit<[u8; 4usize]> { | |
| let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize]> = Default::default(); | |
| __bindgen_bitfield_unit.set(0usize, 2u8, { | |
| let irq_context: u32 = unsafe { ::core::mem::transmute(irq_context) }; | |
| irq_context as u64 | |
| }); | |
| __bindgen_bitfield_unit.set(2usize, 6u8, { | |
| let depth: u32 = unsafe { ::core::mem::transmute(depth) }; | |
| depth as u64 | |
| }); | |
| __bindgen_bitfield_unit.set(8usize, 24u8, { | |
| let base: u32 = unsafe { ::core::mem::transmute(base) }; | |
| base as u64 | |
| }); | |
| __bindgen_bitfield_unit | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct held_lock { | |
| pub prev_chain_key: u64_, | |
| pub acquire_ip: core::ffi::c_ulong, | |
| pub instance: *mut lockdep_map, | |
| pub nest_lock: *mut lockdep_map, | |
| pub _bitfield_align_1: [u16; 0], | |
| pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize]>, | |
| pub pin_count: core::ffi::c_uint, | |
| } | |
| impl Default for held_lock { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl held_lock { | |
| #[inline] | |
| pub fn class_idx(&self) -> core::ffi::c_uint { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 13u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_class_idx(&mut self, val: core::ffi::c_uint) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(0usize, 13u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn irq_context(&self) -> core::ffi::c_uint { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 2u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_irq_context(&mut self, val: core::ffi::c_uint) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(13usize, 2u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn trylock(&self) -> core::ffi::c_uint { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_trylock(&mut self, val: core::ffi::c_uint) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(15usize, 1u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn read(&self) -> core::ffi::c_uint { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 2u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_read(&mut self, val: core::ffi::c_uint) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(16usize, 2u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn check(&self) -> core::ffi::c_uint { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_check(&mut self, val: core::ffi::c_uint) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(18usize, 1u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn hardirqs_off(&self) -> core::ffi::c_uint { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 1u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_hardirqs_off(&mut self, val: core::ffi::c_uint) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(19usize, 1u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn sync(&self) -> core::ffi::c_uint { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 1u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_sync(&mut self, val: core::ffi::c_uint) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(20usize, 1u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn references(&self) -> core::ffi::c_uint { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 11u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_references(&mut self, val: core::ffi::c_uint) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(21usize, 11u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn new_bitfield_1( | |
| class_idx: core::ffi::c_uint, | |
| irq_context: core::ffi::c_uint, | |
| trylock: core::ffi::c_uint, | |
| read: core::ffi::c_uint, | |
| check: core::ffi::c_uint, | |
| hardirqs_off: core::ffi::c_uint, | |
| sync: core::ffi::c_uint, | |
| references: core::ffi::c_uint, | |
| ) -> __BindgenBitfieldUnit<[u8; 4usize]> { | |
| let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize]> = Default::default(); | |
| __bindgen_bitfield_unit.set(0usize, 13u8, { | |
| let class_idx: u32 = unsafe { ::core::mem::transmute(class_idx) }; | |
| class_idx as u64 | |
| }); | |
| __bindgen_bitfield_unit.set(13usize, 2u8, { | |
| let irq_context: u32 = unsafe { ::core::mem::transmute(irq_context) }; | |
| irq_context as u64 | |
| }); | |
| __bindgen_bitfield_unit.set(15usize, 1u8, { | |
| let trylock: u32 = unsafe { ::core::mem::transmute(trylock) }; | |
| trylock as u64 | |
| }); | |
| __bindgen_bitfield_unit.set(16usize, 2u8, { | |
| let read: u32 = unsafe { ::core::mem::transmute(read) }; | |
| read as u64 | |
| }); | |
| __bindgen_bitfield_unit.set(18usize, 1u8, { | |
| let check: u32 = unsafe { ::core::mem::transmute(check) }; | |
| check as u64 | |
| }); | |
| __bindgen_bitfield_unit.set(19usize, 1u8, { | |
| let hardirqs_off: u32 = unsafe { ::core::mem::transmute(hardirqs_off) }; | |
| hardirqs_off as u64 | |
| }); | |
| __bindgen_bitfield_unit.set(20usize, 1u8, { | |
| let sync: u32 = unsafe { ::core::mem::transmute(sync) }; | |
| sync as u64 | |
| }); | |
| __bindgen_bitfield_unit.set(21usize, 11u8, { | |
| let references: u32 = unsafe { ::core::mem::transmute(references) }; | |
| references as u64 | |
| }); | |
| __bindgen_bitfield_unit | |
| } | |
| } | |
| extern "C" { | |
| pub fn lockdep_init(); | |
| } | |
| extern "C" { | |
| pub fn lockdep_reset(); | |
| } | |
| extern "C" { | |
| pub fn lockdep_reset_lock(lock: *mut lockdep_map); | |
| } | |
| extern "C" { | |
| pub fn lockdep_free_key_range(start: *mut core::ffi::c_void, size: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn lockdep_sys_exit(); | |
| } | |
| extern "C" { | |
| pub fn lockdep_set_selftest_task(task: *mut task_struct); | |
| } | |
| extern "C" { | |
| pub fn lockdep_init_task(task: *mut task_struct); | |
| } | |
| extern "C" { | |
| pub fn lockdep_register_key(key: *mut lock_class_key); | |
| } | |
| extern "C" { | |
| pub fn lockdep_unregister_key(key: *mut lock_class_key); | |
| } | |
| extern "C" { | |
| pub fn lockdep_init_map_type( | |
| lock: *mut lockdep_map, | |
| name: *const core::ffi::c_char, | |
| key: *mut lock_class_key, | |
| subclass: core::ffi::c_int, | |
| inner: u8_, | |
| outer: u8_, | |
| lock_type: u8_, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn lock_acquire( | |
| lock: *mut lockdep_map, | |
| subclass: core::ffi::c_uint, | |
| trylock: core::ffi::c_int, | |
| read: core::ffi::c_int, | |
| check: core::ffi::c_int, | |
| nest_lock: *mut lockdep_map, | |
| ip: core::ffi::c_ulong, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn lock_release(lock: *mut lockdep_map, ip: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn lock_sync( | |
| lock: *mut lockdep_map, | |
| subclass: core::ffi::c_uint, | |
| read: core::ffi::c_int, | |
| check: core::ffi::c_int, | |
| nest_lock: *mut lockdep_map, | |
| ip: core::ffi::c_ulong, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn lock_is_held_type(lock: *const lockdep_map, read: core::ffi::c_int) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn lock_set_class( | |
| lock: *mut lockdep_map, | |
| name: *const core::ffi::c_char, | |
| key: *mut lock_class_key, | |
| subclass: core::ffi::c_uint, | |
| ip: core::ffi::c_ulong, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn lock_downgrade(lock: *mut lockdep_map, ip: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn lock_pin_lock(lock: *mut lockdep_map) -> pin_cookie; | |
| } | |
| extern "C" { | |
| pub fn lock_repin_lock(lock: *mut lockdep_map, arg1: pin_cookie); | |
| } | |
| extern "C" { | |
| pub fn lock_unpin_lock(lock: *mut lockdep_map, arg1: pin_cookie); | |
| } | |
| extern "C" { | |
| pub fn lockdep_set_lock_cmp_fn(arg1: *mut lockdep_map, arg2: lock_cmp_fn, arg3: lock_print_fn); | |
| } | |
| pub const xhlock_context_t_XHLOCK_HARD: xhlock_context_t = 0; | |
| pub const xhlock_context_t_XHLOCK_SOFT: xhlock_context_t = 1; | |
| pub const xhlock_context_t_XHLOCK_CTX_NR: xhlock_context_t = 2; | |
| pub type xhlock_context_t = core::ffi::c_uint; | |
| extern "C" { | |
| pub fn print_irqtrace_events(curr: *mut task_struct); | |
| } | |
| extern "C" { | |
| pub fn read_lock_is_recursive() -> bool_; | |
| } | |
| extern "C" { | |
| pub static mut lockdep_recursion: core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn lockdep_rcu_suspicious( | |
| file: *const core::ffi::c_char, | |
| line: core::ffi::c_int, | |
| s: *const core::ffi::c_char, | |
| ); | |
| } | |
| #[repr(C)] | |
| #[repr(align(8))] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct spinlock { | |
| pub _bindgen_opaque_blob: [u64; 8usize], | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union spinlock__bindgen_ty_1 { | |
| pub rlock: raw_spinlock, | |
| pub __bindgen_anon_1: spinlock__bindgen_ty_1__bindgen_ty_1, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct spinlock__bindgen_ty_1__bindgen_ty_1 { | |
| pub __padding: [u8_; 24usize], | |
| pub dep_map: lockdep_map, | |
| } | |
| impl Default for spinlock__bindgen_ty_1__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for spinlock__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type spinlock_t = spinlock; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct rwlock_t { | |
| pub raw_lock: arch_rwlock_t, | |
| pub magic: core::ffi::c_uint, | |
| pub owner_cpu: core::ffi::c_uint, | |
| pub owner: *mut core::ffi::c_void, | |
| pub dep_map: lockdep_map, | |
| } | |
| impl Default for rwlock_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn queued_spin_lock_slowpath(lock: *mut qspinlock, val: u32_); | |
| } | |
| extern "C" { | |
| pub static mut _text: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut _stext: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut _etext: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut _data: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut _sdata: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut _edata: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __bss_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __bss_stop: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __init_begin: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __init_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut _sinittext: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut _einittext: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __start_ro_after_init: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __end_ro_after_init: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut _end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __per_cpu_load: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __per_cpu_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __per_cpu_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __kprobes_text_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __kprobes_text_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __entry_text_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __entry_text_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __start_rodata: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __end_rodata: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __irqentry_text_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __irqentry_text_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __softirqentry_text_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __softirqentry_text_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __start_once: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __end_once: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __ctors_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __ctors_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __start_opd: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __end_opd: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __noinstr_text_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __noinstr_text_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static __nosave_begin: core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub static __nosave_end: core::ffi::c_void; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct func_desc_t { | |
| pub addr: core::ffi::c_ulong, | |
| } | |
| extern "C" { | |
| pub static mut __alt_instructions: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __alt_instructions_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __hibernate_exit_text_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __hibernate_exit_text_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __hyp_idmap_text_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __hyp_idmap_text_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __hyp_text_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __hyp_text_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __hyp_rodata_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __hyp_rodata_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __hyp_reloc_begin: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __hyp_reloc_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __hyp_bss_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __hyp_bss_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __idmap_text_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __idmap_text_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __initdata_begin: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __initdata_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __inittext_begin: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __inittext_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __exittext_begin: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __exittext_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __mmuoff_data_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __mmuoff_data_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __entry_tramp_text_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __entry_tramp_text_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __relocate_new_kernel_start: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __relocate_new_kernel_end: [core::ffi::c_char; 0usize]; | |
| } | |
| extern "C" { | |
| pub static mut __boot_cpu_mode: [u32_; 2usize]; | |
| } | |
| extern "C" { | |
| pub fn __hyp_set_vectors(phys_vector_base: phys_addr_t); | |
| } | |
| extern "C" { | |
| pub fn __hyp_reset_vectors(); | |
| } | |
| extern "C" { | |
| pub fn is_kvm_arm_initialised() -> bool_; | |
| } | |
| extern "C" { | |
| pub static mut kvm_protected_mode_initialized: static_key_false; | |
| } | |
| #[repr(C)] | |
| #[repr(align(4))] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct arch_hw_breakpoint_ctrl { | |
| pub _bitfield_align_1: [u32; 0], | |
| pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize]>, | |
| } | |
| impl arch_hw_breakpoint_ctrl { | |
| #[inline] | |
| pub fn __reserved(&self) -> u32_ { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 19u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set___reserved(&mut self, val: u32_) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(0usize, 19u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn len(&self) -> u32_ { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 8u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_len(&mut self, val: u32_) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(19usize, 8u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn type_(&self) -> u32_ { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 2u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_type(&mut self, val: u32_) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(27usize, 2u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn privilege(&self) -> u32_ { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 2u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_privilege(&mut self, val: u32_) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(29usize, 2u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn enabled(&self) -> u32_ { | |
| unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) } | |
| } | |
| #[inline] | |
| pub fn set_enabled(&mut self, val: u32_) { | |
| unsafe { | |
| let val: u32 = ::core::mem::transmute(val); | |
| self._bitfield_1.set(31usize, 1u8, val as u64) | |
| } | |
| } | |
| #[inline] | |
| pub fn new_bitfield_1( | |
| __reserved: u32_, | |
| len: u32_, | |
| type_: u32_, | |
| privilege: u32_, | |
| enabled: u32_, | |
| ) -> __BindgenBitfieldUnit<[u8; 4usize]> { | |
| let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize]> = Default::default(); | |
| __bindgen_bitfield_unit.set(0usize, 19u8, { | |
| let __reserved: u32 = unsafe { ::core::mem::transmute(__reserved) }; | |
| __reserved as u64 | |
| }); | |
| __bindgen_bitfield_unit.set(19usize, 8u8, { | |
| let len: u32 = unsafe { ::core::mem::transmute(len) }; | |
| len as u64 | |
| }); | |
| __bindgen_bitfield_unit.set(27usize, 2u8, { | |
| let type_: u32 = unsafe { ::core::mem::transmute(type_) }; | |
| type_ as u64 | |
| }); | |
| __bindgen_bitfield_unit.set(29usize, 2u8, { | |
| let privilege: u32 = unsafe { ::core::mem::transmute(privilege) }; | |
| privilege as u64 | |
| }); | |
| __bindgen_bitfield_unit.set(31usize, 1u8, { | |
| let enabled: u32 = unsafe { ::core::mem::transmute(enabled) }; | |
| enabled as u64 | |
| }); | |
| __bindgen_bitfield_unit | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct arch_hw_breakpoint { | |
| pub address: u64_, | |
| pub trigger: u64_, | |
| pub ctrl: arch_hw_breakpoint_ctrl, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct perf_event_attr { | |
| _unused: [u8; 0], | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct perf_event { | |
| _unused: [u8; 0], | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct pmu { | |
| _unused: [u8; 0], | |
| } | |
| extern "C" { | |
| pub fn arch_bp_generic_fields( | |
| ctrl: arch_hw_breakpoint_ctrl, | |
| gen_len: *mut core::ffi::c_int, | |
| gen_type: *mut core::ffi::c_int, | |
| offset: *mut core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn arch_check_bp_in_kernelspace(hw: *mut arch_hw_breakpoint) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn hw_breakpoint_arch_parse( | |
| bp: *mut perf_event, | |
| attr: *const perf_event_attr, | |
| hw: *mut arch_hw_breakpoint, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn hw_breakpoint_exceptions_notify( | |
| unused: *mut notifier_block, | |
| val: core::ffi::c_ulong, | |
| data: *mut core::ffi::c_void, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn arch_install_hw_breakpoint(bp: *mut perf_event) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn arch_uninstall_hw_breakpoint(bp: *mut perf_event); | |
| } | |
| extern "C" { | |
| pub fn hw_breakpoint_pmu_read(bp: *mut perf_event); | |
| } | |
| extern "C" { | |
| pub fn hw_breakpoint_slots(type_: core::ffi::c_int) -> core::ffi::c_int; | |
| } | |
| pub type pteval_t = u64_; | |
| pub type pmdval_t = u64_; | |
| pub type pudval_t = u64_; | |
| pub type p4dval_t = u64_; | |
| pub type pgdval_t = u64_; | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct pte_t { | |
| pub pte: pteval_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct pmd_t { | |
| pub pmd: pmdval_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct pgd_t { | |
| pub pgd: pgdval_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct pgprot_t { | |
| pub pgprot: pteval_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct p4d_t { | |
| pub pgd: pgd_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct pud_t { | |
| pub p4d: p4d_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct prctl_mm_map { | |
| pub start_code: __u64, | |
| pub end_code: __u64, | |
| pub start_data: __u64, | |
| pub end_data: __u64, | |
| pub start_brk: __u64, | |
| pub brk: __u64, | |
| pub start_stack: __u64, | |
| pub arg_start: __u64, | |
| pub arg_end: __u64, | |
| pub env_start: __u64, | |
| pub env_end: __u64, | |
| pub auxv: *mut __u64, | |
| pub auxv_size: __u32, | |
| pub exe_fd: __u32, | |
| } | |
| impl Default for prctl_mm_map { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub static mut __invalid_size_argument_for_IOC: core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub static mut nr_irqs: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn irq_to_desc(irq: core::ffi::c_uint) -> *mut irq_desc; | |
| } | |
| extern "C" { | |
| pub fn irq_get_next_irq(offset: core::ffi::c_uint) -> core::ffi::c_uint; | |
| } | |
| #[repr(C)] | |
| #[derive(Default)] | |
| pub struct rand_pool_info { | |
| pub entropy_count: core::ffi::c_int, | |
| pub buf_size: core::ffi::c_int, | |
| pub buf: __IncompleteArrayField<__u32>, | |
| } | |
| extern "C" { | |
| pub fn add_device_randomness(buf: *const core::ffi::c_void, len: usize); | |
| } | |
| extern "C" { | |
| pub fn add_bootloader_randomness(buf: *const core::ffi::c_void, len: usize); | |
| } | |
| extern "C" { | |
| pub fn add_input_randomness( | |
| type_: core::ffi::c_uint, | |
| code: core::ffi::c_uint, | |
| value: core::ffi::c_uint, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn add_interrupt_randomness(irq: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn add_hwgenerator_randomness( | |
| buf: *const core::ffi::c_void, | |
| len: usize, | |
| entropy: usize, | |
| sleep_after: bool_, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn get_random_bytes(buf: *mut core::ffi::c_void, len: usize); | |
| } | |
| extern "C" { | |
| pub fn get_random_u8() -> u8_; | |
| } | |
| extern "C" { | |
| pub fn get_random_u16() -> u16_; | |
| } | |
| extern "C" { | |
| pub fn get_random_u32() -> u32_; | |
| } | |
| extern "C" { | |
| pub fn get_random_u64() -> u64_; | |
| } | |
| extern "C" { | |
| pub fn __get_random_u32_below(ceil: u32_) -> u32_; | |
| } | |
| extern "C" { | |
| pub fn random_init_early(command_line: *const core::ffi::c_char); | |
| } | |
| extern "C" { | |
| pub fn random_init(); | |
| } | |
| extern "C" { | |
| pub fn rng_is_initialized() -> bool_; | |
| } | |
| extern "C" { | |
| pub fn wait_for_random_bytes() -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn execute_with_initialized_rng(nb: *mut notifier_block) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn __do_once_start(done: *mut bool_, flags: *mut core::ffi::c_ulong) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn __do_once_done( | |
| done: *mut bool_, | |
| once_key: *mut static_key_true, | |
| flags: *mut core::ffi::c_ulong, | |
| mod_: *mut module, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __do_once_sleepable_start(done: *mut bool_) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn __do_once_sleepable_done( | |
| done: *mut bool_, | |
| once_key: *mut static_key_true, | |
| mod_: *mut module, | |
| ); | |
| } | |
| extern "C" { | |
| pub static mut pcpu_base_addr: *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub static mut pcpu_unit_offsets: *const core::ffi::c_ulong; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct pcpu_group_info { | |
| pub nr_units: core::ffi::c_int, | |
| pub base_offset: core::ffi::c_ulong, | |
| pub cpu_map: *mut core::ffi::c_uint, | |
| } | |
| impl Default for pcpu_group_info { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| pub struct pcpu_alloc_info { | |
| pub static_size: usize, | |
| pub reserved_size: usize, | |
| pub dyn_size: usize, | |
| pub unit_size: usize, | |
| pub atom_size: usize, | |
| pub alloc_size: usize, | |
| pub __ai_size: usize, | |
| pub nr_groups: core::ffi::c_int, | |
| pub groups: __IncompleteArrayField<pcpu_group_info>, | |
| } | |
| impl Default for pcpu_alloc_info { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub const pcpu_fc_PCPU_FC_AUTO: pcpu_fc = 0; | |
| pub const pcpu_fc_PCPU_FC_EMBED: pcpu_fc = 1; | |
| pub const pcpu_fc_PCPU_FC_PAGE: pcpu_fc = 2; | |
| pub const pcpu_fc_PCPU_FC_NR: pcpu_fc = 3; | |
| pub type pcpu_fc = core::ffi::c_uint; | |
| extern "C" { | |
| pub static pcpu_fc_names: [*const core::ffi::c_char; 3usize]; | |
| } | |
| extern "C" { | |
| pub static mut pcpu_chosen_fc: pcpu_fc; | |
| } | |
| pub type pcpu_fc_cpu_to_node_fn_t = | |
| ::core::option::Option<unsafe extern "C" fn(cpu: core::ffi::c_int) -> core::ffi::c_int>; | |
| pub type pcpu_fc_cpu_distance_fn_t = ::core::option::Option< | |
| unsafe extern "C" fn(from: core::ffi::c_uint, to: core::ffi::c_uint) -> core::ffi::c_int, | |
| >; | |
| extern "C" { | |
| pub fn pcpu_alloc_alloc_info( | |
| nr_groups: core::ffi::c_int, | |
| nr_units: core::ffi::c_int, | |
| ) -> *mut pcpu_alloc_info; | |
| } | |
| extern "C" { | |
| pub fn pcpu_free_alloc_info(ai: *mut pcpu_alloc_info); | |
| } | |
| extern "C" { | |
| pub fn pcpu_setup_first_chunk(ai: *const pcpu_alloc_info, base_addr: *mut core::ffi::c_void); | |
| } | |
| extern "C" { | |
| pub fn pcpu_embed_first_chunk( | |
| reserved_size: usize, | |
| dyn_size: usize, | |
| atom_size: usize, | |
| cpu_distance_fn: pcpu_fc_cpu_distance_fn_t, | |
| cpu_to_nd_fn: pcpu_fc_cpu_to_node_fn_t, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn __alloc_reserved_percpu(size: usize, align: usize) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn __is_kernel_percpu_address( | |
| addr: core::ffi::c_ulong, | |
| can_addr: *mut core::ffi::c_ulong, | |
| ) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn is_kernel_percpu_address(addr: core::ffi::c_ulong) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn setup_per_cpu_areas(); | |
| } | |
| extern "C" { | |
| pub fn __alloc_percpu_gfp(size: usize, align: usize, gfp: gfp_t) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn __alloc_percpu(size: usize, align: usize) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn free_percpu(__pdata: *mut core::ffi::c_void); | |
| } | |
| extern "C" { | |
| pub fn pcpu_alloc_size(__pdata: *mut core::ffi::c_void) -> usize; | |
| } | |
| extern "C" { | |
| pub fn per_cpu_ptr_to_phys(addr: *mut core::ffi::c_void) -> phys_addr_t; | |
| } | |
| extern "C" { | |
| pub fn pcpu_nr_pages() -> core::ffi::c_ulong; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct rnd_state { | |
| pub s1: __u32, | |
| pub s2: __u32, | |
| pub s3: __u32, | |
| pub s4: __u32, | |
| } | |
| extern "C" { | |
| pub fn prandom_u32_state(state: *mut rnd_state) -> u32_; | |
| } | |
| extern "C" { | |
| pub fn prandom_bytes_state(state: *mut rnd_state, buf: *mut core::ffi::c_void, nbytes: usize); | |
| } | |
| extern "C" { | |
| pub fn prandom_seed_full_state(pcpu_state: *mut rnd_state); | |
| } | |
| extern "C" { | |
| pub fn random_prepare_cpu(cpu: core::ffi::c_uint) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn random_online_cpu(cpu: core::ffi::c_uint) -> core::ffi::c_int; | |
| } | |
| pub const mitigation_state_SPECTRE_UNAFFECTED: mitigation_state = 0; | |
| pub const mitigation_state_SPECTRE_MITIGATED: mitigation_state = 1; | |
| pub const mitigation_state_SPECTRE_VULNERABLE: mitigation_state = 2; | |
| pub type mitigation_state = core::ffi::c_uint; | |
| pub const arm64_hyp_spectre_vector_HYP_VECTOR_DIRECT: arm64_hyp_spectre_vector = 0; | |
| pub const arm64_hyp_spectre_vector_HYP_VECTOR_SPECTRE_DIRECT: arm64_hyp_spectre_vector = 1; | |
| pub const arm64_hyp_spectre_vector_HYP_VECTOR_INDIRECT: arm64_hyp_spectre_vector = 2; | |
| pub const arm64_hyp_spectre_vector_HYP_VECTOR_SPECTRE_INDIRECT: arm64_hyp_spectre_vector = 3; | |
| pub type arm64_hyp_spectre_vector = core::ffi::c_uint; | |
| pub type bp_hardening_cb_t = ::core::option::Option<unsafe extern "C" fn()>; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct bp_hardening_data { | |
| pub slot: arm64_hyp_spectre_vector, | |
| pub fn_: bp_hardening_cb_t, | |
| } | |
| impl Default for bp_hardening_data { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub static mut bp_hardening_data: bp_hardening_data; | |
| } | |
| extern "C" { | |
| pub fn arm64_get_spectre_v2_state() -> mitigation_state; | |
| } | |
| extern "C" { | |
| pub fn has_spectre_v2(cap: *const arm64_cpu_capabilities, scope: core::ffi::c_int) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn spectre_v2_enable_mitigation(__unused: *const arm64_cpu_capabilities); | |
| } | |
| extern "C" { | |
| pub fn has_spectre_v3a(cap: *const arm64_cpu_capabilities, scope: core::ffi::c_int) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn spectre_v3a_enable_mitigation(__unused: *const arm64_cpu_capabilities); | |
| } | |
| extern "C" { | |
| pub fn arm64_get_spectre_v4_state() -> mitigation_state; | |
| } | |
| extern "C" { | |
| pub fn has_spectre_v4(cap: *const arm64_cpu_capabilities, scope: core::ffi::c_int) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn spectre_v4_enable_mitigation(__unused: *const arm64_cpu_capabilities); | |
| } | |
| extern "C" { | |
| pub fn spectre_v4_enable_task_mitigation(tsk: *mut task_struct); | |
| } | |
| extern "C" { | |
| pub fn arm64_get_meltdown_state() -> mitigation_state; | |
| } | |
| extern "C" { | |
| pub fn arm64_get_spectre_bhb_state() -> mitigation_state; | |
| } | |
| extern "C" { | |
| pub fn is_spectre_bhb_affected( | |
| entry: *const arm64_cpu_capabilities, | |
| scope: core::ffi::c_int, | |
| ) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn spectre_bhb_loop_affected(scope: core::ffi::c_int) -> u8_; | |
| } | |
| extern "C" { | |
| pub fn spectre_bhb_enable_mitigation(__unused: *const arm64_cpu_capabilities); | |
| } | |
| extern "C" { | |
| pub fn try_emulate_el1_ssbs(regs: *mut pt_regs, instr: u32_) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn spectre_v4_patch_fw_mitigation_enable( | |
| alt: *mut alt_instr, | |
| origptr: *mut __le32, | |
| updptr: *mut __le32, | |
| nr_inst: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn smccc_patch_fw_mitigation_conduit( | |
| alt: *mut alt_instr, | |
| origptr: *mut __le32, | |
| updptr: *mut __le32, | |
| nr_inst: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn spectre_bhb_patch_loop_mitigation_enable( | |
| alt: *mut alt_instr, | |
| origptr: *mut __le32, | |
| updptr: *mut __le32, | |
| nr_inst: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn spectre_bhb_patch_fw_mitigation_enabled( | |
| alt: *mut alt_instr, | |
| origptr: *mut __le32, | |
| updptr: *mut __le32, | |
| nr_inst: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn spectre_bhb_patch_loop_iter( | |
| alt: *mut alt_instr, | |
| origptr: *mut __le32, | |
| updptr: *mut __le32, | |
| nr_inst: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn spectre_bhb_patch_wa3( | |
| alt: *mut alt_instr, | |
| origptr: *mut __le32, | |
| updptr: *mut __le32, | |
| nr_inst: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn spectre_bhb_patch_clearbhb( | |
| alt: *mut alt_instr, | |
| origptr: *mut __le32, | |
| updptr: *mut __le32, | |
| nr_inst: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub static mut arm64_dma_phys_limit: phys_addr_t; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct debug_info {} | |
| pub const vec_type_ARM64_VEC_SVE: vec_type = 0; | |
| pub const vec_type_ARM64_VEC_SME: vec_type = 1; | |
| pub const vec_type_ARM64_VEC_MAX: vec_type = 2; | |
| pub type vec_type = core::ffi::c_uint; | |
| pub const fp_type_FP_STATE_CURRENT: fp_type = 0; | |
| pub const fp_type_FP_STATE_FPSIMD: fp_type = 1; | |
| pub const fp_type_FP_STATE_SVE: fp_type = 2; | |
| pub type fp_type = core::ffi::c_uint; | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct cpu_context { | |
| pub x19: core::ffi::c_ulong, | |
| pub x20: core::ffi::c_ulong, | |
| pub x21: core::ffi::c_ulong, | |
| pub x22: core::ffi::c_ulong, | |
| pub x23: core::ffi::c_ulong, | |
| pub x24: core::ffi::c_ulong, | |
| pub x25: core::ffi::c_ulong, | |
| pub x26: core::ffi::c_ulong, | |
| pub x27: core::ffi::c_ulong, | |
| pub x28: core::ffi::c_ulong, | |
| pub fp: core::ffi::c_ulong, | |
| pub sp: core::ffi::c_ulong, | |
| pub pc: core::ffi::c_ulong, | |
| } | |
| #[repr(C)] | |
| #[repr(align(16))] | |
| #[derive(Copy, Clone)] | |
| pub struct thread_struct { | |
| pub cpu_context: cpu_context, | |
| pub __bindgen_padding_0: u64, | |
| pub uw: thread_struct__bindgen_ty_1, | |
| pub fp_type: fp_type, | |
| pub fpsimd_cpu: core::ffi::c_uint, | |
| pub sve_state: *mut core::ffi::c_void, | |
| pub sme_state: *mut core::ffi::c_void, | |
| pub vl: [core::ffi::c_uint; 2usize], | |
| pub vl_onexec: [core::ffi::c_uint; 2usize], | |
| pub fault_address: core::ffi::c_ulong, | |
| pub fault_code: core::ffi::c_ulong, | |
| pub debug: debug_info, | |
| pub sctlr_user: u64_, | |
| pub svcr: u64_, | |
| pub tpidr2_el0: u64_, | |
| } | |
| #[repr(C)] | |
| #[repr(align(16))] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct thread_struct__bindgen_ty_1 { | |
| pub tp_value: core::ffi::c_ulong, | |
| pub tp2_value: core::ffi::c_ulong, | |
| pub fpsimd_state: user_fpsimd_state, | |
| } | |
| impl Default for thread_struct { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn task_get_vl(task: *const task_struct, type_: vec_type) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn task_set_vl(task: *mut task_struct, type_: vec_type, vl: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn task_set_vl_onexec(task: *mut task_struct, type_: vec_type, vl: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn task_get_vl_onexec(task: *const task_struct, type_: vec_type) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn tls_preserve_current_state(); | |
| } | |
| extern "C" { | |
| pub fn __get_wchan(p: *mut task_struct) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn update_sctlr_el1(sctlr: u64_); | |
| } | |
| extern "C" { | |
| pub fn cpu_switch_to(prev: *mut task_struct, next: *mut task_struct) -> *mut task_struct; | |
| } | |
| extern "C" { | |
| pub static mut signal_minsigstksz: core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn minsigstksz_setup(); | |
| } | |
| #[repr(C)] | |
| #[repr(align(16))] | |
| #[derive(Copy, Clone)] | |
| pub struct sigcontext { | |
| pub fault_address: __u64, | |
| pub regs: [__u64; 31usize], | |
| pub sp: __u64, | |
| pub pc: __u64, | |
| pub pstate: __u64, | |
| pub __bindgen_padding_0: [u8; 8usize], | |
| pub __reserved: [__u8; 4096usize], | |
| } | |
| impl Default for sigcontext { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct _aarch64_ctx { | |
| pub magic: __u32, | |
| pub size: __u32, | |
| } | |
| #[repr(C)] | |
| #[repr(align(16))] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct fpsimd_context { | |
| pub head: _aarch64_ctx, | |
| pub fpsr: __u32, | |
| pub fpcr: __u32, | |
| pub vregs: [__uint128_t; 32usize], | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct esr_context { | |
| pub head: _aarch64_ctx, | |
| pub esr: __u64, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct extra_context { | |
| pub head: _aarch64_ctx, | |
| pub datap: __u64, | |
| pub size: __u32, | |
| pub __reserved: [__u32; 3usize], | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct sve_context { | |
| pub head: _aarch64_ctx, | |
| pub vl: __u16, | |
| pub flags: __u16, | |
| pub __reserved: [__u16; 2usize], | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct tpidr2_context { | |
| pub head: _aarch64_ctx, | |
| pub tpidr2: __u64, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct za_context { | |
| pub head: _aarch64_ctx, | |
| pub vl: __u16, | |
| pub __reserved: [__u16; 3usize], | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct zt_context { | |
| pub head: _aarch64_ctx, | |
| pub nregs: __u16, | |
| pub __reserved: [__u16; 3usize], | |
| } | |
| extern "C" { | |
| pub fn fpsimd_save_state(state: *mut user_fpsimd_state); | |
| } | |
| extern "C" { | |
| pub fn fpsimd_load_state(state: *mut user_fpsimd_state); | |
| } | |
| extern "C" { | |
| pub fn fpsimd_thread_switch(next: *mut task_struct); | |
| } | |
| extern "C" { | |
| pub fn fpsimd_flush_thread(); | |
| } | |
| extern "C" { | |
| pub fn fpsimd_signal_preserve_current_state(); | |
| } | |
| extern "C" { | |
| pub fn fpsimd_preserve_current_state(); | |
| } | |
| extern "C" { | |
| pub fn fpsimd_restore_current_state(); | |
| } | |
| extern "C" { | |
| pub fn fpsimd_update_current_state(state: *const user_fpsimd_state); | |
| } | |
| extern "C" { | |
| pub fn fpsimd_kvm_prepare(); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct cpu_fp_state { | |
| pub st: *mut user_fpsimd_state, | |
| pub sve_state: *mut core::ffi::c_void, | |
| pub sme_state: *mut core::ffi::c_void, | |
| pub svcr: *mut u64_, | |
| pub sve_vl: core::ffi::c_uint, | |
| pub sme_vl: core::ffi::c_uint, | |
| pub fp_type: *mut fp_type, | |
| pub to_save: fp_type, | |
| } | |
| impl Default for cpu_fp_state { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn fpsimd_bind_state_to_cpu(fp_state: *mut cpu_fp_state); | |
| } | |
| extern "C" { | |
| pub fn fpsimd_flush_task_state(target: *mut task_struct); | |
| } | |
| extern "C" { | |
| pub fn fpsimd_save_and_flush_cpu_state(); | |
| } | |
| extern "C" { | |
| pub fn sve_save_state( | |
| state: *mut core::ffi::c_void, | |
| pfpsr: *mut u32_, | |
| save_ffr: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn sve_load_state( | |
| state: *const core::ffi::c_void, | |
| pfpsr: *const u32_, | |
| restore_ffr: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn sve_flush_live(flush_ffr: bool_, vq_minus_1: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn sve_get_vl() -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn sve_set_vq(vq_minus_1: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn sme_set_vq(vq_minus_1: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn sme_save_state(state: *mut core::ffi::c_void, zt: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn sme_load_state(state: *const core::ffi::c_void, zt: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn cpu_enable_fpsimd(__unused: *const arm64_cpu_capabilities); | |
| } | |
| extern "C" { | |
| pub fn cpu_enable_sve(__unused: *const arm64_cpu_capabilities); | |
| } | |
| extern "C" { | |
| pub fn cpu_enable_sme(__unused: *const arm64_cpu_capabilities); | |
| } | |
| extern "C" { | |
| pub fn cpu_enable_sme2(__unused: *const arm64_cpu_capabilities); | |
| } | |
| extern "C" { | |
| pub fn cpu_enable_fa64(__unused: *const arm64_cpu_capabilities); | |
| } | |
| extern "C" { | |
| pub fn read_smcr_features() -> u64_; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct vl_info { | |
| pub type_: vec_type, | |
| pub name: *const core::ffi::c_char, | |
| pub min_vl: core::ffi::c_int, | |
| pub max_vl: core::ffi::c_int, | |
| pub max_virtualisable_vl: core::ffi::c_int, | |
| pub vq_map: [core::ffi::c_ulong; 8usize], | |
| pub vq_partial_map: [core::ffi::c_ulong; 8usize], | |
| } | |
| impl Default for vl_info { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn __efi_fpsimd_begin(); | |
| } | |
| extern "C" { | |
| pub fn __efi_fpsimd_end(); | |
| } | |
| extern "C" { | |
| pub fn queued_read_lock_slowpath(lock: *mut qrwlock); | |
| } | |
| extern "C" { | |
| pub fn queued_write_lock_slowpath(lock: *mut qrwlock); | |
| } | |
| extern "C" { | |
| pub fn __raw_spin_lock_init( | |
| lock: *mut raw_spinlock_t, | |
| name: *const core::ffi::c_char, | |
| key: *mut lock_class_key, | |
| inner: core::ffi::c_short, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn do_raw_spin_lock(lock: *mut raw_spinlock_t); | |
| } | |
| extern "C" { | |
| pub fn do_raw_spin_trylock(lock: *mut raw_spinlock_t) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn do_raw_spin_unlock(lock: *mut raw_spinlock_t); | |
| } | |
| extern "C" { | |
| pub fn __rwlock_init( | |
| lock: *mut rwlock_t, | |
| name: *const core::ffi::c_char, | |
| key: *mut lock_class_key, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn do_raw_read_lock(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn do_raw_read_trylock(lock: *mut rwlock_t) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn do_raw_read_unlock(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn do_raw_write_lock(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn do_raw_write_trylock(lock: *mut rwlock_t) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn do_raw_write_unlock(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn in_lock_functions(addr: core::ffi::c_ulong) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn _raw_spin_lock(lock: *mut raw_spinlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_spin_lock_nested(lock: *mut raw_spinlock_t, subclass: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn _raw_spin_lock_nest_lock(lock: *mut raw_spinlock_t, map: *mut lockdep_map); | |
| } | |
| extern "C" { | |
| pub fn _raw_spin_lock_bh(lock: *mut raw_spinlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_spin_lock_irq(lock: *mut raw_spinlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_spin_lock_irqsave(lock: *mut raw_spinlock_t) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn _raw_spin_lock_irqsave_nested( | |
| lock: *mut raw_spinlock_t, | |
| subclass: core::ffi::c_int, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn _raw_spin_trylock(lock: *mut raw_spinlock_t) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn _raw_spin_trylock_bh(lock: *mut raw_spinlock_t) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn _raw_spin_unlock(lock: *mut raw_spinlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_spin_unlock_bh(lock: *mut raw_spinlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_spin_unlock_irq(lock: *mut raw_spinlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_spin_unlock_irqrestore(lock: *mut raw_spinlock_t, flags: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn _raw_read_lock(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_write_lock(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_write_lock_nested(lock: *mut rwlock_t, subclass: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn _raw_read_lock_bh(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_write_lock_bh(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_read_lock_irq(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_write_lock_irq(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_read_lock_irqsave(lock: *mut rwlock_t) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn _raw_write_lock_irqsave(lock: *mut rwlock_t) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn _raw_read_trylock(lock: *mut rwlock_t) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn _raw_write_trylock(lock: *mut rwlock_t) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn _raw_read_unlock(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_write_unlock(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_read_unlock_bh(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_write_unlock_bh(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_read_unlock_irq(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_write_unlock_irq(lock: *mut rwlock_t); | |
| } | |
| extern "C" { | |
| pub fn _raw_read_unlock_irqrestore(lock: *mut rwlock_t, flags: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn _raw_write_unlock_irqrestore(lock: *mut rwlock_t, flags: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn _atomic_dec_and_lock(atomic: *mut atomic_t, lock: *mut spinlock_t) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn _atomic_dec_and_lock_irqsave( | |
| atomic: *mut atomic_t, | |
| lock: *mut spinlock_t, | |
| flags: *mut core::ffi::c_ulong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn _atomic_dec_and_raw_lock( | |
| atomic: *mut atomic_t, | |
| lock: *mut raw_spinlock_t, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn _atomic_dec_and_raw_lock_irqsave( | |
| atomic: *mut atomic_t, | |
| lock: *mut raw_spinlock_t, | |
| flags: *mut core::ffi::c_ulong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn __alloc_bucket_spinlocks( | |
| locks: *mut *mut spinlock_t, | |
| lock_mask: *mut core::ffi::c_uint, | |
| max_size: usize, | |
| cpu_mult: core::ffi::c_uint, | |
| gfp: gfp_t, | |
| name: *const core::ffi::c_char, | |
| key: *mut lock_class_key, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn free_bucket_spinlocks(locks: *mut spinlock_t); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct class_raw_spinlock_t { | |
| pub lock: *mut raw_spinlock_t, | |
| } | |
| impl Default for class_raw_spinlock_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct class_raw_spinlock_nested_t { | |
| pub lock: *mut raw_spinlock_t, | |
| } | |
| impl Default for class_raw_spinlock_nested_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct class_raw_spinlock_irq_t { | |
| pub lock: *mut raw_spinlock_t, | |
| } | |
| impl Default for class_raw_spinlock_irq_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct class_raw_spinlock_irqsave_t { | |
| pub lock: *mut raw_spinlock_t, | |
| pub flags: core::ffi::c_ulong, | |
| } | |
| impl Default for class_raw_spinlock_irqsave_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct class_spinlock_t { | |
| pub lock: *mut spinlock_t, | |
| } | |
| impl Default for class_spinlock_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct class_spinlock_irq_t { | |
| pub lock: *mut spinlock_t, | |
| } | |
| impl Default for class_spinlock_irq_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct class_spinlock_irqsave_t { | |
| pub lock: *mut spinlock_t, | |
| pub flags: core::ffi::c_ulong, | |
| } | |
| impl Default for class_spinlock_irqsave_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct refcount_struct { | |
| pub refs: atomic_t, | |
| } | |
| pub type refcount_t = refcount_struct; | |
| pub const refcount_saturation_type_REFCOUNT_ADD_NOT_ZERO_OVF: refcount_saturation_type = 0; | |
| pub const refcount_saturation_type_REFCOUNT_ADD_OVF: refcount_saturation_type = 1; | |
| pub const refcount_saturation_type_REFCOUNT_ADD_UAF: refcount_saturation_type = 2; | |
| pub const refcount_saturation_type_REFCOUNT_SUB_UAF: refcount_saturation_type = 3; | |
| pub const refcount_saturation_type_REFCOUNT_DEC_LEAK: refcount_saturation_type = 4; | |
| pub type refcount_saturation_type = core::ffi::c_uint; | |
| extern "C" { | |
| pub fn refcount_warn_saturate(r: *mut refcount_t, t: refcount_saturation_type); | |
| } | |
| extern "C" { | |
| pub fn refcount_dec_if_one(r: *mut refcount_t) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn refcount_dec_not_one(r: *mut refcount_t) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn refcount_dec_and_mutex_lock(r: *mut refcount_t, lock: *mut mutex) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn refcount_dec_and_lock(r: *mut refcount_t, lock: *mut spinlock_t) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn refcount_dec_and_lock_irqsave( | |
| r: *mut refcount_t, | |
| lock: *mut spinlock_t, | |
| flags: *mut core::ffi::c_ulong, | |
| ) -> bool_; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct kref { | |
| pub refcount: refcount_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct stat { | |
| pub st_dev: core::ffi::c_ulong, | |
| pub st_ino: core::ffi::c_ulong, | |
| pub st_mode: core::ffi::c_uint, | |
| pub st_nlink: core::ffi::c_uint, | |
| pub st_uid: core::ffi::c_uint, | |
| pub st_gid: core::ffi::c_uint, | |
| pub st_rdev: core::ffi::c_ulong, | |
| pub __pad1: core::ffi::c_ulong, | |
| pub st_size: core::ffi::c_long, | |
| pub st_blksize: core::ffi::c_int, | |
| pub __pad2: core::ffi::c_int, | |
| pub st_blocks: core::ffi::c_long, | |
| pub st_atime: core::ffi::c_long, | |
| pub st_atime_nsec: core::ffi::c_ulong, | |
| pub st_mtime: core::ffi::c_long, | |
| pub st_mtime_nsec: core::ffi::c_ulong, | |
| pub st_ctime: core::ffi::c_long, | |
| pub st_ctime_nsec: core::ffi::c_ulong, | |
| pub __unused4: core::ffi::c_uint, | |
| pub __unused5: core::ffi::c_uint, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct statx_timestamp { | |
| pub tv_sec: __s64, | |
| pub tv_nsec: __u32, | |
| pub __reserved: __s32, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct statx { | |
| pub stx_mask: __u32, | |
| pub stx_blksize: __u32, | |
| pub stx_attributes: __u64, | |
| pub stx_nlink: __u32, | |
| pub stx_uid: __u32, | |
| pub stx_gid: __u32, | |
| pub stx_mode: __u16, | |
| pub __spare0: [__u16; 1usize], | |
| pub stx_ino: __u64, | |
| pub stx_size: __u64, | |
| pub stx_blocks: __u64, | |
| pub stx_attributes_mask: __u64, | |
| pub stx_atime: statx_timestamp, | |
| pub stx_btime: statx_timestamp, | |
| pub stx_ctime: statx_timestamp, | |
| pub stx_mtime: statx_timestamp, | |
| pub stx_rdev_major: __u32, | |
| pub stx_rdev_minor: __u32, | |
| pub stx_dev_major: __u32, | |
| pub stx_dev_minor: __u32, | |
| pub stx_mnt_id: __u64, | |
| pub stx_dio_mem_align: __u32, | |
| pub stx_dio_offset_align: __u32, | |
| pub __spare3: [__u64; 12usize], | |
| } | |
| extern "C" { | |
| pub static mut sys_tz: timezone; | |
| } | |
| extern "C" { | |
| pub fn get_timespec64(ts: *mut timespec64, uts: *const __kernel_timespec) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn put_timespec64(ts: *const timespec64, uts: *mut __kernel_timespec) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn get_itimerspec64( | |
| it: *mut itimerspec64, | |
| uit: *const __kernel_itimerspec, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn put_itimerspec64( | |
| it: *const itimerspec64, | |
| uit: *mut __kernel_itimerspec, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mktime64( | |
| year: core::ffi::c_uint, | |
| mon: core::ffi::c_uint, | |
| day: core::ffi::c_uint, | |
| hour: core::ffi::c_uint, | |
| min: core::ffi::c_uint, | |
| sec: core::ffi::c_uint, | |
| ) -> time64_t; | |
| } | |
| extern "C" { | |
| pub fn clear_itimer(); | |
| } | |
| extern "C" { | |
| pub fn do_utimes( | |
| dfd: core::ffi::c_int, | |
| filename: *const core::ffi::c_char, | |
| times: *mut timespec64, | |
| flags: core::ffi::c_int, | |
| ) -> core::ffi::c_long; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct tm { | |
| pub tm_sec: core::ffi::c_int, | |
| pub tm_min: core::ffi::c_int, | |
| pub tm_hour: core::ffi::c_int, | |
| pub tm_mday: core::ffi::c_int, | |
| pub tm_mon: core::ffi::c_int, | |
| pub tm_year: core::ffi::c_long, | |
| pub tm_wday: core::ffi::c_int, | |
| pub tm_yday: core::ffi::c_int, | |
| } | |
| extern "C" { | |
| pub fn time64_to_tm(totalsecs: time64_t, offset: core::ffi::c_int, result: *mut tm); | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct __kernel_timex_timeval { | |
| pub tv_sec: __kernel_time64_t, | |
| pub tv_usec: core::ffi::c_longlong, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct __kernel_timex { | |
| pub modes: core::ffi::c_uint, | |
| pub _bitfield_align_1: [u8; 0], | |
| pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize]>, | |
| pub offset: core::ffi::c_longlong, | |
| pub freq: core::ffi::c_longlong, | |
| pub maxerror: core::ffi::c_longlong, | |
| pub esterror: core::ffi::c_longlong, | |
| pub status: core::ffi::c_int, | |
| pub _bitfield_align_2: [u8; 0], | |
| pub _bitfield_2: __BindgenBitfieldUnit<[u8; 4usize]>, | |
| pub constant: core::ffi::c_longlong, | |
| pub precision: core::ffi::c_longlong, | |
| pub tolerance: core::ffi::c_longlong, | |
| pub time: __kernel_timex_timeval, | |
| pub tick: core::ffi::c_longlong, | |
| pub ppsfreq: core::ffi::c_longlong, | |
| pub jitter: core::ffi::c_longlong, | |
| pub shift: core::ffi::c_int, | |
| pub _bitfield_align_3: [u8; 0], | |
| pub _bitfield_3: __BindgenBitfieldUnit<[u8; 4usize]>, | |
| pub stabil: core::ffi::c_longlong, | |
| pub jitcnt: core::ffi::c_longlong, | |
| pub calcnt: core::ffi::c_longlong, | |
| pub errcnt: core::ffi::c_longlong, | |
| pub stbcnt: core::ffi::c_longlong, | |
| pub tai: core::ffi::c_int, | |
| pub _bitfield_align_4: [u8; 0], | |
| pub _bitfield_4: __BindgenBitfieldUnit<[u8; 44usize]>, | |
| } | |
| impl Default for __kernel_timex { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl __kernel_timex { | |
| #[inline] | |
| pub fn new_bitfield_1() -> __BindgenBitfieldUnit<[u8; 4usize]> { | |
| let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize]> = Default::default(); | |
| __bindgen_bitfield_unit | |
| } | |
| #[inline] | |
| pub fn new_bitfield_2() -> __BindgenBitfieldUnit<[u8; 4usize]> { | |
| let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize]> = Default::default(); | |
| __bindgen_bitfield_unit | |
| } | |
| #[inline] | |
| pub fn new_bitfield_3() -> __BindgenBitfieldUnit<[u8; 4usize]> { | |
| let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize]> = Default::default(); | |
| __bindgen_bitfield_unit | |
| } | |
| } | |
| extern "C" { | |
| pub fn random_get_entropy_fallback() -> core::ffi::c_ulong; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct cyclecounter { | |
| pub read: ::core::option::Option<unsafe extern "C" fn(cc: *const cyclecounter) -> u64_>, | |
| pub mask: u64_, | |
| pub mult: u32_, | |
| pub shift: u32_, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct timecounter { | |
| pub cc: *const cyclecounter, | |
| pub cycle_last: u64_, | |
| pub nsec: u64_, | |
| pub mask: u64_, | |
| pub frac: u64_, | |
| } | |
| impl Default for timecounter { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn timecounter_init(tc: *mut timecounter, cc: *const cyclecounter, start_tstamp: u64_); | |
| } | |
| extern "C" { | |
| pub fn timecounter_read(tc: *mut timecounter) -> u64_; | |
| } | |
| extern "C" { | |
| pub fn timecounter_cyc2time(tc: *const timecounter, cycle_tstamp: u64_) -> u64_; | |
| } | |
| pub const arch_timer_reg_ARCH_TIMER_REG_CTRL: arch_timer_reg = 0; | |
| pub const arch_timer_reg_ARCH_TIMER_REG_CVAL: arch_timer_reg = 1; | |
| pub type arch_timer_reg = core::ffi::c_uint; | |
| pub const arch_timer_ppi_nr_ARCH_TIMER_PHYS_SECURE_PPI: arch_timer_ppi_nr = 0; | |
| pub const arch_timer_ppi_nr_ARCH_TIMER_PHYS_NONSECURE_PPI: arch_timer_ppi_nr = 1; | |
| pub const arch_timer_ppi_nr_ARCH_TIMER_VIRT_PPI: arch_timer_ppi_nr = 2; | |
| pub const arch_timer_ppi_nr_ARCH_TIMER_HYP_PPI: arch_timer_ppi_nr = 3; | |
| pub const arch_timer_ppi_nr_ARCH_TIMER_HYP_VIRT_PPI: arch_timer_ppi_nr = 4; | |
| pub const arch_timer_ppi_nr_ARCH_TIMER_MAX_TIMER_PPI: arch_timer_ppi_nr = 5; | |
| pub type arch_timer_ppi_nr = core::ffi::c_uint; | |
| pub const arch_timer_spi_nr_ARCH_TIMER_PHYS_SPI: arch_timer_spi_nr = 0; | |
| pub const arch_timer_spi_nr_ARCH_TIMER_VIRT_SPI: arch_timer_spi_nr = 1; | |
| pub const arch_timer_spi_nr_ARCH_TIMER_MAX_TIMER_SPI: arch_timer_spi_nr = 2; | |
| pub type arch_timer_spi_nr = core::ffi::c_uint; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct arch_timer_kvm_info { | |
| pub timecounter: timecounter, | |
| pub virtual_irq: core::ffi::c_int, | |
| pub physical_irq: core::ffi::c_int, | |
| } | |
| impl Default for arch_timer_kvm_info { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct arch_timer_mem_frame { | |
| pub valid: bool_, | |
| pub cntbase: phys_addr_t, | |
| pub size: usize, | |
| pub phys_irq: core::ffi::c_int, | |
| pub virt_irq: core::ffi::c_int, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct arch_timer_mem { | |
| pub cntctlbase: phys_addr_t, | |
| pub size: usize, | |
| pub frame: [arch_timer_mem_frame; 8usize], | |
| } | |
| extern "C" { | |
| pub fn arch_timer_get_rate() -> u32_; | |
| } | |
| extern "C" { | |
| pub static mut arch_timer_read_counter: ::core::option::Option<unsafe extern "C" fn() -> u64_>; | |
| } | |
| extern "C" { | |
| pub fn arch_timer_get_kvm_info() -> *mut arch_timer_kvm_info; | |
| } | |
| extern "C" { | |
| pub fn arch_timer_evtstrm_available() -> bool_; | |
| } | |
| pub const arch_timer_erratum_match_type_ate_match_dt: arch_timer_erratum_match_type = 0; | |
| pub const arch_timer_erratum_match_type_ate_match_local_cap_id: arch_timer_erratum_match_type = 1; | |
| pub const arch_timer_erratum_match_type_ate_match_acpi_oem_info: arch_timer_erratum_match_type = 2; | |
| pub type arch_timer_erratum_match_type = core::ffi::c_uint; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct clock_event_device { | |
| _unused: [u8; 0], | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct arch_timer_erratum_workaround { | |
| pub match_type: arch_timer_erratum_match_type, | |
| pub id: *const core::ffi::c_void, | |
| pub desc: *const core::ffi::c_char, | |
| pub read_cntpct_el0: ::core::option::Option<unsafe extern "C" fn() -> u64_>, | |
| pub read_cntvct_el0: ::core::option::Option<unsafe extern "C" fn() -> u64_>, | |
| pub set_next_event_phys: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: core::ffi::c_ulong, | |
| arg2: *mut clock_event_device, | |
| ) -> core::ffi::c_int, | |
| >, | |
| pub set_next_event_virt: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| arg1: core::ffi::c_ulong, | |
| arg2: *mut clock_event_device, | |
| ) -> core::ffi::c_int, | |
| >, | |
| pub disable_compat_vdso: bool_, | |
| } | |
| impl Default for arch_timer_erratum_workaround { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub static mut timer_unstable_counter_workaround: *const arch_timer_erratum_workaround; | |
| } | |
| pub type cycles_t = core::ffi::c_ulong; | |
| extern "C" { | |
| pub static mut tick_usec: core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub static mut tick_nsec: core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn do_adjtimex(arg1: *mut __kernel_timex) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn do_clock_adjtime(which_clock: clockid_t, ktx: *mut __kernel_timex) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn hardpps(arg1: *const timespec64, arg2: *const timespec64); | |
| } | |
| extern "C" { | |
| pub fn read_current_timer(timer_val: *mut core::ffi::c_ulong) -> core::ffi::c_int; | |
| } | |
| pub type old_time32_t = s32; | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct old_timespec32 { | |
| pub tv_sec: old_time32_t, | |
| pub tv_nsec: s32, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct old_timeval32 { | |
| pub tv_sec: old_time32_t, | |
| pub tv_usec: s32, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct old_itimerspec32 { | |
| pub it_interval: old_timespec32, | |
| pub it_value: old_timespec32, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct old_utimbuf32 { | |
| pub actime: old_time32_t, | |
| pub modtime: old_time32_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct old_timex32 { | |
| pub modes: u32_, | |
| pub offset: s32, | |
| pub freq: s32, | |
| pub maxerror: s32, | |
| pub esterror: s32, | |
| pub status: s32, | |
| pub constant: s32, | |
| pub precision: s32, | |
| pub tolerance: s32, | |
| pub time: old_timeval32, | |
| pub tick: s32, | |
| pub ppsfreq: s32, | |
| pub jitter: s32, | |
| pub shift: s32, | |
| pub stabil: s32, | |
| pub jitcnt: s32, | |
| pub calcnt: s32, | |
| pub errcnt: s32, | |
| pub stbcnt: s32, | |
| pub tai: s32, | |
| pub _bitfield_align_1: [u8; 0], | |
| pub _bitfield_1: __BindgenBitfieldUnit<[u8; 44usize]>, | |
| } | |
| impl Default for old_timex32 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn get_old_timespec32( | |
| arg1: *mut timespec64, | |
| arg2: *const core::ffi::c_void, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn put_old_timespec32( | |
| arg1: *const timespec64, | |
| arg2: *mut core::ffi::c_void, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn get_old_itimerspec32( | |
| its: *mut itimerspec64, | |
| uits: *const old_itimerspec32, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn put_old_itimerspec32( | |
| its: *const itimerspec64, | |
| uits: *mut old_itimerspec32, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn get_old_timex32(arg1: *mut __kernel_timex, arg2: *const old_timex32) | |
| -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn put_old_timex32(arg1: *mut old_timex32, arg2: *const __kernel_timex) | |
| -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn ns_to_kernel_old_timeval(nsec: s64) -> __kernel_old_timeval; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct timens_offset { | |
| pub sec: s64, | |
| pub nsec: u64_, | |
| } | |
| extern "C" { | |
| pub static mut overflowuid: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut overflowgid: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn __bad_uid(); | |
| } | |
| extern "C" { | |
| pub fn __bad_gid(); | |
| } | |
| extern "C" { | |
| pub static mut fs_overflowuid: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut fs_overflowgid: core::ffi::c_int; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct user_namespace { | |
| _unused: [u8; 0], | |
| } | |
| extern "C" { | |
| pub static mut init_user_ns: user_namespace; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct kuid_t { | |
| pub val: uid_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct kgid_t { | |
| pub val: gid_t, | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct kstat { | |
| pub result_mask: u32_, | |
| pub mode: umode_t, | |
| pub nlink: core::ffi::c_uint, | |
| pub blksize: u32, | |
| pub attributes: u64_, | |
| pub attributes_mask: u64_, | |
| pub ino: u64_, | |
| pub dev: dev_t, | |
| pub rdev: dev_t, | |
| pub uid: kuid_t, | |
| pub gid: kgid_t, | |
| pub size: loff_t, | |
| pub atime: timespec64, | |
| pub mtime: timespec64, | |
| pub ctime: timespec64, | |
| pub btime: timespec64, | |
| pub blocks: u64_, | |
| pub mnt_id: u64_, | |
| pub dio_mem_align: u32_, | |
| pub dio_offset_align: u32_, | |
| pub change_cookie: u64_, | |
| } | |
| extern "C" { | |
| pub fn build_id_parse( | |
| vma: *mut vm_area_struct, | |
| build_id: *mut core::ffi::c_uchar, | |
| size: *mut __u32, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn build_id_parse_buf( | |
| buf: *const core::ffi::c_void, | |
| build_id: *mut core::ffi::c_uchar, | |
| buf_size: u32_, | |
| ) -> core::ffi::c_int; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct hlist_nulls_head { | |
| pub first: *mut hlist_nulls_node, | |
| } | |
| impl Default for hlist_nulls_head { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct hlist_nulls_node { | |
| pub next: *mut hlist_nulls_node, | |
| pub pprev: *mut *mut hlist_nulls_node, | |
| } | |
| impl Default for hlist_nulls_node { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type wait_queue_entry_t = wait_queue_entry; | |
| pub type wait_queue_func_t = ::core::option::Option< | |
| unsafe extern "C" fn( | |
| wq_entry: *mut wait_queue_entry, | |
| mode: core::ffi::c_uint, | |
| flags: core::ffi::c_int, | |
| key: *mut core::ffi::c_void, | |
| ) -> core::ffi::c_int, | |
| >; | |
| extern "C" { | |
| pub fn default_wake_function( | |
| wq_entry: *mut wait_queue_entry, | |
| mode: core::ffi::c_uint, | |
| flags: core::ffi::c_int, | |
| key: *mut core::ffi::c_void, | |
| ) -> core::ffi::c_int; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct wait_queue_entry { | |
| pub flags: core::ffi::c_uint, | |
| pub private: *mut core::ffi::c_void, | |
| pub func: wait_queue_func_t, | |
| pub entry: list_head, | |
| } | |
| impl Default for wait_queue_entry { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct wait_queue_head { | |
| pub lock: spinlock_t, | |
| pub head: list_head, | |
| } | |
| impl Default for wait_queue_head { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type wait_queue_head_t = wait_queue_head; | |
| extern "C" { | |
| pub fn __init_waitqueue_head( | |
| wq_head: *mut wait_queue_head, | |
| name: *const core::ffi::c_char, | |
| arg1: *mut lock_class_key, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn add_wait_queue(wq_head: *mut wait_queue_head, wq_entry: *mut wait_queue_entry); | |
| } | |
| extern "C" { | |
| pub fn add_wait_queue_exclusive(wq_head: *mut wait_queue_head, wq_entry: *mut wait_queue_entry); | |
| } | |
| extern "C" { | |
| pub fn add_wait_queue_priority(wq_head: *mut wait_queue_head, wq_entry: *mut wait_queue_entry); | |
| } | |
| extern "C" { | |
| pub fn remove_wait_queue(wq_head: *mut wait_queue_head, wq_entry: *mut wait_queue_entry); | |
| } | |
| extern "C" { | |
| pub fn __wake_up( | |
| wq_head: *mut wait_queue_head, | |
| mode: core::ffi::c_uint, | |
| nr: core::ffi::c_int, | |
| key: *mut core::ffi::c_void, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn __wake_up_on_current_cpu( | |
| wq_head: *mut wait_queue_head, | |
| mode: core::ffi::c_uint, | |
| key: *mut core::ffi::c_void, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __wake_up_locked_key( | |
| wq_head: *mut wait_queue_head, | |
| mode: core::ffi::c_uint, | |
| key: *mut core::ffi::c_void, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __wake_up_sync_key( | |
| wq_head: *mut wait_queue_head, | |
| mode: core::ffi::c_uint, | |
| key: *mut core::ffi::c_void, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __wake_up_locked_sync_key( | |
| wq_head: *mut wait_queue_head, | |
| mode: core::ffi::c_uint, | |
| key: *mut core::ffi::c_void, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __wake_up_locked( | |
| wq_head: *mut wait_queue_head, | |
| mode: core::ffi::c_uint, | |
| nr: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn __wake_up_sync(wq_head: *mut wait_queue_head, mode: core::ffi::c_uint); | |
| } | |
| extern "C" { | |
| pub fn __wake_up_pollfree(wq_head: *mut wait_queue_head); | |
| } | |
| extern "C" { | |
| pub fn init_wait_entry(wq_entry: *mut wait_queue_entry, flags: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn do_wait_intr( | |
| arg1: *mut wait_queue_head_t, | |
| arg2: *mut wait_queue_entry_t, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn do_wait_intr_irq( | |
| arg1: *mut wait_queue_head_t, | |
| arg2: *mut wait_queue_entry_t, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn prepare_to_wait( | |
| wq_head: *mut wait_queue_head, | |
| wq_entry: *mut wait_queue_entry, | |
| state: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn prepare_to_wait_exclusive( | |
| wq_head: *mut wait_queue_head, | |
| wq_entry: *mut wait_queue_entry, | |
| state: core::ffi::c_int, | |
| ) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn prepare_to_wait_event( | |
| wq_head: *mut wait_queue_head, | |
| wq_entry: *mut wait_queue_entry, | |
| state: core::ffi::c_int, | |
| ) -> core::ffi::c_long; | |
| } | |
| extern "C" { | |
| pub fn finish_wait(wq_head: *mut wait_queue_head, wq_entry: *mut wait_queue_entry); | |
| } | |
| extern "C" { | |
| pub fn wait_woken( | |
| wq_entry: *mut wait_queue_entry, | |
| mode: core::ffi::c_uint, | |
| timeout: core::ffi::c_long, | |
| ) -> core::ffi::c_long; | |
| } | |
| extern "C" { | |
| pub fn woken_wake_function( | |
| wq_entry: *mut wait_queue_entry, | |
| mode: core::ffi::c_uint, | |
| sync: core::ffi::c_int, | |
| key: *mut core::ffi::c_void, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn autoremove_wake_function( | |
| wq_entry: *mut wait_queue_entry, | |
| mode: core::ffi::c_uint, | |
| sync: core::ffi::c_int, | |
| key: *mut core::ffi::c_void, | |
| ) -> core::ffi::c_int; | |
| } | |
| pub type task_call_f = ::core::option::Option< | |
| unsafe extern "C" fn(p: *mut task_struct, arg: *mut core::ffi::c_void) -> core::ffi::c_int, | |
| >; | |
| extern "C" { | |
| pub fn task_call_func( | |
| p: *mut task_struct, | |
| func: task_call_f, | |
| arg: *mut core::ffi::c_void, | |
| ) -> core::ffi::c_int; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct optimistic_spin_node { | |
| pub next: *mut optimistic_spin_node, | |
| pub prev: *mut optimistic_spin_node, | |
| pub locked: core::ffi::c_int, | |
| pub cpu: core::ffi::c_int, | |
| } | |
| impl Default for optimistic_spin_node { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct optimistic_spin_queue { | |
| pub tail: atomic_t, | |
| } | |
| extern "C" { | |
| pub fn osq_lock(lock: *mut optimistic_spin_queue) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn osq_unlock(lock: *mut optimistic_spin_queue); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct mutex { | |
| pub owner: atomic_long_t, | |
| pub wait_lock: raw_spinlock_t, | |
| pub osq: optimistic_spin_queue, | |
| pub wait_list: list_head, | |
| pub magic: *mut core::ffi::c_void, | |
| pub dep_map: lockdep_map, | |
| } | |
| impl Default for mutex { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn mutex_destroy(lock: *mut mutex); | |
| } | |
| extern "C" { | |
| pub fn __mutex_init(lock: *mut mutex, name: *const core::ffi::c_char, key: *mut lock_class_key); | |
| } | |
| extern "C" { | |
| pub fn mutex_is_locked(lock: *mut mutex) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn mutex_lock_nested(lock: *mut mutex, subclass: core::ffi::c_uint); | |
| } | |
| extern "C" { | |
| pub fn _mutex_lock_nest_lock(lock: *mut mutex, nest_lock: *mut lockdep_map); | |
| } | |
| extern "C" { | |
| pub fn mutex_lock_interruptible_nested( | |
| lock: *mut mutex, | |
| subclass: core::ffi::c_uint, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mutex_lock_killable_nested( | |
| lock: *mut mutex, | |
| subclass: core::ffi::c_uint, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mutex_lock_io_nested(lock: *mut mutex, subclass: core::ffi::c_uint); | |
| } | |
| extern "C" { | |
| pub fn mutex_trylock(lock: *mut mutex) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mutex_unlock(lock: *mut mutex); | |
| } | |
| extern "C" { | |
| pub fn atomic_dec_and_mutex_lock(cnt: *mut atomic_t, lock: *mut mutex) -> core::ffi::c_int; | |
| } | |
| pub type class_mutex_t = *mut mutex; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct seqcount { | |
| pub sequence: core::ffi::c_uint, | |
| pub dep_map: lockdep_map, | |
| } | |
| impl Default for seqcount { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type seqcount_t = seqcount; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct seqcount_raw_spinlock { | |
| pub seqcount: seqcount_t, | |
| pub lock: *mut raw_spinlock_t, | |
| } | |
| impl Default for seqcount_raw_spinlock { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type seqcount_raw_spinlock_t = seqcount_raw_spinlock; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct seqcount_spinlock { | |
| pub seqcount: seqcount_t, | |
| pub lock: *mut spinlock_t, | |
| } | |
| impl Default for seqcount_spinlock { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type seqcount_spinlock_t = seqcount_spinlock; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct seqcount_rwlock { | |
| pub seqcount: seqcount_t, | |
| pub lock: *mut rwlock_t, | |
| } | |
| impl Default for seqcount_rwlock { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type seqcount_rwlock_t = seqcount_rwlock; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct seqcount_mutex { | |
| pub seqcount: seqcount_t, | |
| pub lock: *mut mutex, | |
| } | |
| impl Default for seqcount_mutex { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub type seqcount_mutex_t = seqcount_mutex; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct seqcount_latch_t { | |
| pub seqcount: seqcount_t, | |
| } | |
| impl Default for seqcount_latch_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct seqlock_t { | |
| pub seqcount: seqcount_spinlock_t, | |
| pub lock: spinlock_t, | |
| } | |
| impl Default for seqlock_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct nodemask_t { | |
| pub bits: [core::ffi::c_ulong; 1usize], | |
| } | |
| extern "C" { | |
| pub static mut _unused_nodemask_arg_: nodemask_t; | |
| } | |
| pub const node_states_N_POSSIBLE: node_states = 0; | |
| pub const node_states_N_ONLINE: node_states = 1; | |
| pub const node_states_N_NORMAL_MEMORY: node_states = 2; | |
| pub const node_states_N_HIGH_MEMORY: node_states = 2; | |
| pub const node_states_N_MEMORY: node_states = 3; | |
| pub const node_states_N_CPU: node_states = 4; | |
| pub const node_states_N_GENERIC_INITIATOR: node_states = 5; | |
| pub const node_states_NR_NODE_STATES: node_states = 6; | |
| pub type node_states = core::ffi::c_uint; | |
| extern "C" { | |
| pub static mut node_states: [nodemask_t; 6usize]; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct nodemask_scratch { | |
| pub mask1: nodemask_t, | |
| pub mask2: nodemask_t, | |
| } | |
| pub const pageblock_bits_PB_migrate: pageblock_bits = 0; | |
| pub const pageblock_bits_PB_migrate_end: pageblock_bits = 2; | |
| pub const pageblock_bits_PB_migrate_skip: pageblock_bits = 3; | |
| pub const pageblock_bits_NR_PAGEBLOCK_BITS: pageblock_bits = 4; | |
| pub type pageblock_bits = core::ffi::c_uint; | |
| extern "C" { | |
| pub fn get_pfnblock_flags_mask( | |
| page: *const page, | |
| pfn: core::ffi::c_ulong, | |
| mask: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn set_pfnblock_flags_mask( | |
| page: *mut page, | |
| flags: core::ffi::c_ulong, | |
| pfn: core::ffi::c_ulong, | |
| mask: core::ffi::c_ulong, | |
| ); | |
| } | |
| pub const UNAME26: _bindgen_ty_6 = 131072; | |
| pub const ADDR_NO_RANDOMIZE: _bindgen_ty_6 = 262144; | |
| pub const FDPIC_FUNCPTRS: _bindgen_ty_6 = 524288; | |
| pub const MMAP_PAGE_ZERO: _bindgen_ty_6 = 1048576; | |
| pub const ADDR_COMPAT_LAYOUT: _bindgen_ty_6 = 2097152; | |
| pub const READ_IMPLIES_EXEC: _bindgen_ty_6 = 4194304; | |
| pub const ADDR_LIMIT_32BIT: _bindgen_ty_6 = 8388608; | |
| pub const SHORT_INODE: _bindgen_ty_6 = 16777216; | |
| pub const WHOLE_SECONDS: _bindgen_ty_6 = 33554432; | |
| pub const STICKY_TIMEOUTS: _bindgen_ty_6 = 67108864; | |
| pub const ADDR_LIMIT_3GB: _bindgen_ty_6 = 134217728; | |
| pub type _bindgen_ty_6 = core::ffi::c_uint; | |
| pub const PER_LINUX: _bindgen_ty_7 = 0; | |
| pub const PER_LINUX_32BIT: _bindgen_ty_7 = 8388608; | |
| pub const PER_LINUX_FDPIC: _bindgen_ty_7 = 524288; | |
| pub const PER_SVR4: _bindgen_ty_7 = 68157441; | |
| pub const PER_SVR3: _bindgen_ty_7 = 83886082; | |
| pub const PER_SCOSVR3: _bindgen_ty_7 = 117440515; | |
| pub const PER_OSR5: _bindgen_ty_7 = 100663299; | |
| pub const PER_WYSEV386: _bindgen_ty_7 = 83886084; | |
| pub const PER_ISCR4: _bindgen_ty_7 = 67108869; | |
| pub const PER_BSD: _bindgen_ty_7 = 6; | |
| pub const PER_SUNOS: _bindgen_ty_7 = 67108870; | |
| pub const PER_XENIX: _bindgen_ty_7 = 83886087; | |
| pub const PER_LINUX32: _bindgen_ty_7 = 8; | |
| pub const PER_LINUX32_3GB: _bindgen_ty_7 = 134217736; | |
| pub const PER_IRIX32: _bindgen_ty_7 = 67108873; | |
| pub const PER_IRIXN32: _bindgen_ty_7 = 67108874; | |
| pub const PER_IRIX64: _bindgen_ty_7 = 67108875; | |
| pub const PER_RISCOS: _bindgen_ty_7 = 12; | |
| pub const PER_SOLARIS: _bindgen_ty_7 = 67108877; | |
| pub const PER_UW7: _bindgen_ty_7 = 68157454; | |
| pub const PER_OSF4: _bindgen_ty_7 = 15; | |
| pub const PER_HPUX: _bindgen_ty_7 = 16; | |
| pub const PER_MASK: _bindgen_ty_7 = 255; | |
| pub type _bindgen_ty_7 = core::ffi::c_uint; | |
| extern "C" { | |
| pub fn copy_page(to: *mut core::ffi::c_void, from: *const core::ffi::c_void); | |
| } | |
| extern "C" { | |
| pub fn clear_page(to: *mut core::ffi::c_void); | |
| } | |
| extern "C" { | |
| pub fn copy_user_highpage( | |
| to: *mut page, | |
| from: *mut page, | |
| vaddr: core::ffi::c_ulong, | |
| vma: *mut vm_area_struct, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn copy_highpage(to: *mut page, from: *mut page); | |
| } | |
| extern "C" { | |
| pub fn vma_alloc_zeroed_movable_folio( | |
| vma: *mut vm_area_struct, | |
| vaddr: core::ffi::c_ulong, | |
| ) -> *mut folio; | |
| } | |
| extern "C" { | |
| pub fn tag_clear_highpage(to: *mut page); | |
| } | |
| pub type pgtable_t = *mut page; | |
| extern "C" { | |
| pub fn pfn_is_map_memory(pfn: core::ffi::c_ulong) -> core::ffi::c_int; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct arch_tlbflush_unmap_batch {} | |
| pub const MM_FILEPAGES: _bindgen_ty_8 = 0; | |
| pub const MM_ANONPAGES: _bindgen_ty_8 = 1; | |
| pub const MM_SWAPENTS: _bindgen_ty_8 = 2; | |
| pub const MM_SHMEMPAGES: _bindgen_ty_8 = 3; | |
| pub const NR_MM_COUNTERS: _bindgen_ty_8 = 4; | |
| pub type _bindgen_ty_8 = core::ffi::c_uint; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct page_frag { | |
| pub page: *mut page, | |
| pub offset: __u32, | |
| pub size: __u32, | |
| } | |
| impl Default for page_frag { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct tlbflush_unmap_batch { | |
| pub arch: arch_tlbflush_unmap_batch, | |
| pub flush_required: bool_, | |
| pub writable: bool_, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct rb_node { | |
| pub __rb_parent_color: core::ffi::c_ulong, | |
| pub rb_right: *mut rb_node, | |
| pub rb_left: *mut rb_node, | |
| } | |
| impl Default for rb_node { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct rb_root { | |
| pub rb_node: *mut rb_node, | |
| } | |
| impl Default for rb_root { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct rb_root_cached { | |
| pub rb_root: rb_root, | |
| pub rb_leftmost: *mut rb_node, | |
| } | |
| impl Default for rb_root_cached { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn ct_irq_enter(); | |
| } | |
| extern "C" { | |
| pub fn ct_irq_exit(); | |
| } | |
| extern "C" { | |
| pub fn ct_irq_enter_irqson(); | |
| } | |
| extern "C" { | |
| pub fn ct_irq_exit_irqson(); | |
| } | |
| extern "C" { | |
| pub fn ct_nmi_enter(); | |
| } | |
| extern "C" { | |
| pub fn ct_nmi_exit(); | |
| } | |
| extern "C" { | |
| pub fn call_rcu(head: *mut callback_head, func: rcu_callback_t); | |
| } | |
| extern "C" { | |
| pub fn rcu_barrier_tasks(); | |
| } | |
| extern "C" { | |
| pub fn rcu_barrier_tasks_rude(); | |
| } | |
| extern "C" { | |
| pub fn synchronize_rcu(); | |
| } | |
| extern "C" { | |
| pub fn get_completed_synchronize_rcu() -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn get_completed_synchronize_rcu_full(rgosp: *mut rcu_gp_oldstate); | |
| } | |
| extern "C" { | |
| pub fn rcu_read_unlock_strict(); | |
| } | |
| extern "C" { | |
| pub fn rcu_init(); | |
| } | |
| extern "C" { | |
| pub static mut rcu_scheduler_active: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn rcu_sched_clock_irq(user: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn rcu_sysrq_start(); | |
| } | |
| extern "C" { | |
| pub fn rcu_sysrq_end(); | |
| } | |
| extern "C" { | |
| pub fn rcu_softirq_qs(); | |
| } | |
| extern "C" { | |
| pub fn rcu_note_context_switch(preempt: bool_); | |
| } | |
| extern "C" { | |
| pub fn rcu_needs_cpu() -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn rcu_cpu_stall_reset(); | |
| } | |
| extern "C" { | |
| pub fn rcu_request_urgent_qs_task(t: *mut task_struct); | |
| } | |
| extern "C" { | |
| pub fn synchronize_rcu_expedited(); | |
| } | |
| extern "C" { | |
| pub fn kvfree_call_rcu(head: *mut callback_head, ptr: *mut core::ffi::c_void); | |
| } | |
| extern "C" { | |
| pub fn rcu_barrier(); | |
| } | |
| extern "C" { | |
| pub fn rcu_momentary_dyntick_idle(); | |
| } | |
| extern "C" { | |
| pub fn kfree_rcu_scheduler_running(); | |
| } | |
| extern "C" { | |
| pub fn rcu_gp_might_be_stalled() -> bool_; | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct rcu_gp_oldstate { | |
| pub rgos_norm: core::ffi::c_ulong, | |
| pub rgos_exp: core::ffi::c_ulong, | |
| } | |
| extern "C" { | |
| pub fn start_poll_synchronize_rcu_expedited() -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn start_poll_synchronize_rcu_expedited_full(rgosp: *mut rcu_gp_oldstate); | |
| } | |
| extern "C" { | |
| pub fn cond_synchronize_rcu_expedited(oldstate: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn cond_synchronize_rcu_expedited_full(rgosp: *mut rcu_gp_oldstate); | |
| } | |
| extern "C" { | |
| pub fn get_state_synchronize_rcu() -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn get_state_synchronize_rcu_full(rgosp: *mut rcu_gp_oldstate); | |
| } | |
| extern "C" { | |
| pub fn start_poll_synchronize_rcu() -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn start_poll_synchronize_rcu_full(rgosp: *mut rcu_gp_oldstate); | |
| } | |
| extern "C" { | |
| pub fn poll_state_synchronize_rcu(oldstate: core::ffi::c_ulong) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn poll_state_synchronize_rcu_full(rgosp: *mut rcu_gp_oldstate) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn cond_synchronize_rcu(oldstate: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn cond_synchronize_rcu_full(rgosp: *mut rcu_gp_oldstate); | |
| } | |
| extern "C" { | |
| pub fn rcu_irq_exit_check_preempt(); | |
| } | |
| extern "C" { | |
| pub fn rcu_preempt_deferred_qs(t: *mut task_struct); | |
| } | |
| extern "C" { | |
| pub fn exit_rcu(); | |
| } | |
| extern "C" { | |
| pub fn rcu_scheduler_starting(); | |
| } | |
| extern "C" { | |
| pub fn rcu_end_inkernel_boot(); | |
| } | |
| extern "C" { | |
| pub fn rcu_inkernel_boot_has_ended() -> bool_; | |
| } | |
| extern "C" { | |
| pub fn rcu_is_watching() -> bool_; | |
| } | |
| extern "C" { | |
| pub fn rcu_all_qs(); | |
| } | |
| extern "C" { | |
| pub fn rcutree_prepare_cpu(cpu: core::ffi::c_uint) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn rcutree_online_cpu(cpu: core::ffi::c_uint) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn rcutree_report_cpu_starting(cpu: core::ffi::c_uint); | |
| } | |
| extern "C" { | |
| pub fn rcutree_migrate_callbacks(cpu: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn rcutree_report_cpu_dead(); | |
| } | |
| extern "C" { | |
| pub static mut rcu_lock_map: lockdep_map; | |
| } | |
| extern "C" { | |
| pub static mut rcu_bh_lock_map: lockdep_map; | |
| } | |
| extern "C" { | |
| pub static mut rcu_sched_lock_map: lockdep_map; | |
| } | |
| extern "C" { | |
| pub static mut rcu_callback_map: lockdep_map; | |
| } | |
| extern "C" { | |
| pub fn debug_lockdep_rcu_enabled() -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn rcu_read_lock_held() -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn rcu_read_lock_bh_held() -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn rcu_read_lock_sched_held() -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn rcu_read_lock_any_held() -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut rcu_expedited: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut rcu_normal: core::ffi::c_int; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct class_rcu_t { | |
| pub lock: *mut core::ffi::c_void, | |
| } | |
| impl Default for class_rcu_t { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn rb_insert_color(arg1: *mut rb_node, arg2: *mut rb_root); | |
| } | |
| extern "C" { | |
| pub fn rb_erase(arg1: *mut rb_node, arg2: *mut rb_root); | |
| } | |
| extern "C" { | |
| pub fn rb_next(arg1: *const rb_node) -> *mut rb_node; | |
| } | |
| extern "C" { | |
| pub fn rb_prev(arg1: *const rb_node) -> *mut rb_node; | |
| } | |
| extern "C" { | |
| pub fn rb_first(arg1: *const rb_root) -> *mut rb_node; | |
| } | |
| extern "C" { | |
| pub fn rb_last(arg1: *const rb_root) -> *mut rb_node; | |
| } | |
| extern "C" { | |
| pub fn rb_first_postorder(arg1: *const rb_root) -> *mut rb_node; | |
| } | |
| extern "C" { | |
| pub fn rb_next_postorder(arg1: *const rb_node) -> *mut rb_node; | |
| } | |
| extern "C" { | |
| pub fn rb_replace_node(victim: *mut rb_node, new: *mut rb_node, root: *mut rb_root); | |
| } | |
| extern "C" { | |
| pub fn rb_replace_node_rcu(victim: *mut rb_node, new: *mut rb_node, root: *mut rb_root); | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct maple_metadata { | |
| pub end: core::ffi::c_uchar, | |
| pub gap: core::ffi::c_uchar, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct maple_range_64 { | |
| pub parent: *mut maple_pnode, | |
| pub pivot: [core::ffi::c_ulong; 15usize], | |
| pub __bindgen_anon_1: maple_range_64__bindgen_ty_1, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union maple_range_64__bindgen_ty_1 { | |
| pub slot: [*mut core::ffi::c_void; 16usize], | |
| pub __bindgen_anon_1: maple_range_64__bindgen_ty_1__bindgen_ty_1, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct maple_range_64__bindgen_ty_1__bindgen_ty_1 { | |
| pub pad: [*mut core::ffi::c_void; 15usize], | |
| pub meta: maple_metadata, | |
| } | |
| impl Default for maple_range_64__bindgen_ty_1__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for maple_range_64__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for maple_range_64 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct maple_arange_64 { | |
| pub parent: *mut maple_pnode, | |
| pub pivot: [core::ffi::c_ulong; 9usize], | |
| pub slot: [*mut core::ffi::c_void; 10usize], | |
| pub gap: [core::ffi::c_ulong; 10usize], | |
| pub meta: maple_metadata, | |
| } | |
| impl Default for maple_arange_64 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct maple_alloc { | |
| pub total: core::ffi::c_ulong, | |
| pub node_count: core::ffi::c_uchar, | |
| pub request_count: core::ffi::c_uint, | |
| pub slot: [*mut maple_alloc; 30usize], | |
| } | |
| impl Default for maple_alloc { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct maple_topiary { | |
| pub parent: *mut maple_pnode, | |
| pub next: *mut maple_enode, | |
| } | |
| impl Default for maple_topiary { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| pub const maple_type_maple_dense: maple_type = 0; | |
| pub const maple_type_maple_leaf_64: maple_type = 1; | |
| pub const maple_type_maple_range_64: maple_type = 2; | |
| pub const maple_type_maple_arange_64: maple_type = 3; | |
| pub type maple_type = core::ffi::c_uint; | |
| pub type lockdep_map_p = *mut lockdep_map; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct maple_tree { | |
| pub __bindgen_anon_1: maple_tree__bindgen_ty_1, | |
| pub ma_flags: core::ffi::c_uint, | |
| pub ma_root: *mut core::ffi::c_void, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union maple_tree__bindgen_ty_1 { | |
| pub ma_lock: spinlock_t, | |
| pub ma_external_lock: lockdep_map_p, | |
| } | |
| impl Default for maple_tree__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for maple_tree { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct maple_node { | |
| pub __bindgen_anon_1: maple_node__bindgen_ty_1, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub union maple_node__bindgen_ty_1 { | |
| pub __bindgen_anon_1: maple_node__bindgen_ty_1__bindgen_ty_1, | |
| pub __bindgen_anon_2: maple_node__bindgen_ty_1__bindgen_ty_2, | |
| pub mr64: maple_range_64, | |
| pub ma64: maple_arange_64, | |
| pub alloc: maple_alloc, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct maple_node__bindgen_ty_1__bindgen_ty_1 { | |
| pub parent: *mut maple_pnode, | |
| pub slot: [*mut core::ffi::c_void; 31usize], | |
| } | |
| impl Default for maple_node__bindgen_ty_1__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct maple_node__bindgen_ty_1__bindgen_ty_2 { | |
| pub pad: *mut core::ffi::c_void, | |
| pub rcu: callback_head, | |
| pub piv_parent: *mut maple_enode, | |
| pub parent_slot: core::ffi::c_uchar, | |
| pub type_: maple_type, | |
| pub slot_len: core::ffi::c_uchar, | |
| pub ma_flags: core::ffi::c_uint, | |
| } | |
| impl Default for maple_node__bindgen_ty_1__bindgen_ty_2 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for maple_node__bindgen_ty_1 { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| impl Default for maple_node { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct ma_topiary { | |
| pub head: *mut maple_enode, | |
| pub tail: *mut maple_enode, | |
| pub mtree: *mut maple_tree, | |
| } | |
| impl Default for ma_topiary { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn mtree_load(mt: *mut maple_tree, index: core::ffi::c_ulong) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mtree_insert( | |
| mt: *mut maple_tree, | |
| index: core::ffi::c_ulong, | |
| entry: *mut core::ffi::c_void, | |
| gfp: gfp_t, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mtree_insert_range( | |
| mt: *mut maple_tree, | |
| first: core::ffi::c_ulong, | |
| last: core::ffi::c_ulong, | |
| entry: *mut core::ffi::c_void, | |
| gfp: gfp_t, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mtree_alloc_range( | |
| mt: *mut maple_tree, | |
| startp: *mut core::ffi::c_ulong, | |
| entry: *mut core::ffi::c_void, | |
| size: core::ffi::c_ulong, | |
| min: core::ffi::c_ulong, | |
| max: core::ffi::c_ulong, | |
| gfp: gfp_t, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mtree_alloc_rrange( | |
| mt: *mut maple_tree, | |
| startp: *mut core::ffi::c_ulong, | |
| entry: *mut core::ffi::c_void, | |
| size: core::ffi::c_ulong, | |
| min: core::ffi::c_ulong, | |
| max: core::ffi::c_ulong, | |
| gfp: gfp_t, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mtree_store_range( | |
| mt: *mut maple_tree, | |
| first: core::ffi::c_ulong, | |
| last: core::ffi::c_ulong, | |
| entry: *mut core::ffi::c_void, | |
| gfp: gfp_t, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mtree_store( | |
| mt: *mut maple_tree, | |
| index: core::ffi::c_ulong, | |
| entry: *mut core::ffi::c_void, | |
| gfp: gfp_t, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mtree_erase(mt: *mut maple_tree, index: core::ffi::c_ulong) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mtree_destroy(mt: *mut maple_tree); | |
| } | |
| extern "C" { | |
| pub fn __mt_destroy(mt: *mut maple_tree); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct ma_state { | |
| pub tree: *mut maple_tree, | |
| pub index: core::ffi::c_ulong, | |
| pub last: core::ffi::c_ulong, | |
| pub node: *mut maple_enode, | |
| pub min: core::ffi::c_ulong, | |
| pub max: core::ffi::c_ulong, | |
| pub alloc: *mut maple_alloc, | |
| pub depth: core::ffi::c_uchar, | |
| pub offset: core::ffi::c_uchar, | |
| pub mas_flags: core::ffi::c_uchar, | |
| } | |
| impl Default for ma_state { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct ma_wr_state { | |
| pub mas: *mut ma_state, | |
| pub node: *mut maple_node, | |
| pub r_min: core::ffi::c_ulong, | |
| pub r_max: core::ffi::c_ulong, | |
| pub type_: maple_type, | |
| pub offset_end: core::ffi::c_uchar, | |
| pub node_end: core::ffi::c_uchar, | |
| pub pivots: *mut core::ffi::c_ulong, | |
| pub end_piv: core::ffi::c_ulong, | |
| pub slots: *mut *mut core::ffi::c_void, | |
| pub entry: *mut core::ffi::c_void, | |
| pub content: *mut core::ffi::c_void, | |
| } | |
| impl Default for ma_wr_state { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn mas_walk(mas: *mut ma_state) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mas_store(mas: *mut ma_state, entry: *mut core::ffi::c_void) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mas_erase(mas: *mut ma_state) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mas_store_gfp( | |
| mas: *mut ma_state, | |
| entry: *mut core::ffi::c_void, | |
| gfp: gfp_t, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mas_store_prealloc(mas: *mut ma_state, entry: *mut core::ffi::c_void); | |
| } | |
| extern "C" { | |
| pub fn mas_find(mas: *mut ma_state, max: core::ffi::c_ulong) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mas_find_range(mas: *mut ma_state, max: core::ffi::c_ulong) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mas_find_rev(mas: *mut ma_state, min: core::ffi::c_ulong) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mas_find_range_rev( | |
| mas: *mut ma_state, | |
| max: core::ffi::c_ulong, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mas_preallocate( | |
| mas: *mut ma_state, | |
| entry: *mut core::ffi::c_void, | |
| gfp: gfp_t, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mas_is_err(mas: *mut ma_state) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn mas_nomem(mas: *mut ma_state, gfp: gfp_t) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn mas_pause(mas: *mut ma_state); | |
| } | |
| extern "C" { | |
| pub fn maple_tree_init(); | |
| } | |
| extern "C" { | |
| pub fn mas_destroy(mas: *mut ma_state); | |
| } | |
| extern "C" { | |
| pub fn mas_expected_entries( | |
| mas: *mut ma_state, | |
| nr_entries: core::ffi::c_ulong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mas_prev(mas: *mut ma_state, min: core::ffi::c_ulong) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mas_prev_range(mas: *mut ma_state, max: core::ffi::c_ulong) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mas_next(mas: *mut ma_state, max: core::ffi::c_ulong) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mas_next_range(mas: *mut ma_state, max: core::ffi::c_ulong) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mas_empty_area( | |
| mas: *mut ma_state, | |
| min: core::ffi::c_ulong, | |
| max: core::ffi::c_ulong, | |
| size: core::ffi::c_ulong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mas_empty_area_rev( | |
| mas: *mut ma_state, | |
| min: core::ffi::c_ulong, | |
| max: core::ffi::c_ulong, | |
| size: core::ffi::c_ulong, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn mt_find( | |
| mt: *mut maple_tree, | |
| index: *mut core::ffi::c_ulong, | |
| max: core::ffi::c_ulong, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mt_find_after( | |
| mt: *mut maple_tree, | |
| index: *mut core::ffi::c_ulong, | |
| max: core::ffi::c_ulong, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mt_prev( | |
| mt: *mut maple_tree, | |
| index: core::ffi::c_ulong, | |
| min: core::ffi::c_ulong, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| extern "C" { | |
| pub fn mt_next( | |
| mt: *mut maple_tree, | |
| index: core::ffi::c_ulong, | |
| max: core::ffi::c_ulong, | |
| ) -> *mut core::ffi::c_void; | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct rw_semaphore { | |
| pub count: atomic_long_t, | |
| pub owner: atomic_long_t, | |
| pub osq: optimistic_spin_queue, | |
| pub wait_lock: raw_spinlock_t, | |
| pub wait_list: list_head, | |
| pub magic: *mut core::ffi::c_void, | |
| pub dep_map: lockdep_map, | |
| } | |
| impl Default for rw_semaphore { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn __init_rwsem( | |
| sem: *mut rw_semaphore, | |
| name: *const core::ffi::c_char, | |
| key: *mut lock_class_key, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn down_read(sem: *mut rw_semaphore); | |
| } | |
| extern "C" { | |
| pub fn down_read_interruptible(sem: *mut rw_semaphore) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn down_read_killable(sem: *mut rw_semaphore) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn down_read_trylock(sem: *mut rw_semaphore) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn down_write(sem: *mut rw_semaphore); | |
| } | |
| extern "C" { | |
| pub fn down_write_killable(sem: *mut rw_semaphore) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn down_write_trylock(sem: *mut rw_semaphore) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn up_read(sem: *mut rw_semaphore); | |
| } | |
| extern "C" { | |
| pub fn up_write(sem: *mut rw_semaphore); | |
| } | |
| pub type class_rwsem_read_t = *mut rw_semaphore; | |
| pub type class_rwsem_write_t = *mut rw_semaphore; | |
| extern "C" { | |
| pub fn downgrade_write(sem: *mut rw_semaphore); | |
| } | |
| extern "C" { | |
| pub fn down_read_nested(sem: *mut rw_semaphore, subclass: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn down_read_killable_nested( | |
| sem: *mut rw_semaphore, | |
| subclass: core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn down_write_nested(sem: *mut rw_semaphore, subclass: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn down_write_killable_nested( | |
| sem: *mut rw_semaphore, | |
| subclass: core::ffi::c_int, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn _down_write_nest_lock(sem: *mut rw_semaphore, nest_lock: *mut lockdep_map); | |
| } | |
| extern "C" { | |
| pub fn down_read_non_owner(sem: *mut rw_semaphore); | |
| } | |
| extern "C" { | |
| pub fn up_read_non_owner(sem: *mut rw_semaphore); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct swait_queue_head { | |
| pub lock: raw_spinlock_t, | |
| pub task_list: list_head, | |
| } | |
| impl Default for swait_queue_head { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct swait_queue { | |
| pub task: *mut task_struct, | |
| pub task_list: list_head, | |
| } | |
| impl Default for swait_queue { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn __init_swait_queue_head( | |
| q: *mut swait_queue_head, | |
| name: *const core::ffi::c_char, | |
| key: *mut lock_class_key, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn swake_up_one(q: *mut swait_queue_head); | |
| } | |
| extern "C" { | |
| pub fn swake_up_all(q: *mut swait_queue_head); | |
| } | |
| extern "C" { | |
| pub fn swake_up_locked(q: *mut swait_queue_head, wake_flags: core::ffi::c_int); | |
| } | |
| extern "C" { | |
| pub fn prepare_to_swait_exclusive( | |
| q: *mut swait_queue_head, | |
| wait: *mut swait_queue, | |
| state: core::ffi::c_int, | |
| ); | |
| } | |
| extern "C" { | |
| pub fn prepare_to_swait_event( | |
| q: *mut swait_queue_head, | |
| wait: *mut swait_queue, | |
| state: core::ffi::c_int, | |
| ) -> core::ffi::c_long; | |
| } | |
| extern "C" { | |
| pub fn __finish_swait(q: *mut swait_queue_head, wait: *mut swait_queue); | |
| } | |
| extern "C" { | |
| pub fn finish_swait(q: *mut swait_queue_head, wait: *mut swait_queue); | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct completion { | |
| pub done: core::ffi::c_uint, | |
| pub wait: swait_queue_head, | |
| } | |
| impl Default for completion { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| extern "C" { | |
| pub fn wait_for_completion(arg1: *mut completion); | |
| } | |
| extern "C" { | |
| pub fn wait_for_completion_io(arg1: *mut completion); | |
| } | |
| extern "C" { | |
| pub fn wait_for_completion_interruptible(x: *mut completion) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn wait_for_completion_killable(x: *mut completion) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn wait_for_completion_state( | |
| x: *mut completion, | |
| state: core::ffi::c_uint, | |
| ) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn wait_for_completion_timeout( | |
| x: *mut completion, | |
| timeout: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn wait_for_completion_io_timeout( | |
| x: *mut completion, | |
| timeout: core::ffi::c_ulong, | |
| ) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn wait_for_completion_interruptible_timeout( | |
| x: *mut completion, | |
| timeout: core::ffi::c_ulong, | |
| ) -> core::ffi::c_long; | |
| } | |
| extern "C" { | |
| pub fn wait_for_completion_killable_timeout( | |
| x: *mut completion, | |
| timeout: core::ffi::c_ulong, | |
| ) -> core::ffi::c_long; | |
| } | |
| extern "C" { | |
| pub fn try_wait_for_completion(x: *mut completion) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn completion_done(x: *mut completion) -> bool_; | |
| } | |
| extern "C" { | |
| pub fn complete(arg1: *mut completion); | |
| } | |
| extern "C" { | |
| pub fn complete_on_current_cpu(x: *mut completion); | |
| } | |
| extern "C" { | |
| pub fn complete_all(arg1: *mut completion); | |
| } | |
| pub const uprobe_filter_ctx_UPROBE_FILTER_REGISTER: uprobe_filter_ctx = 0; | |
| pub const uprobe_filter_ctx_UPROBE_FILTER_UNREGISTER: uprobe_filter_ctx = 1; | |
| pub const uprobe_filter_ctx_UPROBE_FILTER_MMAP: uprobe_filter_ctx = 2; | |
| pub type uprobe_filter_ctx = core::ffi::c_uint; | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct uprobe_consumer { | |
| pub handler: ::core::option::Option< | |
| unsafe extern "C" fn(self_: *mut uprobe_consumer, regs: *mut pt_regs) -> core::ffi::c_int, | |
| >, | |
| pub ret_handler: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| self_: *mut uprobe_consumer, | |
| func: core::ffi::c_ulong, | |
| regs: *mut pt_regs, | |
| ) -> core::ffi::c_int, | |
| >, | |
| pub filter: ::core::option::Option< | |
| unsafe extern "C" fn( | |
| self_: *mut uprobe_consumer, | |
| ctx: uprobe_filter_ctx, | |
| mm: *mut mm_struct, | |
| ) -> bool_, | |
| >, | |
| pub next: *mut uprobe_consumer, | |
| } | |
| impl Default for uprobe_consumer { | |
| fn default() -> Self { | |
| let mut s = ::core::mem::MaybeUninit::<Self>::uninit(); | |
| unsafe { | |
| ::core::ptr::write_bytes(s.as_mut_ptr(), 0, 1); | |
| s.assume_init() | |
| } | |
| } | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct uprobes_state {} | |
| extern "C" { | |
| pub fn register_refined_jiffies(clock_tick_rate: core::ffi::c_long) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub static mut jiffies_64: u64_; | |
| } | |
| extern "C" { | |
| pub static mut jiffies: core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub static mut preset_lpj: core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn jiffies_to_msecs(j: core::ffi::c_ulong) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn jiffies_to_usecs(j: core::ffi::c_ulong) -> core::ffi::c_uint; | |
| } | |
| extern "C" { | |
| pub fn jiffies64_to_nsecs(j: u64_) -> u64_; | |
| } | |
| extern "C" { | |
| pub fn jiffies64_to_msecs(j: u64_) -> u64_; | |
| } | |
| extern "C" { | |
| pub fn __msecs_to_jiffies(m: core::ffi::c_uint) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn __usecs_to_jiffies(u: core::ffi::c_uint) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn timespec64_to_jiffies(value: *const timespec64) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn jiffies_to_timespec64(jiffies: core::ffi::c_ulong, value: *mut timespec64); | |
| } | |
| extern "C" { | |
| pub fn jiffies_to_clock_t(x: core::ffi::c_ulong) -> clock_t; | |
| } | |
| extern "C" { | |
| pub fn clock_t_to_jiffies(x: core::ffi::c_ulong) -> core::ffi::c_ulong; | |
| } | |
| extern "C" { | |
| pub fn jiffies_64_to_clock_t(x: u64_) -> u64_; | |
| } | |
| extern "C" { | |
| pub fn nsec_to_clock_t(x: u64_) -> u64_; | |
| } | |
| extern "C" { | |
| pub fn nsecs_to_jiffies64(n: u64_) -> u64_; | |
| } | |
| extern "C" { | |
| pub fn nsecs_to_jiffies(n: u64_) -> core::ffi::c_ulong; | |
| } | |
| pub type ktime_t = s64; | |
| extern "C" { | |
| pub fn ktime_add_safe(lhs: ktime_t, rhs: ktime_t) -> ktime_t; | |
| } | |
| pub const clocksource_ids_CSID_GENERIC: clocksource_ids = 0; | |
| pub const clocksource_ids_CSID_ARM_ARCH_COUNTER: clocksource_ids = 1; | |
| pub const clocksource_ids_CSID_MAX: clocksource_ids = 2; | |
| pub type clocksource_ids = core::ffi::c_uint; | |
| extern "C" { | |
| pub fn timekeeping_init(); | |
| } | |
| extern "C" { | |
| pub static mut timekeeping_suspended: core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn legacy_timer_tick(ticks: core::ffi::c_ulong); | |
| } | |
| extern "C" { | |
| pub fn do_settimeofday64(ts: *const timespec64) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn do_sys_settimeofday64(tv: *const timespec64, tz: *const timezone) -> core::ffi::c_int; | |
| } | |
| extern "C" { | |
| pub fn ktime_get_raw_ts64(ts: *mut timespec64); | |
| } | |
| extern "C" { | |
| pub fn ktime_get_ts64(ts: *mut timespec64); | |
| } | |
| extern "C" { | |
| pub fn ktime_get_real_ts64(tv: *mut timespec64); | |
| } | |
| extern "C" { | |
| pub fn ktime_get_coarse_ts64(ts: *mut timespec64); | |
| } | |
| extern "C" { | |
| pub fn ktime_get_coarse_real_ts64(ts: *mut timespec64); | |
| } | |
| extern "C" { | |
| pub fn getboottime64(ts: *mut timespec64); | |
| } | |
| extern "C" { | |
| pub fn ktime_get_seconds() -> time64_t; | |
| } | |
| extern "C" { | |
| pub fn __ktime_get_real_seconds() -> time64_t; | |
| } | |
| extern "C" { | |
| pub fn ktime_get_real_seconds() -> time64_t; | |
| } | |
| pub const tk_offsets_TK_OFFS_REAL: tk_offsets = 0; | |
| pub const tk_offsets_TK_OFFS_BOOT: tk_offsets = 1; | |
| pub const tk_offsets_TK_OFFS_TAI: tk_offsets = 2; | |
| pub const tk_offsets_TK_OFFS_MAX: tk_offsets = 3; | |
| pub type tk_offsets = core::ffi::c_uint; | |
| extern "C" { | |
| pub fn ktime_get() -> ktime_t; | |
| } | |
| extern "C" { | |
| pub fn ktime_get_with_offset(offs: tk_offsets) -> ktime_t; | |
| } | |
| extern "C" { | |
| pub fn ktime_get_coarse_with_offset(offs: tk_offsets) -> ktime_t; | |
| } | |
| extern "C" { | |
| pub fn ktime_mono_to_any(tmono: ktime_t, offs: tk_offsets) -> ktime_t; | |
| } | |
| extern "C" { | |
| pub fn ktime_get_raw() -> ktime_t; | |
| } | |
| extern "C" { | |
| pub fn ktime_get_resolution_ns() -> u32_; | |
| } | |
| extern "C" { | |
| pub fn ktime_get_mono_fast_ns() -> u64_; | |
| } | |
| extern "C" { | |
| pub fn ktime_get_raw_fast_ns() -> u64_; | |
| } | |
| extern "C" { | |
| pub fn ktime_get_boot_fast_ns() -> u64_; | |
| } | |
| extern "C" { | |
| pub fn ktime_get_tai_fast_ns() -> u64_; | |
| } | |
| extern "C" { | |
| pub fn ktime_get_real_fast_ns() -> u64_; | |
| } | |
| extern "C" { | |
| pub fn timekeeping_rtc_skipsuspend() -> bool_; | |
| } | |
| extern "C" { | |
| pub fn timekeeping_rtc_skipresume() -> bool_; | |
| } | |
| extern "C" { | |
| pub fn timekeeping_inject_sleeptime64(delta: *const timespec64); | |
| } | |
| #[repr(C)] | |
| #[derive(Default, Copy, Clone)] | |
| pub struct ktime_timestamps { | |
| pub mono: u64_, | |
| pub boot: u64_, | |
| pub real: u64_, | |
| } | |
| #[repr(C)] | |
| #[derive(Copy, Clone)] | |
| pub struct system_time_snapshot { | |
| pub cycles: u64_, | |
| pub real: ktime_t, | |
| pub raw: ktime_t, | |
| pub cs_id: clocksource_ids, | |
| pub clock_was_set_seq: core::ffi::c_uint, | |
| pub cs_was_changed_seq: u |