pjbollinger

Musings on Salaries and Raises (for Software Engineers)

• Written by: Patrick Bollinger
• Created On: 2023-10-11
• Last Update: 2023-10-11

There are a lot of assumptions floating in this article, please bear with them as I try to convey my thoughts.

Salaries for a new job

pjbollinger

Why Are Product Development Teams Complex?

• Written by: Patrick Bollinger
• Created On: 2022-12-04
• Last Update: 2022-12-04

Evolution of a Product Development Team

In the beginning, there is a user and a developer.

pjbollinger

Engineering Net Promoter Score

Written by Patrick Bollinger

Originally published on 2021-09-05

Abstract

Net Promoter Score (NPS) is a metric used in businesses to gather how likely customers would recommend their business to others. NPS has been adapted internally by businesses via the employee NPS (eNPS) to measure how likely employees would recommend others to work there.

pjbollinger

High Velocity Product Development for Agile Teams

This is a presentation of a framework that strikes a balance between new product features and maintaining existing features.

The Framework

Focus on product until an engineering indicator alerts otherwise.

Where an engineering indicator is a metric that development team can measure to describe the health of the product. >

pjbollinger

[
  {
    "order": 2228,
    "op": "command",
    "command": "find",
    "ns": "zenbot4.$cmd",
    "request_data": {
      "filter": {
        "selector": "gdax.ETH-USD",
        "time": {

pjbollinger

[
  {
    "order": 2224,
    "op": "command",
    "command": "find",
    "ns": "zenbot4.$cmd",
    "request_data": {
      "filter": {
        "selector": "gdax.ETH-USD",
        "time": {

pjbollinger

Keybase proof

I hereby claim:

• I am pjbollinger on github.
• I am pjbollinger (https://keybase.io/pjbollinger) on keybase.
• I have a public key ASC2qFoD3R-54vC4Z1ABFId701k33jOApFZDkBK73KM8ggo

To claim this, I am signing this object:

pjbollinger

library ieee;
use ieee.std_logic_1164.all;

entity circuit is
  port (
    A, B, C, D: in std_logic;
    F         : out std_logic);
end circuit;

architecture circuit_arc of circuit is