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renatolond/boot.c

Created Dec 29, 2009
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#include "lolevel.h"
#include "platform.h"
#include "core.h"
const char * const new_sa = &_end;
/* Ours stuff */
extern long wrs_kernel_bss_start;
extern long wrs_kernel_bss_end;
// Forward declarations
void CreateTask_PhySw();
void CreateTask_spytask();
void boot();
void boot() { //#fs
long *canon_data_src = (void*)0xFFE88E20; //found just before "romdata start" string
long *canon_data_dst = (void*)0x1900;
long canon_data_len = 0xBA68 - 0x1900; // data_end - data_start (found between "romdata start" and "romdata end")
long *canon_bss_start = (void*)0xBA68; // just after data
long canon_bss_len = 0x102438 - 0xBA68; // found just before "heap start"
long i;
// Code taken from VxWorks CHDK. Changes CPU speed?
// asm volatile (
// "MRC p15, 0, R0,c1,c0\n"
// "ORR R0, R0, #0x1000\n"
// "ORR R0, R0, #4\n"
// "ORR R0, R0, #1\n"
// "MCR p15, 0, R0,c1,c0\n"
//:::"r0");
for(i=0;i<canon_data_len/4;i++)
canon_data_dst[i]=canon_data_src[i];
for(i=0;i<canon_bss_len/4;i++)
canon_bss_start[i]=0;
/* asm volatile (
"MRC p15, 0, R0,c1,c0\n"
"ORR R0, R0, #0x1000\n"
"BIC R0, R0, #4\n"
"ORR R0, R0, #1\n"
"MCR p15, 0, R0,c1,c0\n"
:::"r0");
*/
asm volatile ("B sub_FFC001a4_my\n"); //CALLING sub_FFC001a4_my (got)
}; //#fe
// init
void __attribute__((naked,noinline)) sub_FFC001a4_my() { //#fs
asm volatile (
"LDR R0, =0xFFC0021C\n"
"MOV R1, #0\n"
"LDR R3, =0xFFC00254\n"
"loc_FFC001B0:\n"
"CMP R0, R3\n"
"LDRCC R2, [R0],#4\n"
"STRCC R2, [R1],#4\n"
"BCC loc_FFC001B0\n"
"LDR R0, =0xFFC00254\n"
"MOV R1, #0x4B0\n"
"LDR R3, =0xFFC00468\n"
"loc_FFC001CC:\n"
"CMP R0, R3\n"
"LDRCC R2, [R0],#4\n"
"STRCC R2, [R1],#4\n"
"BCC loc_FFC001CC\n"
"MOV R0, #0xD2\n"
"MSR CPSR_cxsf, R0\n"
"MOV SP, #0x1000\n"
"MOV R0, #0xD3\n"
"MSR CPSR_cxsf, R0\n"
"MOV SP, #0x1000\n"
"LDR R0, =0xFFC00210\n"
"LDR R2, =0xEEEEEEEE\n"
"MOV R3, #0x1000\n"
"loc_FFC00200:\n"
"CMP R0, R3\n"
"STRCC R2, [R0],#4\n"
"BCC loc_FFC00200\n"
//"BL sub_FFC00FC8\n"
"BL sub_FFC00FC8_my\n" //CALLING sub_FFC00FC8_my (got)
);
} //#fe
void __attribute__((naked,noinline)) sub_FFC00FC8_my() {//#fs
asm volatile (
"STR LR, [SP,#-4]!\n"
"SUB SP, SP, #0x74\n"
"MOV R0, SP\n"
"MOV R1, #0x74\n"
"BL sub_FFE315E8\n" //CALLING sub_FFE315E8 (not got, in a470 it does not get this)
"MOV R0, #0x53000\n"
"STR R0, [SP,#0x74-0x70]\n"
// "LDR R0, =0x102438\n"
"LDR R0, =new_sa\n"
"LDR R2, =0x279C00\n"
"LDR R1, =0x2724A8\n"
"STR R0, [SP,#0x74-0x6C]\n"
"SUB R0, R1, R0\n"
"ADD R3, SP, #0x74-0x68\n"
"STR R2, [SP,#0x74-0x74]\n"
"STMIA R3, {R0-R2}\n"
"MOV R0, #0x22\n"
"STR R0, [SP,#0x74-0x5C]\n"
"MOV R0, #0x68\n"
"STR R0, [SP,#0x74-0x58]\n"
"LDR R0, =0x19B\n"
"LDR R1, =sub_FFC04D3C_my\n" // According to A470, this is "uHwSetup"
"STR R0, [SP,#0x74-0x54]\n"
"MOV R0, #0x96\n"
"STR R0, [SP,#0x74-0x50]\n"
"MOV R0, #0x78\n"
"STR R0, [SP,#0x74-0x4C]\n"
"MOV R0, #0x64\n"
"STR R0, [SP,#0x74-0x48]\n"
"MOV R0, #0\n"
"STR R0, [SP,#0x74-0x44]\n"
"STR R0, [SP,#0x74-0x40]\n"
"MOV R0, #0x10\n"
"STR R0, [SP,#0x74-0x18]\n"
"MOV R0, #0x800\n"
"STR R0, [SP,#0x74-0x14]\n"
"MOV R0, #0xA0\n"
"STR R0, [SP,#0x74-0x10]\n"
"MOV R0, #0x280\n"
"STR R0, [SP,#0x74-0x0C]\n"
"MOV R0, SP\n"
"MOV R2, #0\n"
"BL sub_FFC02D6C\n" //CALLING sub_FFC02D6C
"ADD SP, SP, #0x74\n"
"LDR PC, [SP],#4\n"
);
} //#fe
void __attribute__((naked,noinline)) sub_FFC04D3C_my ()
{
asm volatile(
"STMFD SP!, {R4,LR}\n"
"BL sub_FFC00958\n" // CALLING sub_FFC00958
"BL sub_FFC097EC\n" // CALLING dmSetup/sub_FFC097EC
"CMP R0, #0\n"
//"ADRLT R0, aDmsetup\n" // "dmSetup"
// According to S5IS, all ADRLT changes to LDRLT. Why?
// It also happens on a470
// it also seems necessary to change all names to original address
"LDRLT R0, =0xFFC04E50\n"
//"BLLT err_init_task\n"
"BLLT sub_FFC04E30\n" //err_init_task
"BL sub_FFC04978\n" //termDriverInit?? (according to S5IS)
"CMP R0, #0\n"
//"ADRLT R0, aTermdriverinit\n" // "termDriverInit"
"LDRLT R0, =0xFFC04E58\n"
"BLLT sub_FFC04E30\n" // err_init_task
//"ADR R0, a_term\n" // "/_term"
"LDR R0, 0xFFC04E68\n"
"BL sub_FFC04A60\n" // termDeviceCreate
"CMP R0, #0\n"
//"ADRLT R0, aTermdevicecrea\n" // "termDeviceCreate"
"LDRLT R0, =0xFFC04E70\n" // "termDeviceCreate"
"BLLT sub_FFC04E30\n" // err_init_task
"LDR R0, 0xFFC04E68\n"
"BL sub_FFC0357C\n" // stdioSetup
"CMP R0, #0\n"
//"ADRLT R0, aStdiosetup\n" //"stdioSetup"
"LDRLT R0, =0xFFC04E84\n"
"BLLT sub_FFC04E30\n" // err_init_task
"BL sub_FFC09304\n" // stdlibsetup?? (according to S5IS)
"CMP R0, #0\n"
//"ADRLT R0, aStdlibsetup\n" // "stdlibSetup"
"LDRLT R0, =0xFFC04E90\n"
"BLLT sub_FFC04E30\n" //err_init_task
"BL sub_FFC014AC\n" //armlib_setup
"CMP R0, #0\n"
//"ADRLT R0, aArmlib_setup\n" // "armlib_setup"
"LDRLT R0, =0xFFC04E9C\n" // "armlib_setup"
"BLLT sub_FFC04E30\n" //err_init_task
"LDMFD SP!, {R4,LR}\n"
//"B taskcreate_Startup\n"
"B sub_FFC0CE70_my\n" //taskcreate_Startup
);
}
void __attribute__((naked,noinline)) sub_FFC0CE70_my()
{
asm volatile (
"STMFD SP!, {R3,LR}\n"
"BL sub_FFC17F38\n"
"CMP R0, #0\n"
"BNE loc_FFC0CEA0\n"
"BL sub_FFC11104\n"
"CMP R0, #0\n"
"BNE loc_FFC0CEA0\n"
"LDR R1, =0xC0220000\n"
"MOV R0, #0x44\n"
"STR R0, [R1,#0x20]\n"
"loc_FFC0CE9C:\n"
"B loc_FFC0CE9C\n"
"loc_FFC0CEA0:\n"
"BL sub_FFC11110\n"
"BL sub_FFC163F0\n"
"LDR R1, =0x2CE000\n"
"MOV R0, #0\n"
"BL sub_FFC16638\n"
"BL sub_FFC165E4\n"
"MOV R3, #0\n"
"STR R3, [SP,#8-8]\n"
// "ADR R3, task_Startup\n"
"LDR R3, =sub_FFC0CE14_my\n"
"MOV R2, #0\n"
"MOV R1, #0x19\n"
// "ADR R0, aStartup\n"// ; "Startup"
"LDR R0, =0xFFC0CEE8\n"
"BL sub_FFC0B9C4\n" //createTask
"MOV R0, #0\n"
"LDMFD SP!, {R12,PC}\n"
);
}
void __attribute__((naked,noinline)) sub_FFC0CE14_my()
{
asm volatile(
);
}
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