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$ mesaflash --device 7i92 --addr 10.10.10.10 --readhmid | |
Configuration Name: HOSTMOT2 | |
General configuration information: | |
BoardName : MESA7I92 | |
FPGA Size: 9 KGates | |
FPGA Pins: 144 | |
Number of IO Ports: 2 | |
Width of one I/O port: 17 | |
Clock Low frequency: 100.0000 MHz | |
Clock High frequency: 200.0000 MHz | |
IDROM Type: 3 | |
Instance Stride 0: 4 | |
Instance Stride 1: 64 | |
Register Stride 0: 256 | |
Register Stride 1: 256 | |
Modules in configuration: | |
Module: DPLL | |
There are 1 of DPLL in configuration | |
Version: 0 | |
Registers: 7 | |
BaseAddress: 7000 | |
ClockFrequency: 100.000 MHz | |
Register Stride: 256 bytes | |
Instance Stride: 4 bytes | |
Module: WatchDog | |
There are 1 of WatchDog in configuration | |
Version: 0 | |
Registers: 3 | |
BaseAddress: 0C00 | |
ClockFrequency: 100.000 MHz | |
Register Stride: 256 bytes | |
Instance Stride: 4 bytes | |
Module: IOPort | |
There are 2 of IOPort in configuration | |
Version: 0 | |
Registers: 5 | |
BaseAddress: 1000 | |
ClockFrequency: 100.000 MHz | |
Register Stride: 256 bytes | |
Instance Stride: 4 bytes | |
Module: QCount | |
There are 6 of QCount in configuration | |
Version: 2 | |
Registers: 5 | |
BaseAddress: 3000 | |
ClockFrequency: 100.000 MHz | |
Register Stride: 256 bytes | |
Instance Stride: 4 bytes | |
Module: StepGen | |
There are 5 of StepGen in configuration | |
Version: 2 | |
Registers: 10 | |
BaseAddress: 2000 | |
ClockFrequency: 100.000 MHz | |
Register Stride: 256 bytes | |
Instance Stride: 4 bytes | |
Module: PWM | |
There are 1 of PWM in configuration | |
Version: 0 | |
Registers: 5 | |
BaseAddress: 4100 | |
ClockFrequency: 200.000 MHz | |
Register Stride: 256 bytes | |
Instance Stride: 4 bytes | |
Module: LED | |
There are 1 of LED in configuration | |
Version: 0 | |
Registers: 1 | |
BaseAddress: 0200 | |
ClockFrequency: 100.000 MHz | |
Register Stride: 256 bytes | |
Instance Stride: 4 bytes | |
Configuration pin-out: | |
IO Connections for P2 | |
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir | |
1 0 IOPort PWM 0 PWM (Out) | |
14 1 IOPort None | |
2 2 IOPort StepGen 0 Step/Table1 (Out) | |
15 3 IOPort None | |
3 4 IOPort StepGen 0 Dir/Table2 (Out) | |
16 5 IOPort StepGen 4 Step/Table1 (Out) | |
4 6 IOPort StepGen 1 Step/Table1 (Out) | |
17 7 IOPort StepGen 4 Dir/Table2 (Out) | |
5 8 IOPort StepGen 1 Dir/Table2 (Out) | |
6 9 IOPort StepGen 2 Step/Table1 (Out) | |
7 10 IOPort StepGen 2 Dir/Table2 (Out) | |
8 11 IOPort StepGen 3 Step/Table1 (Out) | |
9 12 IOPort StepGen 3 Dir/Table2 (Out) | |
10 13 IOPort None | |
11 14 IOPort QCount 0 Quad-A (In) | |
12 15 IOPort QCount 0 Quad-B (In) | |
13 16 IOPort QCount 0 Quad-IDX (In) | |
IO Connections for P1 | |
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir | |
1 17 IOPort QCount 1 Quad-A (In) | |
14 18 IOPort QCount 1 Quad-B (In) | |
2 19 IOPort QCount 1 Quad-IDX (In) | |
15 20 IOPort QCount 2 Quad-A (In) | |
3 21 IOPort QCount 2 Quad-B (In) | |
16 22 IOPort QCount 2 Quad-IDX (In) | |
4 23 IOPort QCount 3 Quad-A (In) | |
17 24 IOPort QCount 3 Quad-B (In) | |
5 25 IOPort QCount 3 Quad-IDX (In) | |
6 26 IOPort QCount 4 Quad-A (In) | |
7 27 IOPort QCount 4 Quad-B (In) | |
8 28 IOPort QCount 4 Quad-IDX (In) | |
9 29 IOPort QCount 5 Quad-A (In) | |
10 30 IOPort QCount 5 Quad-B (In) | |
11 31 IOPort QCount 5 Quad-IDX (In) | |
12 32 IOPort None | |
13 33 IOPort None |
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