KiCad custom rules for JLCPCB

jlcpcb_1oz_1-2layer.kicad_dru

##############################
# MIT License
#
# Copyright (c) 2022 ZiTe
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in all
# copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
##############################
# JLCPCB's Capabilities
# 1oz Copper, 1/2 Layers
# 2022-Nov-23
# https://jlcpcb.com/capabilities/pcb-capabilities
##############################

(version 1)


### Trace Width and Spacing ###

(rule "Track to Track Clearance"
    (constraint clearance (min 0.127mm))
    (condition "A.Type =='Track' && B.Type =='Track'"))

(rule "Min Track width"
    (constraint track_width (min 0.127mm))
    (condition "A.Type =='Track'"))


### Min Clearance ###

(rule "Hole to Hole Clearance Different Nets"
	(constraint hole_to_hole (min 0.5mm))
	(condition "A.Type == 'Through-hole' && B.Type == 'Through-hole' && A.Net != B.Net"))

(rule "Pad to Pad Clearance  Different Nets"
    (constraint clearance (min 0.127mm))
    (condition "A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net"))

(rule "Via to Via Clearance Same Nets"
    (constraint hole_to_hole (min 0.254mm))
    (condition "A.Type =='Via' && B.Type =='Via' && A.Net == B.Net"))

(rule "Via Hole to Track Clearance"
    (constraint hole_clearance (min 0.254mm))
    (condition "A.Type == 'Via' && B.Type == 'Track'"))

(rule "PTH Hole to Track Clearance"
    (constraint hole_clearance (min 0.33mm))
    (condition "A.Type == 'Through-hole' && B.Type == 'Track'"))

(rule "NPTH Hole to Track Clearance"
    (constraint hole_clearance (min 0.33mm))
    (condition "A.Type == 'NPTH, mechanical' && B.Type == 'Track'"))

(rule "Pad to Track Clearance"
    (constraint clearance (min 0.2mm))
    (condition "A.Type =='Pad' && B.Type =='Track'"))


### Drill Hole Size ###

(rule "Min Drill Hole Size Mechanical"
    (constraint hole_size (min 0.5mm))
    (condition "A.Pad_Type == 'NPTH, mechanical'"))

(rule "Max Drill Hole Size Mechanical"
    (constraint hole_size (max 6.3mm))
    (condition "A.Pad_Type == 'NPTH, mechanical'"))

(rule "Min Drill Hole Size PTH"
    (constraint hole_size (min 0.2mm))
    (condition "A.Pad_Type == 'Through-hole'"))

(rule "Max Drill Hole Size PTH"
    (constraint hole_size (max 6.35mm))
    (condition "A.Pad_Type == 'Through-hole'"))

(rule "Min Drill Hole Size Via"
    (constraint hole_size (min 0.3mm))
    (condition "A.Type =='Via'"))


### Others ###

(rule "Min Via diameter"
    (constraint via_diameter (min 0.5mm))
    (condition "A.Type =='Via'"))

(rule "Min annular ring PTH"
    (constraint annular_width (min 0.13mm))
    (condition "A.Pad_Type == 'Through-hole'"))

# For V-Cut line min clearance >= 0.4mm
(rule "Min Trace to Outline"
    (constraint edge_clearance (min 0.2mm))
    (condition "A.Type =='Track'"))

jlcpcb_1oz_4-6layer.kicad_dru

##############################
# MIT License
#
# Copyright (c) 2022 ZiTe
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in all
# copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
##############################
# JLCPCB's Capabilities
# 1oz Copper, 4/6 Layers
# 2022-Nov-23
# https://jlcpcb.com/capabilities/pcb-capabilities
##############################

(version 1)


### Trace Width and Spacing ###

(rule "Track to Track Clearance"
    (constraint clearance (min 0.09mm))
    (condition "A.Type =='Track' && B.Type =='Track'"))

(rule "Min Track width"
    (constraint track_width (min 0.09mm))
    (condition "A.Type =='Track'"))


### Min Clearance ###

(rule "Hole to Hole Clearance Different Nets"
	(constraint hole_to_hole (min 0.5mm))
	(condition "A.Type == 'Through-hole' && B.Type == 'Through-hole' && A.Net != B.Net"))

(rule "Pad to Pad Clearance  Different Nets"
    (constraint clearance (min 0.127mm))
    (condition "A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net"))

(rule "Via to Via Clearance Same Nets"
    (constraint hole_to_hole (min 0.254mm))
    (condition "A.Type =='Via' && B.Type =='Via' && A.Net == B.Net"))

(rule "Via Hole to Track Clearance"
    (constraint hole_clearance (min 0.254mm))
    (condition "A.Type == 'Via' && B.Type == 'Track'"))

(rule "PTH Hole to Track Clearance"
    (constraint hole_clearance (min 0.33mm))
    (condition "A.Type == 'Through-hole' && B.Type == 'Track'"))

(rule "NPTH Hole to Track Clearance"
    (constraint hole_clearance (min 0.33mm))
    (condition "A.Type == 'NPTH, mechanical' && B.Type == 'Track'"))

(rule "Pad to Track Clearance"
    (constraint clearance (min 0.2mm))
    (condition "A.Type =='Pad' && B.Type =='Track'"))


### Drill Hole Size ###

(rule "Min Drill Hole Size Mechanical"
    (constraint hole_size (min 0.5mm))
    (condition "A.Pad_Type == 'NPTH, mechanical'"))

(rule "Max Drill Hole Size Mechanical"
    (constraint hole_size (max 6.3mm))
    (condition "A.Pad_Type == 'NPTH, mechanical'"))

(rule "Min Drill Hole Size PTH"
    (constraint hole_size (min 0.2mm))
    (condition "A.Pad_Type == 'Through-hole'"))

(rule "Max Drill Hole Size PTH"
    (constraint hole_size (max 6.35mm))
    (condition "A.Pad_Type == 'Through-hole'"))

(rule "Min Drill Hole Size Via"
    (constraint hole_size (min 0.2mm))
    (condition "A.Type =='Via'"))


### Others ###

(rule "Min Via diameter"
    (constraint via_diameter (min 0.4mm))
    (condition "A.Type =='Via'"))

(rule "Min annular ring PTH"
    (constraint annular_width (min 0.13mm))
    (condition "A.Pad_Type == 'Through-hole'"))

# For V-Cut line min clearance >= 0.4mm
(rule "Min Trace to Outline"
    (constraint edge_clearance (min 0.2mm))
    (condition "A.Type =='Track'"))