GeOp EID 3208/3209

EEID3209

GeOp_EEID3209

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            |           |   GeOp     |
            |          /-----------|/ 
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            |                   |
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    	     General Operations
 Greater experience. Outstanding performance.




DCPU-16 Hardware Info:
	Name: EEID3209 - External Enhanced Image Display
	ID: 0x71b3846f, version 0x0c89
	Manufacturer: 0x21d9a430 (General Operations)



Description:
	The EEID3209 is a 96x96 pixel display for external use compatible with the DCPU-16.
	The display is made up of 32x16 32 bit cells. Each cell displays a self-defined 3x6 pixel array
	defined within the 32-bit cell. Each cell displays two uniquely-defined colors specified per cell
	Cells can be set to one of four blink-types utilizing the four-state clock. 

	The EEID3209 utilizes the new EID rich-color image format also utilized by 
	the EID3208 (Enhanced Image Display). It improves upon the previous 24-bit GeID image format
	with the addition of the four-state clock and enhanced 32 color pallet.

	The EEID3209 contains an external-use screen, and as such drains quite a bit of power. It is advised that
	the EEID3209 is held at a full black screen via the reserve word.

Interrupt behavior:
	When a HWI is received by the EEID3209, it reads the A register and the B register and attempts to load
	the expected input.

	If B is not 0, the EEID3209 will load B into the 16-bit reserve word.

	If A is not 0, the EEID3209 will load the ram of the DCPU-16, starting from the location defined by A
	into the loaded image slot.

Video ram: 
	The EEID3209 contains 4kb of stored image data, containing four full images

	Each image is 0x3ff words in length, two words for each cell of the display.
	The cells are defined in the EID rich-color format:
		aarrggbbrrggbbxx xxxxyyyyyyzzzzzz
	The first two bits define the clock state, followed by the color data for the foreground and background,
	respectively. The last two bits of the first word and first four of the second define the pixels of the
	foreground on the left, from top down. The next two sets of six bits similarly define foreground pixels,
	defining the middle and right columns.

Reserved word:
	The EEID3209 contains one word of data in addition to the stored image data, the 16 bits defined as:
		aabccddd
	Where A defines the loaded image, B defines if the blink-clock is enabled, C define the current clock 
	state (and are updated as the clock procedes), and d defines the display mode.

	If a = 00, the image data begins at 0x000 and ends at 0x3ff
	If a = 01, the image data begins at 0x400 and ends at 0x7ff
	If a = 10, the image data begins at 0x800 and ends at 0xbff
	If a = 11, the image data begins at 0xc00 and ends at 0xfff

	If b = 0, the clock state is held at the value contained in c
	If b = 1, the clock will cycle through the values within c

	c stores the clock state 0-3 (0b00, 0b01, 0b10, and 0b11), repeating when incrementing from 3 (0b11)

	d defines the display mode in three bits:
		abc
	If a = 0, the EEID3209 accesses the data stored for the images
		If b = 0, c defines whether the display uses direct-color or inverted color
			(C of 1 denotes inverted)
		If b = 1, the EEID3209 is set to half-speed blink. The bit of c acts as the new LSB for the clock
		for the purposes of incrementing, but the clock is still read from the normal bits
	If a = 1, the EEID3209 runs special display modes
		If b = 0 and c = 0, the EEID3209 will disable the display, consuming much less power
		If b = 0 and c = 1, the EEID3209 will display a fully white screen
		If b = 1 and c = 0, the EEID3209 will display the factory-default screen regardless of the loaded
		images. (The default screen is hard coded, and cannot be modified)
		If b = 1 and c = 1, the EEID3209 is set into reset mode. In this state, it clears all stored data
		and will not increment the clock. It displays the factory-default screen as long as it remains
		in this mode. It will not modify the saved data until it is released from this state.


The EID Rich-color image format:
	The EID RCI format defines the structure of data stored in video ram. 
		(See Video ram for specifications)

	The colors displayed corespond to the 8-bit RGB color spectrum, determined by the two bits for r,g, and b:

	00 coresponds to a value of   0 (0x00)
	01 coresponds to a value of  85 (0x55)
	10 coresponds to a value of 170 (0xaa)
	11 coresponds to a value of 255 (0xff)

The four-state clock:
	The EEID3209 uses a custom 4-state clock (states 0-3)
	Each cell contains one of four blink patterns:
		State: 0   1   2   3
		00 --  ON/ ON/ ON/ ON
		01 --  ON/OFF/ ON/OFF
		10 -- OFF/ ON/OFF/ ON
		11 --  ON/OFF/OFF/ ON

	With the toggle-able clock incrementation and increased blink functionality, the user can use the clock
	to both set advanced blink patters, and to store multiple variations of the same image based on the user-
	set clock state. 

EID3208

GeOp_EID3208

                _____________
              _/             \_
             /                 \
            |                   | 
            |          \-----------|\
            |           |   GeOp     |
            |          /-----------|/ 
            |                   |
            |                   |
             \_               _/
               \_____________/
 
 
    	     General Operations
 Greater experience. Outstanding performance.




DCPU-16 Hardware Info:
	Name: EID3208 - Enhanced Image Display
	ID: 0x71b3844e, version 0x0c88
	Manufacturer: 0x21d9a430 (General Operations)



Description:
	The EID3208 is a 96x96 pixel display for internal use compatible with the DCPU-16.
	The display is made up of 32x16 32 bit cells. Each cell displays a self-defined 3x6 pixel array
	defined within the 32-bit cell. Each cell displays two uniquely-defined colors specified per cell
	Cells can be set to one of four blink-types utilizing the four-state clock. 

	The EID3208 utilizes the new EID rich-color image format also utilized by 
	the EEID3209 (External Enhanced Image Display). It improves upon the previous 24-bit GeID image format
	with the addition of the four-state clock and enhanced 32 color pallet.

Interrupt behavior:
	When a HWI is received by the EID3208, it reads the A register and the B register and attempts to load
	the expected input.

	If B is not 0, the EID3208 will load B into the 16-bit reserve word.

	If A is not 0, the EID3208 will load the ram of the DCPU-16, starting from the location defined by A
	into the loaded image slot.

Video ram: 
	The EID3208 contains 4kb of stored image data, containing four full images

	Each image is 0x3ff words in length, two words for each cell of the display.
	The cells are defined in the EID rich-color format:
		aarrggbbrrggbbxx xxxxyyyyyyzzzzzz
	The first two bits define the clock state, followed by the color data for the foreground and background,
	respectively. The last two bits of the first word and first four of the second define the pixels of the
	foreground on the left, from top down. The next two sets of six bits similarly define foreground pixels,
	defining the middle and right columns.

Reserved word:
	The EID3208 contains one word of data in addition to the stored image data, the 16 bits defined as:
		aabccddd
	Where A defines the loaded image, B defines if the blink-clock is enabled, C define the current clock 
	state (and are updated as the clock procedes), and d defines the display mode.

	If a = 00, the image data begins at 0x000 and ends at 0x3ff
	If a = 01, the image data begins at 0x400 and ends at 0x7ff
	If a = 10, the image data begins at 0x800 and ends at 0xbff
	If a = 11, the image data begins at 0xc00 and ends at 0xfff

	If b = 0, the clock state is held at the value contained in c
	If b = 1, the clock will cycle through the values within c

	c stores the clock state 0-3 (0b00, 0b01, 0b10, and 0b11), repeating when incrementing from 3 (0b11)

	d defines the display mode in three bits:
		abc
	If a = 0, the EID3208 accesses the data stored for the images
		If b = 0, c defines whether the display uses direct-color or inverted color
			(C of 1 denotes inverted)
		If b = 1, the EID3208 is set to half-speed blink. The bit of c acts as the new LSB for the clock
		for the purposes of incrementing, but the clock is still read from the normal bits
	If a = 1, the EID3208 runs special display modes
		If b = 0, a full-color display is used, with all color bits set to c 
			(rendering the image as entirely black or entirely white)
		If b = 1 and c = 0, the EID3208 will display the factory-default screen regardless of the loaded
		images. (The default screen is hard coded, and cannot be modified)
		If b = 1 and c = 1, the EID3208 is set into reset mode. In this state, it clears all stored data
		and will not increment the clock. It displays the factory-default screen as long as it remains
		in this mode. It will not modify the saved data until it is released from this state.


The EID Rich-color image format:
	The EID RCI format defines the structure of data stored in video ram. 
		(See Video ram for specifications)

	The colors displayed corespond to the 8-bit RGB color spectrum, determined by the two bits for r,g, and b:

	00 coresponds to a value of   0 (0x00)
	01 coresponds to a value of  85 (0x55)
	10 coresponds to a value of 170 (0xaa)
	11 coresponds to a value of 255 (0xff)

The four-state clock:
	The EID3208 uses a custom 4-state clock (states 0-3)
	Each cell contains one of four blink patterns:
		State: 0   1   2   3
		00 --  ON/ ON/ ON/ ON
		01 --  ON/OFF/ ON/OFF
		10 -- OFF/ ON/OFF/ ON
		11 --  ON/OFF/OFF/ ON

	With the toggle-able clock incrementation and increased blink functionality, the user can use the clock
	to both set advanced blink patters, and to store multiple variations of the same image based on the user-
	set clock state.