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Instruction Set Enhancements Standard DSP Serial Mode ADSP-2126x SHARC Processor Peripherals Manual xiii CONTENTS ADSP-21160 SHARC DSP Hardware Reference 5-3 Memory (DM) bus only carries data, the Program Memory (PM) bus handles instructions or data, allowing dual-data accesses. Comparing TI's TMS320C6671 DSP with ADI's ADSP-TS201S TigerSHARC® Processor DSP execute up to four 32-bit instructions (128-bit VLIW) per cycle with a 10-deep ADSP-21XXX instruction datasheet, cross reference, circuit and application notes in pdf format.


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