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alphan/mask_rom_fpga_cw310.dis Secret

Created February 1, 2022 20:23
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Disassembly for #10522
Raw
mask_rom_fpga_cw310.dis
sw/device/silicon_creator/mask_rom/mask_rom_fpga_cw310.elf: file format elf32-littleriscv
Sections:
Idx Name Size VMA LMA File off Algn
0 .vectors 00000084 00008000 00008000 00001000 2**8
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .crt 0000031a 00008100 00008100 00001100 2**8
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .text 000033d8 0000841c 0000841c 0000141c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
3 .shutdown 00000190 0000b7f4 0000b7f4 000047f4 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
4 .rodata 00000808 0000b9a0 0000b9a0 000049a0 2**5
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .static_critical 00000650 10000000 10000000 00006000 2**2
ALLOC
6 .data 00000040 10000650 0000c1a8 00005650 2**3
CONTENTS, ALLOC, LOAD, DATA
7 .bss 000000b8 10000690 0000c1e8 00005690 2**2
ALLOC
8 .riscv.attributes 00000026 00000000 00000000 00005690 2**0
CONTENTS, READONLY
9 .debug_info 000121f6 00000000 00000000 000056b6 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_abbrev 0000387f 00000000 00000000 000178ac 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_aranges 00000088 00000000 00000000 0001b12b 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_line 0000b9e7 00000000 00000000 0001b1b3 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_loc 0000b28f 00000000 00000000 00026b9a 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_ranges 00000f70 00000000 00000000 00031e29 2**0
CONTENTS, READONLY, DEBUGGING
15 .debug_str 00006dd3 00000000 00000000 00032d99 2**0
CONTENTS, READONLY, DEBUGGING
16 .debug_frame 00001358 00000000 00000000 00039b6c 2**2
CONTENTS, READONLY, DEBUGGING
Disassembly of section .vectors:
00008000 <_mask_rom_interrupt_vector_asm>:
_mask_rom_interrupt_vector_asm():
8000: 2f40006f j 82f4 <_asm_exception_handler>
8004: 2f00006f j 82f4 <_asm_exception_handler>
8008: 2ec0006f j 82f4 <_asm_exception_handler>
800c: 2e80006f j 82f4 <_asm_exception_handler>
8010: 2e40006f j 82f4 <_asm_exception_handler>
8014: 2e00006f j 82f4 <_asm_exception_handler>
8018: 2dc0006f j 82f4 <_asm_exception_handler>
801c: 2d80006f j 82f4 <_asm_exception_handler>
8020: 2d40006f j 82f4 <_asm_exception_handler>
8024: 2d00006f j 82f4 <_asm_exception_handler>
8028: 2cc0006f j 82f4 <_asm_exception_handler>
802c: 2c80006f j 82f4 <_asm_exception_handler>
8030: 2c40006f j 82f4 <_asm_exception_handler>
8034: 2c00006f j 82f4 <_asm_exception_handler>
8038: 2bc0006f j 82f4 <_asm_exception_handler>
803c: 2b80006f j 82f4 <_asm_exception_handler>
8040: 2b40006f j 82f4 <_asm_exception_handler>
8044: 2b00006f j 82f4 <_asm_exception_handler>
8048: 2ac0006f j 82f4 <_asm_exception_handler>
804c: 2a80006f j 82f4 <_asm_exception_handler>
8050: 2a40006f j 82f4 <_asm_exception_handler>
8054: 2a00006f j 82f4 <_asm_exception_handler>
8058: 29c0006f j 82f4 <_asm_exception_handler>
805c: 2980006f j 82f4 <_asm_exception_handler>
8060: 2940006f j 82f4 <_asm_exception_handler>
8064: 2900006f j 82f4 <_asm_exception_handler>
8068: 28c0006f j 82f4 <_asm_exception_handler>
806c: 2880006f j 82f4 <_asm_exception_handler>
8070: 2840006f j 82f4 <_asm_exception_handler>
8074: 2800006f j 82f4 <_asm_exception_handler>
8078: 27c0006f j 82f4 <_asm_exception_handler>
807c: 2780006f j 82f4 <_asm_exception_handler>
8080: 1000006f j 8180 <_mask_rom_start_boot>
Disassembly of section .crt:
00008100 <_mask_rom_interrupt_vector_c>:
_mask_rom_interrupt_vector_c():
8100: 1cc0006f j 82cc <mask_rom_exception_handler>
8104: 1c80006f j 82cc <mask_rom_exception_handler>
8108: 1c40006f j 82cc <mask_rom_exception_handler>
810c: 1c00006f j 82cc <mask_rom_exception_handler>
8110: 1bc0006f j 82cc <mask_rom_exception_handler>
8114: 1b80006f j 82cc <mask_rom_exception_handler>
8118: 1b40006f j 82cc <mask_rom_exception_handler>
811c: 1b00006f j 82cc <mask_rom_exception_handler>
8120: 1ac0006f j 82cc <mask_rom_exception_handler>
8124: 1a80006f j 82cc <mask_rom_exception_handler>
8128: 1a40006f j 82cc <mask_rom_exception_handler>
812c: 1a00006f j 82cc <mask_rom_exception_handler>
8130: 19c0006f j 82cc <mask_rom_exception_handler>
8134: 1980006f j 82cc <mask_rom_exception_handler>
8138: 1940006f j 82cc <mask_rom_exception_handler>
813c: 1900006f j 82cc <mask_rom_exception_handler>
8140: 18c0006f j 82cc <mask_rom_exception_handler>
8144: 1880006f j 82cc <mask_rom_exception_handler>
8148: 1840006f j 82cc <mask_rom_exception_handler>
814c: 1800006f j 82cc <mask_rom_exception_handler>
8150: 17c0006f j 82cc <mask_rom_exception_handler>
8154: 1780006f j 82cc <mask_rom_exception_handler>
8158: 1740006f j 82cc <mask_rom_exception_handler>
815c: 1700006f j 82cc <mask_rom_exception_handler>
8160: 16c0006f j 82cc <mask_rom_exception_handler>
8164: 1680006f j 82cc <mask_rom_exception_handler>
8168: 1640006f j 82cc <mask_rom_exception_handler>
816c: 1600006f j 82cc <mask_rom_exception_handler>
8170: 15c0006f j 82cc <mask_rom_exception_handler>
8174: 1580006f j 82cc <mask_rom_exception_handler>
8178: 1540006f j 82cc <mask_rom_exception_handler>
817c: 1500006f j 82cc <mask_rom_exception_handler>
00008180 <_mask_rom_start_boot>:
_mask_rom_start_boot():
8180: 404002b7 lui t0,0x40400
8184: 537d li t1,-1
8186: 0262a623 sw t1,44(t0) # 4040002c <_stack_end+0x303e002c>
818a: 4305 li t1,1
818c: 0062ac23 sw t1,24(t0)
8190: 404702b7 lui t0,0x40470
8194: 537d li t1,-1
8196: 0062ae23 sw t1,28(t0) # 4047001c <_stack_end+0x3045001c>
819a: 537d li t1,-1
819c: 0062ac23 sw t1,24(t0)
81a0: 4305 li t1,1
81a2: 0062aa23 sw t1,20(t0)
81a6: 72c5 lui t0,0xffff1
81a8: 88828293 addi t0,t0,-1912 # ffff0888 <_stack_end+0xeffd0888>
81ac: 3042b073 csrc mie,t0
81b0: 401312b7 lui t0,0x40131
81b4: 0c028293 addi t0,t0,192 # 401310c0 <_stack_end+0x301110c0>
81b8: 4329 li t1,10
81ba: 02629a63 bne t0,t1,81ee <_mask_rom_start_boot+0x6e>
81be: 40480537 lui a0,0x40480
81c2: 404805b7 lui a1,0x40480
81c6: 08058593 addi a1,a1,128 # 40480080 <_stack_end+0x30460080>
81ca: 40131637 lui a2,0x40131
81ce: 04060613 addi a2,a2,64 # 40131040 <_stack_end+0x30111040>
81d2: 00000097 auipc ra,0x0
81d6: 20e080e7 jalr 526(ra) # 83e0 <crt_section_copy>
81da: 40490537 lui a0,0x40490
81de: 01852283 lw t0,24(a0) # 40490018 <_stack_end+0x30470018>
81e2: 0002d293 srli t0,t0,0x0
81e6: 0012f293 andi t0,t0,1
81ea: fe028ae3 beqz t0,81de <_mask_rom_start_boot+0x5e>
81ee: 41160537 lui a0,0x41160
81f2: 005552b7 lui t0,0x555
81f6: 05528293 addi t0,t0,85 # 555055 <_chip_info_end+0x545055>
81fa: 02552023 sw t0,32(a0) # 41160020 <_stack_end+0x31140020>
81fe: 42a9 li t0,10
8200: 00552e23 sw t0,28(a0)
8204: 41150537 lui a0,0x41150
8208: 6285 lui t0,0x1
820a: aaa28293 addi t0,t0,-1366 # aaa <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x48a>
820e: 00552a23 sw t0,20(a0) # 41150014 <_stack_end+0x31130014>
8212: 41170537 lui a0,0x41170
8216: 6295 lui t0,0x5
8218: 5aa28293 addi t0,t0,1450 # 55aa <_epmp_text_tor_hi+0x2749>
821c: 00552a23 sw t0,20(a0) # 41170014 <_stack_end+0x31150014>
8220: 411c0537 lui a0,0x411c0
8224: 458d li a1,3
8226: c94c sw a1,20(a0)
8228: 4081 li ra,0
822a: 4101 li sp,0
822c: 4181 li gp,0
822e: 4201 li tp,0
8230: 4281 li t0,0
8232: 4301 li t1,0
8234: 4381 li t2,0
8236: 4401 li s0,0
8238: 4481 li s1,0
823a: 4501 li a0,0
823c: 4581 li a1,0
823e: 4601 li a2,0
8240: 4681 li a3,0
8242: 4701 li a4,0
8244: 4781 li a5,0
8246: 4801 li a6,0
8248: 4881 li a7,0
824a: 4901 li s2,0
824c: 4981 li s3,0
824e: 4a01 li s4,0
8250: 4a81 li s5,0
8252: 4b01 li s6,0
8254: 4b81 li s7,0
8256: 4c01 li s8,0
8258: 4c81 li s9,0
825a: 4d01 li s10,0
825c: 4d81 li s11,0
825e: 4e01 li t3,0
8260: 4e81 li t4,0
8262: 4f01 li t5,0
8264: 4f81 li t6,0
8266: 00000097 auipc ra,0x0
826a: 0a6080e7 jalr 166(ra) # 830c <mask_rom_epmp_init>
826e: 0fff8517 auipc a0,0xfff8
8272: 3e250513 addi a0,a0,994 # 10000650 <kBootDataDefault>
8276: 0fff8597 auipc a1,0xfff8
827a: 41a58593 addi a1,a1,1050 # 10000690 <_data_end>
827e: 00004617 auipc a2,0x4
8282: f2a60613 addi a2,a2,-214 # c1a8 <_data_init_start>
8286: 00000097 auipc ra,0x0
828a: 15a080e7 jalr 346(ra) # 83e0 <crt_section_copy>
828e: 0fff8517 auipc a0,0xfff8
8292: 40250513 addi a0,a0,1026 # 10000690 <_data_end>
8296: 0fff8597 auipc a1,0xfff8
829a: 4b258593 addi a1,a1,1202 # 10000748 <_bss_end>
829e: 00000097 auipc ra,0x0
82a2: 11e080e7 jalr 286(ra) # 83bc <crt_section_clear>
82a6: 10018117 auipc sp,0x10018
82aa: d4a10113 addi sp,sp,-694 # 1001fff0 <_stack_start+0x1ff0>
82ae: 0fff9197 auipc gp,0xfff9
82b2: ba218193 addi gp,gp,-1118 # 10000e50 <__global_pointer$>
82b6: 00000297 auipc t0,0x0
82ba: e4b28293 addi t0,t0,-437 # 8101 <_mask_rom_interrupt_vector_c+0x1>
82be: 30529073 csrw mtvec,t0
82c2: 00000317 auipc t1,0x0
82c6: 15a30067 jr 346(t1) # 841c <mask_rom_main>
82ca: 0000 unimp
000082cc <mask_rom_exception_handler>:
mask_rom_interrupt_handler():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:215
// `mask_rom_try_boot` will not return unless there is an error.
shutdown_finalize(mask_rom_try_boot());
}
void mask_rom_interrupt_handler(void) {
82cc: 7139 addi sp,sp,-64
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:216
shutdown_finalize(mask_rom_irq_error());
82ce: de06 sw ra,60(sp)
82d0: dc16 sw t0,56(sp)
82d2: da1a sw t1,52(sp)
82d4: d81e sw t2,48(sp)
82d6: d62a sw a0,44(sp)
82d8: d42e sw a1,40(sp)
82da: d232 sw a2,36(sp)
82dc: d036 sw a3,32(sp)
82de: ce3a sw a4,28(sp)
82e0: cc3e sw a5,24(sp)
82e2: ca42 sw a6,20(sp)
82e4: c846 sw a7,16(sp)
82e6: c672 sw t3,12(sp)
82e8: c476 sw t4,8(sp)
82ea: c27a sw t5,4(sp)
82ec: c07e sw t6,0(sp)
82ee: 263d jal 861c <mask_rom_irq_error>
82f0: 504030ef jal ra,b7f4 <shutdown_finalize>
000082f4 <_asm_exception_handler>:
_asm_exception_handler():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/irq_asm.S:28
.globl _asm_exception_handler
.type _asm_exception_handler, @function
_asm_exception_handler:
.L_exception_loop:
// Request a system reset.
li t0, TOP_EARLGREY_RSTMGR_AON_BASE_ADDR
82f4: 404102b7 lui t0,0x40410
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/irq_asm.S:29
li t1, MULTIBIT_ASM_BOOL4_TRUE
82f8: 4329 li t1,10
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/irq_asm.S:30
sw t1, RSTMGR_RESET_REQ_REG_OFFSET(t0)
82fa: 0062a223 sw t1,4(t0) # 40410004 <_stack_end+0x303f0004>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/irq_asm.S:36
// Disable access to flash.
//
// This is done after requesting a reset so that this function will
// work even if it is in flash.
li t0, TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR
82fe: 410002b7 lui t0,0x41000
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/irq_asm.S:37
sw zero, FLASH_CTRL_DIS_REG_OFFSET(t0)
8302: 0002a823 sw zero,16(t0) # 41000010 <_stack_end+0x30fe0010>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/irq_asm.S:39
wfi
8306: 10500073 wfi
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/irq_asm.S:40
j .L_exception_loop
830a: b7ed j 82f4 <_asm_exception_handler>
0000830c <mask_rom_epmp_init>:
mask_rom_epmp_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:58
mask_rom_epmp_init:
.globl mask_rom_epmp_init
.type mask_rom_epmp_init, @function
// Enable Rule Locking Bypass (RLB).
csrsi EPMP_MSECCFG, EPMP_MSECCFG_RLB
830c: 74726073 csrsi 0x747,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:61
// Clear all PMP configuration registers.
csrw pmpcfg0, zero
8310: 3a001073 csrw pmpcfg0,zero
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:62
csrw pmpcfg1, zero
8314: 3a101073 csrw pmpcfg1,zero
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:63
csrw pmpcfg2, zero
8318: 3a201073 csrw pmpcfg2,zero
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:64
csrw pmpcfg3, zero
831c: 3a301073 csrw pmpcfg3,zero
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:74
.extern _epmp_stack_guard_na4
// Setup PMP address registers.
// ROM TEXT
la t0, _epmp_text_tor_lo
8320: ffffa297 auipc t0,0xffffa
8324: ce028293 addi t0,t0,-800 # 2000 <_epmp_text_tor_lo>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:75
csrw pmpaddr0, t0
8328: 3b029073 csrw pmpaddr0,t0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:76
la t0, _epmp_text_tor_hi
832c: ffffb297 auipc t0,0xffffb
8330: b3528293 addi t0,t0,-1227 # 2e61 <_epmp_text_tor_hi>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:77
csrw pmpaddr1, t0
8334: 3b129073 csrw pmpaddr1,t0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:80
// ROM
li t0, NAPOT(TOP_EARLGREY_ROM_BASE_ADDR, TOP_EARLGREY_ROM_SIZE_BYTES)
8338: 628d lui t0,0x3
833a: 12fd addi t0,t0,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:81
csrw pmpaddr2, t0
833c: 3b229073 csrw pmpaddr2,t0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:84
// ROM_EXT TEXT (configured after signature verification)
csrw pmpaddr3, zero // ROM_EXT TEXT low
8340: 3b301073 csrw pmpaddr3,zero
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:85
csrw pmpaddr4, zero // ROM_EXT TEXT high
8344: 3b401073 csrw pmpaddr4,zero
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:88
// eFLASH
li t0, NAPOT(TOP_EARLGREY_EFLASH_BASE_ADDR, TOP_EARLGREY_EFLASH_SIZE_BYTES)
8348: 080202b7 lui t0,0x8020
834c: 12fd addi t0,t0,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:89
csrw pmpaddr5, t0
834e: 3b529073 csrw pmpaddr5,t0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:92
// Free entries
csrw pmpaddr6, zero
8352: 3b601073 csrw pmpaddr6,zero
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:93
csrw pmpaddr7, zero
8356: 3b701073 csrw pmpaddr7,zero
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:94
csrw pmpaddr8, zero
835a: 3b801073 csrw pmpaddr8,zero
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:95
csrw pmpaddr9, zero
835e: 3b901073 csrw pmpaddr9,zero
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:98
// MMIO
li t0, TOR(0x40000000) // TODO(#7117): generate MMIO start address.
8362: 100002b7 lui t0,0x10000
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:99
csrw pmpaddr10, t0
8366: 3ba29073 csrw pmpaddr10,t0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:100
li t0, TOR(0x50000000) // TODO(#7117): generate MMIO end address.
836a: 140002b7 lui t0,0x14000
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:101
csrw pmpaddr11, t0
836e: 3bb29073 csrw pmpaddr11,t0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:104
// Free entries
csrw pmpaddr12, zero
8372: 3bc01073 csrw pmpaddr12,zero
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:105
csrw pmpaddr13, zero
8376: 3bd01073 csrw pmpaddr13,zero
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:108
// Stack guard
la t0, _epmp_stack_guard_na4
837a: 03fff297 auipc t0,0x3fff
837e: 48628293 addi t0,t0,1158 # 4007800 <_epmp_stack_guard_na4>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:109
csrw pmpaddr14, t0
8382: 3be29073 csrw pmpaddr14,t0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:112
// RAM
li t0, NAPOT(TOP_EARLGREY_RAM_MAIN_BASE_ADDR, TOP_EARLGREY_RAM_MAIN_SIZE_BYTES)
8386: 040042b7 lui t0,0x4004
838a: 12fd addi t0,t0,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:113
csrw pmpaddr15, t0
838c: 3bf29073 csrw pmpaddr15,t0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:116
// Set PMP configuration registers.
li t0, CFG_INDEX(1 % 4, EPMP_CFG_A_TOR | EPMP_CFG_LRX) | /* ROM TEXT */ \
8390: 009992b7 lui t0,0x999
8394: d0028293 addi t0,t0,-768 # 998d00 <_chip_info_end+0x988d00>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:118
CFG_INDEX(2 % 4, EPMP_CFG_A_NAPOT | EPMP_CFG_LR) /* ROM */
li t1, CFG_INDEX(5 % 4, EPMP_CFG_A_NAPOT | EPMP_CFG_LR) /* eFLASH */
8398: 6329 lui t1,0xa
839a: 90030313 addi t1,t1,-1792 # 9900 <sec_mmio_check_values+0x5c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:119
li t2, CFG_INDEX(11 % 4, EPMP_CFG_A_TOR | EPMP_CFG_LRW) /* MMIO */
839e: 8b0003b7 lui t2,0x8b000
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:120
li t3, CFG_INDEX(14 % 4, EPMP_CFG_A_NA4 | EPMP_CFG_L) | /* Stack Guard */ \
83a2: 9b900e37 lui t3,0x9b900
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:122
CFG_INDEX(15 % 4, EPMP_CFG_A_NAPOT | EPMP_CFG_LRW) /* RAM */
csrw pmpcfg0, t0
83a6: 3a029073 csrw pmpcfg0,t0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:123
csrw pmpcfg1, t1
83aa: 3a131073 csrw pmpcfg1,t1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:124
csrw pmpcfg2, t2
83ae: 3a239073 csrw pmpcfg2,t2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:125
csrw pmpcfg3, t3
83b2: 3a3e1073 csrw pmpcfg3,t3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:129
// Enable Machine Mode Whitelist Policy (MMWP).
// TODO(#5653): Enable Machine Mode Lockdown (MML)?
csrsi EPMP_MSECCFG, EPMP_MSECCFG_MMWP
83b6: 74716073 csrsi 0x747,2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.S:131
ret
83ba: 8082 ret
000083bc <crt_section_clear>:
crt_section_clear():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:36
crt_section_clear:
.globl crt_section_clear
.type crt_section_clear, @function
// Check that start is before end.
bgeu a0, a1, L_clear_nothing
83bc: 00b57e63 bgeu a0,a1,83d8 <L_clear_nothing>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:39
// Check that start and end are word aligned.
or t0, a0, a1
83c0: 00b562b3 or t0,a0,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:40
andi t0, t0, 0x3
83c4: 0032f293 andi t0,t0,3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:41
bnez t0, L_clear_error
83c8: 00029b63 bnez t0,83de <L_clear_error>
000083cc <L_clear_loop>:
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:46
L_clear_loop:
// Write zero into section memory word-by-word.
// TODO: unroll
sw zero, 0(a0)
83cc: 00052023 sw zero,0(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:47
addi a0, a0, 4
83d0: 0511 addi a0,a0,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:48
bltu a0, a1, L_clear_loop
83d2: feb56de3 bltu a0,a1,83cc <L_clear_loop>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:49
ret
83d6: 8082 ret
000083d8 <L_clear_nothing>:
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:54
L_clear_nothing:
// If section length is 0 just return. Otherwise end is before start
// which is invalid so trigger an error.
bne a0, a1, L_clear_error
83d8: 00b51363 bne a0,a1,83de <L_clear_error>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:55
ret
83dc: 8082 ret
000083de <L_clear_error>:
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:58
L_clear_error:
unimp
83de: 0000 unimp
000083e0 <crt_section_copy>:
crt_section_copy():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:87
crt_section_copy:
.global crt_section_copy
.type crt_section_copy, @function
// Check that start is before end.
bgeu a0, a1, L_copy_nothing
83e0: 02b57963 bgeu a0,a1,8412 <L_copy_nothing>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:90
// Check that start, end and src are word aligned.
or t0, a0, a1
83e4: 00b562b3 or t0,a0,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:91
or t0, t0, a2
83e8: 00c2e2b3 or t0,t0,a2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:92
andi t0, t0, 0x3
83ec: 0032f293 andi t0,t0,3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:93
bnez t0, L_copy_error
83f0: 02029463 bnez t0,8418 <L_copy_error>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:110
// +-------------+
// | |
// start end
//
// TODO: disallow all overlap since it indicates API misuse?
sub t0, a0, a2 // (start - src) mod 2**32
83f4: 40c502b3 sub t0,a0,a2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:111
sub t1, a1, a0 // end - start
83f8: 40a58333 sub t1,a1,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:112
bltu t0, t1, L_copy_error
83fc: 0062ee63 bltu t0,t1,8418 <L_copy_error>
00008400 <L_copy_loop>:
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:117
L_copy_loop:
// Copy data from src into section word-by-word.
// TODO: unroll
lw t0, 0(a2)
8400: 00062283 lw t0,0(a2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:118
addi a2, a2, 4
8404: 0611 addi a2,a2,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:119
sw t0, 0(a0)
8406: 00552023 sw t0,0(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:120
addi a0, a0, 4
840a: 0511 addi a0,a0,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:121
bltu a0, a1, L_copy_loop
840c: feb56ae3 bltu a0,a1,8400 <L_copy_loop>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:122
ret
8410: 8082 ret
00008412 <L_copy_nothing>:
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:127
L_copy_nothing:
// If section length is 0 just return. Otherwise end is before start
// which is invalid so trigger an error.
bne a0, a1, L_copy_error
8412: 00b51363 bne a0,a1,8418 <L_copy_error>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:128
ret
8416: 8082 ret
00008418 <L_copy_error>:
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/crt/crt.S:131
L_copy_error:
unimp
8418: 0000 unimp
Disassembly of section .text:
0000841c <mask_rom_main>:
mask_rom_main():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:199
void mask_rom_main(void) {
841c: 1141 addi sp,sp,-16
mask_rom_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:68
sec_mmio_init();
841e: c606 sw ra,12(sp)
8420: 2b4010ef jal ra,96d4 <sec_mmio_init>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:70
pinmux_init();
8424: 04f010ef jal ra,9c72 <pinmux_init>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:72
uart_init(kUartNCOValue);
8428: 00004517 auipc a0,0x4
842c: 8f850513 addi a0,a0,-1800 # bd20 <kUartNCOValue>
8430: 4108 lw a0,0(a0)
8432: 143010ef jal ra,9d74 <uart_init>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:74
lc_state = lifecycle_state_get();
8436: 634010ef jal ra,9a6a <lifecycle_state_get>
843a: 0fff8597 auipc a1,0xfff8
843e: 25658593 addi a1,a1,598 # 10000690 <_data_end>
8442: c188 sw a0,0(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:75
RETURN_IF_ERROR(shutdown_init(lc_state));
8444: 265010ef jal ra,9ea8 <shutdown_init>
8448: 73900593 li a1,1849
844c: 04b51c63 bne a0,a1,84a4 <mask_rom_main+0x88>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:76
flash_ctrl_init();
8450: 221000ef jal ra,8e70 <flash_ctrl_init>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:78
mask_rom_epmp_state_init(&epmp);
8454: 0fff8517 auipc a0,0xfff8
8458: 24450513 addi a0,a0,580 # 10000698 <epmp>
845c: 79f010ef jal ra,a3fa <mask_rom_epmp_state_init>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:90
uint32_t reset_reasons = rstmgr_reason_get();
8460: 0dd010ef jal ra,9d3c <rstmgr_reason_get>
bitfield_bit32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:125
*/
BITFIELD_WARN_UNUSED_RESULT
inline bool bitfield_bit32_read(uint32_t bitfield,
bitfield_bit32_index_t bit_index) {
return bitfield_field32_read(bitfield,
bitfield_bit32_to_field32(bit_index)) == 0x1u;
8464: 8905 andi a0,a0,1
mask_rom_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:91
if (bitfield_bit32_read(reset_reasons, kRstmgrReasonPowerOn)) {
8466: c119 beqz a0,846c <mask_rom_main+0x50>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:92
retention_sram_clear();
8468: 03f010ef jal ra,9ca6 <retention_sram_clear>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:95
sec_mmio_check_values(rnd_uint32());
846c: 0a5010ef jal ra,9d10 <rnd_uint32>
8470: 434010ef jal ra,98a4 <sec_mmio_check_values>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:96
sec_mmio_check_counters(/*expected_check_count=*/1);
8474: 4505 li a0,1
8476: 4a8010ef jal ra,991e <sec_mmio_check_counters>
mask_rom_main():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:204
log_printf("OpenTitan: \"version-tag\"\r\n");
847a: 00004517 auipc a0,0x4
847e: 8b250513 addi a0,a0,-1870 # bd2c <kDeviceLogBypassUartAddress+0x4>
8482: 153010ef jal ra,9dd4 <log_printf>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:205
log_printf("lc_state: 0x%x\r\n", (unsigned int)lifecycle_raw_state_get());
8486: 794010ef jal ra,9c1a <lifecycle_raw_state_get>
848a: 85aa mv a1,a0
848c: 00004517 auipc a0,0x4
8490: 8bb50513 addi a0,a0,-1861 # bd47 <kDeviceLogBypassUartAddress+0x1f>
8494: 141010ef jal ra,9dd4 <log_printf>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:209
SHUTDOWN_IF_ERROR(primitive_bootstrap());
8498: 2255 jal 863c <primitive_bootstrap>
849a: 73900593 li a1,1849
849e: 00b51363 bne a0,a1,84a4 <mask_rom_main+0x88>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:212
shutdown_finalize(mask_rom_try_boot());
84a2: 2019 jal 84a8 <mask_rom_try_boot>
84a4: 350030ef jal ra,b7f4 <shutdown_finalize>
000084a8 <mask_rom_try_boot>:
mask_rom_try_boot():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:181
static rom_error_t mask_rom_try_boot(void) {
84a8: 7175 addi sp,sp,-144
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:182
boot_policy_manifests_t manifests = boot_policy_manifests_get();
84aa: c706 sw ra,140(sp)
84ac: c522 sw s0,136(sp)
84ae: c326 sw s1,132(sp)
84b0: c14a sw s2,128(sp)
84b2: dece sw s3,124(sp)
84b4: dcd2 sw s4,120(sp)
84b6: dad6 sw s5,116(sp)
84b8: d8da sw s6,112(sp)
84ba: d6de sw s7,108(sp)
84bc: d4e2 sw s8,104(sp)
84be: d2e6 sw s9,100(sp)
84c0: 5e7020ef jal ra,b2a6 <boot_policy_manifests_get>
84c4: 4601 li a2,0
84c6: c42a sw a0,8(sp)
84c8: c62e sw a1,12(sp)
84ca: 00810b93 addi s7,sp,8
84ce: 0fff8c97 auipc s9,0xfff8
84d2: 1c2c8c93 addi s9,s9,450 # 10000690 <_data_end>
84d6: 73900c13 li s8,1849
84da: 06010913 addi s2,sp,96
84de: 03010993 addi s3,sp,48
84e2: 01010a93 addi s5,sp,16
84e6: 00410a13 addi s4,sp,4
84ea: 84b2 mv s1,a2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:186
error = mask_rom_verify(manifests.ordered[i], &flash_exec);
84ec: 00261513 slli a0,a2,0x2
84f0: 955e add a0,a0,s7
84f2: 4100 lw s0,0(a0)
mask_rom_verify():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:114
RETURN_IF_ERROR(boot_policy_manifest_check(lc_state, manifest));
84f4: 000ca503 lw a0,0(s9)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:113
*flash_exec = 0;
84f8: c202 sw zero,4(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:114
RETURN_IF_ERROR(boot_policy_manifest_check(lc_state, manifest));
84fa: 85a2 mv a1,s0
84fc: 5cf020ef jal ra,b2ca <boot_policy_manifest_check>
8500: 05851d63 bne a0,s8,855a <mask_rom_try_boot+0xb2>
sigverify_rsa_key_id_get():
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/sigverify.h:42
* @param key An RSA public key.
* @return ID of the key.
*/
inline uint32_t sigverify_rsa_key_id_get(
const sigverify_rsa_buffer_t *modulus) {
return modulus->data[0];
8504: 1b042503 lw a0,432(s0)
mask_rom_verify():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:117
RETURN_IF_ERROR(sigverify_rsa_key_get(
8508: 000ca583 lw a1,0(s9)
850c: 864a mv a2,s2
850e: 0f4020ef jal ra,a602 <sigverify_rsa_key_get>
8512: 05851463 bne a0,s8,855a <mask_rom_try_boot+0xb2>
8516: 1b040b13 addi s6,s0,432
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:120
hmac_sha256_init();
851a: 0b1000ef jal ra,8dca <hmac_sha256_init>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:123
sigverify_usage_constraints_get(manifest->usage_constraints.selector_bits,
851e: 18042503 lw a0,384(s0)
8522: 85ce mv a1,s3
8524: 6a6020ef jal ra,abca <sigverify_usage_constraints_get>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:125
hmac_sha256_update(&usage_constraints_from_hw,
8528: 03000593 li a1,48
852c: 854e mv a0,s3
852e: 0b7000ef jal ra,8de4 <hmac_sha256_update>
manifest_digest_region_get():
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/manifest.h:319
kDigestRegionOffset =
sizeof(manifest->signature) + sizeof(manifest->usage_constraints),
};
return (manifest_digest_region_t){
.start = (const char *)manifest + kDigestRegionOffset,
.length = manifest->length - kDigestRegionOffset,
8532: 33842503 lw a0,824(s0)
8536: e5050593 addi a1,a0,-432
mask_rom_verify():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:130
hmac_sha256_update(digest_region.start, digest_region.length);
853a: 855a mv a0,s6
853c: 0a9000ef jal ra,8de4 <hmac_sha256_update>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:133
hmac_sha256_final(&act_digest);
8540: 8556 mv a0,s5
8542: 0f9000ef jal ra,8e3a <hmac_sha256_final>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:134
return sigverify_rsa_verify(&manifest->signature, key, &act_digest, lc_state,
8546: 5586 lw a1,96(sp)
8548: 000ca683 lw a3,0(s9)
854c: 8522 mv a0,s0
854e: 8656 mv a2,s5
8550: 8752 mv a4,s4
8552: 3ee020ef jal ra,a940 <sigverify_rsa_verify>
mask_rom_try_boot():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:187
if (error != kErrorOk) {
8556: 03850163 beq a0,s8,8578 <mask_rom_try_boot+0xd0>
855a: 4605 li a2,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:184
for (size_t i = 0; i < ARRAYSIZE(manifests.ordered); ++i) {
855c: d4d9 beqz s1,84ea <mask_rom_try_boot+0x42>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:197
}
855e: 5c96 lw s9,100(sp)
8560: 5c26 lw s8,104(sp)
8562: 5bb6 lw s7,108(sp)
8564: 5b46 lw s6,112(sp)
8566: 5ad6 lw s5,116(sp)
8568: 5a66 lw s4,120(sp)
856a: 59f6 lw s3,124(sp)
856c: 490a lw s2,128(sp)
856e: 449a lw s1,132(sp)
8570: 442a lw s0,136(sp)
8572: 40ba lw ra,140(sp)
8574: 6149 addi sp,sp,144
8576: 8082 ret
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:191
RETURN_IF_ERROR(mask_rom_boot(manifests.ordered[i], flash_exec));
8578: 4912 lw s2,4(sp)
mask_rom_boot():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:150
RETURN_IF_ERROR(keymgr_state_check(kKeymgrStateReset));
857a: 4501 li a0,0
857c: 4ec010ef jal ra,9a68 <keymgr_state_check>
8580: 73900993 li s3,1849
8584: fd351de3 bne a0,s3,855e <mask_rom_try_boot+0xb6>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:151
keymgr_sw_binding_set(&manifest->binding_value, &manifest->binding_value);
8588: 35040513 addi a0,s0,848
858c: 85aa mv a1,a0
858e: 44a010ef jal ra,99d8 <keymgr_sw_binding_set>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:152
keymgr_creator_max_ver_set(manifest->max_key_version);
8592: 37042503 lw a0,880(s0)
8596: 4ae010ef jal ra,9a44 <keymgr_creator_max_ver_set>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:155
flash_ctrl_exec_set(flash_exec);
859a: 854a mv a0,s2
859c: 56b000ef jal ra,9306 <flash_ctrl_exec_set>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:158
HARDENED_CHECK_EQ(lc_state, lifecycle_state_get());
85a0: 000ca483 lw s1,0(s9)
85a4: 4c6010ef jal ra,9a6a <lifecycle_state_get>
85a8: 00a48663 beq s1,a0,85b4 <mask_rom_try_boot+0x10c>
85ac: 0000 unimp
85ae: 0000 unimp
85b0: 0000 unimp
85b2: 0000 unimp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:160
sec_mmio_check_values(rnd_uint32());
85b4: 75c010ef jal ra,9d10 <rnd_uint32>
85b8: 2ec010ef jal ra,98a4 <sec_mmio_check_values>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:161
sec_mmio_check_counters(/*expected_check_count=*/3);
85bc: 450d li a0,3
85be: 360010ef jal ra,991e <sec_mmio_check_counters>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:164
RETURN_IF_ERROR(epmp_state_check(&epmp));
85c2: 0fff8517 auipc a0,0xfff8
85c6: 0d650513 addi a0,a0,214 # 10000698 <epmp>
85ca: 6e1010ef jal ra,a4aa <epmp_state_check>
85ce: f93518e3 bne a0,s3,855e <mask_rom_try_boot+0xb6>
manifest_code_region_get():
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/manifest.h:331
* @param manifest A manifest.
* return Executable region of the image.
*/
inline epmp_region_t manifest_code_region_get(const manifest_t *manifest) {
return (epmp_region_t){
.start = (uintptr_t)manifest + manifest->code_start,
85d2: 37442503 lw a0,884(s0)
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/manifest.h:332
.end = (uintptr_t)manifest + manifest->code_end,
85d6: 37842603 lw a2,888(s0)
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/manifest.h:331
.start = (uintptr_t)manifest + manifest->code_start,
85da: 008505b3 add a1,a0,s0
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/manifest.h:332
.end = (uintptr_t)manifest + manifest->code_end,
85de: 9622 add a2,a2,s0
mask_rom_boot():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:165
mask_rom_epmp_unlock_rom_ext_rx(&epmp, manifest_code_region_get(manifest));
85e0: 0fff8497 auipc s1,0xfff8
85e4: 0b848493 addi s1,s1,184 # 10000698 <epmp>
85e8: 8526 mv a0,s1
85ea: 69b010ef jal ra,a484 <mask_rom_epmp_unlock_rom_ext_rx>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:166
RETURN_IF_ERROR(epmp_state_check(&epmp));
85ee: 8526 mv a0,s1
85f0: 6bb010ef jal ra,a4aa <epmp_state_check>
85f4: 73900593 li a1,1849
85f8: f6b513e3 bne a0,a1,855e <mask_rom_try_boot+0xb6>
manifest_entry_point_get():
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/manifest.h:348
*
* @param manfiest A manifest.
* return Entry point address.
*/
inline uintptr_t manifest_entry_point_get(const manifest_t *manifest) {
return (uintptr_t)manifest + manifest->entry_point;
85fc: 37c42503 lw a0,892(s0)
8600: 942a add s0,s0,a0
mask_rom_boot():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:170
log_printf("rom_ext_entry: 0x%x\r\n", (unsigned int)entry_point);
8602: 00003517 auipc a0,0x3
8606: 75650513 addi a0,a0,1878 # bd58 <kDeviceLogBypassUartAddress+0x30>
860a: 85a2 mv a1,s0
860c: 7c8010ef jal ra,9dd4 <log_printf>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:171
((rom_ext_entry_point *)entry_point)();
8610: 9402 jalr s0
8612: 014d5537 lui a0,0x14d5
8616: 20950513 addi a0,a0,521 # 14d5209 <_chip_info_end+0x14c5209>
861a: b791 j 855e <mask_rom_try_boot+0xb6>
0000861c <mask_rom_irq_error>:
mask_rom_irq_error():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:49
CSR_READ(CSR_REG_MCAUSE, &mcause);
861c: 34202573 csrr a0,mcause
8620: 800005b7 lui a1,0x80000
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:60
mcause = (mcause & 0x80000000) | ((mcause & 0x7f) << 24);
8624: 8de9 and a1,a1,a0
8626: 0562 slli a0,a0,0x18
8628: 7f000637 lui a2,0x7f000
862c: 8d71 and a0,a0,a2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom.c:61
return kErrorInterrupt + mcause;
862e: 8d4d or a0,a0,a1
8630: 004955b7 lui a1,0x495
8634: 20258593 addi a1,a1,514 # 495202 <_chip_info_end+0x485202>
8638: 8d4d or a0,a0,a1
863a: 8082 ret
0000863c <primitive_bootstrap>:
primitive_bootstrap():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:187
}
}
return kErrorBootstrapUnknown;
}
rom_error_t primitive_bootstrap(void) {
863c: 81010113 addi sp,sp,-2032
8640: 7e112623 sw ra,2028(sp)
8644: 7e812423 sw s0,2024(sp)
8648: 7e912223 sw s1,2020(sp)
864c: 7f212023 sw s2,2016(sp)
8650: 7d312e23 sw s3,2012(sp)
8654: 7d412c23 sw s4,2008(sp)
8658: 7d512a23 sw s5,2004(sp)
865c: 7d612823 sw s6,2000(sp)
8660: 7d712623 sw s7,1996(sp)
8664: 7d812423 sw s8,1992(sp)
8668: 7d912223 sw s9,1988(sp)
866c: 7da12023 sw s10,1984(sp)
8670: 7bb12e23 sw s11,1980(sp)
8674: 7135 addi sp,sp,-160
8676: 080c addi a1,sp,16
bootstrap_requested():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:77
if (dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR),
8678: 40040537 lui a0,0x40040
867c: 21a5 jal 8ae4 <dif_gpio_init>
867e: e909 bnez a0,8690 <primitive_bootstrap+0x54>
8680: 0808 addi a0,sp,16
8682: 6585 lui a1,0x1
8684: 83858593 addi a1,a1,-1992 # 838 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x218>
8688: 958a add a1,a1,sp
868a: 85ae mv a1,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:83
if (dif_gpio_read_all(&gpio, &gpio_in) != kDifOk) {
868c: 26d1 jal 8a50 <dif_gpio_read_all>
868e: c521 beqz a0,86d6 <primitive_bootstrap+0x9a>
8690: 06425537 lui a0,0x6425
8694: 30d50413 addi s0,a0,781 # 642530d <_epmp_stack_guard_na4+0x241db0d>
primitive_bootstrap():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:212
// Always make sure to revert flash_ctrl access to default settings.
// bootstrap_flash enables access to flash to perform update.
flash_default_region_access(/*rd_en=*/false, /*prog_en=*/false,
/*erase_en=*/false);
return error;
}
8698: 8522 mv a0,s0
869a: 610d addi sp,sp,160
869c: 7bc12d83 lw s11,1980(sp)
86a0: 7c012d03 lw s10,1984(sp)
86a4: 7c412c83 lw s9,1988(sp)
86a8: 7c812c03 lw s8,1992(sp)
86ac: 7cc12b83 lw s7,1996(sp)
86b0: 7d012b03 lw s6,2000(sp)
86b4: 7d412a83 lw s5,2004(sp)
86b8: 7d812a03 lw s4,2008(sp)
86bc: 7dc12983 lw s3,2012(sp)
86c0: 7e012903 lw s2,2016(sp)
86c4: 7e412483 lw s1,2020(sp)
86c8: 7e812403 lw s0,2024(sp)
86cc: 7ec12083 lw ra,2028(sp)
86d0: 7f010113 addi sp,sp,2032
86d4: 8082 ret
bootstrap_requested():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:86
*result = (gpio_in & GPIO_BOOTSTRAP_BIT_MASK) != 0;
86d6: 6505 lui a0,0x1
86d8: 83850513 addi a0,a0,-1992 # 838 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x218>
86dc: 950a add a0,a0,sp
86de: 4108 lw a0,0(a0)
86e0: 000205b7 lui a1,0x20
primitive_bootstrap():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:190
if (!bootstrap_request_pending) {
86e4: 8d6d and a0,a0,a1
86e6: 73900413 li s0,1849
86ea: d55d beqz a0,8698 <primitive_bootstrap+0x5c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:194
log_printf("Bootstrap: BEGIN\n\r");
86ec: 00003517 auipc a0,0x3
86f0: 68250513 addi a0,a0,1666 # bd6e <kDeviceLogBypassUartAddress+0x46>
86f4: 6e0010ef jal ra,9dd4 <log_printf>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:196
flash_init_block();
86f8: 2c31 jal 8914 <flash_init_block>
spi_device_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:28
if (dif_spi_device_init(
86fa: 0fff8597 auipc a1,0xfff8
86fe: f9a58593 addi a1,a1,-102 # 10000694 <spi>
8702: 40050537 lui a0,0x40050
8706: 2d5d jal 8dbc <dif_spi_device_init>
8708: 014255b7 lui a1,0x1425
870c: 30d58413 addi s0,a1,781 # 142530d <_chip_info_end+0x141530d>
8710: f541 bnez a0,8698 <primitive_bootstrap+0x5c>
8712: 0fff8597 auipc a1,0xfff8
8716: fda58593 addi a1,a1,-38 # 100006ec <spi_config>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:34
spi_config.clock_polarity = kDifSpiDeviceEdgePositive;
871a: 0005a023 sw zero,0(a1)
871e: 4505 li a0,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:35
spi_config.data_phase = kDifSpiDeviceEdgeNegative;
8720: c1c8 sw a0,4(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:36
spi_config.tx_order = kDifSpiDeviceBitOrderMsbToLsb;
8722: 0005a423 sw zero,8(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:39
spi_config.rx_fifo_len = kDifSpiDeviceBufferLen / 2;
8726: 00003517 auipc a0,0x3
872a: 27a50513 addi a0,a0,634 # b9a0 <kDifSpiDeviceBufferLen>
872e: 00055503 lhu a0,0(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:37
spi_config.rx_order = kDifSpiDeviceBitOrderMsbToLsb;
8732: 0005a623 sw zero,12(a1)
8736: 03f00613 li a2,63
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:38
spi_config.rx_fifo_timeout = 63;
873a: 00c58823 sb a2,16(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:39
spi_config.rx_fifo_len = kDifSpiDeviceBufferLen / 2;
873e: 8105 srli a0,a0,0x1
8740: 00a59923 sh a0,18(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:40
spi_config.tx_fifo_len = kDifSpiDeviceBufferLen / 2;
8744: 00a59a23 sh a0,20(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:42
if (dif_spi_device_configure(&spi, &spi_config) != kDifOk) {
8748: 0fff8517 auipc a0,0xfff8
874c: f4c50513 addi a0,a0,-180 # 10000694 <spi>
8750: 264d jal 8af2 <dif_spi_device_configure>
8752: f139 bnez a0,8698 <primitive_bootstrap+0x5c>
8754: 6505 lui a0,0x1
8756: 81850513 addi a0,a0,-2024 # 818 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x1f8>
875a: 950a add a0,a0,sp
875c: 852a mv a0,a0
bootstrap_flash():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:138
hmac_digest_t ack = {0};
875e: 02000613 li a2,32
8762: 4581 li a1,0
8764: 2e11 jal 8a78 <memset>
spi_device_rx_pending():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:49
if (dif_spi_device_rx_pending(&spi, &spi_config, bytes_available) != kDifOk) {
8766: 0fff8517 auipc a0,0xfff8
876a: f2e50513 addi a0,a0,-210 # 10000694 <spi>
876e: 0fff8597 auipc a1,0xfff8
8772: f7e58593 addi a1,a1,-130 # 100006ec <spi_config>
8776: 6605 lui a2,0x1
8778: 81460613 addi a2,a2,-2028 # 814 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x1f4>
877c: 960a add a2,a2,sp
877e: 8632 mv a2,a2
8780: 26dd jal 8b66 <dif_spi_device_rx_pending>
8782: c105 beqz a0,87a2 <primitive_bootstrap+0x166>
8784: 01425537 lui a0,0x1425
8788: 30d50d93 addi s11,a0,781 # 142530d <_chip_info_end+0x141530d>
primitive_bootstrap():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:201
if (erase_flash() != kErrorOk) {
878c: 2a89 jal 88de <erase_flash>
878e: 73900593 li a1,1849
8792: 00b50663 beq a0,a1,879e <primitive_bootstrap+0x162>
8796: 04425537 lui a0,0x4425
879a: 30d50d93 addi s11,a0,781 # 442530d <_epmp_stack_guard_na4+0x41db0d>
879e: 846e mv s0,s11
87a0: bde5 j 8698 <primitive_bootstrap+0x5c>
87a2: 4a01 li s4,0
87a4: 03010993 addi s3,sp,48
87a8: 0fff8497 auipc s1,0xfff8
87ac: eec48493 addi s1,s1,-276 # 10000694 <spi>
87b0: 0fff8417 auipc s0,0xfff8
87b4: f3c40413 addi s0,s0,-196 # 100006ec <spi_config>
87b8: 6505 lui a0,0x1
87ba: 80050a93 addi s5,a0,-2048 # 800 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x1e0>
87be: 01010b13 addi s6,sp,16
87c2: 01425537 lui a0,0x1425
87c6: 30d50d93 addi s11,a0,781 # 142530d <_chip_info_end+0x141530d>
87ca: 01000537 lui a0,0x1000
87ce: fff50913 addi s2,a0,-1 # ffffff <_chip_info_end+0xfeffff>
87d2: 6505 lui a0,0x1
87d4: 83850513 addi a0,a0,-1992 # 838 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x218>
87d8: 950a add a0,a0,sp
87da: 8baa mv s7,a0
87dc: 6505 lui a0,0x1
87de: 81850513 addi a0,a0,-2024 # 818 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x1f8>
87e2: 950a add a0,a0,sp
87e4: 8c2a mv s8,a0
87e6: 05425537 lui a0,0x5425
87ea: 30d50513 addi a0,a0,781 # 542530d <_epmp_stack_guard_na4+0x141db0d>
87ee: c62a sw a0,12(sp)
87f0: 00003c97 auipc s9,0x3
87f4: 591c8c93 addi s9,s9,1425 # bd81 <kDeviceLogBypassUartAddress+0x59>
87f8: 6505 lui a0,0x1
87fa: 81450513 addi a0,a0,-2028 # 814 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x1f4>
87fe: 950a add a0,a0,sp
8800: 8d2a mv s10,a0
bootstrap_flash():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:143
if (bytes_available >= sizeof(spiflash_frame_t)) {
8802: 6505 lui a0,0x1
8804: 81450513 addi a0,a0,-2028 # 814 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x1f4>
8808: 950a add a0,a0,sp
880a: 4108 lw a0,0(a0)
880c: 812d srli a0,a0,0xb
880e: c539 beqz a0,885c <primitive_bootstrap+0x220>
spi_device_recv():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:56
if (dif_spi_device_recv(&spi, &spi_config, buf, buf_len,
8810: 8526 mv a0,s1
8812: 85a2 mv a1,s0
8814: 865a mv a2,s6
8816: 86d6 mv a3,s5
8818: 4701 li a4,0
881a: 2659 jal 8ba0 <dif_spi_device_recv>
881c: 0a051863 bnez a0,88cc <primitive_bootstrap+0x290>
bootstrap_flash():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:146
uint32_t frame_num = SPIFLASH_FRAME_NUM(frame.header.frame_num);
8820: 5542 lw a0,48(sp)
8822: 01257533 and a0,a0,s2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:148
if (frame_num == expected_frame_num) {
8826: 03451363 bne a0,s4,884c <primitive_bootstrap+0x210>
compute_sha256():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:111
hmac_sha256_init();
882a: 2345 jal 8dca <hmac_sha256_init>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:112
hmac_sha256_update(data, len);
882c: 7e000593 li a1,2016
8830: 854e mv a0,s3
8832: 2b4d jal 8de4 <hmac_sha256_update>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:113
hmac_sha256_final(digest);
8834: 855e mv a0,s7
8836: 2511 jal 8e3a <hmac_sha256_final>
check_frame_hash():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:128
return memcmp(digest.digest, frame->header.hash.digest, digest_len) == 0;
8838: 02000613 li a2,32
883c: 855e mv a0,s7
883e: 85da mv a1,s6
8840: 24a1 jal 8a88 <memcmp>
bootstrap_flash():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:149
if (!check_frame_hash(&frame)) {
8842: c11d beqz a0,8868 <primitive_bootstrap+0x22c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:150
log_printf("Detected hash mismatch on frame 0x%x\n\r",
8844: 8566 mv a0,s9
8846: 85d2 mv a1,s4
8848: 58c010ef jal ra,9dd4 <log_printf>
884c: 02000693 li a3,32
8850: 8526 mv a0,s1
8852: 85a2 mv a1,s0
8854: 8662 mv a2,s8
8856: 4701 li a4,0
8858: 29e1 jal 8d30 <dif_spi_device_send>
885a: e92d bnez a0,88cc <primitive_bootstrap+0x290>
spi_device_rx_pending():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:49
if (dif_spi_device_rx_pending(&spi, &spi_config, bytes_available) != kDifOk) {
885c: 8526 mv a0,s1
885e: 85a2 mv a1,s0
8860: 866a mv a2,s10
8862: 2611 jal 8b66 <dif_spi_device_rx_pending>
8864: dd59 beqz a0,8802 <primitive_bootstrap+0x1c6>
8866: bf39 j 8784 <primitive_bootstrap+0x148>
compute_sha256():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:111
hmac_sha256_init();
8868: 238d jal 8dca <hmac_sha256_init>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:112
hmac_sha256_update(data, len);
886a: 855a mv a0,s6
886c: 85d6 mv a1,s5
886e: 2b9d jal 8de4 <hmac_sha256_update>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:113
hmac_sha256_final(digest);
8870: 8562 mv a0,s8
8872: 23e1 jal 8e3a <hmac_sha256_final>
spi_device_send():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:64
if (dif_spi_device_send(&spi, &spi_config, buf, buf_len,
8874: 02000693 li a3,32
8878: 8526 mv a0,s1
887a: 85a2 mv a1,s0
887c: 8662 mv a2,s8
887e: 4701 li a4,0
8880: 2945 jal 8d30 <dif_spi_device_send>
8882: e529 bnez a0,88cc <primitive_bootstrap+0x290>
bootstrap_flash():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:161
if (expected_frame_num == 0) {
8884: 000a1b63 bnez s4,889a <primitive_bootstrap+0x25e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:162
flash_default_region_access(/*rd_en=*/true, /*prog_en=*/true,
8888: 4505 li a0,1
888a: 4585 li a1,1
888c: 4605 li a2,1
888e: 227d jal 8a3c <flash_default_region_access>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:164
RETURN_IF_ERROR(erase_flash());
8890: 20b9 jal 88de <erase_flash>
8892: 73900593 li a1,1849
8896: 02b51a63 bne a0,a1,88ca <primitive_bootstrap+0x28e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:167
if (flash_write(frame.header.flash_offset, kDataPartition, frame.data,
889a: 5552 lw a0,52(sp)
889c: 1f600693 li a3,502
88a0: 4581 li a1,0
88a2: 1830 addi a2,sp,56
88a4: 2a19 jal 89ba <flash_write>
88a6: e519 bnez a0,88b4 <primitive_bootstrap+0x278>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:173
if (SPIFLASH_FRAME_IS_EOF(frame.header.frame_num)) {
88a8: 5542 lw a0,48(sp)
88aa: 55fd li a1,-1
88ac: 00a5d663 bge a1,a0,88b8 <primitive_bootstrap+0x27c>
88b0: 0a05 addi s4,s4,1
88b2: b76d j 885c <primitive_bootstrap+0x220>
88b4: 4db2 lw s11,12(sp)
88b6: a819 j 88cc <primitive_bootstrap+0x290>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:174
log_printf("Bootstrap: DONE!\n\r");
88b8: 00003517 auipc a0,0x3
88bc: 4f050513 addi a0,a0,1264 # bda8 <kDeviceLogBypassUartAddress+0x80>
88c0: 514010ef jal ra,9dd4 <log_printf>
88c4: 73900d93 li s11,1849
88c8: a011 j 88cc <primitive_bootstrap+0x290>
88ca: 8daa mv s11,a0
88cc: 73900413 li s0,1849
primitive_bootstrap():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:200
if (error != kErrorOk) {
88d0: ea8d9ee3 bne s11,s0,878c <primitive_bootstrap+0x150>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:209
flash_default_region_access(/*rd_en=*/false, /*prog_en=*/false,
88d4: 4501 li a0,0
88d6: 4581 li a1,0
88d8: 4601 li a2,0
88da: 228d jal 8a3c <flash_default_region_access>
88dc: bb75 j 8698 <primitive_bootstrap+0x5c>
000088de <erase_flash>:
erase_flash():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:93
static rom_error_t erase_flash(void) {
88de: 1141 addi sp,sp,-16
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:94
if (flash_bank_erase(FLASH_BANK_0) != 0) {
88e0: c606 sw ra,12(sp)
88e2: c422 sw s0,8(sp)
88e4: 4501 li a0,0
88e6: 28b5 jal 8962 <flash_bank_erase>
88e8: 024255b7 lui a1,0x2425
88ec: 30d58413 addi s0,a1,781 # 242530d <_chip_info_end+0x241530d>
88f0: ed09 bnez a0,890a <erase_flash+0x2c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:97
if (flash_bank_erase(FLASH_BANK_1) != 0) {
88f2: 4505 li a0,1
88f4: 20bd jal 8962 <flash_bank_erase>
88f6: e911 bnez a0,890a <erase_flash+0x2c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:100
if (flash_check_empty() == 0) {
88f8: 202d jal 8922 <flash_check_empty>
88fa: c501 beqz a0,8902 <erase_flash+0x24>
88fc: 73900413 li s0,1849
8900: a029 j 890a <erase_flash+0x2c>
8902: 03425537 lui a0,0x3425
8906: 30d50413 addi s0,a0,781 # 342530d <_chip_info_end+0x341530d>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/primitive_bootstrap.c:104
}
890a: 8522 mv a0,s0
890c: 4422 lw s0,8(sp)
890e: 40b2 lw ra,12(sp)
8910: 0141 addi sp,sp,16
8912: 8082 ret
00008914 <flash_init_block>:
flash_init_block():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:42
(1 << FLASH_CTRL_OP_STATUS_DONE_BIT)) == 0) {
}
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_OP_STATUS_REG_OFFSET) = 0;
}
void flash_init_block(void) {
8914: 41000537 lui a0,0x41000
mmio_region_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:103
* @param offset the offset to read at, in bytes.
* @return the read value.
*/
MMIO_WARN_UNUSED_RESULT
inline uint32_t mmio_region_read32(mmio_region_t base, ptrdiff_t offset) {
return ((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)];
8918: 15052583 lw a1,336(a0) # 41000150 <_stack_end+0x30fe0150>
flash_init_block():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:46
mmio_region_t flash_ctrl_base =
mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR);
while ((mmio_region_read32(flash_ctrl_base, FLASH_CTRL_STATUS_REG_OFFSET) &
891c: 89c1 andi a1,a1,16
891e: fded bnez a1,8918 <flash_init_block+0x4>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:49
(1 << FLASH_CTRL_STATUS_INIT_WIP_BIT)) > 0) {
}
}
8920: 8082 ret
00008922 <flash_check_empty>:
flash_check_empty():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:59
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_ERR_CODE_REG_OFFSET);
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_ERR_CODE_REG_OFFSET) = -1u;
return err_status;
}
int flash_check_empty(void) {
8922: 20000537 lui a0,0x20000
8926: 40000893 li a7,1024
892a: 587d li a6,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:64
uint32_t mask = -1u;
uint32_t *p = (uint32_t *)FLASH_MEM_BASE_ADDR;
// TODO: Update range to cover entire flash. Limited now to one bank while
// we debu initialization.
for (; p < (uint32_t *)(FLASH_MEM_BASE_ADDR + flash_get_bank_size());) {
892c: 01355693 srli a3,a0,0x13
8930: 02d8e763 bltu a7,a3,895e <flash_check_empty+0x3c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:65
mask &= *p++;
8934: 4114 lw a3,0(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:66
mask &= *p++;
8936: 4158 lw a4,4(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:67
mask &= *p++;
8938: 451c lw a5,8(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:68
mask &= *p++;
893a: 4550 lw a2,12(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:66
mask &= *p++;
893c: 8ef9 and a3,a3,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:67
mask &= *p++;
893e: 8efd and a3,a3,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:68
mask &= *p++;
8940: 8e75 and a2,a2,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:69
mask &= *p++;
8942: 4914 lw a3,16(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:70
mask &= *p++;
8944: 4958 lw a4,20(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:71
mask &= *p++;
8946: 4d1c lw a5,24(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:72
mask &= *p++;
8948: 4d4c lw a1,28(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:69
mask &= *p++;
894a: 8e75 and a2,a2,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:70
mask &= *p++;
894c: 8e79 and a2,a2,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:71
mask &= *p++;
894e: 8e7d and a2,a2,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:72
mask &= *p++;
8950: 8df1 and a1,a1,a2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:73
if (mask != -1u) {
8952: 02050513 addi a0,a0,32 # 20000020 <_stack_end+0xffe0020>
8956: fd058be3 beq a1,a6,892c <flash_check_empty+0xa>
895a: 4501 li a0,0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:78
return 0;
}
}
return 1;
}
895c: 8082 ret
895e: 4505 li a0,1
8960: 8082 ret
00008962 <flash_bank_erase>:
flash_bank_erase():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:80
int flash_bank_erase(bank_index_t idx) {
8962: 41000637 lui a2,0x41000
mmio_region_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:103
8966: 14862683 lw a3,328(a2) # 41000148 <_stack_end+0x30fe0148>
896a: 4585 li a1,1
896c: 00a595b3 sll a1,a1,a0
flash_cfg_bank_erase():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:184
void flash_cfg_bank_erase(bank_index_t bank, bool erase_en) {
mmio_region_t flash_ctrl_base =
mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR);
uint32_t val =
(erase_en)
8970: 8ecd or a3,a3,a1
mmio_region_write32_shadowed():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:168
* @param offset the offset to write at, in bytes.
* @param value the value to write.
*/
inline void mmio_region_write32_shadowed(mmio_region_t base, ptrdiff_t offset,
uint32_t value) {
((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)] = value;
8972: 14d62423 sw a3,328(a2)
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:169
((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)] = value;
8976: 14d62423 sw a3,328(a2)
897a: 200006b7 lui a3,0x20000
flash_bank_erase():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:85
(idx == FLASH_BANK_0) ? FLASH_MEM_BASE_ADDR
897e: c119 beqz a0,8984 <flash_bank_erase+0x22>
8980: 200806b7 lui a3,0x20080
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:84
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_ADDR_REG_OFFSET) =
8984: d254 sw a3,36(a2)
8986: 0a100513 li a0,161
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:87
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_CONTROL_REG_OFFSET) =
898a: d208 sw a0,32(a2)
mmio_region_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:103
return ((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)];
898c: 14c62503 lw a0,332(a2)
wait_done_and_ack():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:36
while ((mmio_region_read32(flash_ctrl_base, FLASH_CTRL_OP_STATUS_REG_OFFSET) &
8990: 8905 andi a0,a0,1
8992: dd6d beqz a0,898c <flash_bank_erase+0x2a>
8994: 41000637 lui a2,0x41000
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:39
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_OP_STATUS_REG_OFFSET) = 0;
8998: 14062623 sw zero,332(a2) # 4100014c <_stack_end+0x30fe014c>
mmio_region_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:103
899c: 14862503 lw a0,328(a2)
flash_cfg_bank_erase():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:184
(erase_en)
89a0: fff5c593 not a1,a1
89a4: 8d6d and a0,a0,a1
mmio_region_write32_shadowed():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:168
((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)] = value;
89a6: 14a62423 sw a0,328(a2)
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:169
((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)] = value;
89aa: 14a62423 sw a0,328(a2)
get_clr_err():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:54
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_ERR_CODE_REG_OFFSET);
89ae: 15462503 lw a0,340(a2)
89b2: 55fd li a1,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:55
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_ERR_CODE_REG_OFFSET) = -1u;
89b4: 14b62a23 sw a1,340(a2)
flash_bank_erase():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:95
return get_clr_err();
89b8: 8082 ret
000089ba <flash_write>:
flash_write():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:128
uint32_t size) {
89ba: 4301 li t1,0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:141
while (words_remaining > 0) {
89bc: ceb5 beqz a3,8a38 <flash_write+0x7e>
89be: 4381 li t2,0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:129
uint32_t window_offset = (addr / sizeof(uint32_t)) % PROGRAM_RESOLUTION_WORDS;
89c0: 00255713 srli a4,a0,0x2
89c4: 8b3d andi a4,a4,15
89c6: 47c1 li a5,16
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:134
max_words = PROGRAM_RESOLUTION_WORDS - window_offset;
89c8: 8f99 sub a5,a5,a4
89ca: 00859813 slli a6,a1,0x8
89ce: 41000eb7 lui t4,0x41000
89d2: 78c1 lui a7,0xffff0
89d4: 52fd li t0,-1
89d6: 8e36 mv t3,a3
89d8: 00fe6363 bltu t3,a5,89de <flash_write+0x24>
89dc: 8e3e mv t3,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:148
err |= flash_write_internal(addr + current_word * sizeof(uint32_t), part,
89de: 00239713 slli a4,t2,0x2
89e2: 972a add a4,a4,a0
flash_write_internal():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:113
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_ADDR_REG_OFFSET) = addr;
89e4: 02eea223 sw a4,36(t4) # 41000024 <_stack_end+0x30fe0024>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:117
(size - 1) << FLASH_CTRL_CONTROL_NUM_OFFSET |
89e8: 010e1713 slli a4,t3,0x10
89ec: 9746 add a4,a4,a7
89ee: 00e86733 or a4,a6,a4
89f2: 01176713 ori a4,a4,17
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:114
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_CONTROL_REG_OFFSET) =
89f6: 02eea023 sw a4,32(t4)
89fa: 87b2 mv a5,a2
89fc: 8772 mv a4,t3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:119
for (int i = 0; i < size; ++i) {
89fe: 000e0863 beqz t3,8a0e <flash_write+0x54>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:120
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_PROG_FIFO_REG_OFFSET) = data[i];
8a02: 438c lw a1,0(a5)
8a04: 18bea423 sw a1,392(t4)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:119
for (int i = 0; i < size; ++i) {
8a08: 177d addi a4,a4,-1
8a0a: 0791 addi a5,a5,4
8a0c: fb7d bnez a4,8a02 <flash_write+0x48>
mmio_region_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:103
return ((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)];
8a0e: 14cea703 lw a4,332(t4)
wait_done_and_ack():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:36
while ((mmio_region_read32(flash_ctrl_base, FLASH_CTRL_OP_STATUS_REG_OFFSET) &
8a12: 8b05 andi a4,a4,1
8a14: df6d beqz a4,8a0e <flash_write+0x54>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:39
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_OP_STATUS_REG_OFFSET) = 0;
8a16: 140ea623 sw zero,332(t4)
get_clr_err():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:54
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_ERR_CODE_REG_OFFSET);
8a1a: 154ea583 lw a1,340(t4)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:55
REG32(FLASH_CTRL0_BASE_ADDR + FLASH_CTRL_ERR_CODE_REG_OFFSET) = -1u;
8a1e: 145eaa23 sw t0,340(t4)
flash_write():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:148
err |= flash_write_internal(addr + current_word * sizeof(uint32_t), part,
8a22: 0065e333 or t1,a1,t1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:150
current_word += words_to_program;
8a26: 93f2 add t2,t2,t3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:151
data += words_to_program;
8a28: 002e1593 slli a1,t3,0x2
8a2c: 962e add a2,a2,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:155
words_remaining = size - current_word;
8a2e: 40768e33 sub t3,a3,t2
8a32: 47c1 li a5,16
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:141
while (words_remaining > 0) {
8a34: fa0e12e3 bnez t3,89d8 <flash_write+0x1e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:157
return err;
8a38: 851a mv a0,t1
8a3a: 8082 ret
00008a3c <flash_default_region_access>:
flash_default_region_access():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:205
mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR);
mmio_region_write32_shadowed(
flash_ctrl_base, FLASH_CTRL_DEFAULT_REGION_SHADOWED_REG_OFFSET,
rd_en << FLASH_CTRL_DEFAULT_REGION_SHADOWED_RD_EN_BIT |
prog_en << FLASH_CTRL_DEFAULT_REGION_SHADOWED_PROG_EN_BIT |
8a3c: 0586 slli a1,a1,0x1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:204
rd_en << FLASH_CTRL_DEFAULT_REGION_SHADOWED_RD_EN_BIT |
8a3e: 8d4d or a0,a0,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:206
erase_en << FLASH_CTRL_DEFAULT_REGION_SHADOWED_ERASE_EN_BIT);
8a40: 00261593 slli a1,a2,0x2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:205
prog_en << FLASH_CTRL_DEFAULT_REGION_SHADOWED_PROG_EN_BIT |
8a44: 8d4d or a0,a0,a1
8a46: 410005b7 lui a1,0x41000
mmio_region_write32_shadowed():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:168
((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)] = value;
8a4a: d9a8 sw a0,112(a1)
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:169
((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)] = value;
8a4c: d9a8 sw a0,112(a1)
flash_default_region_access():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/flash_ctrl.c:207
}
8a4e: 8082 ret
00008a50 <dif_gpio_read_all>:
dif_gpio_read_all():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_gpio.c:183
return kDifOk;
}
dif_result_t dif_gpio_read_all(const dif_gpio_t *gpio,
dif_gpio_state_t *state) {
8a50: 862a mv a2,a0
8a52: 4509 li a0,2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_gpio.c:184
if (gpio == NULL || state == NULL) {
8a54: c611 beqz a2,8a60 <dif_gpio_read_all+0x10>
8a56: c589 beqz a1,8a60 <dif_gpio_read_all+0x10>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_gpio.c:188
return kDifBadArg;
}
*state = mmio_region_read32(gpio->base_addr, GPIO_DATA_IN_REG_OFFSET);
8a58: 4208 lw a0,0(a2)
mmio_region_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:103
return ((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)];
8a5a: 4910 lw a2,16(a0)
8a5c: 4501 li a0,0
dif_gpio_read_all():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_gpio.c:188
8a5e: c190 sw a2,0(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_gpio.c:191
return kDifOk;
}
8a60: 8082 ret
00008a62 <memcpy>:
memcpy():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:21
#if !defined(HOST_BUILD)
void *memcpy(void *restrict dest, const void *restrict src, size_t len) {
uint8_t *dest8 = (uint8_t *)dest;
uint8_t *src8 = (uint8_t *)src;
for (size_t i = 0; i < len; ++i) {
8a62: ca11 beqz a2,8a76 <memcpy+0x14>
8a64: 86aa mv a3,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:22
dest8[i] = src8[i];
8a66: 00058703 lb a4,0(a1) # 41000000 <_stack_end+0x30fe0000>
8a6a: 00e68023 sb a4,0(a3) # 20080000 <_stack_end+0x10060000>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:21
for (size_t i = 0; i < len; ++i) {
8a6e: 167d addi a2,a2,-1
8a70: 0685 addi a3,a3,1
8a72: 0585 addi a1,a1,1
8a74: fa6d bnez a2,8a66 <memcpy+0x4>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:24
}
return dest;
8a76: 8082 ret
00008a78 <memset>:
memset():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:32
#if !defined(HOST_BUILD)
void *memset(void *dest, int value, size_t len) {
uint8_t *dest8 = (uint8_t *)dest;
uint8_t value8 = (uint8_t)value;
for (size_t i = 0; i < len; ++i) {
8a78: c619 beqz a2,8a86 <memset+0xe>
8a7a: 86aa mv a3,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:33
dest8[i] = value8;
8a7c: 00b68023 sb a1,0(a3)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:32
for (size_t i = 0; i < len; ++i) {
8a80: 167d addi a2,a2,-1
8a82: 0685 addi a3,a3,1
8a84: fe65 bnez a2,8a7c <memset+0x4>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:35
}
return dest;
8a86: 8082 ret
00008a88 <memcmp>:
memcmp():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:49
#if !defined(HOST_BUILD)
int memcmp(const void *lhs, const void *rhs, size_t len) {
const uint8_t *lhs8 = (uint8_t *)lhs;
const uint8_t *rhs8 = (uint8_t *)rhs;
for (size_t i = 0; i < len; ++i) {
8a88: ce09 beqz a2,8aa2 <memcmp+0x1a>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:50
if (lhs8[i] < rhs8[i]) {
8a8a: 00054683 lbu a3,0(a0)
8a8e: 0005c703 lbu a4,0(a1)
8a92: 00e6ea63 bltu a3,a4,8aa6 <memcmp+0x1e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:52
return kMemCmpLt;
} else if (lhs8[i] > rhs8[i]) {
8a96: 00d76b63 bltu a4,a3,8aac <memcmp+0x24>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:49
for (size_t i = 0; i < len; ++i) {
8a9a: 167d addi a2,a2,-1
8a9c: 0585 addi a1,a1,1
8a9e: 0505 addi a0,a0,1
8aa0: f66d bnez a2,8a8a <memcmp+0x2>
8aa2: 4501 li a0,0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:57
return kMemCmpGt;
}
}
return kMemCmpEq;
}
8aa4: 8082 ret
8aa6: fd600513 li a0,-42
8aaa: 8082 ret
8aac: 02a00513 li a0,42
8ab0: 8082 ret
00008ab2 <memrcmp>:
memrcmp():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:64
int memrcmp(const void *lhs, const void *rhs, size_t len) {
const uint8_t *lhs8 = (uint8_t *)lhs;
const uint8_t *rhs8 = (uint8_t *)rhs;
size_t j;
for (size_t i = 0; i < len; ++i) {
8ab2: c20d beqz a2,8ad4 <memrcmp+0x22>
8ab4: 15fd addi a1,a1,-1
8ab6: 157d addi a0,a0,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:66
j = len - 1 - i;
if (lhs8[j] < rhs8[j]) {
8ab8: 00c506b3 add a3,a0,a2
8abc: 0006c683 lbu a3,0(a3)
8ac0: 00c58733 add a4,a1,a2
8ac4: 00074703 lbu a4,0(a4)
8ac8: 00e6e863 bltu a3,a4,8ad8 <memrcmp+0x26>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:68
return kMemCmpLt;
} else if (lhs8[j] > rhs8[j]) {
8acc: 00d76963 bltu a4,a3,8ade <memrcmp+0x2c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:64
for (size_t i = 0; i < len; ++i) {
8ad0: 167d addi a2,a2,-1
8ad2: f27d bnez a2,8ab8 <memrcmp+0x6>
8ad4: 4501 li a0,0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/memory.c:73
return kMemCmpGt;
}
}
return kMemCmpEq;
}
8ad6: 8082 ret
8ad8: fd600513 li a0,-42
8adc: 8082 ret
8ade: 02a00513 li a0,42
8ae2: 8082 ret
00008ae4 <dif_gpio_init>:
dif_gpio_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/autogen/dif_gpio_autogen.c:15
#include "gpio_regs.h" // Generated.
OT_WARN_UNUSED_RESULT
dif_result_t dif_gpio_init(mmio_region_t base_addr, dif_gpio_t *gpio) {
if (gpio == NULL) {
8ae4: c581 beqz a1,8aec <dif_gpio_init+0x8>
8ae6: 4601 li a2,0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/autogen/dif_gpio_autogen.c:19
return kDifBadArg;
}
gpio->base_addr = base_addr;
8ae8: c188 sw a0,0(a1)
8aea: a011 j 8aee <dif_gpio_init+0xa>
8aec: 4609 li a2,2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/autogen/dif_gpio_autogen.c:22
return kDifOk;
}
8aee: 8532 mv a0,a2
8af0: 8082 ret
00008af2 <dif_spi_device_configure>:
dif_spi_device_configure():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:38
return val;
}
dif_result_t dif_spi_device_configure(const dif_spi_device_t *spi,
const dif_spi_device_config_t *config) {
8af2: 4609 li a2,2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:39
if (spi == NULL || config == NULL) {
8af4: c53d beqz a0,8b62 <dif_spi_device_configure+0x70>
8af6: c5b5 beqz a1,8b62 <dif_spi_device_configure+0x70>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:49
// function argument checks, to avoid a halfway-configured SPI.
uint32_t device_config = build_control_word(config);
uint16_t rx_fifo_start = 0x0;
uint16_t rx_fifo_end = config->rx_fifo_len - 1;
8af8: 0125d803 lhu a6,18(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:51
uint16_t tx_fifo_start = rx_fifo_end + 1;
uint16_t tx_fifo_end = tx_fifo_start + config->tx_fifo_len - 1;
8afc: 01459703 lh a4,20(a1)
8b00: fff80793 addi a5,a6,-1
8b04: 973e add a4,a4,a5
8b06: 66bd lui a3,0xf
8b08: 8ef9 and a3,a3,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:52
if (tx_fifo_end >= kDifSpiDeviceBufferLen) {
8b0a: 82b1 srli a3,a3,0xc
8b0c: eab9 bnez a3,8b62 <dif_spi_device_configure+0x70>
build_control_word():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:26
config->data_phase == kDifSpiDeviceEdgePositive);
8b0e: 41d0 lw a2,4(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:24
config->clock_polarity == kDifSpiDeviceEdgeNegative);
8b10: 4194 lw a3,0(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:26
config->data_phase == kDifSpiDeviceEdgePositive);
8b12: 00163613 seqz a2,a2
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
bitfield |= (value & field.mask) << field.index;
8b16: 00161893 slli a7,a2,0x1
build_control_word():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:28
config->tx_order == kDifSpiDeviceBitOrderLsbToMsb);
8b1a: 4590 lw a2,8(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:24
config->clock_polarity == kDifSpiDeviceEdgeNegative);
8b1c: 16fd addi a3,a3,-1
8b1e: 0016b693 seqz a3,a3
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8b22: 00d8e8b3 or a7,a7,a3
build_control_word():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:28
config->tx_order == kDifSpiDeviceBitOrderLsbToMsb);
8b26: 167d addi a2,a2,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:30
config->rx_order == kDifSpiDeviceBitOrderLsbToMsb);
8b28: 45d4 lw a3,12(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:28
config->tx_order == kDifSpiDeviceBitOrderLsbToMsb);
8b2a: 00163613 seqz a2,a2
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8b2e: 060a slli a2,a2,0x2
8b30: 00c8e8b3 or a7,a7,a2
build_control_word():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:30
config->rx_order == kDifSpiDeviceBitOrderLsbToMsb);
8b34: 16fd addi a3,a3,-1
8b36: 0016b693 seqz a3,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:32
config->rx_fifo_timeout);
8b3a: 0105c583 lbu a1,16(a1)
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8b3e: 068e slli a3,a3,0x3
dif_spi_device_configure():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:69
tx_fifo_bounds = bitfield_field32_write(
tx_fifo_bounds, SPI_DEVICE_TXF_ADDR_BASE_FIELD, tx_fifo_start);
tx_fifo_bounds = bitfield_field32_write(
tx_fifo_bounds, SPI_DEVICE_TXF_ADDR_LIMIT_FIELD, tx_fifo_end);
mmio_region_write32(spi->base_addr, SPI_DEVICE_CFG_REG_OFFSET, device_config);
8b40: 4110 lw a2,0(a0)
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8b42: 00d8e6b3 or a3,a7,a3
8b46: 05a2 slli a1,a1,0x8
8b48: 8dd5 or a1,a1,a3
mmio_region_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:152
((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)] = value;
8b4a: ca4c sw a1,20(a2)
dif_spi_device_configure():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:70
mmio_region_write32(spi->base_addr, SPI_DEVICE_RXF_ADDR_REG_OFFSET,
8b4c: 410c lw a1,0(a0)
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8b4e: 01079613 slli a2,a5,0x10
mmio_region_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:152
8b52: d5d0 sw a2,44(a1)
dif_spi_device_configure():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:72
rx_fifo_bounds);
mmio_region_write32(spi->base_addr, SPI_DEVICE_TXF_ADDR_REG_OFFSET,
8b54: 4108 lw a0,0(a0)
8b56: 4601 li a2,0
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8b58: 01071593 slli a1,a4,0x10
8b5c: 0105e5b3 or a1,a1,a6
mmio_region_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:152
8b60: d90c sw a1,48(a0)
dif_spi_device_configure():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:76
tx_fifo_bounds);
return kDifOk;
}
8b62: 8532 mv a0,a2
8b64: 8082 ret
00008b66 <dif_spi_device_rx_pending>:
dif_spi_device_rx_pending():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:296
return fifo_len - (ptrs.read_ptr.offset - ptrs.write_ptr.offset);
}
dif_result_t dif_spi_device_rx_pending(const dif_spi_device_t *spi,
const dif_spi_device_config_t *config,
size_t *bytes_pending) {
8b66: 86aa mv a3,a0
8b68: 4509 li a0,2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:297
if (spi == NULL || config == NULL || bytes_pending == NULL) {
8b6a: ca95 beqz a3,8b9e <dif_spi_device_rx_pending+0x38>
8b6c: c98d beqz a1,8b9e <dif_spi_device_rx_pending+0x38>
8b6e: ca05 beqz a2,8b9e <dif_spi_device_rx_pending+0x38>
decompress_ptrs():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:210
uint32_t ptr = mmio_region_read32(spi->base_addr, params.reg_offset);
8b70: 4288 lw a0,0(a3)
mmio_region_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:103
return ((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)];
8b72: 5154 lw a3,36(a0)
8b74: 4501 li a0,0
decompress_ptrs():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:212
(uint16_t)((ptr >> params.write_offset) & params.write_mask);
8b76: 0106d713 srli a4,a3,0x10
8b7a: 6785 lui a5,0x1
8b7c: 17fd addi a5,a5,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:218
.offset = write_val & kFifoOffsetMask,
8b7e: 00f77833 and a6,a4,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:223
.offset = read_val & kFifoOffsetMask,
8b82: 8ff5 and a5,a5,a3
fifo_bytes_in_use():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:280
if (ptrs.write_ptr.phase == ptrs.read_ptr.phase) {
8b84: 8eb9 xor a3,a3,a4
dif_spi_device_rx_pending():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:302
return kDifBadArg;
}
fifo_ptrs_t ptrs = decompress_ptrs(spi, kRxFifoParams);
*bytes_pending = fifo_bytes_in_use(ptrs, config->rx_fifo_len);
8b86: 01259583 lh a1,18(a1)
fifo_bytes_in_use():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:280
if (ptrs.write_ptr.phase == ptrs.read_ptr.phase) {
8b8a: 06ce slli a3,a3,0x13
8b8c: 86fd srai a3,a3,0x1f
8b8e: 40f80733 sub a4,a6,a5
8b92: 8df5 and a1,a1,a3
8b94: 95ba add a1,a1,a4
8b96: 66c1 lui a3,0x10
8b98: 16fd addi a3,a3,-1
dif_spi_device_rx_pending():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:302
*bytes_pending = fifo_bytes_in_use(ptrs, config->rx_fifo_len);
8b9a: 8df5 and a1,a1,a3
8b9c: c20c sw a1,0(a2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:305
return kDifOk;
}
8b9e: 8082 ret
00008ba0 <dif_spi_device_recv>:
dif_spi_device_recv():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:394
}
dif_result_t dif_spi_device_recv(const dif_spi_device_t *spi,
const dif_spi_device_config_t *config,
void *buf, size_t buf_len,
size_t *bytes_received) {
8ba0: 1101 addi sp,sp,-32
8ba2: ce06 sw ra,28(sp)
8ba4: cc22 sw s0,24(sp)
8ba6: ca26 sw s1,20(sp)
8ba8: c84a sw s2,16(sp)
8baa: 842a mv s0,a0
8bac: 4509 li a0,2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:395
if (spi == NULL || config == NULL || buf == NULL) {
8bae: c825 beqz s0,8c1e <dif_spi_device_recv+0x7e>
8bb0: c5bd beqz a1,8c1e <dif_spi_device_recv+0x7e>
8bb2: 893a mv s2,a4
8bb4: 8732 mv a4,a2
8bb6: c625 beqz a2,8c1e <dif_spi_device_recv+0x7e>
8bb8: 88b6 mv a7,a3
decompress_ptrs():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:210
uint32_t ptr = mmio_region_read32(spi->base_addr, params.reg_offset);
8bba: 4008 lw a0,0(s0)
mmio_region_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:103
8bbc: 5148 lw a0,36(a0)
decompress_ptrs():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:212
(uint16_t)((ptr >> params.write_offset) & params.write_mask);
8bbe: 01055613 srli a2,a0,0x10
8bc2: 6685 lui a3,0x1
8bc4: 16fd addi a3,a3,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:218
.offset = write_val & kFifoOffsetMask,
8bc6: 8e75 and a2,a2,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:223
.offset = read_val & kFifoOffsetMask,
8bc8: 8ee9 and a3,a3,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:227
}
8bca: 00c55793 srli a5,a0,0xc
8bce: 64c1 lui s1,0x10
8bd0: 8fe5 and a5,a5,s1
8bd2: 8e5d or a2,a2,a5
8bd4: 0512 slli a0,a0,0x4
8bd6: 8d65 and a0,a0,s1
8bd8: 8d55 or a0,a0,a3
dif_spi_device_recv():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:400
return kDifBadArg;
}
uint16_t fifo_base = 0;
fifo_ptrs_t fifo = decompress_ptrs(spi, kRxFifoParams);
8bda: c432 sw a2,8(sp)
8bdc: c62a sw a0,12(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:402
size_t bytes = spi_memcpy(spi, &fifo, fifo_base, config->rx_fifo_len,
8bde: 0125d683 lhu a3,18(a1)
8be2: 002c addi a1,sp,8
8be4: 4805 li a6,1
8be6: 8522 mv a0,s0
8be8: 4601 li a2,0
8bea: 87c6 mv a5,a7
8bec: 283d jal 8c2a <spi_memcpy>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:404
(uint8_t *)buf, buf_len, /*is_recv=*/true);
if (bytes_received != NULL) {
8bee: 00090463 beqz s2,8bf6 <dif_spi_device_recv+0x56>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:405
*bytes_received = bytes;
8bf2: 00a92023 sw a0,0(s2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:407
}
if (bytes > 0) {
8bf6: c11d beqz a0,8c1c <dif_spi_device_recv+0x7c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:409
// Commit the new RX FIFO pointers.
compress_ptrs(spi, kRxFifoParams, fifo);
8bf8: 4522 lw a0,8(sp)
8bfa: 45b2 lw a1,12(sp)
compress_ptrs():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:240
if (ptrs.write_ptr.phase) {
8bfc: 00455613 srli a2,a0,0x4
8c00: 6685 lui a3,0x1
8c02: 8e75 and a2,a2,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:244
if (ptrs.read_ptr.phase) {
8c04: 0045d713 srli a4,a1,0x4
8c08: 8ef9 and a3,a3,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:254
write_val);
8c0a: 8d51 or a0,a0,a2
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8c0c: 0542 slli a0,a0,0x10
8c0e: 6641 lui a2,0x10
8c10: 167d addi a2,a2,-1
compress_ptrs():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:261
mmio_region_write32(spi->base_addr, params.reg_offset, ptr);
8c12: 4018 lw a4,0(s0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:260
read_val);
8c14: 8df1 and a1,a1,a2
8c16: 8dd5 or a1,a1,a3
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8c18: 8d4d or a0,a0,a1
mmio_region_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:152
((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)] = value;
8c1a: d348 sw a0,36(a4)
8c1c: 4501 li a0,0
dif_spi_device_recv():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:412
}
return kDifOk;
}
8c1e: 4942 lw s2,16(sp)
8c20: 44d2 lw s1,20(sp)
8c22: 4462 lw s0,24(sp)
8c24: 40f2 lw ra,28(sp)
8c26: 6105 addi sp,sp,32
8c28: 8082 ret
00008c2a <spi_memcpy>:
spi_memcpy():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:338
uint8_t *byte_buf, size_t buf_len, bool is_recv) {
8c2a: 7139 addi sp,sp,-64
8c2c: de06 sw ra,60(sp)
8c2e: dc22 sw s0,56(sp)
8c30: da26 sw s1,52(sp)
8c32: d84a sw s2,48(sp)
8c34: d64e sw s3,44(sp)
8c36: d452 sw s4,40(sp)
8c38: d256 sw s5,36(sp)
8c3a: d05a sw s6,32(sp)
8c3c: ce5e sw s7,28(sp)
8c3e: cc62 sw s8,24(sp)
8c40: ca66 sw s9,20(sp)
8c42: c86a sw s10,16(sp)
8c44: c66e sw s11,12(sp)
8c46: 89c2 mv s3,a6
8c48: 893e mv s2,a5
8c4a: 8d3a mv s10,a4
8c4c: 8a36 mv s4,a3
8c4e: 8b2e mv s6,a1
8c50: 8aaa mv s5,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:339
uint16_t bytes_left = fifo_bytes_in_use(*fifo, fifo_len);
8c52: 0025d503 lhu a0,2(a1)
8c56: 0005d583 lhu a1,0(a1)
8c5a: 006b5683 lhu a3,6(s6)
8c5e: 004b5703 lhu a4,4(s6)
8c62: 0542 slli a0,a0,0x10
8c64: 8dc9 or a1,a1,a0
8c66: 06c2 slli a3,a3,0x10
8c68: 8f55 or a4,a4,a3
fifo_bytes_in_use():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:280
if (ptrs.write_ptr.phase == ptrs.read_ptr.phase) {
8c6a: 8d35 xor a0,a0,a3
8c6c: 053e slli a0,a0,0xf
8c6e: 857d srai a0,a0,0x1f
8c70: 8d99 sub a1,a1,a4
8c72: 01457533 and a0,a0,s4
8c76: 952e add a0,a0,a1
spi_memcpy():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:341
if (!is_recv) {
8c78: 00081463 bnez a6,8c80 <spi_memcpy+0x56>
8c7c: 40aa0533 sub a0,s4,a0
8c80: 65c1 lui a1,0x10
8c82: 15fd addi a1,a1,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:345
if (bytes_left > buf_len) {
8c84: 00b576b3 and a3,a0,a1
8c88: 00d96363 bltu s2,a3,8c8e <spi_memcpy+0x64>
8c8c: 892a mv s2,a0
8c8e: 00b97533 and a0,s2,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:348
if (bytes_left == 0) {
8c92: cd25 beqz a0,8d0a <spi_memcpy+0xe0>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:357
if (is_recv) {
8c94: 00098363 beqz s3,8c9a <spi_memcpy+0x70>
8c98: 0b11 addi s6,s6,4
8c9a: 6585 lui a1,0x1
8c9c: 00b60bb3 add s7,a2,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:368
SPI_DEVICE_BUFFER_REG_OFFSET + fifo_base + ptr->offset;
8ca0: 000b5503 lhu a0,0(s6)
8ca4: 6641 lui a2,0x10
8ca6: fff60c13 addi s8,a2,-1 # ffff <_chip_info_start+0x7f>
8caa: fff58c93 addi s9,a1,-1 # fff <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x9df>
8cae: 844a mv s0,s2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:366
while (bytes_left > 0) {
8cb0: 01847633 and a2,s0,s8
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:368
SPI_DEVICE_BUFFER_REG_OFFSET + fifo_base + ptr->offset;
8cb4: 018575b3 and a1,a0,s8
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:369
const uint32_t bytes_until_wrap = fifo_len - ptr->offset;
8cb8: 40ba04b3 sub s1,s4,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:371
if (bytes_to_copy > bytes_until_wrap) {
8cbc: 00c4e363 bltu s1,a2,8cc2 <spi_memcpy+0x98>
8cc0: 84a2 mv s1,s0
8cc2: 000aa503 lw a0,0(s5)
8cc6: 95de add a1,a1,s7
8cc8: 0184fdb3 and s11,s1,s8
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:380
mmio_region_memcpy_to_mmio32(spi->base_addr, mmio_offset, byte_buf,
8ccc: 866a mv a2,s10
8cce: 86ee mv a3,s11
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:374
if (is_recv) {
8cd0: 00098563 beqz s3,8cda <spi_memcpy+0xb0>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:376
mmio_region_memcpy_from_mmio32(spi->base_addr, mmio_offset, byte_buf,
8cd4: 24b020ef jal ra,b71e <mmio_region_memcpy_from_mmio32>
8cd8: a019 j 8cde <spi_memcpy+0xb4>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:380
mmio_region_memcpy_to_mmio32(spi->base_addr, mmio_offset, byte_buf,
8cda: 317020ef jal ra,b7f0 <mmio_region_memcpy_to_mmio32>
fifo_ptr_increment():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:177
uint32_t inc_with_overflow = ptr->offset + increment;
8cde: 000b5503 lhu a0,0(s6)
8ce2: 956e add a0,a0,s11
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:179
if (inc_with_overflow >= fifo_len) {
8ce4: 01456a63 bltu a0,s4,8cf8 <spi_memcpy+0xce>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:181
ptr->phase = !ptr->phase;
8ce8: 002b0583 lb a1,2(s6)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:180
inc_with_overflow -= fifo_len;
8cec: 41450533 sub a0,a0,s4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:181
ptr->phase = !ptr->phase;
8cf0: 0015c593 xori a1,a1,1
8cf4: 00bb0123 sb a1,2(s6)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:184
ptr->offset = inc_with_overflow & kFifoOffsetMask;
8cf8: 01957533 and a0,a0,s9
8cfc: 00ab1023 sh a0,0(s6)
spi_memcpy():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:385
bytes_left -= bytes_to_copy;
8d00: 8c05 sub s0,s0,s1
8d02: 018475b3 and a1,s0,s8
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:384
byte_buf += bytes_to_copy;
8d06: 9d6e add s10,s10,s11
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:366
while (bytes_left > 0) {
8d08: f5c5 bnez a1,8cb0 <spi_memcpy+0x86>
8d0a: 6541 lui a0,0x10
8d0c: 157d addi a0,a0,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:348
if (bytes_left == 0) {
8d0e: 00a97533 and a0,s2,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:389
}
8d12: 4db2 lw s11,12(sp)
8d14: 4d42 lw s10,16(sp)
8d16: 4cd2 lw s9,20(sp)
8d18: 4c62 lw s8,24(sp)
8d1a: 4bf2 lw s7,28(sp)
8d1c: 5b02 lw s6,32(sp)
8d1e: 5a92 lw s5,36(sp)
8d20: 5a22 lw s4,40(sp)
8d22: 59b2 lw s3,44(sp)
8d24: 5942 lw s2,48(sp)
8d26: 54d2 lw s1,52(sp)
8d28: 5462 lw s0,56(sp)
8d2a: 50f2 lw ra,60(sp)
8d2c: 6121 addi sp,sp,64
8d2e: 8082 ret
00008d30 <dif_spi_device_send>:
dif_spi_device_send():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:417
dif_result_t dif_spi_device_send(const dif_spi_device_t *spi,
const dif_spi_device_config_t *config,
const void *buf, size_t buf_len,
size_t *bytes_sent) {
8d30: 1101 addi sp,sp,-32
8d32: ce06 sw ra,28(sp)
8d34: cc22 sw s0,24(sp)
8d36: ca26 sw s1,20(sp)
8d38: c84a sw s2,16(sp)
8d3a: 842a mv s0,a0
8d3c: 4509 li a0,2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:418
if (spi == NULL || config == NULL || buf == NULL) {
8d3e: c82d beqz s0,8db0 <dif_spi_device_send+0x80>
8d40: c9a5 beqz a1,8db0 <dif_spi_device_send+0x80>
8d42: 893a mv s2,a4
8d44: 8732 mv a4,a2
8d46: c62d beqz a2,8db0 <dif_spi_device_send+0x80>
8d48: 8836 mv a6,a3
decompress_ptrs():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:210
uint32_t ptr = mmio_region_read32(spi->base_addr, params.reg_offset);
8d4a: 4008 lw a0,0(s0)
mmio_region_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:103
return ((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)];
8d4c: 5508 lw a0,40(a0)
decompress_ptrs():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:212
(uint16_t)((ptr >> params.write_offset) & params.write_mask);
8d4e: 01055613 srli a2,a0,0x10
8d52: 6685 lui a3,0x1
8d54: 16fd addi a3,a3,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:218
.offset = write_val & kFifoOffsetMask,
8d56: 8e75 and a2,a2,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:223
.offset = read_val & kFifoOffsetMask,
8d58: 8ee9 and a3,a3,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:227
}
8d5a: 00c55793 srli a5,a0,0xc
8d5e: 64c1 lui s1,0x10
8d60: 8fe5 and a5,a5,s1
8d62: 8e5d or a2,a2,a5
8d64: 0512 slli a0,a0,0x4
8d66: 8d65 and a0,a0,s1
8d68: 8d55 or a0,a0,a3
dif_spi_device_send():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:423
return kDifBadArg;
}
// Start of the TX FIFO is the end of the RX FIFO.
fifo_ptrs_t fifo = decompress_ptrs(spi, kTxFifoParams);
8d6a: c432 sw a2,8(sp)
8d6c: c62a sw a0,12(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:426
size_t bytes =
spi_memcpy(spi, &fifo, config->rx_fifo_len, config->tx_fifo_len,
8d6e: 0125d603 lhu a2,18(a1)
8d72: 0145d683 lhu a3,20(a1)
8d76: 002c addi a1,sp,8
8d78: 8522 mv a0,s0
8d7a: 87c2 mv a5,a6
8d7c: 4801 li a6,0
8d7e: 3575 jal 8c2a <spi_memcpy>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:428
(uint8_t *)buf, buf_len, /*is_recv=*/false);
if (bytes_sent != NULL) {
8d80: 00090463 beqz s2,8d88 <dif_spi_device_send+0x58>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:429
*bytes_sent = bytes;
8d84: 00a92023 sw a0,0(s2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:431
}
if (bytes > 0) {
8d88: c11d beqz a0,8dae <dif_spi_device_send+0x7e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:433
// Commit the new TX FIFO pointers.
compress_ptrs(spi, kTxFifoParams, fifo);
8d8a: 4522 lw a0,8(sp)
8d8c: 45b2 lw a1,12(sp)
compress_ptrs():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:240
if (ptrs.write_ptr.phase) {
8d8e: 00455613 srli a2,a0,0x4
8d92: 6685 lui a3,0x1
8d94: 8e75 and a2,a2,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:244
if (ptrs.read_ptr.phase) {
8d96: 0045d713 srli a4,a1,0x4
8d9a: 8ef9 and a3,a3,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:254
write_val);
8d9c: 8d51 or a0,a0,a2
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8d9e: 0542 slli a0,a0,0x10
8da0: 6641 lui a2,0x10
8da2: 167d addi a2,a2,-1
compress_ptrs():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:261
mmio_region_write32(spi->base_addr, params.reg_offset, ptr);
8da4: 4018 lw a4,0(s0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:260
read_val);
8da6: 8df1 and a1,a1,a2
8da8: 8dd5 or a1,a1,a3
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8daa: 8d4d or a0,a0,a1
mmio_region_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:152
((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)] = value;
8dac: d708 sw a0,40(a4)
8dae: 4501 li a0,0
dif_spi_device_send():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/dif_spi_device.c:436
}
return kDifOk;
}
8db0: 4942 lw s2,16(sp)
8db2: 44d2 lw s1,20(sp)
8db4: 4462 lw s0,24(sp)
8db6: 40f2 lw ra,28(sp)
8db8: 6105 addi sp,sp,32
8dba: 8082 ret
00008dbc <dif_spi_device_init>:
dif_spi_device_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/autogen/dif_spi_device_autogen.c:16
#include "spi_device_regs.h" // Generated.
OT_WARN_UNUSED_RESULT
dif_result_t dif_spi_device_init(mmio_region_t base_addr,
dif_spi_device_t *spi_device) {
if (spi_device == NULL) {
8dbc: c581 beqz a1,8dc4 <dif_spi_device_init+0x8>
8dbe: 4601 li a2,0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/autogen/dif_spi_device_autogen.c:20
return kDifBadArg;
}
spi_device->base_addr = base_addr;
8dc0: c188 sw a0,0(a1)
8dc2: a011 j 8dc6 <dif_spi_device_init+0xa>
8dc4: 4609 li a2,2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/dif/autogen/dif_spi_device_autogen.c:23
return kDifOk;
}
8dc6: 8532 mv a0,a2
8dc8: 8082 ret
00008dca <hmac_sha256_init>:
hmac_sha256_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:16
#include "sw/device/silicon_creator/lib/error.h"
#include "hmac_regs.h" // Generated.
#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
void hmac_sha256_init(void) {
8dca: 41110537 lui a0,0x41110
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*
* @param addr the address to write to.
* @param value the value to write.
*/
inline void abs_mmio_write32(uint32_t addr, uint32_t value) {
*((volatile uint32_t *)addr) = value;
8dce: 00052823 sw zero,16(a0) # 41110010 <_stack_end+0x310f0010>
8dd2: 00052223 sw zero,4(a0)
8dd6: 55fd li a1,-1
8dd8: c10c sw a1,0(a0)
8dda: 4599 li a1,6
8ddc: c90c sw a1,16(a0)
8dde: 4585 li a1,1
8de0: c94c sw a1,20(a0)
hmac_sha256_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:37
abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET, reg);
reg = 0;
reg = bitfield_bit32_write(reg, HMAC_CMD_HASH_START_BIT, true);
abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CMD_REG_OFFSET, reg);
}
8de2: 8082 ret
00008de4 <hmac_sha256_update>:
hmac_sha256_update():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:43
void hmac_sha256_update(const void *data, size_t len) {
const uint8_t *data_sent = (const uint8_t *)data;
// Individual byte writes are needed if the buffer isn't word aligned.
for (; len != 0 && (uintptr_t)data_sent & 3; --len) {
8de4: c19d beqz a1,8e0a <hmac_sha256_update+0x26>
8de6: 00357613 andi a2,a0,3
8dea: c205 beqz a2,8e0a <hmac_sha256_update+0x26>
8dec: 41111637 lui a2,0x41111
8df0: 4685 li a3,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:45
abs_mmio_write8(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_MSG_FIFO_REG_OFFSET,
*data_sent++);
8df2: 00050703 lb a4,0(a0)
8df6: 87ae mv a5,a1
8df8: 0505 addi a0,a0,1
abs_mmio_write8():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:58
*((volatile uint8_t *)addr) = value;
8dfa: 80e60023 sb a4,-2048(a2) # 41110800 <_stack_end+0x310f0800>
hmac_sha256_update():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:43
for (; len != 0 && (uintptr_t)data_sent & 3; --len) {
8dfe: 15fd addi a1,a1,-1
8e00: 00d78563 beq a5,a3,8e0a <hmac_sha256_update+0x26>
8e04: 00357713 andi a4,a0,3
8e08: f76d bnez a4,8df2 <hmac_sha256_update+0xe>
8e0a: 4611 li a2,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:48
}
for (; len >= sizeof(uint32_t); len -= sizeof(uint32_t)) {
8e0c: 00c5ec63 bltu a1,a2,8e24 <hmac_sha256_update+0x40>
8e10: 41111637 lui a2,0x41111
8e14: 468d li a3,3
read_32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/memory.h:52
// Failing to get that particular codegen in either GCC or Clang with -O2 or
// -Os set shall be considred a bug in this function. The same applies to
// `write32()`.
ptr = __builtin_assume_aligned(ptr, alignof(uint32_t));
uint32_t val;
__builtin_memcpy(&val, ptr, sizeof(uint32_t));
8e16: 4118 lw a4,0(a0)
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
8e18: 80e62023 sw a4,-2048(a2) # 41110800 <_stack_end+0x310f0800>
hmac_sha256_update():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:48
8e1c: 15f1 addi a1,a1,-4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:52
uint32_t data_aligned = read_32(data_sent);
abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_MSG_FIFO_REG_OFFSET,
data_aligned);
data_sent += sizeof(uint32_t);
8e1e: 0511 addi a0,a0,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:48
for (; len >= sizeof(uint32_t); len -= sizeof(uint32_t)) {
8e20: feb6ebe3 bltu a3,a1,8e16 <hmac_sha256_update+0x32>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:56
}
// Handle non-32bit aligned bytes at the end of the buffer.
for (; len != 0; --len) {
8e24: c991 beqz a1,8e38 <hmac_sha256_update+0x54>
8e26: 41111637 lui a2,0x41111
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:58
abs_mmio_write8(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_MSG_FIFO_REG_OFFSET,
*data_sent++);
8e2a: 00050683 lb a3,0(a0)
8e2e: 0505 addi a0,a0,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:56
for (; len != 0; --len) {
8e30: 15fd addi a1,a1,-1
abs_mmio_write8():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:58
*((volatile uint8_t *)addr) = value;
8e32: 80d60023 sb a3,-2048(a2) # 41110800 <_stack_end+0x310f0800>
hmac_sha256_update():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:56
8e36: f9f5 bnez a1,8e2a <hmac_sha256_update+0x46>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:60
}
}
8e38: 8082 ret
00008e3a <hmac_sha256_final>:
hmac_sha256_final():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:62
void hmac_sha256_final(hmac_digest_t *digest) {
8e3a: 411105b7 lui a1,0x41110
8e3e: 01458613 addi a2,a1,20 # 41110014 <_stack_end+0x310f0014>
8e42: 4689 li a3,2
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
8e44: c214 sw a3,0(a2)
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
8e46: 4190 lw a2,0(a1)
bitfield_bit32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:125
bitfield_bit32_to_field32(bit_index)) == 0x1u;
8e48: 00167693 andi a3,a2,1
hmac_sha256_final():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:70
abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CMD_REG_OFFSET, reg);
do {
reg = abs_mmio_read32(TOP_EARLGREY_HMAC_BASE_ADDR +
HMAC_INTR_STATE_REG_OFFSET);
} while (!bitfield_bit32_read(reg, HMAC_INTR_STATE_HMAC_DONE_BIT));
8e4c: deed beqz a3,8e46 <hmac_sha256_final+0xc>
8e4e: 4581 li a1,0
8e50: 411106b7 lui a3,0x41110
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
8e54: c290 sw a2,0(a3)
8e56: 06068613 addi a2,a3,96 # 41110060 <_stack_end+0x310f0060>
8e5a: 02000693 li a3,32
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
8e5e: 4218 lw a4,0(a2)
hmac_sha256_final():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:77
reg);
// Read the digest in reverse to preserve the numerical value.
// The least significant word is at HMAC_DIGEST_7_REG_OFFSET.
for (size_t i = 0; i < ARRAYSIZE(digest->digest); ++i) {
digest->digest[i] =
8e60: 00b507b3 add a5,a0,a1
8e64: c398 sw a4,0(a5)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:76
for (size_t i = 0; i < ARRAYSIZE(digest->digest); ++i) {
8e66: 0591 addi a1,a1,4
8e68: 1671 addi a2,a2,-4
8e6a: fed59ae3 bne a1,a3,8e5e <hmac_sha256_final+0x24>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/hmac.c:81
abs_mmio_read32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_DIGEST_7_REG_OFFSET -
(i * sizeof(uint32_t)));
}
}
8e6e: 8082 ret
00008e70 <flash_ctrl_init>:
flash_ctrl_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:288
const info_cfg_regs_t regs = info_cfg_regs(info_page);
sec_mmio_write32_shadowed(regs.cfg_addr, 0);
sec_mmio_write32(regs.cfg_wen_addr, 0);
}
void flash_ctrl_init(void) {
8e70: 1101 addi sp,sp,-32
8e72: ce06 sw ra,28(sp)
8e74: cc22 sw s0,24(sp)
8e76: ca26 sw s1,20(sp)
8e78: c84a sw s2,16(sp)
8e7a: 41000537 lui a0,0x41000
8e7e: 4585 li a1,1
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
8e80: cd0c sw a1,24(a0)
8e82: f56af537 lui a0,0xf56af
8e86: 4bb50513 addi a0,a0,1211 # f56af4bb <_stack_end+0xe568f4bb>
flash_ctrl_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:293
// Initialize the flash controller.
abs_mmio_write32(kBase + FLASH_CTRL_INIT_REG_OFFSET,
bitfield_bit32_write(0, FLASH_CTRL_INIT_VAL_BIT, true));
// Disable all access to the silicon creator secret info page.
page_lockdown(kFlashCtrlInfoPageCreatorSecret);
8e8a: 289d jal 8f00 <page_lockdown>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:294
sec_mmio_write_increment(2);
8e8c: 4509 li a0,2
8e8e: 203000ef jal ra,9890 <sec_mmio_write_increment>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:297
// Configure default scrambling, ECC, and HE settings for the data partition.
uint32_t otp_val =
otp_read32(OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG_OFFSET);
8e92: 0d400513 li a0,212
8e96: 2df000ef jal ra,9974 <otp_read32>
bitfield_field32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:60
return (bitfield >> field.index) & field.mask;
8e9a: 0ff57593 andi a1,a0,255
8e9e: 00855613 srli a2,a0,0x8
8ea2: 0ff67613 andi a2,a2,255
8ea6: 8141 srli a0,a0,0x10
8ea8: 0ff57513 andi a0,a0,255
flash_ctrl_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:304
.scrambling =
bitfield_field32_read(otp_val, FLASH_CTRL_OTP_FIELD_SCRAMBLING),
.ecc = bitfield_field32_read(otp_val, FLASH_CTRL_OTP_FIELD_ECC),
.he = bitfield_field32_read(otp_val, FLASH_CTRL_OTP_FIELD_HE),
};
flash_ctrl_data_default_cfg_set(data_default_cfg);
8eac: c02e sw a1,0(sp)
8eae: c232 sw a2,4(sp)
8eb0: c42a sw a0,8(sp)
8eb2: 850a mv a0,sp
8eb4: 20b5 jal 8f20 <flash_ctrl_data_default_cfg_set>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:307
// Configure scrambling, ECC, and HE for `boot_data` pages.
otp_val =
otp_read32(OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG_OFFSET);
8eb6: 0d800513 li a0,216
8eba: 2bb000ef jal ra,9974 <otp_read32>
bitfield_field32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:60
8ebe: 0ff57913 andi s2,a0,255
8ec2: 00855593 srli a1,a0,0x8
8ec6: 0ff5f493 andi s1,a1,255
8eca: 8141 srli a0,a0,0x10
8ecc: 0ff57413 andi s0,a0,255
flash_ctrl_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:314
.scrambling =
bitfield_field32_read(otp_val, FLASH_CTRL_OTP_FIELD_SCRAMBLING),
.ecc = bitfield_field32_read(otp_val, FLASH_CTRL_OTP_FIELD_ECC),
.he = bitfield_field32_read(otp_val, FLASH_CTRL_OTP_FIELD_HE),
};
flash_ctrl_info_cfg_set(kFlashCtrlInfoPageBootData0, boot_data_cfg);
8ed0: c04a sw s2,0(sp)
8ed2: c226 sw s1,4(sp)
8ed4: c422 sw s0,8(sp)
8ed6: fa38d537 lui a0,0xfa38d
8eda: 9f650513 addi a0,a0,-1546 # fa38c9f6 <_stack_end+0xea36c9f6>
8ede: 858a mv a1,sp
8ee0: 2869 jal 8f7a <flash_ctrl_info_cfg_set>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:315
flash_ctrl_info_cfg_set(kFlashCtrlInfoPageBootData1, boot_data_cfg);
8ee2: c04a sw s2,0(sp)
8ee4: c226 sw s1,4(sp)
8ee6: c422 sw s0,8(sp)
8ee8: 389c4537 lui a0,0x389c4
8eec: 49e50513 addi a0,a0,1182 # 389c449e <_stack_end+0x289a449e>
8ef0: 858a mv a1,sp
8ef2: 2061 jal 8f7a <flash_ctrl_info_cfg_set>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:316
}
8ef4: 4942 lw s2,16(sp)
8ef6: 44d2 lw s1,20(sp)
8ef8: 4462 lw s0,24(sp)
8efa: 40f2 lw ra,28(sp)
8efc: 6105 addi sp,sp,32
8efe: 8082 ret
00008f00 <page_lockdown>:
page_lockdown():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:282
static void page_lockdown(flash_ctrl_info_page_t info_page) {
8f00: 1141 addi sp,sp,-16
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:283
const info_cfg_regs_t regs = info_cfg_regs(info_page);
8f02: c606 sw ra,12(sp)
8f04: c422 sw s0,8(sp)
8f06: 21a5 jal 936e <info_cfg_regs>
8f08: 842a mv s0,a0
8f0a: 852e mv a0,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:284
sec_mmio_write32_shadowed(regs.cfg_addr, 0);
8f0c: 4581 li a1,0
8f0e: 131000ef jal ra,983e <sec_mmio_write32_shadowed>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:285
sec_mmio_write32(regs.cfg_wen_addr, 0);
8f12: 8522 mv a0,s0
8f14: 4581 li a1,0
8f16: 4422 lw s0,8(sp)
8f18: 40b2 lw ra,12(sp)
8f1a: 0141 addi sp,sp,16
8f1c: 0d30006f j 97ee <sec_mmio_write32>
00008f20 <flash_ctrl_data_default_cfg_set>:
flash_ctrl_data_default_cfg_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:448
perms.erase == kHardenedBoolTrue);
sec_mmio_write32_shadowed(cfg_addr, reg);
sec_mmio_write_increment(1);
}
void flash_ctrl_data_default_cfg_set(flash_ctrl_cfg_t cfg) {
8f20: 1141 addi sp,sp,-16
8f22: c606 sw ra,12(sp)
8f24: c422 sw s0,8(sp)
8f26: c226 sw s1,4(sp)
8f28: 842a mv s0,a0
8f2a: 41000537 lui a0,0x41000
8f2e: 07050493 addi s1,a0,112 # 41000070 <_stack_end+0x30fe0070>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:451
// Read first to preserve permission bits.
uint32_t reg =
sec_mmio_read32(kBase + FLASH_CTRL_DEFAULT_REGION_SHADOWED_REG_OFFSET);
8f32: 8526 mv a0,s1
8f34: 007000ef jal ra,973a <sec_mmio_read32>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:454
reg = bitfield_bit32_write(reg,
FLASH_CTRL_DEFAULT_REGION_SHADOWED_SCRAMBLE_EN_BIT,
cfg.scrambling == kMultiBitBool8True);
8f38: 400c lw a1,0(s0)
8f3a: fa658593 addi a1,a1,-90
8f3e: 0015b593 seqz a1,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:456
reg = bitfield_bit32_write(reg, FLASH_CTRL_DEFAULT_REGION_SHADOWED_ECC_EN_BIT,
cfg.ecc == kMultiBitBool8True);
8f42: 4050 lw a2,4(s0)
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:79
bitfield &= ~(field.mask << field.index);
8f44: fc757513 andi a0,a0,-57
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
bitfield |= (value & field.mask) << field.index;
8f48: 058e slli a1,a1,0x3
8f4a: 8d4d or a0,a0,a1
flash_ctrl_data_default_cfg_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:456
8f4c: fa660593 addi a1,a2,-90
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:458
reg = bitfield_bit32_write(reg, FLASH_CTRL_DEFAULT_REGION_SHADOWED_HE_EN_BIT,
cfg.he == kMultiBitBool8True);
8f50: 4410 lw a2,8(s0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:456
cfg.ecc == kMultiBitBool8True);
8f52: 0015b593 seqz a1,a1
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8f56: 0592 slli a1,a1,0x4
8f58: 8d4d or a0,a0,a1
flash_ctrl_data_default_cfg_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:458
cfg.he == kMultiBitBool8True);
8f5a: fa660593 addi a1,a2,-90
8f5e: 0015b593 seqz a1,a1
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8f62: 0596 slli a1,a1,0x5
8f64: 8dc9 or a1,a1,a0
flash_ctrl_data_default_cfg_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:459
sec_mmio_write32_shadowed(
8f66: 8526 mv a0,s1
8f68: 0d7000ef jal ra,983e <sec_mmio_write32_shadowed>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:461
kBase + FLASH_CTRL_DEFAULT_REGION_SHADOWED_REG_OFFSET, reg);
sec_mmio_write_increment(1);
8f6c: 4505 li a0,1
8f6e: 4492 lw s1,4(sp)
8f70: 4422 lw s0,8(sp)
8f72: 40b2 lw ra,12(sp)
8f74: 0141 addi sp,sp,16
8f76: 11b0006f j 9890 <sec_mmio_write_increment>
00008f7a <flash_ctrl_info_cfg_set>:
flash_ctrl_info_cfg_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:465
}
void flash_ctrl_info_cfg_set(flash_ctrl_info_page_t info_page,
flash_ctrl_cfg_t cfg) {
8f7a: 1141 addi sp,sp,-16
8f7c: c606 sw ra,12(sp)
8f7e: c422 sw s0,8(sp)
8f80: c226 sw s1,4(sp)
8f82: 842e mv s0,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:466
const uint32_t cfg_addr = info_cfg_regs(info_page).cfg_addr;
8f84: 26ed jal 936e <info_cfg_regs>
8f86: 84ae mv s1,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:468
// Read first to preserve permission bits.
uint32_t reg = sec_mmio_read32(cfg_addr);
8f88: 852e mv a0,a1
8f8a: 2f45 jal 973a <sec_mmio_read32>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:473
reg = bitfield_bit32_write(
reg, FLASH_CTRL_BANK0_INFO0_PAGE_CFG_SHADOWED_0_EN_0_BIT, true);
reg = bitfield_bit32_write(
reg, FLASH_CTRL_BANK0_INFO0_PAGE_CFG_SHADOWED_0_SCRAMBLE_EN_0_BIT,
cfg.scrambling == kMultiBitBool8True);
8f8c: 400c lw a1,0(s0)
8f8e: fa658593 addi a1,a1,-90
8f92: 0015b593 seqz a1,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:476
reg = bitfield_bit32_write(
reg, FLASH_CTRL_BANK0_INFO0_PAGE_CFG_SHADOWED_0_ECC_EN_0_BIT,
cfg.ecc == kMultiBitBool8True);
8f96: 4050 lw a2,4(s0)
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:79
bitfield &= ~(field.mask << field.index);
8f98: f8e57513 andi a0,a0,-114
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
bitfield |= (value & field.mask) << field.index;
8f9c: 0592 slli a1,a1,0x4
8f9e: 8d4d or a0,a0,a1
flash_ctrl_info_cfg_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:476
8fa0: fa660593 addi a1,a2,-90
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:479
reg = bitfield_bit32_write(
reg, FLASH_CTRL_BANK0_INFO0_PAGE_CFG_SHADOWED_0_HE_EN_0_BIT,
cfg.he == kMultiBitBool8True);
8fa4: 4410 lw a2,8(s0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:476
cfg.ecc == kMultiBitBool8True);
8fa6: 0015b593 seqz a1,a1
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8faa: 0596 slli a1,a1,0x5
8fac: 8d4d or a0,a0,a1
flash_ctrl_info_cfg_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:479
cfg.he == kMultiBitBool8True);
8fae: fa660593 addi a1,a2,-90
8fb2: 0015b593 seqz a1,a1
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8fb6: 059a slli a1,a1,0x6
8fb8: 8d4d or a0,a0,a1
8fba: 00156593 ori a1,a0,1
flash_ctrl_info_cfg_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:480
sec_mmio_write32_shadowed(cfg_addr, reg);
8fbe: 8526 mv a0,s1
8fc0: 07f000ef jal ra,983e <sec_mmio_write32_shadowed>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:481
sec_mmio_write_increment(1);
8fc4: 4505 li a0,1
8fc6: 4492 lw s1,4(sp)
8fc8: 4422 lw s0,8(sp)
8fca: 40b2 lw ra,12(sp)
8fcc: 0141 addi sp,sp,16
8fce: 0c30006f j 9890 <sec_mmio_write_increment>
00008fd2 <flash_ctrl_info_read>:
flash_ctrl_info_read():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:351
void *data) {
8fd2: 1141 addi sp,sp,-16
8fd4: c606 sw ra,12(sp)
8fd6: c422 sw s0,8(sp)
8fd8: c226 sw s1,4(sp)
8fda: c04a sw s2,0(sp)
8fdc: 8436 mv s0,a3
8fde: 84b2 mv s1,a2
8fe0: 892e mv s2,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:352
const uint32_t addr = info_page_addr(info_page) + offset;
8fe2: 28a9 jal 903c <info_page_addr>
8fe4: 012505b3 add a1,a0,s2
8fe8: 41000537 lui a0,0x41000
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
8fec: d14c sw a1,36(a0)
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
8fee: 01049593 slli a1,s1,0x10
8ff2: 0fff0637 lui a2,0xfff0
8ff6: 95b2 add a1,a1,a2
8ff8: 8df1 and a1,a1,a2
8ffa: 1015e593 ori a1,a1,257
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
8ffe: d10c sw a1,32(a0)
fifo_read():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:121
for (size_t i = 0; i < word_count; ++i) {
9000: c499 beqz s1,900e <flash_ctrl_info_read+0x3c>
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
9002: 18c52583 lw a1,396(a0) # 4100018c <_stack_end+0x30fe018c>
write_32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/memory.h:78
inline void write_32(uint32_t value, void *ptr) {
// Both GCC and Clang optimize the code below into a single word-store on most
// platforms. See the comment in `read_32()` for more implementation-private
// information.
ptr = __builtin_assume_aligned(ptr, alignof(uint32_t));
__builtin_memcpy(ptr, &value, sizeof(uint32_t));
9006: c00c sw a1,0(s0)
fifo_read():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:121
9008: 14fd addi s1,s1,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:123
data = (char *)data + sizeof(uint32_t);
900a: 0411 addi s0,s0,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:121
for (size_t i = 0; i < word_count; ++i) {
900c: f8fd bnez s1,9002 <flash_ctrl_info_read+0x30>
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
900e: 14c52583 lw a1,332(a0)
bitfield_bit32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:125
bitfield_bit32_to_field32(bit_index)) == 0x1u;
9012: 0015f613 andi a2,a1,1
wait_for_done():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:152
} while (!bitfield_bit32_read(op_status, FLASH_CTRL_OP_STATUS_DONE_BIT));
9016: de65 beqz a2,900e <flash_ctrl_info_read+0x3c>
9018: 41000537 lui a0,0x41000
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
901c: 14052623 sw zero,332(a0) # 4100014c <_stack_end+0x30fe014c>
bitfield_bit32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:125
9020: 8989 andi a1,a1,2
9022: 73900513 li a0,1849
9026: c589 beqz a1,9030 <flash_ctrl_info_read+0x5e>
9028: 02464537 lui a0,0x2464
902c: 30d50513 addi a0,a0,781 # 246430d <_chip_info_end+0x245430d>
flash_ctrl_info_read():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:362
return wait_for_done(kErrorFlashCtrlInfoRead);
9030: 4902 lw s2,0(sp)
9032: 4492 lw s1,4(sp)
9034: 4422 lw s0,8(sp)
9036: 40b2 lw ra,12(sp)
9038: 0141 addi sp,sp,16
903a: 8082 ret
0000903c <info_page_addr>:
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
// > of statements.
// The +r constraint tells the compiler that this is an "inout" parameter: it
// means that not only does the black box depend on `val`, but it also mutates
// it in an unspecified way.
asm volatile("" : "+r"(val));
903c: 85aa mv a1,a0
903e: f56af637 lui a2,0xf56af
9042: 4ba60613 addi a2,a2,1210 # f56af4ba <_stack_end+0xe568f4ba>
info_page_addr():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
9046: 04b64163 blt a2,a1,9088 <info_page_addr+0x4c>
904a: ad887637 lui a2,0xad887
904e: d3a60613 addi a2,a2,-710 # ad886d3a <_stack_end+0x9d866d3a>
9052: 06b64a63 blt a2,a1,90c6 <info_page_addr+0x8a>
9056: a4f6f637 lui a2,0xa4f6f
905a: 6c260693 addi a3,a2,1730 # a4f6f6c2 <_stack_end+0x94f4f6c2>
905e: 0cb6d663 bge a3,a1,912a <info_page_addr+0xee>
9062: 6c360613 addi a2,a2,1731
9066: 12c58e63 beq a1,a2,91a2 <info_page_addr+0x166>
906a: ad3b6637 lui a2,0xad3b6
906e: bee60613 addi a2,a2,-1042 # ad3b5bee <_stack_end+0x9d395bee>
9072: 18c59c63 bne a1,a2,920a <info_page_addr+0x1ce>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
9076: 00c50663 beq a0,a2,9082 <info_page_addr+0x46>
907a: 0000 unimp
907c: 0000 unimp
907e: 0000 unimp
9080: 0000 unimp
9082: 20002537 lui a0,0x20002
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:227
}
9086: 8082 ret
9088: 238cf637 lui a2,0x238cf
908c: 15b60613 addi a2,a2,347 # 238cf15b <_stack_end+0x138af15b>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
9090: 06b64463 blt a2,a1,90f8 <info_page_addr+0xbc>
9094: fa38d637 lui a2,0xfa38d
9098: 9f560693 addi a3,a2,-1547 # fa38c9f5 <_stack_end+0xea36c9f5>
909c: 0ab6d663 bge a3,a1,9148 <info_page_addr+0x10c>
90a0: 9f660613 addi a2,a2,-1546
90a4: 10c58c63 beq a1,a2,91bc <info_page_addr+0x180>
90a8: 10adc637 lui a2,0x10adc
90ac: 6aa60613 addi a2,a2,1706 # 10adc6aa <_stack_end+0xabc6aa>
90b0: 16c59c63 bne a1,a2,9228 <info_page_addr+0x1ec>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
90b4: 00c50663 beq a0,a2,90c0 <info_page_addr+0x84>
90b8: 0000 unimp
90ba: 0000 unimp
90bc: 0000 unimp
90be: 0000 unimp
90c0: 20001537 lui a0,0x20001
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:227
}
90c4: 8082 ret
90c6: e3ffb637 lui a2,0xe3ffb
90ca: c8560693 addi a3,a2,-891 # e3ffac85 <_stack_end+0xd3fdac85>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
90ce: 08b6dc63 bge a3,a1,9166 <info_page_addr+0x12a>
90d2: c8660613 addi a2,a2,-890
90d6: 10c58063 beq a1,a2,91d6 <info_page_addr+0x19a>
90da: ec309637 lui a2,0xec309
90de: 46160613 addi a2,a2,1121 # ec309461 <_stack_end+0xdc2e9461>
90e2: 16c59263 bne a1,a2,9246 <info_page_addr+0x20a>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
90e6: 00c50663 beq a0,a2,90f2 <info_page_addr+0xb6>
90ea: 0000 unimp
90ec: 0000 unimp
90ee: 0000 unimp
90f0: 0000 unimp
90f2: 20085537 lui a0,0x20085
90f6: a409 j 92f8 <info_page_addr+0x2bc>
90f8: 5f072637 lui a2,0x5f072
90fc: 77d60693 addi a3,a2,1917 # 5f07277d <_stack_end+0x4f05277d>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
9100: 08b6d263 bge a3,a1,9184 <info_page_addr+0x148>
9104: 77e60613 addi a2,a2,1918
9108: 0ec58463 beq a1,a2,91f0 <info_page_addr+0x1b4>
910c: 6c86e637 lui a2,0x6c86e
9110: 98060613 addi a2,a2,-1664 # 6c86d980 <_stack_end+0x5c84d980>
9114: 14c59863 bne a1,a2,9264 <info_page_addr+0x228>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
9118: 00c50663 beq a0,a2,9124 <info_page_addr+0xe8>
911c: 0000 unimp
911e: 0000 unimp
9120: 0000 unimp
9122: 0000 unimp
9124: 20004537 lui a0,0x20004
9128: aac1 j 92f8 <info_page_addr+0x2bc>
912a: 9dc42637 lui a2,0x9dc42
912e: c3360613 addi a2,a2,-973 # 9dc41c33 <_stack_end+0x8dc21c33>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
9132: 14c59863 bne a1,a2,9282 <info_page_addr+0x246>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
9136: 00c50663 beq a0,a2,9142 <info_page_addr+0x106>
913a: 0000 unimp
913c: 0000 unimp
913e: 0000 unimp
9140: 0000 unimp
9142: 20000537 lui a0,0x20000
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:227
}
9146: 8082 ret
9148: f56af637 lui a2,0xf56af
914c: 4bb60613 addi a2,a2,1211 # f56af4bb <_stack_end+0xe568f4bb>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
9150: 14c59863 bne a1,a2,92a0 <info_page_addr+0x264>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
9154: 00c50663 beq a0,a2,9160 <info_page_addr+0x124>
9158: 0000 unimp
915a: 0000 unimp
915c: 0000 unimp
915e: 0000 unimp
9160: 20001537 lui a0,0x20001
9164: aa51 j 92f8 <info_page_addr+0x2bc>
9166: ad887637 lui a2,0xad887
916a: d3b60613 addi a2,a2,-709 # ad886d3b <_stack_end+0x9d866d3b>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
916e: 14c59863 bne a1,a2,92be <info_page_addr+0x282>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
9172: 00c50663 beq a0,a2,917e <info_page_addr+0x142>
9176: 0000 unimp
9178: 0000 unimp
917a: 0000 unimp
917c: 0000 unimp
917e: 20082537 lui a0,0x20082
9182: aa9d j 92f8 <info_page_addr+0x2bc>
9184: 238cf637 lui a2,0x238cf
9188: 15c60613 addi a2,a2,348 # 238cf15c <_stack_end+0x138af15c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
918c: 14c59863 bne a1,a2,92dc <info_page_addr+0x2a0>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
9190: 00c50663 beq a0,a2,919c <info_page_addr+0x160>
9194: 0000 unimp
9196: 0000 unimp
9198: 0000 unimp
919a: 0000 unimp
919c: 20081537 lui a0,0x20081
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:227
}
91a0: 8082 ret
91a2: a4f6f5b7 lui a1,0xa4f6f
91a6: 6c358593 addi a1,a1,1731 # a4f6f6c3 <_stack_end+0x94f4f6c3>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
91aa: 00b50663 beq a0,a1,91b6 <info_page_addr+0x17a>
91ae: 0000 unimp
91b0: 0000 unimp
91b2: 0000 unimp
91b4: 0000 unimp
91b6: 20003537 lui a0,0x20003
91ba: aa3d j 92f8 <info_page_addr+0x2bc>
91bc: fa38d5b7 lui a1,0xfa38d
91c0: 9f658593 addi a1,a1,-1546 # fa38c9f6 <_stack_end+0xea36c9f6>
91c4: 00b50663 beq a0,a1,91d0 <info_page_addr+0x194>
91c8: 0000 unimp
91ca: 0000 unimp
91cc: 0000 unimp
91ce: 0000 unimp
91d0: 20080537 lui a0,0x20080
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:227
}
91d4: 8082 ret
91d6: e3ffb5b7 lui a1,0xe3ffb
91da: c8658593 addi a1,a1,-890 # e3ffac86 <_stack_end+0xd3fdac86>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
91de: 00b50663 beq a0,a1,91ea <info_page_addr+0x1ae>
91e2: 0000 unimp
91e4: 0000 unimp
91e6: 0000 unimp
91e8: 0000 unimp
91ea: 20083537 lui a0,0x20083
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:227
}
91ee: 8082 ret
91f0: 5f0725b7 lui a1,0x5f072
91f4: 77e58593 addi a1,a1,1918 # 5f07277e <_stack_end+0x4f05277e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
91f8: 00b50663 beq a0,a1,9204 <info_page_addr+0x1c8>
91fc: 0000 unimp
91fe: 0000 unimp
9200: 0000 unimp
9202: 0000 unimp
9204: 20005537 lui a0,0x20005
9208: a8c5 j 92f8 <info_page_addr+0x2bc>
920a: ad5dd637 lui a2,0xad5dd
920e: 31d60613 addi a2,a2,797 # ad5dd31d <_stack_end+0x9d5bd31d>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
9212: 0ec59663 bne a1,a2,92fe <info_page_addr+0x2c2>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
9216: 00c50663 beq a0,a2,9222 <info_page_addr+0x1e6>
921a: 0000 unimp
921c: 0000 unimp
921e: 0000 unimp
9220: 0000 unimp
9222: 20083537 lui a0,0x20083
9226: a8c9 j 92f8 <info_page_addr+0x2bc>
9228: 118b6637 lui a2,0x118b6
922c: dbb60613 addi a2,a2,-581 # 118b5dbb <_stack_end+0x1895dbb>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
9230: 0cc59763 bne a1,a2,92fe <info_page_addr+0x2c2>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
9234: 00c50663 beq a0,a2,9240 <info_page_addr+0x204>
9238: 0000 unimp
923a: 0000 unimp
923c: 0000 unimp
923e: 0000 unimp
9240: 20002537 lui a0,0x20002
9244: a855 j 92f8 <info_page_addr+0x2bc>
9246: f4f49637 lui a2,0xf4f49
924a: c3d60613 addi a2,a2,-963 # f4f48c3d <_stack_end+0xe4f28c3d>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
924e: 0ac59863 bne a1,a2,92fe <info_page_addr+0x2c2>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
9252: 00c50663 beq a0,a2,925e <info_page_addr+0x222>
9256: 0000 unimp
9258: 0000 unimp
925a: 0000 unimp
925c: 0000 unimp
925e: 20084537 lui a0,0x20084
9262: a859 j 92f8 <info_page_addr+0x2bc>
9264: 7dfbe637 lui a2,0x7dfbe
9268: f9b60613 addi a2,a2,-101 # 7dfbdf9b <_stack_end+0x6df9df9b>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
926c: 08c59963 bne a1,a2,92fe <info_page_addr+0x2c2>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
9270: 00c50663 beq a0,a2,927c <info_page_addr+0x240>
9274: 0000 unimp
9276: 0000 unimp
9278: 0000 unimp
927a: 0000 unimp
927c: 20082537 lui a0,0x20082
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:227
}
9280: 8082 ret
9282: 9fbb8637 lui a2,0x9fbb8
9286: 40e60613 addi a2,a2,1038 # 9fbb840e <_stack_end+0x8fb9840e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
928a: 06c59a63 bne a1,a2,92fe <info_page_addr+0x2c2>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
928e: 00c50663 beq a0,a2,929a <info_page_addr+0x25e>
9292: 0000 unimp
9294: 0000 unimp
9296: 0000 unimp
9298: 0000 unimp
929a: 20084537 lui a0,0x20084
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:227
}
929e: 8082 ret
92a0: f646f637 lui a2,0xf646f
92a4: 11b60613 addi a2,a2,283 # f646f11b <_stack_end+0xe644f11b>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
92a8: 04c59b63 bne a1,a2,92fe <info_page_addr+0x2c2>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
92ac: 00c50663 beq a0,a2,92b8 <info_page_addr+0x27c>
92b0: 0000 unimp
92b2: 0000 unimp
92b4: 0000 unimp
92b6: 0000 unimp
92b8: 20003537 lui a0,0x20003
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:227
}
92bc: 8082 ret
92be: dd7f3637 lui a2,0xdd7f3
92c2: 4dc60613 addi a2,a2,1244 # dd7f34dc <_stack_end+0xcd7d34dc>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
92c6: 02c59c63 bne a1,a2,92fe <info_page_addr+0x2c2>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
92ca: 00c50663 beq a0,a2,92d6 <info_page_addr+0x29a>
92ce: 0000 unimp
92d0: 0000 unimp
92d2: 0000 unimp
92d4: 0000 unimp
92d6: 20004537 lui a0,0x20004
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:227
}
92da: 8082 ret
92dc: 389c4637 lui a2,0x389c4
92e0: 49e60613 addi a2,a2,1182 # 389c449e <_stack_end+0x289a449e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:220
switch (launder32(info_page)) {
92e4: 00c59d63 bne a1,a2,92fe <info_page_addr+0x2c2>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:221
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_ADDR_CASE_)
92e8: 00c50663 beq a0,a2,92f4 <info_page_addr+0x2b8>
92ec: 0000 unimp
92ee: 0000 unimp
92f0: 0000 unimp
92f2: 0000 unimp
92f4: 20081537 lui a0,0x20081
92f8: 80050513 addi a0,a0,-2048 # 20080800 <_stack_end+0x10060800>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:227
}
92fc: 8082 ret
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:223
HARDENED_UNREACHABLE();
92fe: 0000 unimp
9300: 0000 unimp
9302: 0000 unimp
9304: 0000 unimp
00009306 <flash_ctrl_exec_set>:
flash_ctrl_exec_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:406
void flash_ctrl_exec_set(uint32_t exec_val) {
9306: 1141 addi sp,sp,-16
9308: c606 sw ra,12(sp)
930a: 85aa mv a1,a0
930c: 41000537 lui a0,0x41000
9310: 0551 addi a0,a0,20
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:407
sec_mmio_write32(kBase + FLASH_CTRL_EXEC_REG_OFFSET, exec_val);
9312: 29f1 jal 97ee <sec_mmio_write32>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:408
sec_mmio_write_increment(1);
9314: 4505 li a0,1
9316: 40b2 lw ra,12(sp)
9318: 0141 addi sp,sp,16
931a: ab9d j 9890 <sec_mmio_write_increment>
0000931c <flash_ctrl_info_perms_set>:
flash_ctrl_info_perms_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:429
flash_ctrl_perms_t perms) {
931c: 1141 addi sp,sp,-16
931e: c606 sw ra,12(sp)
9320: c422 sw s0,8(sp)
9322: c226 sw s1,4(sp)
9324: 842e mv s0,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:430
const uint32_t cfg_addr = info_cfg_regs(info_page).cfg_addr;
9326: 20a1 jal 936e <info_cfg_regs>
9328: 84ae mv s1,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:432
uint32_t reg = sec_mmio_read32(cfg_addr);
932a: 852e mv a0,a1
932c: 2139 jal 973a <sec_mmio_read32>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:437
perms.read == kHardenedBoolTrue);
932e: 400c lw a1,0(s0)
9330: 8c758593 addi a1,a1,-1849
9334: 0015b593 seqz a1,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:440
perms.write == kHardenedBoolTrue);
9338: 4050 lw a2,4(s0)
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:79
bitfield &= ~(field.mask << field.index);
933a: 9941 andi a0,a0,-16
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
bitfield |= (value & field.mask) << field.index;
933c: 0586 slli a1,a1,0x1
933e: 8d4d or a0,a0,a1
flash_ctrl_info_perms_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:440
9340: 8c760593 addi a1,a2,-1849
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:443
perms.erase == kHardenedBoolTrue);
9344: 4410 lw a2,8(s0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:440
perms.write == kHardenedBoolTrue);
9346: 0015b593 seqz a1,a1
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
934a: 058a slli a1,a1,0x2
934c: 8d4d or a0,a0,a1
flash_ctrl_info_perms_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:443
perms.erase == kHardenedBoolTrue);
934e: 8c760593 addi a1,a2,-1849
9352: 0015b593 seqz a1,a1
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
9356: 058e slli a1,a1,0x3
9358: 8d4d or a0,a0,a1
935a: 00156593 ori a1,a0,1
flash_ctrl_info_perms_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:444
sec_mmio_write32_shadowed(cfg_addr, reg);
935e: 8526 mv a0,s1
9360: 29f9 jal 983e <sec_mmio_write32_shadowed>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:445
sec_mmio_write_increment(1);
9362: 4505 li a0,1
9364: 4492 lw s1,4(sp)
9366: 4422 lw s0,8(sp)
9368: 40b2 lw ra,12(sp)
936a: 0141 addi sp,sp,16
936c: a315 j 9890 <sec_mmio_write_increment>
0000936e <info_cfg_regs>:
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
936e: 85aa mv a1,a0
9370: f56af637 lui a2,0xf56af
9374: 4ba60613 addi a2,a2,1210 # f56af4ba <_stack_end+0xe568f4ba>
info_cfg_regs():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
9378: 04b64563 blt a2,a1,93c2 <info_cfg_regs+0x54>
937c: ad887637 lui a2,0xad887
9380: d3a60613 addi a2,a2,-710 # ad886d3a <_stack_end+0x9d866d3a>
9384: 08b64263 blt a2,a1,9408 <info_cfg_regs+0x9a>
9388: a4f6f637 lui a2,0xa4f6f
938c: 6c260693 addi a3,a2,1730 # a4f6f6c2 <_stack_end+0x94f4f6c2>
9390: 0eb6d663 bge a3,a1,947c <info_cfg_regs+0x10e>
9394: 6c360613 addi a2,a2,1731
9398: 16c58e63 beq a1,a2,9514 <info_cfg_regs+0x1a6>
939c: ad3b6637 lui a2,0xad3b6
93a0: bee60613 addi a2,a2,-1042 # ad3b5bee <_stack_end+0x9d395bee>
93a4: 1ec59c63 bne a1,a2,959c <info_cfg_regs+0x22e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
93a8: 00c50663 beq a0,a2,93b4 <info_cfg_regs+0x46>
93ac: 0000 unimp
93ae: 0000 unimp
93b0: 0000 unimp
93b2: 0000 unimp
93b4: 41000537 lui a0,0x41000
93b8: 0ac50593 addi a1,a0,172 # 410000ac <_stack_end+0x30fe00ac>
93bc: 08450513 addi a0,a0,132
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
93c0: 8082 ret
93c2: 238cf637 lui a2,0x238cf
93c6: 15b60613 addi a2,a2,347 # 238cf15b <_stack_end+0x138af15b>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
93ca: 06b64c63 blt a2,a1,9442 <info_cfg_regs+0xd4>
93ce: fa38d637 lui a2,0xfa38d
93d2: 9f560693 addi a3,a2,-1547 # fa38c9f5 <_stack_end+0xea36c9f5>
93d6: 0cb6d663 bge a3,a1,94a2 <info_cfg_regs+0x134>
93da: 9f660613 addi a2,a2,-1546
93de: 14c58c63 beq a1,a2,9536 <info_cfg_regs+0x1c8>
93e2: 10adc637 lui a2,0x10adc
93e6: 6aa60613 addi a2,a2,1706 # 10adc6aa <_stack_end+0xabc6aa>
93ea: 1cc59c63 bne a1,a2,95c2 <info_cfg_regs+0x254>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
93ee: 00c50663 beq a0,a2,93fa <info_cfg_regs+0x8c>
93f2: 0000 unimp
93f4: 0000 unimp
93f6: 0000 unimp
93f8: 0000 unimp
93fa: 41000537 lui a0,0x41000
93fe: 0a450593 addi a1,a0,164 # 410000a4 <_stack_end+0x30fe00a4>
9402: 07c50513 addi a0,a0,124
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
9406: 8082 ret
9408: e3ffb637 lui a2,0xe3ffb
940c: c8560693 addi a3,a2,-891 # e3ffac85 <_stack_end+0xd3fdac85>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
9410: 0ab6dc63 bge a3,a1,94c8 <info_cfg_regs+0x15a>
9414: c8660613 addi a2,a2,-890
9418: 14c58063 beq a1,a2,9558 <info_cfg_regs+0x1ea>
941c: ec309637 lui a2,0xec309
9420: 46160613 addi a2,a2,1121 # ec309461 <_stack_end+0xdc2e9461>
9424: 1cc59263 bne a1,a2,95e8 <info_cfg_regs+0x27a>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
9428: 00c50663 beq a0,a2,9434 <info_cfg_regs+0xc6>
942c: 0000 unimp
942e: 0000 unimp
9430: 0000 unimp
9432: 0000 unimp
9434: 41000537 lui a0,0x41000
9438: 12850593 addi a1,a0,296 # 41000128 <_stack_end+0x30fe0128>
943c: 10050513 addi a0,a0,256
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
9440: 8082 ret
9442: 5f072637 lui a2,0x5f072
9446: 77d60693 addi a3,a2,1917 # 5f07277d <_stack_end+0x4f05277d>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
944a: 0ab6d263 bge a3,a1,94ee <info_cfg_regs+0x180>
944e: 77e60613 addi a2,a2,1918
9452: 12c58463 beq a1,a2,957a <info_cfg_regs+0x20c>
9456: 6c86e637 lui a2,0x6c86e
945a: 98060613 addi a2,a2,-1664 # 6c86d980 <_stack_end+0x5c84d980>
945e: 1ac59863 bne a1,a2,960e <info_cfg_regs+0x2a0>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
9462: 00c50663 beq a0,a2,946e <info_cfg_regs+0x100>
9466: 0000 unimp
9468: 0000 unimp
946a: 0000 unimp
946c: 0000 unimp
946e: 41000537 lui a0,0x41000
9472: 0b850593 addi a1,a0,184 # 410000b8 <_stack_end+0x30fe00b8>
9476: 09050513 addi a0,a0,144
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
947a: 8082 ret
947c: 9dc42637 lui a2,0x9dc42
9480: c3360613 addi a2,a2,-973 # 9dc41c33 <_stack_end+0x8dc21c33>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
9484: 1ac59863 bne a1,a2,9634 <info_cfg_regs+0x2c6>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
9488: 00c50663 beq a0,a2,9494 <info_cfg_regs+0x126>
948c: 0000 unimp
948e: 0000 unimp
9490: 0000 unimp
9492: 0000 unimp
9494: 41000537 lui a0,0x41000
9498: 09c50593 addi a1,a0,156 # 4100009c <_stack_end+0x30fe009c>
949c: 07450513 addi a0,a0,116
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
94a0: 8082 ret
94a2: f56af637 lui a2,0xf56af
94a6: 4bb60613 addi a2,a2,1211 # f56af4bb <_stack_end+0xe568f4bb>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
94aa: 1ac59863 bne a1,a2,965a <info_cfg_regs+0x2ec>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
94ae: 00c50663 beq a0,a2,94ba <info_cfg_regs+0x14c>
94b2: 0000 unimp
94b4: 0000 unimp
94b6: 0000 unimp
94b8: 0000 unimp
94ba: 41000537 lui a0,0x41000
94be: 0a050593 addi a1,a0,160 # 410000a0 <_stack_end+0x30fe00a0>
94c2: 07850513 addi a0,a0,120
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
94c6: 8082 ret
94c8: ad887637 lui a2,0xad887
94cc: d3b60613 addi a2,a2,-709 # ad886d3b <_stack_end+0x9d866d3b>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
94d0: 1ac59863 bne a1,a2,9680 <info_cfg_regs+0x312>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
94d4: 00c50663 beq a0,a2,94e0 <info_cfg_regs+0x172>
94d8: 0000 unimp
94da: 0000 unimp
94dc: 0000 unimp
94de: 0000 unimp
94e0: 41000537 lui a0,0x41000
94e4: 11050593 addi a1,a0,272 # 41000110 <_stack_end+0x30fe0110>
94e8: 0e850513 addi a0,a0,232
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
94ec: 8082 ret
94ee: 238cf637 lui a2,0x238cf
94f2: 15c60613 addi a2,a2,348 # 238cf15c <_stack_end+0x138af15c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
94f6: 1ac59863 bne a1,a2,96a6 <info_cfg_regs+0x338>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
94fa: 00c50663 beq a0,a2,9506 <info_cfg_regs+0x198>
94fe: 0000 unimp
9500: 0000 unimp
9502: 0000 unimp
9504: 0000 unimp
9506: 41000537 lui a0,0x41000
950a: 10c50593 addi a1,a0,268 # 4100010c <_stack_end+0x30fe010c>
950e: 0e450513 addi a0,a0,228
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
9512: 8082 ret
9514: a4f6f5b7 lui a1,0xa4f6f
9518: 6c358593 addi a1,a1,1731 # a4f6f6c3 <_stack_end+0x94f4f6c3>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
951c: 00b50663 beq a0,a1,9528 <info_cfg_regs+0x1ba>
9520: 0000 unimp
9522: 0000 unimp
9524: 0000 unimp
9526: 0000 unimp
9528: 41000537 lui a0,0x41000
952c: 0b050593 addi a1,a0,176 # 410000b0 <_stack_end+0x30fe00b0>
9530: 08850513 addi a0,a0,136
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
9534: 8082 ret
9536: fa38d5b7 lui a1,0xfa38d
953a: 9f658593 addi a1,a1,-1546 # fa38c9f6 <_stack_end+0xea36c9f6>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
953e: 00b50663 beq a0,a1,954a <info_cfg_regs+0x1dc>
9542: 0000 unimp
9544: 0000 unimp
9546: 0000 unimp
9548: 0000 unimp
954a: 41000537 lui a0,0x41000
954e: 10450593 addi a1,a0,260 # 41000104 <_stack_end+0x30fe0104>
9552: 0dc50513 addi a0,a0,220
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
9556: 8082 ret
9558: e3ffb5b7 lui a1,0xe3ffb
955c: c8658593 addi a1,a1,-890 # e3ffac86 <_stack_end+0xd3fdac86>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
9560: 00b50663 beq a0,a1,956c <info_cfg_regs+0x1fe>
9564: 0000 unimp
9566: 0000 unimp
9568: 0000 unimp
956a: 0000 unimp
956c: 41000537 lui a0,0x41000
9570: 11c50593 addi a1,a0,284 # 4100011c <_stack_end+0x30fe011c>
9574: 0f450513 addi a0,a0,244
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
9578: 8082 ret
957a: 5f0725b7 lui a1,0x5f072
957e: 77e58593 addi a1,a1,1918 # 5f07277e <_stack_end+0x4f05277e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
9582: 00b50663 beq a0,a1,958e <info_cfg_regs+0x220>
9586: 0000 unimp
9588: 0000 unimp
958a: 0000 unimp
958c: 0000 unimp
958e: 41000537 lui a0,0x41000
9592: 0c050593 addi a1,a0,192 # 410000c0 <_stack_end+0x30fe00c0>
9596: 09850513 addi a0,a0,152
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
959a: 8082 ret
959c: ad5dd637 lui a2,0xad5dd
95a0: 31d60613 addi a2,a2,797 # ad5dd31d <_stack_end+0x9d5bd31d>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
95a4: 12c59463 bne a1,a2,96cc <info_cfg_regs+0x35e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
95a8: 00c50663 beq a0,a2,95b4 <info_cfg_regs+0x246>
95ac: 0000 unimp
95ae: 0000 unimp
95b0: 0000 unimp
95b2: 0000 unimp
95b4: 41000537 lui a0,0x41000
95b8: 11850593 addi a1,a0,280 # 41000118 <_stack_end+0x30fe0118>
95bc: 0f050513 addi a0,a0,240
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
95c0: 8082 ret
95c2: 118b6637 lui a2,0x118b6
95c6: dbb60613 addi a2,a2,-581 # 118b5dbb <_stack_end+0x1895dbb>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
95ca: 10c59163 bne a1,a2,96cc <info_cfg_regs+0x35e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
95ce: 00c50663 beq a0,a2,95da <info_cfg_regs+0x26c>
95d2: 0000 unimp
95d4: 0000 unimp
95d6: 0000 unimp
95d8: 0000 unimp
95da: 41000537 lui a0,0x41000
95de: 0a850593 addi a1,a0,168 # 410000a8 <_stack_end+0x30fe00a8>
95e2: 08050513 addi a0,a0,128
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
95e6: 8082 ret
95e8: f4f49637 lui a2,0xf4f49
95ec: c3d60613 addi a2,a2,-963 # f4f48c3d <_stack_end+0xe4f28c3d>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
95f0: 0cc59e63 bne a1,a2,96cc <info_cfg_regs+0x35e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
95f4: 00c50663 beq a0,a2,9600 <info_cfg_regs+0x292>
95f8: 0000 unimp
95fa: 0000 unimp
95fc: 0000 unimp
95fe: 0000 unimp
9600: 41000537 lui a0,0x41000
9604: 12050593 addi a1,a0,288 # 41000120 <_stack_end+0x30fe0120>
9608: 0f850513 addi a0,a0,248
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
960c: 8082 ret
960e: 7dfbe637 lui a2,0x7dfbe
9612: f9b60613 addi a2,a2,-101 # 7dfbdf9b <_stack_end+0x6df9df9b>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
9616: 0ac59b63 bne a1,a2,96cc <info_cfg_regs+0x35e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
961a: 00c50663 beq a0,a2,9626 <info_cfg_regs+0x2b8>
961e: 0000 unimp
9620: 0000 unimp
9622: 0000 unimp
9624: 0000 unimp
9626: 41000537 lui a0,0x41000
962a: 11450593 addi a1,a0,276 # 41000114 <_stack_end+0x30fe0114>
962e: 0ec50513 addi a0,a0,236
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
9632: 8082 ret
9634: 9fbb8637 lui a2,0x9fbb8
9638: 40e60613 addi a2,a2,1038 # 9fbb840e <_stack_end+0x8fb9840e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
963c: 08c59863 bne a1,a2,96cc <info_cfg_regs+0x35e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
9640: 00c50663 beq a0,a2,964c <info_cfg_regs+0x2de>
9644: 0000 unimp
9646: 0000 unimp
9648: 0000 unimp
964a: 0000 unimp
964c: 41000537 lui a0,0x41000
9650: 12450593 addi a1,a0,292 # 41000124 <_stack_end+0x30fe0124>
9654: 0fc50513 addi a0,a0,252
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
9658: 8082 ret
965a: f646f637 lui a2,0xf646f
965e: 11b60613 addi a2,a2,283 # f646f11b <_stack_end+0xe644f11b>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
9662: 06c59563 bne a1,a2,96cc <info_cfg_regs+0x35e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
9666: 00c50663 beq a0,a2,9672 <info_cfg_regs+0x304>
966a: 0000 unimp
966c: 0000 unimp
966e: 0000 unimp
9670: 0000 unimp
9672: 41000537 lui a0,0x41000
9676: 0b450593 addi a1,a0,180 # 410000b4 <_stack_end+0x30fe00b4>
967a: 08c50513 addi a0,a0,140
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
967e: 8082 ret
9680: dd7f3637 lui a2,0xdd7f3
9684: 4dc60613 addi a2,a2,1244 # dd7f34dc <_stack_end+0xcd7d34dc>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
9688: 04c59263 bne a1,a2,96cc <info_cfg_regs+0x35e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
968c: 00c50663 beq a0,a2,9698 <info_cfg_regs+0x32a>
9690: 0000 unimp
9692: 0000 unimp
9694: 0000 unimp
9696: 0000 unimp
9698: 41000537 lui a0,0x41000
969c: 0bc50593 addi a1,a0,188 # 410000bc <_stack_end+0x30fe00bc>
96a0: 09450513 addi a0,a0,148
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
96a4: 8082 ret
96a6: 389c4637 lui a2,0x389c4
96aa: 49e60613 addi a2,a2,1182 # 389c449e <_stack_end+0x289a449e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:265
switch (launder32(info_page)) {
96ae: 00c59f63 bne a1,a2,96cc <info_cfg_regs+0x35e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:266
FLASH_CTRL_INFO_PAGES_DEFINE(INFO_CFG_REGS_CASE_)
96b2: 00c50663 beq a0,a2,96be <info_cfg_regs+0x350>
96b6: 0000 unimp
96b8: 0000 unimp
96ba: 0000 unimp
96bc: 0000 unimp
96be: 41000537 lui a0,0x41000
96c2: 10850593 addi a1,a0,264 # 41000108 <_stack_end+0x30fe0108>
96c6: 0e050513 addi a0,a0,224
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:272
}
96ca: 8082 ret
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/flash_ctrl.c:268
HARDENED_UNREACHABLE();
96cc: 0000 unimp
96ce: 0000 unimp
96d0: 0000 unimp
96d2: 0000 unimp
000096d4 <sec_mmio_init>:
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
96d4: 4601 li a2,0
96d6: 4681 li a3,0
96d8: 4701 li a4,0
96da: 4781 li a5,0
96dc: 4581 li a1,0
96de: 0fff7517 auipc a0,0xfff7
96e2: 92250513 addi a0,a0,-1758 # 10000000 <sec_mmio_ctx>
sec_mmio_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:52
// mechanism.
HARDENED_CHECK_LT(i, kSecMmioRegFileSize);
}
void sec_mmio_init(void) {
sec_mmio_ctx.last_index = launder32(0);
96e6: 64c52023 sw a2,1600(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:53
sec_mmio_ctx.write_count = launder32(0);
96ea: 64d52223 sw a3,1604(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:54
sec_mmio_ctx.check_count = launder32(0);
96ee: 64e52623 sw a4,1612(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:55
sec_mmio_ctx.expected_write_count = launder32(0);
96f2: 64f52423 sw a5,1608(a0)
96f6: 567d li a2,-1
96f8: 32000693 li a3,800
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:57
for (size_t i = 0; i < ARRAYSIZE(sec_mmio_ctx.addrs); ++i) {
sec_mmio_ctx.addrs[i] = UINT32_MAX;
96fc: 00a58733 add a4,a1,a0
9700: 32c72023 sw a2,800(a4)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:56
for (size_t i = 0; i < ARRAYSIZE(sec_mmio_ctx.addrs); ++i) {
9704: 0591 addi a1,a1,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:58
sec_mmio_ctx.values[i] = UINT32_MAX;
9706: c310 sw a2,0(a4)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:56
for (size_t i = 0; i < ARRAYSIZE(sec_mmio_ctx.addrs); ++i) {
9708: fed59ae3 bne a1,a3,96fc <sec_mmio_init+0x28>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:60
}
uint32_t check = kSecMmioValZero ^ sec_mmio_ctx.last_index;
970c: 64052583 lw a1,1600(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:61
check ^= sec_mmio_ctx.write_count;
9710: 64452603 lw a2,1604(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:62
check ^= sec_mmio_ctx.check_count;
9714: 64c52683 lw a3,1612(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:63
check ^= sec_mmio_ctx.expected_write_count;
9718: 64852503 lw a0,1608(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:60
uint32_t check = kSecMmioValZero ^ sec_mmio_ctx.last_index;
971c: 8db1 xor a1,a1,a2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:61
check ^= sec_mmio_ctx.write_count;
971e: 8db5 xor a1,a1,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:62
check ^= sec_mmio_ctx.check_count;
9720: 8d2d xor a0,a0,a1
9722: 3ca595b7 lui a1,0x3ca59
9726: 65a58593 addi a1,a1,1626 # 3ca5965a <_stack_end+0x2ca3965a>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:63
check ^= sec_mmio_ctx.expected_write_count;
972a: 8d2d xor a0,a0,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:64
HARDENED_CHECK_EQ(check, kSecMmioValZero);
972c: 00b50663 beq a0,a1,9738 <sec_mmio_init+0x64>
9730: 0000 unimp
9732: 0000 unimp
9734: 0000 unimp
9736: 0000 unimp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:65
}
9738: 8082 ret
0000973a <sec_mmio_read32>:
sec_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:77
sec_mmio_ctx.values[i] = UINT32_MAX;
}
HARDENED_CHECK_EQ(sec_mmio_ctx.check_count, 0);
}
uint32_t sec_mmio_read32(uint32_t addr) {
973a: 1101 addi sp,sp,-32
973c: ce06 sw ra,28(sp)
973e: cc22 sw s0,24(sp)
9740: ca26 sw s1,20(sp)
9742: c84a sw s2,16(sp)
9744: c64e sw s3,12(sp)
9746: 842a mv s0,a0
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
9748: 00052903 lw s2,0(a0)
974c: 21692537 lui a0,0x21692
9750: 43650993 addi s3,a0,1078 # 21692436 <_stack_end+0x11672436>
sec_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:79
uint32_t value = abs_mmio_read32(addr);
uint32_t masked_value = value ^ kSecMmioMaskVal;
9754: 013944b3 xor s1,s2,s3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:81
barrier32(masked_value);
upsert_register(addr, masked_value);
9758: 8522 mv a0,s0
975a: 85a6 mv a1,s1
975c: 2015 jal 9780 <upsert_register>
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
975e: 4008 lw a0,0(s0)
sec_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:82
HARDENED_CHECK_EQ((abs_mmio_read32(addr) ^ kSecMmioMaskVal), masked_value);
9760: 01354533 xor a0,a0,s3
9764: 00950663 beq a0,s1,9770 <sec_mmio_read32+0x36>
9768: 0000 unimp
976a: 0000 unimp
976c: 0000 unimp
976e: 0000 unimp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:84
return value;
9770: 854a mv a0,s2
9772: 49b2 lw s3,12(sp)
9774: 4942 lw s2,16(sp)
9776: 44d2 lw s1,20(sp)
9778: 4462 lw s0,24(sp)
977a: 40f2 lw ra,28(sp)
977c: 6105 addi sp,sp,32
977e: 8082 ret
00009780 <upsert_register>:
upsert_register():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:33
static void upsert_register(uint32_t addr, uint32_t value) {
9780: 0fff7697 auipc a3,0xfff7
9784: 88068693 addi a3,a3,-1920 # 10000000 <sec_mmio_ctx>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:35
for (; i < sec_mmio_ctx.last_index; ++i) {
9788: 6406a603 lw a2,1600(a3)
978c: ce11 beqz a2,97a8 <upsert_register+0x28>
978e: 4601 li a2,0
9790: 8736 mv a4,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:36
if (sec_mmio_ctx.addrs[i] == addr) {
9792: 32072783 lw a5,800(a4)
9796: 00a78b63 beq a5,a0,97ac <upsert_register+0x2c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:35
for (; i < sec_mmio_ctx.last_index; ++i) {
979a: 6406a783 lw a5,1600(a3)
979e: 0605 addi a2,a2,1
97a0: 0711 addi a4,a4,4
97a2: fef668e3 bltu a2,a5,9792 <upsert_register+0x12>
97a6: a021 j 97ae <upsert_register+0x2e>
97a8: 4601 li a2,0
97aa: a011 j 97ae <upsert_register+0x2e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:37
sec_mmio_ctx.values[i] = value;
97ac: c30c sw a1,0(a4)
97ae: 0fff7697 auipc a3,0xfff7
97b2: 85268693 addi a3,a3,-1966 # 10000000 <sec_mmio_ctx>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:41
if (i == sec_mmio_ctx.last_index && i < kSecMmioRegFileSize) {
97b6: 6406a703 lw a4,1600(a3)
97ba: 0c700793 li a5,199
97be: 00c7ef63 bltu a5,a2,97dc <upsert_register+0x5c>
97c2: 00e61d63 bne a2,a4,97dc <upsert_register+0x5c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:42
sec_mmio_ctx.addrs[i] = addr;
97c6: 00261713 slli a4,a2,0x2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:43
sec_mmio_ctx.values[i] = value;
97ca: 9736 add a4,a4,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:42
sec_mmio_ctx.addrs[i] = addr;
97cc: 32a72023 sw a0,800(a4)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:43
sec_mmio_ctx.values[i] = value;
97d0: c30c sw a1,0(a4)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:44
++sec_mmio_ctx.last_index;
97d2: 6406a503 lw a0,1600(a3)
97d6: 0505 addi a0,a0,1
97d8: 64a6a023 sw a0,1600(a3)
97dc: 0c800513 li a0,200
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:48
HARDENED_CHECK_LT(i, kSecMmioRegFileSize);
97e0: 00a64663 blt a2,a0,97ec <upsert_register+0x6c>
97e4: 0000 unimp
97e6: 0000 unimp
97e8: 0000 unimp
97ea: 0000 unimp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:49
}
97ec: 8082 ret
000097ee <sec_mmio_write32>:
sec_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:87
}
void sec_mmio_write32(uint32_t addr, uint32_t value) {
97ee: 1141 addi sp,sp,-16
97f0: c606 sw ra,12(sp)
97f2: c422 sw s0,8(sp)
97f4: c226 sw s1,4(sp)
97f6: c04a sw s2,0(sp)
97f8: 842a mv s0,a0
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
97fa: c10c sw a1,0(a0)
97fc: 21692537 lui a0,0x21692
9800: 43650913 addi s2,a0,1078 # 21692436 <_stack_end+0x11672436>
sec_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:89
abs_mmio_write32(addr, value);
uint32_t masked_value = value ^ kSecMmioMaskVal;
9804: 0125c4b3 xor s1,a1,s2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:91
barrier32(masked_value);
upsert_register(addr, masked_value);
9808: 8522 mv a0,s0
980a: 85a6 mv a1,s1
980c: 3f95 jal 9780 <upsert_register>
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
980e: 4008 lw a0,0(s0)
sec_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:92
HARDENED_CHECK_EQ((abs_mmio_read32(addr) ^ kSecMmioMaskVal), masked_value);
9810: 01254533 xor a0,a0,s2
9814: 00950663 beq a0,s1,9820 <sec_mmio_write32+0x32>
9818: 0000 unimp
981a: 0000 unimp
981c: 0000 unimp
981e: 0000 unimp
9820: 0fff6517 auipc a0,0xfff6
9824: 7e050513 addi a0,a0,2016 # 10000000 <sec_mmio_ctx>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:94
++sec_mmio_ctx.write_count;
9828: 64452583 lw a1,1604(a0)
982c: 0585 addi a1,a1,1
982e: 64b52223 sw a1,1604(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:95
}
9832: 4902 lw s2,0(sp)
9834: 4492 lw s1,4(sp)
9836: 4422 lw s0,8(sp)
9838: 40b2 lw ra,12(sp)
983a: 0141 addi sp,sp,16
983c: 8082 ret
0000983e <sec_mmio_write32_shadowed>:
sec_mmio_write32_shadowed():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:97
void sec_mmio_write32_shadowed(uint32_t addr, uint32_t value) {
983e: 1141 addi sp,sp,-16
9840: c606 sw ra,12(sp)
9842: c422 sw s0,8(sp)
9844: c226 sw s1,4(sp)
9846: c04a sw s2,0(sp)
9848: 842a mv s0,a0
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
984a: c10c sw a1,0(a0)
984c: c10c sw a1,0(a0)
984e: 21692537 lui a0,0x21692
9852: 43650913 addi s2,a0,1078 # 21692436 <_stack_end+0x11672436>
sec_mmio_write32_shadowed():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:101
// Shadowed registers require two writes.
abs_mmio_write32(addr, value);
abs_mmio_write32(addr, value);
uint32_t masked_value = value ^ kSecMmioMaskVal;
9856: 0125c4b3 xor s1,a1,s2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:103
barrier32(masked_value);
upsert_register(addr, masked_value);
985a: 8522 mv a0,s0
985c: 85a6 mv a1,s1
985e: 370d jal 9780 <upsert_register>
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
9860: 4008 lw a0,0(s0)
sec_mmio_write32_shadowed():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:104
HARDENED_CHECK_EQ((abs_mmio_read32(addr) ^ kSecMmioMaskVal), masked_value);
9862: 01254533 xor a0,a0,s2
9866: 00950663 beq a0,s1,9872 <sec_mmio_write32_shadowed+0x34>
986a: 0000 unimp
986c: 0000 unimp
986e: 0000 unimp
9870: 0000 unimp
9872: 0fff6517 auipc a0,0xfff6
9876: 78e50513 addi a0,a0,1934 # 10000000 <sec_mmio_ctx>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:106
++sec_mmio_ctx.write_count;
987a: 64452583 lw a1,1604(a0)
987e: 0585 addi a1,a1,1
9880: 64b52223 sw a1,1604(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:107
}
9884: 4902 lw s2,0(sp)
9886: 4492 lw s1,4(sp)
9888: 4422 lw s0,8(sp)
988a: 40b2 lw ra,12(sp)
988c: 0141 addi sp,sp,16
988e: 8082 ret
00009890 <sec_mmio_write_increment>:
sec_mmio_write_increment():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:109
void sec_mmio_write_increment(uint32_t value) {
9890: 0fff6597 auipc a1,0xfff6
9894: 77058593 addi a1,a1,1904 # 10000000 <sec_mmio_ctx>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:110
sec_mmio_ctx.expected_write_count += value;
9898: 6485a603 lw a2,1608(a1)
989c: 9532 add a0,a0,a2
989e: 64a5a423 sw a0,1608(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:111
}
98a2: 8082 ret
000098a4 <sec_mmio_check_values>:
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
98a4: 4701 li a4,0
98a6: 0fff6597 auipc a1,0xfff6
98aa: 75a58593 addi a1,a1,1882 # 10000000 <sec_mmio_ctx>
sec_mmio_check_values():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:116
void sec_mmio_check_values(uint32_t rnd_offset) {
// Pick a random starting offset.
uint32_t offset =
((uint64_t)rnd_offset * (uint64_t)sec_mmio_ctx.last_index) >> 32;
98ae: 6405a683 lw a3,1600(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:119
enum { kStep = 1 };
size_t i;
for (i = 0; launder32(i) < sec_mmio_ctx.last_index; ++i) {
98b2: 6405a783 lw a5,1600(a1)
98b6: 4601 li a2,0
98b8: 04f77563 bgeu a4,a5,9902 <sec_mmio_check_values+0x5e>
98bc: 4601 li a2,0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:116
((uint64_t)rnd_offset * (uint64_t)sec_mmio_ctx.last_index) >> 32;
98be: 02a6b533 mulhu a0,a3,a0
98c2: 216926b7 lui a3,0x21692
98c6: 43668693 addi a3,a3,1078 # 21692436 <_stack_end+0x11672436>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:120
uint32_t read_value = abs_mmio_read32(sec_mmio_ctx.addrs[offset]);
98ca: 00251713 slli a4,a0,0x2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:121
HARDENED_CHECK_EQ(read_value ^ kSecMmioMaskVal,
98ce: 972e add a4,a4,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:120
uint32_t read_value = abs_mmio_read32(sec_mmio_ctx.addrs[offset]);
98d0: 32072783 lw a5,800(a4)
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
98d4: 439c lw a5,0(a5)
sec_mmio_check_values():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:121
HARDENED_CHECK_EQ(read_value ^ kSecMmioMaskVal,
98d6: 4318 lw a4,0(a4)
98d8: 8fb5 xor a5,a5,a3
98da: 00e78663 beq a5,a4,98e6 <sec_mmio_check_values+0x42>
98de: 0000 unimp
98e0: 0000 unimp
98e2: 0000 unimp
98e4: 0000 unimp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:124
sec_mmio_ctx.values[offset]);
offset += kStep;
if (offset >= sec_mmio_ctx.last_index) {
98e6: 6405a703 lw a4,1600(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:123
offset += kStep;
98ea: 0505 addi a0,a0,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:124
if (offset >= sec_mmio_ctx.last_index) {
98ec: 00e56563 bltu a0,a4,98f6 <sec_mmio_check_values+0x52>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:125
offset -= sec_mmio_ctx.last_index;
98f0: 6405a703 lw a4,1600(a1)
98f4: 8d19 sub a0,a0,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:119
for (i = 0; launder32(i) < sec_mmio_ctx.last_index; ++i) {
98f6: 0605 addi a2,a2,1
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
98f8: 8732 mv a4,a2
sec_mmio_check_values():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:119
98fa: 6405a783 lw a5,1600(a1)
98fe: fcf766e3 bltu a4,a5,98ca <sec_mmio_check_values+0x26>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:129
}
}
// Check for loop completion.
HARDENED_CHECK_EQ(i, sec_mmio_ctx.last_index);
9902: 6405a503 lw a0,1600(a1)
9906: 00a60663 beq a2,a0,9912 <sec_mmio_check_values+0x6e>
990a: 0000 unimp
990c: 0000 unimp
990e: 0000 unimp
9910: 0000 unimp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:130
++sec_mmio_ctx.check_count;
9912: 64c5a503 lw a0,1612(a1)
9916: 0505 addi a0,a0,1
9918: 64a5a623 sw a0,1612(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:131
}
991c: 8082 ret
0000991e <sec_mmio_check_counters>:
sec_mmio_check_counters():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:133
void sec_mmio_check_counters(uint32_t expected_check_count) {
991e: 3ca595b7 lui a1,0x3ca59
9922: 65a58593 addi a1,a1,1626 # 3ca5965a <_stack_end+0x2ca3965a>
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
9926: 862e mv a2,a1
9928: 0fff6697 auipc a3,0xfff6
992c: 6d868693 addi a3,a3,1752 # 10000000 <sec_mmio_ctx>
sec_mmio_check_counters():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:134
uint32_t result = launder32(kSecMmioValZero) ^ sec_mmio_ctx.write_count;
9930: 6446a703 lw a4,1604(a3)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:135
result ^= sec_mmio_ctx.expected_write_count;
9934: 6486a783 lw a5,1608(a3)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:134
uint32_t result = launder32(kSecMmioValZero) ^ sec_mmio_ctx.write_count;
9938: 8e39 xor a2,a2,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:135
result ^= sec_mmio_ctx.expected_write_count;
993a: 8e3d xor a2,a2,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:139
// Check the expected write count. This is equivalent to
// sec_mmio_ctx.write_count == sec_mmio_ctx.expected_write_count
HARDENED_CHECK_EQ(result, kSecMmioValZero);
993c: 00b60663 beq a2,a1,9948 <sec_mmio_check_counters+0x2a>
9940: 0000 unimp
9942: 0000 unimp
9944: 0000 unimp
9946: 0000 unimp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:144
// Check the expected check counts. This is equivalent to
// sec_mmio_ctx.check_count == expected_check_count. This check is expected to
// fail if the previous check failed.
result ^= sec_mmio_ctx.check_count;
9948: 64c6a583 lw a1,1612(a3)
994c: 8d31 xor a0,a0,a2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:145
result ^= expected_check_count;
994e: 8d2d xor a0,a0,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:146
HARDENED_CHECK_EQ(~launder32(result), kSecMmioValOne);
9950: fff54513 not a0,a0
9954: c35a75b7 lui a1,0xc35a7
9958: 9a558593 addi a1,a1,-1627 # c35a69a5 <_stack_end+0xb35869a5>
995c: 00b50663 beq a0,a1,9968 <sec_mmio_check_counters+0x4a>
9960: 0000 unimp
9962: 0000 unimp
9964: 0000 unimp
9966: 0000 unimp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:148
++sec_mmio_ctx.check_count;
9968: 64c6a503 lw a0,1612(a3)
996c: 0505 addi a0,a0,1
996e: 64a6a623 sw a0,1612(a3)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/base/sec_mmio.c:149
}
9972: 8082 ret
00009974 <otp_read32>:
otp_read32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otp.c:18
#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
#include "otp_ctrl_regs.h" // Generated.
enum { kBase = TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR };
uint32_t otp_read32(uint32_t address) {
9974: 401315b7 lui a1,0x40131
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otp.c:19
return sec_mmio_read32(kBase + OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET + address);
9978: 952e add a0,a0,a1
997a: b3c1 j 973a <sec_mmio_read32>
0000997c <expected_state_check>:
expected_state_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:38
* This function reads and clears the status and error code registers.
*
* @return `kErrorOk` if the key manager is at the `expected_state` and the
* status is idle or success.
*/
static rom_error_t expected_state_check(uint32_t expected_state) {
997c: 1141 addi sp,sp,-16
997e: c606 sw ra,12(sp)
9980: c422 sw s0,8(sp)
9982: c226 sw s1,4(sp)
9984: c04a sw s2,0(sp)
9986: 892a mv s2,a0
9988: 41140537 lui a0,0x41140
998c: 4589 li a1,2
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
998e: 0ec52603 lw a2,236(a0) # 411400ec <_stack_end+0x311200ec>
bitfield_field32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:60
return (bitfield >> field.index) & field.mask;
9992: 00367493 andi s1,a2,3
expected_state_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:48
do {
op_status = abs_mmio_read32(kBase + KEYMGR_OP_STATUS_REG_OFFSET);
abs_mmio_write32(kBase + KEYMGR_OP_STATUS_REG_OFFSET, op_status);
op_status_field =
bitfield_field32_read(op_status, KEYMGR_OP_STATUS_STATUS_FIELD);
} while (op_status_field == KEYMGR_OP_STATUS_STATUS_VALUE_WIP ||
9996: fff48693 addi a3,s1,-1 # ffff <_chip_info_start+0x7f>
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
999a: 0ec52623 sw a2,236(a0)
expected_state_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:48
999e: feb6e8e3 bltu a3,a1,998e <expected_state_check+0x12>
99a2: 41140537 lui a0,0x41140
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
99a6: 0f052403 lw s0,240(a0) # 411400f0 <_stack_end+0x311200f0>
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
99aa: 0e852823 sw s0,240(a0)
99ae: 0e850513 addi a0,a0,232
expected_state_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:57
uint32_t error_code = abs_mmio_read32(kBase + KEYMGR_ERR_CODE_REG_OFFSET);
abs_mmio_write32(kBase + KEYMGR_ERR_CODE_REG_OFFSET, error_code);
// Read the working state with sec_mmio so that we can check the expected
// value periodically.
uint32_t got_state = sec_mmio_read32(kBase + KEYMGR_WORKING_STATE_REG_OFFSET);
99b2: 3361 jal 973a <sec_mmio_read32>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:58
if (op_status_field == KEYMGR_OP_STATUS_STATUS_VALUE_IDLE &&
99b4: 009465b3 or a1,s0,s1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:59
error_code == 0u && got_state == expected_state) {
99b8: 01254533 xor a0,a0,s2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:58
if (op_status_field == KEYMGR_OP_STATUS_STATUS_VALUE_IDLE &&
99bc: 8dc9 or a1,a1,a0
99be: 73900513 li a0,1849
99c2: c589 beqz a1,99cc <expected_state_check+0x50>
99c4: 014b5537 lui a0,0x14b5
99c8: d0d50513 addi a0,a0,-755 # 14b4d0d <_chip_info_end+0x14a4d0d>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:63
return kErrorOk;
}
return kErrorKeymgrInternal;
}
99cc: 4902 lw s2,0(sp)
99ce: 4492 lw s1,4(sp)
99d0: 4422 lw s0,8(sp)
99d2: 40b2 lw ra,12(sp)
99d4: 0141 addi sp,sp,16
99d6: 8082 ret
000099d8 <keymgr_sw_binding_set>:
keymgr_sw_binding_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:77
return kErrorOk;
}
void keymgr_sw_binding_set(
const keymgr_binding_value_t *binding_value_sealing,
const keymgr_binding_value_t *binding_value_attestation) {
99d8: 1101 addi sp,sp,-32
99da: ce06 sw ra,28(sp)
99dc: cc22 sw s0,24(sp)
99de: ca26 sw s1,20(sp)
99e0: c84a sw s2,16(sp)
99e2: c64e sw s3,12(sp)
99e4: c452 sw s4,8(sp)
99e6: 892e mv s2,a1
99e8: 89aa mv s3,a0
99ea: 4481 li s1,0
99ec: 41140537 lui a0,0x41140
99f0: 02c50413 addi s0,a0,44 # 4114002c <_stack_end+0x3112002c>
99f4: 02000a13 li s4,32
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:83
// Write and lock (rw0c) the software binding value. This register is unlocked
// by hardware upon a successful state transition.
for (size_t i = 0; i < ARRAYSIZE(binding_value_sealing->data); ++i) {
sec_mmio_write32(
kBase + KEYMGR_SEALING_SW_BINDING_0_REG_OFFSET + i * sizeof(uint32_t),
binding_value_sealing->data[i]);
99f8: 00998533 add a0,s3,s1
99fc: 410c lw a1,0(a0)
99fe: 00848533 add a0,s1,s0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:81
sec_mmio_write32(
9a02: 33f5 jal 97ee <sec_mmio_write32>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:80
for (size_t i = 0; i < ARRAYSIZE(binding_value_sealing->data); ++i) {
9a04: 0491 addi s1,s1,4
9a06: ff4499e3 bne s1,s4,99f8 <keymgr_sw_binding_set+0x20>
9a0a: 4481 li s1,0
9a0c: 02000993 li s3,32
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:88
}
for (size_t i = 0; i < ARRAYSIZE(binding_value_attestation->data); ++i) {
sec_mmio_write32(
kBase + KEYMGR_ATTEST_SW_BINDING_0_REG_OFFSET + i * sizeof(uint32_t),
binding_value_attestation->data[i]);
9a10: 00990533 add a0,s2,s1
9a14: 410c lw a1,0(a0)
9a16: 00940533 add a0,s0,s1
9a1a: 02050513 addi a0,a0,32
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:86
sec_mmio_write32(
9a1e: 3bc1 jal 97ee <sec_mmio_write32>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:85
for (size_t i = 0; i < ARRAYSIZE(binding_value_attestation->data); ++i) {
9a20: 0491 addi s1,s1,4
9a22: ff3497e3 bne s1,s3,9a10 <keymgr_sw_binding_set+0x38>
9a26: 41140537 lui a0,0x41140
9a2a: 02850513 addi a0,a0,40 # 41140028 <_stack_end+0x31120028>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:90
}
sec_mmio_write32(kBase + KEYMGR_SW_BINDING_REGWEN_REG_OFFSET, 0);
9a2e: 4581 li a1,0
9a30: 3b7d jal 97ee <sec_mmio_write32>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:91
sec_mmio_write_increment(/*value=*/17);
9a32: 4545 li a0,17
9a34: 4a22 lw s4,8(sp)
9a36: 49b2 lw s3,12(sp)
9a38: 4942 lw s2,16(sp)
9a3a: 44d2 lw s1,20(sp)
9a3c: 4462 lw s0,24(sp)
9a3e: 40f2 lw ra,28(sp)
9a40: 6105 addi sp,sp,32
9a42: b5b9 j 9890 <sec_mmio_write_increment>
00009a44 <keymgr_creator_max_ver_set>:
keymgr_creator_max_ver_set():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:100
while (!abs_mmio_read32(kBase + KEYMGR_SW_BINDING_REGWEN_REG_OFFSET)) {
}
sec_mmio_read32(kBase + KEYMGR_SW_BINDING_REGWEN_REG_OFFSET);
}
void keymgr_creator_max_ver_set(uint32_t max_key_ver) {
9a44: 1141 addi sp,sp,-16
9a46: c606 sw ra,12(sp)
9a48: c422 sw s0,8(sp)
9a4a: 85aa mv a1,a0
9a4c: 41140437 lui s0,0x41140
9a50: 09440513 addi a0,s0,148 # 41140094 <_stack_end+0x31120094>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:102
// Write and lock (rw0c) the max key version.
sec_mmio_write32_shadowed(
9a54: 33ed jal 983e <sec_mmio_write32_shadowed>
9a56: 09040513 addi a0,s0,144
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:104
kBase + KEYMGR_MAX_CREATOR_KEY_VER_SHADOWED_REG_OFFSET, max_key_ver);
sec_mmio_write32(kBase + KEYMGR_MAX_CREATOR_KEY_VER_REGWEN_REG_OFFSET, 0);
9a5a: 4581 li a1,0
9a5c: 3b49 jal 97ee <sec_mmio_write32>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:105
sec_mmio_write_increment(/*value=*/2);
9a5e: 4509 li a0,2
9a60: 4422 lw s0,8(sp)
9a62: 40b2 lw ra,12(sp)
9a64: 0141 addi sp,sp,16
9a66: b52d j 9890 <sec_mmio_write_increment>
00009a68 <keymgr_state_check>:
keymgr_state_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/keymgr.c:128
abs_mmio_write32(kBase + KEYMGR_START_REG_OFFSET, 1);
}
rom_error_t keymgr_state_check(keymgr_state_t expected_state) {
return expected_state_check(expected_state);
9a68: bf11 j 997c <expected_state_check>
00009a6a <lifecycle_state_get>:
lifecycle_state_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:22
enum {
kBase = TOP_EARLGREY_LC_CTRL_BASE_ADDR,
};
lifecycle_state_t lifecycle_state_get(void) {
9a6a: 1141 addi sp,sp,-16
9a6c: c606 sw ra,12(sp)
9a6e: 40140537 lui a0,0x40140
9a72: 03450513 addi a0,a0,52 # 40140034 <_stack_end+0x30120034>
lifecycle_raw_state_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:69
}
}
uint32_t lifecycle_raw_state_get(void) {
uint32_t value = bitfield_field32_read(
sec_mmio_read32(kBase + LC_CTRL_LC_STATE_REG_OFFSET),
9a76: 31d1 jal 973a <sec_mmio_read32>
9a78: 400005b7 lui a1,0x40000
9a7c: 15fd addi a1,a1,-1
bitfield_field32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:60
9a7e: 8d6d and a0,a0,a1
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
9a80: 85aa mv a1,a0
9a82: 1ad6b637 lui a2,0x1ad6b
9a86: 5ac60613 addi a2,a2,1452 # 1ad6b5ac <_stack_end+0xad4b5ac>
lifecycle_state_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:25
switch (launder32(raw_state)) {
9a8a: 02b64b63 blt a2,a1,9ac0 <lifecycle_state_get+0x56>
9a8e: 0e73a637 lui a2,0xe73a
9a92: ce660693 addi a3,a2,-794 # e739ce6 <_epmp_stack_guard_na4+0xa7324e6>
9a96: 04b6ce63 blt a3,a1,9af2 <lifecycle_state_get+0x88>
9a9a: 02108637 lui a2,0x2108
9a9e: 42160613 addi a2,a2,1057 # 2108421 <_chip_info_end+0x20f8421>
9aa2: 08c58e63 beq a1,a2,9b3e <lifecycle_state_get+0xd4>
9aa6: 06319637 lui a2,0x6319
9aaa: c6360613 addi a2,a2,-925 # 6318c63 <_epmp_stack_guard_na4+0x2311463>
9aae: 0ec59063 bne a1,a2,9b8e <lifecycle_state_get+0x124>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:30
HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED1);
9ab2: 00c50663 beq a0,a2,9abe <lifecycle_state_get+0x54>
9ab6: 0000 unimp
9ab8: 0000 unimp
9aba: 0000 unimp
9abc: 0000 unimp
9abe: a215 j 9be2 <lifecycle_state_get+0x178>
9ac0: 2318c637 lui a2,0x2318c
9ac4: 63060693 addi a3,a2,1584 # 2318c630 <_stack_end+0x1316c630>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:25
switch (launder32(raw_state)) {
9ac8: 04b6c663 blt a3,a1,9b14 <lifecycle_state_get+0xaa>
9acc: 1ad6b637 lui a2,0x1ad6b
9ad0: 5ad60613 addi a2,a2,1453 # 1ad6b5ad <_stack_end+0xad4b5ad>
9ad4: 06c58c63 beq a1,a2,9b4c <lifecycle_state_get+0xe2>
9ad8: 1ef7c637 lui a2,0x1ef7c
9adc: def60613 addi a2,a2,-529 # 1ef7bdef <_stack_end+0xef5bdef>
9ae0: 0cc59463 bne a1,a2,9ba8 <lifecycle_state_get+0x13e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:48
HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED7);
9ae4: 00c50663 beq a0,a2,9af0 <lifecycle_state_get+0x86>
9ae8: 0000 unimp
9aea: 0000 unimp
9aec: 0000 unimp
9aee: 0000 unimp
9af0: a8cd j 9be2 <lifecycle_state_get+0x178>
9af2: ce760613 addi a2,a2,-793
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:25
switch (launder32(raw_state)) {
9af6: 06c58263 beq a1,a2,9b5a <lifecycle_state_get+0xf0>
9afa: 1294a637 lui a2,0x1294a
9afe: 52960613 addi a2,a2,1321 # 1294a529 <_stack_end+0x292a529>
9b02: 0cc59463 bne a1,a2,9bca <lifecycle_state_get+0x160>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:39
HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED4);
9b06: 00c50663 beq a0,a2,9b12 <lifecycle_state_get+0xa8>
9b0a: 0000 unimp
9b0c: 0000 unimp
9b0e: 0000 unimp
9b10: 0000 unimp
9b12: a8c1 j 9be2 <lifecycle_state_get+0x178>
9b14: 63160613 addi a2,a2,1585
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:25
switch (launder32(raw_state)) {
9b18: 04c58c63 beq a1,a2,9b70 <lifecycle_state_get+0x106>
9b1c: 25295637 lui a2,0x25295
9b20: a5260613 addi a2,a2,-1454 # 25294a52 <_stack_end+0x15274a52>
9b24: 0cc59663 bne a1,a2,9bf0 <lifecycle_state_get+0x186>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:57
HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_PROD_END);
9b28: 00c50663 beq a0,a2,9b34 <lifecycle_state_get+0xca>
9b2c: 0000 unimp
9b2e: 0000 unimp
9b30: 0000 unimp
9b32: 0000 unimp
9b34: 91b9b537 lui a0,0x91b9b
9b38: 68a50513 addi a0,a0,1674 # 91b9b68a <_stack_end+0x81b7b68a>
9b3c: a07d j 9bea <lifecycle_state_get+0x180>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:27
HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED0);
9b3e: 00c50663 beq a0,a2,9b4a <lifecycle_state_get+0xe0>
9b42: 0000 unimp
9b44: 0000 unimp
9b46: 0000 unimp
9b48: 0000 unimp
9b4a: a861 j 9be2 <lifecycle_state_get+0x178>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:45
HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED6);
9b4c: 00c50663 beq a0,a2,9b58 <lifecycle_state_get+0xee>
9b50: 0000 unimp
9b52: 0000 unimp
9b54: 0000 unimp
9b56: 0000 unimp
9b58: a069 j 9be2 <lifecycle_state_get+0x178>
9b5a: 0e73a5b7 lui a1,0xe73a
9b5e: ce758593 addi a1,a1,-793 # e739ce7 <_epmp_stack_guard_na4+0xa7324e7>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:36
HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED3);
9b62: 00b50663 beq a0,a1,9b6e <lifecycle_state_get+0x104>
9b66: 0000 unimp
9b68: 0000 unimp
9b6a: 0000 unimp
9b6c: 0000 unimp
9b6e: a895 j 9be2 <lifecycle_state_get+0x178>
9b70: 2318c5b7 lui a1,0x2318c
9b74: 63158593 addi a1,a1,1585 # 2318c631 <_stack_end+0x1316c631>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:54
HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_PROD);
9b78: 00b50663 beq a0,a1,9b84 <lifecycle_state_get+0x11a>
9b7c: 0000 unimp
9b7e: 0000 unimp
9b80: 0000 unimp
9b82: 0000 unimp
9b84: 65f25537 lui a0,0x65f25
9b88: 20f50513 addi a0,a0,527 # 65f2520f <_stack_end+0x55f0520f>
9b8c: a8b9 j 9bea <lifecycle_state_get+0x180>
9b8e: 0a529637 lui a2,0xa529
9b92: 4a560613 addi a2,a2,1189 # a5294a5 <_epmp_stack_guard_na4+0x6521ca5>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:25
switch (launder32(raw_state)) {
9b96: 06c59e63 bne a1,a2,9c12 <lifecycle_state_get+0x1a8>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:33
HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED2);
9b9a: 00c50663 beq a0,a2,9ba6 <lifecycle_state_get+0x13c>
9b9e: 0000 unimp
9ba0: 0000 unimp
9ba2: 0000 unimp
9ba4: 0000 unimp
9ba6: a835 j 9be2 <lifecycle_state_get+0x178>
9ba8: 21084637 lui a2,0x21084
9bac: 21060613 addi a2,a2,528 # 21084210 <_stack_end+0x11064210>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:25
switch (launder32(raw_state)) {
9bb0: 06c59163 bne a1,a2,9c12 <lifecycle_state_get+0x1a8>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:51
HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_DEV);
9bb4: 00c50663 beq a0,a2,9bc0 <lifecycle_state_get+0x156>
9bb8: 0000 unimp
9bba: 0000 unimp
9bbc: 0000 unimp
9bbe: 0000 unimp
9bc0: 0b5a7537 lui a0,0xb5a7
9bc4: 5e050513 addi a0,a0,1504 # b5a75e0 <_epmp_stack_guard_na4+0x759fde0>
9bc8: a00d j 9bea <lifecycle_state_get+0x180>
9bca: 16b5b637 lui a2,0x16b5b
9bce: d6b60613 addi a2,a2,-661 # 16b5ad6b <_stack_end+0x6b3ad6b>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:25
switch (launder32(raw_state)) {
9bd2: 04c59063 bne a1,a2,9c12 <lifecycle_state_get+0x1a8>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:42
HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED5);
9bd6: 00c50663 beq a0,a2,9be2 <lifecycle_state_get+0x178>
9bda: 0000 unimp
9bdc: 0000 unimp
9bde: 0000 unimp
9be0: 0000 unimp
9be2: b2866537 lui a0,0xb2866
9be6: fbb50513 addi a0,a0,-69 # b2865fbb <_stack_end+0xa2845fbb>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:65
}
9bea: 40b2 lw ra,12(sp)
9bec: 0141 addi sp,sp,16
9bee: 8082 ret
9bf0: 2739d637 lui a2,0x2739d
9bf4: e7360613 addi a2,a2,-397 # 2739ce73 <_stack_end+0x1737ce73>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:25
switch (launder32(raw_state)) {
9bf8: 00c59d63 bne a1,a2,9c12 <lifecycle_state_get+0x1a8>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:60
HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_RMA);
9bfc: 00c50663 beq a0,a2,9c08 <lifecycle_state_get+0x19e>
9c00: 0000 unimp
9c02: 0000 unimp
9c04: 0000 unimp
9c06: 0000 unimp
9c08: cf8d0537 lui a0,0xcf8d0
9c0c: aab50513 addi a0,a0,-1365 # cf8cfaab <_stack_end+0xbf8afaab>
9c10: bfe9 j 9bea <lifecycle_state_get+0x180>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:63
HARDENED_UNREACHABLE();
9c12: 0000 unimp
9c14: 0000 unimp
9c16: 0000 unimp
9c18: 0000 unimp
00009c1a <lifecycle_raw_state_get>:
lifecycle_raw_state_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:67
uint32_t lifecycle_raw_state_get(void) {
9c1a: 1141 addi sp,sp,-16
9c1c: c606 sw ra,12(sp)
9c1e: 40140537 lui a0,0x40140
9c22: 03450513 addi a0,a0,52 # 40140034 <_stack_end+0x30120034>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:69
sec_mmio_read32(kBase + LC_CTRL_LC_STATE_REG_OFFSET),
9c26: 3e11 jal 973a <sec_mmio_read32>
9c28: 400005b7 lui a1,0x40000
9c2c: 15fd addi a1,a1,-1
bitfield_field32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:60
9c2e: 8d6d and a0,a0,a1
lifecycle_raw_state_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:71
LC_CTRL_LC_STATE_STATE_FIELD);
return value;
9c30: 40b2 lw ra,12(sp)
9c32: 0141 addi sp,sp,16
9c34: 8082 ret
00009c36 <lifecycle_device_id_get>:
lifecycle_device_id_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:74
}
void lifecycle_device_id_get(lifecycle_device_id_t *device_id) {
9c36: 1101 addi sp,sp,-32
9c38: ce06 sw ra,28(sp)
9c3a: cc22 sw s0,24(sp)
9c3c: ca26 sw s1,20(sp)
9c3e: c84a sw s2,16(sp)
9c40: c64e sw s3,12(sp)
9c42: 892a mv s2,a0
9c44: 4481 li s1,0
9c46: 40140537 lui a0,0x40140
9c4a: 04050413 addi s0,a0,64 # 40140040 <_stack_end+0x30120040>
9c4e: 02000993 li s3,32
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:80
static_assert(
kLifecycleDeviceIdNumWords == LC_CTRL_PARAM_NUM_DEVICE_ID_WORDS,
"length of the device_id array does not match the length in hardware");
for (size_t i = 0; i < kLifecycleDeviceIdNumWords; ++i) {
device_id->device_id[i] = sec_mmio_read32(
9c52: 00848533 add a0,s1,s0
9c56: 34d5 jal 973a <sec_mmio_read32>
9c58: 009905b3 add a1,s2,s1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:79
for (size_t i = 0; i < kLifecycleDeviceIdNumWords; ++i) {
9c5c: 0491 addi s1,s1,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:80
device_id->device_id[i] = sec_mmio_read32(
9c5e: c188 sw a0,0(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:79
for (size_t i = 0; i < kLifecycleDeviceIdNumWords; ++i) {
9c60: ff3499e3 bne s1,s3,9c52 <lifecycle_device_id_get+0x1c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/lifecycle.c:83
kBase + LC_CTRL_DEVICE_ID_0_REG_OFFSET + i * sizeof(uint32_t));
}
}
9c64: 49b2 lw s3,12(sp)
9c66: 4942 lw s2,16(sp)
9c68: 44d2 lw s1,20(sp)
9c6a: 4462 lw s0,24(sp)
9c6c: 40f2 lw ra,28(sp)
9c6e: 6105 addi sp,sp,32
9c70: 8082 ret
00009c72 <pinmux_init>:
pinmux_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/pinmux.c:60
*/
{.pad = kTopEarlgreyPinmuxMioOutIoc4,
.periph = kTopEarlgreyPinmuxOutselUart0Tx},
};
void pinmux_init(void) {
9c72: 4601 li a2,0
9c74: 00002517 auipc a0,0x2
9c78: 14850513 addi a0,a0,328 # bdbc <kPinmuxInputs>
9c7c: 404605b7 lui a1,0x40460
9c80: 0e858593 addi a1,a1,232 # 404600e8 <_stack_end+0x304400e8>
9c84: 86b2 mv a3,a2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/pinmux.c:65
// Set the input pad for each specified peripheral input.
const uint32_t kInputBase =
TOP_EARLGREY_PINMUX_AON_BASE_ADDR + PINMUX_MIO_PERIPH_INSEL_0_REG_OFFSET;
for (uint32_t i = 0; i < ARRAYSIZE(kPinmuxInputs); ++i) {
uint32_t reg = kPinmuxInputs[i].periph * sizeof(uint32_t);
9c86: 060e slli a2,a2,0x3
9c88: 962a add a2,a2,a0
9c8a: 4218 lw a4,0(a2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/pinmux.c:66
uint32_t val = kPinmuxInputs[i].pad;
9c8c: 4250 lw a2,4(a2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/pinmux.c:65
uint32_t reg = kPinmuxInputs[i].periph * sizeof(uint32_t);
9c8e: 070a slli a4,a4,0x2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/pinmux.c:67
abs_mmio_write32(kInputBase + reg, val);
9c90: 972e add a4,a4,a1
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
9c92: c310 sw a2,0(a4)
9c94: 4605 li a2,1
pinmux_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/pinmux.c:64
for (uint32_t i = 0; i < ARRAYSIZE(kPinmuxInputs); ++i) {
9c96: d6fd beqz a3,9c84 <pinmux_init+0x12>
9c98: 40460537 lui a0,0x40460
9c9c: 02d00593 li a1,45
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
9ca0: 2eb52823 sw a1,752(a0) # 404602f0 <_stack_end+0x304402f0>
pinmux_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/pinmux.c:78
for (uint32_t i = 0; i < ARRAYSIZE(kPinmuxOutputs); ++i) {
uint32_t reg = kPinmuxOutputs[i].pad * sizeof(uint32_t);
uint32_t val = kPinmuxOutputs[i].periph;
abs_mmio_write32(kOutputBase + reg, val);
}
}
9ca4: 8082 ret
00009ca6 <retention_sram_clear>:
retention_sram_clear():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/retention_sram.c:27
static_assert(sizeof(retention_sram_t) == TOP_EARLGREY_RAM_RET_AON_SIZE_BYTES,
"Unexpected retention SRAM size.");
return (volatile retention_sram_t *)TOP_EARLGREY_RAM_RET_AON_BASE_ADDR;
}
void retention_sram_clear(void) {
9ca6: 81010113 addi sp,sp,-2032
9caa: 7e112623 sw ra,2028(sp)
9cae: 7e812423 sw s0,2024(sp)
9cb2: 7e912223 sw s1,2020(sp)
9cb6: 6505 lui a0,0x1
9cb8: 83050513 addi a0,a0,-2000 # 830 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x210>
9cbc: 40a10133 sub sp,sp,a0
9cc0: 6505 lui a0,0x1
9cc2: ffc50413 addi s0,a0,-4 # ffc <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x9dc>
9cc6: 0804 addi s1,sp,16
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/retention_sram.c:28
*retention_sram_get() = (retention_sram_t){0};
9cc8: 8526 mv a0,s1
9cca: 4581 li a1,0
9ccc: 8622 mv a2,s0
9cce: dabfe0ef jal ra,8a78 <memset>
9cd2: 6505 lui a0,0x1
9cd4: 0541 addi a0,a0,16
9cd6: 950a add a0,a0,sp
9cd8: 00052023 sw zero,0(a0) # 1000 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x9e0>
9cdc: 6505 lui a0,0x1
9cde: 0541 addi a0,a0,16
9ce0: 950a add a0,a0,sp
9ce2: 4108 lw a0,0(a0)
9ce4: 406005b7 lui a1,0x40600
9ce8: c188 sw a0,0(a1)
9cea: 00458513 addi a0,a1,4 # 40600004 <_stack_end+0x305e0004>
9cee: 85a6 mv a1,s1
9cf0: 8622 mv a2,s0
9cf2: d71fe0ef jal ra,8a62 <memcpy>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/retention_sram.c:29
}
9cf6: 6505 lui a0,0x1
9cf8: 83050513 addi a0,a0,-2000 # 830 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x210>
9cfc: 912a add sp,sp,a0
9cfe: 7e412483 lw s1,2020(sp)
9d02: 7e812403 lw s0,2024(sp)
9d06: 7ec12083 lw ra,2028(sp)
9d0a: 7f010113 addi sp,sp,2032
9d0e: 8082 ret
00009d10 <rnd_uint32>:
rnd_uint32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/rnd.c:20
enum {
kBase = TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR,
};
uint32_t rnd_uint32(void) {
9d10: 1141 addi sp,sp,-16
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/rnd.c:21
if (otp_read32(OTP_CTRL_PARAM_CREATOR_SW_CFG_RNG_EN_OFFSET) ==
9d12: c606 sw ra,12(sp)
9d14: 0dc00513 li a0,220
9d18: 39b1 jal 9974 <otp_read32>
9d1a: 73900593 li a1,1849
9d1e: 00b51663 bne a0,a1,9d2a <rnd_uint32+0x1a>
9d22: 411f0537 lui a0,0x411f0
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
9d26: 4d6c lw a1,92(a0)
rnd_uint32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/rnd.c:24
kHardenedBoolTrue) {
// When bit-0 is clear an EDN request for new data for RND_DATA is pending.
while (!abs_mmio_read32(kBase + RV_CORE_IBEX_RND_STATUS_REG_OFFSET)) {
9d28: ddfd beqz a1,9d26 <rnd_uint32+0x16>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/rnd.c:28
}
}
uint32_t mcycle;
CSR_READ(CSR_REG_MCYCLE, &mcycle);
9d2a: b0002573 csrr a0,mcycle
9d2e: 411f05b7 lui a1,0x411f0
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
9d32: 4dac lw a1,88(a1)
rnd_uint32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/rnd.c:29
return mcycle + abs_mmio_read32(kBase + RV_CORE_IBEX_RND_DATA_REG_OFFSET);
9d34: 952e add a0,a0,a1
9d36: 40b2 lw ra,12(sp)
9d38: 0141 addi sp,sp,16
9d3a: 8082 ret
00009d3c <rstmgr_reason_get>:
rstmgr_reason_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/rstmgr.c:41
rstmgr_alert_info.info[i] =
abs_mmio_read32(kBase + RSTMGR_ALERT_INFO_REG_OFFSET);
}
}
uint32_t rstmgr_reason_get(void) {
9d3c: 40410537 lui a0,0x40410
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
9d40: 494c lw a1,20(a0)
bitfield_field32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:60
9d42: 00f5f613 andi a2,a1,15
rstmgr_alert_info_collect():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/rstmgr.c:29
rstmgr_alert_info.length = bitfield_field32_read(
9d46: 0fff7597 auipc a1,0xfff7
9d4a: 9be58593 addi a1,a1,-1602 # 10000704 <rstmgr_alert_info>
9d4e: c190 sw a2,0(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/rstmgr.c:32
for (uint32_t i = 0; i < rstmgr_alert_info.length; ++i) {
9d50: c205 beqz a2,9d70 <rstmgr_reason_get+0x34>
9d52: 4601 li a2,0
9d54: 4681 li a3,0
9d56: 00458713 addi a4,a1,4
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
bitfield |= (value & field.mask) << field.index;
9d5a: 0f067793 andi a5,a2,240
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
9d5e: c91c sw a5,16(a0)
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
9d60: 4d1c lw a5,24(a0)
rstmgr_alert_info_collect():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/rstmgr.c:36
rstmgr_alert_info.info[i] =
9d62: c31c sw a5,0(a4)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/rstmgr.c:32
for (uint32_t i = 0; i < rstmgr_alert_info.length; ++i) {
9d64: 419c lw a5,0(a1)
9d66: 0685 addi a3,a3,1
9d68: 0711 addi a4,a4,4
9d6a: 0641 addi a2,a2,16
9d6c: fef6e7e3 bltu a3,a5,9d5a <rstmgr_reason_get+0x1e>
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
9d70: 4508 lw a0,8(a0)
rstmgr_reason_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/rstmgr.c:74
"kRstmgrReasonLast value incorrect.");
#undef REASON_ASSERT
rstmgr_alert_info_collect();
return abs_mmio_read32(kBase + RSTMGR_RESET_INFO_REG_OFFSET);
9d72: 8082 ret
00009d74 <uart_init>:
uart_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/uart.c:38
abs_mmio_write32(TOP_EARLGREY_UART0_BASE_ADDR + UART_INTR_STATE_REG_OFFSET,
UINT32_MAX);
}
rom_error_t uart_init(uint32_t precalculated_nco) {
if (precalculated_nco == 0 || precalculated_nco & ~UART_CTRL_NCO_MASK) {
9d74: fff50593 addi a1,a0,-1 # 4040ffff <_stack_end+0x303effff>
9d78: 6641 lui a2,0x10
9d7a: 1679 addi a2,a2,-2
9d7c: 00b67763 bgeu a2,a1,9d8a <uart_init+0x16>
9d80: 01554537 lui a0,0x1554
9d84: 10350513 addi a0,a0,259 # 1554103 <_chip_info_end+0x1544103>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/uart.c:56
// Disable interrupts.
abs_mmio_write32(TOP_EARLGREY_UART0_BASE_ADDR + UART_INTR_ENABLE_REG_OFFSET,
0u);
return kErrorOk;
}
9d88: 8082 ret
9d8a: 400005b7 lui a1,0x40000
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
9d8e: 0005a823 sw zero,16(a1) # 40000010 <_stack_end+0x2ffe0010>
9d92: 460d li a2,3
9d94: d190 sw a2,32(a1)
9d96: 0205a423 sw zero,40(a1)
9d9a: 0205a823 sw zero,48(a1)
9d9e: 0005a223 sw zero,4(a1)
9da2: 567d li a2,-1
9da4: c190 sw a2,0(a1)
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
9da6: 0542 slli a0,a0,0x10
9da8: 00156513 ori a0,a0,1
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
9dac: c988 sw a0,16(a1)
9dae: 0005a223 sw zero,4(a1)
9db2: 73900513 li a0,1849
uart_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/uart.c:56
9db6: 8082 ret
00009db8 <uart_putchar>:
uart_putchar():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/uart.c:70
uint32_t reg =
abs_mmio_read32(TOP_EARLGREY_UART0_BASE_ADDR + UART_STATUS_REG_OFFSET);
return bitfield_bit32_read(reg, UART_STATUS_TXIDLE_BIT);
}
void uart_putchar(uint8_t byte) {
9db8: 400005b7 lui a1,0x40000
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
9dbc: 49d0 lw a2,20(a1)
bitfield_bit32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:125
bitfield_bit32_to_field32(bit_index)) == 0x1u;
9dbe: 8a05 andi a2,a2,1
uart_putchar():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/uart.c:72
// If the transmit FIFO is full, wait.
while (uart_tx_full()) {
9dc0: fe75 bnez a2,9dbc <uart_putchar+0x4>
9dc2: 400005b7 lui a1,0x40000
9dc6: 01c58613 addi a2,a1,28 # 4000001c <_stack_end+0x2ffe001c>
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
9dca: c208 sw a0,0(a2)
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
9dcc: 49c8 lw a0,20(a1)
bitfield_bit32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:125
9dce: 8921 andi a0,a0,8
uart_putchar():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/uart.c:78
}
uint32_t reg = bitfield_field32_write(0, UART_WDATA_WDATA_FIELD, byte);
abs_mmio_write32(TOP_EARLGREY_UART0_BASE_ADDR + UART_WDATA_REG_OFFSET, reg);
// If the transmitter is active, wait.
while (!uart_tx_idle()) {
9dd0: dd75 beqz a0,9dcc <uart_putchar+0x14>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/uart.c:80
}
}
9dd2: 8082 ret
00009dd4 <log_printf>:
log_printf():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:13
#include <stdarg.h>
#include <stdint.h>
#include "sw/device/silicon_creator/lib/drivers/uart.h"
rom_error_t log_printf(const char *format, ...) {
9dd4: 715d addi sp,sp,-80
9dd6: d606 sw ra,44(sp)
9dd8: d422 sw s0,40(sp)
9dda: d226 sw s1,36(sp)
9ddc: d04a sw s2,32(sp)
9dde: ce4e sw s3,28(sp)
9de0: cc52 sw s4,24(sp)
9de2: ca56 sw s5,20(sp)
9de4: c85a sw s6,16(sp)
9de6: c65e sw s7,12(sp)
9de8: c6c6 sw a7,76(sp)
9dea: c4c2 sw a6,72(sp)
9dec: c2be sw a5,68(sp)
9dee: c0ba sw a4,64(sp)
9df0: de36 sw a3,60(sp)
9df2: dc32 sw a2,56(sp)
9df4: da2e sw a1,52(sp)
9df6: 184c addi a1,sp,52
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:15
va_list args;
va_start(args, format);
9df8: c42e sw a1,8(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:17
while (*format != '\0') {
9dfa: 00054583 lbu a1,0(a0)
9dfe: c1d9 beqz a1,9e84 <log_printf+0xb0>
9e00: 02500993 li s3,37
9e04: 07800913 li s2,120
9e08: 00002b97 auipc s7,0x2
9e0c: fc4b8b93 addi s7,s7,-60 # bdcc <kPinmuxInputs+0x10>
9e10: 5b71 li s6,-4
9e12: 07300a13 li s4,115
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:18
if (*format == '%') {
9e16: 0ff5f593 andi a1,a1,255
9e1a: 03359c63 bne a1,s3,9e52 <log_printf+0x7e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:20
++format;
switch (*format++) {
9e1e: 00154583 lbu a1,1(a0)
9e22: 00250a93 addi s5,a0,2
9e26: 03258b63 beq a1,s2,9e5c <log_printf+0x88>
9e2a: 07459063 bne a1,s4,9e8a <log_printf+0xb6>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:23
case 's': {
// Print a null-terminated string.
const char *str = va_arg(args, const char *);
9e2e: 4522 lw a0,8(sp)
9e30: 00450593 addi a1,a0,4
9e34: c42e sw a1,8(sp)
9e36: 410c lw a1,0(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:24
while (*str != '\0') {
9e38: 0005c503 lbu a0,0(a1)
9e3c: c121 beqz a0,9e7c <log_printf+0xa8>
9e3e: 00158413 addi s0,a1,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:25
uart_putchar(*str++);
9e42: 0ff57513 andi a0,a0,255
9e46: 3f8d jal 9db8 <uart_putchar>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:24
while (*str != '\0') {
9e48: 00044503 lbu a0,0(s0)
9e4c: 0405 addi s0,s0,1
9e4e: f975 bnez a0,9e42 <log_printf+0x6e>
9e50: a035 j 9e7c <log_printf+0xa8>
9e52: 00150a93 addi s5,a0,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:44
}
default:
return kErrorLogBadFormatSpecifier;
}
}
uart_putchar(*format++);
9e56: 852e mv a0,a1
9e58: 3785 jal 9db8 <uart_putchar>
9e5a: a00d j 9e7c <log_printf+0xa8>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:32
unsigned int v = va_arg(args, unsigned int);
9e5c: 4522 lw a0,8(sp)
9e5e: 00450593 addi a1,a0,4
9e62: c42e sw a1,8(sp)
9e64: 4100 lw s0,0(a0)
9e66: 44f1 li s1,28
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:36
uart_putchar(kHexTable[(v >> i) & 0xf]);
9e68: 00945533 srl a0,s0,s1
9e6c: 893d andi a0,a0,15
9e6e: 955e add a0,a0,s7
9e70: 00054503 lbu a0,0(a0)
9e74: 3791 jal 9db8 <uart_putchar>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:35
for (int32_t i = 28; i >= 0; i -= 4) {
9e76: 14f1 addi s1,s1,-4
9e78: ff6498e3 bne s1,s6,9e68 <log_printf+0x94>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:17
while (*format != '\0') {
9e7c: 000ac583 lbu a1,0(s5)
9e80: 8556 mv a0,s5
9e82: f9d1 bnez a1,9e16 <log_printf+0x42>
9e84: 73900513 li a0,1849
9e88: a029 j 9e92 <log_printf+0xbe>
9e8a: 014c4537 lui a0,0x14c4
9e8e: 70d50513 addi a0,a0,1805 # 14c470d <_chip_info_end+0x14b470d>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/log.c:49
}
va_end(args);
return kErrorOk;
}
9e92: 4bb2 lw s7,12(sp)
9e94: 4b42 lw s6,16(sp)
9e96: 4ad2 lw s5,20(sp)
9e98: 4a62 lw s4,24(sp)
9e9a: 49f2 lw s3,28(sp)
9e9c: 5902 lw s2,32(sp)
9e9e: 5492 lw s1,36(sp)
9ea0: 5422 lw s0,40(sp)
9ea2: 50b2 lw ra,44(sp)
9ea4: 6161 addi sp,sp,80
9ea6: 8082 ret
00009ea8 <shutdown_init>:
shutdown_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:71
default:
return 0;
}
}
rom_error_t shutdown_init(lifecycle_state_t lc_state) {
9ea8: 7119 addi sp,sp,-128
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
9eaa: de86 sw ra,124(sp)
9eac: dca2 sw s0,120(sp)
9eae: daa6 sw s1,116(sp)
9eb0: d8ca sw s2,112(sp)
9eb2: d6ce sw s3,108(sp)
9eb4: d4d2 sw s4,104(sp)
9eb6: d2d6 sw s5,100(sp)
9eb8: d0da sw s6,96(sp)
9eba: cede sw s7,92(sp)
9ebc: cce2 sw s8,88(sp)
9ebe: cae6 sw s9,84(sp)
9ec0: c8ea sw s10,80(sp)
9ec2: c6ee sw s11,76(sp)
9ec4: 85aa mv a1,a0
9ec6: cf8d0637 lui a2,0xcf8d0
9eca: aaa60693 addi a3,a2,-1366 # cf8cfaaa <_stack_end+0xbf8afaaa>
shutdown_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:74
// Are we in a lifecycle state which needs alert configuration?
uint32_t lc_shift;
switch (launder32(lc_state)) {
9ece: 02b6d463 bge a3,a1,9ef6 <shutdown_init+0x4e>
9ed2: aab60613 addi a2,a2,-1365
9ed6: 02c58e63 beq a1,a2,9f12 <shutdown_init+0x6a>
9eda: 0b5a7637 lui a2,0xb5a7
9ede: 5e060613 addi a2,a2,1504 # b5a75e0 <_epmp_stack_guard_na4+0x759fde0>
9ee2: 04c59463 bne a1,a2,9f2a <shutdown_init+0x82>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:89
case kLcStateProdEnd:
HARDENED_CHECK_EQ(lc_state, kLcStateProdEnd);
lc_shift = 8;
break;
case kLcStateDev:
HARDENED_CHECK_EQ(lc_state, kLcStateDev);
9ee6: 00c50663 beq a0,a2,9ef2 <shutdown_init+0x4a>
9eea: 0000 unimp
9eec: 0000 unimp
9eee: 0000 unimp
9ef0: 0000 unimp
9ef2: 4a41 li s4,16
9ef4: a881 j 9f44 <shutdown_init+0x9c>
9ef6: 91b9b637 lui a2,0x91b9b
9efa: 68a60613 addi a2,a2,1674 # 91b9b68a <_stack_end+0x81b7b68a>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:74
switch (launder32(lc_state)) {
9efe: 1cc59863 bne a1,a2,a0ce <shutdown_init+0x226>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:85
HARDENED_CHECK_EQ(lc_state, kLcStateProdEnd);
9f02: 00c50663 beq a0,a2,9f0e <shutdown_init+0x66>
9f06: 0000 unimp
9f08: 0000 unimp
9f0a: 0000 unimp
9f0c: 0000 unimp
9f0e: 4a21 li s4,8
9f10: a815 j 9f44 <shutdown_init+0x9c>
9f12: cf8d05b7 lui a1,0xcf8d0
9f16: aab58593 addi a1,a1,-1365 # cf8cfaab <_stack_end+0xbf8afaab>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:93
lc_shift = 16;
break;
case kLcStateRma:
HARDENED_CHECK_EQ(lc_state, kLcStateRma);
9f1a: 00b50663 beq a0,a1,9f26 <shutdown_init+0x7e>
9f1e: 0000 unimp
9f20: 0000 unimp
9f22: 0000 unimp
9f24: 0000 unimp
9f26: 4a61 li s4,24
9f28: a831 j 9f44 <shutdown_init+0x9c>
9f2a: 65f25637 lui a2,0x65f25
9f2e: 20f60613 addi a2,a2,527 # 65f2520f <_stack_end+0x55f0520f>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:74
switch (launder32(lc_state)) {
9f32: 1ac59d63 bne a1,a2,a0ec <shutdown_init+0x244>
9f36: 4a01 li s4,0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:81
HARDENED_CHECK_EQ(lc_state, kLcStateProd);
9f38: 00c50663 beq a0,a2,9f44 <shutdown_init+0x9c>
9f3c: 0000 unimp
9f3e: 0000 unimp
9f40: 0000 unimp
9f42: 0000 unimp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:103
}
// Get the enable and escalation settings for all four alert classes.
// Each of these OTP words is composed of 4 byte enums with the enable and
// escalate configs per alert class (a/b/c/d).
uint32_t class_enable = otp_read32(OTP_CTRL_PARAM_ROM_ALERT_CLASS_EN_OFFSET);
9f44: 36c00513 li a0,876
9f48: a2dff0ef jal ra,9974 <otp_read32>
9f4c: 842a mv s0,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:105
uint32_t class_escalate =
otp_read32(OTP_CTRL_PARAM_ROM_ALERT_ESCALATION_OFFSET);
9f4e: 37000513 li a0,880
9f52: a23ff0ef jal ra,9974 <otp_read32>
9f56: 4581 li a1,0
9f58: 1070 addi a2,sp,44
9f5a: 1874 addi a3,sp,60
9f5c: 02000713 li a4,32
bitfield_field32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:60
return (bitfield >> field.index) & field.mask;
9f60: 00b457b3 srl a5,s0,a1
9f64: 0ff7f793 andi a5,a5,255
shutdown_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:109
alert_enable_t enable[ALERT_CLASSES];
alert_escalate_t escalate[ALERT_CLASSES];
for (size_t i = 0; i < ALERT_CLASSES; ++i) {
enable[i] = (alert_enable_t)bitfield_field32_read(
9f68: c29c sw a5,0(a3)
bitfield_field32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:60
9f6a: 00b557b3 srl a5,a0,a1
9f6e: 0ff7f793 andi a5,a5,255
shutdown_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:111
class_enable, (bitfield_field32_t){.mask = 0xff, .index = i * 8});
escalate[i] = (alert_escalate_t)bitfield_field32_read(
9f72: c21c sw a5,0(a2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:108
for (size_t i = 0; i < ALERT_CLASSES; ++i) {
9f74: 05a1 addi a1,a1,8
9f76: 0611 addi a2,a2,4
9f78: 0691 addi a3,a3,4
9f7a: fee593e3 bne a1,a4,9f60 <shutdown_init+0xb8>
9f7e: 4401 li s0,0
9f80: 73900a93 li s5,1849
9f84: 37400493 li s1,884
9f88: 03200b13 li s6,50
9f8c: 03c10993 addi s3,sp,60
9f90: 46000b93 li s7,1120
9f94: 0a700c13 li s8,167
9f98: 06400c93 li s9,100
9f9c: 73900913 li s2,1849
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:120
// For each alert, read its corresponding OTP word and extract the class
// configuration for the current lifecycle state.
rom_error_t error = kErrorOk;
for (size_t i = 0; i < ALERT_HANDLER_ALERT_CLASS_SHADOWED_MULTIREG_COUNT;
++i) {
uint32_t value = otp_read32(OTP_CTRL_PARAM_ROM_ALERT_CLASSIFICATION_OFFSET +
9fa0: 8526 mv a0,s1
9fa2: 9d3ff0ef jal ra,9974 <otp_read32>
bitfield_field32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:60
9fa6: 01455533 srl a0,a0,s4
9faa: 0ff57593 andi a1,a0,255
clsindex():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:57
switch (cls) {
9fae: 01658a63 beq a1,s6,9fc2 <shutdown_init+0x11a>
9fb2: 01858663 beq a1,s8,9fbe <shutdown_init+0x116>
9fb6: 01959863 bne a1,s9,9fc6 <shutdown_init+0x11e>
9fba: 4505 li a0,1
9fbc: a031 j 9fc8 <shutdown_init+0x120>
9fbe: 4509 li a0,2
9fc0: a021 j 9fc8 <shutdown_init+0x120>
9fc2: 450d li a0,3
9fc4: a011 j 9fc8 <shutdown_init+0x120>
9fc6: 4501 li a0,0
shutdown_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:124
i * sizeof(uint32_t));
alert_class_t cls = (alert_class_t)bitfield_field32_read(
value, (bitfield_field32_t){.mask = 0xff, .index = lc_shift});
rom_error_t e = alert_configure(i, cls, enable[clsindex(cls)]);
9fc8: 050a slli a0,a0,0x2
9fca: 954e add a0,a0,s3
9fcc: 4110 lw a2,0(a0)
9fce: 8522 mv a0,s0
9fd0: 2215 jal a0f4 <alert_configure>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:125
if (e != kErrorOk) {
9fd2: 01550363 beq a0,s5,9fd8 <shutdown_init+0x130>
9fd6: 892a mv s2,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:118
for (size_t i = 0; i < ALERT_HANDLER_ALERT_CLASS_SHADOWED_MULTIREG_COUNT;
9fd8: 0491 addi s1,s1,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:119
++i) {
9fda: 0405 addi s0,s0,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:118
for (size_t i = 0; i < ALERT_HANDLER_ALERT_CLASS_SHADOWED_MULTIREG_COUNT;
9fdc: fd7492e3 bne s1,s7,9fa0 <shutdown_init+0xf8>
9fe0: 4481 li s1,0
9fe2: 4b400413 li s0,1204
9fe6: 03200a93 li s5,50
9fea: 73900b13 li s6,1849
9fee: 4d000b93 li s7,1232
9ff2: 0a700c13 li s8,167
9ff6: 06400c93 li s9,100
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:137
// For each local alert, read its corresponding OTP word and extract the class
// configuration for the current lifecycle state.
for (size_t i = 0; i < ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_MULTIREG_COUNT;
++i) {
uint32_t value =
otp_read32(OTP_CTRL_PARAM_ROM_LOCAL_ALERT_CLASSIFICATION_OFFSET +
9ffa: 8522 mv a0,s0
9ffc: 979ff0ef jal ra,9974 <otp_read32>
bitfield_field32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:60
a000: 01455533 srl a0,a0,s4
a004: 0ff57593 andi a1,a0,255
clsindex():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:57
switch (cls) {
a008: 01558a63 beq a1,s5,a01c <shutdown_init+0x174>
a00c: 01858663 beq a1,s8,a018 <shutdown_init+0x170>
a010: 01959863 bne a1,s9,a020 <shutdown_init+0x178>
a014: 4505 li a0,1
a016: a031 j a022 <shutdown_init+0x17a>
a018: 4509 li a0,2
a01a: a021 j a022 <shutdown_init+0x17a>
a01c: 450d li a0,3
a01e: a011 j a022 <shutdown_init+0x17a>
a020: 4501 li a0,0
shutdown_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:141
i * sizeof(uint32_t));
alert_class_t cls = (alert_class_t)bitfield_field32_read(
value, (bitfield_field32_t){.mask = 0xff, .index = lc_shift});
rom_error_t e = alert_local_configure(i, cls, enable[clsindex(cls)]);
a022: 050a slli a0,a0,0x2
a024: 954e add a0,a0,s3
a026: 4110 lw a2,0(a0)
a028: 8526 mv a0,s1
a02a: 2245 jal a1ca <alert_local_configure>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:142
if (e != kErrorOk) {
a02c: 01650363 beq a0,s6,a032 <shutdown_init+0x18a>
a030: 892a mv s2,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:134
for (size_t i = 0; i < ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_MULTIREG_COUNT;
a032: 0411 addi s0,s0,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:135
++i) {
a034: 0485 addi s1,s1,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:134
for (size_t i = 0; i < ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_MULTIREG_COUNT;
a036: fd7412e3 bne s0,s7,9ffa <shutdown_init+0x152>
a03a: 4a01 li s4,0
a03c: 51400413 li s0,1300
a040: 02c10a93 addi s5,sp,44
a044: 00810d93 addi s11,sp,8
a048: 4b41 li s6,16
a04a: 00002b97 auipc s7,0x2
a04e: d92b8b93 addi s7,s7,-622 # bddc <kPinmuxInputs+0x20>
a052: 73900c13 li s8,1849
a056: 4c91 li s9,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:158
kAlertClassC,
kAlertClassD,
};
alert_class_config_t config;
for (size_t i = 0; i < ALERT_CLASSES; ++i) {
config.enabled = enable[i];
a058: 002a1d13 slli s10,s4,0x2
a05c: 01a98533 add a0,s3,s10
a060: 4108 lw a0,0(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:159
config.escalation = escalate[i];
a062: 01aa85b3 add a1,s5,s10
a066: 418c lw a1,0(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:158
config.enabled = enable[i];
a068: c42a sw a0,8(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:159
config.escalation = escalate[i];
a06a: c62e sw a1,12(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:161
config.accum_threshold = otp_read32(
OTP_CTRL_PARAM_ROM_ALERT_ACCUM_THRESH_OFFSET + i * sizeof(uint32_t));
a06c: 4f4d0513 addi a0,s10,1268
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:160
config.accum_threshold = otp_read32(
a070: 905ff0ef jal ra,9974 <otp_read32>
a074: c82a sw a0,16(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:163
config.timeout_cycles = otp_read32(
OTP_CTRL_PARAM_ROM_ALERT_TIMEOUT_CYCLES_OFFSET + i * sizeof(uint32_t));
a076: 504d0513 addi a0,s10,1284
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:162
config.timeout_cycles = otp_read32(
a07a: 8fbff0ef jal ra,9974 <otp_read32>
a07e: 4481 li s1,0
a080: ca2a sw a0,20(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:165
for (size_t phase = 0; phase < ARRAYSIZE(config.phase_cycles); ++phase) {
config.phase_cycles[phase] = otp_read32(
a082: 00940533 add a0,s0,s1
a086: 8efff0ef jal ra,9974 <otp_read32>
a08a: 009d85b3 add a1,s11,s1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:164
for (size_t phase = 0; phase < ARRAYSIZE(config.phase_cycles); ++phase) {
a08e: 0491 addi s1,s1,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:165
config.phase_cycles[phase] = otp_read32(
a090: c988 sw a0,16(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:164
for (size_t phase = 0; phase < ARRAYSIZE(config.phase_cycles); ++phase) {
a092: ff6498e3 bne s1,s6,a082 <shutdown_init+0x1da>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:170
OTP_CTRL_PARAM_ROM_ALERT_PHASE_CYCLES_OFFSET +
(i * ARRAYSIZE(config.phase_cycles) + phase) * sizeof(uint32_t));
}
rom_error_t e = alert_class_configure(kClasses[i], &config);
a096: 017d0533 add a0,s10,s7
a09a: 4108 lw a0,0(a0)
a09c: 85ee mv a1,s11
a09e: 2401 jal a29e <alert_class_configure>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:171
if (e != kErrorOk) {
a0a0: 01850363 beq a0,s8,a0a6 <shutdown_init+0x1fe>
a0a4: 892a mv s2,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:157
for (size_t i = 0; i < ALERT_CLASSES; ++i) {
a0a6: 0a05 addi s4,s4,1
a0a8: 0441 addi s0,s0,16
a0aa: fb9a17e3 bne s4,s9,a058 <shutdown_init+0x1b0>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:178
// program them all.
error = e;
}
}
return error;
}
a0ae: 854a mv a0,s2
a0b0: 4db6 lw s11,76(sp)
a0b2: 4d46 lw s10,80(sp)
a0b4: 4cd6 lw s9,84(sp)
a0b6: 4c66 lw s8,88(sp)
a0b8: 4bf6 lw s7,92(sp)
a0ba: 5b06 lw s6,96(sp)
a0bc: 5a96 lw s5,100(sp)
a0be: 5a26 lw s4,104(sp)
a0c0: 59b6 lw s3,108(sp)
a0c2: 5946 lw s2,112(sp)
a0c4: 54d6 lw s1,116(sp)
a0c6: 5466 lw s0,120(sp)
a0c8: 50f6 lw ra,124(sp)
a0ca: 6109 addi sp,sp,128
a0cc: 8082 ret
a0ce: b2866637 lui a2,0xb2866
a0d2: fbb60613 addi a2,a2,-69 # b2865fbb <_stack_end+0xa2845fbb>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:74
switch (launder32(lc_state)) {
a0d6: 00c59b63 bne a1,a2,a0ec <shutdown_init+0x244>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:76
HARDENED_CHECK_EQ(lc_state, kLcStateTest);
a0da: 00c50663 beq a0,a2,a0e6 <shutdown_init+0x23e>
a0de: 0000 unimp
a0e0: 0000 unimp
a0e2: 0000 unimp
a0e4: 0000 unimp
a0e6: 73900913 li s2,1849
a0ea: b7d1 j a0ae <shutdown_init+0x206>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:97
HARDENED_UNREACHABLE();
a0ec: 0000 unimp
a0ee: 0000 unimp
a0f0: 0000 unimp
a0f2: 0000 unimp
0000a0f4 <alert_configure>:
alert_configure():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:19
enum {
kBase = TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR,
};
rom_error_t alert_configure(size_t index, alert_class_t cls,
alert_enable_t enabled) {
a0f4: 1141 addi sp,sp,-16
a0f6: c606 sw ra,12(sp)
a0f8: c422 sw s0,8(sp)
a0fa: c226 sw s1,4(sp)
a0fc: c04a sw s2,0(sp)
a0fe: 03a00693 li a3,58
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:20
if (index >= ALERT_HANDLER_ALERT_CLASS_SHADOWED_MULTIREG_COUNT) {
a102: 00a6f763 bgeu a3,a0,a110 <alert_configure+0x1c>
a106: 01415537 lui a0,0x1415
a10a: 80350913 addi s2,a0,-2045 # 1414803 <_chip_info_end+0x1404803>
a10e: a07d j a1bc <alert_configure+0xc8>
a110: 84b2 mv s1,a2
a112: 09300613 li a2,147
a116: 73900913 li s2,1849
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:27
}
index *= 4;
uint32_t reg_wr_count = 0;
switch (cls) {
a11a: 02b65063 bge a2,a1,a13a <alert_configure+0x46>
a11e: 09400693 li a3,148
a122: 4601 li a2,0
a124: 08d58963 beq a1,a3,a1b6 <alert_configure+0xc2>
a128: 0a700693 li a3,167
a12c: 02d58163 beq a1,a3,a14e <alert_configure+0x5a>
a130: 0ee00693 li a3,238
a134: 02d58063 beq a1,a3,a154 <alert_configure+0x60>
a138: a08d j a19a <alert_configure+0xa6>
a13a: 03200613 li a2,50
a13e: 00c58a63 beq a1,a2,a152 <alert_configure+0x5e>
a142: 06400613 li a2,100
a146: 04c59a63 bne a1,a2,a19a <alert_configure+0xa6>
a14a: 4605 li a2,1
a14c: a021 j a154 <alert_configure+0x60>
a14e: 4609 li a2,2
a150: a011 j a154 <alert_configure+0x60>
a152: 460d li a2,3
a154: 050a slli a0,a0,0x2
a156: 401505b7 lui a1,0x40150
a15a: 10458593 addi a1,a1,260 # 40150104 <_stack_end+0x30130104>
a15e: 00b50433 add s0,a0,a1
a162: 0ec40513 addi a0,s0,236
a166: 85b2 mv a1,a2
a168: ed6ff0ef jal ra,983e <sec_mmio_write32_shadowed>
a16c: 451d li a0,7
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:60
default:
sec_mmio_write_increment(reg_wr_count);
return kErrorAlertBadClass;
}
switch (enabled) {
a16e: 02a48a63 beq s1,a0,a1a2 <alert_configure+0xae>
a172: 0a900513 li a0,169
a176: 4605 li a2,1
a178: 02a48f63 beq s1,a0,a1b6 <alert_configure+0xc2>
a17c: 0d200513 li a0,210
a180: 02a49763 bne s1,a0,a1ae <alert_configure+0xba>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:65
case kAlertEnableNone:
break;
case kAlertEnableLocked:
// Enable, then lock.
sec_mmio_write32_shadowed(
a184: 4585 li a1,1
a186: 8522 mv a0,s0
a188: eb6ff0ef jal ra,983e <sec_mmio_write32_shadowed>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:67
kBase + ALERT_HANDLER_ALERT_EN_SHADOWED_0_REG_OFFSET + index, 1);
sec_mmio_write32(kBase + ALERT_HANDLER_ALERT_REGWEN_0_REG_OFFSET + index,
a18c: f1440513 addi a0,s0,-236
a190: 4581 li a1,0
a192: e5cff0ef jal ra,97ee <sec_mmio_write32>
a196: 460d li a2,3
a198: a839 j a1b6 <alert_configure+0xc2>
a19a: 4601 li a2,0
a19c: 02415537 lui a0,0x2415
a1a0: a809 j a1b2 <alert_configure+0xbe>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:72
0);
reg_wr_count += 2;
break;
case kAlertEnableEnabled:
sec_mmio_write32_shadowed(
a1a2: 4585 li a1,1
a1a4: 8522 mv a0,s0
a1a6: e98ff0ef jal ra,983e <sec_mmio_write32_shadowed>
a1aa: 4609 li a2,2
a1ac: a029 j a1b6 <alert_configure+0xc2>
a1ae: 03415537 lui a0,0x3415
a1b2: 80350913 addi s2,a0,-2045 # 3414803 <_chip_info_end+0x3404803>
a1b6: 8532 mv a0,a2
a1b8: ed8ff0ef jal ra,9890 <sec_mmio_write_increment>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:82
sec_mmio_write_increment(reg_wr_count);
return kErrorAlertBadEnable;
}
sec_mmio_write_increment(reg_wr_count);
return kErrorOk;
}
a1bc: 854a mv a0,s2
a1be: 4902 lw s2,0(sp)
a1c0: 4492 lw s1,4(sp)
a1c2: 4422 lw s0,8(sp)
a1c4: 40b2 lw ra,12(sp)
a1c6: 0141 addi sp,sp,16
a1c8: 8082 ret
0000a1ca <alert_local_configure>:
alert_local_configure():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:85
rom_error_t alert_local_configure(size_t index, alert_class_t cls,
alert_enable_t enabled) {
a1ca: 1141 addi sp,sp,-16
a1cc: c606 sw ra,12(sp)
a1ce: c422 sw s0,8(sp)
a1d0: c226 sw s1,4(sp)
a1d2: c04a sw s2,0(sp)
a1d4: 4699 li a3,6
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:86
if (index >= ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_MULTIREG_COUNT) {
a1d6: 00a6f763 bgeu a3,a0,a1e4 <alert_local_configure+0x1a>
a1da: 01415537 lui a0,0x1415
a1de: 80350913 addi s2,a0,-2045 # 1414803 <_chip_info_end+0x1404803>
a1e2: a07d j a290 <alert_local_configure+0xc6>
a1e4: 84b2 mv s1,a2
a1e6: 09300613 li a2,147
a1ea: 73900913 li s2,1849
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:93
}
index *= 4;
uint32_t reg_wr_count = 0;
switch (cls) {
a1ee: 02b65063 bge a2,a1,a20e <alert_local_configure+0x44>
a1f2: 09400693 li a3,148
a1f6: 4601 li a2,0
a1f8: 08d58963 beq a1,a3,a28a <alert_local_configure+0xc0>
a1fc: 0a700693 li a3,167
a200: 02d58163 beq a1,a3,a222 <alert_local_configure+0x58>
a204: 0ee00693 li a3,238
a208: 02d58063 beq a1,a3,a228 <alert_local_configure+0x5e>
a20c: a08d j a26e <alert_local_configure+0xa4>
a20e: 03200613 li a2,50
a212: 00c58a63 beq a1,a2,a226 <alert_local_configure+0x5c>
a216: 06400613 li a2,100
a21a: 04c59a63 bne a1,a2,a26e <alert_local_configure+0xa4>
a21e: 4605 li a2,1
a220: a021 j a228 <alert_local_configure+0x5e>
a222: 4609 li a2,2
a224: a011 j a228 <alert_local_configure+0x5e>
a226: 460d li a2,3
a228: 050a slli a0,a0,0x2
a22a: 401505b7 lui a1,0x40150
a22e: 3e458593 addi a1,a1,996 # 401503e4 <_stack_end+0x301303e4>
a232: 00b50433 add s0,a0,a1
a236: 01c40513 addi a0,s0,28
a23a: 85b2 mv a1,a2
a23c: e02ff0ef jal ra,983e <sec_mmio_write32_shadowed>
a240: 451d li a0,7
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:126
default:
sec_mmio_write_increment(reg_wr_count);
return kErrorAlertBadClass;
}
switch (enabled) {
a242: 02a48a63 beq s1,a0,a276 <alert_local_configure+0xac>
a246: 0a900513 li a0,169
a24a: 4605 li a2,1
a24c: 02a48f63 beq s1,a0,a28a <alert_local_configure+0xc0>
a250: 0d200513 li a0,210
a254: 02a49763 bne s1,a0,a282 <alert_local_configure+0xb8>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:131
case kAlertEnableNone:
break;
case kAlertEnableLocked:
// Enable, then lock.
sec_mmio_write32_shadowed(
a258: 4585 li a1,1
a25a: 8522 mv a0,s0
a25c: de2ff0ef jal ra,983e <sec_mmio_write32_shadowed>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:134
kBase + ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_0_REG_OFFSET + index, 1);
sec_mmio_write32(
kBase + ALERT_HANDLER_LOC_ALERT_REGWEN_0_REG_OFFSET + index, 0);
a260: fe440513 addi a0,s0,-28
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:133
sec_mmio_write32(
a264: 4581 li a1,0
a266: d88ff0ef jal ra,97ee <sec_mmio_write32>
a26a: 460d li a2,3
a26c: a839 j a28a <alert_local_configure+0xc0>
a26e: 4601 li a2,0
a270: 02415537 lui a0,0x2415
a274: a809 j a286 <alert_local_configure+0xbc>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:138
reg_wr_count += 2;
break;
case kAlertEnableEnabled:
sec_mmio_write32_shadowed(
a276: 4585 li a1,1
a278: 8522 mv a0,s0
a27a: dc4ff0ef jal ra,983e <sec_mmio_write32_shadowed>
a27e: 4609 li a2,2
a280: a029 j a28a <alert_local_configure+0xc0>
a282: 03415537 lui a0,0x3415
a286: 80350913 addi s2,a0,-2045 # 3414803 <_chip_info_end+0x3404803>
a28a: 8532 mv a0,a2
a28c: e04ff0ef jal ra,9890 <sec_mmio_write_increment>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:148
sec_mmio_write_increment(reg_wr_count);
return kErrorAlertBadEnable;
}
sec_mmio_write_increment(reg_wr_count);
return kErrorOk;
}
a290: 854a mv a0,s2
a292: 4902 lw s2,0(sp)
a294: 4492 lw s1,4(sp)
a296: 4422 lw s0,8(sp)
a298: 40b2 lw ra,12(sp)
a29a: 0141 addi sp,sp,16
a29c: 8082 ret
0000a29e <alert_class_configure>:
alert_class_configure():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:151
rom_error_t alert_class_configure(alert_class_t cls,
const alert_class_config_t *config) {
a29e: 1101 addi sp,sp,-32
a2a0: ce06 sw ra,28(sp)
a2a2: cc22 sw s0,24(sp)
a2a4: ca26 sw s1,20(sp)
a2a6: c84a sw s2,16(sp)
a2a8: c64e sw s3,12(sp)
a2aa: c452 sw s4,8(sp)
a2ac: c256 sw s5,4(sp)
a2ae: 892e mv s2,a1
a2b0: 85aa mv a1,a0
a2b2: 02415537 lui a0,0x2415
a2b6: 0a600613 li a2,166
a2ba: 80350513 addi a0,a0,-2045 # 2414803 <_chip_info_end+0x2404803>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:168
reg, ALERT_HANDLER_CLASSA_CTRL_SHADOWED_MAP_E3_FIELD, 3);
// All of the alert class register blocks are identical but at different
// offsets. We'll treat everything like Class A, but add in the offset
// to the other classes.
switch (cls) {
a2be: 00b64d63 blt a2,a1,a2d8 <alert_class_configure+0x3a>
a2c2: 03200613 li a2,50
a2c6: 02c58363 beq a1,a2,a2ec <alert_class_configure+0x4e>
a2ca: 06400613 li a2,100
a2ce: 10c59d63 bne a1,a2,a3e8 <alert_class_configure+0x14a>
a2d2: 03800613 li a2,56
a2d6: a005 j a2f6 <alert_class_configure+0x58>
a2d8: 0a700613 li a2,167
a2dc: 00c58b63 beq a1,a2,a2f2 <alert_class_configure+0x54>
a2e0: 0ee00613 li a2,238
a2e4: 10c59263 bne a1,a2,a3e8 <alert_class_configure+0x14a>
a2e8: 4601 li a2,0
a2ea: a031 j a2f6 <alert_class_configure+0x58>
a2ec: 0a800613 li a2,168
a2f0: a019 j a2f6 <alert_class_configure+0x58>
a2f2: 07000613 li a2,112
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:189
break;
case kAlertClassX:
default:
return kErrorAlertBadClass;
}
switch (config->enabled) {
a2f6: 00092503 lw a0,0(s2)
a2fa: 469d li a3,7
a2fc: 6591 lui a1,0x4
a2fe: 02d50163 beq a0,a3,a320 <alert_class_configure+0x82>
a302: 0a900693 li a3,169
a306: 00d50a63 beq a0,a3,a31a <alert_class_configure+0x7c>
a30a: 0d200593 li a1,210
a30e: 0cb51963 bne a0,a1,a3e0 <alert_class_configure+0x142>
a312: 6511 lui a0,0x4
a314: 90350593 addi a1,a0,-1789 # 3903 <_epmp_text_tor_hi+0xaa2>
a318: a031 j a324 <alert_class_configure+0x86>
a31a: 90058593 addi a1,a1,-1792 # 3900 <_epmp_text_tor_hi+0xa9f>
a31e: a019 j a324 <alert_class_configure+0x86>
a320: 90158593 addi a1,a1,-1791
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:203
case kAlertEnableNone:
break;
default:
return kErrorAlertBadEnable;
}
switch (config->escalation) {
a324: 00492683 lw a3,4(s2)
a328: 04415537 lui a0,0x4415
a32c: 0b800713 li a4,184
a330: 80350513 addi a0,a0,-2045 # 4414803 <_epmp_stack_guard_na4+0x40d003>
a334: 00d75f63 bge a4,a3,a352 <alert_class_configure+0xb4>
a338: 0b900713 li a4,185
a33c: 02e68963 beq a3,a4,a36e <alert_class_configure+0xd0>
a340: 0cb00713 li a4,203
a344: 02e68363 beq a3,a4,a36a <alert_class_configure+0xcc>
a348: 0d100713 li a4,209
a34c: 02e68363 beq a3,a4,a372 <alert_class_configure+0xd4>
a350: a861 j a3e8 <alert_class_configure+0x14a>
a352: 02500713 li a4,37
a356: 00e68863 beq a3,a4,a366 <alert_class_configure+0xc8>
a35a: 07600713 li a4,118
a35e: 08e69563 bne a3,a4,a3e8 <alert_class_configure+0x14a>
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:80
bitfield |= (value & field.mask) << field.index;
a362: 0205e593 ori a1,a1,32
a366: 0105e593 ori a1,a1,16
a36a: 0085e593 ori a1,a1,8
a36e: 0045e593 ori a1,a1,4
a372: 40150537 lui a0,0x40150
a376: 43850513 addi a0,a0,1080 # 40150438 <_stack_end+0x30130438>
alert_class_configure():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:228
return kErrorAlertBadEscalation;
}
uint32_t reg_wr_count = 0;
sec_mmio_write32_shadowed(
kBase + ALERT_HANDLER_CLASSA_CTRL_SHADOWED_REG_OFFSET + offset, reg);
a37a: 00a609b3 add s3,a2,a0
a37e: 00498513 addi a0,s3,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:227
sec_mmio_write32_shadowed(
a382: cbcff0ef jal ra,983e <sec_mmio_write32_shadowed>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:231
sec_mmio_write32_shadowed(
kBase + ALERT_HANDLER_CLASSA_ACCUM_THRESH_SHADOWED_REG_OFFSET + offset,
config->accum_threshold);
a386: 00892583 lw a1,8(s2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:230
kBase + ALERT_HANDLER_CLASSA_ACCUM_THRESH_SHADOWED_REG_OFFSET + offset,
a38a: 01498513 addi a0,s3,20
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:229
sec_mmio_write32_shadowed(
a38e: cb0ff0ef jal ra,983e <sec_mmio_write32_shadowed>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:234
sec_mmio_write32_shadowed(
kBase + ALERT_HANDLER_CLASSA_TIMEOUT_CYC_SHADOWED_REG_OFFSET + offset,
config->timeout_cycles);
a392: 00c92583 lw a1,12(s2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:233
kBase + ALERT_HANDLER_CLASSA_TIMEOUT_CYC_SHADOWED_REG_OFFSET + offset,
a396: 01898513 addi a0,s3,24
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:232
sec_mmio_write32_shadowed(
a39a: ca4ff0ef jal ra,983e <sec_mmio_write32_shadowed>
a39e: 4401 li s0,0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:235
for (size_t i = 0; i < 4; ++i) {
a3a0: 02098a13 addi s4,s3,32
a3a4: 01090493 addi s1,s2,16
a3a8: 4ac1 li s5,16
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:239
sec_mmio_write32_shadowed(
kBase + ALERT_HANDLER_CLASSA_PHASE0_CYC_SHADOWED_REG_OFFSET + offset +
i * 4,
config->phase_cycles[i]);
a3aa: 00848533 add a0,s1,s0
a3ae: 410c lw a1,0(a0)
a3b0: 008a0533 add a0,s4,s0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:236
sec_mmio_write32_shadowed(
a3b4: c8aff0ef jal ra,983e <sec_mmio_write32_shadowed>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:235
for (size_t i = 0; i < 4; ++i) {
a3b8: 0411 addi s0,s0,4
a3ba: ff5418e3 bne s0,s5,a3aa <alert_class_configure+0x10c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:243
}
reg_wr_count += 7;
if (config->enabled == kAlertEnableLocked) {
a3be: 00092583 lw a1,0(s2)
a3c2: 0d200613 li a2,210
a3c6: 451d li a0,7
a3c8: 00c59763 bne a1,a2,a3d6 <alert_class_configure+0x138>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:245
// Lock the alert configuration if it is configured to be locked.
sec_mmio_write32(kBase + ALERT_HANDLER_CLASSA_REGWEN_REG_OFFSET + offset,
a3cc: 854e mv a0,s3
a3ce: 4581 li a1,0
a3d0: c1eff0ef jal ra,97ee <sec_mmio_write32>
a3d4: 4521 li a0,8
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:250
0);
++reg_wr_count;
}
sec_mmio_write_increment(reg_wr_count);
a3d6: cbaff0ef jal ra,9890 <sec_mmio_write_increment>
a3da: 73900513 li a0,1849
a3de: a029 j a3e8 <alert_class_configure+0x14a>
a3e0: 03415537 lui a0,0x3415
a3e4: 80350513 addi a0,a0,-2045 # 3414803 <_chip_info_end+0x3404803>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/alert.c:252
return kErrorOk;
}
a3e8: 4a92 lw s5,4(sp)
a3ea: 4a22 lw s4,8(sp)
a3ec: 49b2 lw s3,12(sp)
a3ee: 4942 lw s2,16(sp)
a3f0: 44d2 lw s1,20(sp)
a3f2: 4462 lw s0,24(sp)
a3f4: 40f2 lw ra,28(sp)
a3f6: 6105 addi sp,sp,32
a3f8: 8082 ret
0000a3fa <mask_rom_epmp_state_init>:
mask_rom_epmp_state_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.c:17
// Symbols defined in linker script.
extern char _stack_start[]; // Lowest stack address.
extern char _text_start[]; // Start of executable code.
extern char _text_end[]; // End of executable code.
void mask_rom_epmp_state_init(epmp_state_t *state) {
a3fa: 1141 addi sp,sp,-16
a3fc: c606 sw ra,12(sp)
a3fe: c422 sw s0,8(sp)
a400: 842a mv s0,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.c:43
// Initialize in-memory copy of ePMP register state.
//
// The actual hardware configuration is performed separately, either by reset
// logic or in assembly. This code must be kept in sync with any changes
// to the hardware configuration.
*state = (epmp_state_t){0};
a402: 0511 addi a0,a0,4
a404: 04400613 li a2,68
a408: 4581 li a1,0
a40a: e6efe0ef jal ra,8a78 <memset>
epmp_state_configure_tor():
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:157
*/
inline void epmp_state_configure_tor(epmp_state_t *state, uint32_t entry,
epmp_region_t region, epmp_perm_t perm) {
// Set address registers.
if (entry > 0) {
state->pmpaddr[entry - 1] = region.start >> 2;
a40e: ffffe517 auipc a0,0xffffe
a412: bf250513 addi a0,a0,-1038 # 8000 <_mask_rom_interrupt_vector_asm>
a416: 8109 srli a0,a0,0x2
a418: c808 sw a0,16(s0)
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:159
}
state->pmpaddr[entry] = region.end >> 2;
a41a: 00001517 auipc a0,0x1
a41e: 56a50513 addi a0,a0,1386 # b984 <_text_end>
a422: 8109 srli a0,a0,0x2
a424: c848 sw a0,20(s0)
a426: 650d lui a0,0x3
a428: 157d addi a0,a0,-1
epmp_state_configure_napot():
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:200
*/
inline void epmp_state_configure_napot(epmp_state_t *state, uint32_t entry,
epmp_region_t region, epmp_perm_t perm) {
// Set address register.
uint32_t len = (region.end - region.start - 1) >> 3;
state->pmpaddr[entry] = (region.start >> 2) | len;
a42a: cc08 sw a0,24(s0)
a42c: 00999537 lui a0,0x999
a430: d0050513 addi a0,a0,-768 # 998d00 <_chip_info_end+0x988d00>
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:204
// Set configuration register.
bitfield_field32_t field = {.mask = 0xff, .index = (entry % 4) * 8};
state->pmpcfg[entry / 4] = bitfield_field32_write(
a434: c008 sw a0,0(s0)
a436: 08020537 lui a0,0x8020
a43a: 157d addi a0,a0,-1
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:200
state->pmpaddr[entry] = (region.start >> 2) | len;
a43c: d048 sw a0,36(s0)
a43e: 09900513 li a0,153
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:204
state->pmpcfg[entry / 4] = bitfield_field32_write(
a442: 00a402a3 sb a0,5(s0)
a446: 10000537 lui a0,0x10000
epmp_state_configure_tor():
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:157
state->pmpaddr[entry - 1] = region.start >> 2;
a44a: dc08 sw a0,56(s0)
a44c: 14000537 lui a0,0x14000
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:159
state->pmpaddr[entry] = region.end >> 2;
a450: dc48 sw a0,60(s0)
a452: 08b00513 li a0,139
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:163
state->pmpcfg[entry / 4] = bitfield_field32_write(state->pmpcfg[entry / 4],
a456: 00a405a3 sb a0,11(s0)
epmp_state_configure_na4():
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:179
state->pmpaddr[entry] = region.start >> 2;
a45a: 10014517 auipc a0,0x10014
a45e: ba650513 addi a0,a0,-1114 # 1001e000 <_stack_start>
a462: 8109 srli a0,a0,0x2
a464: c428 sw a0,72(s0)
a466: 04004537 lui a0,0x4004
a46a: 157d addi a0,a0,-1
epmp_state_configure_napot():
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:200
state->pmpaddr[entry] = (region.start >> 2) | len;
a46c: c468 sw a0,76(s0)
a46e: 6529 lui a0,0xa
a470: b9050513 addi a0,a0,-1136 # 9b90 <lifecycle_state_get+0x126>
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:204
state->pmpcfg[entry / 4] = bitfield_field32_write(
a474: 00a41723 sh a0,14(s0)
a478: 4519 li a0,6
mask_rom_epmp_state_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.c:50
epmp_state_configure_napot(state, 2, rom, kEpmpPermLockedReadOnly);
epmp_state_configure_napot(state, 5, eflash, kEpmpPermLockedReadOnly);
epmp_state_configure_tor(state, 11, mmio, kEpmpPermLockedReadWrite);
epmp_state_configure_na4(state, 14, stack_guard, kEpmpPermLockedNoAccess);
epmp_state_configure_napot(state, 15, ram, kEpmpPermLockedReadWrite);
state->mseccfg = EPMP_MSECCFG_MMWP | EPMP_MSECCFG_RLB;
a47a: c828 sw a0,80(s0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.c:51
}
a47c: 4422 lw s0,8(sp)
a47e: 40b2 lw ra,12(sp)
a480: 0141 addi sp,sp,16
a482: 8082 ret
0000a484 <mask_rom_epmp_unlock_rom_ext_rx>:
epmp_state_configure_tor():
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:157
state->pmpaddr[entry - 1] = region.start >> 2;
a484: 8189 srli a1,a1,0x2
a486: cd4c sw a1,28(a0)
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:159
state->pmpaddr[entry] = region.end >> 2;
a488: 8209 srli a2,a2,0x2
a48a: d110 sw a2,32(a0)
a48c: 08d00693 li a3,141
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/epmp.h:163
state->pmpcfg[entry / 4] = bitfield_field32_write(state->pmpcfg[entry / 4],
a490: 00d50223 sb a3,4(a0)
mask_rom_epmp_unlock_rom_ext_rx():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.c:69
//
// 32 24 16 8 0
// +-----------+-----------+-----------+-----------+
// `pmpcfg1` = | `pmp7cfg` | `pmp6cfg` | `pmp5cfg` | `pmp4cfg` |
// +-----------+-----------+-----------+-----------+
CSR_WRITE(CSR_REG_PMPADDR3, image.start >> 2);
a494: 3b359073 csrw pmpaddr3,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.c:70
CSR_WRITE(CSR_REG_PMPADDR4, image.end >> 2);
a498: 3b461073 csrw pmpaddr4,a2
a49c: 0ff00513 li a0,255
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.c:71
CSR_CLEAR_BITS(CSR_REG_PMPCFG1, 0xff);
a4a0: 3a153073 csrc pmpcfg1,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.c:72
CSR_SET_BITS(CSR_REG_PMPCFG1, kEpmpModeTor | kEpmpPermLockedReadExecute);
a4a4: 3a16a073 csrs pmpcfg1,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/mask_rom_epmp.c:73
}
a4a8: 8082 ret
0000a4aa <epmp_state_check>:
epmp_state_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:19
extern void epmp_state_configure_na4(epmp_state_t *state, uint32_t entry,
epmp_region_t region, epmp_perm_t perm);
extern void epmp_state_configure_napot(epmp_state_t *state, uint32_t entry,
epmp_region_t region, epmp_perm_t perm);
rom_error_t epmp_state_check(const epmp_state_t *s) {
a4aa: 7179 addi sp,sp,-48
a4ac: d622 sw s0,44(sp)
a4ae: d426 sw s1,40(sp)
a4b0: d24a sw s2,36(sp)
a4b2: d04e sw s3,32(sp)
a4b4: ce52 sw s4,28(sp)
a4b6: cc56 sw s5,24(sp)
a4b8: ca5a sw s6,20(sp)
a4ba: c85e sw s7,16(sp)
a4bc: c662 sw s8,12(sp)
a4be: c466 sw s9,8(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:29
CSR_READ(reg, &csr); \
result &= csr == (value); \
} while (false)
// Check address registers.
CHECK_CSR(CSR_REG_PMPADDR0, s->pmpaddr[0]);
a4c0: 3b0025f3 csrr a1,pmpaddr0
a4c4: 4910 lw a2,16(a0)
a4c6: 00c5c833 xor a6,a1,a2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:30
CHECK_CSR(CSR_REG_PMPADDR1, s->pmpaddr[1]);
a4ca: 3b1028f3 csrr a7,pmpaddr1
a4ce: 01452283 lw t0,20(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:31
CHECK_CSR(CSR_REG_PMPADDR2, s->pmpaddr[2]);
a4d2: 3b202373 csrr t1,pmpaddr2
a4d6: 4d1c lw a5,24(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:32
CHECK_CSR(CSR_REG_PMPADDR3, s->pmpaddr[3]);
a4d8: 3b3025f3 csrr a1,pmpaddr3
a4dc: 4d50 lw a2,28(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:33
CHECK_CSR(CSR_REG_PMPADDR4, s->pmpaddr[4]);
a4de: 3b4026f3 csrr a3,pmpaddr4
a4e2: 5118 lw a4,32(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:30
CHECK_CSR(CSR_REG_PMPADDR1, s->pmpaddr[1]);
a4e4: 0058c8b3 xor a7,a7,t0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:31
CHECK_CSR(CSR_REG_PMPADDR2, s->pmpaddr[2]);
a4e8: 00f343b3 xor t2,t1,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:32
CHECK_CSR(CSR_REG_PMPADDR3, s->pmpaddr[3]);
a4ec: 00c5c333 xor t1,a1,a2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:33
CHECK_CSR(CSR_REG_PMPADDR4, s->pmpaddr[4]);
a4f0: 00e6c2b3 xor t0,a3,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:34
CHECK_CSR(CSR_REG_PMPADDR5, s->pmpaddr[5]);
a4f4: 3b502e73 csrr t3,pmpaddr5
a4f8: 02452e83 lw t4,36(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:35
CHECK_CSR(CSR_REG_PMPADDR6, s->pmpaddr[6]);
a4fc: 3b602f73 csrr t5,pmpaddr6
a500: 550c lw a1,40(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:36
CHECK_CSR(CSR_REG_PMPADDR7, s->pmpaddr[7]);
a502: 3b7027f3 csrr a5,pmpaddr7
a506: 5554 lw a3,44(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:37
CHECK_CSR(CSR_REG_PMPADDR8, s->pmpaddr[8]);
a508: 3b802773 csrr a4,pmpaddr8
a50c: 5910 lw a2,48(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:34
CHECK_CSR(CSR_REG_PMPADDR5, s->pmpaddr[5]);
a50e: 01de4e33 xor t3,t3,t4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:35
CHECK_CSR(CSR_REG_PMPADDR6, s->pmpaddr[6]);
a512: 00bf4fb3 xor t6,t5,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:36
CHECK_CSR(CSR_REG_PMPADDR7, s->pmpaddr[7]);
a516: 00d7cf33 xor t5,a5,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:37
CHECK_CSR(CSR_REG_PMPADDR8, s->pmpaddr[8]);
a51a: 00c74eb3 xor t4,a4,a2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:38
CHECK_CSR(CSR_REG_PMPADDR9, s->pmpaddr[9]);
a51e: 3b902973 csrr s2,pmpaddr9
a522: 595c lw a5,52(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:39
CHECK_CSR(CSR_REG_PMPADDR10, s->pmpaddr[10]);
a524: 3ba02673 csrr a2,pmpaddr10
a528: 5d14 lw a3,56(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:40
CHECK_CSR(CSR_REG_PMPADDR11, s->pmpaddr[11]);
a52a: 3bb025f3 csrr a1,pmpaddr11
a52e: 5d40 lw s0,60(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:41
CHECK_CSR(CSR_REG_PMPADDR12, s->pmpaddr[12]);
a530: 3bc024f3 csrr s1,pmpaddr12
a534: 4138 lw a4,64(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:38
CHECK_CSR(CSR_REG_PMPADDR9, s->pmpaddr[9]);
a536: 00f94ab3 xor s5,s2,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:39
CHECK_CSR(CSR_REG_PMPADDR10, s->pmpaddr[10]);
a53a: 00d64a33 xor s4,a2,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:40
CHECK_CSR(CSR_REG_PMPADDR11, s->pmpaddr[11]);
a53e: 0085c9b3 xor s3,a1,s0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:41
CHECK_CSR(CSR_REG_PMPADDR12, s->pmpaddr[12]);
a542: 00e4c933 xor s2,s1,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:42
CHECK_CSR(CSR_REG_PMPADDR13, s->pmpaddr[13]);
a546: 3bd02b73 csrr s6,pmpaddr13
a54a: 4160 lw s0,68(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:43
CHECK_CSR(CSR_REG_PMPADDR14, s->pmpaddr[14]);
a54c: 3be024f3 csrr s1,pmpaddr14
a550: 4534 lw a3,72(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:44
CHECK_CSR(CSR_REG_PMPADDR15, s->pmpaddr[15]);
a552: 3bf025f3 csrr a1,pmpaddr15
a556: 4570 lw a2,76(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:47
// Check configuration registers.
CHECK_CSR(CSR_REG_PMPCFG0, s->pmpcfg[0]);
a558: 3a0027f3 csrr a5,pmpcfg0
a55c: 4118 lw a4,0(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:42
CHECK_CSR(CSR_REG_PMPADDR13, s->pmpaddr[13]);
a55e: 008b4cb3 xor s9,s6,s0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:43
CHECK_CSR(CSR_REG_PMPADDR14, s->pmpaddr[14]);
a562: 00d4cc33 xor s8,s1,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:44
CHECK_CSR(CSR_REG_PMPADDR15, s->pmpaddr[15]);
a566: 00c5cbb3 xor s7,a1,a2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:47
CHECK_CSR(CSR_REG_PMPCFG0, s->pmpcfg[0]);
a56a: 00e7cb33 xor s6,a5,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:48
CHECK_CSR(CSR_REG_PMPCFG1, s->pmpcfg[1]);
a56e: 3a102773 csrr a4,pmpcfg1
a572: 415c lw a5,4(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:49
CHECK_CSR(CSR_REG_PMPCFG2, s->pmpcfg[2]);
a574: 3a2024f3 csrr s1,pmpcfg2
a578: 4510 lw a2,8(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:50
CHECK_CSR(CSR_REG_PMPCFG3, s->pmpcfg[3]);
a57a: 3a3025f3 csrr a1,pmpcfg3
a57e: 4554 lw a3,12(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:54
// Check Machine Security Configuration (MSECCFG) register.
// High bits are hardcoded to 0.
CHECK_CSR(CSR_REG_MSECCFG, s->mseccfg);
a580: 74702473 csrr s0,0x747
a584: 4928 lw a0,80(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:48
CHECK_CSR(CSR_REG_PMPCFG1, s->pmpcfg[1]);
a586: 8f3d xor a4,a4,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:49
CHECK_CSR(CSR_REG_PMPCFG2, s->pmpcfg[2]);
a588: 8e25 xor a2,a2,s1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:50
CHECK_CSR(CSR_REG_PMPCFG3, s->pmpcfg[3]);
a58a: 8db5 xor a1,a1,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:54
CHECK_CSR(CSR_REG_MSECCFG, s->mseccfg);
a58c: 8d21 xor a0,a0,s0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:55
CHECK_CSR(CSR_REG_MSECCFGH, 0);
a58e: 757026f3 csrr a3,0x757
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/epmp.c:59
#undef CHECK_CSR
return result ? kErrorOk : kErrorEpmpBadCheck;
a592: 011867b3 or a5,a6,a7
a596: 0077e7b3 or a5,a5,t2
a59a: 0067e7b3 or a5,a5,t1
a59e: 0057e7b3 or a5,a5,t0
a5a2: 01c7e7b3 or a5,a5,t3
a5a6: 01f7e7b3 or a5,a5,t6
a5aa: 01e7e7b3 or a5,a5,t5
a5ae: 01d7e7b3 or a5,a5,t4
a5b2: 0157e7b3 or a5,a5,s5
a5b6: 0147e7b3 or a5,a5,s4
a5ba: 0137e7b3 or a5,a5,s3
a5be: 0127e7b3 or a5,a5,s2
a5c2: 0197e7b3 or a5,a5,s9
a5c6: 0187e7b3 or a5,a5,s8
a5ca: 0177e7b3 or a5,a5,s7
a5ce: 0167e7b3 or a5,a5,s6
a5d2: 8f5d or a4,a4,a5
a5d4: 8e59 or a2,a2,a4
a5d6: 8dd1 or a1,a1,a2
a5d8: 8d4d or a0,a0,a1
a5da: 00d565b3 or a1,a0,a3
a5de: 73900513 li a0,1849
a5e2: c581 beqz a1,a5ea <epmp_state_check+0x140>
a5e4: 01455537 lui a0,0x1455
a5e8: 0535 addi a0,a0,13
a5ea: 4ca2 lw s9,8(sp)
a5ec: 4c32 lw s8,12(sp)
a5ee: 4bc2 lw s7,16(sp)
a5f0: 4b52 lw s6,20(sp)
a5f2: 4ae2 lw s5,24(sp)
a5f4: 4a72 lw s4,28(sp)
a5f6: 5982 lw s3,32(sp)
a5f8: 5912 lw s2,36(sp)
a5fa: 54a2 lw s1,40(sp)
a5fc: 5432 lw s0,44(sp)
a5fe: 6145 addi sp,sp,48
a600: 8082 ret
0000a602 <sigverify_rsa_key_get>:
sigverify_rsa_key_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:203
HARDENED_UNREACHABLE();
}
}
rom_error_t sigverify_rsa_key_get(uint32_t key_id, lifecycle_state_t lc_state,
const sigverify_rsa_key_t **key) {
a602: 7179 addi sp,sp,-48
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
a604: d606 sw ra,44(sp)
a606: d422 sw s0,40(sp)
a608: d226 sw s1,36(sp)
a60a: d04a sw s2,32(sp)
a60c: ce4e sw s3,28(sp)
a60e: cc52 sw s4,24(sp)
a610: ca56 sw s5,20(sp)
a612: c85a sw s6,16(sp)
a614: c65e sw s7,12(sp)
a616: 4681 li a3,0
a618: 8932 mv s2,a2
a61a: 8a2e mv s4,a1
sigverify_rsa_key_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:208
const sigverify_mask_rom_key_t *keys = sigverify_rsa_keys_ptr_get();
size_t num_keys = sigverify_num_rsa_keys_get();
size_t cand_key_index = UINT32_MAX;
size_t i = 0;
for (; launder32(i) < num_keys; ++i) {
a61c: c681 beqz a3,a624 <sigverify_rsa_key_get+0x22>
a61e: 4481 li s1,0
a620: 59fd li s3,-1
a622: a881 j a672 <sigverify_rsa_key_get+0x70>
a624: 8b2a mv s6,a0
a626: 4481 li s1,0
a628: 59fd li s3,-1
a62a: 5801a537 lui a0,0x5801a
a62e: 2bd50413 addi s0,a0,701 # 5801a2bd <_stack_end+0x47ffa2bd>
a632: 3ff0d537 lui a0,0x3ff0d
a636: 81950a93 addi s5,a0,-2023 # 3ff0c819 <_stack_end+0x2feec819>
a63a: 73900b93 li s7,1849
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
a63e: 8522 mv a0,s0
sigverify_rsa_key_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:211
const sigverify_mask_rom_key_t *k = &keys[i];
size_t k_id = sigverify_rsa_key_id_get(&k->key.n);
if (launder32(k_id) == key_id) {
a640: 03651663 bne a0,s6,a66c <sigverify_rsa_key_get+0x6a>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:212
HARDENED_CHECK_EQ(k_id, key_id);
a644: 01640663 beq s0,s6,a650 <sigverify_rsa_key_get+0x4e>
a648: 0000 unimp
a64a: 0000 unimp
a64c: 0000 unimp
a64e: 0000 unimp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:213
rom_error_t error = key_is_valid(k->key_type, lc_state, i);
a650: 8556 mv a0,s5
a652: 85d2 mv a1,s4
a654: 8626 mv a2,s1
a656: 2079 jal a6e4 <key_is_valid>
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
a658: 85aa mv a1,a0
sigverify_rsa_key_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:214
if (launder32(error) == kErrorOk) {
a65a: 01759963 bne a1,s7,a66c <sigverify_rsa_key_get+0x6a>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:215
HARDENED_CHECK_EQ(error, kErrorOk);
a65e: 01750663 beq a0,s7,a66a <sigverify_rsa_key_get+0x68>
a662: 0000 unimp
a664: 0000 unimp
a666: 0000 unimp
a668: 0000 unimp
a66a: 89a6 mv s3,s1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:208
for (; launder32(i) < num_keys; ++i) {
a66c: 0485 addi s1,s1,1
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
a66e: 8526 mv a0,s1
sigverify_rsa_key_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:208
a670: d579 beqz a0,a63e <sigverify_rsa_key_get+0x3c>
a672: 4505 li a0,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:220
cand_key_index = i;
}
}
}
HARDENED_CHECK_EQ(i, num_keys);
a674: 00a48663 beq s1,a0,a680 <sigverify_rsa_key_get+0x7e>
a678: 0000 unimp
a67a: 0000 unimp
a67c: 0000 unimp
a67e: 0000 unimp
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
a680: 85ce mv a1,s3
sigverify_rsa_key_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:222
if (launder32(cand_key_index) < num_keys) {
a682: c591 beqz a1,a68e <sigverify_rsa_key_get+0x8c>
a684: 02535537 lui a0,0x2535
a688: 60350513 addi a0,a0,1539 # 2535603 <_chip_info_end+0x2525603>
a68c: a089 j a6ce <sigverify_rsa_key_get+0xcc>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:223
HARDENED_CHECK_LT(cand_key_index, num_keys);
a68e: 00a9c663 blt s3,a0,a69a <sigverify_rsa_key_get+0x98>
a692: 0000 unimp
a694: 0000 unimp
a696: 0000 unimp
a698: 0000 unimp
a69a: 3ff0d537 lui a0,0x3ff0d
a69e: 81950513 addi a0,a0,-2023 # 3ff0c819 <_stack_end+0x2feec819>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:225
rom_error_t error =
key_is_valid(keys[cand_key_index].key_type, lc_state, cand_key_index);
a6a2: 85d2 mv a1,s4
a6a4: 864e mv a2,s3
a6a6: 283d jal a6e4 <key_is_valid>
a6a8: 73900593 li a1,1849
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:226
HARDENED_CHECK_EQ(error, kErrorOk);
a6ac: 00b50663 beq a0,a1,a6b8 <sigverify_rsa_key_get+0xb6>
a6b0: 0000 unimp
a6b2: 0000 unimp
a6b4: 0000 unimp
a6b6: 0000 unimp
a6b8: 1a400593 li a1,420
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:227
*key = &keys[cand_key_index].key;
a6bc: 02b985b3 mul a1,s3,a1
a6c0: 00001617 auipc a2,0x1
a6c4: 2e460613 addi a2,a2,740 # b9a4 <kSigVerifyRsaKeys>
a6c8: 95b2 add a1,a1,a2
a6ca: 00b92023 sw a1,0(s2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:232
return error;
}
return kErrorSigverifyBadKey;
}
a6ce: 4bb2 lw s7,12(sp)
a6d0: 4b42 lw s6,16(sp)
a6d2: 4ad2 lw s5,20(sp)
a6d4: 4a62 lw s4,24(sp)
a6d6: 49f2 lw s3,28(sp)
a6d8: 5902 lw s2,32(sp)
a6da: 5492 lw s1,36(sp)
a6dc: 5422 lw s0,40(sp)
a6de: 50b2 lw ra,44(sp)
a6e0: 6145 addi sp,sp,48
a6e2: 8082 ret
0000a6e4 <key_is_valid>:
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
a6e4: 86ae mv a3,a1
a6e6: cf8d0737 lui a4,0xcf8d0
a6ea: aaa70793 addi a5,a4,-1366 # cf8cfaaa <_stack_end+0xbf8afaaa>
key_is_valid():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:181
switch (launder32(lc_state)) {
a6ee: 04d7dc63 bge a5,a3,a746 <key_is_valid+0x62>
a6f2: aab70713 addi a4,a4,-1365
a6f6: 06e68563 beq a3,a4,a760 <key_is_valid+0x7c>
a6fa: 0b5a7737 lui a4,0xb5a7
a6fe: 5e070713 addi a4,a4,1504 # b5a75e0 <_epmp_stack_guard_na4+0x759fde0>
a702: 0ae69363 bne a3,a4,a7a8 <key_is_valid+0xc4>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:192
HARDENED_CHECK_EQ(lc_state, kLcStateDev);
a706: 00e58663 beq a1,a4,a712 <key_is_valid+0x2e>
a70a: 0000 unimp
a70c: 0000 unimp
a70e: 0000 unimp
a710: 0000 unimp
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
a712: 85aa mv a1,a0
a714: 7a01a6b7 lui a3,0x7a01a
a718: 47168693 addi a3,a3,1137 # 7a01a471 <_stack_end+0x69ffa471>
key_is_valid_in_lc_state_dev():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:103
switch (launder32(key_type)) {
a71c: 10d58f63 beq a1,a3,a83a <key_is_valid+0x156>
a720: 43a846b7 lui a3,0x43a84
a724: 9ad68693 addi a3,a3,-1619 # 43a839ad <_stack_end+0x33a639ad>
a728: 10d58263 beq a1,a3,a82c <key_is_valid+0x148>
a72c: 3ff0d637 lui a2,0x3ff0d
a730: 81960613 addi a2,a2,-2023 # 3ff0c819 <_stack_end+0x2feec819>
a734: 14c59363 bne a1,a2,a87a <key_is_valid+0x196>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:105
HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeTest);
a738: 00c50663 beq a0,a2,a744 <key_is_valid+0x60>
a73c: 0000 unimp
a73e: 0000 unimp
a740: 0000 unimp
a742: 0000 unimp
a744: a215 j a868 <key_is_valid+0x184>
a746: 91b9b737 lui a4,0x91b9b
a74a: 68a70713 addi a4,a4,1674 # 91b9b68a <_stack_end+0x81b7b68a>
key_is_valid():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:181
switch (launder32(lc_state)) {
a74e: 06e69b63 bne a3,a4,a7c4 <key_is_valid+0xe0>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:189
HARDENED_CHECK_EQ(lc_state, kLcStateProdEnd);
a752: 00e58663 beq a1,a4,a75e <key_is_valid+0x7a>
a756: 0000 unimp
a758: 0000 unimp
a75a: 0000 unimp
a75c: 0000 unimp
a75e: a08d j a7c0 <key_is_valid+0xdc>
a760: cf8d06b7 lui a3,0xcf8d0
a764: aab68693 addi a3,a3,-1365 # cf8cfaab <_stack_end+0xbf8afaab>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:195
HARDENED_CHECK_EQ(lc_state, kLcStateRma);
a768: 00d58663 beq a1,a3,a774 <key_is_valid+0x90>
a76c: 0000 unimp
a76e: 0000 unimp
a770: 0000 unimp
a772: 0000 unimp
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
a774: 85aa mv a1,a0
a776: 7a01a6b7 lui a3,0x7a01a
a77a: 47168693 addi a3,a3,1137 # 7a01a471 <_stack_end+0x69ffa471>
key_is_valid_in_lc_state_rma():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:76
switch (launder32(key_type)) {
a77e: 0ad58063 beq a1,a3,a81e <key_is_valid+0x13a>
a782: 43a846b7 lui a3,0x43a84
a786: 9ad68693 addi a3,a3,-1619 # 43a839ad <_stack_end+0x33a639ad>
a78a: 08d58363 beq a1,a3,a810 <key_is_valid+0x12c>
a78e: 3ff0d6b7 lui a3,0x3ff0d
a792: 81968693 addi a3,a3,-2023 # 3ff0c819 <_stack_end+0x2feec819>
a796: 0ed59663 bne a1,a3,a882 <key_is_valid+0x19e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:78
HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeTest);
a79a: 00d50663 beq a0,a3,a7a6 <key_is_valid+0xc2>
a79e: 0000 unimp
a7a0: 0000 unimp
a7a2: 0000 unimp
a7a4: 0000 unimp
a7a6: a045 j a846 <key_is_valid+0x162>
a7a8: 65f25737 lui a4,0x65f25
a7ac: 20f70713 addi a4,a4,527 # 65f2520f <_stack_end+0x55f0520f>
key_is_valid():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:181
switch (launder32(lc_state)) {
a7b0: 0ce69163 bne a3,a4,a872 <key_is_valid+0x18e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:186
HARDENED_CHECK_EQ(lc_state, kLcStateProd);
a7b4: 00e58663 beq a1,a4,a7c0 <key_is_valid+0xdc>
a7b8: 0000 unimp
a7ba: 0000 unimp
a7bc: 0000 unimp
a7be: 0000 unimp
a7c0: 85b2 mv a1,a2
a7c2: a8c1 j a892 <key_is_valid_in_lc_state_prod>
a7c4: b2866637 lui a2,0xb2866
a7c8: fbb60613 addi a2,a2,-69 # b2865fbb <_stack_end+0xa2845fbb>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:181
switch (launder32(lc_state)) {
a7cc: 0ac69363 bne a3,a2,a872 <key_is_valid+0x18e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:183
HARDENED_CHECK_EQ(lc_state, kLcStateTest);
a7d0: 00c58663 beq a1,a2,a7dc <key_is_valid+0xf8>
a7d4: 0000 unimp
a7d6: 0000 unimp
a7d8: 0000 unimp
a7da: 0000 unimp
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
a7dc: 85aa mv a1,a0
a7de: 7a01a637 lui a2,0x7a01a
a7e2: 47160613 addi a2,a2,1137 # 7a01a471 <_stack_end+0x69ffa471>
key_is_valid_in_lc_state_test():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:156
switch (launder32(key_type)) {
a7e6: 06c58b63 beq a1,a2,a85c <key_is_valid+0x178>
a7ea: 43a84637 lui a2,0x43a84
a7ee: 9ad60613 addi a2,a2,-1619 # 43a839ad <_stack_end+0x33a639ad>
a7f2: 04c58c63 beq a1,a2,a84a <key_is_valid+0x166>
a7f6: 3ff0d637 lui a2,0x3ff0d
a7fa: 81960613 addi a2,a2,-2023 # 3ff0c819 <_stack_end+0x2feec819>
a7fe: 08c59663 bne a1,a2,a88a <key_is_valid+0x1a6>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:158
HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeTest);
a802: 00c50663 beq a0,a2,a80e <key_is_valid+0x12a>
a806: 0000 unimp
a808: 0000 unimp
a80a: 0000 unimp
a80c: 0000 unimp
a80e: a0a1 j a856 <key_is_valid+0x172>
key_is_valid_in_lc_state_rma():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:81
HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeProd);
a810: 00d50663 beq a0,a3,a81c <key_is_valid+0x138>
a814: 0000 unimp
a816: 0000 unimp
a818: 0000 unimp
a81a: 0000 unimp
a81c: a02d j a846 <key_is_valid+0x162>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:84
HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeDev);
a81e: 00d50663 beq a0,a3,a82a <key_is_valid+0x146>
a822: 0000 unimp
a824: 0000 unimp
a826: 0000 unimp
a828: 0000 unimp
a82a: a83d j a868 <key_is_valid+0x184>
key_is_valid_in_lc_state_dev():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:108
HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeProd);
a82c: 00d50663 beq a0,a3,a838 <key_is_valid+0x154>
a830: 0000 unimp
a832: 0000 unimp
a834: 0000 unimp
a836: 0000 unimp
a838: a039 j a846 <key_is_valid+0x162>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:111
HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeDev);
a83a: 00d50663 beq a0,a3,a846 <key_is_valid+0x162>
a83e: 0000 unimp
a840: 0000 unimp
a842: 0000 unimp
a844: 0000 unimp
a846: 8532 mv a0,a2
a848: a075 j a8f4 <key_is_valid_in_otp>
key_is_valid_in_lc_state_test():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:161
HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeProd);
a84a: 00c50663 beq a0,a2,a856 <key_is_valid+0x172>
a84e: 0000 unimp
a850: 0000 unimp
a852: 0000 unimp
a854: 0000 unimp
a856: 73900513 li a0,1849
key_is_valid():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:200
}
a85a: 8082 ret
key_is_valid_in_lc_state_test():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:164
HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeDev);
a85c: 00c50663 beq a0,a2,a868 <key_is_valid+0x184>
a860: 0000 unimp
a862: 0000 unimp
a864: 0000 unimp
a866: 0000 unimp
a868: 02535537 lui a0,0x2535
a86c: 60350513 addi a0,a0,1539 # 2535603 <_chip_info_end+0x2525603>
key_is_valid():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:200
}
a870: 8082 ret
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:198
HARDENED_UNREACHABLE();
a872: 0000 unimp
a874: 0000 unimp
a876: 0000 unimp
a878: 0000 unimp
key_is_valid_in_lc_state_dev():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:114
HARDENED_UNREACHABLE();
a87a: 0000 unimp
a87c: 0000 unimp
a87e: 0000 unimp
a880: 0000 unimp
key_is_valid_in_lc_state_rma():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:87
HARDENED_UNREACHABLE();
a882: 0000 unimp
a884: 0000 unimp
a886: 0000 unimp
a888: 0000 unimp
key_is_valid_in_lc_state_test():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:167
HARDENED_UNREACHABLE();
a88a: 0000 unimp
a88c: 0000 unimp
a88e: 0000 unimp
a890: 0000 unimp
0000a892 <key_is_valid_in_lc_state_prod>:
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
a892: 862a mv a2,a0
a894: 7a01a6b7 lui a3,0x7a01a
a898: 47168693 addi a3,a3,1137 # 7a01a471 <_stack_end+0x69ffa471>
key_is_valid_in_lc_state_prod():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:130
switch (launder32(key_type)) {
a89c: 02d60d63 beq a2,a3,a8d6 <key_is_valid_in_lc_state_prod+0x44>
a8a0: 43a846b7 lui a3,0x43a84
a8a4: 9ad68693 addi a3,a3,-1619 # 43a839ad <_stack_end+0x33a639ad>
a8a8: 00d60f63 beq a2,a3,a8c6 <key_is_valid_in_lc_state_prod+0x34>
a8ac: 3ff0d5b7 lui a1,0x3ff0d
a8b0: 81958593 addi a1,a1,-2023 # 3ff0c819 <_stack_end+0x2feec819>
a8b4: 02b61c63 bne a2,a1,a8ec <key_is_valid_in_lc_state_prod+0x5a>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:132
HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeTest);
a8b8: 00b50663 beq a0,a1,a8c4 <key_is_valid_in_lc_state_prod+0x32>
a8bc: 0000 unimp
a8be: 0000 unimp
a8c0: 0000 unimp
a8c2: 0000 unimp
a8c4: a839 j a8e2 <key_is_valid_in_lc_state_prod+0x50>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:135
HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeProd);
a8c6: 00d50663 beq a0,a3,a8d2 <key_is_valid_in_lc_state_prod+0x40>
a8ca: 0000 unimp
a8cc: 0000 unimp
a8ce: 0000 unimp
a8d0: 0000 unimp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:136
return key_is_valid_in_otp(key_index);
a8d2: 852e mv a0,a1
a8d4: a005 j a8f4 <key_is_valid_in_otp>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:138
HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeDev);
a8d6: 00d50663 beq a0,a3,a8e2 <key_is_valid_in_lc_state_prod+0x50>
a8da: 0000 unimp
a8dc: 0000 unimp
a8de: 0000 unimp
a8e0: 0000 unimp
a8e2: 02535537 lui a0,0x2535
a8e6: 60350513 addi a0,a0,1539 # 2535603 <_chip_info_end+0x2525603>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:143
}
a8ea: 8082 ret
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:141
HARDENED_UNREACHABLE();
a8ec: 0000 unimp
a8ee: 0000 unimp
a8f0: 0000 unimp
a8f2: 0000 unimp
0000a8f4 <key_is_valid_in_otp>:
key_is_valid_in_otp():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:47
static rom_error_t key_is_valid_in_otp(size_t key_index) {
a8f4: 1141 addi sp,sp,-16
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:49
OTP_CTRL_PARAM_CREATOR_SW_CFG_KEY_IS_VALID_OFFSET +
a8f6: c606 sw ra,12(sp)
a8f8: c422 sw s0,8(sp)
a8fa: 0cc50593 addi a1,a0,204
a8fe: 99f1 andi a1,a1,-4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:53
.index = (key_index % kSigverifyNumEntriesPerOtpWord) * 8,
a900: 050e slli a0,a0,0x3
a902: 01857413 andi s0,a0,24
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:56
bitfield_field32_read(otp_read32(addr), field);
a906: 852e mv a0,a1
a908: 86cff0ef jal ra,9974 <otp_read32>
bitfield_field32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:60
return (bitfield >> field.index) & field.mask;
a90c: 00855533 srl a0,a0,s0
a910: 0ff57513 andi a0,a0,255
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
a914: 862a mv a2,a0
a916: 0a500593 li a1,165
key_is_valid_in_otp():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:57
if (launder32(is_valid) == kHardenedByteBoolTrue) {
a91a: 00b61b63 bne a2,a1,a930 <key_is_valid_in_otp+0x3c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:58
HARDENED_CHECK_EQ(is_valid, kHardenedByteBoolTrue);
a91e: 00b50663 beq a0,a1,a92a <key_is_valid_in_otp+0x36>
a922: 0000 unimp
a924: 0000 unimp
a926: 0000 unimp
a928: 0000 unimp
a92a: 73900513 li a0,1849
a92e: a029 j a938 <key_is_valid_in_otp+0x44>
a930: 02535537 lui a0,0x2535
a934: 60350513 addi a0,a0,1539 # 2535603 <_chip_info_end+0x2525603>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/sigverify_keys.c:62
}
a938: 4422 lw s0,8(sp)
a93a: 40b2 lw ra,12(sp)
a93c: 0141 addi sp,sp,16
a93e: 8082 ret
0000a940 <sigverify_rsa_verify>:
sigverify_rsa_verify():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:234
rom_error_t sigverify_rsa_verify(const sigverify_rsa_buffer_t *signature,
const sigverify_rsa_key_t *key,
const hmac_digest_t *act_digest,
lifecycle_state_t lc_state,
uint32_t *flash_exec) {
a940: 7125 addi sp,sp,-416
a942: 18112e23 sw ra,412(sp)
a946: 18812c23 sw s0,408(sp)
a94a: 18912a23 sw s1,404(sp)
a94e: 19212823 sw s2,400(sp)
a952: 19312623 sw s3,396(sp)
a956: 19412423 sw s4,392(sp)
a95a: 8a3a mv s4,a4
a95c: 577d li a4,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:235
*flash_exec = UINT32_MAX;
a95e: 00ea2023 sw a4,0(s4)
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
a962: 8736 mv a4,a3
a964: cf8d0837 lui a6,0xcf8d0
a968: aaa80793 addi a5,a6,-1366 # cf8cfaaa <_stack_end+0xbf8afaaa>
a96c: 84b2 mv s1,a2
a96e: 89ae mv s3,a1
a970: 892a mv s2,a0
sigverify_use_sw_rsa_verify():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:207
switch (launder32(lc_state)) {
a972: 02e7d363 bge a5,a4,a998 <sigverify_rsa_verify+0x58>
a976: aab80513 addi a0,a6,-1365
a97a: 02a70c63 beq a4,a0,a9b2 <sigverify_rsa_verify+0x72>
a97e: 0b5a7537 lui a0,0xb5a7
a982: 5e050513 addi a0,a0,1504 # b5a75e0 <_epmp_stack_guard_na4+0x759fde0>
a986: 04a71163 bne a4,a0,a9c8 <sigverify_rsa_verify+0x88>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:214
HARDENED_CHECK_EQ(lc_state, kLcStateDev);
a98a: 00a68663 beq a3,a0,a996 <sigverify_rsa_verify+0x56>
a98e: 0000 unimp
a990: 0000 unimp
a992: 0000 unimp
a994: 0000 unimp
a996: a0a9 j a9e0 <sigverify_rsa_verify+0xa0>
a998: 91b9b537 lui a0,0x91b9b
a99c: 68a50513 addi a0,a0,1674 # 91b9b68a <_stack_end+0x81b7b68a>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:207
switch (launder32(lc_state)) {
a9a0: 06a71563 bne a4,a0,aa0a <sigverify_rsa_verify+0xca>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:220
HARDENED_CHECK_EQ(lc_state, kLcStateProdEnd);
a9a4: 00a68663 beq a3,a0,a9b0 <sigverify_rsa_verify+0x70>
a9a8: 0000 unimp
a9aa: 0000 unimp
a9ac: 0000 unimp
a9ae: 0000 unimp
a9b0: a805 j a9e0 <sigverify_rsa_verify+0xa0>
a9b2: cf8d0537 lui a0,0xcf8d0
a9b6: aab50513 addi a0,a0,-1365 # cf8cfaab <_stack_end+0xbf8afaab>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:223
HARDENED_CHECK_EQ(lc_state, kLcStateRma);
a9ba: 00a68663 beq a3,a0,a9c6 <sigverify_rsa_verify+0x86>
a9be: 0000 unimp
a9c0: 0000 unimp
a9c2: 0000 unimp
a9c4: 0000 unimp
a9c6: a829 j a9e0 <sigverify_rsa_verify+0xa0>
a9c8: 65f25537 lui a0,0x65f25
a9cc: 20f50513 addi a0,a0,527 # 65f2520f <_stack_end+0x55f0520f>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:207
switch (launder32(lc_state)) {
a9d0: 1ea71963 bne a4,a0,abc2 <sigverify_rsa_verify+0x282>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:217
HARDENED_CHECK_EQ(lc_state, kLcStateProd);
a9d4: 00a68663 beq a3,a0,a9e0 <sigverify_rsa_verify+0xa0>
a9d8: 0000 unimp
a9da: 0000 unimp
a9dc: 0000 unimp
a9de: 0000 unimp
a9e0: 0c800513 li a0,200
a9e4: f91fe0ef jal ra,9974 <otp_read32>
a9e8: 1d400593 li a1,468
sigverify_rsa_verify():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:238
hardened_bool_t use_sw = sigverify_use_sw_rsa_verify(lc_state);
sigverify_rsa_buffer_t enc_msg;
switch (use_sw) {
a9ec: 00b50a63 beq a0,a1,aa00 <sigverify_rsa_verify+0xc0>
a9f0: 73900593 li a1,1849
a9f4: 02b50763 beq a0,a1,aa22 <sigverify_rsa_verify+0xe2>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:246
break;
case kHardenedBoolFalse:
RETURN_IF_ERROR(sigverify_mod_exp_otbn(key, signature, &enc_msg));
break;
default:
HARDENED_UNREACHABLE();
a9f8: 0000 unimp
a9fa: 0000 unimp
a9fc: 0000 unimp
a9fe: 0000 unimp
aa00: 0030 addi a2,sp,8
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:243
RETURN_IF_ERROR(sigverify_mod_exp_otbn(key, signature, &enc_msg));
aa02: 854e mv a0,s3
aa04: 85ca mv a1,s2
aa06: 25bd jal b074 <sigverify_mod_exp_otbn>
aa08: a00d j aa2a <sigverify_rsa_verify+0xea>
aa0a: b2866537 lui a0,0xb2866
aa0e: fbb50513 addi a0,a0,-69 # b2865fbb <_stack_end+0xa2845fbb>
sigverify_use_sw_rsa_verify():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:207
switch (launder32(lc_state)) {
aa12: 1aa71863 bne a4,a0,abc2 <sigverify_rsa_verify+0x282>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:209
HARDENED_CHECK_EQ(lc_state, kLcStateTest);
aa16: 00a68663 beq a3,a0,aa22 <sigverify_rsa_verify+0xe2>
aa1a: 0000 unimp
aa1c: 0000 unimp
aa1e: 0000 unimp
aa20: 0000 unimp
aa22: 0030 addi a2,sp,8
sigverify_rsa_verify():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:240
RETURN_IF_ERROR(sigverify_mod_exp_ibex(key, signature, &enc_msg));
aa24: 854e mv a0,s3
aa26: 85ca mv a1,s2
aa28: 2c0d jal ac5a <sigverify_mod_exp_ibex>
aa2a: 73900593 li a1,1849
aa2e: 16b51c63 bne a0,a1,aba6 <sigverify_rsa_verify+0x266>
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
aa32: 4501 li a0,0
aa34: 461d li a2,7
aa36: 4581 li a1,0
aa38: 02a66663 bltu a2,a0,aa64 <sigverify_rsa_verify+0x124>
aa3c: 4581 li a1,0
aa3e: 0028 addi a0,sp,8
aa40: 00001617 auipc a2,0x1
aa44: 10860613 addi a2,a2,264 # bb48 <kSigverifyShares>
aa48: 46a1 li a3,8
sigverify_encoded_message_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:144
enc_msg_ptr[i] ^= act_digest->digest[j] ^ kSigverifyShares[i];
aa4a: 4098 lw a4,0(s1)
aa4c: 421c lw a5,0(a2)
aa4e: 4100 lw s0,0(a0)
aa50: 8f3d xor a4,a4,a5
aa52: 8f21 xor a4,a4,s0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:143
for (size_t j = 0; launder32(j) < kHmacDigestNumWords; ++j, ++i) {
aa54: 0585 addi a1,a1,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:144
enc_msg_ptr[i] ^= act_digest->digest[j] ^ kSigverifyShares[i];
aa56: c118 sw a4,0(a0)
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
aa58: 872e mv a4,a1
sigverify_encoded_message_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:143
for (size_t j = 0; launder32(j) < kHmacDigestNumWords; ++j, ++i) {
aa5a: 0511 addi a0,a0,4
aa5c: 0611 addi a2,a2,4
aa5e: 0491 addi s1,s1,4
aa60: fed765e3 bltu a4,a3,aa4a <sigverify_rsa_verify+0x10a>
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
aa64: 4601 li a2,0
aa66: 4691 li a3,4
aa68: 00001897 auipc a7,0x1
aa6c: 0e088893 addi a7,a7,224 # bb48 <kSigverifyShares>
aa70: 04c6e063 bltu a3,a2,aab0 <sigverify_rsa_verify+0x170>
sigverify_encoded_message_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:150
for (size_t j = 0; launder32(j) < ARRAYSIZE(kEncodedSha256); ++j, ++i) {
aa74: 00259693 slli a3,a1,0x2
aa78: 0030 addi a2,sp,8
aa7a: 9636 add a2,a2,a3
aa7c: 00001717 auipc a4,0x1
aa80: 0cc70713 addi a4,a4,204 # bb48 <kSigverifyShares>
aa84: 9736 add a4,a4,a3
aa86: 4685 li a3,1
aa88: 00001797 auipc a5,0x1
aa8c: 24078793 addi a5,a5,576 # bcc8 <sigverify_encoded_message_check.kEncodedSha256>
aa90: 4815 li a6,5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:151
enc_msg_ptr[i] ^= kEncodedSha256[j] ^ kSigverifyShares[i];
aa92: 4380 lw s0,0(a5)
aa94: 4304 lw s1,0(a4)
aa96: 4208 lw a0,0(a2)
aa98: 8ca1 xor s1,s1,s0
aa9a: 8d25 xor a0,a0,s1
aa9c: c208 sw a0,0(a2)
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
aa9e: 8536 mv a0,a3
sigverify_encoded_message_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:150
for (size_t j = 0; launder32(j) < ARRAYSIZE(kEncodedSha256); ++j, ++i) {
aaa0: 0685 addi a3,a3,1
aaa2: 0791 addi a5,a5,4
aaa4: 0611 addi a2,a2,4
aaa6: 0711 addi a4,a4,4
aaa8: ff0565e3 bltu a0,a6,aa92 <sigverify_rsa_verify+0x152>
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
aaac: 95b6 add a1,a1,a3
aaae: 15fd addi a1,a1,-1
aab0: 4681 li a3,0
aab2: 00259713 slli a4,a1,0x2
aab6: 01170633 add a2,a4,a7
aaba: 4210 lw a2,0(a2)
aabc: 05100793 li a5,81
aac0: 02d7ed63 bltu a5,a3,aafa <sigverify_rsa_verify+0x1ba>
aac4: 00001697 auipc a3,0x1
aac8: 08468693 addi a3,a3,132 # bb48 <kSigverifyShares>
aacc: 96ba add a3,a3,a4
sigverify_encoded_message_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:158
for (size_t j = 0; launder32(j) < kPsLen; ++j, ++i) {
aace: 0691 addi a3,a3,4
aad0: 003c addi a5,sp,8
aad2: 97ba add a5,a5,a4
aad4: 4705 li a4,1
aad6: 05200493 li s1,82
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:159
enc_msg_ptr[i] ^= 0xffffffff ^ kSigverifyShares[i];
aada: 4388 lw a0,0(a5)
aadc: 8d31 xor a0,a0,a2
aade: fff54513 not a0,a0
aae2: c388 sw a0,0(a5)
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
aae4: 853a mv a0,a4
aae6: 4290 lw a2,0(a3)
sigverify_encoded_message_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:158
for (size_t j = 0; launder32(j) < kPsLen; ++j, ++i) {
aae8: 0705 addi a4,a4,1
aaea: 0691 addi a3,a3,4
aaec: 0791 addi a5,a5,4
aaee: fe9566e3 bltu a0,s1,aada <sigverify_rsa_verify+0x19a>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:162
enc_msg_ptr[i] ^= 0x0001ffff ^ kSigverifyShares[i];
aaf2: 00e58533 add a0,a1,a4
aaf6: fff50593 addi a1,a0,-1
aafa: 00259513 slli a0,a1,0x2
aafe: 0034 addi a3,sp,8
ab00: 9536 add a0,a0,a3
ab02: 4118 lw a4,0(a0)
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
ab04: 4781 li a5,0
sigverify_encoded_message_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:162
ab06: 8e39 xor a2,a2,a4
ab08: 00020737 lui a4,0x20
ab0c: 177d addi a4,a4,-1
ab0e: 8e39 xor a2,a2,a4
ab10: c110 sw a2,0(a0)
ab12: 05f00513 li a0,95
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:163
HARDENED_CHECK_EQ(i, kSigVerifyRsaNumWords - 1);
ab16: 00a58663 beq a1,a0,ab22 <sigverify_rsa_verify+0x1e2>
ab1a: 0000 unimp
ab1c: 0000 unimp
ab1e: 0000 unimp
ab20: 0000 unimp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:167
*flash_exec = 0;
ab22: 000a2023 sw zero,0(s4)
ab26: 4581 li a1,0
ab28: 02f56d63 bltu a0,a5,ab62 <sigverify_rsa_verify+0x222>
ab2c: 4701 li a4,0
ab2e: 4581 li a1,0
ab30: 06000613 li a2,96
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:172
diff |= enc_msg_ptr[i] ^ kSigverifyShares[i];
ab34: 4288 lw a0,0(a3)
ab36: 0008a783 lw a5,0(a7)
ab3a: 8fa9 xor a5,a5,a0
ab3c: 8f5d or a4,a4,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:173
diff |= ~diff + 1; // Set upper bits to 1 if not 0, no change o/w.
ab3e: 40e007b3 neg a5,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:176
*flash_exec ^= enc_msg_ptr[i];
ab42: 000a2483 lw s1,0(s4)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:173
diff |= ~diff + 1; // Set upper bits to 1 if not 0, no change o/w.
ab46: 8f5d or a4,a4,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:174
diff |= ~(diff >> 31) + 1; // Set to all 1s if MSB is set, no change o/w.
ab48: 41f75793 srai a5,a4,0x1f
ab4c: 8f5d or a4,a4,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:176
*flash_exec ^= enc_msg_ptr[i];
ab4e: 8d25 xor a0,a0,s1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:178
*flash_exec |= diff;
ab50: 8d59 or a0,a0,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:169
for (i = 0; launder32(i) < kSigVerifyRsaNumWords; ++i) {
ab52: 0585 addi a1,a1,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:178
*flash_exec |= diff;
ab54: 00aa2023 sw a0,0(s4)
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
ab58: 852e mv a0,a1
sigverify_encoded_message_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:169
for (i = 0; launder32(i) < kSigVerifyRsaNumWords; ++i) {
ab5a: 0891 addi a7,a7,4
ab5c: 0691 addi a3,a3,4
ab5e: fcc56be3 bltu a0,a2,ab34 <sigverify_rsa_verify+0x1f4>
ab62: 06000513 li a0,96
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:180
HARDENED_CHECK_EQ(i, kSigVerifyRsaNumWords);
ab66: 00a58663 beq a1,a0,ab72 <sigverify_rsa_verify+0x232>
ab6a: 0000 unimp
ab6c: 0000 unimp
ab6e: 0000 unimp
ab70: 0000 unimp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:185
(*flash_exec << 21 ^ *flash_exec << 10 ^ *flash_exec >> 1) >> 21;
ab72: 000a2503 lw a0,0(s4)
ab76: 01551593 slli a1,a0,0x15
ab7a: 00a51613 slli a2,a0,0xa
ab7e: 8db1 xor a1,a1,a2
ab80: 8159 srli a0,a0,0x16
ab82: 81d5 srli a1,a1,0x15
ab84: 8d2d xor a0,a0,a1
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
ab86: 862a mv a2,a0
ab88: 73900593 li a1,1849
ab8c: 00b61963 bne a2,a1,ab9e <sigverify_rsa_verify+0x25e>
sigverify_encoded_message_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:187
HARDENED_CHECK_EQ(result, kErrorOk);
ab90: 00b50663 beq a0,a1,ab9c <sigverify_rsa_verify+0x25c>
ab94: 0000 unimp
ab96: 0000 unimp
ab98: 0000 unimp
ab9a: 0000 unimp
ab9c: a029 j aba6 <sigverify_rsa_verify+0x266>
ab9e: 01535537 lui a0,0x1535
aba2: 60350513 addi a0,a0,1539 # 1535603 <_chip_info_end+0x1525603>
sigverify_rsa_verify():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:249
}
return sigverify_encoded_message_check(&enc_msg, act_digest, flash_exec);
}
aba6: 18812a03 lw s4,392(sp)
abaa: 18c12983 lw s3,396(sp)
abae: 19012903 lw s2,400(sp)
abb2: 19412483 lw s1,404(sp)
abb6: 19812403 lw s0,408(sp)
abba: 19c12083 lw ra,412(sp)
abbe: 611d addi sp,sp,416
abc0: 8082 ret
sigverify_use_sw_rsa_verify():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:226
HARDENED_UNREACHABLE();
abc2: 0000 unimp
abc4: 0000 unimp
abc6: 0000 unimp
abc8: 0000 unimp
0000abca <sigverify_usage_constraints_get>:
sigverify_usage_constraints_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:252
void sigverify_usage_constraints_get(
uint32_t selector_bits, manifest_usage_constraints_t *usage_constraints) {
abca: 1101 addi sp,sp,-32
abcc: ce06 sw ra,28(sp)
abce: cc22 sw s0,24(sp)
abd0: ca26 sw s1,20(sp)
abd2: c84a sw s2,16(sp)
abd4: c64e sw s3,12(sp)
abd6: 892e mv s2,a1
abd8: 84aa mv s1,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:253
usage_constraints->selector_bits = selector_bits;
abda: c188 sw a0,0(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:254
lifecycle_device_id_get(&usage_constraints->device_id);
abdc: 00458413 addi s0,a1,4
abe0: 8522 mv a0,s0
abe2: 854ff0ef jal ra,9c36 <lifecycle_device_id_get>
abe6: a5a5a537 lui a0,0xa5a5a
abea: 5a550993 addi s3,a0,1445 # a5a5a5a5 <_stack_end+0x95a3a5a5>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:257
// TODO(#7948): Define OTP entries for manufacturing states. Left unselected
// for now.
usage_constraints->manuf_state_creator =
abee: 03392223 sw s3,36(s2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:259
MANIFEST_USAGE_CONSTRAINT_UNSELECTED_WORD_VAL;
usage_constraints->manuf_state_owner =
abf2: 03392423 sw s3,40(s2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:261
MANIFEST_USAGE_CONSTRAINT_UNSELECTED_WORD_VAL;
usage_constraints->life_cycle_state = lifecycle_state_get();
abf6: e75fe0ef jal ra,9a6a <lifecycle_state_get>
abfa: 4581 li a1,0
abfc: 02a92623 sw a0,44(s2)
ac00: 4521 li a0,8
bitfield_bit32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:125
bitfield_bit32_to_field32(bit_index)) == 0x1u;
ac02: 00b4d633 srl a2,s1,a1
ac06: 8a05 andi a2,a2,1
sigverify_usage_constraints_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:268
static_assert(
kManifestSelectorBitDeviceIdFirst == 0 &&
kManifestSelectorBitDeviceIdLast == kLifecycleDeviceIdNumWords - 1,
"mapping from selector_bits to device_id changed, loop must be updated");
for (size_t i = 0; i < kLifecycleDeviceIdNumWords; ++i) {
if (!bitfield_bit32_read(selector_bits, i)) {
ac08: e219 bnez a2,ac0e <sigverify_usage_constraints_get+0x44>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:269
usage_constraints->device_id.device_id[i] =
ac0a: 01342023 sw s3,0(s0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:267
for (size_t i = 0; i < kLifecycleDeviceIdNumWords; ++i) {
ac0e: 0585 addi a1,a1,1
ac10: 0411 addi s0,s0,4
ac12: fea598e3 bne a1,a0,ac02 <sigverify_usage_constraints_get+0x38>
bitfield_bit32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:125
ac16: 1004f513 andi a0,s1,256
sigverify_usage_constraints_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:273
MANIFEST_USAGE_CONSTRAINT_UNSELECTED_WORD_VAL;
}
}
if (!bitfield_bit32_read(selector_bits,
ac1a: e519 bnez a0,ac28 <sigverify_usage_constraints_get+0x5e>
ac1c: a5a5a537 lui a0,0xa5a5a
ac20: 5a550513 addi a0,a0,1445 # a5a5a5a5 <_stack_end+0x95a3a5a5>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:275
kManifestSelectorBitManufStateCreator)) {
usage_constraints->manuf_state_creator =
ac24: 02a92223 sw a0,36(s2)
bitfield_bit32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:125
ac28: 2004f513 andi a0,s1,512
sigverify_usage_constraints_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:278
MANIFEST_USAGE_CONSTRAINT_UNSELECTED_WORD_VAL;
}
if (!bitfield_bit32_read(selector_bits,
ac2c: e519 bnez a0,ac3a <sigverify_usage_constraints_get+0x70>
ac2e: a5a5a537 lui a0,0xa5a5a
ac32: 5a550513 addi a0,a0,1445 # a5a5a5a5 <_stack_end+0x95a3a5a5>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:280
kManifestSelectorBitManufStateOwner)) {
usage_constraints->manuf_state_owner =
ac36: 02a92423 sw a0,40(s2)
bitfield_bit32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:125
ac3a: 4004f513 andi a0,s1,1024
sigverify_usage_constraints_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:283
MANIFEST_USAGE_CONSTRAINT_UNSELECTED_WORD_VAL;
}
if (!bitfield_bit32_read(selector_bits, kManifestSelectorBitLifeCycleState)) {
ac3e: e519 bnez a0,ac4c <sigverify_usage_constraints_get+0x82>
ac40: a5a5a537 lui a0,0xa5a5a
ac44: 5a550513 addi a0,a0,1445 # a5a5a5a5 <_stack_end+0x95a3a5a5>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:284
usage_constraints->life_cycle_state =
ac48: 02a92623 sw a0,44(s2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify.c:287
MANIFEST_USAGE_CONSTRAINT_UNSELECTED_WORD_VAL;
}
}
ac4c: 49b2 lw s3,12(sp)
ac4e: 4942 lw s2,16(sp)
ac50: 44d2 lw s1,20(sp)
ac52: 4462 lw s0,24(sp)
ac54: 40f2 lw ra,28(sp)
ac56: 6105 addi sp,sp,32
ac58: 8082 ret
0000ac5a <sigverify_mod_exp_ibex>:
sigverify_mod_exp_ibex():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:168
}
}
rom_error_t sigverify_mod_exp_ibex(const sigverify_rsa_key_t *key,
const sigverify_rsa_buffer_t *sig,
sigverify_rsa_buffer_t *result) {
ac5a: 7125 addi sp,sp,-416
ac5c: 18112e23 sw ra,412(sp)
ac60: 18812c23 sw s0,408(sp)
ac64: 18912a23 sw s1,404(sp)
ac68: 19212823 sw s2,400(sp)
ac6c: 19312623 sw s3,396(sp)
ac70: 19412423 sw s4,392(sp)
ac74: 19512223 sw s5,388(sp)
ac78: 89b2 mv s3,a2
ac7a: 892e mv s2,a1
ac7c: 8aaa mv s5,a0
ac7e: 05f00593 li a1,95
ac82: 17c00613 li a2,380
ac86: 04535537 lui a0,0x4535
ac8a: 60350513 addi a0,a0,1539 # 4535603 <_epmp_stack_guard_na4+0x52de03>
ac8e: 05f00693 li a3,95
greater_equal_modulus():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:45
if (a->data[i] != key->n.data[i]) {
ac92: 00c90733 add a4,s2,a2
ac96: 4318 lw a4,0(a4)
ac98: 00ca87b3 add a5,s5,a2
ac9c: 439c lw a5,0(a5)
ac9e: 00f71763 bne a4,a5,acac <sigverify_mod_exp_ibex+0x52>
aca2: 16fd addi a3,a3,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:44
for (size_t i = ARRAYSIZE(a->data) - 1; i < ARRAYSIZE(a->data); --i) {
aca4: 1671 addi a2,a2,-4
aca6: fed5f6e3 bgeu a1,a3,ac92 <sigverify_mod_exp_ibex+0x38>
acaa: aa75 j ae66 <sigverify_mod_exp_ibex+0x20c>
sigverify_mod_exp_ibex():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:171
// Reject the signature if it is too large (n <= sig): RFC 8017, section
// 5.2.2, step 1.
if (greater_equal_modulus(key, sig)) {
acac: 00e7f763 bgeu a5,a4,acba <sigverify_mod_exp_ibex+0x60>
acb0: 04535537 lui a0,0x4535
acb4: 60350513 addi a0,a0,1539 # 4535603 <_epmp_stack_guard_na4+0x52de03>
acb8: a27d j ae66 <sigverify_mod_exp_ibex+0x20c>
calc_r_square():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:141
memset(buf.data, 0, sizeof(result->data));
acba: 0048 addi a0,sp,4
acbc: 17c00613 li a2,380
acc0: 4581 li a1,0
acc2: db7fd0ef jal ra,8a78 <memset>
subtract_modulus():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:28
borrow = (a->data[i] < borrow) + (temp < key->n.data[i]);
acc6: 000aa583 lw a1,0(s5)
acca: 4401 li s0,0
accc: 4781 li a5,0
acce: 4701 li a4,0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:29
a->data[i] = temp - key->n.data[i];
acd0: 40b00533 neg a0,a1
acd4: c02a sw a0,0(sp)
acd6: 4611 li a2,4
acd8: 850a mv a0,sp
acda: 18000813 li a6,384
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:28
borrow = (a->data[i] < borrow) + (temp < key->n.data[i]);
acde: 00b43433 sltu s0,s0,a1
ace2: 00f737b3 sltu a5,a4,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:25
uint32_t temp = a->data[i] - borrow;
ace6: 00c506b3 add a3,a0,a2
acea: 4298 lw a4,0(a3)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:28
borrow = (a->data[i] < borrow) + (temp < key->n.data[i]);
acec: 00ca85b3 add a1,s5,a2
acf0: 418c lw a1,0(a1)
acf2: 97a2 add a5,a5,s0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:25
uint32_t temp = a->data[i] - borrow;
acf4: 40f70433 sub s0,a4,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:29
a->data[i] = temp - key->n.data[i];
acf8: 40b408b3 sub a7,s0,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:24
for (size_t i = 0; i < ARRAYSIZE(a->data); ++i) {
acfc: 0611 addi a2,a2,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:29
a->data[i] = temp - key->n.data[i];
acfe: 0116a023 sw a7,0(a3)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:24
for (size_t i = 0; i < ARRAYSIZE(a->data); ++i) {
ad02: fd061ee3 bne a2,a6,acde <sigverify_mod_exp_ibex+0x84>
ad06: 4881 li a7,0
ad08: e8400293 li t0,-380
ad0c: 05f00313 li t1,95
ad10: 06000813 li a6,96
ad14: 18000793 li a5,384
shift_left():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:62
const uint32_t msb = a->data[ARRAYSIZE(a->data) - 1] >> 31;
ad18: 17c12383 lw t2,380(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:64
a->data[i] = (a->data[i] << 1) | (a->data[i - 1] >> 31);
ad1c: 4701 li a4,0
ad1e: 859e mv a1,t2
ad20: 00e50633 add a2,a0,a4
ad24: 00159693 slli a3,a1,0x1
ad28: 17862583 lw a1,376(a2)
ad2c: 01f5d413 srli s0,a1,0x1f
ad30: 8ec1 or a3,a3,s0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:63
for (size_t i = ARRAYSIZE(a->data) - 1; i > 0; --i) {
ad32: 1771 addi a4,a4,-4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:64
a->data[i] = (a->data[i] << 1) | (a->data[i - 1] >> 31);
ad34: 16d62e23 sw a3,380(a2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:63
for (size_t i = ARRAYSIZE(a->data) - 1; i > 0; --i) {
ad38: fe5714e3 bne a4,t0,ad20 <sigverify_mod_exp_ibex+0xc6>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:66
a->data[0] <<= 1;
ad3c: 4582 lw a1,0(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:62
const uint32_t msb = a->data[ARRAYSIZE(a->data) - 1] >> 31;
ad3e: 01f3d393 srli t2,t2,0x1f
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:66
a->data[0] <<= 1;
ad42: 0586 slli a1,a1,0x1
ad44: c02e sw a1,0(sp)
calc_r_square():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:153
while (msb > 0 || greater_equal_modulus(key, &buf)) {
ad46: 02039563 bnez t2,ad70 <sigverify_mod_exp_ibex+0x116>
ad4a: 05f00713 li a4,95
ad4e: 17c00593 li a1,380
greater_equal_modulus():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:45
if (a->data[i] != key->n.data[i]) {
ad52: 00b50633 add a2,a0,a1
ad56: 4210 lw a2,0(a2)
ad58: 00ba86b3 add a3,s5,a1
ad5c: 4294 lw a3,0(a3)
ad5e: 00d61763 bne a2,a3,ad6c <sigverify_mod_exp_ibex+0x112>
ad62: 177d addi a4,a4,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:44
for (size_t i = ARRAYSIZE(a->data) - 1; i < ARRAYSIZE(a->data); --i) {
ad64: 15f1 addi a1,a1,-4
ad66: fee376e3 bgeu t1,a4,ad52 <sigverify_mod_exp_ibex+0xf8>
ad6a: a019 j ad70 <sigverify_mod_exp_ibex+0x116>
calc_r_square():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:153
while (msb > 0 || greater_equal_modulus(key, &buf)) {
ad6c: 02c6fc63 bgeu a3,a2,ada4 <sigverify_mod_exp_ibex+0x14a>
ad70: 4581 li a1,0
ad72: 4701 li a4,0
subtract_modulus():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:25
uint32_t temp = a->data[i] - borrow;
ad74: 00b50633 add a2,a0,a1
ad78: 4214 lw a3,0(a2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:28
borrow = (a->data[i] < borrow) + (temp < key->n.data[i]);
ad7a: 00ba8433 add s0,s5,a1
ad7e: 4000 lw s0,0(s0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:25
uint32_t temp = a->data[i] - borrow;
ad80: 40e684b3 sub s1,a3,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:28
borrow = (a->data[i] < borrow) + (temp < key->n.data[i]);
ad84: 00e6b6b3 sltu a3,a3,a4
ad88: 0084b733 sltu a4,s1,s0
ad8c: 9736 add a4,a4,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:29
a->data[i] = temp - key->n.data[i];
ad8e: 408486b3 sub a3,s1,s0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:24
for (size_t i = 0; i < ARRAYSIZE(a->data); ++i) {
ad92: 0591 addi a1,a1,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:29
a->data[i] = temp - key->n.data[i];
ad94: c214 sw a3,0(a2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:24
for (size_t i = 0; i < ARRAYSIZE(a->data); ++i) {
ad96: fcf59fe3 bne a1,a5,ad74 <sigverify_mod_exp_ibex+0x11a>
calc_r_square():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:154
msb -= subtract_modulus(key, &buf);
ad9a: 40e383b3 sub t2,t2,a4
ad9e: fc0399e3 bnez t2,ad70 <sigverify_mod_exp_ibex+0x116>
ada2: b765 j ad4a <sigverify_mod_exp_ibex+0xf0>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:149
for (size_t i = 0; i < 96; ++i) {
ada4: 0885 addi a7,a7,1
ada6: f70899e3 bne a7,a6,ad18 <sigverify_mod_exp_ibex+0xbe>
adaa: 8a0a mv s4,sp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:159
mont_mul(key, &buf, &buf, result);
adac: 8556 mv a0,s5
adae: 85d2 mv a1,s4
adb0: 8652 mv a2,s4
adb2: 86ce mv a3,s3
adb4: 28c9 jal ae86 <mont_mul>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:161
mont_mul(key, result, result, &buf);
adb6: 8556 mv a0,s5
adb8: 85ce mv a1,s3
adba: 864e mv a2,s3
adbc: 86d2 mv a3,s4
adbe: 20e1 jal ae86 <mont_mul>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:162
mont_mul(key, &buf, &buf, result);
adc0: 8556 mv a0,s5
adc2: 85d2 mv a1,s4
adc4: 8652 mv a2,s4
adc6: 86ce mv a3,s3
adc8: 287d jal ae86 <mont_mul>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:161
mont_mul(key, result, result, &buf);
adca: 8556 mv a0,s5
adcc: 85ce mv a1,s3
adce: 864e mv a2,s3
add0: 86d2 mv a3,s4
add2: 2855 jal ae86 <mont_mul>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:162
mont_mul(key, &buf, &buf, result);
add4: 8556 mv a0,s5
add6: 85d2 mv a1,s4
add8: 8652 mv a2,s4
adda: 86ce mv a3,s3
addc: 206d jal ae86 <mont_mul>
adde: 868a mv a3,sp
sigverify_mod_exp_ibex():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:180
sigverify_rsa_buffer_t buf;
// result = R^2 mod n
calc_r_square(key, result);
// buf = sig * R mod n
mont_mul(key, sig, result, &buf);
ade0: 8556 mv a0,s5
ade2: 85ca mv a1,s2
ade4: 864e mv a2,s3
ade6: 2045 jal ae86 <mont_mul>
ade8: 4421 li s0,8
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:183
for (size_t i = 0; i < 8; ++i) {
// result = sig^{2*4^i} * R mod n (sig's exponent: 2, 8, 32, ..., 32768)
mont_mul(key, &buf, &buf, result);
adea: 8556 mv a0,s5
adec: 85d2 mv a1,s4
adee: 8652 mv a2,s4
adf0: 86ce mv a3,s3
adf2: 2851 jal ae86 <mont_mul>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:185
// buf = sig^{4^{i+1}} * R mod n (sig's exponent: 4, 16, 64, ..., 65536)
mont_mul(key, result, result, &buf);
adf4: 8556 mv a0,s5
adf6: 85ce mv a1,s3
adf8: 864e mv a2,s3
adfa: 86d2 mv a3,s4
adfc: 2069 jal ae86 <mont_mul>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:181
for (size_t i = 0; i < 8; ++i) {
adfe: 147d addi s0,s0,-1
ae00: f46d bnez s0,adea <sigverify_mod_exp_ibex+0x190>
ae02: 858a mv a1,sp
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:188
}
// result = sig^65537 mod n
mont_mul(key, &buf, sig, result);
ae04: 8556 mv a0,s5
ae06: 864a mv a2,s2
ae08: 86ce mv a3,s3
ae0a: 28b5 jal ae86 <mont_mul>
greater_equal_modulus():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:44
for (size_t i = ARRAYSIZE(a->data) - 1; i < ARRAYSIZE(a->data); --i) {
ae0c: 17ca8513 addi a0,s5,380
ae10: 17c98593 addi a1,s3,380
ae14: 05f00613 li a2,95
ae18: 05f00693 li a3,95
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:45
if (a->data[i] != key->n.data[i]) {
ae1c: 4198 lw a4,0(a1)
ae1e: 411c lw a5,0(a0)
ae20: 00f71863 bne a4,a5,ae30 <sigverify_mod_exp_ibex+0x1d6>
ae24: 16fd addi a3,a3,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:44
for (size_t i = ARRAYSIZE(a->data) - 1; i < ARRAYSIZE(a->data); --i) {
ae26: 1571 addi a0,a0,-4
ae28: 15f1 addi a1,a1,-4
ae2a: fed679e3 bgeu a2,a3,ae1c <sigverify_mod_exp_ibex+0x1c2>
ae2e: a019 j ae34 <sigverify_mod_exp_ibex+0x1da>
sigverify_mod_exp_ibex():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:193
// We need this check because the result of `mont_mul` is not guaranteed to be
// the least non-negative residue. We need to subtract the modulus n from
// `result` at most once because R/2 < n < R.
if (greater_equal_modulus(key, result)) {
ae30: 02e7f963 bgeu a5,a4,ae62 <sigverify_mod_exp_ibex+0x208>
ae34: 4501 li a0,0
ae36: 4601 li a2,0
ae38: 18000593 li a1,384
subtract_modulus():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:25
uint32_t temp = a->data[i] - borrow;
ae3c: 00a986b3 add a3,s3,a0
ae40: 4298 lw a4,0(a3)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:28
borrow = (a->data[i] < borrow) + (temp < key->n.data[i]);
ae42: 00aa87b3 add a5,s5,a0
ae46: 439c lw a5,0(a5)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:25
uint32_t temp = a->data[i] - borrow;
ae48: 40c704b3 sub s1,a4,a2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:28
borrow = (a->data[i] < borrow) + (temp < key->n.data[i]);
ae4c: 00c73633 sltu a2,a4,a2
ae50: 00f4b733 sltu a4,s1,a5
ae54: 963a add a2,a2,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:29
a->data[i] = temp - key->n.data[i];
ae56: 40f48733 sub a4,s1,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:24
for (size_t i = 0; i < ARRAYSIZE(a->data); ++i) {
ae5a: 0511 addi a0,a0,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:29
a->data[i] = temp - key->n.data[i];
ae5c: c298 sw a4,0(a3)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:24
for (size_t i = 0; i < ARRAYSIZE(a->data); ++i) {
ae5e: fcb51fe3 bne a0,a1,ae3c <sigverify_mod_exp_ibex+0x1e2>
ae62: 73900513 li a0,1849
sigverify_mod_exp_ibex():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:198
subtract_modulus(key, result);
}
return kErrorOk;
}
ae66: 18412a83 lw s5,388(sp)
ae6a: 18812a03 lw s4,392(sp)
ae6e: 18c12983 lw s3,396(sp)
ae72: 19012903 lw s2,400(sp)
ae76: 19412483 lw s1,404(sp)
ae7a: 19812403 lw s0,408(sp)
ae7e: 19c12083 lw ra,412(sp)
ae82: 611d addi sp,sp,416
ae84: 8082 ret
0000ae86 <mont_mul>:
mont_mul():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:89
sigverify_rsa_buffer_t *result) {
ae86: 7179 addi sp,sp,-48
ae88: d606 sw ra,44(sp)
ae8a: d422 sw s0,40(sp)
ae8c: d226 sw s1,36(sp)
ae8e: d04a sw s2,32(sp)
ae90: ce4e sw s3,28(sp)
ae92: cc52 sw s4,24(sp)
ae94: ca56 sw s5,20(sp)
ae96: c85a sw s6,16(sp)
ae98: c65e sw s7,12(sp)
ae9a: 8bb6 mv s7,a3
ae9c: 89b2 mv s3,a2
ae9e: 892e mv s2,a1
aea0: 8b2a mv s6,a0
aea2: 5a7d li s4,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:90
memset(result->data, 0, sizeof(result->data));
aea4: 18000613 li a2,384
aea8: 18000a93 li s5,384
aeac: 8536 mv a0,a3
aeae: 4581 li a1,0
aeb0: bc9fd0ef jal ra,8a78 <memset>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:103
uint64_t acc0 = (uint64_t)x->data[i] * y->data[0] + result->data[0];
aeb4: 4381 li t2,0
aeb6: 4881 li a7,0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:92
for (size_t i = 0; i < ARRAYSIZE(x->data); ++i) {
aeb8: 00498313 addi t1,s3,4
aebc: 004b0e93 addi t4,s6,4
aec0: 17800293 li t0,376
aec4: 06000813 li a6,96
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:103
uint64_t acc0 = (uint64_t)x->data[i] * y->data[0] + result->data[0];
aec8: 00289593 slli a1,a7,0x2
aecc: 00b90f33 add t5,s2,a1
aed0: 000f2683 lw a3,0(t5)
aed4: 0009a583 lw a1,0(s3)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:110
acc0 = (uint64_t)x->data[i] * y->data[j] + result->data[j] + (acc0 >> 32);
aed8: 4701 li a4,0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:103
uint64_t acc0 = (uint64_t)x->data[i] * y->data[0] + result->data[0];
aeda: 02d5b4b3 mulhu s1,a1,a3
aede: 02d58533 mul a0,a1,a3
aee2: 007505b3 add a1,a0,t2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:104
const uint32_t u_i = (uint32_t)acc0 * key->n0_inv[0];
aee6: 180b2383 lw t2,384(s6)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:106
uint64_t acc1 = (uint64_t)u_i * key->n.data[0] + (uint32_t)acc0;
aeea: 000b2e03 lw t3,0(s6)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:103
uint64_t acc0 = (uint64_t)x->data[i] * y->data[0] + result->data[0];
aeee: 00a5b533 sltu a0,a1,a0
aef2: 94aa add s1,s1,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:104
const uint32_t u_i = (uint32_t)acc0 * key->n0_inv[0];
aef4: 02b38fb3 mul t6,t2,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:106
uint64_t acc1 = (uint64_t)u_i * key->n.data[0] + (uint32_t)acc0;
aef8: 03cf83b3 mul t2,t6,t3
aefc: 0145f5b3 and a1,a1,s4
af00: 959e add a1,a1,t2
af02: 0075b3b3 sltu t2,a1,t2
af06: 03cfb5b3 mulhu a1,t6,t3
af0a: 959e add a1,a1,t2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:110
acc0 = (uint64_t)x->data[i] * y->data[j] + result->data[j] + (acc0 >> 32);
af0c: 00e30633 add a2,t1,a4
af10: 4210 lw a2,0(a2)
af12: 00eb8433 add s0,s7,a4
af16: 405c lw a5,4(s0)
af18: 02d63533 mulhu a0,a2,a3
af1c: 02d60633 mul a2,a2,a3
af20: 00f486b3 add a3,s1,a5
af24: 0096b7b3 sltu a5,a3,s1
af28: 953e add a0,a0,a5
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:111
acc1 = (uint64_t)u_i * key->n.data[j] + (uint32_t)acc0 + (acc1 >> 32);
af2a: 00ee87b3 add a5,t4,a4
af2e: 439c lw a5,0(a5)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:110
acc0 = (uint64_t)x->data[i] * y->data[j] + result->data[j] + (acc0 >> 32);
af30: 9636 add a2,a2,a3
af32: 00d636b3 sltu a3,a2,a3
af36: 00d504b3 add s1,a0,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:111
acc1 = (uint64_t)u_i * key->n.data[j] + (uint32_t)acc0 + (acc1 >> 32);
af3a: 03f7b533 mulhu a0,a5,t6
af3e: 03f786b3 mul a3,a5,t6
af42: 01467633 and a2,a2,s4
af46: 95b6 add a1,a1,a3
af48: 00d5b6b3 sltu a3,a1,a3
af4c: 9536 add a0,a0,a3
af4e: 962e add a2,a2,a1
af50: 00b635b3 sltu a1,a2,a1
af54: 95aa add a1,a1,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:112
result->data[j - 1] = (uint32_t)acc1;
af56: c010 sw a2,0(s0)
af58: 00570663 beq a4,t0,af64 <mont_mul+0xde>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:110
acc0 = (uint64_t)x->data[i] * y->data[j] + result->data[j] + (acc0 >> 32);
af5c: 000f2683 lw a3,0(t5)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:109
for (size_t j = 1; j < ARRAYSIZE(result->data); ++j) {
af60: 0711 addi a4,a4,4
af62: b76d j af0c <mont_mul+0x86>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:114
acc0 = (acc0 >> 32) + (acc1 >> 32);
af64: 00958533 add a0,a1,s1
af68: 00b535b3 sltu a1,a0,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:126
if (acc0 >> 32) {
af6c: 001a0693 addi a3,s4,1
af70: 0146b733 sltu a4,a3,s4
af74: 8df9 and a1,a1,a4
af76: 8ee9 and a3,a3,a0
af78: 8dd5 or a1,a1,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:115
result->data[ARRAYSIZE(result->data) - 1] = (uint32_t)acc0;
af7a: 16abae23 sw a0,380(s7)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:126
if (acc0 >> 32) {
af7e: c595 beqz a1,afaa <mont_mul+0x124>
af80: 4501 li a0,0
af82: 4581 li a1,0
subtract_modulus():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:25
uint32_t temp = a->data[i] - borrow;
af84: 00ab8633 add a2,s7,a0
af88: 4214 lw a3,0(a2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:28
borrow = (a->data[i] < borrow) + (temp < key->n.data[i]);
af8a: 00ab0733 add a4,s6,a0
af8e: 4318 lw a4,0(a4)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:25
uint32_t temp = a->data[i] - borrow;
af90: 40b687b3 sub a5,a3,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:28
borrow = (a->data[i] < borrow) + (temp < key->n.data[i]);
af94: 00b6b5b3 sltu a1,a3,a1
af98: 00e7b6b3 sltu a3,a5,a4
af9c: 95b6 add a1,a1,a3
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:29
a->data[i] = temp - key->n.data[i];
af9e: 40e786b3 sub a3,a5,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:24
for (size_t i = 0; i < ARRAYSIZE(a->data); ++i) {
afa2: 0511 addi a0,a0,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:29
a->data[i] = temp - key->n.data[i];
afa4: c214 sw a3,0(a2)
afa6: fd551fe3 bne a0,s5,af84 <mont_mul+0xfe>
mont_mul():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:92
for (size_t i = 0; i < ARRAYSIZE(x->data); ++i) {
afaa: 0885 addi a7,a7,1
afac: 01088563 beq a7,a6,afb6 <mont_mul+0x130>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:103
uint64_t acc0 = (uint64_t)x->data[i] * y->data[0] + result->data[0];
afb0: 000ba383 lw t2,0(s7)
afb4: bf11 j aec8 <mont_mul+0x42>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_ibex.c:130
}
afb6: 4bb2 lw s7,12(sp)
afb8: 4b42 lw s6,16(sp)
afba: 4ad2 lw s5,20(sp)
afbc: 4a62 lw s4,24(sp)
afbe: 49f2 lw s3,28(sp)
afc0: 5902 lw s2,32(sp)
afc2: 5492 lw s1,36(sp)
afc4: 5422 lw s0,40(sp)
afc6: 50b2 lw ra,44(sp)
afc8: 6145 addi sp,sp,48
afca: 8082 ret
0000afcc <run_otbn_rsa_3072_modexp>:
run_otbn_rsa_3072_modexp():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_otbn.c:68
}
rom_error_t run_otbn_rsa_3072_modexp(
const sigverify_rsa_key_t *public_key,
const sigverify_rsa_buffer_t *signature,
sigverify_rsa_buffer_t *recovered_message) {
afcc: 7139 addi sp,sp,-64
afce: de06 sw ra,60(sp)
afd0: dc22 sw s0,56(sp)
afd2: da26 sw s1,52(sp)
afd4: d84a sw s2,48(sp)
afd6: d64e sw s3,44(sp)
afd8: 8932 mv s2,a2
afda: 89ae mv s3,a1
afdc: 84aa mv s1,a0
afde: 0800 addi s0,sp,16
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_otbn.c:72
otbn_t otbn;
// Initialize OTBN and load the RSA app.
otbn_init(&otbn);
afe0: 8522 mv a0,s0
afe2: 28d9 jal b0b8 <otbn_init>
afe4: 00001517 auipc a0,0x1
afe8: cf850513 addi a0,a0,-776 # bcdc <kOtbnAppRsa>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_otbn.c:73
RETURN_IF_ERROR(otbn_load_app(&otbn, kOtbnAppRsa));
afec: 454c lw a1,12(a0)
afee: 4510 lw a2,8(a0)
aff0: 4154 lw a3,4(a0)
aff2: 4108 lw a0,0(a0)
aff4: c62e sw a1,12(sp)
aff6: c432 sw a2,8(sp)
aff8: c236 sw a3,4(sp)
affa: c02a sw a0,0(sp)
affc: 858a mv a1,sp
affe: 8522 mv a0,s0
b000: 28dd jal b0f6 <otbn_load_app>
b002: 73900413 li s0,1849
b006: 06851063 bne a0,s0,b066 <run_otbn_rsa_3072_modexp+0x9a>
write_rsa_3072_int_to_otbn():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_otbn.c:48
return otbn_copy_data_to_otbn(otbn, kSigVerifyRsaNumWords, src->data, dst);
b00a: 00000693 li a3,0
b00e: 0808 addi a0,sp,16
b010: 06000593 li a1,96
b014: 8626 mv a2,s1
b016: 2271 jal b1a2 <otbn_copy_data_to_otbn>
b018: 04851763 bne a0,s0,b066 <run_otbn_rsa_3072_modexp+0x9a>
b01c: 32000693 li a3,800
b020: 0808 addi a0,sp,16
b022: 06000593 li a1,96
b026: 864e mv a2,s3
b028: 2aad jal b1a2 <otbn_copy_data_to_otbn>
b02a: 73900413 li s0,1849
b02e: 02851c63 bne a0,s0,b066 <run_otbn_rsa_3072_modexp+0x9a>
run_otbn_rsa_3072_modexp():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_otbn.c:84
// Set the signature.
RETURN_IF_ERROR(
write_rsa_3072_int_to_otbn(&otbn, signature, kOtbnVarRsaInBuf));
// Set the precomputed constant m0_inv.
RETURN_IF_ERROR(otbn_copy_data_to_otbn(&otbn, kOtbnWideWordNumWords,
b032: 18048613 addi a2,s1,384
b036: 18000693 li a3,384
b03a: 0808 addi a0,sp,16
b03c: 45a1 li a1,8
b03e: 2295 jal b1a2 <otbn_copy_data_to_otbn>
b040: 02851363 bne a0,s0,b066 <run_otbn_rsa_3072_modexp+0x9a>
b044: 0808 addi a0,sp,16
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_otbn.c:88
public_key->n0_inv, kOtbnVarRsaM0Inv));
// Start the OTBN routine.
RETURN_IF_ERROR(otbn_execute_app(&otbn));
b046: 2a35 jal b182 <otbn_execute_app>
b048: 73900413 li s0,1849
b04c: 00851d63 bne a0,s0,b066 <run_otbn_rsa_3072_modexp+0x9a>
b050: 0808 addi a0,sp,16
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_otbn.c:91
// Spin here waiting for OTBN to complete.
RETURN_IF_ERROR(otbn_busy_wait_for_done(&otbn));
b052: 28a5 jal b0ca <otbn_busy_wait_for_done>
b054: 00851963 bne a0,s0,b066 <run_otbn_rsa_3072_modexp+0x9a>
read_rsa_3072_int_from_otbn():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_otbn.c:62
return otbn_copy_data_from_otbn(otbn, kSigVerifyRsaNumWords, src, dst->data);
b058: 4a000613 li a2,1184
b05c: 0808 addi a0,sp,16
b05e: 06000593 li a1,96
b062: 86ca mv a3,s2
b064: 22a1 jal b1ac <otbn_copy_data_from_otbn>
run_otbn_rsa_3072_modexp():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_otbn.c:98
// Read recovered message out of OTBN dmem.
RETURN_IF_ERROR(
read_rsa_3072_int_from_otbn(&otbn, kOtbnVarRsaOutBuf, recovered_message));
return kErrorOk;
}
b066: 59b2 lw s3,44(sp)
b068: 5942 lw s2,48(sp)
b06a: 54d2 lw s1,52(sp)
b06c: 5462 lw s0,56(sp)
b06e: 50f2 lw ra,60(sp)
b070: 6121 addi sp,sp,64
b072: 8082 ret
0000b074 <sigverify_mod_exp_otbn>:
sigverify_mod_exp_otbn():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_otbn.c:102
rom_error_t sigverify_mod_exp_otbn(const sigverify_rsa_key_t *key,
const sigverify_rsa_buffer_t *sig,
sigverify_rsa_buffer_t *result) {
b074: 1141 addi sp,sp,-16
b076: c606 sw ra,12(sp)
b078: c422 sw s0,8(sp)
b07a: c226 sw s1,4(sp)
b07c: c04a sw s2,0(sp)
b07e: 8932 mv s2,a2
b080: 84ae mv s1,a1
b082: 842a mv s0,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_otbn.c:105
// Reject the signature if it is too large (n <= sig): RFC 8017, section
// 5.2.2, step 1.
if (memrcmp(key->n.data, sig->data, kSigVerifyRsaNumBytes) <= 0) {
b084: 18000613 li a2,384
b088: a2bfd0ef jal ra,8ab2 <memrcmp>
b08c: 4585 li a1,1
b08e: 00b54b63 blt a0,a1,b0a4 <sigverify_mod_exp_otbn+0x30>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_otbn.c:110
return kErrorSigverifyBadSignature;
}
// Run OTBN application.
RETURN_IF_ERROR(run_otbn_rsa_3072_modexp(key, sig, result));
b092: 8522 mv a0,s0
b094: 85a6 mv a1,s1
b096: 864a mv a2,s2
b098: 4902 lw s2,0(sp)
b09a: 4492 lw s1,4(sp)
b09c: 4422 lw s0,8(sp)
b09e: 40b2 lw ra,12(sp)
b0a0: 0141 addi sp,sp,16
b0a2: b72d j afcc <run_otbn_rsa_3072_modexp>
b0a4: 04535537 lui a0,0x4535
b0a8: 60350513 addi a0,a0,1539 # 4535603 <_epmp_stack_guard_na4+0x52de03>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/sigverify_mod_exp_otbn.c:113
return kErrorOk;
}
b0ac: 4902 lw s2,0(sp)
b0ae: 4492 lw s1,4(sp)
b0b0: 4422 lw s0,8(sp)
b0b2: 40b2 lw ra,12(sp)
b0b4: 0141 addi sp,sp,16
b0b6: 8082 ret
0000b0b8 <otbn_init>:
otbn_init():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:17
#include "sw/device/lib/base/bitfield.h"
#include "sw/device/silicon_creator/lib/drivers/otbn.h"
#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
void otbn_init(otbn_t *ctx) {
b0b8: 1141 addi sp,sp,-16
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:18
*ctx = (otbn_t){
b0ba: c606 sw ra,12(sp)
b0bc: 4661 li a2,24
b0be: 4581 li a1,0
b0c0: 9b9fd0ef jal ra,8a78 <memset>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:23
.app = {0},
.app_is_loaded = false,
.error_bits = kOtbnErrBitsNoError,
};
}
b0c4: 40b2 lw ra,12(sp)
b0c6: 0141 addi sp,sp,16
b0c8: 8082 ret
0000b0ca <otbn_busy_wait_for_done>:
otbn_busy_wait_for_done():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:25
rom_error_t otbn_busy_wait_for_done(otbn_t *ctx) {
b0ca: 1141 addi sp,sp,-16
b0cc: c606 sw ra,12(sp)
b0ce: c422 sw s0,8(sp)
b0d0: 842a mv s0,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:26
while (otbn_is_busy()) {
b0d2: 20fd jal b1c0 <otbn_is_busy>
b0d4: fd7d bnez a0,b0d2 <otbn_busy_wait_for_done+0x8>
b0d6: 0048 addi a0,sp,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:30
}
otbn_err_bits_t err_bits;
otbn_get_err_bits(&err_bits);
b0d8: 28fd jal b1d6 <otbn_get_err_bits>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:31
if (err_bits != kOtbnErrBitsNoError) {
b0da: 4512 lw a0,4(sp)
b0dc: c519 beqz a0,b0ea <otbn_busy_wait_for_done+0x20>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:32
ctx->error_bits = err_bits;
b0de: c848 sw a0,20(s0)
b0e0: 03425537 lui a0,0x3425
b0e4: e0d50513 addi a0,a0,-499 # 3424e0d <_chip_info_end+0x3414e0d>
b0e8: a019 j b0ee <otbn_busy_wait_for_done+0x24>
b0ea: 73900513 li a0,1849
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:36
return kErrorOtbnExecutionFailed;
}
return kErrorOk;
}
b0ee: 4422 lw s0,8(sp)
b0f0: 40b2 lw ra,12(sp)
b0f2: 0141 addi sp,sp,16
b0f4: 8082 ret
0000b0f6 <otbn_load_app>:
otbn_load_app():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:61
return false;
}
return true;
}
rom_error_t otbn_load_app(otbn_t *ctx, const otbn_app_t app) {
b0f6: 1101 addi sp,sp,-32
b0f8: ce06 sw ra,28(sp)
b0fa: cc22 sw s0,24(sp)
b0fc: ca26 sw s1,20(sp)
b0fe: c84a sw s2,16(sp)
b100: c64e sw s3,12(sp)
b102: 842e mv s0,a1
check_app_address_ranges():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:51
if (app->imem_end <= app->imem_start) {
b104: 41d0 lw a2,4(a1)
b106: 418c lw a1,0(a1)
b108: 892a mv s2,a0
b10a: 01425537 lui a0,0x1425
b10e: e0350513 addi a0,a0,-509 # 1424e03 <_chip_info_end+0x1414e03>
b112: 06c5f163 bgeu a1,a2,b174 <otbn_load_app+0x7e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:55
if (app->dmem_data_end < app->dmem_data_start) {
b116: 00c42983 lw s3,12(s0)
b11a: 4404 lw s1,8(s0)
otbn_load_app():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:62
if (!check_app_address_ranges(&app)) {
b11c: 0499ec63 bltu s3,s1,b174 <otbn_load_app+0x7e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:66
return kErrorOtbnInvalidArgument;
}
const size_t imem_num_words = app.imem_end - app.imem_start;
b120: 40b60533 sub a0,a2,a1
b124: 40255613 srai a2,a0,0x2
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:69
const size_t data_num_words = app.dmem_data_end - app.dmem_data_start;
ctx->app_is_loaded = false;
b128: 00090823 sb zero,16(s2)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:71
RETURN_IF_ERROR(otbn_imem_write(0, app.imem_start, imem_num_words));
b12c: 4501 li a0,0
b12e: 284d jal b1e0 <otbn_imem_write>
b130: 73900593 li a1,1849
b134: 04b51063 bne a0,a1,b174 <otbn_load_app+0x7e>
b138: 409984b3 sub s1,s3,s1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:73
otbn_zero_dmem();
b13c: 22b9 jal b28a <otbn_zero_dmem>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:74
if (data_num_words > 0) {
b13e: c891 beqz s1,b152 <otbn_load_app+0x5c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:75
RETURN_IF_ERROR(otbn_dmem_write(0, app.dmem_data_start, data_num_words));
b140: 440c lw a1,8(s0)
b142: 4024d613 srai a2,s1,0x2
b146: 4501 li a0,0
b148: 20f9 jal b216 <otbn_dmem_write>
b14a: 73900593 li a1,1849
b14e: 02b51363 bne a0,a1,b174 <otbn_load_app+0x7e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:78
}
ctx->app = app;
b152: 4448 lw a0,12(s0)
b154: 00a92623 sw a0,12(s2)
b158: 4408 lw a0,8(s0)
b15a: 00a92423 sw a0,8(s2)
b15e: 4048 lw a0,4(s0)
b160: 00a92223 sw a0,4(s2)
b164: 4008 lw a0,0(s0)
b166: 00a92023 sw a0,0(s2)
b16a: 4505 li a0,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:79
ctx->app_is_loaded = true;
b16c: 00a90823 sb a0,16(s2)
b170: 73900513 li a0,1849
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:81
return kErrorOk;
}
b174: 49b2 lw s3,12(sp)
b176: 4942 lw s2,16(sp)
b178: 44d2 lw s1,20(sp)
b17a: 4462 lw s0,24(sp)
b17c: 40f2 lw ra,28(sp)
b17e: 6105 addi sp,sp,32
b180: 8082 ret
0000b182 <otbn_execute_app>:
otbn_execute_app():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:83
rom_error_t otbn_execute_app(otbn_t *ctx) {
b182: 1141 addi sp,sp,-16
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:84
if (!ctx->app_is_loaded) {
b184: c606 sw ra,12(sp)
b186: 01054503 lbu a0,16(a0)
b18a: c509 beqz a0,b194 <otbn_execute_app+0x12>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:88
return kErrorOtbnInvalidArgument;
}
otbn_execute();
b18c: 2025 jal b1b4 <otbn_execute>
b18e: 73900513 li a0,1849
b192: a029 j b19c <otbn_execute_app+0x1a>
b194: 01425537 lui a0,0x1425
b198: e0350513 addi a0,a0,-509 # 1424e03 <_chip_info_end+0x1414e03>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:90
return kErrorOk;
}
b19c: 40b2 lw ra,12(sp)
b19e: 0141 addi sp,sp,16
b1a0: 8082 ret
0000b1a2 <otbn_copy_data_to_otbn>:
otbn_copy_data_to_otbn():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:93
rom_error_t otbn_copy_data_to_otbn(otbn_t *ctx, size_t len, const uint32_t *src,
otbn_addr_t dest) {
b1a2: 8536 mv a0,a3
b1a4: 86ae mv a3,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:94
RETURN_IF_ERROR(otbn_dmem_write(dest, src, len));
b1a6: 85b2 mv a1,a2
b1a8: 8636 mv a2,a3
b1aa: a0b5 j b216 <otbn_dmem_write>
0000b1ac <otbn_copy_data_from_otbn>:
otbn_copy_data_from_otbn():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:100
return kErrorOk;
}
rom_error_t otbn_copy_data_from_otbn(otbn_t *ctx, size_t len_bytes,
otbn_addr_t src, uint32_t *dest) {
b1ac: 8532 mv a0,a2
b1ae: 862e mv a2,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/otbn_util.c:101
RETURN_IF_ERROR(otbn_dmem_read(src, dest, len_bytes));
b1b0: 85b6 mv a1,a3
b1b2: a879 j b250 <otbn_dmem_read>
0000b1b4 <otbn_execute>:
otbn_execute():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:60
return kErrorOtbnBadOffsetLen;
}
return kErrorOk;
}
void otbn_execute(void) {
b1b4: 41130537 lui a0,0x41130
b1b8: 0d800593 li a1,216
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
b1bc: c90c sw a1,16(a0)
otbn_execute():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:62
abs_mmio_write32(kBase + OTBN_CMD_REG_OFFSET, kOtbnCmdExecute);
}
b1be: 8082 ret
0000b1c0 <otbn_is_busy>:
otbn_is_busy():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:64
bool otbn_is_busy() {
b1c0: 41130537 lui a0,0x41130
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
b1c4: 4d08 lw a0,24(a0)
otbn_is_busy():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:66
uint32_t status = abs_mmio_read32(kBase + OTBN_STATUS_REG_OFFSET);
return status != kOtbnStatusIdle && status != kOtbnStatusLocked;
b1c6: 00a035b3 snez a1,a0
b1ca: f0150513 addi a0,a0,-255 # 4112ff01 <_stack_end+0x3110ff01>
b1ce: 00a03533 snez a0,a0
b1d2: 8d6d and a0,a0,a1
b1d4: 8082 ret
0000b1d6 <otbn_get_err_bits>:
otbn_get_err_bits():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:69
}
void otbn_get_err_bits(otbn_err_bits_t *err_bits) {
b1d6: 411305b7 lui a1,0x41130
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
b1da: 4dcc lw a1,28(a1)
otbn_get_err_bits():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:70
*err_bits = abs_mmio_read32(kBase + OTBN_ERR_BITS_REG_OFFSET);
b1dc: c10c sw a1,0(a0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:71
}
b1de: 8082 ret
0000b1e0 <otbn_imem_write>:
otbn_imem_write():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:74
rom_error_t otbn_imem_write(uint32_t offset_bytes, const uint32_t *src,
size_t num_words) {
b1e0: 86aa mv a3,a0
check_offset_len():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:52
if (offset_bytes + num_words * sizeof(uint32_t) <
b1e2: 00261793 slli a5,a2,0x2
b1e6: 00a78733 add a4,a5,a0
b1ea: 02425537 lui a0,0x2425
b1ee: e0350513 addi a0,a0,-509 # 2424e03 <_chip_info_end+0x2414e03>
b1f2: 02f76163 bltu a4,a5,b214 <otbn_imem_write+0x34>
b1f6: 6785 lui a5,0x1
b1f8: 00e7ee63 bltu a5,a4,b214 <otbn_imem_write+0x34>
b1fc: 73900513 li a0,1849
otbn_imem_write():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:78
RETURN_IF_ERROR(
check_offset_len(offset_bytes, num_words, kOtbnIMemSizeBytes));
for (size_t i = 0; i < num_words; ++i) {
b200: ca11 beqz a2,b214 <otbn_imem_write+0x34>
b202: 41134737 lui a4,0x41134
b206: 96ba add a3,a3,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:81
abs_mmio_write32(
kBase + OTBN_IMEM_REG_OFFSET + offset_bytes + i * sizeof(uint32_t),
src[i]);
b208: 4198 lw a4,0(a1)
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
b20a: c298 sw a4,0(a3)
otbn_imem_write():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:78
for (size_t i = 0; i < num_words; ++i) {
b20c: 0691 addi a3,a3,4
b20e: 167d addi a2,a2,-1
b210: 0591 addi a1,a1,4
b212: fa7d bnez a2,b208 <otbn_imem_write+0x28>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:85
}
return kErrorOk;
}
b214: 8082 ret
0000b216 <otbn_dmem_write>:
otbn_dmem_write():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:88
rom_error_t otbn_dmem_write(uint32_t offset_bytes, const uint32_t *src,
size_t num_words) {
b216: 86aa mv a3,a0
check_offset_len():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:52
if (offset_bytes + num_words * sizeof(uint32_t) <
b218: 00261793 slli a5,a2,0x2
b21c: 00a78733 add a4,a5,a0
b220: 02425537 lui a0,0x2425
b224: e0350513 addi a0,a0,-509 # 2424e03 <_chip_info_end+0x2414e03>
b228: 02f76363 bltu a4,a5,b24e <otbn_dmem_write+0x38>
b22c: 6785 lui a5,0x1
b22e: 80078793 addi a5,a5,-2048 # 800 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x1e0>
b232: 00e7ee63 bltu a5,a4,b24e <otbn_dmem_write+0x38>
b236: 73900513 li a0,1849
otbn_dmem_write():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:92
RETURN_IF_ERROR(
check_offset_len(offset_bytes, num_words, kOtbnDMemSizeBytes));
for (size_t i = 0; i < num_words; ++i) {
b23a: ca11 beqz a2,b24e <otbn_dmem_write+0x38>
b23c: 41138737 lui a4,0x41138
b240: 96ba add a3,a3,a4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:95
abs_mmio_write32(
kBase + OTBN_DMEM_REG_OFFSET + offset_bytes + i * sizeof(uint32_t),
src[i]);
b242: 4198 lw a4,0(a1)
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
b244: c298 sw a4,0(a3)
otbn_dmem_write():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:92
for (size_t i = 0; i < num_words; ++i) {
b246: 0691 addi a3,a3,4
b248: 167d addi a2,a2,-1
b24a: 0591 addi a1,a1,4
b24c: fa7d bnez a2,b242 <otbn_dmem_write+0x2c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:99
}
return kErrorOk;
}
b24e: 8082 ret
0000b250 <otbn_dmem_read>:
otbn_dmem_read():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:102
rom_error_t otbn_dmem_read(uint32_t offset_bytes, uint32_t *dest,
size_t num_words) {
b250: 86aa mv a3,a0
check_offset_len():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:52
if (offset_bytes + num_words * sizeof(uint32_t) <
b252: 00261793 slli a5,a2,0x2
b256: 00a78733 add a4,a5,a0
b25a: 02425537 lui a0,0x2425
b25e: e0350513 addi a0,a0,-509 # 2424e03 <_chip_info_end+0x2414e03>
b262: 02f76363 bltu a4,a5,b288 <otbn_dmem_read+0x38>
b266: 6785 lui a5,0x1
b268: 80078793 addi a5,a5,-2048 # 800 <_otbn_remote_app_run_rsa_verify_3072_rr_modexp__dmem_bss_end+0x1e0>
b26c: 00e7ee63 bltu a5,a4,b288 <otbn_dmem_read+0x38>
b270: 73900513 li a0,1849
otbn_dmem_read():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:106
RETURN_IF_ERROR(
check_offset_len(offset_bytes, num_words, kOtbnDMemSizeBytes));
for (size_t i = 0; i < num_words; ++i) {
b274: ca11 beqz a2,b288 <otbn_dmem_read+0x38>
b276: 41138737 lui a4,0x41138
b27a: 96ba add a3,a3,a4
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
b27c: 4298 lw a4,0(a3)
otbn_dmem_read():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:107
dest[i] = abs_mmio_read32(kBase + OTBN_DMEM_REG_OFFSET + offset_bytes +
b27e: c198 sw a4,0(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:106
for (size_t i = 0; i < num_words; ++i) {
b280: 0691 addi a3,a3,4
b282: 167d addi a2,a2,-1
b284: 0591 addi a1,a1,4
b286: fa7d bnez a2,b27c <otbn_dmem_read+0x2c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:112
i * sizeof(uint32_t));
}
return kErrorOk;
}
b288: 8082 ret
0000b28a <otbn_zero_dmem>:
otbn_zero_dmem():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:114
void otbn_zero_dmem(void) {
b28a: 5571 li a0,-4
b28c: 411385b7 lui a1,0x41138
b290: 0591 addi a1,a1,4
b292: 7fc00613 li a2,2044
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
b296: 00b506b3 add a3,a0,a1
otbn_zero_dmem():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:115
for (size_t i = 0; i < kOtbnDMemSizeBytes; i += sizeof(uint32_t)) {
b29a: 0511 addi a0,a0,4
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
b29c: 0006a023 sw zero,0(a3)
otbn_zero_dmem():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:115
b2a0: fec56be3 bltu a0,a2,b296 <otbn_zero_dmem+0xc>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/drivers/otbn.c:118
abs_mmio_write32(kBase + OTBN_DMEM_REG_OFFSET + i, 0u);
}
}
b2a4: 8082 ret
0000b2a6 <boot_policy_manifests_get>:
boot_policy_manifests_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/boot_policy.c:14
#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
#include "sw/device/silicon_creator/lib/error.h"
#include "sw/device/silicon_creator/lib/shutdown.h"
#include "sw/device/silicon_creator/mask_rom/boot_policy_ptrs.h"
boot_policy_manifests_t boot_policy_manifests_get(void) {
b2a6: 20000537 lui a0,0x20000
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/boot_policy.c:17
const manifest_t *slot_a = boot_policy_manifest_a_get();
const manifest_t *slot_b = boot_policy_manifest_b_get();
if (slot_a->security_version >= slot_b->security_version) {
b2aa: 34452503 lw a0,836(a0) # 20000344 <_stack_end+0xffe0344>
b2ae: 200805b7 lui a1,0x20080
b2b2: 3445a603 lw a2,836(a1) # 20080344 <_stack_end+0x10060344>
b2b6: 00c56563 bltu a0,a2,b2c0 <boot_policy_manifests_get+0x1a>
b2ba: 20000537 lui a0,0x20000
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/boot_policy.c:25
};
}
return (boot_policy_manifests_t){
.ordered = {slot_b, slot_a},
};
}
b2be: 8082 ret
b2c0: 20080537 lui a0,0x20080
b2c4: 200005b7 lui a1,0x20000
b2c8: 8082 ret
0000b2ca <boot_policy_manifest_check>:
boot_policy_manifest_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/boot_policy.c:28
rom_error_t boot_policy_manifest_check(lifecycle_state_t lc_state,
const manifest_t *manifest) {
b2ca: 715d addi sp,sp,-80
b2cc: c686 sw ra,76(sp)
b2ce: c4a2 sw s0,72(sp)
b2d0: 842e mv s0,a1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/boot_policy.c:29
if (manifest->identifier != MANIFEST_IDENTIFIER_ROM_EXT) {
b2d2: 3345a583 lw a1,820(a1) # 20000334 <_stack_end+0xffe0334>
b2d6: 45525637 lui a2,0x45525
b2da: 44f60693 addi a3,a2,1103 # 4552544f <_stack_end+0x3550544f>
b2de: 00d59f63 bne a1,a3,b2fc <boot_policy_manifest_check+0x32>
b2e2: 862a mv a2,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/boot_policy.c:32
return kErrorBootPolicyBadIdentifier;
}
if (manifest->length < MANIFEST_LENGTH_FIELD_ROM_EXT_MIN ||
b2e4: 33842703 lw a4,824(s0)
b2e8: c8070513 addi a0,a4,-896 # 41137c80 <_stack_end+0x31117c80>
b2ec: 65c1 lui a1,0x10
b2ee: c8058593 addi a1,a1,-896 # fc80 <_data_init_end+0x3a98>
b2f2: 00a5fc63 bgeu a1,a0,b30a <boot_policy_manifest_check+0x40>
b2f6: 02425537 lui a0,0x2425
b2fa: a019 j b300 <boot_policy_manifest_check+0x36>
b2fc: 01425537 lui a0,0x1425
b300: 0535 addi a0,a0,13
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/boot_policy.c:47
HARDENED_CHECK_GE(launder32(manifest->security_version),
boot_data.min_security_version_rom_ext);
return kErrorOk;
}
return kErrorBootPolicyRollback;
}
b302: 4426 lw s0,72(sp)
b304: 40b6 lw ra,76(sp)
b306: 6161 addi sp,sp,80
b308: 8082 ret
manifest_check():
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/manifest.h:283
if (manifest->code_start >= manifest->code_end ||
b30a: 37442583 lw a1,884(s0)
b30e: 024d4537 lui a0,0x24d4
b312: 38000693 li a3,896
b316: 10d50513 addi a0,a0,269 # 24d410d <_chip_info_end+0x24c410d>
b31a: fed5e4e3 bltu a1,a3,b302 <boot_policy_manifest_check+0x38>
b31e: 37842683 lw a3,888(s0)
b322: fed5f0e3 bgeu a1,a3,b302 <boot_policy_manifest_check+0x38>
b326: 024d4537 lui a0,0x24d4
b32a: 10d50513 addi a0,a0,269 # 24d410d <_chip_info_end+0x24c410d>
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/manifest.h:285
manifest->code_end > manifest->length ||
b32e: fcd76ae3 bltu a4,a3,b302 <boot_policy_manifest_check+0x38>
b332: 00b6e733 or a4,a3,a1
b336: 8b0d andi a4,a4,3
b338: f769 bnez a4,b302 <boot_policy_manifest_check+0x38>
/workspace/worktrees/opentitan/boot-policy/sw/device/silicon_creator/lib/manifest.h:291
if (manifest->entry_point < manifest->code_start ||
b33a: 37c42703 lw a4,892(s0)
b33e: 014d4537 lui a0,0x14d4
b342: 10d50513 addi a0,a0,269 # 14d410d <_chip_info_end+0x14c410d>
b346: fab76ee3 bltu a4,a1,b302 <boot_policy_manifest_check+0x38>
b34a: fad77ce3 bgeu a4,a3,b302 <boot_policy_manifest_check+0x38>
b34e: 00377593 andi a1,a4,3
b352: f9c5 bnez a1,b302 <boot_policy_manifest_check+0x38>
b354: 002c addi a1,sp,8
boot_policy_manifest_check():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/boot_policy.c:38
RETURN_IF_ERROR(boot_data_read(lc_state, &boot_data));
b356: 8532 mv a0,a2
b358: 280d jal b38a <boot_data_read>
b35a: 73900593 li a1,1849
b35e: fab512e3 bne a0,a1,b302 <boot_policy_manifest_check+0x38>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/boot_policy.c:40
if (launder32(manifest->security_version) >=
b362: 34442503 lw a0,836(s0)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/boot_policy.c:41
boot_data.min_security_version_rom_ext) {
b366: 55e2 lw a1,56(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/boot_policy.c:40
if (launder32(manifest->security_version) >=
b368: 00b57563 bgeu a0,a1,b372 <boot_policy_manifest_check+0xa8>
b36c: 03425537 lui a0,0x3425
b370: bf41 j b300 <boot_policy_manifest_check+0x36>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/mask_rom/boot_policy.c:42
HARDENED_CHECK_GE(launder32(manifest->security_version),
b372: 34442503 lw a0,836(s0)
b376: 55e2 lw a1,56(sp)
b378: 00b55663 bge a0,a1,b384 <boot_policy_manifest_check+0xba>
b37c: 0000 unimp
b37e: 0000 unimp
b380: 0000 unimp
b382: 0000 unimp
b384: 73900513 li a0,1849
b388: bfad j b302 <boot_policy_manifest_check+0x38>
0000b38a <boot_data_read>:
boot_data_read():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:519
default:
HARDENED_UNREACHABLE();
}
}
rom_error_t boot_data_read(lifecycle_state_t lc_state, boot_data_t *boot_data) {
b38a: 7159 addi sp,sp,-112
b38c: d686 sw ra,108(sp)
b38e: d4a2 sw s0,104(sp)
b390: d2a6 sw s1,100(sp)
b392: 842e mv s0,a1
b394: 84aa mv s1,a0
b396: 0028 addi a0,sp,8
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:521
boot_data_page_info_t active_page;
rom_error_t error = boot_data_active_page_find(&active_page);
b398: 28f1 jal b474 <boot_data_active_page_find>
b39a: 014245b7 lui a1,0x1424
b39e: 40d58593 addi a1,a1,1037 # 142440d <_chip_info_end+0x141440d>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:522
switch (error) {
b3a2: 00b50863 beq a0,a1,b3b2 <boot_data_read+0x28>
b3a6: 73900593 li a1,1849
b3aa: 0ab51c63 bne a0,a1,b462 <boot_data_read+0xd8>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:524
case kErrorOk:
*boot_data = active_page.last_valid_entry;
b3ae: 100c addi a1,sp,32
b3b0: a055 j b454 <boot_data_read+0xca>
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
b3b2: 8526 mv a0,s1
b3b4: cf8d05b7 lui a1,0xcf8d0
b3b8: aaa58613 addi a2,a1,-1366 # cf8cfaaa <_stack_end+0xbf8afaaa>
boot_data_default_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:495
switch (launder32(lc_state)) {
b3bc: 02a65363 bge a2,a0,b3e2 <boot_data_read+0x58>
b3c0: aab58593 addi a1,a1,-1365
b3c4: 02b50c63 beq a0,a1,b3fc <boot_data_read+0x72>
b3c8: 0b5a75b7 lui a1,0xb5a7
b3cc: 5e058593 addi a1,a1,1504 # b5a75e0 <_epmp_stack_guard_na4+0x759fde0>
b3d0: 04b51163 bne a0,a1,b412 <boot_data_read+0x88>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:501
HARDENED_CHECK_EQ(lc_state, kLcStateDev);
b3d4: 00b48663 beq s1,a1,b3e0 <boot_data_read+0x56>
b3d8: 0000 unimp
b3da: 0000 unimp
b3dc: 0000 unimp
b3de: 0000 unimp
b3e0: a0b5 j b44c <boot_data_read+0xc2>
b3e2: 91b9b5b7 lui a1,0x91b9b
b3e6: 68a58593 addi a1,a1,1674 # 91b9b68a <_stack_end+0x81b7b68a>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:495
switch (launder32(lc_state)) {
b3ea: 04b51563 bne a0,a1,b434 <boot_data_read+0xaa>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:508
HARDENED_CHECK_EQ(lc_state, kLcStateProdEnd);
b3ee: 00b48663 beq s1,a1,b3fa <boot_data_read+0x70>
b3f2: 0000 unimp
b3f4: 0000 unimp
b3f6: 0000 unimp
b3f8: 0000 unimp
b3fa: a805 j b42a <boot_data_read+0xa0>
b3fc: cf8d0537 lui a0,0xcf8d0
b400: aab50513 addi a0,a0,-1365 # cf8cfaab <_stack_end+0xbf8afaab>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:511
HARDENED_CHECK_EQ(lc_state, kLcStateRma);
b404: 00a48663 beq s1,a0,b410 <boot_data_read+0x86>
b408: 0000 unimp
b40a: 0000 unimp
b40c: 0000 unimp
b40e: 0000 unimp
b410: a835 j b44c <boot_data_read+0xc2>
b412: 65f255b7 lui a1,0x65f25
b416: 20f58593 addi a1,a1,527 # 65f2520f <_stack_end+0x55f0520f>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:495
switch (launder32(lc_state)) {
b41a: 04b51963 bne a0,a1,b46c <boot_data_read+0xe2>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:505
HARDENED_CHECK_EQ(lc_state, kLcStateProd);
b41e: 00b48663 beq s1,a1,b42a <boot_data_read+0xa0>
b422: 0000 unimp
b424: 0000 unimp
b426: 0000 unimp
b428: 0000 unimp
b42a: 01424537 lui a0,0x1424
b42e: 40d50513 addi a0,a0,1037 # 142440d <_chip_info_end+0x141440d>
b432: a805 j b462 <boot_data_read+0xd8>
b434: b28665b7 lui a1,0xb2866
b438: fbb58593 addi a1,a1,-69 # b2865fbb <_stack_end+0xa2845fbb>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:495
switch (launder32(lc_state)) {
b43c: 02b51863 bne a0,a1,b46c <boot_data_read+0xe2>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:497
HARDENED_CHECK_EQ(lc_state, kLcStateTest);
b440: 00b48663 beq s1,a1,b44c <boot_data_read+0xc2>
b444: 0000 unimp
b446: 0000 unimp
b448: 0000 unimp
b44a: 0000 unimp
b44c: 0fff5597 auipc a1,0xfff5
b450: 20458593 addi a1,a1,516 # 10000650 <kBootDataDefault>
b454: 04000613 li a2,64
b458: 8522 mv a0,s0
b45a: e08fd0ef jal ra,8a62 <memcpy>
b45e: 73900513 li a0,1849
boot_data_read():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:533
RETURN_IF_ERROR(boot_data_default_get(lc_state, boot_data));
return kErrorOk;
default:
return error;
}
}
b462: 5496 lw s1,100(sp)
b464: 5426 lw s0,104(sp)
b466: 50b6 lw ra,108(sp)
b468: 6165 addi sp,sp,112
b46a: 8082 ret
boot_data_default_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:515
HARDENED_UNREACHABLE();
b46c: 0000 unimp
b46e: 0000 unimp
b470: 0000 unimp
b472: 0000 unimp
0000b474 <boot_data_active_page_find>:
boot_data_active_page_find():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:438
boot_data_page_info_t *page_info) {
b474: 7141 addi sp,sp,-496
b476: 1e112623 sw ra,492(sp)
b47a: 1e812423 sw s0,488(sp)
b47e: 1e912223 sw s1,484(sp)
b482: 1f212023 sw s2,480(sp)
b486: 1d312e23 sw s3,476(sp)
b48a: 1d412c23 sw s4,472(sp)
b48e: 1d512a23 sw s5,468(sp)
b492: 1d612823 sw s6,464(sp)
b496: 1d712623 sw s7,460(sp)
b49a: 1d812423 sw s8,456(sp)
b49e: 1d912223 sw s9,452(sp)
b4a2: 1da12023 sw s10,448(sp)
b4a6: 1bb12e23 sw s11,444(sp)
b4aa: c62a sw a0,12(sp)
b4ac: 4401 li s0,0
b4ae: 00001517 auipc a0,0x1
b4b2: cd250513 addi a0,a0,-814 # c180 <_otbn_local_app_run_rsa_verify_3072_rr_modexp__dmem_data_end>
b4b6: c82a sw a0,16(sp)
b4b8: 73900d13 li s10,1849
b4bc: 1d400493 li s1,468
b4c0: 11810d93 addi s11,sp,280
b4c4: 19810c13 addi s8,sp,408
b4c8: 597d li s2,-1
b4ca: 0d810b93 addi s7,sp,216
b4ce: 04000c93 li s9,64
b4d2: 41445537 lui a0,0x41445
b4d6: f4250513 addi a0,a0,-190 # 41444f42 <_stack_end+0x31424f42>
b4da: d22a sw a0,36(sp)
b4dc: 00001517 auipc a0,0x1
b4e0: cac50513 addi a0,a0,-852 # c188 <kDigestShares>
b4e4: ce2a sw a0,28(sp)
b4e6: 4a21 li s4,8
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:441
RETURN_IF_ERROR(boot_data_page_info_get(kPages[i], &page_infos[i]));
b4e8: 00241513 slli a0,s0,0x2
b4ec: 45c2 lw a1,16(sp)
b4ee: 952e add a0,a0,a1
b4f0: 00052b03 lw s6,0(a0)
b4f4: 85ee mv a1,s11
boot_data_page_info_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:414
flash_ctrl_info_perms_set(page, (flash_ctrl_perms_t){
b4f6: 11a12c23 sw s10,280(sp)
b4fa: 10912e23 sw s1,284(sp)
b4fe: 12912023 sw s1,288(sp)
b502: 855a mv a0,s6
b504: e19fd0ef jal ra,931c <flash_ctrl_info_perms_set>
b508: 4a81 li s5,0
b50a: d022 sw s0,32(sp)
boot_data_page_info_get_impl():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:362
page_info->page = page;
b50c: 05800513 li a0,88
b510: 02a40533 mul a0,s0,a0
b514: 102c addi a1,sp,40
b516: 95aa add a1,a1,a0
b518: 0165a023 sw s6,0(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:363
page_info->has_empty_entry = kHardenedBoolFalse;
b51c: 0045ed13 ori s10,a1,4
b520: 009d2023 sw s1,0(s10)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:364
page_info->has_valid_entry = kHardenedBoolFalse;
b524: 00c58513 addi a0,a1,12
b528: ca2a sw a0,20(sp)
b52a: cc2e sw a1,24(sp)
b52c: c5c4 sw s1,12(a1)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:370
RETURN_IF_ERROR(boot_data_sniff(page, i, &sniff_results[i]));
b52e: 002a9513 slli a0,s5,0x2
b532: 00ad89b3 add s3,s11,a0
boot_data_sniff():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:165
*masked_identifier = 0;
b536: 0009a023 sw zero,0(s3)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:167
const uint32_t offset = index * sizeof(boot_data_t) + kIsValidOffset;
b53a: 006a9493 slli s1,s5,0x6
b53e: 0204e593 ori a1,s1,32
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:168
RETURN_IF_ERROR(flash_ctrl_info_read(page, offset, 3, buf));
b542: 460d li a2,3
b544: 855a mv a0,s6
b546: 86e2 mv a3,s8
b548: a8bfd0ef jal ra,8fd2 <flash_ctrl_info_read>
b54c: 842a mv s0,a0
b54e: 73900513 li a0,1849
b552: 06a41963 bne s0,a0,b5c4 <boot_data_active_page_find+0x150>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:169
*masked_identifier = buf[0] & buf[1] & buf[2];
b556: 19812503 lw a0,408(sp)
b55a: 19c12583 lw a1,412(sp)
b55e: 1a012603 lw a2,416(sp)
b562: 8d6d and a0,a0,a1
b564: 8d71 and a0,a0,a2
b566: 00a9a023 sw a0,0(s3)
boot_data_page_info_get_impl():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:372
if (sniff_results[i] == kBootDataEmptyWordValue) {
b56a: 01250863 beq a0,s2,b57a <boot_data_active_page_find+0x106>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:367
for (size_t i = 0; i < kBootDataEntriesPerPage; ++i) {
b56e: 0a85 addi s5,s5,1
b570: 02000513 li a0,32
b574: faaa9de3 bne s5,a0,b52e <boot_data_active_page_find+0xba>
b578: a889 j b5ca <boot_data_active_page_find+0x156>
boot_data_entry_read():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:185
return flash_ctrl_info_read(page, offset, kBootDataNumWords, boot_data->data);
b57a: 4641 li a2,16
b57c: 855a mv a0,s6
b57e: 85a6 mv a1,s1
b580: 86de mv a3,s7
b582: a51fd0ef jal ra,8fd2 <flash_ctrl_info_read>
b586: 842a mv s0,a0
b588: 73900513 li a0,1849
b58c: 02a41c63 bne s0,a0,b5c4 <boot_data_active_page_find+0x150>
b590: 4501 li a0,0
boot_data_is_empty():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:128
if (boot_data->data[i] != kBootDataEmptyWordValue) {
b592: 00ab85b3 add a1,s7,a0
b596: 418c lw a1,0(a1)
b598: fd259be3 bne a1,s2,b56e <boot_data_active_page_find+0xfa>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:127
for (size_t i = 0; i < kBootDataNumWords; ++i) {
b59c: 0511 addi a0,a0,4
b59e: ff951ae3 bne a0,s9,b592 <boot_data_active_page_find+0x11e>
boot_data_page_info_get_impl():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:375
page_info->first_empty_index = i;
b5a2: 4562 lw a0,24(sp)
b5a4: 01552423 sw s5,8(a0)
b5a8: 73900413 li s0,1849
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:384
? page_info->first_empty_index - 1
b5ac: fffa8993 addi s3,s5,-1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:376
page_info->has_empty_entry = kHardenedBoolTrue;
b5b0: 008d2023 sw s0,0(s10)
b5b4: 0f810a93 addi s5,sp,248
b5b8: 73900d13 li s10,1849
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:386
for (size_t i = start_index; i < kBootDataEntriesPerPage; --i) {
b5bc: 457d li a0,31
b5be: 01357b63 bgeu a0,s3,b5d4 <boot_data_active_page_find+0x160>
b5c2: a875 j b67e <boot_data_active_page_find+0x20a>
b5c4: 73900d13 li s10,1849
b5c8: a85d j b67e <boot_data_active_page_find+0x20a>
b5ca: 49fd li s3,31
b5cc: 0f810a93 addi s5,sp,248
b5d0: 73900d13 li s10,1849
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:388
if (sniff_results[i] == kBootDataIdentifier) {
b5d4: 00299513 slli a0,s3,0x2
b5d8: 956e add a0,a0,s11
b5da: 4108 lw a0,0(a0)
b5dc: 5592 lw a1,36(sp)
b5de: 06b51863 bne a0,a1,b64e <boot_data_active_page_find+0x1da>
boot_data_entry_read():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:184
const uint32_t offset = index * sizeof(boot_data_t);
b5e2: 00699593 slli a1,s3,0x6
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:185
return flash_ctrl_info_read(page, offset, kBootDataNumWords, boot_data->data);
b5e6: 4641 li a2,16
b5e8: 855a mv a0,s6
b5ea: 86de mv a3,s7
b5ec: 9e7fd0ef jal ra,8fd2 <flash_ctrl_info_read>
b5f0: 07a51763 bne a0,s10,b65e <boot_data_active_page_find+0x1ea>
boot_data_digest_compute():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:69
hmac_sha256_init();
b5f4: fd6fd0ef jal ra,8dca <hmac_sha256_init>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:70
hmac_sha256_update((const char *)boot_data + kDigestRegionOffset,
b5f8: 02000593 li a1,32
b5fc: 8556 mv a0,s5
b5fe: fe6fd0ef jal ra,8de4 <hmac_sha256_update>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:72
hmac_sha256_final(digest);
b602: 8562 mv a0,s8
b604: 837fd0ef jal ra,8e3a <hmac_sha256_final>
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
b608: 4501 li a0,0
boot_data_digest_is_valid():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:112
for (; launder32(i) < kHmacDigestNumWords; ++i) {
b60a: 459d li a1,7
b60c: 02a5e663 bltu a1,a0,b638 <boot_data_active_page_find+0x1c4>
b610: 4501 li a0,0
b612: 1d400593 li a1,468
b616: 865e mv a2,s7
b618: 86e2 mv a3,s8
b61a: 4772 lw a4,28(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:113
is_valid ^= boot_data->data[i] ^ act_digest.digest[i] ^ kDigestShares[i];
b61c: 421c lw a5,0(a2)
b61e: 4280 lw s0,0(a3)
b620: 4304 lw s1,0(a4)
b622: 8dbd xor a1,a1,a5
b624: 8da1 xor a1,a1,s0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:112
for (; launder32(i) < kHmacDigestNumWords; ++i) {
b626: 0505 addi a0,a0,1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:113
is_valid ^= boot_data->data[i] ^ act_digest.digest[i] ^ kDigestShares[i];
b628: 8da5 xor a1,a1,s1
launder32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/hardened.h:242
b62a: 87aa mv a5,a0
boot_data_digest_is_valid():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:112
for (; launder32(i) < kHmacDigestNumWords; ++i) {
b62c: 0711 addi a4,a4,4
b62e: 0691 addi a3,a3,4
b630: 0611 addi a2,a2,4
b632: ff47e5e3 bltu a5,s4,b61c <boot_data_active_page_find+0x1a8>
b636: a021 j b63e <boot_data_active_page_find+0x1ca>
b638: 4501 li a0,0
b63a: 1d400593 li a1,468
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:115
HARDENED_CHECK_EQ(i, kHmacDigestNumWords);
b63e: 01450663 beq a0,s4,b64a <boot_data_active_page_find+0x1d6>
b642: 0000 unimp
b644: 0000 unimp
b646: 0000 unimp
b648: 0000 unimp
boot_data_page_info_get_impl():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:390
if (boot_data_digest_is_valid(&buf) == kHardenedBoolTrue) {
b64a: 01a58c63 beq a1,s10,b662 <boot_data_active_page_find+0x1ee>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:386
for (size_t i = start_index; i < kBootDataEntriesPerPage; --i) {
b64e: 19fd addi s3,s3,-1
b650: 02000513 li a0,32
b654: f8a9e0e3 bltu s3,a0,b5d4 <boot_data_active_page_find+0x160>
b658: 73900413 li s0,1849
b65c: a00d j b67e <boot_data_active_page_find+0x20a>
b65e: 842a mv s0,a0
b660: a839 j b67e <boot_data_active_page_find+0x20a>
b662: 4462 lw s0,24(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:391
memcpy(&page_info->last_valid_entry, &buf, sizeof(boot_data_t));
b664: 01840513 addi a0,s0,24
b668: 04000613 li a2,64
b66c: 85de mv a1,s7
b66e: bf4fd0ef jal ra,8a62 <memcpy>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:392
page_info->last_valid_index = i;
b672: 01342823 sw s3,16(s0)
b676: 73900413 li s0,1849
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:393
page_info->has_valid_entry = kHardenedBoolTrue;
b67a: 4552 lw a0,20(sp)
b67c: c100 sw s0,0(a0)
b67e: 1d400493 li s1,468
boot_data_page_info_get():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:420
flash_ctrl_info_perms_set(page, (flash_ctrl_perms_t){
b682: 10912c23 sw s1,280(sp)
b686: 10912e23 sw s1,284(sp)
b68a: 12912023 sw s1,288(sp)
b68e: 855a mv a0,s6
b690: 85ee mv a1,s11
b692: c8bfd0ef jal ra,931c <flash_ctrl_info_perms_set>
b696: 05a41763 bne s0,s10,b6e4 <boot_data_active_page_find+0x270>
b69a: 5402 lw s0,32(sp)
b69c: 0405 addi s0,s0,1
boot_data_active_page_find():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:440
for (size_t i = 0; i < ARRAYSIZE(kPages); ++i) {
b69e: 4509 li a0,2
b6a0: e4a414e3 bne s0,a0,b4e8 <boot_data_active_page_find+0x74>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:444
if (page_infos[0].has_valid_entry == kHardenedBoolTrue &&
b6a4: 55d2 lw a1,52(sp)
b6a6: 73900513 li a0,1849
b6aa: 00a59b63 bne a1,a0,b6c0 <boot_data_active_page_find+0x24c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:445
page_infos[1].has_valid_entry == kHardenedBoolTrue) {
b6ae: 45ba lw a1,140(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:444
if (page_infos[0].has_valid_entry == kHardenedBoolTrue &&
b6b0: 00a59663 bne a1,a0,b6bc <boot_data_active_page_find+0x248>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:446
if (page_infos[0].last_valid_entry.counter >
b6b4: 5536 lw a0,108(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:447
page_infos[1].last_valid_entry.counter) {
b6b6: 459e lw a1,196(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:446
if (page_infos[0].last_valid_entry.counter >
b6b8: 02a5f063 bgeu a1,a0,b6d8 <boot_data_active_page_find+0x264>
b6bc: 102c addi a1,sp,40
b6be: a029 j b6c8 <boot_data_active_page_find+0x254>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:460
} else if (page_infos[1].has_valid_entry == kHardenedBoolTrue) {
b6c0: 45ba lw a1,140(sp)
b6c2: 00a59d63 bne a1,a0,b6dc <boot_data_active_page_find+0x268>
b6c6: 010c addi a1,sp,128
b6c8: 05800613 li a2,88
b6cc: 4532 lw a0,12(sp)
b6ce: b94fd0ef jal ra,8a62 <memcpy>
b6d2: 73900413 li s0,1849
b6d6: a039 j b6e4 <boot_data_active_page_find+0x270>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:450
} else if (page_infos[1].last_valid_entry.counter >
b6d8: feb567e3 bltu a0,a1,b6c6 <boot_data_active_page_find+0x252>
b6dc: 01424537 lui a0,0x1424
b6e0: 40d50413 addi s0,a0,1037 # 142440d <_chip_info_end+0x141440d>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/boot_data.c:465
}
b6e4: 8522 mv a0,s0
b6e6: 1bc12d83 lw s11,444(sp)
b6ea: 1c012d03 lw s10,448(sp)
b6ee: 1c412c83 lw s9,452(sp)
b6f2: 1c812c03 lw s8,456(sp)
b6f6: 1cc12b83 lw s7,460(sp)
b6fa: 1d012b03 lw s6,464(sp)
b6fe: 1d412a83 lw s5,468(sp)
b702: 1d812a03 lw s4,472(sp)
b706: 1dc12983 lw s3,476(sp)
b70a: 1e012903 lw s2,480(sp)
b70e: 1e412483 lw s1,484(sp)
b712: 1e812403 lw s0,488(sp)
b716: 1ec12083 lw ra,492(sp)
b71a: 617d addi sp,sp,496
b71c: 8082 ret
0000b71e <mmio_region_memcpy_from_mmio32>:
mmio_region_memcpy_from_mmio32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:112
}
}
void mmio_region_memcpy_from_mmio32(mmio_region_t base, uint32_t offset,
void *dest, size_t len) {
mmio_region_memcpy32(base, offset, dest, len, true);
b71e: 4705 li a4,1
b720: a009 j b722 <mmio_region_memcpy32>
0000b722 <mmio_region_memcpy32>:
mmio_region_memcpy32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:35
uint8_t *buf, size_t len, bool from_mmio) {
b722: 7179 addi sp,sp,-48
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:36
if (len == 0) {
b724: d606 sw ra,44(sp)
b726: d422 sw s0,40(sp)
b728: d226 sw s1,36(sp)
b72a: d04a sw s2,32(sp)
b72c: ce4e sw s3,28(sp)
b72e: cc52 sw s4,24(sp)
b730: ca56 sw s5,20(sp)
b732: c85a sw s6,16(sp)
b734: c6c5 beqz a3,b7dc <mmio_region_memcpy32+0xba>
b736: 893a mv s2,a4
b738: 8436 mv s0,a3
b73a: 89b2 mv s3,a2
b73c: 8b2e mv s6,a1
b73e: 8a2a mv s4,a0
misalignment32_of():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:16
return addr % alignof(uint32_t);
b740: 0035f513 andi a0,a1,3
mmio_region_memcpy32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:43
if (misalignment != 0) {
b744: c139 beqz a0,b78a <mmio_region_memcpy32+0x68>
b746: 4591 li a1,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:46
ptrdiff_t realignment = sizeof(uint32_t) - misalignment;
b748: 8d89 sub a1,a1,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:50
if (realignment > len) {
b74a: 84a2 mv s1,s0
b74c: 00b46363 bltu s0,a1,b752 <mmio_region_memcpy32+0x30>
b750: 84ae mv s1,a1
mmio_region_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:103
return ((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)];
b752: ffcb7593 andi a1,s6,-4
b756: 00ba0ab3 add s5,s4,a1
b75a: 000aa583 lw a1,0(s5)
mmio_region_memcpy32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:57
uint32_t current_word = mmio_region_read32(base, current_word_offset);
b75e: c62e sw a1,12(sp)
b760: 006c addi a1,sp,12
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:61
uint8_t *current_byte = ((uint8_t *)&current_word) + misalignment;
b762: 8dc9 or a1,a1,a0
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:62
if (from_mmio) {
b764: 00090763 beqz s2,b772 <mmio_region_memcpy32+0x50>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:63
memcpy(buf, current_byte, realignment);
b768: 854e mv a0,s3
b76a: 8626 mv a2,s1
b76c: af6fd0ef jal ra,8a62 <memcpy>
b770: a809 j b782 <mmio_region_memcpy32+0x60>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:66
memcpy(current_byte, buf, realignment);
b772: 852e mv a0,a1
b774: 85ce mv a1,s3
b776: 8626 mv a2,s1
b778: aeafd0ef jal ra,8a62 <memcpy>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:67
mmio_region_write32(base, current_word_offset, current_word);
b77c: 4532 lw a0,12(sp)
mmio_region_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:152
((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)] = value;
b77e: 00aaa023 sw a0,0(s5)
mmio_region_memcpy32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:72
len -= realignment;
b782: 8c05 sub s0,s0,s1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:76
while (len > 0) {
b784: cc21 beqz s0,b7dc <mmio_region_memcpy32+0xba>
b786: 9b26 add s6,s6,s1
b788: 99a6 add s3,s3,s1
b78a: 00810a93 addi s5,sp,8
b78e: 4511 li a0,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:81
if (bytes_to_copy > len) {
b790: 84a2 mv s1,s0
b792: 00a46363 bltu s0,a0,b798 <mmio_region_memcpy32+0x76>
b796: 4491 li s1,4
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:86
uint32_t current_word = 0;
b798: c402 sw zero,8(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:87
if (from_mmio || bytes_to_copy != sizeof(uint32_t)) {
b79a: 00a46c63 bltu s0,a0,b7b2 <mmio_region_memcpy32+0x90>
b79e: 00091a63 bnez s2,b7b2 <mmio_region_memcpy32+0x90>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:96
if (from_mmio) {
b7a2: 00090f63 beqz s2,b7c0 <mmio_region_memcpy32+0x9e>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:97
memcpy(buf, &current_word, bytes_to_copy);
b7a6: 854e mv a0,s3
b7a8: 85d6 mv a1,s5
b7aa: 8626 mv a2,s1
b7ac: ab6fd0ef jal ra,8a62 <memcpy>
b7b0: a015 j b7d4 <mmio_region_memcpy32+0xb2>
mmio_region_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:103
return ((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)];
b7b2: ffcb7513 andi a0,s6,-4
b7b6: 9552 add a0,a0,s4
b7b8: 4108 lw a0,0(a0)
mmio_region_memcpy32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:92
current_word = mmio_region_read32(base, offset);
b7ba: c42a sw a0,8(sp)
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:96
if (from_mmio) {
b7bc: fe0915e3 bnez s2,b7a6 <mmio_region_memcpy32+0x84>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:100
memcpy(&current_word, buf, bytes_to_copy);
b7c0: 8556 mv a0,s5
b7c2: 85ce mv a1,s3
b7c4: 8626 mv a2,s1
b7c6: a9cfd0ef jal ra,8a62 <memcpy>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:101
mmio_region_write32(base, offset, current_word);
b7ca: 4522 lw a0,8(sp)
mmio_region_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/mmio.h:152
((volatile uint32_t *)base.base)[offset / sizeof(uint32_t)] = value;
b7cc: ffcb7593 andi a1,s6,-4
b7d0: 95d2 add a1,a1,s4
b7d2: c188 sw a0,0(a1)
mmio_region_memcpy32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:104
offset += bytes_to_copy;
b7d4: 9b26 add s6,s6,s1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:106
len -= bytes_to_copy;
b7d6: 8c05 sub s0,s0,s1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:105
buf += bytes_to_copy;
b7d8: 99a6 add s3,s3,s1
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:76
while (len > 0) {
b7da: f855 bnez s0,b78e <mmio_region_memcpy32+0x6c>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:108
}
b7dc: 4b42 lw s6,16(sp)
b7de: 4ad2 lw s5,20(sp)
b7e0: 4a62 lw s4,24(sp)
b7e2: 49f2 lw s3,28(sp)
b7e4: 5902 lw s2,32(sp)
b7e6: 5492 lw s1,36(sp)
b7e8: 5422 lw s0,40(sp)
b7ea: 50b2 lw ra,44(sp)
b7ec: 6145 addi sp,sp,48
b7ee: 8082 ret
0000b7f0 <mmio_region_memcpy_to_mmio32>:
mmio_region_memcpy_to_mmio32():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/lib/base/mmio.c:120
void mmio_region_memcpy_to_mmio32(mmio_region_t base, uint32_t offset,
const void *src, size_t len) {
// Below `const` cast is necessary to be able to use `mmio_region_memcpy32`
// for both read and write operations but `from_mmio = false` means that `src`
// will never be written to.
mmio_region_memcpy32(base, offset, (void *)src, len, false);
b7f0: 4701 li a4,0
b7f2: bf05 j b722 <mmio_region_memcpy32>
Disassembly of section .shutdown:
0000b7f4 <shutdown_finalize>:
shutdown_finalize():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:342
* The shutdown_finalize function goes into the .shutdown section which is
* placed by the linker script after all other executable code.
*/
__attribute__((section(".shutdown")))
#endif
void shutdown_finalize(rom_error_t reason) {
b7f4: 1141 addi sp,sp,-16
b7f6: c606 sw ra,12(sp)
b7f8: 401405b7 lui a1,0x40140
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
return *((volatile uint32_t *)addr);
b7fc: 59d0 lw a2,52(a1)
b7fe: 85aa mv a1,a0
b800: 40000537 lui a0,0x40000
b804: 157d addi a0,a0,-1
bitfield_field32_read():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:60
return (bitfield >> field.index) & field.mask;
b806: 8e69 and a2,a2,a0
b808: e2291537 lui a0,0xe2291
b80c: 1ad6b6b7 lui a3,0x1ad6b
b810: 5ac68693 addi a3,a3,1452 # 1ad6b5ac <_stack_end+0xad4b5ac>
b814: aa550513 addi a0,a0,-1371 # e2290aa5 <_stack_end+0xd2270aa5>
shutdown_redact_policy_inline():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:228
switch (raw_state) {
b818: 02c6cb63 blt a3,a2,b84e <shutdown_finalize+0x5a>
b81c: 0e73a6b7 lui a3,0xe73a
b820: ce668713 addi a4,a3,-794 # e739ce6 <_epmp_stack_guard_na4+0xa7324e6>
b824: 04c74e63 blt a4,a2,b880 <shutdown_finalize+0x8c>
b828: 021086b7 lui a3,0x2108
b82c: 42168693 addi a3,a3,1057 # 2108421 <_chip_info_end+0x20f8421>
b830: 0ad60263 beq a2,a3,b8d4 <shutdown_finalize+0xe0>
b834: 063196b7 lui a3,0x6319
b838: c6368693 addi a3,a3,-925 # 6318c63 <_epmp_stack_guard_na4+0x2311463>
b83c: 08d60c63 beq a2,a3,b8d4 <shutdown_finalize+0xe0>
b840: 0a5296b7 lui a3,0xa529
b844: 4a568693 addi a3,a3,1189 # a5294a5 <_epmp_stack_guard_na4+0x6521ca5>
b848: 08d60663 beq a2,a3,b8d4 <shutdown_finalize+0xe0>
b84c: a041 j b8cc <shutdown_finalize+0xd8>
b84e: 2318c6b7 lui a3,0x2318c
b852: 63068713 addi a4,a3,1584 # 2318c630 <_stack_end+0x1316c630>
b856: 04c74663 blt a4,a2,b8a2 <shutdown_finalize+0xae>
b85a: 1ad6b6b7 lui a3,0x1ad6b
b85e: 5ad68693 addi a3,a3,1453 # 1ad6b5ad <_stack_end+0xad4b5ad>
b862: 06d60963 beq a2,a3,b8d4 <shutdown_finalize+0xe0>
b866: 1ef7c6b7 lui a3,0x1ef7c
b86a: def68693 addi a3,a3,-529 # 1ef7bdef <_stack_end+0xef5bdef>
b86e: 06d60363 beq a2,a3,b8d4 <shutdown_finalize+0xe0>
b872: 21084537 lui a0,0x21084
b876: 21050513 addi a0,a0,528 # 21084210 <_stack_end+0x11064210>
b87a: 04a60463 beq a2,a0,b8c2 <shutdown_finalize+0xce>
b87e: a0b9 j b8cc <shutdown_finalize+0xd8>
b880: ce768693 addi a3,a3,-793
b884: 04d60863 beq a2,a3,b8d4 <shutdown_finalize+0xe0>
b888: 1294a6b7 lui a3,0x1294a
b88c: 52968693 addi a3,a3,1321 # 1294a529 <_stack_end+0x292a529>
b890: 04d60263 beq a2,a3,b8d4 <shutdown_finalize+0xe0>
b894: 16b5b6b7 lui a3,0x16b5b
b898: d6b68693 addi a3,a3,-661 # 16b5ad6b <_stack_end+0x6b3ad6b>
b89c: 02d60c63 beq a2,a3,b8d4 <shutdown_finalize+0xe0>
b8a0: a035 j b8cc <shutdown_finalize+0xd8>
b8a2: 63168693 addi a3,a3,1585
b8a6: 00d60e63 beq a2,a3,b8c2 <shutdown_finalize+0xce>
b8aa: 2739d6b7 lui a3,0x2739d
b8ae: e7368693 addi a3,a3,-397 # 2739ce73 <_stack_end+0x1737ce73>
b8b2: 02d60163 beq a2,a3,b8d4 <shutdown_finalize+0xe0>
b8b6: 25295537 lui a0,0x25295
b8ba: a5250513 addi a0,a0,-1454 # 25294a52 <_stack_end+0x15274a52>
b8be: 00a61763 bne a2,a0,b8cc <shutdown_finalize+0xd8>
b8c2: 40131537 lui a0,0x40131
abs_mmio_read32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:81
b8c6: 36052503 lw a0,864(a0) # 40131360 <_stack_end+0x30111360>
b8ca: a029 j b8d4 <shutdown_finalize+0xe0>
b8cc: 48eb5537 lui a0,0x48eb5
b8d0: bd950513 addi a0,a0,-1063 # 48eb4bd9 <_stack_end+0x38e94bd9>
b8d4: 73900613 li a2,1849
shutdown_redact_inline():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:188
if (reason == kErrorOk) {
b8d8: 00c59463 bne a1,a2,b8e0 <shutdown_finalize+0xec>
b8dc: 4581 li a1,0
b8de: a835 j b91a <shutdown_finalize+0x126>
b8e0: e2291637 lui a2,0xe2291
b8e4: aa560613 addi a2,a2,-1371 # e2290aa5 <_stack_end+0xd2270aa5>
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:191
switch (severity) {
b8e8: 02c50963 beq a0,a2,b91a <shutdown_finalize+0x126>
b8ec: 3367d637 lui a2,0x3367d
b8f0: 3d460613 addi a2,a2,980 # 3367d3d4 <_stack_end+0x2365d3d4>
b8f4: 00c50d63 beq a0,a2,b90e <shutdown_finalize+0x11a>
b8f8: 1e791637 lui a2,0x1e791
b8fc: 12360613 addi a2,a2,291 # 1e791123 <_stack_end+0xe771123>
b900: 00c51c63 bne a0,a2,b918 <shutdown_finalize+0x124>
b904: ff000537 lui a0,0xff000
b908: 0ff50513 addi a0,a0,255 # ff0000ff <_stack_end+0xeefe00ff>
bitfield_field32_write():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/bitfield.h:79
bitfield &= ~(field.mask << field.index);
b90c: 8de9 and a1,a1,a0
b90e: 01000537 lui a0,0x1000
b912: 157d addi a0,a0,-1
b914: 8de9 and a1,a1,a0
b916: a011 j b91a <shutdown_finalize+0x126>
b918: 55fd li a1,-1
shutdown_report_error():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:268
log_printf("boot_fault: 0x%x\n", (unsigned int)redacted_error);
b91a: 00000517 auipc a0,0x0
b91e: 4d250513 addi a0,a0,1234 # bdec <kPinmuxInputs+0x30>
b922: cb2fe0ef jal ra,9dd4 <log_printf>
b926: 411f0537 lui a0,0x411f0
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
b92a: 00052423 sw zero,8(a0) # 411f0008 <_stack_end+0x311d0008>
b92e: 411405b7 lui a1,0x41140
b932: 04000513 li a0,64
abs_mmio_write32_shadowed():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:102
*
* @param addr the address to write to.
* @param value the value to write.
*/
inline void abs_mmio_write32_shadowed(uint32_t addr, uint32_t value) {
*((volatile uint32_t *)addr) = value;
b936: cd88 sw a0,24(a1)
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:103
*((volatile uint32_t *)addr) = value;
b938: cd88 sw a0,24(a1)
b93a: 4505 li a0,1
abs_mmio_write32():
/workspace/worktrees/opentitan/boot-policy/sw/device/lib/base/abs_mmio.h:91
*((volatile uint32_t *)addr) = value;
b93c: c9c8 sw a0,20(a1)
b93e: cdc8 sw a0,28(a1)
b940: 410005b7 lui a1,0x41000
b944: 0005a823 sw zero,16(a1) # 41000010 <_stack_end+0x30fe0010>
b948: 411c05b7 lui a1,0x411c0
b94c: 0005a023 sw zero,0(a1) # 411c0000 <_stack_end+0x311a0000>
b950: 0005a423 sw zero,8(a1)
shutdown_hang():
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:309
asm volatile(
b954: c9c8 sw a0,20(a1)
b956: 0005a823 sw zero,16(a1)
b95a: 10500073 wfi
b95e: 10500073 wfi
b962: 10500073 wfi
b966: 10500073 wfi
b96a: bfc5 j b95a <shutdown_finalize+0x166>
b96c: 10500073 wfi
b970: 10500073 wfi
b974: b7dd j b95a <shutdown_finalize+0x166>
b976: 10500073 wfi
b97a: b7c5 j b95a <shutdown_finalize+0x166>
b97c: 10500073 wfi
/workspace/worktrees/opentitan/boot-policy/build-out/../sw/device/silicon_creator/lib/shutdown.c:308
while (true) {
b980: bfd1 j b954 <shutdown_finalize+0x160>
b982: 0000 unimp
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