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cyyself / linux-riscv-b-zicond.patch
Created July 25, 2024 03:05
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 06de9d365088..d2d17198c68d 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -87,7 +87,7 @@ riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) := $(riscv-march-y)_zihintpause
# Remove F,D,V from isa string for all. Keep extensions between "fd" and "v" by
# matching non-v and non-multi-letter extensions out with the filter ([^v_]*)
-KBUILD_CFLAGS += -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)fd([^v_]*)v?/\1\2/')
+KBUILD_CFLAGS += -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)fd([^v_]*)v?/\1\2/')_zba_zbb_zbc_zbs_zicond
@cyyself
cyyself / llvm-xs-pgo-perf.md
Last active July 18, 2024 03:52
@cyyself
cyyself / llvm-verilator-slow-compile-xs-stack-dump.txt
Created July 17, 2024 13:30
(gdb) bt
#0 0x000055bc2781cb42 in llvm::BasicBlock::renumberInstructions() ()
#1 0x000055bc2790c33b in llvm::Instruction::comesBefore(llvm::Instruction const*) const ()
#2 0x000055bc287c558b in llvm::slpvectorizer::BoUpSLP::vectorizeTree(llvm::MapVector<llvm::Value*, llvm::SmallVector<llvm::Instruction*, 2u>, llvm::DenseMap<llvm::Value*, unsigned int, llvm::DenseMapInfo<llvm::Value*, void>, llvm::detail::DenseMapPair<llvm::Value*, unsigned int> >, llvm::SmallVector<std::pair<llvm::Value*, llvm::SmallVector<llvm::Instruction*, 2u> >, 0u> > const&, llvm::SmallVectorImpl<std::pair<llvm::Value*, llvm::Value*> >&, llvm::Instruction*)::{lambda(llvm::Value*)#1}::operator()(llvm::Value*) const ()
#3 0x000055bc287fcd82 in llvm::slpvectorizer::BoUpSLP::vectorizeTree(llvm::MapVector<llvm::Value*, llvm::SmallVector<llvm::Instruction*, 2u>, llvm::DenseMap<llvm::Value*, unsigned int, llvm::DenseMapInfo<llvm::Value*, void>, llvm::detail::DenseMapPair<llvm::Value*, unsigned int> >, llvm::SmallVector<std::pair<llvm::Value
@cyyself
cyyself / msm8916-pinctrl-dump.cpp
Last active July 15, 2024 17:11
#include <cstdio>
#include <cstdint>
#include <fcntl.h>
#include <sys/mman.h>
#include <unistd.h>
void dump_regs(volatile void *regs) {
for (int i=0;i<122;i++) {
uint32_t ctl_reg = *(uint32_t *)(regs + 0x1000 * i);
uint32_t io_reg = *(uint32_t *)(regs + 0x1000 * i + 0x4);
@cyyself
cyyself / verilator_performance-3.txt
Created July 15, 2024 09:44
baseline commit 6882f8c55e9ab55f298e5203c193d0ccd94e2a57:
➜ XiangShan git:(master) ✗ ~/.homebrew/bin/numactl --physcpubind=0-7,16-23 perf stat -e L1-dcache-load-misses -e L1-icache-load-misses -e branch-misses -e branch-load-misses -e cpu-cycles -e instructions -e stalled-cycles-frontend -e stalled-cycles-backend -e branch-instructions sh -c "./build/emu --no-diff -i /nfs/home/chenyangyu/xs-env/XiangShan/ready-to-run/coremark-2-iteration.bin 2>/dev/null"
emu compiled at Jul 15 2024, 17:21:46
Using simulated 32768B flash
Using simulated 8192MB RAM
The image is /nfs/home/chenyangyu/xs-env/XiangShan/ready-to-run/coremark-2-iteration.bin
Running CoreMark for 2 iterations
2K performance run parameters for coremark.
CoreMark Size : 666
Total time (ms) : 3161
@cyyself
cyyself / verilator_performance-2.txt
Created July 15, 2024 07:00
Performance counter stats for './build-verilator-5a478ec5f/emu -i ready-to-run/coremark-2-iteration.bin --no-diff':
<not counted> cpu_atom/L1-dcache-loads/ (0.00%)
426,613,680,170 cpu_core/L1-dcache-loads/ (87.50%)
<not supported> cpu_atom/L1-dcache-load-misses/
34,273,582,785 cpu_core/L1-dcache-load-misses/ (87.50%)
<not counted> cpu_atom/LLC-load-misses/ (0.00%)
143,636,276 cpu_core/LLC-load-misses/ (87.50%)
<not counted> cpu_atom/L1-icache-load-misses/ (0.00%)
176,789,449,722 cpu_core/L1-icache-load-misses/ (87.53%)
@cyyself
cyyself / verilator_transform.sh
Last active July 14, 2024 11:18
sed -i 's/\*\ vlSelf/\&\ vlSelf/g' *.cpp *.h
sed -i 's/vlSelf->/vlSelf./g' *.cpp *.h
sed -i 's/\&(vlSymsp->TOP)/vlSymsp->TOP/g' *.cpp *.h
sed -i 's/(\&vlSymsp->TOP__t)/(vlSymsp->TOP__t)/g' *.cpp *.h
sed -i 's/rootp{vlSymsp->TOP}/rootp{\&(vlSymsp->TOP)}/g' *.cpp *.h
sed -i 's/___024unit\*\ vlSelf/___024unit\&\ vlSelf/g' *.cpp *.h
sed -i 's/ctor_var_reset(this);/ctor_var_reset(*this);/g' *.cpp *.h
@cyyself
cyyself / verilator_performance.txt
Created July 12, 2024 08:19
base commit 6882f8c55e:
➜ XiangShan git:(master) ✗ numactl --physcpubind=0-7,16-23 perf stat -e L1-dcache-load-misses -e L1-icache-load-misses -e branch-misses -e branch-load-misses -e cpu-cycles -e instructions -e stalled-cycles-frontend -e stalled-cycles-backend -e branch-instructions sh -c "./build/emu --no-diff -i /nfs/home/chenyangyu/xs-env/XiangShan/ready-to-run/coremark-2-iteration.bin 2>/dev/null"
emu compiled at Jul 11 2024, 18:09:34
Using simulated 32768B flash
Using simulated 8192MB RAM
The image is /nfs/home/chenyangyu/xs-env/XiangShan/ready-to-run/coremark-2-iteration.bin
Running CoreMark for 2 iterations
2K performance run parameters for coremark.
CoreMark Size : 666
@cyyself
cyyself / k1-mainline-opensbi.md
Last active July 6, 2024 08:47
Replace OpenSBI on Spacemit K1

Steps to replace OpenSBI on Spacemit K1

The Spacemit Version of OpenSBI is outdated and disabled printf and consumes the wrong dts with wrong isa string, causing some debugging features that needs printf does not work, and zicboz can not be activated.

This file will tell you how to replace OpenSBI to mainline (v1.4+) on Spacemit K1, and it also compatible with factory sdk kernel.

Prerequisites

You have flashed Bianbu or Armbian for BPI-F3 and flashed to SD Card.

@cyyself
cyyself / k1_cpu_node_gen.php
Created June 16, 2024 17:30
<?php
for ($i=0;$i<8;$i++) {
?>
cpu_<?php echo $i; ?>: cpu@<?php echo $i; ?> {
compatible = "spacemit,x60", "riscv";
device_type = "cpu";
reg = <<?php echo $i; ?>>;
riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
riscv,isa-base = "rv64i";
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",