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@dbwodlf3
dbwodlf3 / About.html
Last active April 26, 2018 10:45
Django Webpage Templates:: templates/webPage/
{% extends "webPage/layout.html" %}
{% block body %}
<h1>This Page is About!</h1>
{% endblock %}
@dbwodlf3
dbwodlf3 / Views.py
Last active April 26, 2018 10:46
Django Webpage Views.py
from django.shortcuts import render
from django.http import HttpResponse,HttpResponseRedirect
from django.views import View
from django.contrib.auth.mixins import LoginRequiredMixin
from django.core.exceptions import ObjectDoesNotExist
from .forms import BoardPostForm
from .models import BoardPost
from datetime import datetime
@dbwodlf3
dbwodlf3 / urls.py
Created April 26, 2018 10:47
Django webPage urls.py
from django.urls import path, include
from .views import *
urlpatterns = [
path('home/', Home),
path('news/', News),
path('contact/', Contact),
path('about/', About),
path('board/<int:pageNumber>', BoardViewer.as_view()),
path('board/', BoardViewerRedirect),
@dbwodlf3
dbwodlf3 / InstructionSet.md
Last active June 29, 2018 02:47
Basic Instruction Set
Instruction Name Operation ID Format Binary
write 0000 constant
(MBR <- Constant)
ex)
write 1111
write 0110
(MBR) == 1111 0110)
write 1010
(MBR == 1010 0110)
write 1000
(MBR == 1010 1000)
0000 xxxx
save 0001 Reg, Address
(Address <- Reg)
xx | xx
0001 xx xx
load 0010 Reg, Address
(Reg <- Address)
0010 xx xx
jump 0011 Reg
(PCR <- Reg)
0011 00 xx
beq 0100 Reg2~3
(branch to address of Reg2 or Reg3 data, if Reg0 and Reg1 are equal)
0100 00 1x
bne 0101 Reg2~3
(branch to address of Reg2 or Reg3 data, if Reg0 and Reg1 are not equal)
bgt 0110 Reg2~3
(branch to address of Reg2 or Reg3 data, if Reg0 is greater than Reg1)
0110 00 1x
regwrite 0111 Reg (Reg <- MBR) 0111 00 xx
Microcode instruction flags
Load to MBR 00
Write to MBR 01
Directly Write to MBR 10
Load to MBR Select Loading
Register Output 00
RAM Output 01
@dbwodlf3
dbwodlf3 / 16bitISA.md
Last active August 22, 2018 04:31
Simple 16 bit RISC Instruction Set Architecture
Instruction Name Operation ID Format Binary
(0) noOperation 0000 do not anything 0000 0000 0000 0000
(1) ALU+ 0001 RegC <- ALU+(RegA, RegB) 0001 xxxx xxxx xxxx
(2) ALU- 0010 RegC <- ALU-(RegA, RegB) 0010 xxxx xxxx xxxx
(3) ALU* 0011 RegC <- ALU*(RegA, RegB) 0011 xxxx xxxx xxxx
(4) ALU/ 0100 RegC <- ALU/(RegA, RegB) 0100 xxxx xxxx xxxx
(5) Store Register 0101 RegC <- MBR 0101 xxxx 0000 0000
(6) Load Register 0110 MBR <- RegC 0110 xxxx 0000 0000
(7) Store Memory 0111 RAM(Memory Address) <- MBR 0111 xxxx xxxx xxxx
@dbwodlf3
dbwodlf3 / SimpleAssembler.py
Last active August 19, 2018 10:48
Simple 16bit CPU Assembler
import sys
#주먹구구식.. 일단은 돌아가게 만들었다.
#Token 정의하기!
##Instruction Identifer
IID = {
"no":"0",
"alu+":"1",
"alu-":"2",
"alu*":"3",
@dbwodlf3
dbwodlf3 / user.js
Created December 8, 2019 12:48 — forked from EtienneR/user.js
XMLHttpRequest RESTful (GET, POST, PUT, DELETE)
// Get all users
var url = "http://localhost:8080/api/v1/users";
var xhr = new XMLHttpRequest()
xhr.open('GET', url, true)
xhr.onload = function () {
var users = JSON.parse(xhr.responseText);
if (xhr.readyState == 4 && xhr.status == "200") {
console.table(users);
} else {
console.error(users);

Introduction

  • C-a == Ctrl-a
  • M-a == Alt-a

General

:q        close
:w        write/saves
:wa[!]    write/save all windows [force]
:wq       write/save and close
@dbwodlf3
dbwodlf3 / cmake-tutorial.md
Created March 5, 2020 13:39 — forked from luncliff/cmake-tutorial.md
CMake 할때 쪼오오금 도움이 되는 문서

CMake를 왜 쓰는거죠?
좋은 툴은 Visual Studio 뿐입니다. 그 이외에는 전부 사도(邪道)입니다 사도! - 작성자

주의

  • 이 문서는 CMake를 주관적으로 서술합니다
  • 이 문서를 통해 CMake를 시작하기엔 적합하지 않습니다
    https://cgold.readthedocs.io/en/latest/ 3.1 챕터까지 따라해본 이후 기본사항들을 속성으로 익히는 것을 돕기위한 보조자료로써 작성되었습니다