Created
February 24, 2019 19:29
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// Reading file 'forth-cpu-u4k.asc'.. | |
module chip (input MOSI, input nCS, input pin_23, inout [4:0] \pins , input SCK); | |
wire n1; | |
// (0, 0, 'glb_netwk_0') | |
// (5, 11, 'lutff_global/s_r') | |
// (5, 19, 'lutff_global/s_r') | |
// (5, 20, 'lutff_global/s_r') | |
// (7, 19, 'lutff_global/s_r') | |
// (7, 20, 'lutff_global/s_r') | |
// (9, 8, 'neigh_op_tnr_2') | |
// (9, 9, 'neigh_op_rgt_2') | |
// (9, 9, 'sp4_h_r_9') | |
// (9, 10, 'neigh_op_bnr_2') | |
// (10, 8, 'neigh_op_top_2') | |
// (10, 9, 'lutff_2/out') | |
// (10, 9, 'sp4_h_r_20') | |
// (10, 9, 'sp4_h_r_4') | |
// (10, 10, 'neigh_op_bot_2') | |
// (10, 11, 'lutff_global/s_r') | |
// (10, 13, 'lutff_global/s_r') | |
// (10, 14, 'lutff_global/s_r') | |
// (10, 15, 'lutff_global/s_r') | |
// (11, 8, 'neigh_op_tnl_2') | |
// (11, 9, 'neigh_op_lft_2') | |
// (11, 9, 'sp4_h_r_17') | |
// (11, 9, 'sp4_h_r_33') | |
// (11, 10, 'neigh_op_bnl_2') | |
// (11, 14, 'lutff_global/s_r') | |
// (12, 1, 'sp4_r_v_b_0') | |
// (12, 2, 'sp4_r_v_b_37') | |
// (12, 3, 'sp4_r_v_b_24') | |
// (12, 4, 'sp4_r_v_b_13') | |
// (12, 5, 'sp4_r_v_b_0') | |
// (12, 6, 'sp4_r_v_b_44') | |
// (12, 7, 'sp4_r_v_b_33') | |
// (12, 8, 'sp4_r_v_b_20') | |
// (12, 9, 'sp4_h_r_28') | |
// (12, 9, 'sp4_h_r_44') | |
// (12, 9, 'sp4_r_v_b_9') | |
// (13, 0, 'fabout') | |
// (13, 0, 'local_g1_0') | |
// (13, 0, 'span4_vert_0') | |
// (13, 1, 'sp4_v_b_0') | |
// (13, 1, 'sp4_v_t_37') | |
// (13, 2, 'sp4_v_b_37') | |
// (13, 3, 'sp4_v_b_24') | |
// (13, 4, 'sp4_v_b_13') | |
// (13, 5, 'sp4_v_b_0') | |
// (13, 5, 'sp4_v_t_44') | |
// (13, 6, 'sp4_v_b_44') | |
// (13, 7, 'sp4_v_b_33') | |
// (13, 8, 'sp4_v_b_20') | |
// (13, 9, 'sp4_h_l_44') | |
// (13, 9, 'sp4_h_r_41') | |
// (13, 9, 'sp4_h_r_5') | |
// (13, 9, 'sp4_v_b_9') | |
// (14, 2, 'lutff_global/s_r') | |
// (14, 9, 'sp4_h_l_41') | |
// (14, 9, 'sp4_h_r_0') | |
// (14, 9, 'sp4_h_r_16') | |
// (15, 2, 'lutff_global/s_r') | |
// (15, 9, 'sp4_h_r_13') | |
// (15, 9, 'sp4_h_r_29') | |
// (16, 2, 'lutff_global/s_r') | |
// (16, 7, 'lutff_global/s_r') | |
// (16, 8, 'lutff_global/s_r') | |
// (16, 9, 'sp4_h_r_24') | |
// (16, 9, 'sp4_h_r_40') | |
// (16, 10, 'lutff_global/s_r') | |
// (16, 15, 'lutff_global/s_r') | |
// (17, 6, 'sp4_r_v_b_43') | |
// (17, 7, 'sp4_r_v_b_30') | |
// (17, 8, 'local_g3_3') | |
// (17, 8, 'lutff_4/in_2') | |
// (17, 8, 'sp4_r_v_b_19') | |
// (17, 9, 'sp4_h_l_40') | |
// (17, 9, 'sp4_h_r_37') | |
// (17, 9, 'sp4_h_r_8') | |
// (17, 9, 'sp4_r_v_b_6') | |
// (17, 10, 'sp4_r_v_b_40') | |
// (17, 11, 'lutff_global/s_r') | |
// (17, 11, 'sp4_r_v_b_29') | |
// (17, 12, 'sp4_r_v_b_16') | |
// (17, 13, 'lutff_global/s_r') | |
// (17, 13, 'sp4_r_v_b_5') | |
// (17, 14, 'sp4_r_v_b_36') | |
// (17, 15, 'sp4_r_v_b_25') | |
// (17, 16, 'lutff_global/s_r') | |
// (17, 16, 'sp4_r_v_b_12') | |
// (17, 17, 'sp4_r_v_b_1') | |
// (18, 5, 'sp4_v_t_43') | |
// (18, 6, 'sp4_v_b_43') | |
// (18, 7, 'sp4_v_b_30') | |
// (18, 8, 'local_g1_3') | |
// (18, 8, 'lutff_1/in_3') | |
// (18, 8, 'sp4_v_b_19') | |
// (18, 9, 'local_g0_3') | |
// (18, 9, 'lutff_2/in_1') | |
// (18, 9, 'lutff_3/in_0') | |
// (18, 9, 'lutff_4/in_3') | |
// (18, 9, 'lutff_6/in_1') | |
// (18, 9, 'sp4_h_l_37') | |
// (18, 9, 'sp4_h_r_21') | |
// (18, 9, 'sp4_h_r_3') | |
// (18, 9, 'sp4_v_b_6') | |
// (18, 9, 'sp4_v_t_40') | |
// (18, 10, 'sp4_v_b_40') | |
// (18, 11, 'lutff_global/s_r') | |
// (18, 11, 'sp4_v_b_29') | |
// (18, 12, 'sp4_v_b_16') | |
// (18, 13, 'sp4_v_b_5') | |
// (18, 13, 'sp4_v_t_36') | |
// (18, 14, 'sp4_v_b_36') | |
// (18, 15, 'local_g2_1') | |
// (18, 15, 'lutff_0/in_3') | |
// (18, 15, 'lutff_1/in_0') | |
// (18, 15, 'lutff_2/in_1') | |
// (18, 15, 'lutff_5/in_0') | |
// (18, 15, 'lutff_6/in_1') | |
// (18, 15, 'lutff_7/in_0') | |
// (18, 15, 'sp4_v_b_25') | |
// (18, 16, 'sp4_v_b_12') | |
// (18, 17, 'sp4_v_b_1') | |
// (19, 9, 'sp4_h_r_14') | |
// (19, 9, 'sp4_h_r_32') | |
// (20, 9, 'local_g2_3') | |
// (20, 9, 'lutff_1/in_0') | |
// (20, 9, 'lutff_4/in_1') | |
// (20, 9, 'lutff_7/in_0') | |
// (20, 9, 'sp4_h_r_27') | |
// (20, 9, 'sp4_h_r_45') | |
// (20, 10, 'sp4_r_v_b_45') | |
// (20, 11, 'sp4_r_v_b_32') | |
// (20, 12, 'sp4_r_v_b_21') | |
// (20, 13, 'sp4_r_v_b_8') | |
// (20, 14, 'sp4_r_v_b_41') | |
// (20, 15, 'local_g1_4') | |
// (20, 15, 'lutff_0/in_3') | |
// (20, 15, 'lutff_6/in_3') | |
// (20, 15, 'lutff_7/in_2') | |
// (20, 15, 'lutff_global/s_r') | |
// (20, 15, 'sp4_r_v_b_28') | |
// (20, 16, 'sp4_r_v_b_17') | |
// (20, 17, 'sp4_r_v_b_4') | |
// (21, 9, 'sp4_h_l_45') | |
// (21, 9, 'sp4_h_r_38') | |
// (21, 9, 'sp4_v_t_45') | |
// (21, 10, 'lutff_global/s_r') | |
// (21, 10, 'sp4_v_b_45') | |
// (21, 11, 'lutff_global/s_r') | |
// (21, 11, 'sp4_v_b_32') | |
// (21, 12, 'sp4_v_b_21') | |
// (21, 13, 'sp4_v_b_8') | |
// (21, 13, 'sp4_v_t_41') | |
// (21, 14, 'sp4_v_b_41') | |
// (21, 15, 'sp4_v_b_28') | |
// (21, 16, 'sp4_v_b_17') | |
// (21, 17, 'sp4_v_b_4') | |
// (22, 9, 'sp4_h_l_38') | |
wire n2; | |
// (0, 0, 'glb_netwk_1') | |
// (4, 13, 'lutff_global/cen') | |
// (5, 14, 'lutff_global/cen') | |
// (7, 13, 'lutff_global/cen') | |
// (7, 14, 'lutff_global/cen') | |
// (9, 6, 'neigh_op_tnr_3') | |
// (9, 7, 'neigh_op_rgt_3') | |
// (9, 7, 'sp4_h_r_11') | |
// (9, 7, 'sp4_r_v_b_38') | |
// (9, 8, 'neigh_op_bnr_3') | |
// (9, 8, 'sp4_r_v_b_27') | |
// (9, 9, 'local_g2_6') | |
// (9, 9, 'lutff_7/in_3') | |
// (9, 9, 'sp4_r_v_b_14') | |
// (9, 10, 'sp4_r_v_b_3') | |
// (10, 6, 'neigh_op_top_3') | |
// (10, 6, 'sp4_v_t_38') | |
// (10, 7, 'lutff_3/out') | |
// (10, 7, 'sp4_h_r_22') | |
// (10, 7, 'sp4_v_b_38') | |
// (10, 8, 'neigh_op_bot_3') | |
// (10, 8, 'sp4_v_b_27') | |
// (10, 9, 'lutff_global/cen') | |
// (10, 9, 'sp4_v_b_14') | |
// (10, 10, 'sp4_v_b_3') | |
// (11, 6, 'neigh_op_tnl_3') | |
// (11, 7, 'neigh_op_lft_3') | |
// (11, 7, 'sp4_h_r_35') | |
// (11, 8, 'neigh_op_bnl_3') | |
// (12, 7, 'sp4_h_r_46') | |
// (12, 8, 'sp4_r_v_b_41') | |
// (12, 9, 'sp4_r_v_b_28') | |
// (12, 10, 'sp4_r_v_b_17') | |
// (12, 11, 'sp4_r_v_b_4') | |
// (12, 12, 'sp4_r_v_b_42') | |
// (12, 13, 'sp4_r_v_b_31') | |
// (12, 14, 'sp4_r_v_b_18') | |
// (12, 15, 'sp4_r_v_b_7') | |
// (12, 16, 'sp4_r_v_b_47') | |
// (12, 17, 'sp4_r_v_b_34') | |
// (12, 18, 'sp4_r_v_b_23') | |
// (12, 19, 'sp4_r_v_b_10') | |
// (12, 20, 'sp4_r_v_b_36') | |
// (13, 7, 'sp4_h_l_46') | |
// (13, 7, 'sp4_v_t_41') | |
// (13, 8, 'sp4_v_b_41') | |
// (13, 9, 'sp4_v_b_28') | |
// (13, 10, 'sp4_v_b_17') | |
// (13, 11, 'sp4_v_b_4') | |
// (13, 11, 'sp4_v_t_42') | |
// (13, 12, 'sp4_v_b_42') | |
// (13, 13, 'sp4_v_b_31') | |
// (13, 14, 'sp4_v_b_18') | |
// (13, 15, 'sp4_v_b_7') | |
// (13, 15, 'sp4_v_t_47') | |
// (13, 16, 'sp4_v_b_47') | |
// (13, 17, 'sp4_v_b_34') | |
// (13, 18, 'sp4_v_b_23') | |
// (13, 19, 'sp4_v_b_10') | |
// (13, 19, 'sp4_v_t_36') | |
// (13, 20, 'sp4_v_b_36') | |
// (13, 21, 'fabout') | |
// (13, 21, 'local_g0_1') | |
// (13, 21, 'span4_vert_25') | |
wire pin_23; | |
// (0, 0, 'glb_netwk_4') | |
// (3, 10, 'lutff_global/clk') | |
// (3, 11, 'lutff_global/clk') | |
// (4, 10, 'lutff_global/clk') | |
// (4, 13, 'lutff_global/clk') | |
// (5, 10, 'lutff_global/clk') | |
// (5, 11, 'lutff_global/clk') | |
// (5, 12, 'lutff_global/clk') | |
// (5, 13, 'lutff_global/clk') | |
// (5, 14, 'lutff_global/clk') | |
// (5, 19, 'lutff_global/clk') | |
// (5, 20, 'lutff_global/clk') | |
// (6, 13, 'ram/RCLK') | |
// (6, 14, 'ram/WCLK') | |
// (7, 10, 'lutff_global/clk') | |
// (7, 11, 'lutff_global/clk') | |
// (7, 12, 'lutff_global/clk') | |
// (7, 13, 'lutff_global/clk') | |
// (7, 14, 'lutff_global/clk') | |
// (7, 19, 'lutff_global/clk') | |
// (7, 20, 'lutff_global/clk') | |
// (8, 7, 'lutff_global/clk') | |
// (8, 13, 'lutff_global/clk') | |
// (9, 7, 'lutff_global/clk') | |
// (9, 8, 'lutff_global/clk') | |
// (9, 9, 'lutff_global/clk') | |
// (10, 4, 'lutff_global/clk') | |
// (10, 7, 'lutff_global/clk') | |
// (10, 9, 'lutff_global/clk') | |
// (10, 10, 'lutff_global/clk') | |
// (10, 11, 'lutff_global/clk') | |
// (10, 13, 'lutff_global/clk') | |
// (10, 14, 'lutff_global/clk') | |
// (10, 15, 'lutff_global/clk') | |
// (11, 12, 'lutff_global/clk') | |
// (11, 14, 'lutff_global/clk') | |
// (12, 3, 'lutff_global/clk') | |
// (12, 12, 'lutff_global/clk') | |
// (12, 13, 'lutff_global/clk') | |
// (13, 13, 'lutff_global/clk') | |
// (13, 15, 'lutff_global/clk') | |
// (14, 2, 'lutff_global/clk') | |
// (14, 11, 'lutff_global/clk') | |
// (14, 13, 'lutff_global/clk') | |
// (14, 15, 'lutff_global/clk') | |
// (15, 2, 'lutff_global/clk') | |
// (15, 7, 'lutff_global/clk') | |
// (15, 12, 'lutff_global/clk') | |
// (15, 14, 'lutff_global/clk') | |
// (15, 15, 'lutff_global/clk') | |
// (16, 2, 'lutff_global/clk') | |
// (16, 7, 'lutff_global/clk') | |
// (16, 8, 'lutff_global/clk') | |
// (16, 9, 'lutff_global/clk') | |
// (16, 10, 'lutff_global/clk') | |
// (16, 11, 'lutff_global/clk') | |
// (16, 12, 'lutff_global/clk') | |
// (16, 13, 'lutff_global/clk') | |
// (16, 14, 'lutff_global/clk') | |
// (16, 15, 'lutff_global/clk') | |
// (17, 4, 'lutff_global/clk') | |
// (17, 8, 'lutff_global/clk') | |
// (17, 9, 'lutff_global/clk') | |
// (17, 10, 'lutff_global/clk') | |
// (17, 11, 'lutff_global/clk') | |
// (17, 12, 'lutff_global/clk') | |
// (17, 13, 'lutff_global/clk') | |
// (17, 14, 'lutff_global/clk') | |
// (17, 15, 'lutff_global/clk') | |
// (17, 16, 'lutff_global/clk') | |
// (18, 3, 'lutff_global/clk') | |
// (18, 9, 'lutff_global/clk') | |
// (18, 10, 'lutff_global/clk') | |
// (18, 11, 'lutff_global/clk') | |
// (18, 12, 'lutff_global/clk') | |
// (18, 13, 'lutff_global/clk') | |
// (18, 15, 'lutff_global/clk') | |
// (19, 9, 'ram/RCLK') | |
// (19, 10, 'ram/WCLK') | |
// (19, 11, 'ram/RCLK') | |
// (19, 12, 'ram/WCLK') | |
// (19, 15, 'ram/RCLK') | |
// (19, 16, 'ram/WCLK') | |
// (19, 21, 'io_0/PAD') | |
// (19, 21, 'padin_0') | |
// (20, 9, 'lutff_global/clk') | |
// (20, 10, 'lutff_global/clk') | |
// (20, 11, 'lutff_global/clk') | |
// (20, 12, 'lutff_global/clk') | |
// (20, 14, 'lutff_global/clk') | |
// (20, 15, 'lutff_global/clk') | |
// (21, 1, 'lutff_global/clk') | |
// (21, 10, 'lutff_global/clk') | |
// (21, 11, 'lutff_global/clk') | |
// (23, 4, 'lutff_global/clk') | |
wire n4; | |
// (0, 0, 'glb_netwk_7') | |
// (5, 11, 'lutff_global/cen') | |
// (5, 20, 'lutff_global/cen') | |
// (7, 20, 'lutff_global/cen') | |
// (13, 13, 'neigh_op_tnr_3') | |
// (13, 14, 'neigh_op_rgt_3') | |
// (13, 15, 'neigh_op_bnr_3') | |
// (14, 7, 'sp4_r_v_b_47') | |
// (14, 8, 'sp4_r_v_b_34') | |
// (14, 9, 'sp4_r_v_b_23') | |
// (14, 10, 'sp4_r_v_b_10') | |
// (14, 11, 'sp4_r_v_b_42') | |
// (14, 12, 'sp4_r_v_b_31') | |
// (14, 13, 'neigh_op_top_3') | |
// (14, 13, 'sp4_r_v_b_18') | |
// (14, 14, 'lutff_3/out') | |
// (14, 14, 'sp4_r_v_b_7') | |
// (14, 15, 'neigh_op_bot_3') | |
// (15, 2, 'lutff_global/cen') | |
// (15, 6, 'sp4_h_r_10') | |
// (15, 6, 'sp4_v_t_47') | |
// (15, 7, 'sp4_v_b_47') | |
// (15, 8, 'sp4_v_b_34') | |
// (15, 9, 'sp4_v_b_23') | |
// (15, 10, 'sp4_v_b_10') | |
// (15, 10, 'sp4_v_t_42') | |
// (15, 11, 'sp4_v_b_42') | |
// (15, 12, 'sp4_v_b_31') | |
// (15, 13, 'neigh_op_tnl_3') | |
// (15, 13, 'sp4_v_b_18') | |
// (15, 14, 'neigh_op_lft_3') | |
// (15, 14, 'sp4_v_b_7') | |
// (15, 15, 'neigh_op_bnl_3') | |
// (16, 2, 'lutff_global/cen') | |
// (16, 6, 'sp4_h_r_23') | |
// (16, 10, 'lutff_global/cen') | |
// (17, 6, 'sp4_h_r_34') | |
// (17, 11, 'lutff_global/cen') | |
// (17, 13, 'lutff_global/cen') | |
// (18, 1, 'sp4_r_v_b_23') | |
// (18, 2, 'sp4_r_v_b_10') | |
// (18, 3, 'sp4_r_v_b_47') | |
// (18, 4, 'sp4_r_v_b_34') | |
// (18, 5, 'sp4_r_v_b_23') | |
// (18, 6, 'sp4_h_r_47') | |
// (18, 6, 'sp4_r_v_b_10') | |
// (18, 11, 'lutff_global/cen') | |
// (19, 0, 'fabout') | |
// (19, 0, 'local_g0_7') | |
// (19, 0, 'span4_vert_23') | |
// (19, 1, 'sp4_v_b_23') | |
// (19, 2, 'sp4_v_b_10') | |
// (19, 2, 'sp4_v_t_47') | |
// (19, 3, 'sp4_v_b_47') | |
// (19, 4, 'sp4_v_b_34') | |
// (19, 5, 'sp4_v_b_23') | |
// (19, 6, 'sp4_h_l_47') | |
// (19, 6, 'sp4_v_b_10') | |
// (21, 10, 'lutff_global/cen') | |
// (21, 11, 'lutff_global/cen') | |
wire n5; | |
// (0, 10, 'sp4_h_r_27') | |
// (1, 10, 'sp4_h_r_38') | |
// (2, 9, 'neigh_op_tnr_7') | |
// (2, 10, 'neigh_op_rgt_7') | |
// (2, 10, 'sp4_h_l_38') | |
// (2, 10, 'sp4_h_r_3') | |
// (2, 10, 'sp4_h_r_6') | |
// (2, 11, 'neigh_op_bnr_7') | |
// (3, 9, 'neigh_op_top_7') | |
// (3, 10, 'local_g1_3') | |
// (3, 10, 'lutff_7/out') | |
// (3, 10, 'lutff_global/cen') | |
// (3, 10, 'sp4_h_r_14') | |
// (3, 10, 'sp4_h_r_19') | |
// (3, 11, 'neigh_op_bot_7') | |
// (4, 9, 'neigh_op_tnl_7') | |
// (4, 10, 'neigh_op_lft_7') | |
// (4, 10, 'sp4_h_r_27') | |
// (4, 10, 'sp4_h_r_30') | |
// (4, 11, 'neigh_op_bnl_7') | |
// (5, 10, 'sp4_h_r_38') | |
// (5, 10, 'sp4_h_r_43') | |
// (6, 10, 'sp4_h_l_38') | |
// (6, 10, 'sp4_h_l_43') | |
wire n6; | |
// (0, 19, 'local_g0_6') | |
// (0, 19, 'local_g1_6') | |
// (0, 19, 'lutff_0/in_1') | |
// (0, 19, 'lutff_7/in_3') | |
// (0, 19, 'sp4_h_r_22') | |
// (1, 19, 'sp4_h_r_35') | |
// (2, 19, 'sp4_h_r_46') | |
// (3, 10, 'sp4_r_v_b_45') | |
// (3, 11, 'sp4_r_v_b_32') | |
// (3, 12, 'sp4_r_v_b_21') | |
// (3, 13, 'sp4_r_v_b_8') | |
// (3, 14, 'sp4_r_v_b_40') | |
// (3, 15, 'sp4_r_v_b_29') | |
// (3, 16, 'sp4_r_v_b_16') | |
// (3, 17, 'sp4_r_v_b_5') | |
// (3, 19, 'sp4_h_l_46') | |
// (3, 19, 'sp4_h_r_8') | |
// (4, 9, 'sp4_v_t_45') | |
// (4, 10, 'local_g2_5') | |
// (4, 10, 'lutff_4/in_1') | |
// (4, 10, 'sp4_v_b_45') | |
// (4, 11, 'sp4_v_b_32') | |
// (4, 12, 'sp4_v_b_21') | |
// (4, 13, 'sp4_v_b_8') | |
// (4, 13, 'sp4_v_t_40') | |
// (4, 14, 'sp4_v_b_40') | |
// (4, 15, 'sp4_v_b_29') | |
// (4, 16, 'sp4_v_b_16') | |
// (4, 17, 'sp4_h_r_5') | |
// (4, 17, 'sp4_v_b_5') | |
// (4, 19, 'sp4_h_r_21') | |
// (5, 12, 'local_g3_2') | |
// (5, 12, 'lutff_3/in_2') | |
// (5, 12, 'sp4_r_v_b_42') | |
// (5, 13, 'sp4_r_v_b_31') | |
// (5, 14, 'sp4_r_v_b_18') | |
// (5, 14, 'sp4_r_v_b_36') | |
// (5, 15, 'sp4_r_v_b_25') | |
// (5, 15, 'sp4_r_v_b_7') | |
// (5, 16, 'sp4_r_v_b_12') | |
// (5, 17, 'sp4_h_r_16') | |
// (5, 17, 'sp4_r_v_b_1') | |
// (5, 19, 'sp4_h_r_32') | |
// (6, 10, 'sp4_r_v_b_38') | |
// (6, 10, 'sp4_r_v_b_40') | |
// (6, 11, 'sp4_r_v_b_27') | |
// (6, 11, 'sp4_r_v_b_29') | |
// (6, 11, 'sp4_v_t_42') | |
// (6, 12, 'sp4_r_v_b_14') | |
// (6, 12, 'sp4_r_v_b_16') | |
// (6, 12, 'sp4_v_b_42') | |
// (6, 13, 'local_g1_3') | |
// (6, 13, 'local_g1_5') | |
// (6, 13, 'ram/RCLKE') | |
// (6, 13, 'ram/RE') | |
// (6, 13, 'sp4_r_v_b_3') | |
// (6, 13, 'sp4_r_v_b_5') | |
// (6, 13, 'sp4_v_b_31') | |
// (6, 13, 'sp4_v_t_36') | |
// (6, 14, 'local_g2_4') | |
// (6, 14, 'ram/WE') | |
// (6, 14, 'sp4_r_v_b_37') | |
// (6, 14, 'sp4_v_b_18') | |
// (6, 14, 'sp4_v_b_36') | |
// (6, 15, 'sp4_h_r_2') | |
// (6, 15, 'sp4_r_v_b_24') | |
// (6, 15, 'sp4_v_b_25') | |
// (6, 15, 'sp4_v_b_7') | |
// (6, 16, 'sp4_r_v_b_13') | |
// (6, 16, 'sp4_v_b_12') | |
// (6, 17, 'sp4_h_r_1') | |
// (6, 17, 'sp4_h_r_29') | |
// (6, 17, 'sp4_r_v_b_0') | |
// (6, 17, 'sp4_v_b_1') | |
// (6, 19, 'sp4_h_r_45') | |
// (7, 9, 'sp4_v_t_38') | |
// (7, 9, 'sp4_v_t_40') | |
// (7, 10, 'sp4_v_b_38') | |
// (7, 10, 'sp4_v_b_40') | |
// (7, 11, 'sp4_v_b_27') | |
// (7, 11, 'sp4_v_b_29') | |
// (7, 12, 'sp4_v_b_14') | |
// (7, 12, 'sp4_v_b_16') | |
// (7, 13, 'sp4_h_r_5') | |
// (7, 13, 'sp4_v_b_3') | |
// (7, 13, 'sp4_v_b_5') | |
// (7, 13, 'sp4_v_t_37') | |
// (7, 14, 'sp4_v_b_37') | |
// (7, 15, 'sp4_h_r_15') | |
// (7, 15, 'sp4_v_b_24') | |
// (7, 16, 'sp4_v_b_13') | |
// (7, 17, 'sp4_h_r_12') | |
// (7, 17, 'sp4_h_r_40') | |
// (7, 17, 'sp4_h_r_7') | |
// (7, 17, 'sp4_v_b_0') | |
// (7, 19, 'sp4_h_l_45') | |
// (7, 19, 'sp4_h_r_8') | |
// (8, 13, 'sp4_h_r_16') | |
// (8, 15, 'sp4_h_r_26') | |
// (8, 17, 'sp4_h_l_40') | |
// (8, 17, 'sp4_h_r_18') | |
// (8, 17, 'sp4_h_r_2') | |
// (8, 17, 'sp4_h_r_25') | |
// (8, 19, 'sp4_h_r_21') | |
// (9, 8, 'local_g3_0') | |
// (9, 8, 'lutff_7/in_0') | |
// (9, 8, 'sp4_r_v_b_40') | |
// (9, 9, 'sp4_r_v_b_29') | |
// (9, 10, 'sp4_r_v_b_16') | |
// (9, 11, 'sp4_r_v_b_5') | |
// (9, 12, 'sp4_r_v_b_40') | |
// (9, 13, 'sp4_h_r_29') | |
// (9, 13, 'sp4_r_v_b_29') | |
// (9, 14, 'sp4_r_v_b_16') | |
// (9, 15, 'sp4_h_r_39') | |
// (9, 15, 'sp4_r_v_b_5') | |
// (9, 16, 'neigh_op_tnr_5') | |
// (9, 16, 'sp4_r_v_b_39') | |
// (9, 17, 'neigh_op_rgt_5') | |
// (9, 17, 'sp4_h_r_15') | |
// (9, 17, 'sp4_h_r_31') | |
// (9, 17, 'sp4_h_r_36') | |
// (9, 17, 'sp4_r_v_b_26') | |
// (9, 18, 'neigh_op_bnr_5') | |
// (9, 18, 'sp4_r_v_b_15') | |
// (9, 19, 'sp4_h_r_32') | |
// (9, 19, 'sp4_r_v_b_2') | |
// (10, 7, 'sp4_v_t_40') | |
// (10, 8, 'sp4_v_b_40') | |
// (10, 9, 'sp4_v_b_29') | |
// (10, 10, 'sp4_r_v_b_46') | |
// (10, 10, 'sp4_v_b_16') | |
// (10, 11, 'sp4_r_v_b_35') | |
// (10, 11, 'sp4_v_b_5') | |
// (10, 11, 'sp4_v_t_40') | |
// (10, 12, 'sp4_r_v_b_22') | |
// (10, 12, 'sp4_v_b_40') | |
// (10, 13, 'sp4_h_r_40') | |
// (10, 13, 'sp4_r_v_b_11') | |
// (10, 13, 'sp4_v_b_29') | |
// (10, 14, 'sp4_r_v_b_46') | |
// (10, 14, 'sp4_v_b_16') | |
// (10, 15, 'sp4_h_l_39') | |
// (10, 15, 'sp4_h_r_2') | |
// (10, 15, 'sp4_r_v_b_35') | |
// (10, 15, 'sp4_v_b_5') | |
// (10, 15, 'sp4_v_t_39') | |
// (10, 16, 'neigh_op_top_5') | |
// (10, 16, 'sp4_r_v_b_22') | |
// (10, 16, 'sp4_r_v_b_38') | |
// (10, 16, 'sp4_v_b_39') | |
// (10, 17, 'lutff_5/out') | |
// (10, 17, 'sp4_h_l_36') | |
// (10, 17, 'sp4_h_r_10') | |
// (10, 17, 'sp4_h_r_26') | |
// (10, 17, 'sp4_h_r_42') | |
// (10, 17, 'sp4_r_v_b_11') | |
// (10, 17, 'sp4_r_v_b_27') | |
// (10, 17, 'sp4_v_b_26') | |
// (10, 18, 'neigh_op_bot_5') | |
// (10, 18, 'sp4_r_v_b_14') | |
// (10, 18, 'sp4_v_b_15') | |
// (10, 19, 'sp4_h_r_45') | |
// (10, 19, 'sp4_r_v_b_3') | |
// (10, 19, 'sp4_v_b_2') | |
// (11, 9, 'sp4_h_r_11') | |
// (11, 9, 'sp4_v_t_46') | |
// (11, 10, 'sp4_v_b_46') | |
// (11, 11, 'sp4_v_b_35') | |
// (11, 12, 'sp4_v_b_22') | |
// (11, 13, 'sp4_h_l_40') | |
// (11, 13, 'sp4_v_b_11') | |
// (11, 13, 'sp4_v_t_46') | |
// (11, 14, 'local_g3_6') | |
// (11, 14, 'lutff_7/in_0') | |
// (11, 14, 'sp4_v_b_46') | |
// (11, 15, 'sp4_h_r_15') | |
// (11, 15, 'sp4_h_r_3') | |
// (11, 15, 'sp4_v_b_35') | |
// (11, 15, 'sp4_v_t_38') | |
// (11, 16, 'neigh_op_tnl_5') | |
// (11, 16, 'sp4_v_b_22') | |
// (11, 16, 'sp4_v_b_38') | |
// (11, 17, 'neigh_op_lft_5') | |
// (11, 17, 'sp4_h_l_42') | |
// (11, 17, 'sp4_h_r_23') | |
// (11, 17, 'sp4_h_r_3') | |
// (11, 17, 'sp4_h_r_39') | |
// (11, 17, 'sp4_v_b_11') | |
// (11, 17, 'sp4_v_b_27') | |
// (11, 18, 'neigh_op_bnl_5') | |
// (11, 18, 'sp4_v_b_14') | |
// (11, 19, 'sp4_h_l_45') | |
// (11, 19, 'sp4_v_b_3') | |
// (12, 9, 'local_g0_6') | |
// (12, 9, 'lutff_5/in_1') | |
// (12, 9, 'sp4_h_r_22') | |
// (12, 15, 'sp4_h_r_14') | |
// (12, 15, 'sp4_h_r_26') | |
// (12, 17, 'sp4_h_l_39') | |
// (12, 17, 'sp4_h_r_14') | |
// (12, 17, 'sp4_h_r_34') | |
// (13, 9, 'sp4_h_r_35') | |
// (13, 15, 'sp4_h_r_27') | |
// (13, 15, 'sp4_h_r_39') | |
// (13, 17, 'sp4_h_r_27') | |
// (13, 17, 'sp4_h_r_47') | |
// (14, 9, 'sp4_h_r_46') | |
// (14, 15, 'sp4_h_l_39') | |
// (14, 15, 'sp4_h_r_38') | |
// (14, 15, 'sp4_h_r_5') | |
// (14, 17, 'sp4_h_l_47') | |
// (14, 17, 'sp4_h_r_10') | |
// (14, 17, 'sp4_h_r_38') | |
// (15, 9, 'sp4_h_l_46') | |
// (15, 9, 'sp4_h_r_11') | |
// (15, 15, 'sp4_h_l_38') | |
// (15, 15, 'sp4_h_r_11') | |
// (15, 15, 'sp4_h_r_16') | |
// (15, 15, 'sp4_h_r_6') | |
// (15, 17, 'sp4_h_l_38') | |
// (15, 17, 'sp4_h_r_23') | |
// (15, 17, 'sp4_h_r_6') | |
// (16, 9, 'local_g1_6') | |
// (16, 9, 'lutff_7/in_2') | |
// (16, 9, 'sp4_h_r_22') | |
// (16, 15, 'sp4_h_r_19') | |
// (16, 15, 'sp4_h_r_22') | |
// (16, 15, 'sp4_h_r_29') | |
// (16, 17, 'sp4_h_r_19') | |
// (16, 17, 'sp4_h_r_34') | |
// (17, 9, 'sp4_h_r_35') | |
// (17, 10, 'sp4_r_v_b_36') | |
// (17, 11, 'sp4_r_v_b_25') | |
// (17, 12, 'sp4_r_v_b_12') | |
// (17, 13, 'sp4_r_v_b_1') | |
// (17, 14, 'sp4_r_v_b_47') | |
// (17, 15, 'local_g3_6') | |
// (17, 15, 'lutff_4/in_3') | |
// (17, 15, 'sp4_h_r_30') | |
// (17, 15, 'sp4_h_r_35') | |
// (17, 15, 'sp4_h_r_40') | |
// (17, 15, 'sp4_r_v_b_34') | |
// (17, 16, 'sp4_r_v_b_23') | |
// (17, 17, 'sp4_h_r_30') | |
// (17, 17, 'sp4_h_r_47') | |
// (17, 17, 'sp4_r_v_b_10') | |
// (18, 8, 'sp4_r_v_b_36') | |
// (18, 9, 'sp4_h_r_1') | |
// (18, 9, 'sp4_h_r_46') | |
// (18, 9, 'sp4_h_r_6') | |
// (18, 9, 'sp4_r_v_b_25') | |
// (18, 9, 'sp4_v_t_36') | |
// (18, 10, 'sp4_r_v_b_12') | |
// (18, 10, 'sp4_v_b_36') | |
// (18, 11, 'sp4_r_v_b_1') | |
// (18, 11, 'sp4_v_b_25') | |
// (18, 12, 'sp4_r_v_b_37') | |
// (18, 12, 'sp4_r_v_b_40') | |
// (18, 12, 'sp4_r_v_b_46') | |
// (18, 12, 'sp4_v_b_12') | |
// (18, 13, 'sp4_r_v_b_24') | |
// (18, 13, 'sp4_r_v_b_29') | |
// (18, 13, 'sp4_r_v_b_35') | |
// (18, 13, 'sp4_v_b_1') | |
// (18, 13, 'sp4_v_t_47') | |
// (18, 14, 'sp4_r_v_b_13') | |
// (18, 14, 'sp4_r_v_b_16') | |
// (18, 14, 'sp4_r_v_b_22') | |
// (18, 14, 'sp4_r_v_b_37') | |
// (18, 14, 'sp4_v_b_47') | |
// (18, 15, 'sp4_h_l_40') | |
// (18, 15, 'sp4_h_r_1') | |
// (18, 15, 'sp4_h_r_43') | |
// (18, 15, 'sp4_h_r_46') | |
// (18, 15, 'sp4_r_v_b_0') | |
// (18, 15, 'sp4_r_v_b_11') | |
// (18, 15, 'sp4_r_v_b_24') | |
// (18, 15, 'sp4_r_v_b_5') | |
// (18, 15, 'sp4_v_b_34') | |
// (18, 16, 'sp4_r_v_b_13') | |
// (18, 16, 'sp4_v_b_23') | |
// (18, 17, 'sp4_h_l_47') | |
// (18, 17, 'sp4_h_r_43') | |
// (18, 17, 'sp4_r_v_b_0') | |
// (18, 17, 'sp4_v_b_10') | |
// (19, 7, 'sp4_v_t_36') | |
// (19, 8, 'sp4_v_b_36') | |
// (19, 9, 'local_g0_4') | |
// (19, 9, 'local_g1_3') | |
// (19, 9, 'ram/RCLKE') | |
// (19, 9, 'ram/RE') | |
// (19, 9, 'sp4_h_l_46') | |
// (19, 9, 'sp4_h_r_12') | |
// (19, 9, 'sp4_h_r_19') | |
// (19, 9, 'sp4_v_b_25') | |
// (19, 10, 'local_g0_4') | |
// (19, 10, 'ram/WE') | |
// (19, 10, 'sp4_v_b_12') | |
// (19, 11, 'local_g0_2') | |
// (19, 11, 'local_g0_4') | |
// (19, 11, 'ram/RCLKE') | |
// (19, 11, 'ram/RE') | |
// (19, 11, 'sp4_h_r_10') | |
// (19, 11, 'sp4_h_r_4') | |
// (19, 11, 'sp4_v_b_1') | |
// (19, 11, 'sp4_v_t_37') | |
// (19, 11, 'sp4_v_t_40') | |
// (19, 11, 'sp4_v_t_46') | |
// (19, 12, 'local_g3_5') | |
// (19, 12, 'ram/WE') | |
// (19, 12, 'sp4_v_b_37') | |
// (19, 12, 'sp4_v_b_40') | |
// (19, 12, 'sp4_v_b_46') | |
// (19, 13, 'sp4_v_b_24') | |
// (19, 13, 'sp4_v_b_29') | |
// (19, 13, 'sp4_v_b_35') | |
// (19, 13, 'sp4_v_t_37') | |
// (19, 14, 'sp4_v_b_13') | |
// (19, 14, 'sp4_v_b_16') | |
// (19, 14, 'sp4_v_b_22') | |
// (19, 14, 'sp4_v_b_37') | |
// (19, 15, 'local_g0_4') | |
// (19, 15, 'local_g1_3') | |
// (19, 15, 'ram/RCLKE') | |
// (19, 15, 'ram/RE') | |
// (19, 15, 'sp4_h_l_43') | |
// (19, 15, 'sp4_h_l_46') | |
// (19, 15, 'sp4_h_r_11') | |
// (19, 15, 'sp4_h_r_12') | |
// (19, 15, 'sp4_v_b_0') | |
// (19, 15, 'sp4_v_b_11') | |
// (19, 15, 'sp4_v_b_24') | |
// (19, 15, 'sp4_v_b_5') | |
// (19, 16, 'local_g1_5') | |
// (19, 16, 'ram/WE') | |
// (19, 16, 'sp4_v_b_13') | |
// (19, 17, 'sp4_h_l_43') | |
// (19, 17, 'sp4_v_b_0') | |
// (20, 9, 'sp4_h_r_25') | |
// (20, 9, 'sp4_h_r_30') | |
// (20, 11, 'sp4_h_r_17') | |
// (20, 11, 'sp4_h_r_23') | |
// (20, 15, 'sp4_h_r_22') | |
// (20, 15, 'sp4_h_r_25') | |
// (21, 9, 'sp4_h_r_36') | |
// (21, 9, 'sp4_h_r_43') | |
// (21, 11, 'sp4_h_r_28') | |
// (21, 11, 'sp4_h_r_34') | |
// (21, 15, 'sp4_h_r_35') | |
// (21, 15, 'sp4_h_r_36') | |
// (22, 9, 'sp4_h_l_36') | |
// (22, 9, 'sp4_h_l_43') | |
// (22, 11, 'sp4_h_r_41') | |
// (22, 11, 'sp4_h_r_47') | |
// (22, 15, 'sp4_h_l_36') | |
// (22, 15, 'sp4_h_r_46') | |
// (23, 11, 'sp4_h_l_41') | |
// (23, 11, 'sp4_h_l_47') | |
// (23, 15, 'sp4_h_l_46') | |
reg n7 = 0; | |
// (2, 9, 'neigh_op_tnr_0') | |
// (2, 10, 'neigh_op_rgt_0') | |
// (2, 11, 'neigh_op_bnr_0') | |
// (3, 9, 'neigh_op_top_0') | |
// (3, 10, 'local_g0_0') | |
// (3, 10, 'lutff_0/in_2') | |
// (3, 10, 'lutff_0/out') | |
// (3, 10, 'lutff_5/in_1') | |
// (3, 11, 'local_g0_0') | |
// (3, 11, 'lutff_1/in_1') | |
// (3, 11, 'neigh_op_bot_0') | |
// (4, 9, 'neigh_op_tnl_0') | |
// (4, 10, 'neigh_op_lft_0') | |
// (4, 11, 'neigh_op_bnl_0') | |
wire n8; | |
// (2, 9, 'neigh_op_tnr_1') | |
// (2, 10, 'neigh_op_rgt_1') | |
// (2, 11, 'neigh_op_bnr_1') | |
// (3, 9, 'neigh_op_top_1') | |
// (3, 10, 'local_g3_1') | |
// (3, 10, 'lutff_1/out') | |
// (3, 10, 'lutff_3/in_3') | |
// (3, 11, 'neigh_op_bot_1') | |
// (4, 9, 'neigh_op_tnl_1') | |
// (4, 10, 'neigh_op_lft_1') | |
// (4, 11, 'neigh_op_bnl_1') | |
wire n9; | |
// (2, 9, 'neigh_op_tnr_3') | |
// (2, 10, 'neigh_op_rgt_3') | |
// (2, 10, 'sp4_h_r_11') | |
// (2, 11, 'neigh_op_bnr_3') | |
// (3, 7, 'sp4_r_v_b_42') | |
// (3, 8, 'sp4_r_v_b_31') | |
// (3, 9, 'neigh_op_top_3') | |
// (3, 9, 'sp4_r_v_b_18') | |
// (3, 10, 'local_g2_3') | |
// (3, 10, 'lutff_3/out') | |
// (3, 10, 'lutff_7/in_0') | |
// (3, 10, 'sp4_h_r_22') | |
// (3, 10, 'sp4_h_r_6') | |
// (3, 10, 'sp4_r_v_b_7') | |
// (3, 11, 'local_g1_3') | |
// (3, 11, 'lutff_global/cen') | |
// (3, 11, 'neigh_op_bot_3') | |
// (4, 6, 'sp4_v_t_42') | |
// (4, 7, 'sp4_v_b_42') | |
// (4, 8, 'sp4_v_b_31') | |
// (4, 9, 'neigh_op_tnl_3') | |
// (4, 9, 'sp4_v_b_18') | |
// (4, 10, 'local_g1_3') | |
// (4, 10, 'lutff_global/cen') | |
// (4, 10, 'neigh_op_lft_3') | |
// (4, 10, 'sp4_h_r_1') | |
// (4, 10, 'sp4_h_r_19') | |
// (4, 10, 'sp4_h_r_35') | |
// (4, 10, 'sp4_v_b_7') | |
// (4, 11, 'neigh_op_bnl_3') | |
// (5, 10, 'sp4_h_r_12') | |
// (5, 10, 'sp4_h_r_30') | |
// (5, 10, 'sp4_h_r_46') | |
// (6, 10, 'sp4_h_l_46') | |
// (6, 10, 'sp4_h_r_2') | |
// (6, 10, 'sp4_h_r_25') | |
// (6, 10, 'sp4_h_r_43') | |
// (7, 10, 'local_g2_4') | |
// (7, 10, 'lutff_global/s_r') | |
// (7, 10, 'sp4_h_l_43') | |
// (7, 10, 'sp4_h_r_15') | |
// (7, 10, 'sp4_h_r_2') | |
// (7, 10, 'sp4_h_r_36') | |
// (8, 10, 'sp4_h_l_36') | |
// (8, 10, 'sp4_h_r_15') | |
// (8, 10, 'sp4_h_r_26') | |
// (9, 7, 'sp4_r_v_b_45') | |
// (9, 8, 'sp4_r_v_b_32') | |
// (9, 9, 'local_g3_5') | |
// (9, 9, 'lutff_global/s_r') | |
// (9, 9, 'sp4_r_v_b_21') | |
// (9, 10, 'sp4_h_r_26') | |
// (9, 10, 'sp4_h_r_39') | |
// (9, 10, 'sp4_r_v_b_8') | |
// (10, 6, 'sp4_v_t_45') | |
// (10, 7, 'sp4_r_v_b_45') | |
// (10, 7, 'sp4_v_b_45') | |
// (10, 8, 'sp4_r_v_b_32') | |
// (10, 8, 'sp4_v_b_32') | |
// (10, 9, 'local_g3_5') | |
// (10, 9, 'lutff_2/in_2') | |
// (10, 9, 'sp4_r_v_b_21') | |
// (10, 9, 'sp4_v_b_21') | |
// (10, 10, 'sp4_h_l_39') | |
// (10, 10, 'sp4_h_r_39') | |
// (10, 10, 'sp4_r_v_b_8') | |
// (10, 10, 'sp4_v_b_8') | |
// (11, 6, 'sp4_v_t_45') | |
// (11, 7, 'sp4_v_b_45') | |
// (11, 8, 'sp4_v_b_32') | |
// (11, 9, 'sp4_v_b_21') | |
// (11, 10, 'sp4_h_l_39') | |
// (11, 10, 'sp4_v_b_8') | |
wire n10; | |
// (2, 9, 'neigh_op_tnr_5') | |
// (2, 10, 'neigh_op_rgt_5') | |
// (2, 11, 'neigh_op_bnr_5') | |
// (3, 9, 'neigh_op_top_5') | |
// (3, 10, 'local_g2_5') | |
// (3, 10, 'lutff_3/in_0') | |
// (3, 10, 'lutff_5/out') | |
// (3, 11, 'neigh_op_bot_5') | |
// (4, 9, 'neigh_op_tnl_5') | |
// (4, 10, 'neigh_op_lft_5') | |
// (4, 11, 'neigh_op_bnl_5') | |
reg n11 = 0; | |
// (2, 10, 'neigh_op_tnr_2') | |
// (2, 11, 'neigh_op_rgt_2') | |
// (2, 12, 'neigh_op_bnr_2') | |
// (3, 10, 'local_g0_2') | |
// (3, 10, 'lutff_5/in_3') | |
// (3, 10, 'neigh_op_top_2') | |
// (3, 11, 'local_g0_2') | |
// (3, 11, 'lutff_2/in_2') | |
// (3, 11, 'lutff_2/out') | |
// (3, 12, 'neigh_op_bot_2') | |
// (4, 10, 'neigh_op_tnl_2') | |
// (4, 11, 'neigh_op_lft_2') | |
// (4, 12, 'neigh_op_bnl_2') | |
reg n12 = 0; | |
// (2, 10, 'neigh_op_tnr_3') | |
// (2, 11, 'neigh_op_rgt_3') | |
// (2, 12, 'neigh_op_bnr_3') | |
// (3, 10, 'local_g0_3') | |
// (3, 10, 'lutff_5/in_0') | |
// (3, 10, 'neigh_op_top_3') | |
// (3, 11, 'local_g3_3') | |
// (3, 11, 'lutff_3/in_1') | |
// (3, 11, 'lutff_3/out') | |
// (3, 12, 'neigh_op_bot_3') | |
// (4, 10, 'neigh_op_tnl_3') | |
// (4, 11, 'neigh_op_lft_3') | |
// (4, 12, 'neigh_op_bnl_3') | |
reg n13 = 0; | |
// (2, 10, 'neigh_op_tnr_4') | |
// (2, 11, 'neigh_op_rgt_4') | |
// (2, 12, 'neigh_op_bnr_4') | |
// (3, 10, 'local_g1_4') | |
// (3, 10, 'lutff_5/in_2') | |
// (3, 10, 'neigh_op_top_4') | |
// (3, 11, 'local_g2_4') | |
// (3, 11, 'lutff_4/in_2') | |
// (3, 11, 'lutff_4/out') | |
// (3, 12, 'neigh_op_bot_4') | |
// (4, 10, 'neigh_op_tnl_4') | |
// (4, 11, 'neigh_op_lft_4') | |
// (4, 12, 'neigh_op_bnl_4') | |
reg n14 = 0; | |
// (2, 10, 'neigh_op_tnr_5') | |
// (2, 11, 'neigh_op_rgt_5') | |
// (2, 12, 'neigh_op_bnr_5') | |
// (3, 10, 'local_g0_5') | |
// (3, 10, 'lutff_1/in_0') | |
// (3, 10, 'neigh_op_top_5') | |
// (3, 11, 'local_g3_5') | |
// (3, 11, 'lutff_5/in_1') | |
// (3, 11, 'lutff_5/out') | |
// (3, 12, 'neigh_op_bot_5') | |
// (4, 10, 'neigh_op_tnl_5') | |
// (4, 11, 'neigh_op_lft_5') | |
// (4, 12, 'neigh_op_bnl_5') | |
reg n15 = 0; | |
// (2, 10, 'neigh_op_tnr_6') | |
// (2, 11, 'neigh_op_rgt_6') | |
// (2, 12, 'neigh_op_bnr_6') | |
// (3, 10, 'local_g1_6') | |
// (3, 10, 'lutff_1/in_2') | |
// (3, 10, 'neigh_op_top_6') | |
// (3, 11, 'local_g2_6') | |
// (3, 11, 'lutff_6/in_2') | |
// (3, 11, 'lutff_6/out') | |
// (3, 12, 'neigh_op_bot_6') | |
// (4, 10, 'neigh_op_tnl_6') | |
// (4, 11, 'neigh_op_lft_6') | |
// (4, 12, 'neigh_op_bnl_6') | |
reg n16 = 0; | |
// (2, 10, 'neigh_op_tnr_7') | |
// (2, 11, 'neigh_op_rgt_7') | |
// (2, 12, 'neigh_op_bnr_7') | |
// (3, 10, 'local_g1_7') | |
// (3, 10, 'lutff_1/in_3') | |
// (3, 10, 'neigh_op_top_7') | |
// (3, 11, 'local_g0_7') | |
// (3, 11, 'lutff_7/in_2') | |
// (3, 11, 'lutff_7/out') | |
// (3, 12, 'neigh_op_bot_7') | |
// (4, 10, 'neigh_op_tnl_7') | |
// (4, 11, 'neigh_op_lft_7') | |
// (4, 12, 'neigh_op_bnl_7') | |
wire n17; | |
// (2, 12, 'sp4_h_r_9') | |
// (3, 12, 'sp4_h_r_20') | |
// (4, 11, 'neigh_op_tnr_6') | |
// (4, 12, 'neigh_op_rgt_6') | |
// (4, 12, 'sp4_h_r_33') | |
// (4, 13, 'neigh_op_bnr_6') | |
// (5, 6, 'sp12_v_t_23') | |
// (5, 7, 'sp12_v_b_23') | |
// (5, 8, 'sp12_v_b_20') | |
// (5, 9, 'sp12_v_b_19') | |
// (5, 9, 'sp4_r_v_b_38') | |
// (5, 10, 'sp12_v_b_16') | |
// (5, 10, 'sp4_r_v_b_27') | |
// (5, 11, 'neigh_op_top_6') | |
// (5, 11, 'sp12_v_b_15') | |
// (5, 11, 'sp4_r_v_b_14') | |
// (5, 12, 'local_g1_3') | |
// (5, 12, 'lutff_6/out') | |
// (5, 12, 'lutff_global/cen') | |
// (5, 12, 'sp12_v_b_12') | |
// (5, 12, 'sp4_h_r_44') | |
// (5, 12, 'sp4_r_v_b_3') | |
// (5, 13, 'local_g3_3') | |
// (5, 13, 'lutff_global/cen') | |
// (5, 13, 'neigh_op_bot_6') | |
// (5, 13, 'sp12_v_b_11') | |
// (5, 14, 'sp12_v_b_8') | |
// (5, 15, 'sp12_v_b_7') | |
// (5, 16, 'sp12_v_b_4') | |
// (5, 17, 'sp12_v_b_3') | |
// (5, 18, 'sp12_v_b_0') | |
// (6, 8, 'sp4_v_t_38') | |
// (6, 9, 'sp4_v_b_38') | |
// (6, 10, 'sp4_v_b_27') | |
// (6, 11, 'neigh_op_tnl_6') | |
// (6, 11, 'sp4_v_b_14') | |
// (6, 12, 'neigh_op_lft_6') | |
// (6, 12, 'sp4_h_l_44') | |
// (6, 12, 'sp4_v_b_3') | |
// (6, 13, 'neigh_op_bnl_6') | |
reg n18 = 0; | |
// (2, 13, 'sp4_h_r_2') | |
// (3, 12, 'neigh_op_tnr_5') | |
// (3, 13, 'neigh_op_rgt_5') | |
// (3, 13, 'sp4_h_r_15') | |
// (3, 14, 'neigh_op_bnr_5') | |
// (4, 12, 'neigh_op_top_5') | |
// (4, 13, 'local_g2_5') | |
// (4, 13, 'lutff_2/in_3') | |
// (4, 13, 'lutff_5/out') | |
// (4, 13, 'sp4_h_r_26') | |
// (4, 14, 'neigh_op_bot_5') | |
// (5, 12, 'neigh_op_tnl_5') | |
// (5, 13, 'neigh_op_lft_5') | |
// (5, 13, 'sp4_h_r_39') | |
// (5, 14, 'neigh_op_bnl_5') | |
// (5, 14, 'sp4_r_v_b_39') | |
// (5, 15, 'sp4_r_v_b_26') | |
// (5, 16, 'sp4_r_v_b_15') | |
// (5, 17, 'sp4_r_v_b_2') | |
// (6, 13, 'sp4_h_l_39') | |
// (6, 13, 'sp4_v_t_39') | |
// (6, 14, 'local_g2_7') | |
// (6, 14, 'ram/WDATA_7') | |
// (6, 14, 'sp4_v_b_39') | |
// (6, 15, 'sp4_v_b_26') | |
// (6, 16, 'sp4_v_b_15') | |
// (6, 17, 'sp4_v_b_2') | |
reg n19 = 0; | |
// (3, 9, 'neigh_op_tnr_4') | |
// (3, 10, 'local_g2_4') | |
// (3, 10, 'lutff_1/in_1') | |
// (3, 10, 'lutff_7/in_1') | |
// (3, 10, 'neigh_op_rgt_4') | |
// (3, 11, 'local_g0_4') | |
// (3, 11, 'lutff_0/in_2') | |
// (3, 11, 'neigh_op_bnr_4') | |
// (4, 9, 'neigh_op_top_4') | |
// (4, 10, 'local_g0_4') | |
// (4, 10, 'lutff_4/in_2') | |
// (4, 10, 'lutff_4/out') | |
// (4, 11, 'neigh_op_bot_4') | |
// (5, 9, 'neigh_op_tnl_4') | |
// (5, 10, 'neigh_op_lft_4') | |
// (5, 11, 'neigh_op_bnl_4') | |
wire n20; | |
// (3, 11, 'lutff_1/cout') | |
// (3, 11, 'lutff_2/in_3') | |
wire n21; | |
// (3, 11, 'lutff_2/cout') | |
// (3, 11, 'lutff_3/in_3') | |
wire n22; | |
// (3, 11, 'lutff_3/cout') | |
// (3, 11, 'lutff_4/in_3') | |
wire n23; | |
// (3, 11, 'lutff_4/cout') | |
// (3, 11, 'lutff_5/in_3') | |
wire n24; | |
// (3, 11, 'lutff_5/cout') | |
// (3, 11, 'lutff_6/in_3') | |
wire n25; | |
// (3, 11, 'lutff_6/cout') | |
// (3, 11, 'lutff_7/in_3') | |
reg n26 = 0; | |
// (3, 12, 'neigh_op_tnr_0') | |
// (3, 13, 'neigh_op_rgt_0') | |
// (3, 14, 'neigh_op_bnr_0') | |
// (4, 11, 'sp4_r_v_b_41') | |
// (4, 12, 'neigh_op_top_0') | |
// (4, 12, 'sp4_r_v_b_28') | |
// (4, 13, 'local_g2_0') | |
// (4, 13, 'lutff_0/out') | |
// (4, 13, 'lutff_5/in_3') | |
// (4, 13, 'sp4_r_v_b_17') | |
// (4, 14, 'neigh_op_bot_0') | |
// (4, 14, 'sp4_r_v_b_4') | |
// (5, 10, 'sp4_v_t_41') | |
// (5, 11, 'sp4_v_b_41') | |
// (5, 12, 'neigh_op_tnl_0') | |
// (5, 12, 'sp4_v_b_28') | |
// (5, 13, 'neigh_op_lft_0') | |
// (5, 13, 'sp4_v_b_17') | |
// (5, 14, 'neigh_op_bnl_0') | |
// (5, 14, 'sp4_h_r_10') | |
// (5, 14, 'sp4_v_b_4') | |
// (6, 14, 'local_g1_7') | |
// (6, 14, 'ram/WDATA_6') | |
// (6, 14, 'sp4_h_r_23') | |
// (7, 14, 'sp4_h_r_34') | |
// (8, 14, 'sp4_h_r_47') | |
// (9, 14, 'sp4_h_l_47') | |
reg n27 = 0; | |
// (3, 12, 'neigh_op_tnr_1') | |
// (3, 13, 'neigh_op_rgt_1') | |
// (3, 14, 'neigh_op_bnr_1') | |
// (4, 11, 'sp4_r_v_b_43') | |
// (4, 12, 'neigh_op_top_1') | |
// (4, 12, 'sp4_r_v_b_30') | |
// (4, 13, 'local_g1_1') | |
// (4, 13, 'lutff_0/in_0') | |
// (4, 13, 'lutff_1/out') | |
// (4, 13, 'sp4_r_v_b_19') | |
// (4, 14, 'neigh_op_bot_1') | |
// (4, 14, 'sp4_r_v_b_6') | |
// (5, 10, 'sp4_v_t_43') | |
// (5, 11, 'sp4_v_b_43') | |
// (5, 12, 'neigh_op_tnl_1') | |
// (5, 12, 'sp4_v_b_30') | |
// (5, 13, 'neigh_op_lft_1') | |
// (5, 13, 'sp4_v_b_19') | |
// (5, 14, 'neigh_op_bnl_1') | |
// (5, 14, 'sp4_h_r_0') | |
// (5, 14, 'sp4_v_b_6') | |
// (6, 14, 'local_g0_5') | |
// (6, 14, 'ram/WDATA_5') | |
// (6, 14, 'sp4_h_r_13') | |
// (7, 14, 'sp4_h_r_24') | |
// (8, 14, 'sp4_h_r_37') | |
// (9, 14, 'sp4_h_l_37') | |
reg n28 = 0; | |
// (3, 12, 'neigh_op_tnr_2') | |
// (3, 13, 'neigh_op_rgt_2') | |
// (3, 14, 'neigh_op_bnr_2') | |
// (4, 12, 'neigh_op_top_2') | |
// (4, 13, 'lutff_2/out') | |
// (4, 13, 'sp4_h_r_4') | |
// (4, 14, 'neigh_op_bot_2') | |
// (5, 12, 'neigh_op_tnl_2') | |
// (5, 13, 'neigh_op_lft_2') | |
// (5, 13, 'sp4_h_r_17') | |
// (5, 14, 'neigh_op_bnl_2') | |
// (6, 13, 'local_g2_4') | |
// (6, 13, 'ram/WDATA_8') | |
// (6, 13, 'sp4_h_r_28') | |
// (7, 13, 'local_g2_1') | |
// (7, 13, 'lutff_4/in_3') | |
// (7, 13, 'sp4_h_r_41') | |
// (8, 13, 'sp4_h_l_41') | |
wire n29; | |
// (3, 13, 'sp4_h_r_1') | |
// (4, 13, 'sp4_h_r_12') | |
// (5, 12, 'neigh_op_tnr_2') | |
// (5, 13, 'neigh_op_rgt_2') | |
// (5, 13, 'sp4_h_r_25') | |
// (5, 13, 'sp4_h_r_9') | |
// (5, 14, 'neigh_op_bnr_2') | |
// (6, 11, 'sp4_r_v_b_45') | |
// (6, 12, 'neigh_op_top_2') | |
// (6, 12, 'sp4_r_v_b_32') | |
// (6, 13, 'ram/RDATA_13') | |
// (6, 13, 'sp4_h_r_20') | |
// (6, 13, 'sp4_h_r_36') | |
// (6, 13, 'sp4_r_v_b_21') | |
// (6, 13, 'sp4_r_v_b_37') | |
// (6, 14, 'neigh_op_bot_2') | |
// (6, 14, 'sp4_r_v_b_24') | |
// (6, 14, 'sp4_r_v_b_8') | |
// (6, 15, 'sp4_r_v_b_13') | |
// (6, 16, 'sp4_r_v_b_0') | |
// (7, 10, 'sp4_v_t_45') | |
// (7, 11, 'sp4_v_b_45') | |
// (7, 12, 'neigh_op_tnl_2') | |
// (7, 12, 'sp4_h_r_5') | |
// (7, 12, 'sp4_v_b_32') | |
// (7, 12, 'sp4_v_t_37') | |
// (7, 13, 'neigh_op_lft_2') | |
// (7, 13, 'sp4_h_l_36') | |
// (7, 13, 'sp4_h_r_1') | |
// (7, 13, 'sp4_h_r_33') | |
// (7, 13, 'sp4_v_b_21') | |
// (7, 13, 'sp4_v_b_37') | |
// (7, 14, 'neigh_op_bnl_2') | |
// (7, 14, 'sp4_h_r_8') | |
// (7, 14, 'sp4_v_b_24') | |
// (7, 14, 'sp4_v_b_8') | |
// (7, 15, 'sp4_v_b_13') | |
// (7, 16, 'sp4_v_b_0') | |
// (8, 10, 'sp4_r_v_b_44') | |
// (8, 11, 'sp4_r_v_b_33') | |
// (8, 12, 'sp4_h_r_16') | |
// (8, 12, 'sp4_r_v_b_20') | |
// (8, 13, 'sp4_h_r_12') | |
// (8, 13, 'sp4_h_r_44') | |
// (8, 13, 'sp4_r_v_b_9') | |
// (8, 14, 'sp4_h_r_21') | |
// (9, 9, 'sp4_v_t_44') | |
// (9, 10, 'sp4_v_b_44') | |
// (9, 11, 'sp4_v_b_33') | |
// (9, 12, 'local_g0_4') | |
// (9, 12, 'lutff_2/in_0') | |
// (9, 12, 'lutff_4/in_2') | |
// (9, 12, 'lutff_6/in_0') | |
// (9, 12, 'sp4_h_r_29') | |
// (9, 12, 'sp4_v_b_20') | |
// (9, 13, 'local_g0_5') | |
// (9, 13, 'lutff_1/in_0') | |
// (9, 13, 'sp4_h_l_44') | |
// (9, 13, 'sp4_h_r_25') | |
// (9, 13, 'sp4_h_r_5') | |
// (9, 13, 'sp4_v_b_9') | |
// (9, 14, 'sp4_h_r_32') | |
// (10, 12, 'local_g2_0') | |
// (10, 12, 'lutff_0/in_0') | |
// (10, 12, 'lutff_5/in_1') | |
// (10, 12, 'sp4_h_r_40') | |
// (10, 13, 'local_g0_0') | |
// (10, 13, 'lutff_5/in_1') | |
// (10, 13, 'sp4_h_r_16') | |
// (10, 13, 'sp4_h_r_36') | |
// (10, 14, 'sp4_h_r_45') | |
// (11, 12, 'sp4_h_l_40') | |
// (11, 13, 'sp4_h_l_36') | |
// (11, 13, 'sp4_h_r_1') | |
// (11, 13, 'sp4_h_r_29') | |
// (11, 14, 'sp4_h_l_45') | |
// (11, 14, 'sp4_h_r_8') | |
// (12, 13, 'sp4_h_r_12') | |
// (12, 13, 'sp4_h_r_40') | |
// (12, 14, 'sp4_h_r_21') | |
// (13, 13, 'sp4_h_l_40') | |
// (13, 13, 'sp4_h_r_25') | |
// (13, 14, 'local_g2_0') | |
// (13, 14, 'lutff_5/in_1') | |
// (13, 14, 'lutff_6/in_2') | |
// (13, 14, 'sp4_h_r_32') | |
// (14, 13, 'local_g2_4') | |
// (14, 13, 'lutff_0/in_0') | |
// (14, 13, 'lutff_7/in_3') | |
// (14, 13, 'sp4_h_r_36') | |
// (14, 14, 'sp4_h_r_45') | |
// (15, 13, 'sp4_h_l_36') | |
// (15, 14, 'local_g0_0') | |
// (15, 14, 'lutff_0/in_2') | |
// (15, 14, 'sp4_h_l_45') | |
// (15, 14, 'sp4_h_r_8') | |
// (16, 14, 'sp4_h_r_21') | |
// (17, 14, 'sp4_h_r_32') | |
// (18, 14, 'sp4_h_r_45') | |
// (19, 14, 'sp4_h_l_45') | |
wire n30; | |
// (3, 14, 'sp4_h_r_11') | |
// (4, 14, 'sp4_h_r_22') | |
// (5, 13, 'neigh_op_tnr_7') | |
// (5, 14, 'neigh_op_rgt_7') | |
// (5, 14, 'sp4_h_r_3') | |
// (5, 14, 'sp4_h_r_35') | |
// (5, 15, 'neigh_op_bnr_7') | |
// (6, 13, 'neigh_op_top_7') | |
// (6, 14, 'ram/RDATA_0') | |
// (6, 14, 'sp4_h_r_14') | |
// (6, 14, 'sp4_h_r_46') | |
// (6, 15, 'neigh_op_bot_7') | |
// (7, 13, 'neigh_op_tnl_7') | |
// (7, 14, 'neigh_op_lft_7') | |
// (7, 14, 'sp4_h_l_46') | |
// (7, 14, 'sp4_h_r_11') | |
// (7, 14, 'sp4_h_r_27') | |
// (7, 15, 'neigh_op_bnl_7') | |
// (8, 14, 'sp4_h_r_22') | |
// (8, 14, 'sp4_h_r_38') | |
// (9, 14, 'sp4_h_l_38') | |
// (9, 14, 'sp4_h_r_35') | |
// (9, 14, 'sp4_h_r_6') | |
// (10, 11, 'sp4_r_v_b_46') | |
// (10, 12, 'sp4_r_v_b_35') | |
// (10, 13, 'sp4_r_v_b_22') | |
// (10, 14, 'sp4_h_r_19') | |
// (10, 14, 'sp4_h_r_46') | |
// (10, 14, 'sp4_r_v_b_11') | |
// (11, 10, 'sp4_v_t_46') | |
// (11, 11, 'sp4_v_b_46') | |
// (11, 12, 'sp4_v_b_35') | |
// (11, 13, 'local_g1_6') | |
// (11, 13, 'lutff_3/in_2') | |
// (11, 13, 'sp4_v_b_22') | |
// (11, 14, 'sp4_h_l_46') | |
// (11, 14, 'sp4_h_r_30') | |
// (11, 14, 'sp4_v_b_11') | |
// (12, 14, 'local_g2_3') | |
// (12, 14, 'lutff_5/in_2') | |
// (12, 14, 'sp4_h_r_43') | |
// (13, 14, 'sp4_h_l_43') | |
reg n31 = 0; | |
// (3, 14, 'sp4_h_r_7') | |
// (4, 13, 'sp4_r_v_b_45') | |
// (4, 14, 'sp4_h_r_18') | |
// (4, 14, 'sp4_r_v_b_32') | |
// (4, 15, 'sp4_r_v_b_21') | |
// (4, 16, 'sp4_r_v_b_8') | |
// (5, 12, 'sp4_h_r_2') | |
// (5, 12, 'sp4_v_t_45') | |
// (5, 13, 'local_g2_5') | |
// (5, 13, 'lutff_1/in_2') | |
// (5, 13, 'sp4_v_b_45') | |
// (5, 14, 'sp4_h_r_31') | |
// (5, 14, 'sp4_v_b_32') | |
// (5, 15, 'sp4_v_b_21') | |
// (5, 16, 'sp4_v_b_8') | |
// (6, 11, 'neigh_op_tnr_5') | |
// (6, 11, 'sp4_r_v_b_39') | |
// (6, 12, 'neigh_op_rgt_5') | |
// (6, 12, 'sp4_h_r_15') | |
// (6, 12, 'sp4_r_v_b_26') | |
// (6, 13, 'neigh_op_bnr_5') | |
// (6, 13, 'sp4_r_v_b_15') | |
// (6, 14, 'local_g2_2') | |
// (6, 14, 'ram/WADDR_1') | |
// (6, 14, 'sp4_h_r_42') | |
// (6, 14, 'sp4_r_v_b_2') | |
// (7, 10, 'sp4_v_t_39') | |
// (7, 11, 'neigh_op_top_5') | |
// (7, 11, 'sp4_v_b_39') | |
// (7, 12, 'local_g1_5') | |
// (7, 12, 'lutff_5/in_3') | |
// (7, 12, 'lutff_5/out') | |
// (7, 12, 'sp4_h_r_26') | |
// (7, 12, 'sp4_v_b_26') | |
// (7, 13, 'neigh_op_bot_5') | |
// (7, 13, 'sp4_v_b_15') | |
// (7, 14, 'sp4_h_l_42') | |
// (7, 14, 'sp4_v_b_2') | |
// (8, 11, 'neigh_op_tnl_5') | |
// (8, 12, 'neigh_op_lft_5') | |
// (8, 12, 'sp4_h_r_39') | |
// (8, 13, 'neigh_op_bnl_5') | |
// (9, 12, 'sp4_h_l_39') | |
wire n32; | |
// (3, 16, 'sp4_r_v_b_41') | |
// (3, 17, 'sp4_r_v_b_28') | |
// (3, 18, 'sp4_r_v_b_17') | |
// (3, 19, 'sp4_r_v_b_4') | |
// (3, 20, 'neigh_op_tnr_0') | |
// (3, 20, 'neigh_op_tnr_4') | |
// (3, 20, 'sp4_r_v_b_45') | |
// (4, 15, 'sp4_h_r_9') | |
// (4, 15, 'sp4_v_t_41') | |
// (4, 16, 'sp4_v_b_41') | |
// (4, 17, 'sp4_v_b_28') | |
// (4, 18, 'sp4_v_b_17') | |
// (4, 19, 'sp4_v_b_4') | |
// (4, 19, 'sp4_v_t_45') | |
// (4, 20, 'neigh_op_top_0') | |
// (4, 20, 'neigh_op_top_4') | |
// (4, 20, 'sp4_v_b_45') | |
// (4, 21, 'io_0/D_IN_0') | |
// (4, 21, 'span4_vert_32') | |
// (5, 15, 'sp4_h_r_20') | |
// (5, 20, 'neigh_op_tnl_0') | |
// (5, 20, 'neigh_op_tnl_4') | |
// (6, 15, 'sp4_h_r_33') | |
// (7, 15, 'sp4_h_r_44') | |
// (8, 15, 'sp4_h_l_44') | |
// (8, 15, 'sp4_h_r_5') | |
// (9, 15, 'sp4_h_r_16') | |
// (10, 15, 'sp4_h_r_29') | |
// (11, 15, 'sp4_h_r_40') | |
// (12, 15, 'sp4_h_l_40') | |
// (12, 15, 'sp4_h_r_5') | |
// (13, 15, 'local_g0_0') | |
// (13, 15, 'lutff_2/in_2') | |
// (13, 15, 'sp4_h_r_16') | |
// (14, 15, 'sp4_h_r_29') | |
// (15, 15, 'sp4_h_r_40') | |
// (16, 15, 'sp4_h_l_40') | |
reg n33 = 0; | |
// (3, 20, 'sp4_r_v_b_42') | |
// (4, 19, 'sp4_h_r_7') | |
// (4, 19, 'sp4_v_t_42') | |
// (4, 20, 'sp4_v_b_42') | |
// (4, 21, 'io_0/OUT_ENB') | |
// (4, 21, 'local_g0_7') | |
// (4, 21, 'span4_vert_31') | |
// (5, 19, 'sp4_h_r_18') | |
// (6, 18, 'neigh_op_tnr_5') | |
// (6, 19, 'neigh_op_rgt_5') | |
// (6, 19, 'sp4_h_r_31') | |
// (6, 20, 'neigh_op_bnr_5') | |
// (7, 18, 'neigh_op_top_5') | |
// (7, 19, 'lutff_5/out') | |
// (7, 19, 'sp4_h_r_42') | |
// (7, 20, 'neigh_op_bot_5') | |
// (8, 18, 'neigh_op_tnl_5') | |
// (8, 19, 'neigh_op_lft_5') | |
// (8, 19, 'sp4_h_l_42') | |
// (8, 20, 'neigh_op_bnl_5') | |
reg n34 = 0; | |
// (3, 21, 'span4_horz_r_1') | |
// (4, 21, 'io_0/D_OUT_0') | |
// (4, 21, 'local_g1_5') | |
// (4, 21, 'span4_horz_r_5') | |
// (5, 21, 'span4_horz_r_9') | |
// (6, 18, 'sp4_r_v_b_42') | |
// (6, 19, 'neigh_op_tnr_1') | |
// (6, 19, 'sp4_r_v_b_31') | |
// (6, 20, 'neigh_op_rgt_1') | |
// (6, 20, 'sp4_r_v_b_18') | |
// (6, 21, 'logic_op_bnr_1') | |
// (6, 21, 'span4_horz_r_13') | |
// (7, 17, 'sp4_v_t_42') | |
// (7, 18, 'sp4_v_b_42') | |
// (7, 19, 'neigh_op_top_1') | |
// (7, 19, 'sp4_v_b_31') | |
// (7, 20, 'lutff_1/out') | |
// (7, 20, 'sp4_v_b_18') | |
// (7, 21, 'logic_op_bot_1') | |
// (7, 21, 'span4_horz_l_13') | |
// (7, 21, 'span4_vert_7') | |
// (8, 19, 'neigh_op_tnl_1') | |
// (8, 20, 'neigh_op_lft_1') | |
// (8, 21, 'logic_op_bnl_1') | |
reg n35 = 0; | |
// (4, 9, 'neigh_op_tnr_1') | |
// (4, 10, 'neigh_op_rgt_1') | |
// (4, 11, 'neigh_op_bnr_1') | |
// (5, 9, 'neigh_op_top_1') | |
// (5, 10, 'lutff_1/out') | |
// (5, 10, 'sp4_h_r_2') | |
// (5, 11, 'neigh_op_bot_1') | |
// (6, 9, 'neigh_op_tnl_1') | |
// (6, 10, 'neigh_op_lft_1') | |
// (6, 10, 'sp4_h_r_15') | |
// (6, 11, 'neigh_op_bnl_1') | |
// (7, 10, 'local_g3_2') | |
// (7, 10, 'lutff_4/in_3') | |
// (7, 10, 'sp4_h_r_26') | |
// (8, 10, 'sp4_h_r_39') | |
// (9, 10, 'sp4_h_l_39') | |
reg n36 = 0; | |
// (4, 10, 'neigh_op_tnr_3') | |
// (4, 11, 'neigh_op_rgt_3') | |
// (4, 12, 'neigh_op_bnr_3') | |
// (5, 10, 'neigh_op_top_3') | |
// (5, 11, 'lutff_3/out') | |
// (5, 11, 'sp4_h_r_6') | |
// (5, 12, 'neigh_op_bot_3') | |
// (6, 10, 'neigh_op_tnl_3') | |
// (6, 11, 'neigh_op_lft_3') | |
// (6, 11, 'sp4_h_r_19') | |
// (6, 12, 'neigh_op_bnl_3') | |
// (7, 11, 'local_g2_6') | |
// (7, 11, 'lutff_3/in_1') | |
// (7, 11, 'sp4_h_r_30') | |
// (8, 11, 'sp4_h_r_43') | |
// (9, 11, 'sp4_h_l_43') | |
wire n37; | |
// (4, 11, 'neigh_op_tnr_0') | |
// (4, 12, 'neigh_op_rgt_0') | |
// (4, 13, 'neigh_op_bnr_0') | |
// (5, 9, 'sp4_r_v_b_36') | |
// (5, 10, 'sp4_r_v_b_25') | |
// (5, 11, 'neigh_op_top_0') | |
// (5, 11, 'sp4_r_v_b_12') | |
// (5, 11, 'sp4_r_v_b_44') | |
// (5, 12, 'lutff_0/out') | |
// (5, 12, 'sp4_r_v_b_1') | |
// (5, 12, 'sp4_r_v_b_33') | |
// (5, 13, 'neigh_op_bot_0') | |
// (5, 13, 'sp4_r_v_b_20') | |
// (5, 13, 'sp4_r_v_b_36') | |
// (5, 14, 'sp4_r_v_b_25') | |
// (5, 14, 'sp4_r_v_b_9') | |
// (5, 15, 'sp4_r_v_b_12') | |
// (5, 16, 'sp4_r_v_b_1') | |
// (6, 8, 'sp4_v_t_36') | |
// (6, 9, 'sp4_v_b_36') | |
// (6, 10, 'sp4_v_b_25') | |
// (6, 10, 'sp4_v_t_44') | |
// (6, 11, 'neigh_op_tnl_0') | |
// (6, 11, 'sp4_v_b_12') | |
// (6, 11, 'sp4_v_b_44') | |
// (6, 12, 'neigh_op_lft_0') | |
// (6, 12, 'sp4_v_b_1') | |
// (6, 12, 'sp4_v_b_33') | |
// (6, 12, 'sp4_v_t_36') | |
// (6, 13, 'local_g2_0') | |
// (6, 13, 'local_g3_0') | |
// (6, 13, 'neigh_op_bnl_0') | |
// (6, 13, 'ram/MASK_10') | |
// (6, 13, 'ram/MASK_11') | |
// (6, 13, 'ram/MASK_12') | |
// (6, 13, 'ram/MASK_13') | |
// (6, 13, 'ram/MASK_14') | |
// (6, 13, 'ram/MASK_15') | |
// (6, 13, 'ram/MASK_8') | |
// (6, 13, 'ram/MASK_9') | |
// (6, 13, 'sp4_v_b_20') | |
// (6, 13, 'sp4_v_b_36') | |
// (6, 14, 'local_g1_1') | |
// (6, 14, 'local_g2_1') | |
// (6, 14, 'ram/MASK_0') | |
// (6, 14, 'ram/MASK_1') | |
// (6, 14, 'ram/MASK_2') | |
// (6, 14, 'ram/MASK_3') | |
// (6, 14, 'ram/MASK_4') | |
// (6, 14, 'ram/MASK_5') | |
// (6, 14, 'ram/MASK_6') | |
// (6, 14, 'ram/MASK_7') | |
// (6, 14, 'sp4_v_b_25') | |
// (6, 14, 'sp4_v_b_9') | |
// (6, 15, 'sp4_v_b_12') | |
// (6, 16, 'sp4_v_b_1') | |
reg n38 = 0; | |
// (4, 11, 'neigh_op_tnr_3') | |
// (4, 12, 'neigh_op_rgt_3') | |
// (4, 13, 'neigh_op_bnr_3') | |
// (5, 11, 'neigh_op_top_3') | |
// (5, 12, 'local_g3_3') | |
// (5, 12, 'lutff_3/in_3') | |
// (5, 12, 'lutff_3/out') | |
// (5, 12, 'sp4_h_r_6') | |
// (5, 12, 'sp4_r_v_b_39') | |
// (5, 13, 'local_g1_3') | |
// (5, 13, 'lutff_0/in_2') | |
// (5, 13, 'neigh_op_bot_3') | |
// (5, 13, 'sp4_r_v_b_26') | |
// (5, 14, 'sp4_r_v_b_15') | |
// (5, 15, 'sp4_r_v_b_2') | |
// (6, 11, 'neigh_op_tnl_3') | |
// (6, 11, 'sp4_v_t_39') | |
// (6, 12, 'neigh_op_lft_3') | |
// (6, 12, 'sp4_h_r_19') | |
// (6, 12, 'sp4_v_b_39') | |
// (6, 13, 'neigh_op_bnl_3') | |
// (6, 13, 'sp4_v_b_26') | |
// (6, 14, 'local_g0_7') | |
// (6, 14, 'ram/WADDR_0') | |
// (6, 14, 'sp4_v_b_15') | |
// (6, 15, 'sp4_v_b_2') | |
// (7, 12, 'local_g2_6') | |
// (7, 12, 'lutff_4/in_0') | |
// (7, 12, 'sp4_h_r_30') | |
// (8, 12, 'sp4_h_r_43') | |
// (9, 12, 'sp4_h_l_43') | |
reg n39 = 0; | |
// (4, 11, 'sp4_h_r_3') | |
// (5, 11, 'sp4_h_r_14') | |
// (6, 10, 'neigh_op_tnr_3') | |
// (6, 11, 'neigh_op_rgt_3') | |
// (6, 11, 'sp4_h_r_27') | |
// (6, 12, 'neigh_op_bnr_3') | |
// (7, 10, 'neigh_op_top_3') | |
// (7, 11, 'lutff_3/out') | |
// (7, 11, 'sp4_h_r_38') | |
// (7, 12, 'neigh_op_bot_3') | |
// (8, 10, 'neigh_op_tnl_3') | |
// (8, 11, 'neigh_op_lft_3') | |
// (8, 11, 'sp4_h_l_38') | |
// (8, 11, 'sp4_h_r_3') | |
// (8, 12, 'neigh_op_bnl_3') | |
// (9, 11, 'sp4_h_r_14') | |
// (10, 11, 'sp4_h_r_27') | |
// (11, 11, 'local_g3_6') | |
// (11, 11, 'lutff_7/in_2') | |
// (11, 11, 'sp4_h_r_38') | |
// (12, 11, 'sp4_h_l_38') | |
reg n40 = 0; | |
// (4, 11, 'sp4_r_v_b_37') | |
// (4, 12, 'sp4_h_r_1') | |
// (4, 12, 'sp4_r_v_b_24') | |
// (4, 13, 'sp4_r_v_b_13') | |
// (4, 14, 'sp4_r_v_b_0') | |
// (5, 10, 'sp4_h_r_0') | |
// (5, 10, 'sp4_v_t_37') | |
// (5, 11, 'sp4_v_b_37') | |
// (5, 12, 'local_g0_4') | |
// (5, 12, 'lutff_6/in_2') | |
// (5, 12, 'lutff_global/s_r') | |
// (5, 12, 'sp4_h_r_12') | |
// (5, 12, 'sp4_v_b_24') | |
// (5, 13, 'local_g1_5') | |
// (5, 13, 'lutff_global/s_r') | |
// (5, 13, 'sp4_v_b_13') | |
// (5, 14, 'sp4_v_b_0') | |
// (6, 9, 'neigh_op_tnr_4') | |
// (6, 10, 'neigh_op_rgt_4') | |
// (6, 10, 'sp4_h_r_13') | |
// (6, 11, 'neigh_op_bnr_4') | |
// (6, 12, 'sp4_h_r_25') | |
// (7, 9, 'neigh_op_top_4') | |
// (7, 9, 'sp4_r_v_b_36') | |
// (7, 10, 'lutff_4/out') | |
// (7, 10, 'sp4_h_r_24') | |
// (7, 10, 'sp4_r_v_b_25') | |
// (7, 11, 'neigh_op_bot_4') | |
// (7, 11, 'sp4_r_v_b_12') | |
// (7, 12, 'local_g1_1') | |
// (7, 12, 'local_g2_4') | |
// (7, 12, 'lutff_4/in_2') | |
// (7, 12, 'lutff_global/s_r') | |
// (7, 12, 'sp4_h_r_36') | |
// (7, 12, 'sp4_r_v_b_1') | |
// (8, 8, 'sp4_v_t_36') | |
// (8, 9, 'neigh_op_tnl_4') | |
// (8, 9, 'sp4_v_b_36') | |
// (8, 10, 'neigh_op_lft_4') | |
// (8, 10, 'sp4_h_r_37') | |
// (8, 10, 'sp4_v_b_25') | |
// (8, 11, 'neigh_op_bnl_4') | |
// (8, 11, 'sp4_v_b_12') | |
// (8, 12, 'sp4_h_l_36') | |
// (8, 12, 'sp4_v_b_1') | |
// (9, 10, 'sp4_h_l_37') | |
reg n41 = 0; | |
// (4, 12, 'neigh_op_tnr_2') | |
// (4, 13, 'neigh_op_rgt_2') | |
// (4, 14, 'neigh_op_bnr_2') | |
// (5, 12, 'neigh_op_top_2') | |
// (5, 13, 'local_g3_2') | |
// (5, 13, 'lutff_2/in_1') | |
// (5, 13, 'lutff_2/out') | |
// (5, 14, 'neigh_op_bot_2') | |
// (6, 12, 'neigh_op_tnl_2') | |
// (6, 13, 'neigh_op_lft_2') | |
// (6, 14, 'local_g3_2') | |
// (6, 14, 'neigh_op_bnl_2') | |
// (6, 14, 'ram/WADDR_2') | |
reg n42 = 0; | |
// (4, 12, 'neigh_op_tnr_3') | |
// (4, 13, 'neigh_op_rgt_3') | |
// (4, 14, 'neigh_op_bnr_3') | |
// (5, 12, 'neigh_op_top_3') | |
// (5, 13, 'local_g2_3') | |
// (5, 13, 'lutff_3/in_2') | |
// (5, 13, 'lutff_3/out') | |
// (5, 14, 'neigh_op_bot_3') | |
// (6, 12, 'neigh_op_tnl_3') | |
// (6, 13, 'neigh_op_lft_3') | |
// (6, 14, 'local_g3_3') | |
// (6, 14, 'neigh_op_bnl_3') | |
// (6, 14, 'ram/WADDR_3') | |
reg n43 = 0; | |
// (4, 12, 'neigh_op_tnr_4') | |
// (4, 13, 'neigh_op_rgt_4') | |
// (4, 14, 'neigh_op_bnr_4') | |
// (5, 12, 'neigh_op_top_4') | |
// (5, 13, 'local_g1_4') | |
// (5, 13, 'lutff_4/in_1') | |
// (5, 13, 'lutff_4/out') | |
// (5, 14, 'neigh_op_bot_4') | |
// (6, 12, 'neigh_op_tnl_4') | |
// (6, 13, 'neigh_op_lft_4') | |
// (6, 14, 'local_g3_4') | |
// (6, 14, 'neigh_op_bnl_4') | |
// (6, 14, 'ram/WADDR_4') | |
reg n44 = 0; | |
// (4, 12, 'neigh_op_tnr_5') | |
// (4, 13, 'neigh_op_rgt_5') | |
// (4, 14, 'neigh_op_bnr_5') | |
// (5, 12, 'neigh_op_top_5') | |
// (5, 13, 'local_g0_5') | |
// (5, 13, 'lutff_5/in_2') | |
// (5, 13, 'lutff_5/out') | |
// (5, 14, 'neigh_op_bot_5') | |
// (6, 12, 'neigh_op_tnl_5') | |
// (6, 13, 'neigh_op_lft_5') | |
// (6, 14, 'local_g3_5') | |
// (6, 14, 'neigh_op_bnl_5') | |
// (6, 14, 'ram/WADDR_5') | |
reg n45 = 0; | |
// (4, 12, 'neigh_op_tnr_6') | |
// (4, 13, 'neigh_op_rgt_6') | |
// (4, 14, 'neigh_op_bnr_6') | |
// (5, 12, 'neigh_op_top_6') | |
// (5, 13, 'local_g1_6') | |
// (5, 13, 'lutff_6/in_1') | |
// (5, 13, 'lutff_6/out') | |
// (5, 14, 'neigh_op_bot_6') | |
// (6, 12, 'neigh_op_tnl_6') | |
// (6, 13, 'neigh_op_lft_6') | |
// (6, 14, 'local_g3_6') | |
// (6, 14, 'neigh_op_bnl_6') | |
// (6, 14, 'ram/WADDR_6') | |
reg n46 = 0; | |
// (4, 12, 'neigh_op_tnr_7') | |
// (4, 13, 'neigh_op_rgt_7') | |
// (4, 14, 'neigh_op_bnr_7') | |
// (5, 12, 'neigh_op_top_7') | |
// (5, 13, 'local_g0_7') | |
// (5, 13, 'lutff_7/in_2') | |
// (5, 13, 'lutff_7/out') | |
// (5, 14, 'neigh_op_bot_7') | |
// (6, 12, 'neigh_op_tnl_7') | |
// (6, 13, 'neigh_op_lft_7') | |
// (6, 14, 'local_g3_7') | |
// (6, 14, 'neigh_op_bnl_7') | |
// (6, 14, 'ram/WADDR_7') | |
reg n47 = 0; | |
// (4, 13, 'local_g1_7') | |
// (4, 13, 'lutff_1/in_3') | |
// (4, 13, 'sp4_h_r_7') | |
// (5, 13, 'sp4_h_r_18') | |
// (6, 12, 'neigh_op_tnr_5') | |
// (6, 13, 'neigh_op_rgt_5') | |
// (6, 13, 'sp4_h_r_31') | |
// (6, 14, 'local_g1_5') | |
// (6, 14, 'neigh_op_bnr_5') | |
// (6, 14, 'ram/WDATA_4') | |
// (7, 12, 'neigh_op_top_5') | |
// (7, 13, 'lutff_5/out') | |
// (7, 13, 'sp4_h_r_42') | |
// (7, 14, 'neigh_op_bot_5') | |
// (8, 12, 'neigh_op_tnl_5') | |
// (8, 13, 'neigh_op_lft_5') | |
// (8, 13, 'sp4_h_l_42') | |
// (8, 14, 'neigh_op_bnl_5') | |
reg n48 = 0; | |
// (4, 13, 'neigh_op_tnr_1') | |
// (4, 14, 'neigh_op_rgt_1') | |
// (4, 15, 'neigh_op_bnr_1') | |
// (5, 13, 'neigh_op_top_1') | |
// (5, 14, 'local_g1_1') | |
// (5, 14, 'lutff_1/out') | |
// (5, 14, 'lutff_6/in_0') | |
// (5, 15, 'neigh_op_bot_1') | |
// (6, 13, 'local_g3_1') | |
// (6, 13, 'neigh_op_tnl_1') | |
// (6, 13, 'ram/WDATA_12') | |
// (6, 14, 'neigh_op_lft_1') | |
// (6, 15, 'neigh_op_bnl_1') | |
reg n49 = 0; | |
// (4, 13, 'neigh_op_tnr_3') | |
// (4, 14, 'neigh_op_rgt_3') | |
// (4, 15, 'neigh_op_bnr_3') | |
// (5, 13, 'neigh_op_top_3') | |
// (5, 14, 'lutff_3/out') | |
// (5, 15, 'neigh_op_bot_3') | |
// (6, 13, 'local_g2_3') | |
// (6, 13, 'neigh_op_tnl_3') | |
// (6, 13, 'ram/WDATA_15') | |
// (6, 14, 'neigh_op_lft_3') | |
// (6, 15, 'neigh_op_bnl_3') | |
reg n50 = 0; | |
// (4, 13, 'neigh_op_tnr_6') | |
// (4, 14, 'neigh_op_rgt_6') | |
// (4, 14, 'sp4_h_r_1') | |
// (4, 15, 'neigh_op_bnr_6') | |
// (5, 13, 'neigh_op_top_6') | |
// (5, 14, 'lutff_6/out') | |
// (5, 14, 'sp4_h_r_12') | |
// (5, 15, 'neigh_op_bot_6') | |
// (6, 13, 'local_g3_6') | |
// (6, 13, 'neigh_op_tnl_6') | |
// (6, 13, 'ram/WDATA_13') | |
// (6, 14, 'neigh_op_lft_6') | |
// (6, 14, 'sp4_h_r_25') | |
// (6, 15, 'neigh_op_bnl_6') | |
// (7, 14, 'local_g3_4') | |
// (7, 14, 'lutff_7/in_2') | |
// (7, 14, 'sp4_h_r_36') | |
// (8, 14, 'sp4_h_l_36') | |
reg n51 = 0; | |
// (4, 13, 'neigh_op_tnr_7') | |
// (4, 14, 'neigh_op_rgt_7') | |
// (4, 15, 'neigh_op_bnr_7') | |
// (5, 13, 'neigh_op_top_7') | |
// (5, 14, 'local_g3_7') | |
// (5, 14, 'lutff_1/in_1') | |
// (5, 14, 'lutff_7/out') | |
// (5, 15, 'neigh_op_bot_7') | |
// (6, 13, 'local_g2_7') | |
// (6, 13, 'neigh_op_tnl_7') | |
// (6, 13, 'ram/WDATA_11') | |
// (6, 14, 'neigh_op_lft_7') | |
// (6, 15, 'neigh_op_bnl_7') | |
wire n52; | |
// (4, 13, 'sp12_h_r_0') | |
// (5, 13, 'sp12_h_r_3') | |
// (6, 13, 'local_g0_4') | |
// (6, 13, 'ram/RADDR_7') | |
// (6, 13, 'sp12_h_r_4') | |
// (7, 13, 'sp12_h_r_7') | |
// (8, 13, 'sp12_h_r_8') | |
// (9, 12, 'neigh_op_tnr_2') | |
// (9, 13, 'neigh_op_rgt_2') | |
// (9, 13, 'sp12_h_r_11') | |
// (9, 14, 'neigh_op_bnr_2') | |
// (10, 12, 'neigh_op_top_2') | |
// (10, 13, 'local_g1_2') | |
// (10, 13, 'lutff_0/in_3') | |
// (10, 13, 'lutff_2/out') | |
// (10, 13, 'sp12_h_r_12') | |
// (10, 14, 'neigh_op_bot_2') | |
// (11, 12, 'neigh_op_tnl_2') | |
// (11, 13, 'neigh_op_lft_2') | |
// (11, 13, 'sp12_h_r_15') | |
// (11, 14, 'neigh_op_bnl_2') | |
// (12, 13, 'sp12_h_r_16') | |
// (13, 13, 'sp12_h_r_19') | |
// (14, 13, 'sp12_h_r_20') | |
// (15, 13, 'sp12_h_r_23') | |
// (16, 13, 'sp12_h_l_23') | |
wire n53; | |
// (4, 13, 'sp4_h_r_0') | |
// (5, 12, 'neigh_op_tnr_4') | |
// (5, 13, 'neigh_op_rgt_4') | |
// (5, 13, 'sp4_h_r_13') | |
// (5, 14, 'neigh_op_bnr_4') | |
// (6, 12, 'neigh_op_top_4') | |
// (6, 12, 'sp4_r_v_b_36') | |
// (6, 13, 'ram/RDATA_11') | |
// (6, 13, 'sp4_h_r_24') | |
// (6, 13, 'sp4_r_v_b_25') | |
// (6, 13, 'sp4_r_v_b_41') | |
// (6, 14, 'neigh_op_bot_4') | |
// (6, 14, 'sp4_r_v_b_12') | |
// (6, 14, 'sp4_r_v_b_28') | |
// (6, 15, 'sp4_r_v_b_1') | |
// (6, 15, 'sp4_r_v_b_17') | |
// (6, 16, 'sp4_r_v_b_4') | |
// (7, 11, 'sp4_h_r_1') | |
// (7, 11, 'sp4_v_t_36') | |
// (7, 12, 'neigh_op_tnl_4') | |
// (7, 12, 'sp4_h_r_4') | |
// (7, 12, 'sp4_v_b_36') | |
// (7, 12, 'sp4_v_t_41') | |
// (7, 13, 'neigh_op_lft_4') | |
// (7, 13, 'sp4_h_r_37') | |
// (7, 13, 'sp4_v_b_25') | |
// (7, 13, 'sp4_v_b_41') | |
// (7, 14, 'neigh_op_bnl_4') | |
// (7, 14, 'sp4_v_b_12') | |
// (7, 14, 'sp4_v_b_28') | |
// (7, 15, 'sp4_v_b_1') | |
// (7, 15, 'sp4_v_b_17') | |
// (7, 16, 'sp4_v_b_4') | |
// (8, 11, 'sp4_h_r_12') | |
// (8, 12, 'sp4_h_r_17') | |
// (8, 13, 'sp4_h_l_37') | |
// (8, 13, 'sp4_h_r_0') | |
// (9, 11, 'sp4_h_r_25') | |
// (9, 12, 'local_g3_4') | |
// (9, 12, 'lutff_0/in_3') | |
// (9, 12, 'sp4_h_r_28') | |
// (9, 13, 'sp4_h_r_13') | |
// (10, 8, 'sp4_r_v_b_42') | |
// (10, 9, 'sp4_r_v_b_31') | |
// (10, 10, 'sp4_r_v_b_18') | |
// (10, 11, 'local_g2_4') | |
// (10, 11, 'lutff_4/in_0') | |
// (10, 11, 'sp4_h_r_36') | |
// (10, 11, 'sp4_r_v_b_7') | |
// (10, 12, 'local_g2_1') | |
// (10, 12, 'local_g3_1') | |
// (10, 12, 'lutff_1/in_3') | |
// (10, 12, 'lutff_5/in_2') | |
// (10, 12, 'sp4_h_r_41') | |
// (10, 13, 'sp4_h_r_24') | |
// (11, 7, 'sp4_v_t_42') | |
// (11, 8, 'sp4_v_b_42') | |
// (11, 9, 'sp4_v_b_31') | |
// (11, 10, 'sp4_v_b_18') | |
// (11, 11, 'local_g0_7') | |
// (11, 11, 'lutff_4/in_3') | |
// (11, 11, 'sp4_h_l_36') | |
// (11, 11, 'sp4_v_b_7') | |
// (11, 12, 'sp4_h_l_41') | |
// (11, 13, 'local_g2_5') | |
// (11, 13, 'lutff_2/in_3') | |
// (11, 13, 'sp4_h_r_37') | |
// (12, 13, 'sp4_h_l_37') | |
wire n54; | |
// (4, 13, 'sp4_h_r_2') | |
// (5, 12, 'neigh_op_tnr_5') | |
// (5, 13, 'neigh_op_rgt_5') | |
// (5, 13, 'sp4_h_r_15') | |
// (5, 13, 'sp4_r_v_b_42') | |
// (5, 14, 'neigh_op_bnr_5') | |
// (5, 14, 'sp4_r_v_b_31') | |
// (5, 15, 'sp4_r_v_b_18') | |
// (5, 16, 'sp4_r_v_b_7') | |
// (6, 12, 'neigh_op_top_5') | |
// (6, 12, 'sp4_h_r_7') | |
// (6, 12, 'sp4_v_t_42') | |
// (6, 13, 'ram/RDATA_10') | |
// (6, 13, 'sp4_h_r_26') | |
// (6, 13, 'sp4_r_v_b_43') | |
// (6, 13, 'sp4_v_b_42') | |
// (6, 14, 'neigh_op_bot_5') | |
// (6, 14, 'sp4_r_v_b_30') | |
// (6, 14, 'sp4_v_b_31') | |
// (6, 15, 'sp4_r_v_b_19') | |
// (6, 15, 'sp4_v_b_18') | |
// (6, 16, 'sp4_r_v_b_6') | |
// (6, 16, 'sp4_v_b_7') | |
// (7, 12, 'neigh_op_tnl_5') | |
// (7, 12, 'sp4_h_r_18') | |
// (7, 12, 'sp4_h_r_6') | |
// (7, 12, 'sp4_v_t_43') | |
// (7, 13, 'neigh_op_lft_5') | |
// (7, 13, 'sp4_h_r_39') | |
// (7, 13, 'sp4_v_b_43') | |
// (7, 14, 'neigh_op_bnl_5') | |
// (7, 14, 'sp4_v_b_30') | |
// (7, 15, 'sp4_v_b_19') | |
// (7, 16, 'sp4_v_b_6') | |
// (8, 12, 'sp4_h_r_19') | |
// (8, 12, 'sp4_h_r_31') | |
// (8, 13, 'sp4_h_l_39') | |
// (8, 13, 'sp4_h_r_2') | |
// (9, 12, 'local_g2_2') | |
// (9, 12, 'local_g3_6') | |
// (9, 12, 'lutff_0/in_1') | |
// (9, 12, 'lutff_2/in_2') | |
// (9, 12, 'sp4_h_r_30') | |
// (9, 12, 'sp4_h_r_42') | |
// (9, 13, 'sp4_h_r_15') | |
// (10, 9, 'sp4_r_v_b_37') | |
// (10, 10, 'sp4_r_v_b_24') | |
// (10, 11, 'sp4_r_v_b_13') | |
// (10, 12, 'local_g3_3') | |
// (10, 12, 'lutff_3/in_3') | |
// (10, 12, 'sp4_h_l_42') | |
// (10, 12, 'sp4_h_r_43') | |
// (10, 12, 'sp4_r_v_b_0') | |
// (10, 13, 'local_g3_2') | |
// (10, 13, 'lutff_1/in_2') | |
// (10, 13, 'sp4_h_r_26') | |
// (11, 8, 'sp4_v_t_37') | |
// (11, 9, 'sp4_v_b_37') | |
// (11, 10, 'sp4_v_b_24') | |
// (11, 11, 'sp4_v_b_13') | |
// (11, 12, 'local_g0_2') | |
// (11, 12, 'local_g1_0') | |
// (11, 12, 'lutff_6/in_2') | |
// (11, 12, 'lutff_7/in_0') | |
// (11, 12, 'sp4_h_l_43') | |
// (11, 12, 'sp4_h_r_2') | |
// (11, 12, 'sp4_v_b_0') | |
// (11, 13, 'local_g2_7') | |
// (11, 13, 'local_g3_7') | |
// (11, 13, 'lutff_1/in_2') | |
// (11, 13, 'lutff_7/in_1') | |
// (11, 13, 'sp4_h_r_39') | |
// (12, 12, 'sp4_h_r_15') | |
// (12, 13, 'sp4_h_l_39') | |
// (13, 12, 'sp4_h_r_26') | |
// (14, 12, 'sp4_h_r_39') | |
// (15, 12, 'sp4_h_l_39') | |
wire n55; | |
// (4, 13, 'sp4_h_r_6') | |
// (5, 12, 'neigh_op_tnr_7') | |
// (5, 13, 'neigh_op_rgt_7') | |
// (5, 13, 'sp4_h_r_19') | |
// (5, 13, 'sp4_h_r_3') | |
// (5, 14, 'neigh_op_bnr_7') | |
// (6, 12, 'neigh_op_top_7') | |
// (6, 13, 'ram/RDATA_8') | |
// (6, 13, 'sp4_h_r_14') | |
// (6, 13, 'sp4_h_r_30') | |
// (6, 14, 'neigh_op_bot_7') | |
// (7, 12, 'neigh_op_tnl_7') | |
// (7, 13, 'neigh_op_lft_7') | |
// (7, 13, 'sp4_h_r_27') | |
// (7, 13, 'sp4_h_r_43') | |
// (7, 14, 'neigh_op_bnl_7') | |
// (8, 10, 'sp4_r_v_b_38') | |
// (8, 11, 'sp4_r_v_b_27') | |
// (8, 12, 'sp4_r_v_b_14') | |
// (8, 13, 'sp4_h_l_43') | |
// (8, 13, 'sp4_h_r_38') | |
// (8, 13, 'sp4_h_r_6') | |
// (8, 13, 'sp4_r_v_b_3') | |
// (9, 9, 'sp4_v_t_38') | |
// (9, 10, 'sp4_v_b_38') | |
// (9, 11, 'sp4_v_b_27') | |
// (9, 12, 'local_g1_6') | |
// (9, 12, 'lutff_6/in_3') | |
// (9, 12, 'sp4_v_b_14') | |
// (9, 13, 'sp4_h_l_38') | |
// (9, 13, 'sp4_h_r_19') | |
// (9, 13, 'sp4_h_r_3') | |
// (9, 13, 'sp4_v_b_3') | |
// (10, 13, 'local_g0_6') | |
// (10, 13, 'lutff_1/in_1') | |
// (10, 13, 'sp4_h_r_14') | |
// (10, 13, 'sp4_h_r_30') | |
// (11, 10, 'sp4_r_v_b_43') | |
// (11, 11, 'sp4_r_v_b_30') | |
// (11, 12, 'local_g3_3') | |
// (11, 12, 'lutff_7/in_3') | |
// (11, 12, 'sp4_r_v_b_19') | |
// (11, 13, 'local_g2_3') | |
// (11, 13, 'local_g3_3') | |
// (11, 13, 'lutff_2/in_0') | |
// (11, 13, 'lutff_6/in_2') | |
// (11, 13, 'lutff_7/in_2') | |
// (11, 13, 'sp4_h_r_27') | |
// (11, 13, 'sp4_h_r_43') | |
// (11, 13, 'sp4_r_v_b_6') | |
// (12, 9, 'sp4_v_t_43') | |
// (12, 10, 'sp4_v_b_43') | |
// (12, 11, 'sp4_v_b_30') | |
// (12, 12, 'local_g0_3') | |
// (12, 12, 'lutff_5/in_0') | |
// (12, 12, 'sp4_v_b_19') | |
// (12, 13, 'sp4_h_l_43') | |
// (12, 13, 'sp4_h_r_38') | |
// (12, 13, 'sp4_v_b_6') | |
// (13, 13, 'sp4_h_l_38') | |
wire n56; | |
// (4, 13, 'sp4_h_r_8') | |
// (5, 12, 'neigh_op_tnr_0') | |
// (5, 12, 'sp4_r_v_b_45') | |
// (5, 13, 'neigh_op_rgt_0') | |
// (5, 13, 'sp4_h_r_21') | |
// (5, 13, 'sp4_h_r_5') | |
// (5, 13, 'sp4_r_v_b_32') | |
// (5, 14, 'neigh_op_bnr_0') | |
// (5, 14, 'sp4_r_v_b_21') | |
// (5, 15, 'sp4_r_v_b_8') | |
// (6, 11, 'sp4_h_r_8') | |
// (6, 11, 'sp4_r_v_b_41') | |
// (6, 11, 'sp4_v_t_45') | |
// (6, 12, 'neigh_op_top_0') | |
// (6, 12, 'sp4_r_v_b_28') | |
// (6, 12, 'sp4_r_v_b_44') | |
// (6, 12, 'sp4_v_b_45') | |
// (6, 13, 'ram/RDATA_15') | |
// (6, 13, 'sp4_h_r_0') | |
// (6, 13, 'sp4_h_r_16') | |
// (6, 13, 'sp4_h_r_32') | |
// (6, 13, 'sp4_r_v_b_17') | |
// (6, 13, 'sp4_r_v_b_33') | |
// (6, 13, 'sp4_v_b_32') | |
// (6, 14, 'neigh_op_bot_0') | |
// (6, 14, 'sp4_r_v_b_20') | |
// (6, 14, 'sp4_r_v_b_4') | |
// (6, 14, 'sp4_v_b_21') | |
// (6, 15, 'sp4_r_v_b_9') | |
// (6, 15, 'sp4_v_b_8') | |
// (7, 10, 'sp4_v_t_41') | |
// (7, 11, 'sp4_h_r_21') | |
// (7, 11, 'sp4_h_r_9') | |
// (7, 11, 'sp4_v_b_41') | |
// (7, 11, 'sp4_v_t_44') | |
// (7, 12, 'neigh_op_tnl_0') | |
// (7, 12, 'sp4_v_b_28') | |
// (7, 12, 'sp4_v_b_44') | |
// (7, 13, 'neigh_op_lft_0') | |
// (7, 13, 'sp4_h_r_13') | |
// (7, 13, 'sp4_h_r_29') | |
// (7, 13, 'sp4_h_r_45') | |
// (7, 13, 'sp4_v_b_17') | |
// (7, 13, 'sp4_v_b_33') | |
// (7, 14, 'neigh_op_bnl_0') | |
// (7, 14, 'sp4_h_r_4') | |
// (7, 14, 'sp4_v_b_20') | |
// (7, 14, 'sp4_v_b_4') | |
// (7, 15, 'sp4_v_b_9') | |
// (8, 11, 'sp4_h_r_20') | |
// (8, 11, 'sp4_h_r_32') | |
// (8, 13, 'sp4_h_l_45') | |
// (8, 13, 'sp4_h_r_24') | |
// (8, 13, 'sp4_h_r_4') | |
// (8, 13, 'sp4_h_r_40') | |
// (8, 14, 'sp4_h_r_17') | |
// (9, 10, 'sp4_r_v_b_37') | |
// (9, 11, 'sp4_h_r_33') | |
// (9, 11, 'sp4_h_r_45') | |
// (9, 11, 'sp4_r_v_b_24') | |
// (9, 12, 'local_g2_5') | |
// (9, 12, 'lutff_2/in_1') | |
// (9, 12, 'lutff_4/in_1') | |
// (9, 12, 'lutff_6/in_1') | |
// (9, 12, 'sp4_r_v_b_13') | |
// (9, 13, 'local_g3_5') | |
// (9, 13, 'lutff_1/in_1') | |
// (9, 13, 'sp4_h_l_40') | |
// (9, 13, 'sp4_h_r_1') | |
// (9, 13, 'sp4_h_r_17') | |
// (9, 13, 'sp4_h_r_37') | |
// (9, 13, 'sp4_h_r_8') | |
// (9, 13, 'sp4_r_v_b_0') | |
// (9, 14, 'sp4_h_r_28') | |
// (10, 8, 'sp4_r_v_b_44') | |
// (10, 9, 'sp4_r_v_b_33') | |
// (10, 9, 'sp4_v_t_37') | |
// (10, 10, 'sp4_r_v_b_20') | |
// (10, 10, 'sp4_v_b_37') | |
// (10, 11, 'local_g2_0') | |
// (10, 11, 'lutff_2/in_0') | |
// (10, 11, 'lutff_5/in_1') | |
// (10, 11, 'sp4_h_l_45') | |
// (10, 11, 'sp4_h_r_11') | |
// (10, 11, 'sp4_h_r_44') | |
// (10, 11, 'sp4_r_v_b_41') | |
// (10, 11, 'sp4_r_v_b_9') | |
// (10, 11, 'sp4_v_b_24') | |
// (10, 12, 'local_g0_5') | |
// (10, 12, 'local_g1_5') | |
// (10, 12, 'lutff_0/in_1') | |
// (10, 12, 'lutff_4/in_0') | |
// (10, 12, 'lutff_5/in_3') | |
// (10, 12, 'sp4_r_v_b_28') | |
// (10, 12, 'sp4_v_b_13') | |
// (10, 13, 'local_g0_5') | |
// (10, 13, 'lutff_6/in_3') | |
// (10, 13, 'sp4_h_l_37') | |
// (10, 13, 'sp4_h_r_12') | |
// (10, 13, 'sp4_h_r_21') | |
// (10, 13, 'sp4_h_r_28') | |
// (10, 13, 'sp4_h_r_8') | |
// (10, 13, 'sp4_r_v_b_17') | |
// (10, 13, 'sp4_v_b_0') | |
// (10, 14, 'sp4_h_r_41') | |
// (10, 14, 'sp4_r_v_b_4') | |
// (11, 7, 'sp4_v_t_44') | |
// (11, 8, 'sp4_v_b_44') | |
// (11, 9, 'sp4_v_b_33') | |
// (11, 10, 'sp4_v_b_20') | |
// (11, 10, 'sp4_v_t_41') | |
// (11, 11, 'local_g1_1') | |
// (11, 11, 'lutff_4/in_0') | |
// (11, 11, 'lutff_6/in_0') | |
// (11, 11, 'sp4_h_l_44') | |
// (11, 11, 'sp4_h_r_22') | |
// (11, 11, 'sp4_v_b_41') | |
// (11, 11, 'sp4_v_b_9') | |
// (11, 12, 'local_g3_4') | |
// (11, 12, 'lutff_0/in_3') | |
// (11, 12, 'lutff_6/in_1') | |
// (11, 12, 'sp4_v_b_28') | |
// (11, 13, 'local_g2_0') | |
// (11, 13, 'local_g2_1') | |
// (11, 13, 'lutff_0/in_3') | |
// (11, 13, 'lutff_3/in_1') | |
// (11, 13, 'lutff_4/in_3') | |
// (11, 13, 'lutff_5/in_3') | |
// (11, 13, 'sp4_h_r_21') | |
// (11, 13, 'sp4_h_r_25') | |
// (11, 13, 'sp4_h_r_32') | |
// (11, 13, 'sp4_h_r_41') | |
// (11, 13, 'sp4_v_b_17') | |
// (11, 14, 'local_g0_7') | |
// (11, 14, 'lutff_3/in_2') | |
// (11, 14, 'sp4_h_l_41') | |
// (11, 14, 'sp4_h_r_7') | |
// (11, 14, 'sp4_v_b_4') | |
// (12, 10, 'sp4_r_v_b_45') | |
// (12, 11, 'sp4_h_r_35') | |
// (12, 11, 'sp4_r_v_b_32') | |
// (12, 12, 'local_g3_5') | |
// (12, 12, 'lutff_3/in_3') | |
// (12, 12, 'lutff_5/in_3') | |
// (12, 12, 'sp4_r_v_b_21') | |
// (12, 13, 'sp4_h_l_41') | |
// (12, 13, 'sp4_h_r_0') | |
// (12, 13, 'sp4_h_r_32') | |
// (12, 13, 'sp4_h_r_36') | |
// (12, 13, 'sp4_h_r_45') | |
// (12, 13, 'sp4_r_v_b_8') | |
// (12, 14, 'sp4_h_r_18') | |
// (13, 9, 'sp4_v_t_45') | |
// (13, 10, 'sp4_r_v_b_39') | |
// (13, 10, 'sp4_v_b_45') | |
// (13, 11, 'sp4_h_r_46') | |
// (13, 11, 'sp4_r_v_b_26') | |
// (13, 11, 'sp4_v_b_32') | |
// (13, 12, 'sp4_r_v_b_15') | |
// (13, 12, 'sp4_v_b_21') | |
// (13, 13, 'sp4_h_l_36') | |
// (13, 13, 'sp4_h_l_45') | |
// (13, 13, 'sp4_h_r_13') | |
// (13, 13, 'sp4_h_r_45') | |
// (13, 13, 'sp4_r_v_b_2') | |
// (13, 13, 'sp4_v_b_8') | |
// (13, 14, 'sp4_h_r_31') | |
// (14, 9, 'sp4_v_t_39') | |
// (14, 10, 'sp4_v_b_39') | |
// (14, 11, 'local_g3_2') | |
// (14, 11, 'lutff_2/in_3') | |
// (14, 11, 'sp4_h_l_46') | |
// (14, 11, 'sp4_h_r_7') | |
// (14, 11, 'sp4_r_v_b_36') | |
// (14, 11, 'sp4_v_b_26') | |
// (14, 12, 'sp4_r_v_b_25') | |
// (14, 12, 'sp4_v_b_15') | |
// (14, 13, 'local_g1_4') | |
// (14, 13, 'local_g3_0') | |
// (14, 13, 'lutff_0/in_3') | |
// (14, 13, 'lutff_7/in_2') | |
// (14, 13, 'sp4_h_l_45') | |
// (14, 13, 'sp4_h_r_24') | |
// (14, 13, 'sp4_h_r_4') | |
// (14, 13, 'sp4_r_v_b_12') | |
// (14, 13, 'sp4_v_b_2') | |
// (14, 14, 'sp4_h_r_42') | |
// (14, 14, 'sp4_r_v_b_1') | |
// (15, 10, 'sp4_v_t_36') | |
// (15, 11, 'local_g1_2') | |
// (15, 11, 'lutff_5/in_2') | |
// (15, 11, 'sp4_h_r_18') | |
// (15, 11, 'sp4_v_b_36') | |
// (15, 12, 'local_g3_1') | |
// (15, 12, 'lutff_0/in_2') | |
// (15, 12, 'sp4_v_b_25') | |
// (15, 13, 'sp4_h_r_17') | |
// (15, 13, 'sp4_h_r_37') | |
// (15, 13, 'sp4_v_b_12') | |
// (15, 14, 'local_g1_2') | |
// (15, 14, 'lutff_2/in_1') | |
// (15, 14, 'lutff_5/in_2') | |
// (15, 14, 'sp4_h_l_42') | |
// (15, 14, 'sp4_h_r_10') | |
// (15, 14, 'sp4_v_b_1') | |
// (16, 11, 'sp4_h_r_31') | |
// (16, 13, 'sp4_h_l_37') | |
// (16, 13, 'sp4_h_r_28') | |
// (16, 14, 'sp4_h_r_23') | |
// (17, 11, 'sp4_h_r_42') | |
// (17, 13, 'sp4_h_r_41') | |
// (17, 14, 'sp4_h_r_34') | |
// (18, 11, 'sp4_h_l_42') | |
// (18, 13, 'sp4_h_l_41') | |
// (18, 14, 'sp4_h_r_47') | |
// (19, 14, 'sp4_h_l_47') | |
wire n57; | |
// (4, 14, 'sp4_h_r_2') | |
// (5, 13, 'neigh_op_tnr_5') | |
// (5, 14, 'neigh_op_rgt_5') | |
// (5, 14, 'sp12_h_r_1') | |
// (5, 14, 'sp4_h_r_15') | |
// (5, 15, 'neigh_op_bnr_5') | |
// (6, 13, 'neigh_op_top_5') | |
// (6, 14, 'ram/RDATA_2') | |
// (6, 14, 'sp12_h_r_2') | |
// (6, 14, 'sp4_h_r_26') | |
// (6, 15, 'neigh_op_bot_5') | |
// (7, 13, 'neigh_op_tnl_5') | |
// (7, 14, 'neigh_op_lft_5') | |
// (7, 14, 'sp12_h_r_5') | |
// (7, 14, 'sp4_h_r_39') | |
// (7, 15, 'neigh_op_bnl_5') | |
// (8, 14, 'sp12_h_r_6') | |
// (8, 14, 'sp4_h_l_39') | |
// (8, 14, 'sp4_h_r_10') | |
// (9, 14, 'sp12_h_r_9') | |
// (9, 14, 'sp4_h_r_23') | |
// (10, 14, 'sp12_h_r_10') | |
// (10, 14, 'sp4_h_r_34') | |
// (11, 11, 'sp4_r_v_b_41') | |
// (11, 12, 'sp4_r_v_b_28') | |
// (11, 13, 'local_g3_1') | |
// (11, 13, 'lutff_0/in_0') | |
// (11, 13, 'sp4_r_v_b_17') | |
// (11, 14, 'local_g0_5') | |
// (11, 14, 'lutff_2/in_1') | |
// (11, 14, 'sp12_h_r_13') | |
// (11, 14, 'sp4_h_r_47') | |
// (11, 14, 'sp4_r_v_b_4') | |
// (12, 10, 'sp4_v_t_41') | |
// (12, 11, 'sp4_v_b_41') | |
// (12, 12, 'sp4_v_b_28') | |
// (12, 13, 'sp4_v_b_17') | |
// (12, 14, 'sp12_h_r_14') | |
// (12, 14, 'sp4_h_l_47') | |
// (12, 14, 'sp4_v_b_4') | |
// (13, 14, 'sp12_h_r_17') | |
// (14, 14, 'sp12_h_r_18') | |
// (15, 14, 'sp12_h_r_21') | |
// (16, 14, 'sp12_h_r_22') | |
// (17, 14, 'sp12_h_l_22') | |
wire n58; | |
// (4, 14, 'sp4_h_r_4') | |
// (5, 13, 'neigh_op_tnr_6') | |
// (5, 14, 'neigh_op_rgt_6') | |
// (5, 14, 'sp4_h_r_17') | |
// (5, 15, 'neigh_op_bnr_6') | |
// (6, 13, 'neigh_op_top_6') | |
// (6, 14, 'ram/RDATA_1') | |
// (6, 14, 'sp4_h_r_28') | |
// (6, 14, 'sp4_r_v_b_45') | |
// (6, 15, 'neigh_op_bot_6') | |
// (6, 15, 'sp4_r_v_b_32') | |
// (6, 16, 'sp4_r_v_b_21') | |
// (6, 17, 'sp4_r_v_b_8') | |
// (7, 13, 'neigh_op_tnl_6') | |
// (7, 13, 'sp4_h_r_8') | |
// (7, 13, 'sp4_v_t_45') | |
// (7, 14, 'neigh_op_lft_6') | |
// (7, 14, 'sp4_h_r_41') | |
// (7, 14, 'sp4_v_b_45') | |
// (7, 15, 'neigh_op_bnl_6') | |
// (7, 15, 'sp4_v_b_32') | |
// (7, 16, 'sp4_v_b_21') | |
// (7, 17, 'sp4_v_b_8') | |
// (8, 13, 'sp4_h_r_21') | |
// (8, 14, 'sp4_h_l_41') | |
// (8, 14, 'sp4_h_r_7') | |
// (9, 13, 'sp4_h_r_32') | |
// (9, 14, 'sp4_h_r_18') | |
// (10, 10, 'sp4_r_v_b_39') | |
// (10, 11, 'sp4_r_v_b_26') | |
// (10, 12, 'sp4_r_v_b_15') | |
// (10, 13, 'sp4_h_r_45') | |
// (10, 13, 'sp4_r_v_b_2') | |
// (10, 14, 'local_g2_7') | |
// (10, 14, 'lutff_1/in_0') | |
// (10, 14, 'lutff_6/in_1') | |
// (10, 14, 'sp4_h_r_31') | |
// (11, 9, 'sp4_v_t_39') | |
// (11, 10, 'sp4_v_b_39') | |
// (11, 11, 'sp4_v_b_26') | |
// (11, 12, 'local_g0_7') | |
// (11, 12, 'lutff_0/in_1') | |
// (11, 12, 'sp4_v_b_15') | |
// (11, 13, 'sp4_h_l_45') | |
// (11, 13, 'sp4_v_b_2') | |
// (11, 14, 'sp4_h_r_42') | |
// (12, 14, 'sp4_h_l_42') | |
reg n59 = 0; | |
// (4, 14, 'sp4_h_r_8') | |
// (5, 14, 'local_g0_5') | |
// (5, 14, 'lutff_7/in_0') | |
// (5, 14, 'sp4_h_r_21') | |
// (6, 12, 'neigh_op_tnr_2') | |
// (6, 13, 'local_g2_2') | |
// (6, 13, 'neigh_op_rgt_2') | |
// (6, 13, 'ram/WDATA_10') | |
// (6, 14, 'neigh_op_bnr_2') | |
// (6, 14, 'sp4_h_r_32') | |
// (7, 11, 'sp4_r_v_b_45') | |
// (7, 12, 'neigh_op_top_2') | |
// (7, 12, 'sp4_r_v_b_32') | |
// (7, 13, 'lutff_2/out') | |
// (7, 13, 'sp4_r_v_b_21') | |
// (7, 14, 'neigh_op_bot_2') | |
// (7, 14, 'sp4_h_r_45') | |
// (7, 14, 'sp4_r_v_b_8') | |
// (8, 10, 'sp4_v_t_45') | |
// (8, 11, 'sp4_v_b_45') | |
// (8, 12, 'neigh_op_tnl_2') | |
// (8, 12, 'sp4_v_b_32') | |
// (8, 13, 'neigh_op_lft_2') | |
// (8, 13, 'sp4_v_b_21') | |
// (8, 14, 'neigh_op_bnl_2') | |
// (8, 14, 'sp4_h_l_45') | |
// (8, 14, 'sp4_v_b_8') | |
wire n60; | |
// (4, 14, 'sp4_r_v_b_38') | |
// (4, 15, 'sp4_r_v_b_27') | |
// (4, 16, 'sp4_r_v_b_14') | |
// (4, 17, 'sp4_r_v_b_3') | |
// (4, 18, 'sp4_r_v_b_37') | |
// (4, 19, 'sp4_r_v_b_24') | |
// (4, 20, 'neigh_op_tnr_0') | |
// (4, 20, 'neigh_op_tnr_4') | |
// (4, 20, 'sp4_r_v_b_13') | |
// (5, 13, 'sp4_h_r_8') | |
// (5, 13, 'sp4_v_t_38') | |
// (5, 14, 'sp4_v_b_38') | |
// (5, 15, 'sp4_v_b_27') | |
// (5, 16, 'sp4_v_b_14') | |
// (5, 17, 'sp4_v_b_3') | |
// (5, 17, 'sp4_v_t_37') | |
// (5, 18, 'sp4_v_b_37') | |
// (5, 19, 'sp4_v_b_24') | |
// (5, 20, 'neigh_op_top_0') | |
// (5, 20, 'neigh_op_top_4') | |
// (5, 20, 'sp4_v_b_13') | |
// (5, 21, 'io_0/D_IN_0') | |
// (5, 21, 'span4_vert_0') | |
// (6, 13, 'sp4_h_r_21') | |
// (6, 20, 'neigh_op_tnl_0') | |
// (6, 20, 'neigh_op_tnl_4') | |
// (7, 13, 'sp4_h_r_32') | |
// (8, 13, 'local_g3_5') | |
// (8, 13, 'lutff_5/in_3') | |
// (8, 13, 'sp4_h_r_45') | |
// (9, 13, 'sp4_h_l_45') | |
reg n61 = 0; | |
// (4, 18, 'neigh_op_tnr_1') | |
// (4, 18, 'sp4_r_v_b_47') | |
// (4, 19, 'neigh_op_rgt_1') | |
// (4, 19, 'sp4_r_v_b_34') | |
// (4, 20, 'neigh_op_bnr_1') | |
// (4, 20, 'sp4_r_v_b_23') | |
// (5, 17, 'sp4_v_t_47') | |
// (5, 18, 'neigh_op_top_1') | |
// (5, 18, 'sp4_v_b_47') | |
// (5, 19, 'lutff_1/out') | |
// (5, 19, 'sp4_v_b_34') | |
// (5, 20, 'neigh_op_bot_1') | |
// (5, 20, 'sp4_v_b_23') | |
// (5, 21, 'io_0/OUT_ENB') | |
// (5, 21, 'local_g1_2') | |
// (5, 21, 'span4_vert_10') | |
// (6, 18, 'neigh_op_tnl_1') | |
// (6, 19, 'neigh_op_lft_1') | |
// (6, 20, 'neigh_op_bnl_1') | |
reg n62 = 0; | |
// (4, 19, 'neigh_op_tnr_7') | |
// (4, 20, 'neigh_op_rgt_7') | |
// (4, 21, 'logic_op_bnr_7') | |
// (5, 19, 'neigh_op_top_7') | |
// (5, 20, 'lutff_7/out') | |
// (5, 21, 'io_0/D_OUT_0') | |
// (5, 21, 'local_g1_7') | |
// (5, 21, 'logic_op_bot_7') | |
// (6, 19, 'neigh_op_tnl_7') | |
// (6, 20, 'neigh_op_lft_7') | |
// (6, 21, 'logic_op_bnl_7') | |
wire \pins[0] ; | |
// (4, 21, 'io_0/PAD') | |
reg n64 = 0; | |
// (5, 8, 'sp4_r_v_b_43') | |
// (5, 9, 'sp4_r_v_b_30') | |
// (5, 10, 'local_g3_3') | |
// (5, 10, 'lutff_1/in_3') | |
// (5, 10, 'sp4_r_v_b_19') | |
// (5, 11, 'sp4_r_v_b_6') | |
// (6, 7, 'sp4_h_r_6') | |
// (6, 7, 'sp4_v_t_43') | |
// (6, 8, 'sp4_r_v_b_43') | |
// (6, 8, 'sp4_v_b_43') | |
// (6, 9, 'sp4_r_v_b_30') | |
// (6, 9, 'sp4_v_b_30') | |
// (6, 10, 'sp4_r_v_b_19') | |
// (6, 10, 'sp4_v_b_19') | |
// (6, 11, 'sp4_r_v_b_6') | |
// (6, 11, 'sp4_v_b_6') | |
// (7, 7, 'sp4_h_r_0') | |
// (7, 7, 'sp4_h_r_19') | |
// (7, 7, 'sp4_h_r_5') | |
// (7, 7, 'sp4_v_t_43') | |
// (7, 8, 'sp4_v_b_43') | |
// (7, 9, 'sp4_v_b_30') | |
// (7, 10, 'local_g1_3') | |
// (7, 10, 'lutff_4/in_2') | |
// (7, 10, 'sp4_v_b_19') | |
// (7, 11, 'sp4_v_b_6') | |
// (8, 7, 'local_g1_5') | |
// (8, 7, 'lutff_global/s_r') | |
// (8, 7, 'sp4_h_r_13') | |
// (8, 7, 'sp4_h_r_16') | |
// (8, 7, 'sp4_h_r_30') | |
// (9, 2, 'sp4_r_v_b_44') | |
// (9, 3, 'neigh_op_tnr_2') | |
// (9, 3, 'sp4_r_v_b_33') | |
// (9, 4, 'neigh_op_rgt_2') | |
// (9, 4, 'sp4_r_v_b_20') | |
// (9, 4, 'sp4_r_v_b_36') | |
// (9, 5, 'neigh_op_bnr_2') | |
// (9, 5, 'sp4_r_v_b_25') | |
// (9, 5, 'sp4_r_v_b_9') | |
// (9, 6, 'sp4_r_v_b_12') | |
// (9, 6, 'sp4_r_v_b_40') | |
// (9, 7, 'local_g1_1') | |
// (9, 7, 'local_g3_5') | |
// (9, 7, 'lutff_7/in_3') | |
// (9, 7, 'lutff_global/s_r') | |
// (9, 7, 'sp4_h_r_24') | |
// (9, 7, 'sp4_h_r_29') | |
// (9, 7, 'sp4_h_r_43') | |
// (9, 7, 'sp4_r_v_b_1') | |
// (9, 7, 'sp4_r_v_b_29') | |
// (9, 8, 'local_g2_4') | |
// (9, 8, 'lutff_global/s_r') | |
// (9, 8, 'sp4_r_v_b_16') | |
// (9, 8, 'sp4_r_v_b_36') | |
// (9, 9, 'sp4_r_v_b_25') | |
// (9, 9, 'sp4_r_v_b_5') | |
// (9, 10, 'sp4_r_v_b_12') | |
// (9, 11, 'sp4_r_v_b_1') | |
// (10, 1, 'sp4_v_t_44') | |
// (10, 2, 'sp4_v_b_44') | |
// (10, 3, 'neigh_op_top_2') | |
// (10, 3, 'sp4_v_b_33') | |
// (10, 3, 'sp4_v_t_36') | |
// (10, 4, 'lutff_2/out') | |
// (10, 4, 'sp4_r_v_b_37') | |
// (10, 4, 'sp4_v_b_20') | |
// (10, 4, 'sp4_v_b_36') | |
// (10, 5, 'neigh_op_bot_2') | |
// (10, 5, 'sp4_r_v_b_24') | |
// (10, 5, 'sp4_v_b_25') | |
// (10, 5, 'sp4_v_b_9') | |
// (10, 5, 'sp4_v_t_40') | |
// (10, 6, 'sp4_r_v_b_13') | |
// (10, 6, 'sp4_v_b_12') | |
// (10, 6, 'sp4_v_b_40') | |
// (10, 7, 'local_g1_0') | |
// (10, 7, 'lutff_3/in_2') | |
// (10, 7, 'lutff_7/in_2') | |
// (10, 7, 'sp4_h_l_43') | |
// (10, 7, 'sp4_h_r_37') | |
// (10, 7, 'sp4_h_r_40') | |
// (10, 7, 'sp4_r_v_b_0') | |
// (10, 7, 'sp4_v_b_1') | |
// (10, 7, 'sp4_v_b_29') | |
// (10, 7, 'sp4_v_t_36') | |
// (10, 8, 'sp4_v_b_16') | |
// (10, 8, 'sp4_v_b_36') | |
// (10, 9, 'local_g1_5') | |
// (10, 9, 'lutff_2/in_0') | |
// (10, 9, 'sp4_v_b_25') | |
// (10, 9, 'sp4_v_b_5') | |
// (10, 10, 'sp4_v_b_12') | |
// (10, 11, 'sp4_v_b_1') | |
// (11, 3, 'neigh_op_tnl_2') | |
// (11, 3, 'sp4_v_t_37') | |
// (11, 4, 'neigh_op_lft_2') | |
// (11, 4, 'sp4_v_b_37') | |
// (11, 5, 'neigh_op_bnl_2') | |
// (11, 5, 'sp4_v_b_24') | |
// (11, 6, 'sp4_v_b_13') | |
// (11, 7, 'sp4_h_l_37') | |
// (11, 7, 'sp4_h_l_40') | |
// (11, 7, 'sp4_v_b_0') | |
reg n65 = 0; | |
// (5, 10, 'sp4_r_v_b_40') | |
// (5, 11, 'sp4_r_v_b_29') | |
// (5, 12, 'local_g3_0') | |
// (5, 12, 'lutff_0/in_3') | |
// (5, 12, 'lutff_6/in_3') | |
// (5, 12, 'sp4_r_v_b_16') | |
// (5, 12, 'sp4_r_v_b_43') | |
// (5, 13, 'sp4_r_v_b_30') | |
// (5, 13, 'sp4_r_v_b_5') | |
// (5, 14, 'sp4_r_v_b_19') | |
// (5, 15, 'sp4_r_v_b_6') | |
// (6, 9, 'sp4_h_r_11') | |
// (6, 9, 'sp4_v_t_40') | |
// (6, 10, 'sp4_r_v_b_43') | |
// (6, 10, 'sp4_v_b_40') | |
// (6, 11, 'sp4_h_r_0') | |
// (6, 11, 'sp4_r_v_b_30') | |
// (6, 11, 'sp4_v_b_29') | |
// (6, 11, 'sp4_v_t_43') | |
// (6, 12, 'sp4_r_v_b_19') | |
// (6, 12, 'sp4_v_b_16') | |
// (6, 12, 'sp4_v_b_43') | |
// (6, 13, 'sp4_r_v_b_6') | |
// (6, 13, 'sp4_v_b_30') | |
// (6, 13, 'sp4_v_b_5') | |
// (6, 14, 'local_g1_3') | |
// (6, 14, 'ram/WCLKE') | |
// (6, 14, 'sp4_v_b_19') | |
// (6, 15, 'sp4_v_b_6') | |
// (7, 9, 'sp4_h_r_22') | |
// (7, 9, 'sp4_h_r_6') | |
// (7, 9, 'sp4_v_t_43') | |
// (7, 10, 'sp4_v_b_43') | |
// (7, 11, 'sp4_h_r_13') | |
// (7, 11, 'sp4_v_b_30') | |
// (7, 12, 'local_g0_3') | |
// (7, 12, 'lutff_4/in_3') | |
// (7, 12, 'sp4_v_b_19') | |
// (7, 13, 'sp4_v_b_6') | |
// (8, 8, 'neigh_op_tnr_7') | |
// (8, 9, 'neigh_op_rgt_7') | |
// (8, 9, 'sp4_h_r_19') | |
// (8, 9, 'sp4_h_r_35') | |
// (8, 10, 'neigh_op_bnr_7') | |
// (8, 11, 'sp4_h_r_24') | |
// (9, 8, 'neigh_op_top_7') | |
// (9, 8, 'sp4_r_v_b_42') | |
// (9, 9, 'lutff_7/out') | |
// (9, 9, 'sp4_h_r_30') | |
// (9, 9, 'sp4_h_r_46') | |
// (9, 9, 'sp4_r_v_b_31') | |
// (9, 10, 'neigh_op_bot_7') | |
// (9, 10, 'sp4_r_v_b_18') | |
// (9, 11, 'sp4_h_r_37') | |
// (9, 11, 'sp4_r_v_b_7') | |
// (10, 7, 'sp4_v_t_42') | |
// (10, 8, 'neigh_op_tnl_7') | |
// (10, 8, 'sp4_v_b_42') | |
// (10, 9, 'neigh_op_lft_7') | |
// (10, 9, 'sp4_h_l_46') | |
// (10, 9, 'sp4_h_r_43') | |
// (10, 9, 'sp4_v_b_31') | |
// (10, 10, 'neigh_op_bnl_7') | |
// (10, 10, 'sp4_v_b_18') | |
// (10, 11, 'sp4_h_l_37') | |
// (10, 11, 'sp4_v_b_7') | |
// (11, 9, 'sp4_h_l_43') | |
wire n66; | |
// (5, 11, 'local_g1_2') | |
// (5, 11, 'lutff_3/in_0') | |
// (5, 11, 'sp4_h_r_10') | |
// (6, 11, 'sp4_h_r_23') | |
// (7, 11, 'sp4_h_r_34') | |
// (8, 11, 'sp4_h_r_47') | |
// (9, 11, 'sp4_h_l_47') | |
// (9, 11, 'sp4_h_r_10') | |
// (10, 11, 'sp4_h_r_23') | |
// (11, 11, 'sp4_h_r_34') | |
// (12, 11, 'sp4_h_r_47') | |
// (12, 11, 'sp4_r_v_b_40') | |
// (12, 12, 'sp4_r_v_b_29') | |
// (12, 13, 'sp4_r_v_b_16') | |
// (12, 14, 'sp4_r_v_b_5') | |
// (13, 10, 'sp4_h_r_11') | |
// (13, 10, 'sp4_v_t_40') | |
// (13, 11, 'sp4_h_l_47') | |
// (13, 11, 'sp4_h_r_10') | |
// (13, 11, 'sp4_v_b_40') | |
// (13, 12, 'local_g0_7') | |
// (13, 12, 'lutff_2/in_3') | |
// (13, 12, 'sp4_h_r_7') | |
// (13, 12, 'sp4_v_b_29') | |
// (13, 13, 'local_g0_0') | |
// (13, 13, 'lutff_6/in_0') | |
// (13, 13, 'sp4_v_b_16') | |
// (13, 14, 'sp4_v_b_5') | |
// (14, 10, 'sp4_h_r_22') | |
// (14, 11, 'sp4_h_r_23') | |
// (14, 12, 'sp4_h_r_18') | |
// (15, 10, 'sp4_h_r_35') | |
// (15, 10, 'sp4_r_v_b_40') | |
// (15, 11, 'sp4_h_r_34') | |
// (15, 11, 'sp4_r_v_b_29') | |
// (15, 12, 'sp4_h_r_31') | |
// (15, 12, 'sp4_r_v_b_16') | |
// (15, 13, 'local_g1_5') | |
// (15, 13, 'lutff_1/in_3') | |
// (15, 13, 'sp4_r_v_b_5') | |
// (16, 9, 'sp4_h_r_11') | |
// (16, 9, 'sp4_v_t_40') | |
// (16, 10, 'sp4_h_r_46') | |
// (16, 10, 'sp4_v_b_40') | |
// (16, 11, 'sp4_h_r_47') | |
// (16, 11, 'sp4_v_b_29') | |
// (16, 12, 'sp4_h_r_42') | |
// (16, 12, 'sp4_v_b_16') | |
// (16, 13, 'sp4_v_b_5') | |
// (17, 9, 'sp4_h_r_22') | |
// (17, 10, 'sp4_h_l_46') | |
// (17, 10, 'sp4_h_r_11') | |
// (17, 11, 'sp4_h_l_47') | |
// (17, 11, 'sp4_h_r_7') | |
// (17, 12, 'sp4_h_l_42') | |
// (17, 12, 'sp4_h_r_7') | |
// (18, 9, 'sp4_h_r_35') | |
// (18, 10, 'sp4_h_r_22') | |
// (18, 11, 'sp4_h_r_18') | |
// (18, 12, 'sp4_h_r_18') | |
// (19, 9, 'neigh_op_tnr_7') | |
// (19, 9, 'sp4_h_r_46') | |
// (19, 10, 'neigh_op_rgt_7') | |
// (19, 10, 'sp4_h_r_35') | |
// (19, 10, 'sp4_r_v_b_46') | |
// (19, 11, 'local_g1_7') | |
// (19, 11, 'neigh_op_bnr_7') | |
// (19, 11, 'ram/WDATA_10') | |
// (19, 11, 'sp4_h_r_31') | |
// (19, 11, 'sp4_r_v_b_35') | |
// (19, 12, 'sp4_h_r_31') | |
// (19, 12, 'sp4_r_v_b_22') | |
// (19, 13, 'sp4_r_v_b_11') | |
// (20, 8, 'sp4_r_v_b_39') | |
// (20, 9, 'neigh_op_top_7') | |
// (20, 9, 'sp4_h_l_46') | |
// (20, 9, 'sp4_r_v_b_26') | |
// (20, 9, 'sp4_r_v_b_42') | |
// (20, 9, 'sp4_v_t_46') | |
// (20, 10, 'lutff_7/out') | |
// (20, 10, 'sp4_h_r_46') | |
// (20, 10, 'sp4_r_v_b_15') | |
// (20, 10, 'sp4_r_v_b_31') | |
// (20, 10, 'sp4_v_b_46') | |
// (20, 11, 'neigh_op_bot_7') | |
// (20, 11, 'sp4_h_r_42') | |
// (20, 11, 'sp4_r_v_b_18') | |
// (20, 11, 'sp4_r_v_b_2') | |
// (20, 11, 'sp4_v_b_35') | |
// (20, 12, 'sp4_h_r_42') | |
// (20, 12, 'sp4_r_v_b_7') | |
// (20, 12, 'sp4_v_b_22') | |
// (20, 13, 'sp4_v_b_11') | |
// (21, 7, 'sp4_v_t_39') | |
// (21, 8, 'sp4_v_b_39') | |
// (21, 8, 'sp4_v_t_42') | |
// (21, 9, 'neigh_op_tnl_7') | |
// (21, 9, 'sp4_v_b_26') | |
// (21, 9, 'sp4_v_b_42') | |
// (21, 10, 'neigh_op_lft_7') | |
// (21, 10, 'sp4_h_l_46') | |
// (21, 10, 'sp4_v_b_15') | |
// (21, 10, 'sp4_v_b_31') | |
// (21, 11, 'neigh_op_bnl_7') | |
// (21, 11, 'sp4_h_l_42') | |
// (21, 11, 'sp4_v_b_18') | |
// (21, 11, 'sp4_v_b_2') | |
// (21, 12, 'sp4_h_l_42') | |
// (21, 12, 'sp4_v_b_7') | |
wire n67; | |
// (5, 11, 'sp4_r_v_b_40') | |
// (5, 12, 'sp4_r_v_b_29') | |
// (5, 13, 'sp4_r_v_b_16') | |
// (5, 14, 'sp4_r_v_b_5') | |
// (6, 10, 'sp4_v_t_40') | |
// (6, 11, 'sp4_v_b_40') | |
// (6, 12, 'sp4_v_b_29') | |
// (6, 13, 'local_g1_0') | |
// (6, 13, 'ram/RADDR_2') | |
// (6, 13, 'sp4_v_b_16') | |
// (6, 14, 'sp4_h_r_5') | |
// (6, 14, 'sp4_v_b_5') | |
// (7, 14, 'sp4_h_r_16') | |
// (8, 14, 'sp4_h_r_29') | |
// (9, 11, 'sp4_r_v_b_37') | |
// (9, 12, 'sp4_r_v_b_24') | |
// (9, 13, 'neigh_op_tnr_0') | |
// (9, 13, 'sp4_r_v_b_13') | |
// (9, 14, 'neigh_op_rgt_0') | |
// (9, 14, 'sp4_h_r_40') | |
// (9, 14, 'sp4_r_v_b_0') | |
// (9, 15, 'neigh_op_bnr_0') | |
// (10, 10, 'sp4_v_t_37') | |
// (10, 11, 'sp4_v_b_37') | |
// (10, 12, 'sp4_v_b_24') | |
// (10, 13, 'neigh_op_top_0') | |
// (10, 13, 'sp4_v_b_13') | |
// (10, 14, 'local_g0_0') | |
// (10, 14, 'lutff_0/out') | |
// (10, 14, 'lutff_7/in_1') | |
// (10, 14, 'sp4_h_l_40') | |
// (10, 14, 'sp4_v_b_0') | |
// (10, 15, 'neigh_op_bot_0') | |
// (11, 13, 'neigh_op_tnl_0') | |
// (11, 14, 'neigh_op_lft_0') | |
// (11, 15, 'neigh_op_bnl_0') | |
wire n68; | |
// (5, 11, 'sp4_r_v_b_43') | |
// (5, 12, 'sp4_r_v_b_30') | |
// (5, 13, 'sp4_r_v_b_19') | |
// (5, 14, 'sp4_r_v_b_6') | |
// (6, 10, 'sp4_v_t_43') | |
// (6, 11, 'sp4_v_b_43') | |
// (6, 12, 'sp4_v_b_30') | |
// (6, 13, 'local_g0_3') | |
// (6, 13, 'ram/RADDR_0') | |
// (6, 13, 'sp4_v_b_19') | |
// (6, 14, 'sp4_h_r_1') | |
// (6, 14, 'sp4_v_b_6') | |
// (7, 14, 'sp4_h_r_12') | |
// (8, 14, 'sp4_h_r_25') | |
// (9, 14, 'sp4_h_r_36') | |
// (10, 13, 'neigh_op_tnr_6') | |
// (10, 14, 'neigh_op_rgt_6') | |
// (10, 14, 'sp4_h_l_36') | |
// (10, 14, 'sp4_h_r_1') | |
// (10, 15, 'neigh_op_bnr_6') | |
// (11, 13, 'neigh_op_top_6') | |
// (11, 14, 'local_g0_6') | |
// (11, 14, 'lutff_0/in_0') | |
// (11, 14, 'lutff_6/out') | |
// (11, 14, 'sp4_h_r_12') | |
// (11, 15, 'neigh_op_bot_6') | |
// (12, 13, 'neigh_op_tnl_6') | |
// (12, 14, 'neigh_op_lft_6') | |
// (12, 14, 'sp4_h_r_25') | |
// (12, 15, 'neigh_op_bnl_6') | |
// (13, 14, 'sp4_h_r_36') | |
// (14, 14, 'sp4_h_l_36') | |
wire n69; | |
// (5, 11, 'sp4_r_v_b_46') | |
// (5, 12, 'neigh_op_tnr_3') | |
// (5, 12, 'sp4_r_v_b_35') | |
// (5, 13, 'neigh_op_rgt_3') | |
// (5, 13, 'sp4_h_r_11') | |
// (5, 13, 'sp4_r_v_b_22') | |
// (5, 14, 'neigh_op_bnr_3') | |
// (5, 14, 'sp4_r_v_b_11') | |
// (6, 10, 'sp4_v_t_46') | |
// (6, 11, 'sp4_r_v_b_47') | |
// (6, 11, 'sp4_v_b_46') | |
// (6, 12, 'neigh_op_top_3') | |
// (6, 12, 'sp4_r_v_b_34') | |
// (6, 12, 'sp4_v_b_35') | |
// (6, 13, 'ram/RDATA_12') | |
// (6, 13, 'sp4_h_r_22') | |
// (6, 13, 'sp4_r_v_b_23') | |
// (6, 13, 'sp4_r_v_b_39') | |
// (6, 13, 'sp4_v_b_22') | |
// (6, 14, 'neigh_op_bot_3') | |
// (6, 14, 'sp4_h_r_11') | |
// (6, 14, 'sp4_r_v_b_10') | |
// (6, 14, 'sp4_r_v_b_26') | |
// (6, 14, 'sp4_v_b_11') | |
// (6, 15, 'sp4_r_v_b_15') | |
// (6, 16, 'sp4_r_v_b_2') | |
// (7, 10, 'sp4_v_t_47') | |
// (7, 11, 'sp4_v_b_47') | |
// (7, 12, 'neigh_op_tnl_3') | |
// (7, 12, 'sp4_h_r_7') | |
// (7, 12, 'sp4_v_b_34') | |
// (7, 12, 'sp4_v_t_39') | |
// (7, 13, 'neigh_op_lft_3') | |
// (7, 13, 'sp4_h_r_35') | |
// (7, 13, 'sp4_v_b_23') | |
// (7, 13, 'sp4_v_b_39') | |
// (7, 14, 'neigh_op_bnl_3') | |
// (7, 14, 'sp4_h_r_10') | |
// (7, 14, 'sp4_h_r_22') | |
// (7, 14, 'sp4_v_b_10') | |
// (7, 14, 'sp4_v_b_26') | |
// (7, 15, 'sp4_v_b_15') | |
// (7, 16, 'sp4_v_b_2') | |
// (8, 12, 'sp4_h_r_18') | |
// (8, 13, 'sp4_h_r_46') | |
// (8, 14, 'sp4_h_r_23') | |
// (8, 14, 'sp4_h_r_35') | |
// (9, 12, 'sp4_h_r_31') | |
// (9, 13, 'sp4_h_l_46') | |
// (9, 13, 'sp4_h_r_11') | |
// (9, 14, 'sp4_h_r_34') | |
// (9, 14, 'sp4_h_r_46') | |
// (10, 9, 'sp4_r_v_b_36') | |
// (10, 10, 'sp4_r_v_b_25') | |
// (10, 11, 'sp4_r_v_b_12') | |
// (10, 12, 'sp4_h_r_42') | |
// (10, 12, 'sp4_r_v_b_1') | |
// (10, 13, 'sp4_h_r_22') | |
// (10, 14, 'sp4_h_l_46') | |
// (10, 14, 'sp4_h_r_2') | |
// (10, 14, 'sp4_h_r_47') | |
// (11, 8, 'sp4_v_t_36') | |
// (11, 9, 'sp4_v_b_36') | |
// (11, 10, 'sp4_v_b_25') | |
// (11, 11, 'local_g0_4') | |
// (11, 11, 'lutff_6/in_2') | |
// (11, 11, 'sp4_v_b_12') | |
// (11, 12, 'sp4_h_l_42') | |
// (11, 12, 'sp4_v_b_1') | |
// (11, 13, 'sp4_h_r_35') | |
// (11, 14, 'local_g0_1') | |
// (11, 14, 'local_g0_2') | |
// (11, 14, 'lutff_1/in_1') | |
// (11, 14, 'lutff_3/in_0') | |
// (11, 14, 'lutff_4/in_1') | |
// (11, 14, 'sp4_h_l_47') | |
// (11, 14, 'sp4_h_r_1') | |
// (11, 14, 'sp4_h_r_10') | |
// (11, 14, 'sp4_h_r_15') | |
// (12, 13, 'local_g2_6') | |
// (12, 13, 'lutff_6/in_2') | |
// (12, 13, 'sp4_h_r_46') | |
// (12, 14, 'local_g1_4') | |
// (12, 14, 'local_g2_2') | |
// (12, 14, 'lutff_1/in_1') | |
// (12, 14, 'lutff_4/in_1') | |
// (12, 14, 'lutff_7/in_0') | |
// (12, 14, 'sp4_h_r_12') | |
// (12, 14, 'sp4_h_r_23') | |
// (12, 14, 'sp4_h_r_26') | |
// (12, 14, 'sp4_r_v_b_41') | |
// (12, 15, 'local_g0_4') | |
// (12, 15, 'local_g1_4') | |
// (12, 15, 'lutff_1/in_3') | |
// (12, 15, 'lutff_5/in_0') | |
// (12, 15, 'lutff_6/in_0') | |
// (12, 15, 'sp4_r_v_b_28') | |
// (12, 16, 'sp4_r_v_b_17') | |
// (12, 17, 'sp4_r_v_b_4') | |
// (13, 13, 'sp4_h_l_46') | |
// (13, 13, 'sp4_v_t_41') | |
// (13, 14, 'sp4_h_r_25') | |
// (13, 14, 'sp4_h_r_34') | |
// (13, 14, 'sp4_h_r_39') | |
// (13, 14, 'sp4_v_b_41') | |
// (13, 15, 'sp4_v_b_28') | |
// (13, 16, 'sp4_v_b_17') | |
// (13, 17, 'sp4_v_b_4') | |
// (14, 14, 'sp4_h_l_39') | |
// (14, 14, 'sp4_h_r_36') | |
// (14, 14, 'sp4_h_r_47') | |
// (15, 14, 'sp4_h_l_36') | |
// (15, 14, 'sp4_h_l_47') | |
wire n70; | |
// (5, 12, 'neigh_op_tnr_1') | |
// (5, 13, 'neigh_op_rgt_1') | |
// (5, 14, 'neigh_op_bnr_1') | |
// (6, 11, 'sp4_r_v_b_43') | |
// (6, 12, 'neigh_op_top_1') | |
// (6, 12, 'sp4_r_v_b_30') | |
// (6, 13, 'ram/RDATA_14') | |
// (6, 13, 'sp4_h_r_2') | |
// (6, 13, 'sp4_r_v_b_19') | |
// (6, 14, 'neigh_op_bot_1') | |
// (6, 14, 'sp4_r_v_b_6') | |
// (7, 10, 'sp4_v_t_43') | |
// (7, 11, 'sp4_v_b_43') | |
// (7, 12, 'neigh_op_tnl_1') | |
// (7, 12, 'sp4_v_b_30') | |
// (7, 13, 'neigh_op_lft_1') | |
// (7, 13, 'sp4_h_r_15') | |
// (7, 13, 'sp4_v_b_19') | |
// (7, 14, 'neigh_op_bnl_1') | |
// (7, 14, 'sp4_h_r_6') | |
// (7, 14, 'sp4_v_b_6') | |
// (8, 13, 'sp4_h_r_26') | |
// (8, 14, 'sp4_h_r_19') | |
// (9, 10, 'sp4_r_v_b_39') | |
// (9, 10, 'sp4_r_v_b_45') | |
// (9, 11, 'sp4_r_v_b_26') | |
// (9, 11, 'sp4_r_v_b_32') | |
// (9, 12, 'local_g2_7') | |
// (9, 12, 'local_g3_5') | |
// (9, 12, 'lutff_2/in_3') | |
// (9, 12, 'lutff_4/in_0') | |
// (9, 12, 'lutff_6/in_2') | |
// (9, 12, 'sp4_r_v_b_15') | |
// (9, 12, 'sp4_r_v_b_21') | |
// (9, 13, 'local_g3_7') | |
// (9, 13, 'lutff_1/in_3') | |
// (9, 13, 'sp4_h_r_39') | |
// (9, 13, 'sp4_r_v_b_2') | |
// (9, 13, 'sp4_r_v_b_8') | |
// (9, 14, 'sp4_h_r_30') | |
// (10, 9, 'sp4_v_t_39') | |
// (10, 9, 'sp4_v_t_45') | |
// (10, 10, 'sp4_v_b_39') | |
// (10, 10, 'sp4_v_b_45') | |
// (10, 11, 'sp4_v_b_26') | |
// (10, 11, 'sp4_v_b_32') | |
// (10, 12, 'local_g0_7') | |
// (10, 12, 'lutff_0/in_3') | |
// (10, 12, 'lutff_5/in_0') | |
// (10, 12, 'sp4_v_b_15') | |
// (10, 12, 'sp4_v_b_21') | |
// (10, 13, 'local_g0_2') | |
// (10, 13, 'lutff_5/in_3') | |
// (10, 13, 'sp4_h_l_39') | |
// (10, 13, 'sp4_h_r_2') | |
// (10, 13, 'sp4_v_b_2') | |
// (10, 13, 'sp4_v_b_8') | |
// (10, 14, 'sp4_h_r_43') | |
// (11, 13, 'sp4_h_r_15') | |
// (11, 14, 'sp4_h_l_43') | |
// (11, 14, 'sp4_h_r_2') | |
// (12, 13, 'sp4_h_r_26') | |
// (12, 14, 'sp4_h_r_15') | |
// (13, 13, 'sp4_h_r_39') | |
// (13, 14, 'local_g3_2') | |
// (13, 14, 'lutff_5/in_0') | |
// (13, 14, 'lutff_6/in_1') | |
// (13, 14, 'sp4_h_r_26') | |
// (14, 11, 'sp4_r_v_b_39') | |
// (14, 12, 'sp4_r_v_b_26') | |
// (14, 13, 'local_g0_2') | |
// (14, 13, 'lutff_7/in_1') | |
// (14, 13, 'sp4_h_l_39') | |
// (14, 13, 'sp4_h_r_10') | |
// (14, 13, 'sp4_r_v_b_15') | |
// (14, 14, 'sp4_h_r_39') | |
// (14, 14, 'sp4_r_v_b_2') | |
// (15, 10, 'sp4_v_t_39') | |
// (15, 11, 'sp4_v_b_39') | |
// (15, 12, 'local_g2_2') | |
// (15, 12, 'lutff_0/in_0') | |
// (15, 12, 'sp4_v_b_26') | |
// (15, 13, 'sp4_h_r_23') | |
// (15, 13, 'sp4_v_b_15') | |
// (15, 14, 'local_g0_2') | |
// (15, 14, 'lutff_0/in_0') | |
// (15, 14, 'sp4_h_l_39') | |
// (15, 14, 'sp4_h_r_2') | |
// (15, 14, 'sp4_v_b_2') | |
// (16, 13, 'sp4_h_r_34') | |
// (16, 14, 'sp4_h_r_15') | |
// (17, 13, 'sp4_h_r_47') | |
// (17, 14, 'sp4_h_r_26') | |
// (18, 13, 'sp4_h_l_47') | |
// (18, 14, 'sp4_h_r_39') | |
// (19, 14, 'sp4_h_l_39') | |
wire n71; | |
// (5, 12, 'neigh_op_tnr_6') | |
// (5, 13, 'neigh_op_rgt_6') | |
// (5, 13, 'sp4_h_r_1') | |
// (5, 14, 'neigh_op_bnr_6') | |
// (6, 12, 'neigh_op_top_6') | |
// (6, 12, 'sp4_r_v_b_40') | |
// (6, 13, 'ram/RDATA_9') | |
// (6, 13, 'sp4_h_r_12') | |
// (6, 13, 'sp4_r_v_b_29') | |
// (6, 13, 'sp4_r_v_b_45') | |
// (6, 14, 'neigh_op_bot_6') | |
// (6, 14, 'sp4_r_v_b_16') | |
// (6, 14, 'sp4_r_v_b_32') | |
// (6, 15, 'sp4_r_v_b_21') | |
// (6, 15, 'sp4_r_v_b_5') | |
// (6, 16, 'sp4_r_v_b_8') | |
// (7, 11, 'sp4_h_r_5') | |
// (7, 11, 'sp4_v_t_40') | |
// (7, 12, 'neigh_op_tnl_6') | |
// (7, 12, 'sp4_h_r_1') | |
// (7, 12, 'sp4_v_b_40') | |
// (7, 12, 'sp4_v_t_45') | |
// (7, 13, 'neigh_op_lft_6') | |
// (7, 13, 'sp4_h_r_25') | |
// (7, 13, 'sp4_v_b_29') | |
// (7, 13, 'sp4_v_b_45') | |
// (7, 14, 'neigh_op_bnl_6') | |
// (7, 14, 'sp4_v_b_16') | |
// (7, 14, 'sp4_v_b_32') | |
// (7, 15, 'sp4_v_b_21') | |
// (7, 15, 'sp4_v_b_5') | |
// (7, 16, 'sp4_v_b_8') | |
// (8, 10, 'sp4_r_v_b_36') | |
// (8, 11, 'sp4_h_r_16') | |
// (8, 11, 'sp4_r_v_b_25') | |
// (8, 12, 'sp4_h_r_12') | |
// (8, 12, 'sp4_r_v_b_12') | |
// (8, 13, 'sp4_h_r_36') | |
// (8, 13, 'sp4_r_v_b_1') | |
// (9, 9, 'sp4_v_t_36') | |
// (9, 10, 'sp4_v_b_36') | |
// (9, 11, 'sp4_h_r_29') | |
// (9, 11, 'sp4_v_b_25') | |
// (9, 12, 'local_g1_4') | |
// (9, 12, 'lutff_1/in_2') | |
// (9, 12, 'sp4_h_r_25') | |
// (9, 12, 'sp4_v_b_12') | |
// (9, 13, 'sp4_h_l_36') | |
// (9, 13, 'sp4_v_b_1') | |
// (10, 11, 'local_g3_0') | |
// (10, 11, 'lutff_5/in_0') | |
// (10, 11, 'sp4_h_r_40') | |
// (10, 12, 'local_g2_4') | |
// (10, 12, 'lutff_0/in_2') | |
// (10, 12, 'sp4_h_r_36') | |
// (11, 11, 'sp4_h_l_40') | |
// (11, 12, 'sp4_h_l_36') | |
reg n72 = 0; | |
// (5, 12, 'sp4_r_v_b_36') | |
// (5, 13, 'sp4_r_v_b_25') | |
// (5, 14, 'sp4_r_v_b_12') | |
// (5, 15, 'sp4_r_v_b_1') | |
// (6, 10, 'sp4_r_v_b_36') | |
// (6, 11, 'sp4_h_r_7') | |
// (6, 11, 'sp4_r_v_b_25') | |
// (6, 11, 'sp4_v_t_36') | |
// (6, 12, 'sp4_r_v_b_12') | |
// (6, 12, 'sp4_v_b_36') | |
// (6, 13, 'sp4_r_v_b_1') | |
// (6, 13, 'sp4_v_b_25') | |
// (6, 14, 'local_g0_4') | |
// (6, 14, 'ram/WDATA_0') | |
// (6, 14, 'sp4_v_b_12') | |
// (6, 15, 'sp4_v_b_1') | |
// (7, 9, 'sp4_h_r_7') | |
// (7, 9, 'sp4_v_t_36') | |
// (7, 10, 'sp4_v_b_36') | |
// (7, 11, 'sp4_h_r_18') | |
// (7, 11, 'sp4_v_b_25') | |
// (7, 12, 'sp4_v_b_12') | |
// (7, 13, 'local_g1_1') | |
// (7, 13, 'lutff_1/in_1') | |
// (7, 13, 'sp4_v_b_1') | |
// (8, 9, 'sp4_h_r_18') | |
// (8, 11, 'sp4_h_r_31') | |
// (9, 8, 'neigh_op_tnr_5') | |
// (9, 8, 'sp4_r_v_b_39') | |
// (9, 9, 'neigh_op_rgt_5') | |
// (9, 9, 'sp4_h_r_31') | |
// (9, 9, 'sp4_r_v_b_26') | |
// (9, 10, 'neigh_op_bnr_5') | |
// (9, 10, 'sp4_r_v_b_15') | |
// (9, 11, 'sp4_h_r_42') | |
// (9, 11, 'sp4_r_v_b_2') | |
// (10, 7, 'sp4_v_t_39') | |
// (10, 8, 'neigh_op_top_5') | |
// (10, 8, 'sp4_v_b_39') | |
// (10, 9, 'lutff_5/out') | |
// (10, 9, 'sp4_h_r_42') | |
// (10, 9, 'sp4_v_b_26') | |
// (10, 10, 'neigh_op_bot_5') | |
// (10, 10, 'sp4_v_b_15') | |
// (10, 11, 'sp4_h_l_42') | |
// (10, 11, 'sp4_v_b_2') | |
// (11, 8, 'neigh_op_tnl_5') | |
// (11, 9, 'neigh_op_lft_5') | |
// (11, 9, 'sp4_h_l_42') | |
// (11, 10, 'neigh_op_bnl_5') | |
wire n73; | |
// (5, 13, 'lutff_1/cout') | |
// (5, 13, 'lutff_2/in_3') | |
wire n74; | |
// (5, 13, 'lutff_2/cout') | |
// (5, 13, 'lutff_3/in_3') | |
wire n75; | |
// (5, 13, 'lutff_3/cout') | |
// (5, 13, 'lutff_4/in_3') | |
wire n76; | |
// (5, 13, 'lutff_4/cout') | |
// (5, 13, 'lutff_5/in_3') | |
wire n77; | |
// (5, 13, 'lutff_5/cout') | |
// (5, 13, 'lutff_6/in_3') | |
wire n78; | |
// (5, 13, 'lutff_6/cout') | |
// (5, 13, 'lutff_7/in_3') | |
wire n79; | |
// (5, 13, 'neigh_op_tnr_0') | |
// (5, 14, 'neigh_op_rgt_0') | |
// (5, 15, 'neigh_op_bnr_0') | |
// (6, 13, 'neigh_op_top_0') | |
// (6, 13, 'sp4_r_v_b_44') | |
// (6, 14, 'ram/RDATA_7') | |
// (6, 14, 'sp4_h_r_0') | |
// (6, 14, 'sp4_r_v_b_33') | |
// (6, 15, 'neigh_op_bot_0') | |
// (6, 15, 'sp4_r_v_b_20') | |
// (6, 16, 'sp4_r_v_b_9') | |
// (7, 12, 'sp4_h_r_9') | |
// (7, 12, 'sp4_v_t_44') | |
// (7, 13, 'neigh_op_tnl_0') | |
// (7, 13, 'sp4_v_b_44') | |
// (7, 14, 'neigh_op_lft_0') | |
// (7, 14, 'sp4_h_r_13') | |
// (7, 14, 'sp4_v_b_33') | |
// (7, 15, 'neigh_op_bnl_0') | |
// (7, 15, 'sp4_v_b_20') | |
// (7, 16, 'sp4_v_b_9') | |
// (8, 12, 'sp4_h_r_20') | |
// (8, 14, 'sp4_h_r_24') | |
// (9, 11, 'sp4_r_v_b_43') | |
// (9, 12, 'local_g2_1') | |
// (9, 12, 'lutff_4/in_3') | |
// (9, 12, 'sp4_h_r_33') | |
// (9, 12, 'sp4_r_v_b_30') | |
// (9, 13, 'sp4_r_v_b_19') | |
// (9, 14, 'sp4_h_r_37') | |
// (9, 14, 'sp4_r_v_b_6') | |
// (10, 10, 'sp4_v_t_43') | |
// (10, 11, 'local_g2_3') | |
// (10, 11, 'lutff_2/in_1') | |
// (10, 11, 'sp4_v_b_43') | |
// (10, 12, 'sp4_h_r_44') | |
// (10, 12, 'sp4_v_b_30') | |
// (10, 13, 'local_g1_3') | |
// (10, 13, 'lutff_3/in_1') | |
// (10, 13, 'lutff_4/in_0') | |
// (10, 13, 'sp4_v_b_19') | |
// (10, 14, 'sp4_h_l_37') | |
// (10, 14, 'sp4_v_b_6') | |
// (11, 12, 'sp4_h_l_44') | |
wire n80; | |
// (5, 13, 'neigh_op_tnr_1') | |
// (5, 14, 'neigh_op_rgt_1') | |
// (5, 15, 'neigh_op_bnr_1') | |
// (6, 12, 'sp4_r_v_b_43') | |
// (6, 13, 'neigh_op_top_1') | |
// (6, 13, 'sp4_r_v_b_30') | |
// (6, 14, 'ram/RDATA_6') | |
// (6, 14, 'sp4_h_r_2') | |
// (6, 14, 'sp4_r_v_b_19') | |
// (6, 15, 'neigh_op_bot_1') | |
// (6, 15, 'sp4_r_v_b_6') | |
// (7, 11, 'sp4_v_t_43') | |
// (7, 12, 'sp4_v_b_43') | |
// (7, 13, 'neigh_op_tnl_1') | |
// (7, 13, 'sp4_v_b_30') | |
// (7, 14, 'neigh_op_lft_1') | |
// (7, 14, 'sp4_h_r_15') | |
// (7, 14, 'sp4_v_b_19') | |
// (7, 15, 'neigh_op_bnl_1') | |
// (7, 15, 'sp4_h_r_6') | |
// (7, 15, 'sp4_v_b_6') | |
// (8, 14, 'sp4_h_r_26') | |
// (8, 15, 'sp4_h_r_19') | |
// (9, 14, 'sp4_h_r_39') | |
// (9, 15, 'sp4_h_r_30') | |
// (10, 14, 'sp4_h_l_39') | |
// (10, 14, 'sp4_h_r_10') | |
// (10, 15, 'sp4_h_r_43') | |
// (11, 14, 'sp4_h_r_23') | |
// (11, 15, 'sp4_h_l_43') | |
// (11, 15, 'sp4_h_r_2') | |
// (12, 14, 'sp4_h_r_34') | |
// (12, 15, 'local_g1_7') | |
// (12, 15, 'lutff_4/in_2') | |
// (12, 15, 'sp4_h_r_15') | |
// (13, 11, 'sp4_r_v_b_41') | |
// (13, 12, 'sp4_r_v_b_28') | |
// (13, 13, 'sp4_r_v_b_17') | |
// (13, 14, 'sp4_h_r_47') | |
// (13, 14, 'sp4_r_v_b_4') | |
// (13, 15, 'sp4_h_r_26') | |
// (14, 10, 'sp4_v_t_41') | |
// (14, 11, 'local_g2_1') | |
// (14, 11, 'lutff_2/in_1') | |
// (14, 11, 'sp4_v_b_41') | |
// (14, 12, 'sp4_v_b_28') | |
// (14, 13, 'local_g0_1') | |
// (14, 13, 'lutff_7/in_0') | |
// (14, 13, 'sp4_v_b_17') | |
// (14, 14, 'sp4_h_l_47') | |
// (14, 14, 'sp4_v_b_4') | |
// (14, 15, 'sp4_h_r_39') | |
// (15, 15, 'sp4_h_l_39') | |
wire n81; | |
// (5, 13, 'neigh_op_tnr_2') | |
// (5, 14, 'neigh_op_rgt_2') | |
// (5, 14, 'sp4_h_r_9') | |
// (5, 15, 'neigh_op_bnr_2') | |
// (6, 12, 'sp4_r_v_b_45') | |
// (6, 13, 'neigh_op_top_2') | |
// (6, 13, 'sp4_r_v_b_32') | |
// (6, 14, 'ram/RDATA_5') | |
// (6, 14, 'sp4_h_r_20') | |
// (6, 14, 'sp4_h_r_4') | |
// (6, 14, 'sp4_r_v_b_21') | |
// (6, 15, 'neigh_op_bot_2') | |
// (6, 15, 'sp4_r_v_b_8') | |
// (7, 11, 'sp4_h_r_8') | |
// (7, 11, 'sp4_v_t_45') | |
// (7, 12, 'sp4_v_b_45') | |
// (7, 13, 'neigh_op_tnl_2') | |
// (7, 13, 'sp4_v_b_32') | |
// (7, 14, 'neigh_op_lft_2') | |
// (7, 14, 'sp4_h_r_17') | |
// (7, 14, 'sp4_h_r_33') | |
// (7, 14, 'sp4_v_b_21') | |
// (7, 15, 'neigh_op_bnl_2') | |
// (7, 15, 'sp4_h_r_8') | |
// (7, 15, 'sp4_v_b_8') | |
// (8, 11, 'sp4_h_r_21') | |
// (8, 14, 'sp4_h_r_28') | |
// (8, 14, 'sp4_h_r_44') | |
// (8, 15, 'sp4_h_r_21') | |
// (9, 11, 'sp4_h_r_32') | |
// (9, 14, 'sp4_h_l_44') | |
// (9, 14, 'sp4_h_r_0') | |
// (9, 14, 'sp4_h_r_41') | |
// (9, 15, 'sp4_h_r_32') | |
// (10, 11, 'sp4_h_r_45') | |
// (10, 14, 'sp4_h_l_41') | |
// (10, 14, 'sp4_h_r_13') | |
// (10, 14, 'sp4_h_r_7') | |
// (10, 15, 'sp4_h_r_45') | |
// (11, 11, 'sp4_h_l_45') | |
// (11, 11, 'sp4_h_r_4') | |
// (11, 14, 'local_g2_0') | |
// (11, 14, 'lutff_3/in_3') | |
// (11, 14, 'sp4_h_r_18') | |
// (11, 14, 'sp4_h_r_24') | |
// (11, 15, 'sp4_h_l_45') | |
// (11, 15, 'sp4_h_r_4') | |
// (12, 11, 'sp4_h_r_17') | |
// (12, 14, 'sp4_h_r_31') | |
// (12, 14, 'sp4_h_r_37') | |
// (12, 15, 'local_g0_1') | |
// (12, 15, 'lutff_7/in_0') | |
// (12, 15, 'sp4_h_r_17') | |
// (13, 11, 'sp4_h_r_28') | |
// (13, 14, 'local_g2_2') | |
// (13, 14, 'lutff_6/in_0') | |
// (13, 14, 'sp4_h_l_37') | |
// (13, 14, 'sp4_h_r_42') | |
// (13, 15, 'sp4_h_r_28') | |
// (14, 11, 'sp4_h_r_41') | |
// (14, 14, 'sp4_h_l_42') | |
// (14, 14, 'sp4_h_r_10') | |
// (14, 15, 'sp4_h_r_41') | |
// (15, 11, 'local_g0_4') | |
// (15, 11, 'lutff_5/in_1') | |
// (15, 11, 'sp4_h_l_41') | |
// (15, 11, 'sp4_h_r_4') | |
// (15, 14, 'local_g1_7') | |
// (15, 14, 'lutff_2/in_0') | |
// (15, 14, 'lutff_5/in_1') | |
// (15, 14, 'sp4_h_r_23') | |
// (15, 15, 'sp4_h_l_41') | |
// (16, 11, 'sp4_h_r_17') | |
// (16, 14, 'sp4_h_r_34') | |
// (17, 11, 'sp4_h_r_28') | |
// (17, 14, 'sp4_h_r_47') | |
// (18, 11, 'sp4_h_r_41') | |
// (18, 14, 'sp4_h_l_47') | |
// (19, 11, 'sp4_h_l_41') | |
wire n82; | |
// (5, 13, 'neigh_op_tnr_3') | |
// (5, 14, 'neigh_op_rgt_3') | |
// (5, 14, 'sp4_h_r_11') | |
// (5, 15, 'neigh_op_bnr_3') | |
// (6, 13, 'neigh_op_top_3') | |
// (6, 14, 'ram/RDATA_4') | |
// (6, 14, 'sp4_h_r_22') | |
// (6, 14, 'sp4_h_r_6') | |
// (6, 15, 'neigh_op_bot_3') | |
// (7, 13, 'neigh_op_tnl_3') | |
// (7, 14, 'neigh_op_lft_3') | |
// (7, 14, 'sp4_h_r_19') | |
// (7, 14, 'sp4_h_r_35') | |
// (7, 15, 'neigh_op_bnl_3') | |
// (8, 14, 'sp4_h_r_30') | |
// (8, 14, 'sp4_h_r_46') | |
// (9, 14, 'sp4_h_l_46') | |
// (9, 14, 'sp4_h_r_2') | |
// (9, 14, 'sp4_h_r_43') | |
// (9, 14, 'sp4_h_r_7') | |
// (10, 14, 'sp4_h_l_43') | |
// (10, 14, 'sp4_h_r_15') | |
// (10, 14, 'sp4_h_r_18') | |
// (10, 14, 'sp4_h_r_6') | |
// (10, 14, 'sp4_h_r_9') | |
// (11, 14, 'local_g2_2') | |
// (11, 14, 'lutff_3/in_1') | |
// (11, 14, 'sp4_h_r_19') | |
// (11, 14, 'sp4_h_r_20') | |
// (11, 14, 'sp4_h_r_26') | |
// (11, 14, 'sp4_h_r_31') | |
// (12, 11, 'sp4_r_v_b_42') | |
// (12, 12, 'local_g0_7') | |
// (12, 12, 'lutff_3/in_2') | |
// (12, 12, 'sp4_r_v_b_31') | |
// (12, 13, 'sp4_r_v_b_18') | |
// (12, 14, 'local_g2_6') | |
// (12, 14, 'lutff_0/in_2') | |
// (12, 14, 'sp4_h_r_30') | |
// (12, 14, 'sp4_h_r_33') | |
// (12, 14, 'sp4_h_r_39') | |
// (12, 14, 'sp4_h_r_42') | |
// (12, 14, 'sp4_r_v_b_7') | |
// (13, 10, 'sp4_v_t_42') | |
// (13, 11, 'sp4_v_b_42') | |
// (13, 12, 'sp4_v_b_31') | |
// (13, 13, 'sp4_v_b_18') | |
// (13, 14, 'local_g2_4') | |
// (13, 14, 'local_g3_4') | |
// (13, 14, 'lutff_5/in_3') | |
// (13, 14, 'lutff_6/in_3') | |
// (13, 14, 'sp4_h_l_39') | |
// (13, 14, 'sp4_h_l_42') | |
// (13, 14, 'sp4_h_r_43') | |
// (13, 14, 'sp4_h_r_44') | |
// (13, 14, 'sp4_v_b_7') | |
// (14, 14, 'sp4_h_l_43') | |
// (14, 14, 'sp4_h_l_44') | |
wire n83; | |
// (5, 13, 'neigh_op_tnr_4') | |
// (5, 14, 'neigh_op_rgt_4') | |
// (5, 15, 'neigh_op_bnr_4') | |
// (6, 13, 'neigh_op_top_4') | |
// (6, 13, 'sp4_r_v_b_36') | |
// (6, 14, 'ram/RDATA_3') | |
// (6, 14, 'sp4_r_v_b_25') | |
// (6, 14, 'sp4_r_v_b_41') | |
// (6, 15, 'neigh_op_bot_4') | |
// (6, 15, 'sp4_r_v_b_12') | |
// (6, 15, 'sp4_r_v_b_28') | |
// (6, 16, 'sp4_r_v_b_1') | |
// (6, 16, 'sp4_r_v_b_17') | |
// (6, 17, 'sp4_r_v_b_4') | |
// (7, 12, 'sp4_v_t_36') | |
// (7, 13, 'neigh_op_tnl_4') | |
// (7, 13, 'sp4_h_r_9') | |
// (7, 13, 'sp4_v_b_36') | |
// (7, 13, 'sp4_v_t_41') | |
// (7, 14, 'neigh_op_lft_4') | |
// (7, 14, 'sp4_v_b_25') | |
// (7, 14, 'sp4_v_b_41') | |
// (7, 15, 'neigh_op_bnl_4') | |
// (7, 15, 'sp4_v_b_12') | |
// (7, 15, 'sp4_v_b_28') | |
// (7, 16, 'sp4_h_r_7') | |
// (7, 16, 'sp4_v_b_1') | |
// (7, 16, 'sp4_v_b_17') | |
// (7, 17, 'sp4_v_b_4') | |
// (8, 13, 'sp4_h_r_20') | |
// (8, 16, 'sp4_h_r_18') | |
// (9, 13, 'sp4_h_r_33') | |
// (9, 16, 'sp4_h_r_31') | |
// (10, 13, 'sp4_h_r_44') | |
// (10, 13, 'sp4_r_v_b_42') | |
// (10, 14, 'sp4_r_v_b_31') | |
// (10, 15, 'sp4_r_v_b_18') | |
// (10, 16, 'sp4_h_r_42') | |
// (10, 16, 'sp4_r_v_b_7') | |
// (11, 12, 'sp4_v_t_42') | |
// (11, 13, 'local_g0_1') | |
// (11, 13, 'lutff_5/in_0') | |
// (11, 13, 'sp4_h_l_44') | |
// (11, 13, 'sp4_h_r_9') | |
// (11, 13, 'sp4_v_b_42') | |
// (11, 14, 'sp4_v_b_31') | |
// (11, 15, 'local_g1_2') | |
// (11, 15, 'lutff_7/in_0') | |
// (11, 15, 'sp4_v_b_18') | |
// (11, 16, 'sp4_h_l_42') | |
// (11, 16, 'sp4_v_b_7') | |
// (12, 13, 'sp4_h_r_20') | |
// (13, 13, 'sp4_h_r_33') | |
// (14, 13, 'sp4_h_r_44') | |
// (15, 13, 'sp4_h_l_44') | |
reg n84 = 0; | |
// (5, 14, 'local_g1_6') | |
// (5, 14, 'lutff_3/in_2') | |
// (5, 14, 'sp4_h_r_6') | |
// (6, 13, 'local_g3_7') | |
// (6, 13, 'neigh_op_tnr_7') | |
// (6, 13, 'ram/WDATA_14') | |
// (6, 14, 'neigh_op_rgt_7') | |
// (6, 14, 'sp4_h_r_19') | |
// (6, 15, 'neigh_op_bnr_7') | |
// (7, 13, 'neigh_op_top_7') | |
// (7, 14, 'lutff_7/out') | |
// (7, 14, 'sp4_h_r_30') | |
// (7, 15, 'neigh_op_bot_7') | |
// (8, 13, 'neigh_op_tnl_7') | |
// (8, 14, 'neigh_op_lft_7') | |
// (8, 14, 'sp4_h_r_43') | |
// (8, 15, 'neigh_op_bnl_7') | |
// (9, 14, 'sp4_h_l_43') | |
wire n85; | |
// (5, 15, 'sp4_r_v_b_45') | |
// (5, 16, 'sp4_r_v_b_32') | |
// (5, 17, 'sp4_r_v_b_21') | |
// (5, 18, 'sp4_r_v_b_8') | |
// (5, 19, 'sp4_r_v_b_40') | |
// (5, 20, 'neigh_op_tnr_0') | |
// (5, 20, 'neigh_op_tnr_4') | |
// (5, 20, 'sp4_r_v_b_29') | |
// (6, 14, 'sp4_h_r_8') | |
// (6, 14, 'sp4_v_t_45') | |
// (6, 15, 'sp4_v_b_45') | |
// (6, 16, 'sp4_v_b_32') | |
// (6, 17, 'sp4_v_b_21') | |
// (6, 18, 'sp4_v_b_8') | |
// (6, 18, 'sp4_v_t_40') | |
// (6, 19, 'sp4_v_b_40') | |
// (6, 20, 'neigh_op_top_0') | |
// (6, 20, 'neigh_op_top_4') | |
// (6, 20, 'sp4_v_b_29') | |
// (6, 21, 'io_0/D_IN_0') | |
// (6, 21, 'span4_vert_16') | |
// (7, 14, 'sp4_h_r_21') | |
// (7, 20, 'neigh_op_tnl_0') | |
// (7, 20, 'neigh_op_tnl_4') | |
// (8, 14, 'sp4_h_r_32') | |
// (9, 14, 'sp4_h_r_45') | |
// (10, 14, 'sp4_h_l_45') | |
// (10, 14, 'sp4_h_r_4') | |
// (11, 14, 'sp4_h_r_17') | |
// (12, 14, 'sp4_h_r_28') | |
// (13, 14, 'sp4_h_r_41') | |
// (14, 14, 'sp4_h_l_41') | |
// (14, 14, 'sp4_h_r_4') | |
// (15, 14, 'local_g0_1') | |
// (15, 14, 'lutff_7/in_0') | |
// (15, 14, 'sp4_h_r_17') | |
// (16, 14, 'sp4_h_r_28') | |
// (17, 14, 'sp4_h_r_41') | |
// (18, 14, 'sp4_h_l_41') | |
wire n86; | |
// (5, 18, 'sp4_r_v_b_37') | |
// (5, 19, 'local_g1_0') | |
// (5, 19, 'lutff_1/in_0') | |
// (5, 19, 'sp4_r_v_b_24') | |
// (5, 20, 'local_g2_5') | |
// (5, 20, 'lutff_7/in_0') | |
// (5, 20, 'sp4_r_v_b_13') | |
// (6, 17, 'sp4_h_r_0') | |
// (6, 17, 'sp4_v_t_37') | |
// (6, 18, 'sp4_v_b_37') | |
// (6, 19, 'sp4_v_b_24') | |
// (6, 20, 'sp4_v_b_13') | |
// (6, 21, 'span4_vert_0') | |
// (7, 17, 'sp4_h_r_13') | |
// (8, 17, 'sp4_h_r_24') | |
// (9, 17, 'sp4_h_r_37') | |
// (10, 14, 'sp4_h_r_11') | |
// (10, 17, 'sp4_h_l_37') | |
// (10, 17, 'sp4_h_r_9') | |
// (11, 14, 'local_g1_6') | |
// (11, 14, 'lutff_5/in_0') | |
// (11, 14, 'sp4_h_r_22') | |
// (11, 17, 'sp4_h_r_20') | |
// (12, 9, 'sp4_h_r_4') | |
// (12, 14, 'sp4_h_r_35') | |
// (12, 17, 'sp4_h_r_33') | |
// (13, 9, 'local_g0_1') | |
// (13, 9, 'lutff_1/in_2') | |
// (13, 9, 'sp4_h_r_17') | |
// (13, 10, 'sp4_r_v_b_44') | |
// (13, 11, 'sp4_r_v_b_33') | |
// (13, 11, 'sp4_r_v_b_46') | |
// (13, 12, 'sp4_r_v_b_20') | |
// (13, 12, 'sp4_r_v_b_35') | |
// (13, 13, 'sp4_r_v_b_22') | |
// (13, 13, 'sp4_r_v_b_9') | |
// (13, 14, 'sp4_h_r_46') | |
// (13, 14, 'sp4_r_v_b_11') | |
// (13, 14, 'sp4_r_v_b_44') | |
// (13, 15, 'sp4_r_v_b_33') | |
// (13, 16, 'sp4_r_v_b_20') | |
// (13, 17, 'sp4_h_r_44') | |
// (13, 17, 'sp4_r_v_b_9') | |
// (14, 9, 'sp4_h_r_28') | |
// (14, 9, 'sp4_h_r_9') | |
// (14, 9, 'sp4_v_t_44') | |
// (14, 10, 'sp4_h_r_5') | |
// (14, 10, 'sp4_v_b_44') | |
// (14, 10, 'sp4_v_t_46') | |
// (14, 11, 'sp4_v_b_33') | |
// (14, 11, 'sp4_v_b_46') | |
// (14, 12, 'sp4_v_b_20') | |
// (14, 12, 'sp4_v_b_35') | |
// (14, 13, 'sp4_v_b_22') | |
// (14, 13, 'sp4_v_b_9') | |
// (14, 13, 'sp4_v_t_44') | |
// (14, 14, 'sp4_h_l_46') | |
// (14, 14, 'sp4_v_b_11') | |
// (14, 14, 'sp4_v_b_44') | |
// (14, 15, 'sp4_v_b_33') | |
// (14, 16, 'sp4_v_b_20') | |
// (14, 17, 'sp4_h_l_44') | |
// (14, 17, 'sp4_v_b_9') | |
// (15, 9, 'sp4_h_r_20') | |
// (15, 9, 'sp4_h_r_41') | |
// (15, 10, 'sp4_h_r_16') | |
// (16, 8, 'neigh_op_tnr_6') | |
// (16, 9, 'neigh_op_rgt_6') | |
// (16, 9, 'sp4_h_l_41') | |
// (16, 9, 'sp4_h_r_1') | |
// (16, 9, 'sp4_h_r_33') | |
// (16, 10, 'neigh_op_bnr_6') | |
// (16, 10, 'sp4_h_r_29') | |
// (17, 7, 'sp4_r_v_b_37') | |
// (17, 8, 'neigh_op_top_6') | |
// (17, 8, 'sp4_r_v_b_24') | |
// (17, 9, 'lutff_6/out') | |
// (17, 9, 'sp4_h_r_12') | |
// (17, 9, 'sp4_h_r_44') | |
// (17, 9, 'sp4_r_v_b_13') | |
// (17, 9, 'sp4_r_v_b_45') | |
// (17, 10, 'neigh_op_bot_6') | |
// (17, 10, 'sp4_h_r_40') | |
// (17, 10, 'sp4_r_v_b_0') | |
// (17, 10, 'sp4_r_v_b_32') | |
// (17, 11, 'sp4_r_v_b_21') | |
// (17, 12, 'sp4_r_v_b_8') | |
// (18, 6, 'sp4_v_t_37') | |
// (18, 7, 'sp4_v_b_37') | |
// (18, 8, 'neigh_op_tnl_6') | |
// (18, 8, 'sp4_v_b_24') | |
// (18, 8, 'sp4_v_t_45') | |
// (18, 9, 'neigh_op_lft_6') | |
// (18, 9, 'sp4_h_l_44') | |
// (18, 9, 'sp4_h_r_25') | |
// (18, 9, 'sp4_v_b_13') | |
// (18, 9, 'sp4_v_b_45') | |
// (18, 10, 'neigh_op_bnl_6') | |
// (18, 10, 'sp4_h_l_40') | |
// (18, 10, 'sp4_v_b_0') | |
// (18, 10, 'sp4_v_b_32') | |
// (18, 11, 'sp4_v_b_21') | |
// (18, 12, 'sp4_h_r_8') | |
// (18, 12, 'sp4_v_b_8') | |
// (19, 9, 'sp4_h_r_36') | |
// (19, 12, 'local_g0_5') | |
// (19, 12, 'ram/WDATA_1') | |
// (19, 12, 'sp4_h_r_21') | |
// (20, 9, 'sp4_h_l_36') | |
// (20, 12, 'sp4_h_r_32') | |
// (21, 12, 'sp4_h_r_45') | |
// (22, 12, 'sp4_h_l_45') | |
wire n87; | |
// (5, 18, 'sp4_r_v_b_39') | |
// (5, 19, 'local_g0_2') | |
// (5, 19, 'lutff_global/cen') | |
// (5, 19, 'sp4_r_v_b_26') | |
// (5, 20, 'sp4_r_v_b_15') | |
// (6, 16, 'sp4_r_v_b_47') | |
// (6, 17, 'sp4_h_r_2') | |
// (6, 17, 'sp4_r_v_b_34') | |
// (6, 17, 'sp4_v_t_39') | |
// (6, 18, 'sp4_r_v_b_23') | |
// (6, 18, 'sp4_v_b_39') | |
// (6, 19, 'sp4_r_v_b_10') | |
// (6, 19, 'sp4_v_b_26') | |
// (6, 20, 'sp4_v_b_15') | |
// (6, 21, 'span4_vert_2') | |
// (7, 15, 'sp4_h_r_4') | |
// (7, 15, 'sp4_v_t_47') | |
// (7, 16, 'sp4_v_b_47') | |
// (7, 17, 'sp4_h_r_15') | |
// (7, 17, 'sp4_v_b_34') | |
// (7, 18, 'sp4_v_b_23') | |
// (7, 19, 'local_g0_2') | |
// (7, 19, 'lutff_global/cen') | |
// (7, 19, 'sp4_v_b_10') | |
// (8, 15, 'sp4_h_r_17') | |
// (8, 17, 'sp4_h_r_26') | |
// (9, 15, 'sp4_h_r_28') | |
// (9, 17, 'sp4_h_r_39') | |
// (10, 15, 'sp4_h_r_41') | |
// (10, 17, 'sp4_h_l_39') | |
// (10, 17, 'sp4_h_r_6') | |
// (11, 15, 'sp4_h_l_41') | |
// (11, 15, 'sp4_h_r_8') | |
// (11, 17, 'sp4_h_r_19') | |
// (12, 15, 'sp4_h_r_21') | |
// (12, 17, 'sp4_h_r_30') | |
// (13, 3, 'sp4_r_v_b_47') | |
// (13, 4, 'sp4_r_v_b_34') | |
// (13, 5, 'sp4_r_v_b_23') | |
// (13, 6, 'sp4_r_v_b_10') | |
// (13, 13, 'neigh_op_tnr_2') | |
// (13, 14, 'neigh_op_rgt_2') | |
// (13, 14, 'sp4_r_v_b_36') | |
// (13, 15, 'neigh_op_bnr_2') | |
// (13, 15, 'sp4_h_r_32') | |
// (13, 15, 'sp4_r_v_b_25') | |
// (13, 16, 'sp4_r_v_b_12') | |
// (13, 17, 'sp4_h_r_43') | |
// (13, 17, 'sp4_r_v_b_1') | |
// (14, 2, 'local_g1_3') | |
// (14, 2, 'lutff_global/cen') | |
// (14, 2, 'sp4_h_r_3') | |
// (14, 2, 'sp4_v_t_47') | |
// (14, 3, 'sp4_v_b_47') | |
// (14, 4, 'sp12_v_t_23') | |
// (14, 4, 'sp4_v_b_34') | |
// (14, 5, 'sp12_v_b_23') | |
// (14, 5, 'sp4_v_b_23') | |
// (14, 6, 'sp12_v_b_20') | |
// (14, 6, 'sp4_v_b_10') | |
// (14, 7, 'sp12_v_b_19') | |
// (14, 8, 'sp12_v_b_16') | |
// (14, 9, 'sp12_v_b_15') | |
// (14, 10, 'sp12_v_b_12') | |
// (14, 11, 'sp12_v_b_11') | |
// (14, 12, 'sp12_v_b_8') | |
// (14, 12, 'sp4_r_v_b_45') | |
// (14, 13, 'neigh_op_top_2') | |
// (14, 13, 'sp12_v_b_7') | |
// (14, 13, 'sp4_r_v_b_32') | |
// (14, 13, 'sp4_v_t_36') | |
// (14, 14, 'lutff_2/out') | |
// (14, 14, 'sp12_v_b_4') | |
// (14, 14, 'sp4_r_v_b_21') | |
// (14, 14, 'sp4_v_b_36') | |
// (14, 15, 'neigh_op_bot_2') | |
// (14, 15, 'sp12_v_b_3') | |
// (14, 15, 'sp4_h_r_45') | |
// (14, 15, 'sp4_r_v_b_8') | |
// (14, 15, 'sp4_v_b_25') | |
// (14, 16, 'sp12_v_b_0') | |
// (14, 16, 'sp4_v_b_12') | |
// (14, 17, 'sp4_h_l_43') | |
// (14, 17, 'sp4_v_b_1') | |
// (15, 2, 'sp4_h_r_14') | |
// (15, 11, 'sp4_v_t_45') | |
// (15, 12, 'sp4_v_b_45') | |
// (15, 13, 'neigh_op_tnl_2') | |
// (15, 13, 'sp4_v_b_32') | |
// (15, 14, 'neigh_op_lft_2') | |
// (15, 14, 'sp4_v_b_21') | |
// (15, 15, 'neigh_op_bnl_2') | |
// (15, 15, 'sp4_h_l_45') | |
// (15, 15, 'sp4_v_b_8') | |
// (16, 2, 'sp4_h_r_27') | |
// (17, 2, 'sp4_h_r_38') | |
// (18, 2, 'sp4_h_l_38') | |
reg n88 = 0; | |
// (5, 20, 'sp4_r_v_b_38') | |
// (6, 18, 'neigh_op_tnr_2') | |
// (6, 19, 'neigh_op_rgt_2') | |
// (6, 19, 'sp4_h_r_9') | |
// (6, 19, 'sp4_v_t_38') | |
// (6, 20, 'neigh_op_bnr_2') | |
// (6, 20, 'sp4_v_b_38') | |
// (6, 21, 'io_0/OUT_ENB') | |
// (6, 21, 'local_g0_3') | |
// (6, 21, 'span4_vert_27') | |
// (7, 18, 'neigh_op_top_2') | |
// (7, 19, 'lutff_2/out') | |
// (7, 19, 'sp4_h_r_20') | |
// (7, 20, 'neigh_op_bot_2') | |
// (8, 18, 'neigh_op_tnl_2') | |
// (8, 19, 'neigh_op_lft_2') | |
// (8, 19, 'sp4_h_r_33') | |
// (8, 20, 'neigh_op_bnl_2') | |
// (9, 19, 'sp4_h_r_44') | |
// (10, 19, 'sp4_h_l_44') | |
wire \pins[1] ; | |
// (5, 21, 'io_0/PAD') | |
wire n90; | |
// (6, 9, 'sp4_r_v_b_45') | |
// (6, 10, 'sp4_r_v_b_32') | |
// (6, 11, 'neigh_op_tnr_4') | |
// (6, 11, 'sp4_r_v_b_21') | |
// (6, 12, 'neigh_op_rgt_4') | |
// (6, 12, 'sp4_r_v_b_8') | |
// (6, 13, 'neigh_op_bnr_4') | |
// (7, 8, 'sp4_v_t_45') | |
// (7, 9, 'sp4_v_b_45') | |
// (7, 10, 'sp4_v_b_32') | |
// (7, 11, 'neigh_op_top_4') | |
// (7, 11, 'sp4_v_b_21') | |
// (7, 12, 'local_g0_2') | |
// (7, 12, 'lutff_4/out') | |
// (7, 12, 'lutff_global/cen') | |
// (7, 12, 'sp4_h_r_2') | |
// (7, 12, 'sp4_v_b_8') | |
// (7, 13, 'neigh_op_bot_4') | |
// (8, 11, 'neigh_op_tnl_4') | |
// (8, 12, 'neigh_op_lft_4') | |
// (8, 12, 'sp4_h_r_15') | |
// (8, 13, 'neigh_op_bnl_4') | |
// (9, 12, 'sp4_h_r_26') | |
// (10, 12, 'sp4_h_r_39') | |
// (11, 12, 'sp4_h_l_39') | |
wire n91; | |
// (6, 10, 'sp4_r_v_b_39') | |
// (6, 11, 'sp4_r_v_b_26') | |
// (6, 12, 'sp4_r_v_b_15') | |
// (6, 13, 'local_g1_2') | |
// (6, 13, 'ram/RADDR_6') | |
// (6, 13, 'sp4_r_v_b_2') | |
// (7, 9, 'sp4_v_t_39') | |
// (7, 10, 'sp4_v_b_39') | |
// (7, 11, 'sp4_v_b_26') | |
// (7, 12, 'sp4_v_b_15') | |
// (7, 13, 'sp4_h_r_2') | |
// (7, 13, 'sp4_v_b_2') | |
// (8, 13, 'sp4_h_r_15') | |
// (9, 13, 'sp4_h_r_26') | |
// (10, 13, 'sp4_h_r_39') | |
// (10, 14, 'neigh_op_tnr_5') | |
// (10, 14, 'sp4_r_v_b_39') | |
// (10, 15, 'local_g2_5') | |
// (10, 15, 'lutff_0/in_3') | |
// (10, 15, 'neigh_op_rgt_5') | |
// (10, 15, 'sp4_r_v_b_26') | |
// (10, 16, 'neigh_op_bnr_5') | |
// (10, 16, 'sp4_r_v_b_15') | |
// (10, 17, 'sp4_r_v_b_2') | |
// (11, 13, 'sp4_h_l_39') | |
// (11, 13, 'sp4_v_t_39') | |
// (11, 14, 'neigh_op_top_5') | |
// (11, 14, 'sp4_v_b_39') | |
// (11, 15, 'lutff_5/out') | |
// (11, 15, 'sp4_v_b_26') | |
// (11, 16, 'neigh_op_bot_5') | |
// (11, 16, 'sp4_v_b_15') | |
// (11, 17, 'sp4_v_b_2') | |
// (12, 14, 'neigh_op_tnl_5') | |
// (12, 15, 'neigh_op_lft_5') | |
// (12, 16, 'neigh_op_bnl_5') | |
wire n92; | |
// (6, 11, 'sp4_r_v_b_42') | |
// (6, 12, 'sp4_r_v_b_31') | |
// (6, 13, 'local_g3_2') | |
// (6, 13, 'ram/RADDR_4') | |
// (6, 13, 'sp4_r_v_b_18') | |
// (6, 14, 'sp4_r_v_b_7') | |
// (7, 10, 'sp4_v_t_42') | |
// (7, 11, 'sp4_v_b_42') | |
// (7, 12, 'sp4_v_b_31') | |
// (7, 13, 'sp4_v_b_18') | |
// (7, 14, 'sp4_h_r_7') | |
// (7, 14, 'sp4_v_b_7') | |
// (8, 14, 'sp4_h_r_18') | |
// (9, 13, 'neigh_op_tnr_5') | |
// (9, 14, 'neigh_op_rgt_5') | |
// (9, 14, 'sp4_h_r_31') | |
// (9, 15, 'neigh_op_bnr_5') | |
// (10, 13, 'neigh_op_top_5') | |
// (10, 14, 'lutff_5/out') | |
// (10, 14, 'sp4_h_r_42') | |
// (10, 15, 'local_g1_5') | |
// (10, 15, 'lutff_7/in_3') | |
// (10, 15, 'neigh_op_bot_5') | |
// (11, 13, 'neigh_op_tnl_5') | |
// (11, 14, 'neigh_op_lft_5') | |
// (11, 14, 'sp4_h_l_42') | |
// (11, 15, 'neigh_op_bnl_5') | |
reg n93 = 0; | |
// (6, 12, 'neigh_op_tnr_0') | |
// (6, 13, 'neigh_op_rgt_0') | |
// (6, 14, 'local_g0_0') | |
// (6, 14, 'neigh_op_bnr_0') | |
// (6, 14, 'ram/WDATA_2') | |
// (7, 12, 'neigh_op_top_0') | |
// (7, 13, 'local_g2_0') | |
// (7, 13, 'lutff_0/out') | |
// (7, 13, 'lutff_3/in_3') | |
// (7, 14, 'neigh_op_bot_0') | |
// (8, 12, 'neigh_op_tnl_0') | |
// (8, 13, 'neigh_op_lft_0') | |
// (8, 14, 'neigh_op_bnl_0') | |
reg n94 = 0; | |
// (6, 12, 'neigh_op_tnr_1') | |
// (6, 13, 'neigh_op_rgt_1') | |
// (6, 14, 'local_g0_1') | |
// (6, 14, 'neigh_op_bnr_1') | |
// (6, 14, 'ram/WDATA_1') | |
// (7, 12, 'neigh_op_top_1') | |
// (7, 13, 'local_g3_1') | |
// (7, 13, 'lutff_0/in_0') | |
// (7, 13, 'lutff_1/out') | |
// (7, 14, 'neigh_op_bot_1') | |
// (8, 12, 'neigh_op_tnl_1') | |
// (8, 13, 'neigh_op_lft_1') | |
// (8, 14, 'neigh_op_bnl_1') | |
reg n95 = 0; | |
// (6, 12, 'neigh_op_tnr_3') | |
// (6, 13, 'neigh_op_rgt_3') | |
// (6, 14, 'local_g0_3') | |
// (6, 14, 'neigh_op_bnr_3') | |
// (6, 14, 'ram/WDATA_3') | |
// (7, 12, 'neigh_op_top_3') | |
// (7, 13, 'local_g0_3') | |
// (7, 13, 'lutff_3/out') | |
// (7, 13, 'lutff_5/in_2') | |
// (7, 14, 'neigh_op_bot_3') | |
// (8, 12, 'neigh_op_tnl_3') | |
// (8, 13, 'neigh_op_lft_3') | |
// (8, 14, 'neigh_op_bnl_3') | |
reg n96 = 0; | |
// (6, 12, 'neigh_op_tnr_4') | |
// (6, 13, 'local_g3_4') | |
// (6, 13, 'neigh_op_rgt_4') | |
// (6, 13, 'ram/WDATA_9') | |
// (6, 14, 'neigh_op_bnr_4') | |
// (7, 12, 'neigh_op_top_4') | |
// (7, 13, 'local_g3_4') | |
// (7, 13, 'lutff_2/in_1') | |
// (7, 13, 'lutff_4/out') | |
// (7, 14, 'neigh_op_bot_4') | |
// (8, 12, 'neigh_op_tnl_4') | |
// (8, 13, 'neigh_op_lft_4') | |
// (8, 14, 'neigh_op_bnl_4') | |
wire n97; | |
// (6, 13, 'local_g0_2') | |
// (6, 13, 'ram/RADDR_5') | |
// (6, 13, 'sp4_h_r_10') | |
// (7, 13, 'sp4_h_r_23') | |
// (8, 13, 'sp4_h_r_34') | |
// (9, 13, 'sp4_h_r_47') | |
// (9, 14, 'neigh_op_tnr_1') | |
// (9, 14, 'sp4_r_v_b_47') | |
// (9, 15, 'neigh_op_rgt_1') | |
// (9, 15, 'sp4_r_v_b_34') | |
// (9, 16, 'neigh_op_bnr_1') | |
// (9, 16, 'sp4_r_v_b_23') | |
// (9, 17, 'sp4_r_v_b_10') | |
// (10, 13, 'sp4_h_l_47') | |
// (10, 13, 'sp4_v_t_47') | |
// (10, 14, 'neigh_op_top_1') | |
// (10, 14, 'sp4_v_b_47') | |
// (10, 15, 'local_g0_1') | |
// (10, 15, 'lutff_1/out') | |
// (10, 15, 'lutff_6/in_1') | |
// (10, 15, 'sp4_v_b_34') | |
// (10, 16, 'neigh_op_bot_1') | |
// (10, 16, 'sp4_v_b_23') | |
// (10, 17, 'sp4_v_b_10') | |
// (11, 14, 'neigh_op_tnl_1') | |
// (11, 15, 'neigh_op_lft_1') | |
// (11, 16, 'neigh_op_bnl_1') | |
wire n98; | |
// (6, 13, 'local_g0_6') | |
// (6, 13, 'ram/RADDR_3') | |
// (6, 13, 'sp4_h_r_6') | |
// (7, 13, 'sp4_h_r_19') | |
// (8, 13, 'sp4_h_r_30') | |
// (9, 13, 'sp4_h_r_43') | |
// (9, 14, 'neigh_op_tnr_4') | |
// (9, 14, 'sp4_r_v_b_37') | |
// (9, 15, 'neigh_op_rgt_4') | |
// (9, 15, 'sp4_r_v_b_24') | |
// (9, 16, 'neigh_op_bnr_4') | |
// (9, 16, 'sp4_r_v_b_13') | |
// (9, 17, 'sp4_r_v_b_0') | |
// (10, 13, 'sp4_h_l_43') | |
// (10, 13, 'sp4_v_t_37') | |
// (10, 14, 'neigh_op_top_4') | |
// (10, 14, 'sp4_v_b_37') | |
// (10, 15, 'local_g3_4') | |
// (10, 15, 'lutff_4/out') | |
// (10, 15, 'lutff_5/in_2') | |
// (10, 15, 'sp4_v_b_24') | |
// (10, 16, 'neigh_op_bot_4') | |
// (10, 16, 'sp4_v_b_13') | |
// (10, 17, 'sp4_v_b_0') | |
// (11, 14, 'neigh_op_tnl_4') | |
// (11, 15, 'neigh_op_lft_4') | |
// (11, 16, 'neigh_op_bnl_4') | |
wire n99; | |
// (6, 13, 'local_g1_7') | |
// (6, 13, 'ram/RADDR_1') | |
// (6, 13, 'sp4_h_r_7') | |
// (7, 13, 'sp4_h_r_18') | |
// (8, 13, 'sp4_h_r_31') | |
// (9, 13, 'neigh_op_tnr_2') | |
// (9, 13, 'sp4_h_r_42') | |
// (9, 14, 'neigh_op_rgt_2') | |
// (9, 14, 'sp4_r_v_b_36') | |
// (9, 15, 'neigh_op_bnr_2') | |
// (9, 15, 'sp4_r_v_b_25') | |
// (9, 16, 'sp4_r_v_b_12') | |
// (9, 17, 'sp4_r_v_b_1') | |
// (10, 13, 'neigh_op_top_2') | |
// (10, 13, 'sp4_h_l_42') | |
// (10, 13, 'sp4_v_t_36') | |
// (10, 14, 'local_g0_2') | |
// (10, 14, 'lutff_2/out') | |
// (10, 14, 'lutff_3/in_1') | |
// (10, 14, 'sp4_v_b_36') | |
// (10, 15, 'neigh_op_bot_2') | |
// (10, 15, 'sp4_v_b_25') | |
// (10, 16, 'sp4_v_b_12') | |
// (10, 17, 'sp4_v_b_1') | |
// (11, 13, 'neigh_op_tnl_2') | |
// (11, 14, 'neigh_op_lft_2') | |
// (11, 15, 'neigh_op_bnl_2') | |
wire n100; | |
// (6, 14, 'sp4_r_v_b_36') | |
// (6, 15, 'sp4_r_v_b_25') | |
// (6, 16, 'sp4_r_v_b_12') | |
// (6, 17, 'sp4_r_v_b_1') | |
// (6, 18, 'sp4_r_v_b_36') | |
// (6, 19, 'sp4_r_v_b_25') | |
// (6, 20, 'sp4_r_v_b_12') | |
// (7, 13, 'sp4_h_r_7') | |
// (7, 13, 'sp4_v_t_36') | |
// (7, 14, 'sp4_v_b_36') | |
// (7, 15, 'sp4_v_b_25') | |
// (7, 16, 'sp4_v_b_12') | |
// (7, 17, 'sp4_v_b_1') | |
// (7, 17, 'sp4_v_t_36') | |
// (7, 18, 'sp4_v_b_36') | |
// (7, 19, 'local_g3_1') | |
// (7, 19, 'lutff_5/in_1') | |
// (7, 19, 'sp4_v_b_25') | |
// (7, 20, 'local_g0_4') | |
// (7, 20, 'lutff_1/in_1') | |
// (7, 20, 'sp4_v_b_12') | |
// (7, 21, 'span4_vert_1') | |
// (8, 13, 'sp4_h_r_18') | |
// (9, 13, 'sp4_h_r_31') | |
// (10, 13, 'sp4_h_r_42') | |
// (11, 13, 'sp4_h_l_42') | |
// (11, 13, 'sp4_h_r_7') | |
// (12, 12, 'sp4_r_v_b_39') | |
// (12, 13, 'sp4_h_r_18') | |
// (12, 13, 'sp4_r_v_b_26') | |
// (12, 14, 'sp4_r_v_b_15') | |
// (12, 15, 'sp4_r_v_b_2') | |
// (13, 9, 'local_g0_0') | |
// (13, 9, 'lutff_6/in_2') | |
// (13, 9, 'sp12_h_r_0') | |
// (13, 11, 'sp4_h_r_8') | |
// (13, 11, 'sp4_v_t_39') | |
// (13, 12, 'sp4_v_b_39') | |
// (13, 13, 'sp4_h_r_31') | |
// (13, 13, 'sp4_v_b_26') | |
// (13, 14, 'local_g0_7') | |
// (13, 14, 'lutff_3/in_2') | |
// (13, 14, 'sp4_v_b_15') | |
// (13, 15, 'sp4_v_b_2') | |
// (14, 9, 'sp12_h_r_3') | |
// (14, 10, 'sp4_r_v_b_39') | |
// (14, 11, 'sp4_h_r_21') | |
// (14, 11, 'sp4_r_v_b_26') | |
// (14, 12, 'sp4_r_v_b_15') | |
// (14, 13, 'sp4_h_r_42') | |
// (14, 13, 'sp4_r_v_b_2') | |
// (15, 9, 'sp12_h_r_4') | |
// (15, 9, 'sp4_h_r_8') | |
// (15, 9, 'sp4_v_t_39') | |
// (15, 10, 'sp4_v_b_39') | |
// (15, 11, 'sp4_h_r_32') | |
// (15, 11, 'sp4_v_b_26') | |
// (15, 12, 'sp4_v_b_15') | |
// (15, 13, 'sp4_h_l_42') | |
// (15, 13, 'sp4_v_b_2') | |
// (16, 8, 'neigh_op_tnr_0') | |
// (16, 8, 'sp4_r_v_b_45') | |
// (16, 9, 'neigh_op_rgt_0') | |
// (16, 9, 'sp12_h_r_7') | |
// (16, 9, 'sp4_h_r_21') | |
// (16, 9, 'sp4_r_v_b_32') | |
// (16, 10, 'neigh_op_bnr_0') | |
// (16, 10, 'sp4_r_v_b_21') | |
// (16, 11, 'sp4_h_r_45') | |
// (16, 11, 'sp4_r_v_b_8') | |
// (17, 7, 'sp4_v_t_45') | |
// (17, 8, 'neigh_op_top_0') | |
// (17, 8, 'sp4_v_b_45') | |
// (17, 9, 'lutff_0/out') | |
// (17, 9, 'sp12_h_r_8') | |
// (17, 9, 'sp4_h_r_32') | |
// (17, 9, 'sp4_v_b_32') | |
// (17, 10, 'neigh_op_bot_0') | |
// (17, 10, 'sp4_v_b_21') | |
// (17, 11, 'sp4_h_l_45') | |
// (17, 11, 'sp4_v_b_8') | |
// (18, 8, 'neigh_op_tnl_0') | |
// (18, 9, 'neigh_op_lft_0') | |
// (18, 9, 'sp12_h_r_11') | |
// (18, 9, 'sp4_h_r_45') | |
// (18, 10, 'neigh_op_bnl_0') | |
// (18, 10, 'sp4_r_v_b_45') | |
// (18, 11, 'sp4_r_v_b_32') | |
// (18, 12, 'sp4_r_v_b_21') | |
// (18, 13, 'sp4_r_v_b_8') | |
// (19, 9, 'sp12_h_r_12') | |
// (19, 9, 'sp4_h_l_45') | |
// (19, 9, 'sp4_v_t_45') | |
// (19, 10, 'sp4_v_b_45') | |
// (19, 11, 'sp4_v_b_32') | |
// (19, 12, 'local_g1_5') | |
// (19, 12, 'ram/WDATA_0') | |
// (19, 12, 'sp4_v_b_21') | |
// (19, 13, 'sp4_v_b_8') | |
// (20, 9, 'sp12_h_r_15') | |
// (21, 9, 'sp12_h_r_16') | |
// (22, 9, 'sp12_h_r_19') | |
// (23, 9, 'sp12_h_r_20') | |
// (24, 9, 'sp12_h_r_23') | |
// (25, 9, 'sp12_h_l_23') | |
reg n101 = 0; | |
// (6, 19, 'neigh_op_tnr_5') | |
// (6, 20, 'neigh_op_rgt_5') | |
// (6, 21, 'io_0/D_OUT_0') | |
// (6, 21, 'local_g1_5') | |
// (6, 21, 'logic_op_bnr_5') | |
// (7, 19, 'neigh_op_top_5') | |
// (7, 20, 'lutff_5/out') | |
// (7, 21, 'logic_op_bot_5') | |
// (8, 19, 'neigh_op_tnl_5') | |
// (8, 20, 'neigh_op_lft_5') | |
// (8, 21, 'logic_op_bnl_5') | |
wire \pins[2] ; | |
// (6, 21, 'io_0/PAD') | |
reg n103 = 0; | |
// (7, 6, 'neigh_op_tnr_1') | |
// (7, 7, 'neigh_op_rgt_1') | |
// (7, 8, 'neigh_op_bnr_1') | |
// (8, 6, 'neigh_op_top_1') | |
// (8, 7, 'local_g2_1') | |
// (8, 7, 'lutff_1/in_2') | |
// (8, 7, 'lutff_1/out') | |
// (8, 8, 'neigh_op_bot_1') | |
// (9, 6, 'neigh_op_tnl_1') | |
// (9, 7, 'local_g0_1') | |
// (9, 7, 'lutff_1/in_2') | |
// (9, 7, 'lutff_4/in_1') | |
// (9, 7, 'neigh_op_lft_1') | |
// (9, 8, 'neigh_op_bnl_1') | |
wire n104; | |
// (7, 7, 'sp4_h_r_6') | |
// (8, 6, 'neigh_op_tnr_7') | |
// (8, 7, 'local_g1_3') | |
// (8, 7, 'lutff_global/cen') | |
// (8, 7, 'neigh_op_rgt_7') | |
// (8, 7, 'sp4_h_r_19') | |
// (8, 8, 'neigh_op_bnr_7') | |
// (9, 6, 'neigh_op_top_7') | |
// (9, 7, 'lutff_7/out') | |
// (9, 7, 'sp4_h_r_30') | |
// (9, 8, 'neigh_op_bot_7') | |
// (10, 6, 'neigh_op_tnl_7') | |
// (10, 7, 'neigh_op_lft_7') | |
// (10, 7, 'sp4_h_r_43') | |
// (10, 8, 'neigh_op_bnl_7') | |
// (11, 7, 'sp4_h_l_43') | |
reg n105 = 0; | |
// (7, 12, 'neigh_op_tnr_5') | |
// (7, 13, 'neigh_op_rgt_5') | |
// (7, 14, 'neigh_op_bnr_5') | |
// (8, 12, 'neigh_op_top_5') | |
// (8, 13, 'lutff_5/out') | |
// (8, 13, 'sp4_h_r_10') | |
// (8, 14, 'neigh_op_bot_5') | |
// (9, 12, 'neigh_op_tnl_5') | |
// (9, 13, 'neigh_op_lft_5') | |
// (9, 13, 'sp4_h_r_23') | |
// (9, 14, 'neigh_op_bnl_5') | |
// (10, 13, 'sp4_h_r_34') | |
// (11, 10, 'sp4_r_v_b_47') | |
// (11, 11, 'sp4_r_v_b_34') | |
// (11, 12, 'local_g3_7') | |
// (11, 12, 'lutff_2/in_2') | |
// (11, 12, 'sp4_r_v_b_23') | |
// (11, 13, 'sp4_h_r_47') | |
// (11, 13, 'sp4_r_v_b_10') | |
// (12, 9, 'sp4_v_t_47') | |
// (12, 10, 'sp4_v_b_47') | |
// (12, 11, 'sp4_v_b_34') | |
// (12, 12, 'sp4_v_b_23') | |
// (12, 13, 'sp4_h_l_47') | |
// (12, 13, 'sp4_v_b_10') | |
wire n106; | |
// (7, 12, 'sp4_h_r_11') | |
// (8, 12, 'sp4_h_r_22') | |
// (8, 12, 'sp4_h_r_6') | |
// (9, 10, 'sp4_r_v_b_38') | |
// (9, 11, 'neigh_op_tnr_7') | |
// (9, 11, 'sp4_r_v_b_27') | |
// (9, 12, 'neigh_op_rgt_7') | |
// (9, 12, 'sp4_h_r_19') | |
// (9, 12, 'sp4_h_r_3') | |
// (9, 12, 'sp4_h_r_35') | |
// (9, 12, 'sp4_r_v_b_14') | |
// (9, 13, 'neigh_op_bnr_7') | |
// (9, 13, 'sp4_r_v_b_3') | |
// (10, 9, 'sp4_v_t_38') | |
// (10, 10, 'sp4_v_b_38') | |
// (10, 11, 'neigh_op_top_7') | |
// (10, 11, 'sp4_v_b_27') | |
// (10, 12, 'lutff_7/out') | |
// (10, 12, 'sp4_h_r_14') | |
// (10, 12, 'sp4_h_r_30') | |
// (10, 12, 'sp4_h_r_46') | |
// (10, 12, 'sp4_r_v_b_47') | |
// (10, 12, 'sp4_v_b_14') | |
// (10, 13, 'neigh_op_bot_7') | |
// (10, 13, 'sp4_h_r_9') | |
// (10, 13, 'sp4_r_v_b_34') | |
// (10, 13, 'sp4_v_b_3') | |
// (10, 14, 'sp4_r_v_b_23') | |
// (10, 15, 'sp4_r_v_b_10') | |
// (11, 11, 'neigh_op_tnl_7') | |
// (11, 11, 'sp4_h_r_10') | |
// (11, 11, 'sp4_h_r_3') | |
// (11, 11, 'sp4_v_t_47') | |
// (11, 12, 'local_g1_7') | |
// (11, 12, 'lutff_4/in_2') | |
// (11, 12, 'neigh_op_lft_7') | |
// (11, 12, 'sp4_h_l_46') | |
// (11, 12, 'sp4_h_r_27') | |
// (11, 12, 'sp4_h_r_43') | |
// (11, 12, 'sp4_h_r_7') | |
// (11, 12, 'sp4_v_b_47') | |
// (11, 13, 'neigh_op_bnl_7') | |
// (11, 13, 'sp4_h_r_20') | |
// (11, 13, 'sp4_r_v_b_43') | |
// (11, 13, 'sp4_v_b_34') | |
// (11, 14, 'local_g1_7') | |
// (11, 14, 'lutff_5/in_1') | |
// (11, 14, 'sp4_r_v_b_30') | |
// (11, 14, 'sp4_v_b_23') | |
// (11, 15, 'sp4_r_v_b_19') | |
// (11, 15, 'sp4_v_b_10') | |
// (11, 16, 'sp4_r_v_b_6') | |
// (12, 11, 'sp4_h_r_14') | |
// (12, 11, 'sp4_h_r_23') | |
// (12, 12, 'local_g3_6') | |
// (12, 12, 'lutff_2/in_1') | |
// (12, 12, 'sp4_h_l_43') | |
// (12, 12, 'sp4_h_r_18') | |
// (12, 12, 'sp4_h_r_38') | |
// (12, 12, 'sp4_h_r_9') | |
// (12, 12, 'sp4_v_t_43') | |
// (12, 13, 'sp4_h_r_33') | |
// (12, 13, 'sp4_r_v_b_45') | |
// (12, 13, 'sp4_v_b_43') | |
// (12, 14, 'local_g3_6') | |
// (12, 14, 'lutff_2/in_1') | |
// (12, 14, 'sp4_r_v_b_32') | |
// (12, 14, 'sp4_v_b_30') | |
// (12, 15, 'sp4_r_v_b_21') | |
// (12, 15, 'sp4_v_b_19') | |
// (12, 16, 'sp4_r_v_b_8') | |
// (12, 16, 'sp4_v_b_6') | |
// (13, 11, 'sp4_h_r_27') | |
// (13, 11, 'sp4_h_r_34') | |
// (13, 12, 'local_g1_4') | |
// (13, 12, 'lutff_5/in_0') | |
// (13, 12, 'sp4_h_l_38') | |
// (13, 12, 'sp4_h_r_20') | |
// (13, 12, 'sp4_h_r_31') | |
// (13, 12, 'sp4_v_t_45') | |
// (13, 13, 'sp4_h_r_44') | |
// (13, 13, 'sp4_v_b_45') | |
// (13, 14, 'local_g3_0') | |
// (13, 14, 'lutff_3/in_0') | |
// (13, 14, 'sp4_v_b_32') | |
// (13, 15, 'sp4_v_b_21') | |
// (13, 16, 'sp4_v_b_8') | |
// (14, 11, 'local_g3_7') | |
// (14, 11, 'lutff_6/in_2') | |
// (14, 11, 'sp4_h_r_38') | |
// (14, 11, 'sp4_h_r_47') | |
// (14, 12, 'sp4_h_r_33') | |
// (14, 12, 'sp4_h_r_42') | |
// (14, 13, 'local_g1_1') | |
// (14, 13, 'lutff_6/in_0') | |
// (14, 13, 'sp4_h_l_44') | |
// (14, 13, 'sp4_h_r_9') | |
// (15, 11, 'sp4_h_l_38') | |
// (15, 11, 'sp4_h_l_47') | |
// (15, 11, 'sp4_h_r_3') | |
// (15, 12, 'sp4_h_l_42') | |
// (15, 12, 'sp4_h_r_10') | |
// (15, 12, 'sp4_h_r_44') | |
// (15, 13, 'local_g1_4') | |
// (15, 13, 'lutff_1/in_2') | |
// (15, 13, 'sp4_h_r_20') | |
// (16, 11, 'sp4_h_r_14') | |
// (16, 12, 'local_g0_7') | |
// (16, 12, 'lutff_5/in_2') | |
// (16, 12, 'lutff_6/in_1') | |
// (16, 12, 'sp4_h_l_44') | |
// (16, 12, 'sp4_h_r_23') | |
// (16, 13, 'local_g3_1') | |
// (16, 13, 'lutff_3/in_3') | |
// (16, 13, 'sp4_h_r_33') | |
// (17, 11, 'local_g2_3') | |
// (17, 11, 'lutff_6/in_1') | |
// (17, 11, 'sp4_h_r_27') | |
// (17, 12, 'local_g3_2') | |
// (17, 12, 'lutff_7/in_0') | |
// (17, 12, 'sp4_h_r_34') | |
// (17, 13, 'sp4_h_r_44') | |
// (18, 11, 'local_g3_6') | |
// (18, 11, 'lutff_7/in_0') | |
// (18, 11, 'sp4_h_r_38') | |
// (18, 12, 'local_g3_7') | |
// (18, 12, 'lutff_0/in_2') | |
// (18, 12, 'sp4_h_r_47') | |
// (18, 13, 'sp4_h_l_44') | |
// (19, 11, 'sp4_h_l_38') | |
// (19, 11, 'sp4_h_r_11') | |
// (19, 12, 'sp4_h_l_47') | |
// (20, 11, 'local_g1_6') | |
// (20, 11, 'lutff_1/in_0') | |
// (20, 11, 'sp4_h_r_22') | |
// (21, 11, 'sp4_h_r_35') | |
// (22, 11, 'sp4_h_r_46') | |
// (23, 11, 'sp4_h_l_46') | |
wire n107; | |
// (7, 17, 'sp4_r_v_b_38') | |
// (7, 18, 'sp4_r_v_b_27') | |
// (7, 19, 'local_g2_6') | |
// (7, 19, 'lutff_2/in_2') | |
// (7, 19, 'sp4_r_v_b_14') | |
// (7, 20, 'local_g1_3') | |
// (7, 20, 'lutff_5/in_1') | |
// (7, 20, 'sp4_r_v_b_3') | |
// (8, 9, 'sp12_h_r_1') | |
// (8, 9, 'sp12_v_t_22') | |
// (8, 10, 'sp12_v_b_22') | |
// (8, 11, 'sp12_v_b_21') | |
// (8, 12, 'sp12_v_b_18') | |
// (8, 13, 'sp12_v_b_17') | |
// (8, 14, 'sp12_v_b_14') | |
// (8, 15, 'sp12_v_b_13') | |
// (8, 16, 'sp12_v_b_10') | |
// (8, 16, 'sp4_v_t_38') | |
// (8, 17, 'sp12_v_b_9') | |
// (8, 17, 'sp4_v_b_38') | |
// (8, 18, 'sp12_v_b_6') | |
// (8, 18, 'sp4_v_b_27') | |
// (8, 19, 'sp12_v_b_5') | |
// (8, 19, 'sp4_v_b_14') | |
// (8, 20, 'sp12_v_b_2') | |
// (8, 20, 'sp4_v_b_3') | |
// (8, 21, 'span12_vert_1') | |
// (9, 9, 'sp12_h_r_2') | |
// (10, 9, 'sp12_h_r_5') | |
// (11, 9, 'sp12_h_r_6') | |
// (12, 9, 'sp12_h_r_9') | |
// (12, 12, 'sp4_r_v_b_45') | |
// (12, 13, 'sp4_r_v_b_32') | |
// (12, 14, 'local_g3_5') | |
// (12, 14, 'lutff_2/in_0') | |
// (12, 14, 'sp4_r_v_b_21') | |
// (12, 15, 'sp4_r_v_b_8') | |
// (13, 9, 'sp12_h_r_10') | |
// (13, 10, 'sp4_r_v_b_36') | |
// (13, 11, 'sp4_h_r_2') | |
// (13, 11, 'sp4_r_v_b_25') | |
// (13, 11, 'sp4_v_t_45') | |
// (13, 12, 'local_g2_4') | |
// (13, 12, 'lutff_7/in_1') | |
// (13, 12, 'sp4_r_v_b_12') | |
// (13, 12, 'sp4_v_b_45') | |
// (13, 13, 'sp4_r_v_b_1') | |
// (13, 13, 'sp4_v_b_32') | |
// (13, 14, 'sp4_v_b_21') | |
// (13, 15, 'sp4_v_b_8') | |
// (14, 9, 'sp12_h_r_13') | |
// (14, 9, 'sp4_h_r_7') | |
// (14, 9, 'sp4_v_t_36') | |
// (14, 10, 'sp4_v_b_36') | |
// (14, 11, 'sp4_h_r_15') | |
// (14, 11, 'sp4_v_b_25') | |
// (14, 12, 'sp4_v_b_12') | |
// (14, 13, 'sp4_v_b_1') | |
// (15, 9, 'sp12_h_r_14') | |
// (15, 9, 'sp4_h_r_18') | |
// (15, 11, 'sp4_h_r_26') | |
// (16, 8, 'neigh_op_tnr_5') | |
// (16, 8, 'sp4_r_v_b_39') | |
// (16, 9, 'neigh_op_rgt_5') | |
// (16, 9, 'sp12_h_r_17') | |
// (16, 9, 'sp4_h_r_31') | |
// (16, 9, 'sp4_r_v_b_26') | |
// (16, 9, 'sp4_r_v_b_42') | |
// (16, 10, 'neigh_op_bnr_5') | |
// (16, 10, 'sp4_r_v_b_15') | |
// (16, 10, 'sp4_r_v_b_31') | |
// (16, 11, 'sp4_h_r_39') | |
// (16, 11, 'sp4_r_v_b_18') | |
// (16, 11, 'sp4_r_v_b_2') | |
// (16, 12, 'sp4_r_v_b_7') | |
// (17, 7, 'sp4_v_t_39') | |
// (17, 8, 'neigh_op_top_5') | |
// (17, 8, 'sp4_v_b_39') | |
// (17, 8, 'sp4_v_t_42') | |
// (17, 9, 'lutff_5/out') | |
// (17, 9, 'sp12_h_r_18') | |
// (17, 9, 'sp4_h_r_42') | |
// (17, 9, 'sp4_v_b_26') | |
// (17, 9, 'sp4_v_b_42') | |
// (17, 10, 'neigh_op_bot_5') | |
// (17, 10, 'sp4_v_b_15') | |
// (17, 10, 'sp4_v_b_31') | |
// (17, 11, 'sp4_h_l_39') | |
// (17, 11, 'sp4_v_b_18') | |
// (17, 11, 'sp4_v_b_2') | |
// (17, 12, 'sp4_h_r_1') | |
// (17, 12, 'sp4_v_b_7') | |
// (18, 8, 'neigh_op_tnl_5') | |
// (18, 9, 'neigh_op_lft_5') | |
// (18, 9, 'sp12_h_r_21') | |
// (18, 9, 'sp4_h_l_42') | |
// (18, 10, 'neigh_op_bnl_5') | |
// (18, 12, 'sp4_h_r_12') | |
// (19, 9, 'sp12_h_r_22') | |
// (19, 12, 'local_g3_1') | |
// (19, 12, 'ram/WDATA_2') | |
// (19, 12, 'sp4_h_r_25') | |
// (20, 9, 'sp12_h_l_22') | |
// (20, 12, 'sp4_h_r_36') | |
// (21, 12, 'sp4_h_l_36') | |
wire n108; | |
// (8, 6, 'neigh_op_tnr_2') | |
// (8, 7, 'neigh_op_rgt_2') | |
// (8, 8, 'neigh_op_bnr_2') | |
// (9, 6, 'neigh_op_top_2') | |
// (9, 7, 'local_g0_2') | |
// (9, 7, 'lutff_2/out') | |
// (9, 7, 'lutff_5/in_1') | |
// (9, 8, 'neigh_op_bot_2') | |
// (10, 6, 'neigh_op_tnl_2') | |
// (10, 7, 'neigh_op_lft_2') | |
// (10, 8, 'neigh_op_bnl_2') | |
wire n109; | |
// (8, 6, 'neigh_op_tnr_3') | |
// (8, 7, 'neigh_op_rgt_3') | |
// (8, 8, 'neigh_op_bnr_3') | |
// (9, 6, 'neigh_op_top_3') | |
// (9, 7, 'local_g0_3') | |
// (9, 7, 'lutff_3/out') | |
// (9, 7, 'lutff_6/in_3') | |
// (9, 8, 'neigh_op_bot_3') | |
// (10, 6, 'neigh_op_tnl_3') | |
// (10, 7, 'neigh_op_lft_3') | |
// (10, 8, 'neigh_op_bnl_3') | |
wire n110; | |
// (8, 6, 'neigh_op_tnr_4') | |
// (8, 7, 'neigh_op_rgt_4') | |
// (8, 8, 'neigh_op_bnr_4') | |
// (9, 6, 'neigh_op_top_4') | |
// (9, 6, 'sp4_r_v_b_36') | |
// (9, 7, 'local_g2_4') | |
// (9, 7, 'lutff_4/out') | |
// (9, 7, 'lutff_5/in_3') | |
// (9, 7, 'lutff_6/in_2') | |
// (9, 7, 'sp4_r_v_b_25') | |
// (9, 8, 'local_g1_4') | |
// (9, 8, 'lutff_4/in_1') | |
// (9, 8, 'neigh_op_bot_4') | |
// (9, 8, 'sp4_r_v_b_12') | |
// (9, 9, 'local_g1_1') | |
// (9, 9, 'lutff_7/in_1') | |
// (9, 9, 'sp4_r_v_b_1') | |
// (10, 5, 'sp4_v_t_36') | |
// (10, 6, 'neigh_op_tnl_4') | |
// (10, 6, 'sp4_v_b_36') | |
// (10, 7, 'neigh_op_lft_4') | |
// (10, 7, 'sp4_v_b_25') | |
// (10, 8, 'neigh_op_bnl_4') | |
// (10, 8, 'sp4_v_b_12') | |
// (10, 9, 'sp4_v_b_1') | |
reg n111 = 0; | |
// (8, 6, 'neigh_op_tnr_5') | |
// (8, 7, 'neigh_op_rgt_5') | |
// (8, 8, 'neigh_op_bnr_5') | |
// (9, 6, 'neigh_op_top_5') | |
// (9, 7, 'local_g2_5') | |
// (9, 7, 'lutff_2/in_1') | |
// (9, 7, 'lutff_4/in_3') | |
// (9, 7, 'lutff_5/out') | |
// (9, 8, 'neigh_op_bot_5') | |
// (10, 6, 'neigh_op_tnl_5') | |
// (10, 7, 'neigh_op_lft_5') | |
// (10, 8, 'neigh_op_bnl_5') | |
reg n112 = 0; | |
// (8, 6, 'neigh_op_tnr_6') | |
// (8, 7, 'neigh_op_rgt_6') | |
// (8, 8, 'neigh_op_bnr_6') | |
// (9, 6, 'neigh_op_top_6') | |
// (9, 7, 'local_g0_6') | |
// (9, 7, 'lutff_3/in_1') | |
// (9, 7, 'lutff_4/in_2') | |
// (9, 7, 'lutff_6/out') | |
// (9, 8, 'neigh_op_bot_6') | |
// (10, 6, 'neigh_op_tnl_6') | |
// (10, 7, 'neigh_op_lft_6') | |
// (10, 8, 'neigh_op_bnl_6') | |
reg n113 = 0; | |
// (8, 7, 'neigh_op_tnr_4') | |
// (8, 8, 'neigh_op_rgt_4') | |
// (8, 9, 'neigh_op_bnr_4') | |
// (9, 7, 'local_g0_4') | |
// (9, 7, 'local_g1_4') | |
// (9, 7, 'lutff_0/in_2') | |
// (9, 7, 'lutff_4/in_0') | |
// (9, 7, 'lutff_7/in_0') | |
// (9, 7, 'neigh_op_top_4') | |
// (9, 8, 'local_g0_4') | |
// (9, 8, 'lutff_4/out') | |
// (9, 8, 'lutff_7/in_1') | |
// (9, 9, 'neigh_op_bot_4') | |
// (10, 7, 'neigh_op_tnl_4') | |
// (10, 8, 'neigh_op_lft_4') | |
// (10, 9, 'neigh_op_bnl_4') | |
wire n114; | |
// (8, 7, 'neigh_op_tnr_7') | |
// (8, 8, 'neigh_op_rgt_7') | |
// (8, 9, 'neigh_op_bnr_7') | |
// (9, 7, 'neigh_op_top_7') | |
// (9, 8, 'local_g3_7') | |
// (9, 8, 'lutff_4/in_2') | |
// (9, 8, 'lutff_7/out') | |
// (9, 9, 'neigh_op_bot_7') | |
// (10, 7, 'neigh_op_tnl_7') | |
// (10, 8, 'neigh_op_lft_7') | |
// (10, 9, 'neigh_op_bnl_7') | |
wire n115; | |
// (8, 7, 'sp4_h_r_6') | |
// (9, 6, 'neigh_op_tnr_7') | |
// (9, 6, 'sp4_r_v_b_43') | |
// (9, 7, 'local_g1_3') | |
// (9, 7, 'local_g3_7') | |
// (9, 7, 'lutff_7/in_1') | |
// (9, 7, 'lutff_global/cen') | |
// (9, 7, 'neigh_op_rgt_7') | |
// (9, 7, 'sp4_h_r_19') | |
// (9, 7, 'sp4_r_v_b_30') | |
// (9, 8, 'local_g3_3') | |
// (9, 8, 'lutff_global/cen') | |
// (9, 8, 'neigh_op_bnr_7') | |
// (9, 8, 'sp4_r_v_b_19') | |
// (9, 9, 'sp4_r_v_b_6') | |
// (10, 5, 'sp4_v_t_43') | |
// (10, 6, 'neigh_op_top_7') | |
// (10, 6, 'sp4_v_b_43') | |
// (10, 7, 'lutff_7/out') | |
// (10, 7, 'sp4_h_r_30') | |
// (10, 7, 'sp4_v_b_30') | |
// (10, 8, 'neigh_op_bot_7') | |
// (10, 8, 'sp4_v_b_19') | |
// (10, 9, 'sp4_v_b_6') | |
// (11, 6, 'neigh_op_tnl_7') | |
// (11, 7, 'neigh_op_lft_7') | |
// (11, 7, 'sp4_h_r_43') | |
// (11, 8, 'neigh_op_bnl_7') | |
// (12, 7, 'sp4_h_l_43') | |
wire n116; | |
// (8, 10, 'sp4_h_r_6') | |
// (9, 9, 'neigh_op_tnr_7') | |
// (9, 10, 'neigh_op_rgt_7') | |
// (9, 10, 'sp4_h_r_19') | |
// (9, 11, 'neigh_op_bnr_7') | |
// (10, 9, 'neigh_op_top_7') | |
// (10, 10, 'lutff_7/out') | |
// (10, 10, 'sp4_h_r_30') | |
// (10, 11, 'neigh_op_bot_7') | |
// (11, 9, 'neigh_op_tnl_7') | |
// (11, 10, 'neigh_op_lft_7') | |
// (11, 10, 'sp4_h_r_43') | |
// (11, 11, 'neigh_op_bnl_7') | |
// (12, 10, 'sp4_h_l_43') | |
// (12, 10, 'sp4_h_r_2') | |
// (13, 10, 'sp4_h_r_15') | |
// (14, 10, 'sp4_h_r_26') | |
// (15, 10, 'local_g2_7') | |
// (15, 10, 'lutff_0/in_3') | |
// (15, 10, 'lutff_5/in_2') | |
// (15, 10, 'sp4_h_r_39') | |
// (16, 10, 'sp4_h_l_39') | |
wire n117; | |
// (8, 11, 'neigh_op_tnr_0') | |
// (8, 12, 'neigh_op_rgt_0') | |
// (8, 13, 'neigh_op_bnr_0') | |
// (9, 11, 'neigh_op_top_0') | |
// (9, 12, 'lutff_0/out') | |
// (9, 13, 'neigh_op_bot_0') | |
// (10, 11, 'neigh_op_tnl_0') | |
// (10, 12, 'local_g1_0') | |
// (10, 12, 'lutff_4/in_1') | |
// (10, 12, 'neigh_op_lft_0') | |
// (10, 13, 'neigh_op_bnl_0') | |
wire n118; | |
// (8, 11, 'neigh_op_tnr_1') | |
// (8, 12, 'neigh_op_rgt_1') | |
// (8, 12, 'sp4_h_r_7') | |
// (8, 13, 'neigh_op_bnr_1') | |
// (9, 11, 'neigh_op_top_1') | |
// (9, 12, 'lutff_1/out') | |
// (9, 12, 'sp4_h_r_18') | |
// (9, 13, 'neigh_op_bot_1') | |
// (10, 11, 'local_g2_1') | |
// (10, 11, 'lutff_4/in_1') | |
// (10, 11, 'neigh_op_tnl_1') | |
// (10, 12, 'neigh_op_lft_1') | |
// (10, 12, 'sp4_h_r_31') | |
// (10, 13, 'neigh_op_bnl_1') | |
// (11, 12, 'sp4_h_r_42') | |
// (12, 12, 'sp4_h_l_42') | |
// (12, 12, 'sp4_h_r_7') | |
// (13, 12, 'local_g1_2') | |
// (13, 12, 'lutff_4/in_3') | |
// (13, 12, 'sp4_h_r_18') | |
// (14, 12, 'local_g3_7') | |
// (14, 12, 'lutff_5/in_3') | |
// (14, 12, 'lutff_6/in_2') | |
// (14, 12, 'sp4_h_r_31') | |
// (15, 12, 'sp4_h_r_42') | |
// (16, 12, 'sp4_h_l_42') | |
wire n119; | |
// (8, 11, 'neigh_op_tnr_2') | |
// (8, 12, 'neigh_op_rgt_2') | |
// (8, 13, 'neigh_op_bnr_2') | |
// (9, 11, 'neigh_op_top_2') | |
// (9, 12, 'lutff_2/out') | |
// (9, 13, 'neigh_op_bot_2') | |
// (10, 11, 'local_g3_2') | |
// (10, 11, 'lutff_4/in_3') | |
// (10, 11, 'neigh_op_tnl_2') | |
// (10, 12, 'local_g1_2') | |
// (10, 12, 'lutff_1/in_2') | |
// (10, 12, 'lutff_7/in_0') | |
// (10, 12, 'neigh_op_lft_2') | |
// (10, 13, 'neigh_op_bnl_2') | |
wire n120; | |
// (8, 11, 'neigh_op_tnr_4') | |
// (8, 11, 'sp4_r_v_b_37') | |
// (8, 12, 'neigh_op_rgt_4') | |
// (8, 12, 'sp4_r_v_b_24') | |
// (8, 13, 'neigh_op_bnr_4') | |
// (8, 13, 'sp4_r_v_b_13') | |
// (8, 14, 'sp4_r_v_b_0') | |
// (9, 9, 'sp4_r_v_b_44') | |
// (9, 10, 'sp4_h_r_5') | |
// (9, 10, 'sp4_r_v_b_33') | |
// (9, 10, 'sp4_v_t_37') | |
// (9, 11, 'neigh_op_top_4') | |
// (9, 11, 'sp4_r_v_b_20') | |
// (9, 11, 'sp4_v_b_37') | |
// (9, 12, 'lutff_4/out') | |
// (9, 12, 'sp4_r_v_b_9') | |
// (9, 12, 'sp4_v_b_24') | |
// (9, 13, 'neigh_op_bot_4') | |
// (9, 13, 'sp4_v_b_13') | |
// (9, 14, 'sp4_v_b_0') | |
// (10, 8, 'sp4_h_r_2') | |
// (10, 8, 'sp4_v_t_44') | |
// (10, 9, 'sp4_v_b_44') | |
// (10, 10, 'sp4_h_r_16') | |
// (10, 10, 'sp4_v_b_33') | |
// (10, 11, 'neigh_op_tnl_4') | |
// (10, 11, 'sp4_v_b_20') | |
// (10, 12, 'neigh_op_lft_4') | |
// (10, 12, 'sp4_v_b_9') | |
// (10, 13, 'neigh_op_bnl_4') | |
// (11, 8, 'sp4_h_r_15') | |
// (11, 10, 'sp4_h_r_29') | |
// (12, 8, 'sp4_h_r_26') | |
// (12, 10, 'sp4_h_r_40') | |
// (13, 8, 'sp4_h_r_39') | |
// (13, 10, 'sp4_h_l_40') | |
// (13, 10, 'sp4_h_r_1') | |
// (14, 8, 'sp4_h_l_39') | |
// (14, 8, 'sp4_h_r_2') | |
// (14, 10, 'sp4_h_r_12') | |
// (15, 8, 'sp4_h_r_15') | |
// (15, 10, 'sp4_h_r_25') | |
// (16, 7, 'sp4_r_v_b_42') | |
// (16, 8, 'local_g2_2') | |
// (16, 8, 'lutff_2/in_2') | |
// (16, 8, 'lutff_7/in_3') | |
// (16, 8, 'sp4_h_r_26') | |
// (16, 8, 'sp4_r_v_b_31') | |
// (16, 9, 'local_g3_2') | |
// (16, 9, 'lutff_4/in_1') | |
// (16, 9, 'sp4_r_v_b_18') | |
// (16, 10, 'sp4_h_r_36') | |
// (16, 10, 'sp4_r_v_b_7') | |
// (17, 6, 'sp4_v_t_42') | |
// (17, 7, 'sp4_v_b_42') | |
// (17, 8, 'sp4_h_r_39') | |
// (17, 8, 'sp4_v_b_31') | |
// (17, 9, 'sp4_v_b_18') | |
// (17, 10, 'sp4_h_l_36') | |
// (17, 10, 'sp4_v_b_7') | |
// (18, 8, 'sp4_h_l_39') | |
wire n121; | |
// (8, 11, 'neigh_op_tnr_6') | |
// (8, 12, 'neigh_op_rgt_6') | |
// (8, 13, 'neigh_op_bnr_6') | |
// (9, 11, 'neigh_op_top_6') | |
// (9, 12, 'local_g2_6') | |
// (9, 12, 'lutff_1/in_3') | |
// (9, 12, 'lutff_6/out') | |
// (9, 13, 'neigh_op_bot_6') | |
// (10, 11, 'neigh_op_tnl_6') | |
// (10, 12, 'local_g1_6') | |
// (10, 12, 'lutff_1/in_0') | |
// (10, 12, 'lutff_2/in_3') | |
// (10, 12, 'lutff_3/in_2') | |
// (10, 12, 'neigh_op_lft_6') | |
// (10, 13, 'neigh_op_bnl_6') | |
wire n122; | |
// (8, 11, 'sp4_h_r_2') | |
// (9, 10, 'neigh_op_tnr_5') | |
// (9, 11, 'neigh_op_rgt_5') | |
// (9, 11, 'sp4_h_r_15') | |
// (9, 12, 'neigh_op_bnr_5') | |
// (10, 10, 'neigh_op_top_5') | |
// (10, 11, 'lutff_5/out') | |
// (10, 11, 'sp4_h_r_26') | |
// (10, 12, 'neigh_op_bot_5') | |
// (11, 10, 'neigh_op_tnl_5') | |
// (11, 11, 'neigh_op_lft_5') | |
// (11, 11, 'sp4_h_r_39') | |
// (11, 12, 'neigh_op_bnl_5') | |
// (12, 11, 'sp4_h_l_39') | |
// (12, 11, 'sp4_h_r_5') | |
// (13, 11, 'sp4_h_r_16') | |
// (14, 11, 'sp4_h_r_29') | |
// (15, 11, 'sp4_h_r_40') | |
// (16, 11, 'local_g0_1') | |
// (16, 11, 'lutff_1/in_2') | |
// (16, 11, 'sp4_h_l_40') | |
// (16, 11, 'sp4_h_r_1') | |
// (17, 11, 'sp4_h_r_12') | |
// (18, 11, 'sp4_h_r_25') | |
// (19, 11, 'sp4_h_r_36') | |
// (20, 11, 'sp4_h_l_36') | |
wire n123; | |
// (8, 11, 'sp4_r_v_b_42') | |
// (8, 12, 'neigh_op_tnr_1') | |
// (8, 12, 'sp4_r_v_b_31') | |
// (8, 13, 'neigh_op_rgt_1') | |
// (8, 13, 'sp4_h_r_7') | |
// (8, 13, 'sp4_r_v_b_18') | |
// (8, 14, 'neigh_op_bnr_1') | |
// (8, 14, 'sp4_r_v_b_7') | |
// (9, 10, 'sp4_v_t_42') | |
// (9, 11, 'sp4_v_b_42') | |
// (9, 12, 'local_g1_1') | |
// (9, 12, 'lutff_0/in_0') | |
// (9, 12, 'lutff_1/in_1') | |
// (9, 12, 'neigh_op_top_1') | |
// (9, 12, 'sp4_r_v_b_46') | |
// (9, 12, 'sp4_v_b_31') | |
// (9, 13, 'lutff_1/out') | |
// (9, 13, 'sp4_h_r_18') | |
// (9, 13, 'sp4_r_v_b_35') | |
// (9, 13, 'sp4_v_b_18') | |
// (9, 14, 'neigh_op_bot_1') | |
// (9, 14, 'sp4_h_r_1') | |
// (9, 14, 'sp4_r_v_b_22') | |
// (9, 14, 'sp4_v_b_7') | |
// (9, 15, 'sp4_r_v_b_11') | |
// (10, 11, 'sp4_v_t_46') | |
// (10, 12, 'neigh_op_tnl_1') | |
// (10, 12, 'sp4_v_b_46') | |
// (10, 13, 'local_g0_1') | |
// (10, 13, 'local_g1_1') | |
// (10, 13, 'lutff_3/in_2') | |
// (10, 13, 'lutff_4/in_2') | |
// (10, 13, 'neigh_op_lft_1') | |
// (10, 13, 'sp4_h_r_31') | |
// (10, 13, 'sp4_v_b_35') | |
// (10, 14, 'local_g3_1') | |
// (10, 14, 'lutff_1/in_3') | |
// (10, 14, 'lutff_6/in_2') | |
// (10, 14, 'neigh_op_bnl_1') | |
// (10, 14, 'sp4_h_r_12') | |
// (10, 14, 'sp4_v_b_22') | |
// (10, 15, 'sp4_h_r_11') | |
// (10, 15, 'sp4_v_b_11') | |
// (11, 13, 'sp4_h_r_42') | |
// (11, 14, 'local_g2_1') | |
// (11, 14, 'lutff_2/in_3') | |
// (11, 14, 'sp4_h_r_25') | |
// (11, 14, 'sp4_r_v_b_37') | |
// (11, 15, 'local_g0_6') | |
// (11, 15, 'lutff_7/in_3') | |
// (11, 15, 'sp4_h_r_22') | |
// (11, 15, 'sp4_r_v_b_24') | |
// (11, 16, 'sp4_r_v_b_13') | |
// (11, 17, 'sp4_r_v_b_0') | |
// (12, 13, 'sp4_h_l_42') | |
// (12, 13, 'sp4_v_t_37') | |
// (12, 14, 'local_g2_5') | |
// (12, 14, 'lutff_0/in_3') | |
// (12, 14, 'lutff_5/in_0') | |
// (12, 14, 'sp4_h_r_36') | |
// (12, 14, 'sp4_v_b_37') | |
// (12, 15, 'local_g2_0') | |
// (12, 15, 'lutff_4/in_0') | |
// (12, 15, 'lutff_7/in_3') | |
// (12, 15, 'sp4_h_r_35') | |
// (12, 15, 'sp4_v_b_24') | |
// (12, 16, 'sp4_v_b_13') | |
// (12, 17, 'sp4_v_b_0') | |
// (13, 14, 'sp4_h_l_36') | |
// (13, 15, 'sp4_h_r_46') | |
// (14, 15, 'sp4_h_l_46') | |
wire n124; | |
// (8, 12, 'sp4_h_r_0') | |
// (9, 9, 'sp4_r_v_b_45') | |
// (9, 10, 'sp4_r_v_b_32') | |
// (9, 11, 'neigh_op_tnr_4') | |
// (9, 11, 'sp4_r_v_b_21') | |
// (9, 12, 'neigh_op_rgt_4') | |
// (9, 12, 'sp4_h_r_13') | |
// (9, 12, 'sp4_r_v_b_8') | |
// (9, 13, 'neigh_op_bnr_4') | |
// (10, 8, 'sp4_v_t_45') | |
// (10, 9, 'sp4_v_b_45') | |
// (10, 10, 'local_g3_0') | |
// (10, 10, 'lutff_4/in_3') | |
// (10, 10, 'sp4_v_b_32') | |
// (10, 11, 'local_g0_4') | |
// (10, 11, 'lutff_2/in_2') | |
// (10, 11, 'lutff_3/in_3') | |
// (10, 11, 'neigh_op_top_4') | |
// (10, 11, 'sp4_r_v_b_36') | |
// (10, 11, 'sp4_v_b_21') | |
// (10, 12, 'lutff_4/out') | |
// (10, 12, 'sp4_h_r_24') | |
// (10, 12, 'sp4_h_r_8') | |
// (10, 12, 'sp4_r_v_b_25') | |
// (10, 12, 'sp4_r_v_b_41') | |
// (10, 12, 'sp4_v_b_8') | |
// (10, 13, 'neigh_op_bot_4') | |
// (10, 13, 'sp4_r_v_b_12') | |
// (10, 13, 'sp4_r_v_b_28') | |
// (10, 14, 'sp4_r_v_b_1') | |
// (10, 14, 'sp4_r_v_b_17') | |
// (10, 15, 'sp4_r_v_b_4') | |
// (11, 10, 'local_g1_6') | |
// (11, 10, 'lutff_0/in_1') | |
// (11, 10, 'lutff_1/in_0') | |
// (11, 10, 'lutff_5/in_2') | |
// (11, 10, 'lutff_7/in_2') | |
// (11, 10, 'sp4_h_r_6') | |
// (11, 10, 'sp4_v_t_36') | |
// (11, 11, 'local_g3_4') | |
// (11, 11, 'lutff_1/in_2') | |
// (11, 11, 'lutff_3/in_0') | |
// (11, 11, 'lutff_5/in_0') | |
// (11, 11, 'neigh_op_tnl_4') | |
// (11, 11, 'sp4_h_r_9') | |
// (11, 11, 'sp4_v_b_36') | |
// (11, 11, 'sp4_v_t_41') | |
// (11, 12, 'local_g2_5') | |
// (11, 12, 'lutff_6/in_3') | |
// (11, 12, 'neigh_op_lft_4') | |
// (11, 12, 'sp4_h_r_21') | |
// (11, 12, 'sp4_h_r_37') | |
// (11, 12, 'sp4_v_b_25') | |
// (11, 12, 'sp4_v_b_41') | |
// (11, 13, 'local_g2_4') | |
// (11, 13, 'lutff_4/in_0') | |
// (11, 13, 'neigh_op_bnl_4') | |
// (11, 13, 'sp4_v_b_12') | |
// (11, 13, 'sp4_v_b_28') | |
// (11, 14, 'sp4_v_b_1') | |
// (11, 14, 'sp4_v_b_17') | |
// (11, 15, 'sp4_v_b_4') | |
// (12, 10, 'sp4_h_r_19') | |
// (12, 11, 'sp4_h_r_20') | |
// (12, 12, 'local_g2_0') | |
// (12, 12, 'lutff_1/in_1') | |
// (12, 12, 'lutff_6/in_2') | |
// (12, 12, 'sp4_h_l_37') | |
// (12, 12, 'sp4_h_r_32') | |
// (13, 9, 'sp4_r_v_b_39') | |
// (13, 10, 'sp4_h_r_30') | |
// (13, 10, 'sp4_r_v_b_26') | |
// (13, 11, 'sp4_h_r_33') | |
// (13, 11, 'sp4_r_v_b_15') | |
// (13, 12, 'local_g2_5') | |
// (13, 12, 'lutff_3/in_2') | |
// (13, 12, 'sp4_h_r_45') | |
// (13, 12, 'sp4_r_v_b_2') | |
// (14, 8, 'sp4_v_t_39') | |
// (14, 9, 'sp4_v_b_39') | |
// (14, 10, 'local_g2_2') | |
// (14, 10, 'lutff_4/in_2') | |
// (14, 10, 'lutff_7/in_3') | |
// (14, 10, 'sp4_h_r_43') | |
// (14, 10, 'sp4_v_b_26') | |
// (14, 11, 'local_g2_4') | |
// (14, 11, 'lutff_0/in_2') | |
// (14, 11, 'lutff_3/in_3') | |
// (14, 11, 'sp4_h_r_44') | |
// (14, 11, 'sp4_v_b_15') | |
// (14, 12, 'sp4_h_l_45') | |
// (14, 12, 'sp4_v_b_2') | |
// (15, 10, 'sp4_h_l_43') | |
// (15, 11, 'sp4_h_l_44') | |
wire n125; | |
// (8, 12, 'sp4_h_r_11') | |
// (9, 12, 'sp4_h_r_22') | |
// (9, 12, 'sp4_h_r_6') | |
// (10, 10, 'sp4_r_v_b_38') | |
// (10, 11, 'neigh_op_tnr_7') | |
// (10, 11, 'sp4_r_v_b_27') | |
// (10, 12, 'neigh_op_rgt_7') | |
// (10, 12, 'sp4_h_r_19') | |
// (10, 12, 'sp4_h_r_3') | |
// (10, 12, 'sp4_h_r_35') | |
// (10, 12, 'sp4_r_v_b_14') | |
// (10, 13, 'neigh_op_bnr_7') | |
// (10, 13, 'sp4_r_v_b_3') | |
// (11, 9, 'local_g1_0') | |
// (11, 9, 'lutff_1/in_0') | |
// (11, 9, 'lutff_3/in_0') | |
// (11, 9, 'sp4_h_r_8') | |
// (11, 9, 'sp4_v_t_38') | |
// (11, 10, 'local_g3_6') | |
// (11, 10, 'lutff_3/in_0') | |
// (11, 10, 'sp4_r_v_b_39') | |
// (11, 10, 'sp4_v_b_38') | |
// (11, 11, 'neigh_op_top_7') | |
// (11, 11, 'sp4_r_v_b_26') | |
// (11, 11, 'sp4_r_v_b_42') | |
// (11, 11, 'sp4_v_b_27') | |
// (11, 12, 'lutff_7/out') | |
// (11, 12, 'sp4_h_r_14') | |
// (11, 12, 'sp4_h_r_30') | |
// (11, 12, 'sp4_h_r_46') | |
// (11, 12, 'sp4_r_v_b_15') | |
// (11, 12, 'sp4_r_v_b_31') | |
// (11, 12, 'sp4_r_v_b_47') | |
// (11, 12, 'sp4_v_b_14') | |
// (11, 13, 'neigh_op_bot_7') | |
// (11, 13, 'sp4_r_v_b_18') | |
// (11, 13, 'sp4_r_v_b_2') | |
// (11, 13, 'sp4_r_v_b_34') | |
// (11, 13, 'sp4_v_b_3') | |
// (11, 14, 'sp4_r_v_b_23') | |
// (11, 14, 'sp4_r_v_b_7') | |
// (11, 15, 'sp4_r_v_b_10') | |
// (12, 9, 'local_g1_7') | |
// (12, 9, 'lutff_1/in_3') | |
// (12, 9, 'sp4_h_r_21') | |
// (12, 9, 'sp4_h_r_7') | |
// (12, 9, 'sp4_v_t_39') | |
// (12, 10, 'sp4_h_r_0') | |
// (12, 10, 'sp4_v_b_39') | |
// (12, 10, 'sp4_v_t_42') | |
// (12, 11, 'neigh_op_tnl_7') | |
// (12, 11, 'sp4_h_r_10') | |
// (12, 11, 'sp4_v_b_26') | |
// (12, 11, 'sp4_v_b_42') | |
// (12, 11, 'sp4_v_t_47') | |
// (12, 12, 'local_g1_7') | |
// (12, 12, 'lutff_0/in_2') | |
// (12, 12, 'neigh_op_lft_7') | |
// (12, 12, 'sp4_h_l_46') | |
// (12, 12, 'sp4_h_r_11') | |
// (12, 12, 'sp4_h_r_27') | |
// (12, 12, 'sp4_h_r_43') | |
// (12, 12, 'sp4_v_b_15') | |
// (12, 12, 'sp4_v_b_31') | |
// (12, 12, 'sp4_v_b_47') | |
// (12, 13, 'local_g3_7') | |
// (12, 13, 'lutff_1/in_3') | |
// (12, 13, 'neigh_op_bnl_7') | |
// (12, 13, 'sp4_h_r_8') | |
// (12, 13, 'sp4_v_b_18') | |
// (12, 13, 'sp4_v_b_2') | |
// (12, 13, 'sp4_v_b_34') | |
// (12, 14, 'sp4_v_b_23') | |
// (12, 14, 'sp4_v_b_7') | |
// (12, 15, 'sp4_v_b_10') | |
// (13, 9, 'local_g1_2') | |
// (13, 9, 'lutff_2/in_3') | |
// (13, 9, 'sp4_h_r_18') | |
// (13, 9, 'sp4_h_r_32') | |
// (13, 10, 'sp4_h_r_13') | |
// (13, 11, 'sp4_h_r_23') | |
// (13, 12, 'sp4_h_l_43') | |
// (13, 12, 'sp4_h_r_2') | |
// (13, 12, 'sp4_h_r_22') | |
// (13, 12, 'sp4_h_r_38') | |
// (13, 13, 'local_g1_5') | |
// (13, 13, 'lutff_6/in_2') | |
// (13, 13, 'sp4_h_r_21') | |
// (14, 9, 'local_g3_7') | |
// (14, 9, 'lutff_7/in_1') | |
// (14, 9, 'sp4_h_r_31') | |
// (14, 9, 'sp4_h_r_45') | |
// (14, 10, 'sp4_h_r_24') | |
// (14, 11, 'sp4_h_r_34') | |
// (14, 12, 'local_g0_7') | |
// (14, 12, 'lutff_0/in_1') | |
// (14, 12, 'lutff_4/in_1') | |
// (14, 12, 'sp4_h_l_38') | |
// (14, 12, 'sp4_h_r_15') | |
// (14, 12, 'sp4_h_r_3') | |
// (14, 12, 'sp4_h_r_35') | |
// (14, 13, 'sp4_h_r_32') | |
// (15, 9, 'local_g2_2') | |
// (15, 9, 'lutff_2/in_2') | |
// (15, 9, 'sp4_h_l_45') | |
// (15, 9, 'sp4_h_r_42') | |
// (15, 9, 'sp4_r_v_b_46') | |
// (15, 10, 'sp4_h_r_37') | |
// (15, 10, 'sp4_r_v_b_35') | |
// (15, 11, 'local_g2_7') | |
// (15, 11, 'lutff_0/in_3') | |
// (15, 11, 'sp4_h_r_47') | |
// (15, 11, 'sp4_r_v_b_22') | |
// (15, 12, 'local_g0_6') | |
// (15, 12, 'lutff_7/in_3') | |
// (15, 12, 'sp4_h_r_14') | |
// (15, 12, 'sp4_h_r_26') | |
// (15, 12, 'sp4_h_r_46') | |
// (15, 12, 'sp4_r_v_b_11') | |
// (15, 13, 'sp4_h_r_45') | |
// (16, 8, 'sp4_v_t_46') | |
// (16, 9, 'sp4_h_l_42') | |
// (16, 9, 'sp4_v_b_46') | |
// (16, 10, 'local_g0_0') | |
// (16, 10, 'lutff_4/in_2') | |
// (16, 10, 'sp4_h_l_37') | |
// (16, 10, 'sp4_h_r_0') | |
// (16, 10, 'sp4_v_b_35') | |
// (16, 11, 'local_g0_6') | |
// (16, 11, 'lutff_0/in_2') | |
// (16, 11, 'sp4_h_l_47') | |
// (16, 11, 'sp4_v_b_22') | |
// (16, 12, 'sp4_h_l_46') | |
// (16, 12, 'sp4_h_r_27') | |
// (16, 12, 'sp4_h_r_39') | |
// (16, 12, 'sp4_v_b_11') | |
// (16, 13, 'local_g0_3') | |
// (16, 13, 'lutff_6/in_1') | |
// (16, 13, 'sp4_h_l_45') | |
// (16, 13, 'sp4_h_r_11') | |
// (17, 10, 'sp4_h_r_13') | |
// (17, 12, 'sp4_h_l_39') | |
// (17, 12, 'sp4_h_r_38') | |
// (17, 13, 'sp4_h_r_22') | |
// (18, 10, 'sp4_h_r_24') | |
// (18, 12, 'sp4_h_l_38') | |
// (18, 13, 'sp4_h_r_35') | |
// (19, 10, 'sp4_h_r_37') | |
// (19, 13, 'sp4_h_r_46') | |
// (20, 10, 'sp4_h_l_37') | |
// (20, 13, 'sp4_h_l_46') | |
wire n126; | |
// (8, 12, 'sp4_h_r_2') | |
// (9, 11, 'neigh_op_tnr_5') | |
// (9, 12, 'neigh_op_rgt_5') | |
// (9, 12, 'sp4_h_r_15') | |
// (9, 13, 'neigh_op_bnr_5') | |
// (10, 11, 'neigh_op_top_5') | |
// (10, 12, 'local_g2_5') | |
// (10, 12, 'local_g3_5') | |
// (10, 12, 'lutff_3/in_0') | |
// (10, 12, 'lutff_5/out') | |
// (10, 12, 'lutff_6/in_3') | |
// (10, 12, 'lutff_7/in_3') | |
// (10, 12, 'sp4_h_r_26') | |
// (10, 13, 'local_g1_5') | |
// (10, 13, 'lutff_1/in_3') | |
// (10, 13, 'neigh_op_bot_5') | |
// (11, 11, 'neigh_op_tnl_5') | |
// (11, 12, 'local_g0_5') | |
// (11, 12, 'lutff_7/in_2') | |
// (11, 12, 'neigh_op_lft_5') | |
// (11, 12, 'sp4_h_r_39') | |
// (11, 13, 'local_g3_5') | |
// (11, 13, 'lutff_6/in_0') | |
// (11, 13, 'lutff_7/in_3') | |
// (11, 13, 'neigh_op_bnl_5') | |
// (12, 12, 'sp4_h_l_39') | |
// (12, 12, 'sp4_h_r_5') | |
// (13, 12, 'local_g1_0') | |
// (13, 12, 'lutff_4/in_1') | |
// (13, 12, 'sp4_h_r_16') | |
// (14, 12, 'local_g2_5') | |
// (14, 12, 'lutff_5/in_2') | |
// (14, 12, 'lutff_6/in_1') | |
// (14, 12, 'sp4_h_r_29') | |
// (15, 12, 'sp4_h_r_40') | |
// (16, 12, 'sp4_h_l_40') | |
wire n127; | |
// (8, 13, 'sp4_h_r_1') | |
// (9, 13, 'sp4_h_r_12') | |
// (10, 10, 'sp4_r_v_b_41') | |
// (10, 11, 'sp4_r_v_b_28') | |
// (10, 11, 'sp4_r_v_b_44') | |
// (10, 12, 'neigh_op_tnr_2') | |
// (10, 12, 'sp4_r_v_b_17') | |
// (10, 12, 'sp4_r_v_b_33') | |
// (10, 13, 'neigh_op_rgt_2') | |
// (10, 13, 'sp4_h_r_25') | |
// (10, 13, 'sp4_r_v_b_20') | |
// (10, 13, 'sp4_r_v_b_4') | |
// (10, 14, 'neigh_op_bnr_2') | |
// (10, 14, 'sp4_r_v_b_9') | |
// (11, 9, 'local_g0_4') | |
// (11, 9, 'lutff_1/in_3') | |
// (11, 9, 'lutff_3/in_1') | |
// (11, 9, 'sp4_h_r_4') | |
// (11, 9, 'sp4_v_t_41') | |
// (11, 10, 'local_g2_1') | |
// (11, 10, 'lutff_3/in_2') | |
// (11, 10, 'sp4_h_r_9') | |
// (11, 10, 'sp4_v_b_41') | |
// (11, 10, 'sp4_v_t_44') | |
// (11, 11, 'sp4_v_b_28') | |
// (11, 11, 'sp4_v_b_44') | |
// (11, 12, 'neigh_op_top_2') | |
// (11, 12, 'sp4_v_b_17') | |
// (11, 12, 'sp4_v_b_33') | |
// (11, 13, 'lutff_2/out') | |
// (11, 13, 'sp4_h_r_36') | |
// (11, 13, 'sp4_h_r_4') | |
// (11, 13, 'sp4_v_b_20') | |
// (11, 13, 'sp4_v_b_4') | |
// (11, 14, 'neigh_op_bot_2') | |
// (11, 14, 'sp4_v_b_9') | |
// (12, 9, 'local_g1_1') | |
// (12, 9, 'lutff_4/in_2') | |
// (12, 9, 'sp4_h_r_17') | |
// (12, 10, 'sp4_h_r_20') | |
// (12, 12, 'local_g2_2') | |
// (12, 12, 'lutff_0/in_0') | |
// (12, 12, 'neigh_op_tnl_2') | |
// (12, 13, 'local_g1_2') | |
// (12, 13, 'lutff_1/in_0') | |
// (12, 13, 'neigh_op_lft_2') | |
// (12, 13, 'sp4_h_l_36') | |
// (12, 13, 'sp4_h_r_17') | |
// (12, 13, 'sp4_h_r_4') | |
// (12, 14, 'neigh_op_bnl_2') | |
// (13, 9, 'local_g2_4') | |
// (13, 9, 'lutff_2/in_0') | |
// (13, 9, 'sp4_h_r_28') | |
// (13, 10, 'sp4_h_r_33') | |
// (13, 13, 'local_g2_4') | |
// (13, 13, 'lutff_3/in_1') | |
// (13, 13, 'sp4_h_r_17') | |
// (13, 13, 'sp4_h_r_28') | |
// (14, 9, 'local_g2_1') | |
// (14, 9, 'lutff_7/in_0') | |
// (14, 9, 'sp4_h_r_41') | |
// (14, 10, 'sp4_h_r_44') | |
// (14, 10, 'sp4_r_v_b_41') | |
// (14, 10, 'sp4_r_v_b_47') | |
// (14, 11, 'sp4_r_v_b_28') | |
// (14, 11, 'sp4_r_v_b_34') | |
// (14, 12, 'local_g3_1') | |
// (14, 12, 'lutff_2/in_0') | |
// (14, 12, 'lutff_4/in_2') | |
// (14, 12, 'sp4_r_v_b_17') | |
// (14, 12, 'sp4_r_v_b_23') | |
// (14, 13, 'sp4_h_r_28') | |
// (14, 13, 'sp4_h_r_41') | |
// (14, 13, 'sp4_r_v_b_10') | |
// (14, 13, 'sp4_r_v_b_4') | |
// (15, 9, 'local_g0_3') | |
// (15, 9, 'lutff_2/in_3') | |
// (15, 9, 'sp4_h_l_41') | |
// (15, 9, 'sp4_h_r_3') | |
// (15, 9, 'sp4_v_t_41') | |
// (15, 9, 'sp4_v_t_47') | |
// (15, 10, 'sp4_h_l_44') | |
// (15, 10, 'sp4_h_r_0') | |
// (15, 10, 'sp4_r_v_b_41') | |
// (15, 10, 'sp4_v_b_41') | |
// (15, 10, 'sp4_v_b_47') | |
// (15, 11, 'local_g2_4') | |
// (15, 11, 'lutff_0/in_2') | |
// (15, 11, 'sp4_r_v_b_28') | |
// (15, 11, 'sp4_v_b_28') | |
// (15, 11, 'sp4_v_b_34') | |
// (15, 12, 'local_g0_1') | |
// (15, 12, 'lutff_7/in_2') | |
// (15, 12, 'sp4_r_v_b_17') | |
// (15, 12, 'sp4_v_b_17') | |
// (15, 12, 'sp4_v_b_23') | |
// (15, 13, 'sp4_h_l_41') | |
// (15, 13, 'sp4_h_r_0') | |
// (15, 13, 'sp4_h_r_41') | |
// (15, 13, 'sp4_r_v_b_4') | |
// (15, 13, 'sp4_v_b_10') | |
// (15, 13, 'sp4_v_b_4') | |
// (16, 9, 'sp4_h_r_14') | |
// (16, 9, 'sp4_v_t_41') | |
// (16, 10, 'local_g0_5') | |
// (16, 10, 'lutff_4/in_1') | |
// (16, 10, 'sp4_h_r_13') | |
// (16, 10, 'sp4_v_b_41') | |
// (16, 11, 'local_g3_4') | |
// (16, 11, 'lutff_0/in_3') | |
// (16, 11, 'sp4_v_b_28') | |
// (16, 12, 'sp4_v_b_17') | |
// (16, 13, 'local_g1_5') | |
// (16, 13, 'lutff_6/in_2') | |
// (16, 13, 'sp4_h_l_41') | |
// (16, 13, 'sp4_h_r_13') | |
// (16, 13, 'sp4_v_b_4') | |
// (17, 9, 'sp4_h_r_27') | |
// (17, 10, 'sp4_h_r_24') | |
// (17, 13, 'sp4_h_r_24') | |
// (18, 9, 'sp4_h_r_38') | |
// (18, 10, 'sp4_h_r_37') | |
// (18, 13, 'sp4_h_r_37') | |
// (19, 9, 'sp4_h_l_38') | |
// (19, 10, 'sp4_h_l_37') | |
// (19, 13, 'sp4_h_l_37') | |
wire n128; | |
// (8, 13, 'sp4_h_r_5') | |
// (9, 13, 'sp4_h_r_0') | |
// (9, 13, 'sp4_h_r_16') | |
// (10, 12, 'neigh_op_tnr_4') | |
// (10, 12, 'sp4_r_v_b_37') | |
// (10, 13, 'neigh_op_rgt_4') | |
// (10, 13, 'sp4_h_r_13') | |
// (10, 13, 'sp4_h_r_29') | |
// (10, 13, 'sp4_r_v_b_24') | |
// (10, 14, 'neigh_op_bnr_4') | |
// (10, 14, 'sp4_r_v_b_13') | |
// (10, 15, 'sp4_r_v_b_0') | |
// (11, 11, 'sp4_h_r_5') | |
// (11, 11, 'sp4_v_t_37') | |
// (11, 12, 'local_g0_4') | |
// (11, 12, 'lutff_1/in_3') | |
// (11, 12, 'neigh_op_top_4') | |
// (11, 12, 'sp4_r_v_b_36') | |
// (11, 12, 'sp4_v_b_37') | |
// (11, 13, 'lutff_4/out') | |
// (11, 13, 'sp4_h_r_24') | |
// (11, 13, 'sp4_h_r_40') | |
// (11, 13, 'sp4_h_r_8') | |
// (11, 13, 'sp4_r_v_b_25') | |
// (11, 13, 'sp4_v_b_24') | |
// (11, 14, 'neigh_op_bot_4') | |
// (11, 14, 'sp4_r_v_b_12') | |
// (11, 14, 'sp4_v_b_13') | |
// (11, 15, 'sp4_r_v_b_1') | |
// (11, 15, 'sp4_v_b_0') | |
// (12, 11, 'sp4_h_r_1') | |
// (12, 11, 'sp4_h_r_16') | |
// (12, 11, 'sp4_v_t_36') | |
// (12, 12, 'local_g2_4') | |
// (12, 12, 'lutff_4/in_0') | |
// (12, 12, 'neigh_op_tnl_4') | |
// (12, 12, 'sp4_v_b_36') | |
// (12, 13, 'local_g0_4') | |
// (12, 13, 'lutff_4/in_2') | |
// (12, 13, 'neigh_op_lft_4') | |
// (12, 13, 'sp4_h_l_40') | |
// (12, 13, 'sp4_h_r_1') | |
// (12, 13, 'sp4_h_r_21') | |
// (12, 13, 'sp4_h_r_37') | |
// (12, 13, 'sp4_v_b_25') | |
// (12, 14, 'neigh_op_bnl_4') | |
// (12, 14, 'sp4_v_b_12') | |
// (12, 15, 'sp4_v_b_1') | |
// (13, 11, 'sp4_h_r_12') | |
// (13, 11, 'sp4_h_r_29') | |
// (13, 13, 'local_g2_0') | |
// (13, 13, 'lutff_7/in_1') | |
// (13, 13, 'sp4_h_l_37') | |
// (13, 13, 'sp4_h_r_12') | |
// (13, 13, 'sp4_h_r_32') | |
// (13, 13, 'sp4_h_r_8') | |
// (14, 10, 'sp4_r_v_b_45') | |
// (14, 11, 'local_g2_0') | |
// (14, 11, 'lutff_1/in_3') | |
// (14, 11, 'sp4_h_r_25') | |
// (14, 11, 'sp4_h_r_40') | |
// (14, 11, 'sp4_r_v_b_32') | |
// (14, 12, 'sp4_r_v_b_21') | |
// (14, 13, 'local_g2_5') | |
// (14, 13, 'lutff_1/in_0') | |
// (14, 13, 'sp4_h_r_21') | |
// (14, 13, 'sp4_h_r_25') | |
// (14, 13, 'sp4_h_r_45') | |
// (14, 13, 'sp4_r_v_b_8') | |
// (15, 9, 'sp4_v_t_45') | |
// (15, 10, 'sp4_r_v_b_36') | |
// (15, 10, 'sp4_v_b_45') | |
// (15, 11, 'sp4_h_l_40') | |
// (15, 11, 'sp4_h_r_36') | |
// (15, 11, 'sp4_r_v_b_25') | |
// (15, 11, 'sp4_v_b_32') | |
// (15, 12, 'local_g1_5') | |
// (15, 12, 'lutff_1/in_3') | |
// (15, 12, 'lutff_4/in_2') | |
// (15, 12, 'sp4_r_v_b_12') | |
// (15, 12, 'sp4_v_b_21') | |
// (15, 13, 'sp4_h_l_45') | |
// (15, 13, 'sp4_h_r_32') | |
// (15, 13, 'sp4_h_r_36') | |
// (15, 13, 'sp4_r_v_b_1') | |
// (15, 13, 'sp4_v_b_8') | |
// (16, 9, 'sp4_v_t_36') | |
// (16, 10, 'sp4_v_b_36') | |
// (16, 11, 'local_g0_4') | |
// (16, 11, 'lutff_1/in_3') | |
// (16, 11, 'lutff_2/in_2') | |
// (16, 11, 'lutff_3/in_3') | |
// (16, 11, 'lutff_4/in_2') | |
// (16, 11, 'sp4_h_l_36') | |
// (16, 11, 'sp4_h_r_4') | |
// (16, 11, 'sp4_v_b_25') | |
// (16, 12, 'local_g0_4') | |
// (16, 12, 'lutff_2/in_0') | |
// (16, 12, 'sp4_v_b_12') | |
// (16, 13, 'local_g2_5') | |
// (16, 13, 'lutff_1/in_2') | |
// (16, 13, 'sp4_h_l_36') | |
// (16, 13, 'sp4_h_r_45') | |
// (16, 13, 'sp4_v_b_1') | |
// (17, 11, 'sp4_h_r_17') | |
// (17, 13, 'sp4_h_l_45') | |
// (18, 11, 'sp4_h_r_28') | |
// (19, 11, 'sp4_h_r_41') | |
// (20, 11, 'sp4_h_l_41') | |
wire n129; | |
// (8, 16, 'sp4_h_r_0') | |
// (9, 13, 'sp4_r_v_b_45') | |
// (9, 14, 'sp4_r_v_b_32') | |
// (9, 15, 'neigh_op_tnr_4') | |
// (9, 15, 'sp4_r_v_b_21') | |
// (9, 16, 'neigh_op_rgt_4') | |
// (9, 16, 'sp4_h_r_13') | |
// (9, 16, 'sp4_r_v_b_8') | |
// (9, 17, 'neigh_op_bnr_4') | |
// (10, 12, 'sp4_v_t_45') | |
// (10, 13, 'sp4_v_b_45') | |
// (10, 14, 'local_g3_0') | |
// (10, 14, 'lutff_5/in_0') | |
// (10, 14, 'sp4_v_b_32') | |
// (10, 15, 'neigh_op_top_4') | |
// (10, 15, 'sp4_r_v_b_36') | |
// (10, 15, 'sp4_v_b_21') | |
// (10, 16, 'lutff_4/out') | |
// (10, 16, 'sp4_h_r_24') | |
// (10, 16, 'sp4_r_v_b_25') | |
// (10, 16, 'sp4_v_b_8') | |
// (10, 17, 'neigh_op_bot_4') | |
// (10, 17, 'sp4_r_v_b_12') | |
// (10, 18, 'sp4_r_v_b_1') | |
// (11, 14, 'sp4_h_r_6') | |
// (11, 14, 'sp4_v_t_36') | |
// (11, 15, 'neigh_op_tnl_4') | |
// (11, 15, 'sp4_v_b_36') | |
// (11, 16, 'neigh_op_lft_4') | |
// (11, 16, 'sp4_h_r_37') | |
// (11, 16, 'sp4_v_b_25') | |
// (11, 17, 'neigh_op_bnl_4') | |
// (11, 17, 'sp4_v_b_12') | |
// (11, 18, 'sp4_v_b_1') | |
// (12, 14, 'local_g1_3') | |
// (12, 14, 'lutff_7/in_3') | |
// (12, 14, 'sp4_h_r_19') | |
// (12, 16, 'sp4_h_l_37') | |
// (12, 16, 'sp4_h_r_3') | |
// (13, 14, 'sp4_h_r_30') | |
// (13, 16, 'sp4_h_r_14') | |
// (14, 14, 'sp4_h_r_43') | |
// (14, 16, 'sp4_h_r_27') | |
// (15, 13, 'sp4_r_v_b_44') | |
// (15, 14, 'sp4_h_l_43') | |
// (15, 14, 'sp4_r_v_b_33') | |
// (15, 15, 'local_g3_4') | |
// (15, 15, 'lutff_1/in_2') | |
// (15, 15, 'sp4_r_v_b_20') | |
// (15, 16, 'sp4_h_r_38') | |
// (15, 16, 'sp4_r_v_b_9') | |
// (16, 12, 'sp4_v_t_44') | |
// (16, 13, 'sp4_v_b_44') | |
// (16, 14, 'sp4_v_b_33') | |
// (16, 15, 'sp4_v_b_20') | |
// (16, 16, 'sp4_h_l_38') | |
// (16, 16, 'sp4_v_b_9') | |
wire n130; | |
// (8, 16, 'sp4_h_r_2') | |
// (9, 15, 'neigh_op_tnr_5') | |
// (9, 16, 'neigh_op_rgt_5') | |
// (9, 16, 'sp4_h_r_15') | |
// (9, 17, 'neigh_op_bnr_5') | |
// (10, 15, 'local_g0_5') | |
// (10, 15, 'lutff_1/in_2') | |
// (10, 15, 'neigh_op_top_5') | |
// (10, 16, 'lutff_5/out') | |
// (10, 16, 'sp4_h_r_26') | |
// (10, 17, 'neigh_op_bot_5') | |
// (11, 13, 'sp4_r_v_b_45') | |
// (11, 14, 'sp4_r_v_b_32') | |
// (11, 15, 'neigh_op_tnl_5') | |
// (11, 15, 'sp4_r_v_b_21') | |
// (11, 16, 'neigh_op_lft_5') | |
// (11, 16, 'sp4_h_r_39') | |
// (11, 16, 'sp4_r_v_b_8') | |
// (11, 17, 'neigh_op_bnl_5') | |
// (12, 12, 'sp4_v_t_45') | |
// (12, 13, 'sp4_v_b_45') | |
// (12, 14, 'sp4_v_b_32') | |
// (12, 15, 'local_g0_5') | |
// (12, 15, 'lutff_6/in_1') | |
// (12, 15, 'sp4_v_b_21') | |
// (12, 16, 'sp4_h_l_39') | |
// (12, 16, 'sp4_h_r_5') | |
// (12, 16, 'sp4_v_b_8') | |
// (13, 16, 'sp4_h_r_16') | |
// (14, 16, 'sp4_h_r_29') | |
// (15, 13, 'sp4_r_v_b_40') | |
// (15, 14, 'sp4_r_v_b_29') | |
// (15, 15, 'local_g3_0') | |
// (15, 15, 'lutff_6/in_1') | |
// (15, 15, 'sp4_r_v_b_16') | |
// (15, 16, 'sp4_h_r_40') | |
// (15, 16, 'sp4_r_v_b_5') | |
// (16, 12, 'sp4_v_t_40') | |
// (16, 13, 'sp4_v_b_40') | |
// (16, 14, 'sp4_v_b_29') | |
// (16, 15, 'sp4_v_b_16') | |
// (16, 16, 'sp4_h_l_40') | |
// (16, 16, 'sp4_v_b_5') | |
wire n131; | |
// (8, 16, 'sp4_h_r_6') | |
// (9, 11, 'sp4_r_v_b_39') | |
// (9, 12, 'sp4_r_v_b_26') | |
// (9, 13, 'sp4_r_v_b_15') | |
// (9, 14, 'sp4_r_v_b_2') | |
// (9, 15, 'neigh_op_tnr_7') | |
// (9, 15, 'sp4_r_v_b_43') | |
// (9, 16, 'neigh_op_rgt_7') | |
// (9, 16, 'sp4_h_r_19') | |
// (9, 16, 'sp4_r_v_b_30') | |
// (9, 17, 'neigh_op_bnr_7') | |
// (9, 17, 'sp4_r_v_b_19') | |
// (9, 18, 'sp4_r_v_b_6') | |
// (10, 10, 'sp4_v_t_39') | |
// (10, 11, 'sp4_v_b_39') | |
// (10, 12, 'sp4_v_b_26') | |
// (10, 13, 'local_g0_7') | |
// (10, 13, 'lutff_2/in_3') | |
// (10, 13, 'sp4_v_b_15') | |
// (10, 14, 'sp4_v_b_2') | |
// (10, 14, 'sp4_v_t_43') | |
// (10, 15, 'neigh_op_top_7') | |
// (10, 15, 'sp4_v_b_43') | |
// (10, 16, 'lutff_7/out') | |
// (10, 16, 'sp4_h_r_30') | |
// (10, 16, 'sp4_v_b_30') | |
// (10, 17, 'neigh_op_bot_7') | |
// (10, 17, 'sp4_v_b_19') | |
// (10, 18, 'sp4_v_b_6') | |
// (11, 15, 'neigh_op_tnl_7') | |
// (11, 16, 'neigh_op_lft_7') | |
// (11, 16, 'sp4_h_r_43') | |
// (11, 17, 'neigh_op_bnl_7') | |
// (12, 16, 'sp4_h_l_43') | |
// (12, 16, 'sp4_h_r_9') | |
// (13, 16, 'sp4_h_r_20') | |
// (14, 16, 'sp4_h_r_33') | |
// (15, 13, 'sp4_r_v_b_38') | |
// (15, 14, 'sp4_r_v_b_27') | |
// (15, 15, 'local_g2_6') | |
// (15, 15, 'lutff_5/in_1') | |
// (15, 15, 'sp4_r_v_b_14') | |
// (15, 16, 'sp4_h_r_44') | |
// (15, 16, 'sp4_r_v_b_3') | |
// (16, 12, 'sp4_v_t_38') | |
// (16, 13, 'sp4_v_b_38') | |
// (16, 14, 'sp4_v_b_27') | |
// (16, 15, 'sp4_v_b_14') | |
// (16, 16, 'sp4_h_l_44') | |
// (16, 16, 'sp4_v_b_3') | |
reg n132 = 0; | |
// (9, 4, 'sp4_h_r_4') | |
// (10, 4, 'local_g1_1') | |
// (10, 4, 'lutff_2/in_0') | |
// (10, 4, 'sp4_h_r_17') | |
// (11, 4, 'sp4_h_r_28') | |
// (12, 4, 'sp4_h_r_41') | |
// (13, 4, 'sp4_h_l_41') | |
// (13, 4, 'sp4_h_r_1') | |
// (14, 4, 'sp4_h_r_12') | |
// (15, 4, 'sp4_h_r_25') | |
// (16, 4, 'sp4_h_r_36') | |
// (17, 4, 'sp4_h_l_36') | |
// (17, 4, 'sp4_h_r_1') | |
// (18, 4, 'sp4_h_r_12') | |
// (19, 4, 'sp4_h_r_25') | |
// (20, 4, 'sp4_h_r_36') | |
// (21, 4, 'sp4_h_l_36') | |
// (21, 4, 'sp4_h_r_10') | |
// (22, 3, 'neigh_op_tnr_1') | |
// (22, 4, 'neigh_op_rgt_1') | |
// (22, 4, 'sp4_h_r_23') | |
// (22, 5, 'neigh_op_bnr_1') | |
// (23, 3, 'neigh_op_top_1') | |
// (23, 4, 'lutff_1/out') | |
// (23, 4, 'sp4_h_r_34') | |
// (23, 5, 'neigh_op_bot_1') | |
// (24, 3, 'neigh_op_tnl_1') | |
// (24, 4, 'neigh_op_lft_1') | |
// (24, 4, 'sp4_h_r_47') | |
// (24, 5, 'neigh_op_bnl_1') | |
// (25, 4, 'sp4_h_l_47') | |
reg n133 = 0; | |
// (9, 5, 'sp4_r_v_b_47') | |
// (9, 6, 'sp4_r_v_b_34') | |
// (9, 7, 'sp4_r_v_b_23') | |
// (9, 8, 'sp4_r_v_b_10') | |
// (10, 4, 'sp4_h_r_10') | |
// (10, 4, 'sp4_v_t_47') | |
// (10, 5, 'sp4_v_b_47') | |
// (10, 6, 'sp4_v_b_34') | |
// (10, 7, 'local_g1_7') | |
// (10, 7, 'lutff_1/in_3') | |
// (10, 7, 'lutff_3/in_1') | |
// (10, 7, 'lutff_7/in_1') | |
// (10, 7, 'sp4_v_b_23') | |
// (10, 8, 'sp4_v_b_10') | |
// (11, 4, 'sp4_h_r_23') | |
// (12, 4, 'sp4_h_r_34') | |
// (13, 4, 'sp4_h_r_47') | |
// (14, 4, 'sp4_h_l_47') | |
// (14, 4, 'sp4_h_r_7') | |
// (15, 4, 'sp4_h_r_18') | |
// (16, 3, 'neigh_op_tnr_5') | |
// (16, 4, 'neigh_op_rgt_5') | |
// (16, 4, 'sp4_h_r_31') | |
// (16, 5, 'neigh_op_bnr_5') | |
// (17, 3, 'neigh_op_top_5') | |
// (17, 4, 'lutff_5/out') | |
// (17, 4, 'sp4_h_r_42') | |
// (17, 5, 'neigh_op_bot_5') | |
// (18, 3, 'neigh_op_tnl_5') | |
// (18, 4, 'neigh_op_lft_5') | |
// (18, 4, 'sp4_h_l_42') | |
// (18, 5, 'neigh_op_bnl_5') | |
reg n134 = 0; | |
// (9, 6, 'neigh_op_tnr_1') | |
// (9, 7, 'neigh_op_rgt_1') | |
// (9, 8, 'neigh_op_bnr_1') | |
// (10, 6, 'neigh_op_top_1') | |
// (10, 7, 'local_g1_1') | |
// (10, 7, 'lutff_1/out') | |
// (10, 7, 'lutff_3/in_3') | |
// (10, 7, 'lutff_7/in_3') | |
// (10, 8, 'neigh_op_bot_1') | |
// (11, 6, 'neigh_op_tnl_1') | |
// (11, 7, 'neigh_op_lft_1') | |
// (11, 8, 'neigh_op_bnl_1') | |
wire n135; | |
// (9, 7, 'lutff_1/cout') | |
// (9, 7, 'lutff_2/in_3') | |
wire n136; | |
// (9, 7, 'lutff_2/cout') | |
// (9, 7, 'lutff_3/in_3') | |
wire n137; | |
// (9, 7, 'sp4_r_v_b_36') | |
// (9, 8, 'sp4_r_v_b_25') | |
// (9, 9, 'sp4_r_v_b_12') | |
// (9, 10, 'sp4_r_v_b_1') | |
// (9, 11, 'sp4_r_v_b_36') | |
// (9, 12, 'neigh_op_tnr_6') | |
// (9, 12, 'sp4_r_v_b_25') | |
// (9, 13, 'neigh_op_rgt_6') | |
// (9, 13, 'sp4_r_v_b_12') | |
// (9, 14, 'neigh_op_bnr_6') | |
// (9, 14, 'sp4_r_v_b_1') | |
// (10, 6, 'sp4_v_t_36') | |
// (10, 7, 'sp4_v_b_36') | |
// (10, 8, 'sp4_v_b_25') | |
// (10, 9, 'sp4_v_b_12') | |
// (10, 10, 'local_g1_1') | |
// (10, 10, 'lutff_0/in_0') | |
// (10, 10, 'sp4_v_b_1') | |
// (10, 10, 'sp4_v_t_36') | |
// (10, 11, 'sp4_v_b_36') | |
// (10, 12, 'neigh_op_top_6') | |
// (10, 12, 'sp4_v_b_25') | |
// (10, 13, 'lutff_6/out') | |
// (10, 13, 'sp4_v_b_12') | |
// (10, 14, 'neigh_op_bot_6') | |
// (10, 14, 'sp4_v_b_1') | |
// (11, 12, 'local_g3_6') | |
// (11, 12, 'lutff_3/in_2') | |
// (11, 12, 'neigh_op_tnl_6') | |
// (11, 13, 'neigh_op_lft_6') | |
// (11, 14, 'neigh_op_bnl_6') | |
reg n138 = 0; | |
// (9, 9, 'neigh_op_tnr_0') | |
// (9, 10, 'neigh_op_rgt_0') | |
// (9, 11, 'neigh_op_bnr_0') | |
// (10, 9, 'neigh_op_top_0') | |
// (10, 10, 'local_g2_0') | |
// (10, 10, 'lutff_0/out') | |
// (10, 10, 'lutff_7/in_3') | |
// (10, 11, 'neigh_op_bot_0') | |
// (11, 9, 'neigh_op_tnl_0') | |
// (11, 10, 'neigh_op_lft_0') | |
// (11, 11, 'neigh_op_bnl_0') | |
wire n139; | |
// (9, 9, 'neigh_op_tnr_4') | |
// (9, 10, 'neigh_op_rgt_4') | |
// (9, 11, 'neigh_op_bnr_4') | |
// (10, 9, 'neigh_op_top_4') | |
// (10, 10, 'local_g3_4') | |
// (10, 10, 'lutff_0/in_3') | |
// (10, 10, 'lutff_4/out') | |
// (10, 11, 'neigh_op_bot_4') | |
// (11, 9, 'neigh_op_tnl_4') | |
// (11, 10, 'neigh_op_lft_4') | |
// (11, 11, 'neigh_op_bnl_4') | |
reg n140 = 0; | |
// (9, 9, 'sp4_h_r_7') | |
// (10, 9, 'local_g1_2') | |
// (10, 9, 'lutff_5/in_2') | |
// (10, 9, 'sp4_h_r_18') | |
// (11, 2, 'neigh_op_tnr_1') | |
// (11, 3, 'neigh_op_rgt_1') | |
// (11, 4, 'neigh_op_bnr_1') | |
// (11, 9, 'sp4_h_r_31') | |
// (12, 2, 'neigh_op_top_1') | |
// (12, 2, 'sp4_r_v_b_46') | |
// (12, 3, 'lutff_1/out') | |
// (12, 3, 'sp4_r_v_b_35') | |
// (12, 4, 'neigh_op_bot_1') | |
// (12, 4, 'sp4_r_v_b_22') | |
// (12, 5, 'sp4_r_v_b_11') | |
// (12, 6, 'sp4_r_v_b_42') | |
// (12, 7, 'sp4_r_v_b_31') | |
// (12, 8, 'sp4_r_v_b_18') | |
// (12, 9, 'sp4_h_r_42') | |
// (12, 9, 'sp4_r_v_b_7') | |
// (13, 1, 'sp4_v_t_46') | |
// (13, 2, 'neigh_op_tnl_1') | |
// (13, 2, 'sp4_v_b_46') | |
// (13, 3, 'neigh_op_lft_1') | |
// (13, 3, 'sp4_v_b_35') | |
// (13, 4, 'neigh_op_bnl_1') | |
// (13, 4, 'sp4_v_b_22') | |
// (13, 5, 'sp4_v_b_11') | |
// (13, 5, 'sp4_v_t_42') | |
// (13, 6, 'sp4_v_b_42') | |
// (13, 7, 'sp4_v_b_31') | |
// (13, 8, 'sp4_v_b_18') | |
// (13, 9, 'sp4_h_l_42') | |
// (13, 9, 'sp4_v_b_7') | |
wire n141; | |
// (9, 10, 'neigh_op_tnr_2') | |
// (9, 11, 'neigh_op_rgt_2') | |
// (9, 12, 'neigh_op_bnr_2') | |
// (10, 10, 'local_g1_2') | |
// (10, 10, 'lutff_0/in_1') | |
// (10, 10, 'neigh_op_top_2') | |
// (10, 11, 'lutff_2/out') | |
// (10, 12, 'neigh_op_bot_2') | |
// (11, 10, 'neigh_op_tnl_2') | |
// (11, 11, 'neigh_op_lft_2') | |
// (11, 12, 'neigh_op_bnl_2') | |
wire n142; | |
// (9, 10, 'neigh_op_tnr_3') | |
// (9, 11, 'neigh_op_rgt_3') | |
// (9, 12, 'neigh_op_bnr_3') | |
// (10, 10, 'neigh_op_top_3') | |
// (10, 11, 'local_g0_3') | |
// (10, 11, 'lutff_3/out') | |
// (10, 11, 'lutff_5/in_2') | |
// (10, 12, 'neigh_op_bot_3') | |
// (11, 10, 'neigh_op_tnl_3') | |
// (11, 11, 'neigh_op_lft_3') | |
// (11, 12, 'neigh_op_bnl_3') | |
wire n143; | |
// (9, 10, 'neigh_op_tnr_4') | |
// (9, 11, 'neigh_op_rgt_4') | |
// (9, 12, 'neigh_op_bnr_4') | |
// (10, 10, 'neigh_op_top_4') | |
// (10, 11, 'local_g1_4') | |
// (10, 11, 'lutff_4/out') | |
// (10, 11, 'lutff_6/in_3') | |
// (10, 12, 'neigh_op_bot_4') | |
// (11, 10, 'neigh_op_tnl_4') | |
// (11, 11, 'local_g1_4') | |
// (11, 11, 'lutff_2/in_1') | |
// (11, 11, 'neigh_op_lft_4') | |
// (11, 12, 'neigh_op_bnl_4') | |
reg n144 = 0; | |
// (9, 10, 'neigh_op_tnr_6') | |
// (9, 11, 'neigh_op_rgt_6') | |
// (9, 11, 'sp4_h_r_1') | |
// (9, 11, 'sp4_r_v_b_44') | |
// (9, 12, 'neigh_op_bnr_6') | |
// (9, 12, 'sp4_r_v_b_33') | |
// (9, 13, 'sp4_r_v_b_20') | |
// (9, 14, 'sp4_r_v_b_9') | |
// (10, 10, 'local_g0_6') | |
// (10, 10, 'lutff_7/in_1') | |
// (10, 10, 'neigh_op_top_6') | |
// (10, 10, 'sp4_h_r_9') | |
// (10, 10, 'sp4_r_v_b_40') | |
// (10, 10, 'sp4_v_t_44') | |
// (10, 11, 'lutff_6/out') | |
// (10, 11, 'sp4_h_r_12') | |
// (10, 11, 'sp4_r_v_b_29') | |
// (10, 11, 'sp4_v_b_44') | |
// (10, 12, 'neigh_op_bot_6') | |
// (10, 12, 'sp4_r_v_b_16') | |
// (10, 12, 'sp4_v_b_33') | |
// (10, 13, 'sp4_r_v_b_5') | |
// (10, 13, 'sp4_v_b_20') | |
// (10, 14, 'sp4_v_b_9') | |
// (11, 9, 'sp4_v_t_40') | |
// (11, 10, 'neigh_op_tnl_6') | |
// (11, 10, 'sp4_h_r_20') | |
// (11, 10, 'sp4_v_b_40') | |
// (11, 11, 'local_g1_6') | |
// (11, 11, 'lutff_0/in_3') | |
// (11, 11, 'neigh_op_lft_6') | |
// (11, 11, 'sp4_h_r_25') | |
// (11, 11, 'sp4_v_b_29') | |
// (11, 12, 'local_g2_6') | |
// (11, 12, 'lutff_5/in_3') | |
// (11, 12, 'neigh_op_bnl_6') | |
// (11, 12, 'sp4_v_b_16') | |
// (11, 13, 'sp4_h_r_11') | |
// (11, 13, 'sp4_v_b_5') | |
// (12, 10, 'sp4_h_r_33') | |
// (12, 11, 'sp4_h_r_36') | |
// (12, 13, 'sp4_h_r_22') | |
// (13, 10, 'sp4_h_r_44') | |
// (13, 11, 'sp4_h_l_36') | |
// (13, 11, 'sp4_h_r_1') | |
// (13, 13, 'local_g3_3') | |
// (13, 13, 'lutff_0/in_2') | |
// (13, 13, 'lutff_2/in_2') | |
// (13, 13, 'sp4_h_r_35') | |
// (14, 10, 'sp4_h_l_44') | |
// (14, 10, 'sp4_h_r_0') | |
// (14, 10, 'sp4_h_r_9') | |
// (14, 10, 'sp4_r_v_b_40') | |
// (14, 11, 'sp4_h_r_12') | |
// (14, 11, 'sp4_r_v_b_29') | |
// (14, 12, 'sp4_r_v_b_16') | |
// (14, 13, 'sp4_h_r_46') | |
// (14, 13, 'sp4_r_v_b_5') | |
// (15, 9, 'sp4_v_t_40') | |
// (15, 10, 'local_g0_4') | |
// (15, 10, 'local_g0_5') | |
// (15, 10, 'lutff_2/in_0') | |
// (15, 10, 'lutff_6/in_3') | |
// (15, 10, 'sp4_h_r_13') | |
// (15, 10, 'sp4_h_r_20') | |
// (15, 10, 'sp4_v_b_40') | |
// (15, 11, 'local_g2_1') | |
// (15, 11, 'lutff_4/in_1') | |
// (15, 11, 'sp4_h_r_25') | |
// (15, 11, 'sp4_v_b_29') | |
// (15, 12, 'local_g0_0') | |
// (15, 12, 'lutff_6/in_0') | |
// (15, 12, 'sp4_v_b_16') | |
// (15, 13, 'local_g1_7') | |
// (15, 13, 'lutff_5/in_3') | |
// (15, 13, 'lutff_6/in_0') | |
// (15, 13, 'sp4_h_l_46') | |
// (15, 13, 'sp4_h_r_11') | |
// (15, 13, 'sp4_h_r_7') | |
// (15, 13, 'sp4_v_b_5') | |
// (16, 8, 'sp4_r_v_b_42') | |
// (16, 9, 'sp4_r_v_b_31') | |
// (16, 10, 'local_g3_2') | |
// (16, 10, 'lutff_0/in_1') | |
// (16, 10, 'sp4_h_r_24') | |
// (16, 10, 'sp4_h_r_33') | |
// (16, 10, 'sp4_r_v_b_18') | |
// (16, 11, 'sp4_h_r_36') | |
// (16, 11, 'sp4_r_v_b_7') | |
// (16, 12, 'local_g2_4') | |
// (16, 12, 'lutff_3/in_3') | |
// (16, 12, 'sp4_r_v_b_36') | |
// (16, 12, 'sp4_r_v_b_43') | |
// (16, 13, 'sp4_h_r_18') | |
// (16, 13, 'sp4_h_r_22') | |
// (16, 13, 'sp4_r_v_b_25') | |
// (16, 13, 'sp4_r_v_b_30') | |
// (16, 14, 'sp4_r_v_b_12') | |
// (16, 14, 'sp4_r_v_b_19') | |
// (16, 15, 'sp4_r_v_b_1') | |
// (16, 15, 'sp4_r_v_b_6') | |
// (17, 7, 'sp4_v_t_42') | |
// (17, 8, 'sp4_v_b_42') | |
// (17, 9, 'sp4_v_b_31') | |
// (17, 10, 'local_g1_2') | |
// (17, 10, 'lutff_2/in_1') | |
// (17, 10, 'sp4_h_r_37') | |
// (17, 10, 'sp4_h_r_44') | |
// (17, 10, 'sp4_v_b_18') | |
// (17, 11, 'local_g0_4') | |
// (17, 11, 'lutff_1/in_1') | |
// (17, 11, 'lutff_3/in_3') | |
// (17, 11, 'lutff_7/in_3') | |
// (17, 11, 'sp4_h_l_36') | |
// (17, 11, 'sp4_h_r_4') | |
// (17, 11, 'sp4_v_b_7') | |
// (17, 11, 'sp4_v_t_36') | |
// (17, 11, 'sp4_v_t_43') | |
// (17, 12, 'local_g2_3') | |
// (17, 12, 'lutff_2/in_1') | |
// (17, 12, 'sp4_v_b_36') | |
// (17, 12, 'sp4_v_b_43') | |
// (17, 13, 'sp4_h_r_31') | |
// (17, 13, 'sp4_h_r_35') | |
// (17, 13, 'sp4_v_b_25') | |
// (17, 13, 'sp4_v_b_30') | |
// (17, 14, 'sp4_v_b_12') | |
// (17, 14, 'sp4_v_b_19') | |
// (17, 15, 'sp4_v_b_1') | |
// (17, 15, 'sp4_v_b_6') | |
// (18, 10, 'sp4_h_l_37') | |
// (18, 10, 'sp4_h_l_44') | |
// (18, 10, 'sp4_r_v_b_40') | |
// (18, 11, 'local_g1_1') | |
// (18, 11, 'lutff_1/in_1') | |
// (18, 11, 'sp4_h_r_17') | |
// (18, 11, 'sp4_r_v_b_29') | |
// (18, 12, 'local_g3_0') | |
// (18, 12, 'lutff_3/in_2') | |
// (18, 12, 'sp4_r_v_b_16') | |
// (18, 13, 'sp4_h_r_42') | |
// (18, 13, 'sp4_h_r_46') | |
// (18, 13, 'sp4_r_v_b_5') | |
// (19, 9, 'sp4_v_t_40') | |
// (19, 10, 'sp4_v_b_40') | |
// (19, 11, 'sp4_h_r_28') | |
// (19, 11, 'sp4_v_b_29') | |
// (19, 12, 'sp4_v_b_16') | |
// (19, 13, 'sp4_h_l_42') | |
// (19, 13, 'sp4_h_l_46') | |
// (19, 13, 'sp4_v_b_5') | |
// (20, 11, 'sp4_h_r_41') | |
// (21, 11, 'sp4_h_l_41') | |
wire n145; | |
// (9, 10, 'sp4_h_r_0') | |
// (10, 10, 'sp4_h_r_13') | |
// (11, 10, 'local_g2_0') | |
// (11, 10, 'lutff_3/in_1') | |
// (11, 10, 'lutff_6/in_2') | |
// (11, 10, 'sp4_h_r_24') | |
// (11, 11, 'sp4_r_v_b_44') | |
// (11, 12, 'sp4_r_v_b_33') | |
// (11, 13, 'sp4_r_v_b_20') | |
// (11, 14, 'sp4_r_v_b_9') | |
// (12, 10, 'local_g1_1') | |
// (12, 10, 'lutff_4/in_2') | |
// (12, 10, 'sp4_h_r_37') | |
// (12, 10, 'sp4_h_r_9') | |
// (12, 10, 'sp4_v_t_44') | |
// (12, 11, 'sp4_v_b_44') | |
// (12, 12, 'sp4_v_b_33') | |
// (12, 13, 'local_g1_4') | |
// (12, 13, 'lutff_3/in_2') | |
// (12, 13, 'sp4_v_b_20') | |
// (12, 14, 'local_g1_1') | |
// (12, 14, 'lutff_7/in_1') | |
// (12, 14, 'sp4_v_b_9') | |
// (13, 10, 'sp4_h_l_37') | |
// (13, 10, 'sp4_h_r_20') | |
// (13, 10, 'sp4_h_r_4') | |
// (14, 9, 'neigh_op_tnr_6') | |
// (14, 10, 'neigh_op_rgt_6') | |
// (14, 10, 'sp4_h_r_17') | |
// (14, 10, 'sp4_h_r_33') | |
// (14, 11, 'neigh_op_bnr_6') | |
// (15, 4, 'sp12_v_t_23') | |
// (15, 5, 'sp12_v_b_23') | |
// (15, 6, 'sp12_v_b_20') | |
// (15, 7, 'sp12_v_b_19') | |
// (15, 8, 'sp12_v_b_16') | |
// (15, 9, 'neigh_op_top_6') | |
// (15, 9, 'sp12_v_b_15') | |
// (15, 10, 'local_g1_6') | |
// (15, 10, 'lutff_3/in_2') | |
// (15, 10, 'lutff_6/out') | |
// (15, 10, 'sp12_v_b_12') | |
// (15, 10, 'sp4_h_r_28') | |
// (15, 10, 'sp4_h_r_44') | |
// (15, 10, 'sp4_r_v_b_45') | |
// (15, 11, 'neigh_op_bot_6') | |
// (15, 11, 'sp12_v_b_11') | |
// (15, 11, 'sp4_r_v_b_32') | |
// (15, 12, 'sp12_v_b_8') | |
// (15, 12, 'sp4_r_v_b_21') | |
// (15, 13, 'local_g2_0') | |
// (15, 13, 'lutff_4/in_2') | |
// (15, 13, 'sp12_v_b_7') | |
// (15, 13, 'sp4_r_v_b_8') | |
// (15, 14, 'sp12_v_b_4') | |
// (15, 15, 'local_g3_3') | |
// (15, 15, 'lutff_1/in_1') | |
// (15, 15, 'sp12_v_b_3') | |
// (15, 16, 'sp12_v_b_0') | |
// (16, 9, 'neigh_op_tnl_6') | |
// (16, 9, 'sp4_v_t_45') | |
// (16, 10, 'neigh_op_lft_6') | |
// (16, 10, 'sp4_h_l_44') | |
// (16, 10, 'sp4_h_r_41') | |
// (16, 10, 'sp4_v_b_45') | |
// (16, 11, 'neigh_op_bnl_6') | |
// (16, 11, 'sp4_v_b_32') | |
// (16, 12, 'sp4_v_b_21') | |
// (16, 13, 'sp4_v_b_8') | |
// (17, 10, 'sp4_h_l_41') | |
wire n146; | |
// (9, 10, 'sp4_h_r_7') | |
// (10, 10, 'local_g0_2') | |
// (10, 10, 'lutff_0/in_2') | |
// (10, 10, 'sp4_h_r_18') | |
// (11, 8, 'neigh_op_tnr_7') | |
// (11, 9, 'neigh_op_rgt_7') | |
// (11, 10, 'neigh_op_bnr_7') | |
// (11, 10, 'sp4_h_r_31') | |
// (12, 7, 'sp4_r_v_b_39') | |
// (12, 8, 'neigh_op_top_7') | |
// (12, 8, 'sp4_r_v_b_26') | |
// (12, 9, 'lutff_7/out') | |
// (12, 9, 'sp4_r_v_b_15') | |
// (12, 10, 'neigh_op_bot_7') | |
// (12, 10, 'sp4_h_r_42') | |
// (12, 10, 'sp4_r_v_b_2') | |
// (13, 6, 'sp4_v_t_39') | |
// (13, 7, 'sp4_v_b_39') | |
// (13, 8, 'neigh_op_tnl_7') | |
// (13, 8, 'sp4_v_b_26') | |
// (13, 9, 'neigh_op_lft_7') | |
// (13, 9, 'sp4_v_b_15') | |
// (13, 10, 'neigh_op_bnl_7') | |
// (13, 10, 'sp4_h_l_42') | |
// (13, 10, 'sp4_v_b_2') | |
wire n147; | |
// (9, 10, 'sp4_r_v_b_36') | |
// (9, 11, 'neigh_op_tnr_6') | |
// (9, 11, 'sp4_r_v_b_25') | |
// (9, 12, 'neigh_op_rgt_6') | |
// (9, 12, 'sp4_h_r_1') | |
// (9, 12, 'sp4_r_v_b_12') | |
// (9, 12, 'sp4_r_v_b_44') | |
// (9, 13, 'neigh_op_bnr_6') | |
// (9, 13, 'sp4_r_v_b_1') | |
// (9, 13, 'sp4_r_v_b_33') | |
// (9, 14, 'sp4_r_v_b_20') | |
// (9, 15, 'sp4_r_v_b_9') | |
// (10, 9, 'sp4_v_t_36') | |
// (10, 10, 'local_g2_4') | |
// (10, 10, 'lutff_4/in_2') | |
// (10, 10, 'sp4_r_v_b_37') | |
// (10, 10, 'sp4_v_b_36') | |
// (10, 11, 'local_g0_6') | |
// (10, 11, 'lutff_3/in_1') | |
// (10, 11, 'neigh_op_top_6') | |
// (10, 11, 'sp4_h_r_2') | |
// (10, 11, 'sp4_r_v_b_24') | |
// (10, 11, 'sp4_r_v_b_40') | |
// (10, 11, 'sp4_v_b_25') | |
// (10, 11, 'sp4_v_t_44') | |
// (10, 12, 'lutff_6/out') | |
// (10, 12, 'sp4_h_r_12') | |
// (10, 12, 'sp4_r_v_b_13') | |
// (10, 12, 'sp4_r_v_b_29') | |
// (10, 12, 'sp4_v_b_12') | |
// (10, 12, 'sp4_v_b_44') | |
// (10, 13, 'neigh_op_bot_6') | |
// (10, 13, 'sp4_r_v_b_0') | |
// (10, 13, 'sp4_r_v_b_16') | |
// (10, 13, 'sp4_v_b_1') | |
// (10, 13, 'sp4_v_b_33') | |
// (10, 14, 'sp4_r_v_b_5') | |
// (10, 14, 'sp4_v_b_20') | |
// (10, 15, 'sp4_v_b_9') | |
// (11, 9, 'sp4_v_t_37') | |
// (11, 10, 'local_g2_5') | |
// (11, 10, 'local_g3_5') | |
// (11, 10, 'lutff_0/in_0') | |
// (11, 10, 'lutff_1/in_2') | |
// (11, 10, 'lutff_5/in_3') | |
// (11, 10, 'lutff_7/in_3') | |
// (11, 10, 'sp4_h_r_5') | |
// (11, 10, 'sp4_v_b_37') | |
// (11, 10, 'sp4_v_t_40') | |
// (11, 11, 'local_g2_6') | |
// (11, 11, 'lutff_1/in_3') | |
// (11, 11, 'lutff_3/in_1') | |
// (11, 11, 'lutff_5/in_3') | |
// (11, 11, 'neigh_op_tnl_6') | |
// (11, 11, 'sp4_h_r_15') | |
// (11, 11, 'sp4_v_b_24') | |
// (11, 11, 'sp4_v_b_40') | |
// (11, 12, 'neigh_op_lft_6') | |
// (11, 12, 'sp4_h_r_25') | |
// (11, 12, 'sp4_v_b_13') | |
// (11, 12, 'sp4_v_b_29') | |
// (11, 13, 'neigh_op_bnl_6') | |
// (11, 13, 'sp4_v_b_0') | |
// (11, 13, 'sp4_v_b_16') | |
// (11, 14, 'sp4_v_b_5') | |
// (12, 9, 'sp4_r_v_b_36') | |
// (12, 10, 'sp4_h_r_16') | |
// (12, 10, 'sp4_r_v_b_25') | |
// (12, 11, 'sp4_h_r_26') | |
// (12, 11, 'sp4_r_v_b_12') | |
// (12, 12, 'local_g3_4') | |
// (12, 12, 'lutff_1/in_0') | |
// (12, 12, 'lutff_6/in_3') | |
// (12, 12, 'sp4_h_r_36') | |
// (12, 12, 'sp4_r_v_b_1') | |
// (13, 8, 'sp4_v_t_36') | |
// (13, 9, 'sp4_v_b_36') | |
// (13, 10, 'sp4_h_r_29') | |
// (13, 10, 'sp4_v_b_25') | |
// (13, 11, 'sp4_h_r_39') | |
// (13, 11, 'sp4_v_b_12') | |
// (13, 12, 'local_g1_1') | |
// (13, 12, 'lutff_3/in_3') | |
// (13, 12, 'sp4_h_l_36') | |
// (13, 12, 'sp4_v_b_1') | |
// (14, 10, 'local_g3_0') | |
// (14, 10, 'lutff_4/in_1') | |
// (14, 10, 'lutff_7/in_0') | |
// (14, 10, 'sp4_h_r_40') | |
// (14, 11, 'local_g1_2') | |
// (14, 11, 'lutff_0/in_3') | |
// (14, 11, 'lutff_3/in_0') | |
// (14, 11, 'sp4_h_l_39') | |
// (14, 11, 'sp4_h_r_10') | |
// (15, 10, 'sp4_h_l_40') | |
// (15, 11, 'sp4_h_r_23') | |
// (16, 11, 'sp4_h_r_34') | |
// (17, 11, 'sp4_h_r_47') | |
// (18, 11, 'sp4_h_l_47') | |
wire n148; | |
// (9, 10, 'sp4_r_v_b_46') | |
// (9, 11, 'neigh_op_tnr_3') | |
// (9, 11, 'sp4_r_v_b_35') | |
// (9, 12, 'neigh_op_rgt_3') | |
// (9, 12, 'sp4_h_r_11') | |
// (9, 12, 'sp4_r_v_b_22') | |
// (9, 13, 'neigh_op_bnr_3') | |
// (9, 13, 'sp4_r_v_b_11') | |
// (10, 9, 'sp4_h_r_11') | |
// (10, 9, 'sp4_r_v_b_42') | |
// (10, 9, 'sp4_v_t_46') | |
// (10, 10, 'sp4_r_v_b_31') | |
// (10, 10, 'sp4_v_b_46') | |
// (10, 11, 'neigh_op_top_3') | |
// (10, 11, 'sp4_r_v_b_18') | |
// (10, 11, 'sp4_v_b_35') | |
// (10, 12, 'lutff_3/out') | |
// (10, 12, 'sp4_h_r_22') | |
// (10, 12, 'sp4_h_r_6') | |
// (10, 12, 'sp4_r_v_b_39') | |
// (10, 12, 'sp4_r_v_b_7') | |
// (10, 12, 'sp4_v_b_22') | |
// (10, 13, 'neigh_op_bot_3') | |
// (10, 13, 'sp4_h_r_11') | |
// (10, 13, 'sp4_r_v_b_26') | |
// (10, 13, 'sp4_v_b_11') | |
// (10, 14, 'sp4_r_v_b_15') | |
// (10, 15, 'sp4_r_v_b_2') | |
// (11, 8, 'sp4_v_t_42') | |
// (11, 9, 'local_g3_2') | |
// (11, 9, 'lutff_4/in_1') | |
// (11, 9, 'sp4_h_r_22') | |
// (11, 9, 'sp4_v_b_42') | |
// (11, 10, 'local_g2_7') | |
// (11, 10, 'lutff_6/in_1') | |
// (11, 10, 'sp4_v_b_31') | |
// (11, 11, 'neigh_op_tnl_3') | |
// (11, 11, 'sp4_h_r_2') | |
// (11, 11, 'sp4_v_b_18') | |
// (11, 11, 'sp4_v_t_39') | |
// (11, 12, 'neigh_op_lft_3') | |
// (11, 12, 'sp4_h_r_19') | |
// (11, 12, 'sp4_h_r_35') | |
// (11, 12, 'sp4_v_b_39') | |
// (11, 12, 'sp4_v_b_7') | |
// (11, 13, 'neigh_op_bnl_3') | |
// (11, 13, 'sp4_h_r_22') | |
// (11, 13, 'sp4_v_b_26') | |
// (11, 14, 'sp4_v_b_15') | |
// (11, 15, 'sp4_v_b_2') | |
// (12, 9, 'local_g3_3') | |
// (12, 9, 'lutff_6/in_0') | |
// (12, 9, 'sp4_h_r_35') | |
// (12, 9, 'sp4_r_v_b_40') | |
// (12, 10, 'sp4_r_v_b_29') | |
// (12, 11, 'sp4_h_r_15') | |
// (12, 11, 'sp4_r_v_b_16') | |
// (12, 12, 'local_g2_6') | |
// (12, 12, 'lutff_7/in_3') | |
// (12, 12, 'sp4_h_r_30') | |
// (12, 12, 'sp4_h_r_46') | |
// (12, 12, 'sp4_r_v_b_5') | |
// (12, 13, 'local_g3_3') | |
// (12, 13, 'lutff_5/in_1') | |
// (12, 13, 'sp4_h_r_35') | |
// (13, 8, 'sp4_v_t_40') | |
// (13, 9, 'local_g3_0') | |
// (13, 9, 'lutff_4/in_1') | |
// (13, 9, 'sp4_h_r_46') | |
// (13, 9, 'sp4_r_v_b_37') | |
// (13, 9, 'sp4_v_b_40') | |
// (13, 10, 'sp4_r_v_b_24') | |
// (13, 10, 'sp4_v_b_29') | |
// (13, 11, 'sp4_h_r_26') | |
// (13, 11, 'sp4_r_v_b_13') | |
// (13, 11, 'sp4_v_b_16') | |
// (13, 12, 'local_g3_3') | |
// (13, 12, 'lutff_6/in_0') | |
// (13, 12, 'sp4_h_l_46') | |
// (13, 12, 'sp4_h_r_43') | |
// (13, 12, 'sp4_r_v_b_0') | |
// (13, 12, 'sp4_v_b_5') | |
// (13, 13, 'sp4_h_r_46') | |
// (14, 8, 'sp4_r_v_b_45') | |
// (14, 8, 'sp4_v_t_37') | |
// (14, 9, 'local_g3_5') | |
// (14, 9, 'lutff_6/in_0') | |
// (14, 9, 'sp4_h_l_46') | |
// (14, 9, 'sp4_h_r_11') | |
// (14, 9, 'sp4_r_v_b_32') | |
// (14, 9, 'sp4_v_b_37') | |
// (14, 10, 'sp4_r_v_b_21') | |
// (14, 10, 'sp4_v_b_24') | |
// (14, 11, 'sp4_h_r_39') | |
// (14, 11, 'sp4_r_v_b_8') | |
// (14, 11, 'sp4_v_b_13') | |
// (14, 12, 'local_g0_1') | |
// (14, 12, 'lutff_1/in_2') | |
// (14, 12, 'lutff_3/in_2') | |
// (14, 12, 'sp4_h_l_43') | |
// (14, 12, 'sp4_h_r_9') | |
// (14, 12, 'sp4_v_b_0') | |
// (14, 13, 'sp4_h_l_46') | |
// (14, 13, 'sp4_h_r_7') | |
// (15, 7, 'sp4_v_t_45') | |
// (15, 8, 'sp4_v_b_45') | |
// (15, 9, 'local_g0_6') | |
// (15, 9, 'lutff_0/in_2') | |
// (15, 9, 'sp4_h_r_22') | |
// (15, 9, 'sp4_v_b_32') | |
// (15, 10, 'local_g1_5') | |
// (15, 10, 'lutff_7/in_1') | |
// (15, 10, 'sp4_v_b_21') | |
// (15, 11, 'local_g1_5') | |
// (15, 11, 'lutff_2/in_0') | |
// (15, 11, 'lutff_7/in_1') | |
// (15, 11, 'sp4_h_l_39') | |
// (15, 11, 'sp4_h_r_5') | |
// (15, 11, 'sp4_v_b_8') | |
// (15, 12, 'local_g1_4') | |
// (15, 12, 'lutff_5/in_2') | |
// (15, 12, 'sp4_h_r_20') | |
// (15, 13, 'local_g1_2') | |
// (15, 13, 'lutff_2/in_3') | |
// (15, 13, 'sp4_h_r_18') | |
// (16, 9, 'sp4_h_r_35') | |
// (16, 11, 'sp4_h_r_16') | |
// (16, 12, 'sp4_h_r_33') | |
// (16, 13, 'sp4_h_r_31') | |
// (17, 9, 'sp4_h_r_46') | |
// (17, 11, 'sp4_h_r_29') | |
// (17, 12, 'sp4_h_r_44') | |
// (17, 13, 'sp4_h_r_42') | |
// (18, 9, 'sp4_h_l_46') | |
// (18, 11, 'sp4_h_r_40') | |
// (18, 12, 'sp4_h_l_44') | |
// (18, 13, 'sp4_h_l_42') | |
// (19, 11, 'sp4_h_l_40') | |
wire n149; | |
// (9, 11, 'neigh_op_tnr_0') | |
// (9, 12, 'neigh_op_rgt_0') | |
// (9, 13, 'neigh_op_bnr_0') | |
// (10, 11, 'neigh_op_top_0') | |
// (10, 12, 'local_g0_0') | |
// (10, 12, 'lutff_0/out') | |
// (10, 12, 'lutff_1/in_1') | |
// (10, 12, 'lutff_2/in_0') | |
// (10, 12, 'lutff_3/in_1') | |
// (10, 12, 'lutff_4/in_2') | |
// (10, 13, 'local_g1_0') | |
// (10, 13, 'lutff_1/in_0') | |
// (10, 13, 'neigh_op_bot_0') | |
// (11, 11, 'neigh_op_tnl_0') | |
// (11, 12, 'local_g0_0') | |
// (11, 12, 'lutff_7/in_1') | |
// (11, 12, 'neigh_op_lft_0') | |
// (11, 13, 'local_g3_0') | |
// (11, 13, 'lutff_2/in_1') | |
// (11, 13, 'lutff_6/in_1') | |
// (11, 13, 'lutff_7/in_0') | |
// (11, 13, 'neigh_op_bnl_0') | |
wire n150; | |
// (9, 11, 'neigh_op_tnr_1') | |
// (9, 12, 'neigh_op_rgt_1') | |
// (9, 13, 'neigh_op_bnr_1') | |
// (10, 10, 'sp4_r_v_b_43') | |
// (10, 11, 'neigh_op_top_1') | |
// (10, 11, 'sp4_r_v_b_30') | |
// (10, 12, 'lutff_1/out') | |
// (10, 12, 'sp4_h_r_2') | |
// (10, 12, 'sp4_r_v_b_19') | |
// (10, 13, 'neigh_op_bot_1') | |
// (10, 13, 'sp4_r_v_b_6') | |
// (11, 9, 'sp4_v_t_43') | |
// (11, 10, 'sp4_v_b_43') | |
// (11, 11, 'local_g3_1') | |
// (11, 11, 'lutff_2/in_2') | |
// (11, 11, 'neigh_op_tnl_1') | |
// (11, 11, 'sp4_v_b_30') | |
// (11, 12, 'neigh_op_lft_1') | |
// (11, 12, 'sp4_h_r_15') | |
// (11, 12, 'sp4_v_b_19') | |
// (11, 13, 'neigh_op_bnl_1') | |
// (11, 13, 'sp4_h_r_0') | |
// (11, 13, 'sp4_v_b_6') | |
// (12, 12, 'sp4_h_r_26') | |
// (12, 13, 'sp4_h_r_13') | |
// (13, 9, 'sp4_r_v_b_45') | |
// (13, 10, 'sp4_r_v_b_32') | |
// (13, 11, 'sp4_r_v_b_21') | |
// (13, 12, 'local_g3_7') | |
// (13, 12, 'lutff_4/in_0') | |
// (13, 12, 'sp4_h_r_39') | |
// (13, 12, 'sp4_r_v_b_8') | |
// (13, 13, 'sp4_h_r_24') | |
// (14, 8, 'sp4_v_t_45') | |
// (14, 9, 'sp4_v_b_45') | |
// (14, 10, 'sp4_v_b_32') | |
// (14, 11, 'local_g0_5') | |
// (14, 11, 'lutff_5/in_0') | |
// (14, 11, 'sp4_v_b_21') | |
// (14, 12, 'local_g1_5') | |
// (14, 12, 'lutff_5/in_1') | |
// (14, 12, 'lutff_6/in_0') | |
// (14, 12, 'sp4_h_l_39') | |
// (14, 12, 'sp4_h_r_5') | |
// (14, 12, 'sp4_v_b_8') | |
// (14, 13, 'local_g3_5') | |
// (14, 13, 'lutff_2/in_0') | |
// (14, 13, 'sp4_h_r_37') | |
// (15, 12, 'sp4_h_r_16') | |
// (15, 13, 'sp4_h_l_37') | |
// (16, 12, 'sp4_h_r_29') | |
// (17, 12, 'sp4_h_r_40') | |
// (18, 12, 'sp4_h_l_40') | |
wire n151; | |
// (9, 11, 'neigh_op_tnr_2') | |
// (9, 12, 'neigh_op_rgt_2') | |
// (9, 13, 'neigh_op_bnr_2') | |
// (10, 11, 'neigh_op_top_2') | |
// (10, 12, 'local_g3_2') | |
// (10, 12, 'lutff_2/out') | |
// (10, 12, 'lutff_6/in_1') | |
// (10, 12, 'lutff_7/in_2') | |
// (10, 13, 'neigh_op_bot_2') | |
// (11, 11, 'neigh_op_tnl_2') | |
// (11, 12, 'neigh_op_lft_2') | |
// (11, 13, 'neigh_op_bnl_2') | |
wire n152; | |
// (9, 11, 'sp4_h_r_4') | |
// (10, 10, 'neigh_op_tnr_6') | |
// (10, 11, 'neigh_op_rgt_6') | |
// (10, 11, 'sp4_h_r_17') | |
// (10, 12, 'neigh_op_bnr_6') | |
// (11, 10, 'neigh_op_top_6') | |
// (11, 11, 'lutff_6/out') | |
// (11, 11, 'sp4_h_r_28') | |
// (11, 12, 'neigh_op_bot_6') | |
// (12, 10, 'neigh_op_tnl_6') | |
// (12, 11, 'neigh_op_lft_6') | |
// (12, 11, 'sp4_h_r_41') | |
// (12, 12, 'neigh_op_bnl_6') | |
// (13, 11, 'sp4_h_l_41') | |
// (13, 11, 'sp4_h_r_7') | |
// (14, 11, 'sp4_h_r_18') | |
// (15, 11, 'sp4_h_r_31') | |
// (16, 11, 'local_g2_2') | |
// (16, 11, 'lutff_4/in_0') | |
// (16, 11, 'sp4_h_r_42') | |
// (17, 11, 'sp4_h_l_42') | |
wire n153; | |
// (9, 11, 'sp4_h_r_8') | |
// (10, 9, 'sp4_r_v_b_40') | |
// (10, 10, 'neigh_op_tnr_0') | |
// (10, 10, 'sp4_r_v_b_29') | |
// (10, 11, 'neigh_op_rgt_0') | |
// (10, 11, 'sp4_h_r_21') | |
// (10, 11, 'sp4_r_v_b_16') | |
// (10, 12, 'neigh_op_bnr_0') | |
// (10, 12, 'sp4_r_v_b_5') | |
// (11, 8, 'sp4_v_t_40') | |
// (11, 9, 'sp4_v_b_40') | |
// (11, 10, 'neigh_op_top_0') | |
// (11, 10, 'sp4_r_v_b_44') | |
// (11, 10, 'sp4_v_b_29') | |
// (11, 11, 'lutff_0/out') | |
// (11, 11, 'sp4_h_r_0') | |
// (11, 11, 'sp4_h_r_32') | |
// (11, 11, 'sp4_r_v_b_33') | |
// (11, 11, 'sp4_v_b_16') | |
// (11, 12, 'neigh_op_bot_0') | |
// (11, 12, 'sp4_h_r_11') | |
// (11, 12, 'sp4_r_v_b_20') | |
// (11, 12, 'sp4_v_b_5') | |
// (11, 13, 'sp4_r_v_b_9') | |
// (12, 9, 'sp4_v_t_44') | |
// (12, 10, 'neigh_op_tnl_0') | |
// (12, 10, 'sp4_v_b_44') | |
// (12, 11, 'local_g0_0') | |
// (12, 11, 'lutff_2/in_2') | |
// (12, 11, 'neigh_op_lft_0') | |
// (12, 11, 'sp4_h_r_13') | |
// (12, 11, 'sp4_h_r_45') | |
// (12, 11, 'sp4_v_b_33') | |
// (12, 12, 'neigh_op_bnl_0') | |
// (12, 12, 'sp4_h_r_22') | |
// (12, 12, 'sp4_r_v_b_36') | |
// (12, 12, 'sp4_v_b_20') | |
// (12, 13, 'sp4_h_r_3') | |
// (12, 13, 'sp4_r_v_b_25') | |
// (12, 13, 'sp4_v_b_9') | |
// (12, 14, 'sp4_r_v_b_12') | |
// (12, 15, 'sp4_r_v_b_1') | |
// (13, 11, 'sp4_h_l_45') | |
// (13, 11, 'sp4_h_r_24') | |
// (13, 11, 'sp4_v_t_36') | |
// (13, 12, 'local_g2_3') | |
// (13, 12, 'lutff_6/in_1') | |
// (13, 12, 'sp4_h_r_35') | |
// (13, 12, 'sp4_v_b_36') | |
// (13, 13, 'local_g2_1') | |
// (13, 13, 'lutff_3/in_0') | |
// (13, 13, 'lutff_6/in_3') | |
// (13, 13, 'sp4_h_r_14') | |
// (13, 13, 'sp4_v_b_25') | |
// (13, 14, 'sp4_v_b_12') | |
// (13, 15, 'sp4_v_b_1') | |
// (14, 11, 'local_g2_5') | |
// (14, 11, 'lutff_4/in_3') | |
// (14, 11, 'sp4_h_r_37') | |
// (14, 12, 'sp4_h_r_46') | |
// (14, 12, 'sp4_r_v_b_37') | |
// (14, 13, 'local_g2_3') | |
// (14, 13, 'lutff_5/in_2') | |
// (14, 13, 'sp4_h_r_27') | |
// (14, 13, 'sp4_r_v_b_24') | |
// (14, 14, 'sp4_r_v_b_13') | |
// (14, 15, 'sp4_r_v_b_0') | |
// (15, 11, 'local_g1_0') | |
// (15, 11, 'lutff_3/in_2') | |
// (15, 11, 'sp4_h_l_37') | |
// (15, 11, 'sp4_h_r_8') | |
// (15, 11, 'sp4_v_t_37') | |
// (15, 12, 'sp4_h_l_46') | |
// (15, 12, 'sp4_v_b_37') | |
// (15, 13, 'sp4_h_r_38') | |
// (15, 13, 'sp4_v_b_24') | |
// (15, 14, 'local_g0_5') | |
// (15, 14, 'lutff_3/in_0') | |
// (15, 14, 'sp4_v_b_13') | |
// (15, 15, 'sp4_v_b_0') | |
// (16, 11, 'sp4_h_r_21') | |
// (16, 13, 'sp4_h_l_38') | |
// (17, 11, 'sp4_h_r_32') | |
// (18, 11, 'sp4_h_r_45') | |
// (19, 11, 'sp4_h_l_45') | |
reg n154 = 0; | |
// (9, 12, 'neigh_op_tnr_0') | |
// (9, 13, 'neigh_op_rgt_0') | |
// (9, 14, 'neigh_op_bnr_0') | |
// (9, 14, 'sp4_r_v_b_43') | |
// (9, 15, 'sp4_r_v_b_30') | |
// (9, 16, 'sp4_r_v_b_19') | |
// (9, 17, 'sp4_r_v_b_6') | |
// (10, 12, 'neigh_op_top_0') | |
// (10, 13, 'lutff_0/out') | |
// (10, 13, 'sp4_h_r_0') | |
// (10, 13, 'sp4_v_t_43') | |
// (10, 14, 'neigh_op_bot_0') | |
// (10, 14, 'sp4_v_b_43') | |
// (10, 15, 'sp4_v_b_30') | |
// (10, 16, 'local_g0_3') | |
// (10, 16, 'lutff_7/in_0') | |
// (10, 16, 'sp4_v_b_19') | |
// (10, 17, 'sp4_v_b_6') | |
// (11, 12, 'neigh_op_tnl_0') | |
// (11, 13, 'neigh_op_lft_0') | |
// (11, 13, 'sp4_h_r_13') | |
// (11, 14, 'neigh_op_bnl_0') | |
// (12, 13, 'sp4_h_r_24') | |
// (13, 13, 'sp4_h_r_37') | |
// (14, 13, 'sp4_h_l_37') | |
wire n155; | |
// (9, 12, 'neigh_op_tnr_1') | |
// (9, 13, 'neigh_op_rgt_1') | |
// (9, 14, 'neigh_op_bnr_1') | |
// (10, 12, 'neigh_op_top_1') | |
// (10, 13, 'local_g3_1') | |
// (10, 13, 'lutff_1/out') | |
// (10, 13, 'lutff_6/in_0') | |
// (10, 14, 'neigh_op_bot_1') | |
// (11, 12, 'neigh_op_tnl_1') | |
// (11, 13, 'local_g1_1') | |
// (11, 13, 'lutff_4/in_2') | |
// (11, 13, 'neigh_op_lft_1') | |
// (11, 14, 'neigh_op_bnl_1') | |
wire n156; | |
// (9, 12, 'neigh_op_tnr_3') | |
// (9, 13, 'neigh_op_rgt_3') | |
// (9, 14, 'neigh_op_bnr_3') | |
// (10, 12, 'neigh_op_top_3') | |
// (10, 13, 'local_g3_3') | |
// (10, 13, 'lutff_2/in_2') | |
// (10, 13, 'lutff_3/out') | |
// (10, 14, 'neigh_op_bot_3') | |
// (11, 12, 'neigh_op_tnl_3') | |
// (11, 13, 'neigh_op_lft_3') | |
// (11, 14, 'neigh_op_bnl_3') | |
wire n157; | |
// (9, 12, 'neigh_op_tnr_4') | |
// (9, 13, 'neigh_op_rgt_4') | |
// (9, 14, 'neigh_op_bnr_4') | |
// (10, 12, 'neigh_op_top_4') | |
// (10, 13, 'local_g3_4') | |
// (10, 13, 'lutff_2/in_1') | |
// (10, 13, 'lutff_4/out') | |
// (10, 14, 'neigh_op_bot_4') | |
// (11, 12, 'neigh_op_tnl_4') | |
// (11, 13, 'neigh_op_lft_4') | |
// (11, 14, 'neigh_op_bnl_4') | |
wire n158; | |
// (9, 12, 'neigh_op_tnr_5') | |
// (9, 13, 'neigh_op_rgt_5') | |
// (9, 14, 'neigh_op_bnr_5') | |
// (10, 12, 'neigh_op_top_5') | |
// (10, 13, 'local_g3_5') | |
// (10, 13, 'lutff_5/out') | |
// (10, 13, 'lutff_7/in_1') | |
// (10, 14, 'neigh_op_bot_5') | |
// (11, 12, 'neigh_op_tnl_5') | |
// (11, 13, 'neigh_op_lft_5') | |
// (11, 14, 'neigh_op_bnl_5') | |
wire n159; | |
// (9, 12, 'neigh_op_tnr_7') | |
// (9, 13, 'neigh_op_rgt_7') | |
// (9, 14, 'neigh_op_bnr_7') | |
// (10, 12, 'neigh_op_top_7') | |
// (10, 13, 'local_g1_7') | |
// (10, 13, 'lutff_2/in_0') | |
// (10, 13, 'lutff_7/out') | |
// (10, 13, 'sp4_r_v_b_47') | |
// (10, 14, 'local_g1_7') | |
// (10, 14, 'lutff_0/in_2') | |
// (10, 14, 'lutff_2/in_2') | |
// (10, 14, 'lutff_5/in_3') | |
// (10, 14, 'neigh_op_bot_7') | |
// (10, 14, 'sp4_r_v_b_34') | |
// (10, 15, 'local_g3_7') | |
// (10, 15, 'lutff_1/in_1') | |
// (10, 15, 'lutff_4/in_2') | |
// (10, 15, 'sp4_r_v_b_23') | |
// (10, 16, 'sp4_r_v_b_10') | |
// (11, 12, 'neigh_op_tnl_7') | |
// (11, 12, 'sp4_v_t_47') | |
// (11, 13, 'neigh_op_lft_7') | |
// (11, 13, 'sp4_v_b_47') | |
// (11, 14, 'local_g2_7') | |
// (11, 14, 'lutff_6/in_3') | |
// (11, 14, 'neigh_op_bnl_7') | |
// (11, 14, 'sp4_v_b_34') | |
// (11, 15, 'local_g0_7') | |
// (11, 15, 'lutff_5/in_2') | |
// (11, 15, 'sp4_v_b_23') | |
// (11, 16, 'sp4_v_b_10') | |
wire n160; | |
// (9, 12, 'sp12_h_r_0') | |
// (10, 12, 'sp12_h_r_3') | |
// (11, 12, 'local_g1_4') | |
// (11, 12, 'lutff_2/in_3') | |
// (11, 12, 'sp12_h_r_4') | |
// (12, 12, 'sp12_h_r_7') | |
// (13, 12, 'sp12_h_r_8') | |
// (14, 12, 'sp12_h_r_11') | |
// (15, 12, 'sp12_h_r_12') | |
// (16, 12, 'sp12_h_r_15') | |
// (17, 12, 'sp12_h_r_16') | |
// (18, 11, 'neigh_op_tnr_6') | |
// (18, 12, 'neigh_op_rgt_6') | |
// (18, 12, 'sp12_h_r_19') | |
// (18, 13, 'neigh_op_bnr_6') | |
// (19, 11, 'neigh_op_top_6') | |
// (19, 12, 'ram/RDATA_1') | |
// (19, 12, 'sp12_h_r_20') | |
// (19, 13, 'neigh_op_bot_6') | |
// (20, 11, 'neigh_op_tnl_6') | |
// (20, 12, 'neigh_op_lft_6') | |
// (20, 12, 'sp12_h_r_23') | |
// (20, 13, 'neigh_op_bnl_6') | |
// (21, 12, 'sp12_h_l_23') | |
wire n161; | |
// (9, 12, 'sp4_h_r_0') | |
// (10, 9, 'sp4_r_v_b_45') | |
// (10, 10, 'sp4_r_v_b_32') | |
// (10, 11, 'neigh_op_tnr_4') | |
// (10, 11, 'sp4_r_v_b_21') | |
// (10, 12, 'neigh_op_rgt_4') | |
// (10, 12, 'sp4_h_r_13') | |
// (10, 12, 'sp4_r_v_b_8') | |
// (10, 13, 'neigh_op_bnr_4') | |
// (11, 8, 'sp4_v_t_45') | |
// (11, 9, 'local_g3_5') | |
// (11, 9, 'lutff_6/in_0') | |
// (11, 9, 'sp4_r_v_b_44') | |
// (11, 9, 'sp4_v_b_45') | |
// (11, 10, 'local_g3_0') | |
// (11, 10, 'lutff_4/in_1') | |
// (11, 10, 'sp4_r_v_b_33') | |
// (11, 10, 'sp4_v_b_32') | |
// (11, 11, 'neigh_op_top_4') | |
// (11, 11, 'sp4_r_v_b_20') | |
// (11, 11, 'sp4_r_v_b_36') | |
// (11, 11, 'sp4_v_b_21') | |
// (11, 12, 'lutff_4/out') | |
// (11, 12, 'sp4_h_r_24') | |
// (11, 12, 'sp4_h_r_8') | |
// (11, 12, 'sp4_r_v_b_25') | |
// (11, 12, 'sp4_r_v_b_9') | |
// (11, 12, 'sp4_v_b_8') | |
// (11, 13, 'neigh_op_bot_4') | |
// (11, 13, 'sp4_r_v_b_12') | |
// (11, 14, 'sp4_r_v_b_1') | |
// (12, 8, 'sp4_v_t_44') | |
// (12, 9, 'local_g2_4') | |
// (12, 9, 'lutff_0/in_2') | |
// (12, 9, 'sp4_r_v_b_37') | |
// (12, 9, 'sp4_v_b_44') | |
// (12, 10, 'sp4_h_r_6') | |
// (12, 10, 'sp4_r_v_b_24') | |
// (12, 10, 'sp4_v_b_33') | |
// (12, 10, 'sp4_v_t_36') | |
// (12, 11, 'neigh_op_tnl_4') | |
// (12, 11, 'sp4_r_v_b_13') | |
// (12, 11, 'sp4_v_b_20') | |
// (12, 11, 'sp4_v_b_36') | |
// (12, 12, 'neigh_op_lft_4') | |
// (12, 12, 'sp4_h_r_21') | |
// (12, 12, 'sp4_h_r_37') | |
// (12, 12, 'sp4_r_v_b_0') | |
// (12, 12, 'sp4_v_b_25') | |
// (12, 12, 'sp4_v_b_9') | |
// (12, 13, 'local_g2_4') | |
// (12, 13, 'local_g3_4') | |
// (12, 13, 'lutff_2/in_1') | |
// (12, 13, 'lutff_3/in_3') | |
// (12, 13, 'neigh_op_bnl_4') | |
// (12, 13, 'sp4_r_v_b_37') | |
// (12, 13, 'sp4_v_b_12') | |
// (12, 14, 'sp4_r_v_b_24') | |
// (12, 14, 'sp4_v_b_1') | |
// (12, 15, 'sp4_r_v_b_13') | |
// (12, 16, 'sp4_r_v_b_0') | |
// (13, 8, 'sp4_v_t_37') | |
// (13, 9, 'local_g3_5') | |
// (13, 9, 'lutff_0/in_2') | |
// (13, 9, 'sp4_v_b_37') | |
// (13, 10, 'sp4_h_r_19') | |
// (13, 10, 'sp4_v_b_24') | |
// (13, 11, 'sp4_v_b_13') | |
// (13, 12, 'sp4_h_l_37') | |
// (13, 12, 'sp4_h_r_0') | |
// (13, 12, 'sp4_h_r_32') | |
// (13, 12, 'sp4_v_b_0') | |
// (13, 12, 'sp4_v_t_37') | |
// (13, 13, 'local_g2_5') | |
// (13, 13, 'lutff_4/in_1') | |
// (13, 13, 'sp4_v_b_37') | |
// (13, 14, 'sp4_v_b_24') | |
// (13, 15, 'sp4_v_b_13') | |
// (13, 16, 'sp4_v_b_0') | |
// (14, 9, 'local_g2_7') | |
// (14, 9, 'lutff_2/in_3') | |
// (14, 9, 'sp4_r_v_b_39') | |
// (14, 10, 'sp4_h_r_30') | |
// (14, 10, 'sp4_r_v_b_26') | |
// (14, 11, 'sp4_r_v_b_15') | |
// (14, 12, 'sp4_h_r_13') | |
// (14, 12, 'sp4_h_r_45') | |
// (14, 12, 'sp4_r_v_b_2') | |
// (15, 8, 'sp4_v_t_39') | |
// (15, 9, 'local_g3_7') | |
// (15, 9, 'lutff_5/in_1') | |
// (15, 9, 'sp4_v_b_39') | |
// (15, 10, 'sp4_h_r_43') | |
// (15, 10, 'sp4_v_b_26') | |
// (15, 11, 'local_g0_7') | |
// (15, 11, 'lutff_3/in_0') | |
// (15, 11, 'sp4_r_v_b_46') | |
// (15, 11, 'sp4_v_b_15') | |
// (15, 12, 'local_g0_3') | |
// (15, 12, 'lutff_3/in_0') | |
// (15, 12, 'lutff_4/in_1') | |
// (15, 12, 'sp4_h_l_45') | |
// (15, 12, 'sp4_h_r_11') | |
// (15, 12, 'sp4_h_r_24') | |
// (15, 12, 'sp4_r_v_b_35') | |
// (15, 12, 'sp4_v_b_2') | |
// (15, 13, 'sp4_r_v_b_22') | |
// (15, 14, 'sp4_r_v_b_11') | |
// (16, 9, 'sp4_r_v_b_43') | |
// (16, 10, 'local_g1_1') | |
// (16, 10, 'lutff_2/in_2') | |
// (16, 10, 'sp4_h_l_43') | |
// (16, 10, 'sp4_h_r_9') | |
// (16, 10, 'sp4_r_v_b_30') | |
// (16, 10, 'sp4_v_t_46') | |
// (16, 11, 'local_g3_3') | |
// (16, 11, 'lutff_7/in_1') | |
// (16, 11, 'sp4_r_v_b_19') | |
// (16, 11, 'sp4_v_b_46') | |
// (16, 12, 'local_g1_6') | |
// (16, 12, 'lutff_1/in_0') | |
// (16, 12, 'sp4_h_r_22') | |
// (16, 12, 'sp4_h_r_37') | |
// (16, 12, 'sp4_r_v_b_6') | |
// (16, 12, 'sp4_v_b_35') | |
// (16, 13, 'local_g1_6') | |
// (16, 13, 'lutff_2/in_3') | |
// (16, 13, 'sp4_v_b_22') | |
// (16, 14, 'sp4_v_b_11') | |
// (17, 8, 'sp4_v_t_43') | |
// (17, 9, 'sp4_v_b_43') | |
// (17, 10, 'sp4_h_r_20') | |
// (17, 10, 'sp4_v_b_30') | |
// (17, 11, 'sp4_v_b_19') | |
// (17, 12, 'sp4_h_l_37') | |
// (17, 12, 'sp4_h_r_35') | |
// (17, 12, 'sp4_v_b_6') | |
// (18, 10, 'sp4_h_r_33') | |
// (18, 12, 'sp4_h_r_46') | |
// (19, 10, 'sp4_h_r_44') | |
// (19, 12, 'sp4_h_l_46') | |
// (20, 10, 'sp4_h_l_44') | |
reg n162 = 0; | |
// (9, 12, 'sp4_h_r_10') | |
// (10, 12, 'sp4_h_r_23') | |
// (11, 8, 'sp4_r_v_b_46') | |
// (11, 9, 'sp4_r_v_b_35') | |
// (11, 10, 'sp4_r_v_b_22') | |
// (11, 11, 'local_g2_3') | |
// (11, 11, 'lutff_7/in_0') | |
// (11, 11, 'sp4_r_v_b_11') | |
// (11, 12, 'local_g3_2') | |
// (11, 12, 'lutff_2/in_1') | |
// (11, 12, 'sp4_h_r_34') | |
// (12, 7, 'sp4_v_t_46') | |
// (12, 8, 'sp4_v_b_46') | |
// (12, 9, 'sp4_v_b_35') | |
// (12, 10, 'sp4_v_b_22') | |
// (12, 11, 'sp4_h_r_6') | |
// (12, 11, 'sp4_v_b_11') | |
// (12, 12, 'sp4_h_r_47') | |
// (13, 10, 'sp4_h_r_2') | |
// (13, 11, 'sp4_h_r_19') | |
// (13, 12, 'sp4_h_l_47') | |
// (13, 12, 'sp4_h_r_10') | |
// (13, 13, 'local_g0_3') | |
// (13, 13, 'lutff_1/in_0') | |
// (13, 13, 'sp4_h_r_11') | |
// (14, 10, 'sp4_h_r_15') | |
// (14, 11, 'sp4_h_r_30') | |
// (14, 12, 'sp4_h_r_23') | |
// (14, 13, 'sp4_h_r_22') | |
// (15, 10, 'sp4_h_r_26') | |
// (15, 11, 'local_g2_6') | |
// (15, 11, 'lutff_4/in_0') | |
// (15, 11, 'sp4_h_r_43') | |
// (15, 11, 'sp4_r_v_b_38') | |
// (15, 12, 'neigh_op_tnr_7') | |
// (15, 12, 'sp4_h_r_34') | |
// (15, 12, 'sp4_r_v_b_27') | |
// (15, 12, 'sp4_r_v_b_43') | |
// (15, 13, 'local_g2_7') | |
// (15, 13, 'lutff_6/in_3') | |
// (15, 13, 'neigh_op_rgt_7') | |
// (15, 13, 'sp4_h_r_3') | |
// (15, 13, 'sp4_h_r_35') | |
// (15, 13, 'sp4_r_v_b_14') | |
// (15, 13, 'sp4_r_v_b_30') | |
// (15, 14, 'neigh_op_bnr_7') | |
// (15, 14, 'sp4_r_v_b_19') | |
// (15, 14, 'sp4_r_v_b_3') | |
// (15, 15, 'sp4_r_v_b_6') | |
// (16, 10, 'local_g2_7') | |
// (16, 10, 'lutff_1/in_2') | |
// (16, 10, 'sp4_h_r_39') | |
// (16, 10, 'sp4_v_t_38') | |
// (16, 11, 'sp4_h_l_43') | |
// (16, 11, 'sp4_r_v_b_39') | |
// (16, 11, 'sp4_v_b_38') | |
// (16, 11, 'sp4_v_t_43') | |
// (16, 12, 'neigh_op_top_7') | |
// (16, 12, 'sp4_h_r_47') | |
// (16, 12, 'sp4_r_v_b_26') | |
// (16, 12, 'sp4_r_v_b_42') | |
// (16, 12, 'sp4_v_b_27') | |
// (16, 12, 'sp4_v_b_43') | |
// (16, 13, 'lutff_7/out') | |
// (16, 13, 'sp4_h_r_14') | |
// (16, 13, 'sp4_h_r_46') | |
// (16, 13, 'sp4_r_v_b_15') | |
// (16, 13, 'sp4_r_v_b_31') | |
// (16, 13, 'sp4_r_v_b_47') | |
// (16, 13, 'sp4_v_b_14') | |
// (16, 13, 'sp4_v_b_30') | |
// (16, 14, 'neigh_op_bot_7') | |
// (16, 14, 'sp4_r_v_b_18') | |
// (16, 14, 'sp4_r_v_b_2') | |
// (16, 14, 'sp4_r_v_b_34') | |
// (16, 14, 'sp4_v_b_19') | |
// (16, 14, 'sp4_v_b_3') | |
// (16, 15, 'sp4_r_v_b_23') | |
// (16, 15, 'sp4_r_v_b_7') | |
// (16, 15, 'sp4_v_b_6') | |
// (16, 16, 'sp4_r_v_b_10') | |
// (17, 10, 'local_g0_2') | |
// (17, 10, 'lutff_2/in_2') | |
// (17, 10, 'sp4_h_l_39') | |
// (17, 10, 'sp4_h_r_2') | |
// (17, 10, 'sp4_v_t_39') | |
// (17, 11, 'local_g2_7') | |
// (17, 11, 'lutff_5/in_2') | |
// (17, 11, 'sp4_h_r_0') | |
// (17, 11, 'sp4_v_b_39') | |
// (17, 11, 'sp4_v_t_42') | |
// (17, 12, 'local_g3_7') | |
// (17, 12, 'lutff_0/in_2') | |
// (17, 12, 'lutff_1/in_1') | |
// (17, 12, 'neigh_op_tnl_7') | |
// (17, 12, 'sp4_h_l_47') | |
// (17, 12, 'sp4_v_b_26') | |
// (17, 12, 'sp4_v_b_42') | |
// (17, 12, 'sp4_v_t_47') | |
// (17, 13, 'neigh_op_lft_7') | |
// (17, 13, 'sp4_h_l_46') | |
// (17, 13, 'sp4_h_r_27') | |
// (17, 13, 'sp4_v_b_15') | |
// (17, 13, 'sp4_v_b_31') | |
// (17, 13, 'sp4_v_b_47') | |
// (17, 14, 'neigh_op_bnl_7') | |
// (17, 14, 'sp4_v_b_18') | |
// (17, 14, 'sp4_v_b_2') | |
// (17, 14, 'sp4_v_b_34') | |
// (17, 15, 'sp4_v_b_23') | |
// (17, 15, 'sp4_v_b_7') | |
// (17, 16, 'sp4_v_b_10') | |
// (18, 10, 'sp4_h_r_15') | |
// (18, 10, 'sp4_r_v_b_44') | |
// (18, 11, 'local_g0_5') | |
// (18, 11, 'lutff_1/in_2') | |
// (18, 11, 'lutff_2/in_1') | |
// (18, 11, 'lutff_4/in_1') | |
// (18, 11, 'sp4_h_r_13') | |
// (18, 11, 'sp4_r_v_b_33') | |
// (18, 12, 'local_g3_4') | |
// (18, 12, 'lutff_5/in_0') | |
// (18, 12, 'sp4_r_v_b_20') | |
// (18, 13, 'sp4_h_r_38') | |
// (18, 13, 'sp4_r_v_b_9') | |
// (19, 9, 'sp4_v_t_44') | |
// (19, 10, 'sp4_h_r_26') | |
// (19, 10, 'sp4_v_b_44') | |
// (19, 11, 'sp4_h_r_24') | |
// (19, 11, 'sp4_v_b_33') | |
// (19, 12, 'sp4_v_b_20') | |
// (19, 13, 'sp4_h_l_38') | |
// (19, 13, 'sp4_v_b_9') | |
// (20, 10, 'local_g2_7') | |
// (20, 10, 'lutff_2/in_1') | |
// (20, 10, 'sp4_h_r_39') | |
// (20, 11, 'local_g3_5') | |
// (20, 11, 'lutff_3/in_3') | |
// (20, 11, 'sp4_h_r_37') | |
// (21, 10, 'sp4_h_l_39') | |
// (21, 11, 'sp4_h_l_37') | |
wire n163; | |
// (9, 12, 'sp4_h_r_2') | |
// (10, 9, 'sp4_r_v_b_47') | |
// (10, 10, 'sp4_r_v_b_34') | |
// (10, 11, 'neigh_op_tnr_5') | |
// (10, 11, 'sp4_r_v_b_23') | |
// (10, 12, 'neigh_op_rgt_5') | |
// (10, 12, 'sp4_h_r_15') | |
// (10, 12, 'sp4_r_v_b_10') | |
// (10, 13, 'neigh_op_bnr_5') | |
// (11, 8, 'sp4_v_t_47') | |
// (11, 9, 'local_g2_7') | |
// (11, 9, 'lutff_1/in_2') | |
// (11, 9, 'lutff_4/in_3') | |
// (11, 9, 'sp4_r_v_b_46') | |
// (11, 9, 'sp4_v_b_47') | |
// (11, 10, 'sp4_r_v_b_35') | |
// (11, 10, 'sp4_v_b_34') | |
// (11, 11, 'neigh_op_top_5') | |
// (11, 11, 'sp4_r_v_b_22') | |
// (11, 11, 'sp4_r_v_b_38') | |
// (11, 11, 'sp4_v_b_23') | |
// (11, 12, 'lutff_5/out') | |
// (11, 12, 'sp4_h_r_10') | |
// (11, 12, 'sp4_h_r_26') | |
// (11, 12, 'sp4_r_v_b_11') | |
// (11, 12, 'sp4_r_v_b_27') | |
// (11, 12, 'sp4_r_v_b_43') | |
// (11, 12, 'sp4_v_b_10') | |
// (11, 13, 'neigh_op_bot_5') | |
// (11, 13, 'sp4_r_v_b_14') | |
// (11, 13, 'sp4_r_v_b_30') | |
// (11, 14, 'local_g3_3') | |
// (11, 14, 'lutff_4/in_0') | |
// (11, 14, 'sp4_r_v_b_19') | |
// (11, 14, 'sp4_r_v_b_3') | |
// (11, 15, 'sp4_r_v_b_6') | |
// (12, 8, 'sp4_v_t_46') | |
// (12, 9, 'sp4_r_v_b_39') | |
// (12, 9, 'sp4_v_b_46') | |
// (12, 10, 'local_g3_3') | |
// (12, 10, 'lutff_1/in_1') | |
// (12, 10, 'sp4_r_v_b_26') | |
// (12, 10, 'sp4_v_b_35') | |
// (12, 10, 'sp4_v_t_38') | |
// (12, 11, 'neigh_op_tnl_5') | |
// (12, 11, 'sp4_r_v_b_15') | |
// (12, 11, 'sp4_v_b_22') | |
// (12, 11, 'sp4_v_b_38') | |
// (12, 11, 'sp4_v_t_43') | |
// (12, 12, 'neigh_op_lft_5') | |
// (12, 12, 'sp4_h_r_23') | |
// (12, 12, 'sp4_h_r_39') | |
// (12, 12, 'sp4_r_v_b_2') | |
// (12, 12, 'sp4_v_b_11') | |
// (12, 12, 'sp4_v_b_27') | |
// (12, 12, 'sp4_v_b_43') | |
// (12, 13, 'neigh_op_bnl_5') | |
// (12, 13, 'sp4_v_b_14') | |
// (12, 13, 'sp4_v_b_30') | |
// (12, 14, 'sp4_h_r_9') | |
// (12, 14, 'sp4_v_b_19') | |
// (12, 14, 'sp4_v_b_3') | |
// (12, 15, 'sp4_v_b_6') | |
// (13, 8, 'sp4_v_t_39') | |
// (13, 9, 'local_g3_7') | |
// (13, 9, 'lutff_0/in_0') | |
// (13, 9, 'sp4_v_b_39') | |
// (13, 10, 'sp4_v_b_26') | |
// (13, 11, 'sp4_v_b_15') | |
// (13, 12, 'sp4_h_l_39') | |
// (13, 12, 'sp4_h_r_34') | |
// (13, 12, 'sp4_v_b_2') | |
// (13, 14, 'sp4_h_r_20') | |
// (14, 9, 'local_g3_1') | |
// (14, 9, 'lutff_1/in_3') | |
// (14, 9, 'sp4_r_v_b_41') | |
// (14, 10, 'sp4_r_v_b_28') | |
// (14, 11, 'sp4_r_v_b_17') | |
// (14, 12, 'sp4_h_r_47') | |
// (14, 12, 'sp4_r_v_b_4') | |
// (14, 14, 'local_g2_1') | |
// (14, 14, 'lutff_2/in_3') | |
// (14, 14, 'lutff_4/in_3') | |
// (14, 14, 'lutff_6/in_1') | |
// (14, 14, 'sp4_h_r_33') | |
// (15, 8, 'sp4_v_t_41') | |
// (15, 9, 'sp4_v_b_41') | |
// (15, 10, 'sp4_v_b_28') | |
// (15, 11, 'sp4_v_b_17') | |
// (15, 12, 'sp4_h_l_47') | |
// (15, 12, 'sp4_v_b_4') | |
// (15, 14, 'sp4_h_r_44') | |
// (16, 14, 'sp4_h_l_44') | |
wire n164; | |
// (9, 13, 'neigh_op_tnr_1') | |
// (9, 14, 'neigh_op_rgt_1') | |
// (9, 15, 'neigh_op_bnr_1') | |
// (10, 13, 'neigh_op_top_1') | |
// (10, 14, 'local_g0_1') | |
// (10, 14, 'lutff_1/out') | |
// (10, 14, 'lutff_2/in_1') | |
// (10, 15, 'neigh_op_bot_1') | |
// (11, 13, 'neigh_op_tnl_1') | |
// (11, 14, 'neigh_op_lft_1') | |
// (11, 15, 'neigh_op_bnl_1') | |
reg n165 = 0; | |
// (9, 13, 'neigh_op_tnr_3') | |
// (9, 14, 'neigh_op_rgt_3') | |
// (9, 14, 'sp4_r_v_b_38') | |
// (9, 15, 'neigh_op_bnr_3') | |
// (9, 15, 'sp4_r_v_b_27') | |
// (9, 16, 'sp4_r_v_b_14') | |
// (9, 17, 'sp4_r_v_b_3') | |
// (10, 13, 'neigh_op_top_3') | |
// (10, 13, 'sp4_v_t_38') | |
// (10, 14, 'local_g0_3') | |
// (10, 14, 'lutff_3/out') | |
// (10, 14, 'lutff_4/in_1') | |
// (10, 14, 'sp4_v_b_38') | |
// (10, 15, 'neigh_op_bot_3') | |
// (10, 15, 'sp4_v_b_27') | |
// (10, 16, 'local_g1_6') | |
// (10, 16, 'lutff_1/in_2') | |
// (10, 16, 'sp4_v_b_14') | |
// (10, 17, 'sp4_v_b_3') | |
// (11, 13, 'neigh_op_tnl_3') | |
// (11, 14, 'neigh_op_lft_3') | |
// (11, 15, 'neigh_op_bnl_3') | |
wire n166; | |
// (9, 13, 'neigh_op_tnr_4') | |
// (9, 14, 'neigh_op_rgt_4') | |
// (9, 15, 'neigh_op_bnr_4') | |
// (10, 13, 'neigh_op_top_4') | |
// (10, 14, 'local_g1_4') | |
// (10, 14, 'lutff_2/in_3') | |
// (10, 14, 'lutff_4/out') | |
// (10, 14, 'sp12_h_r_0') | |
// (10, 15, 'neigh_op_bot_4') | |
// (11, 13, 'neigh_op_tnl_4') | |
// (11, 14, 'neigh_op_lft_4') | |
// (11, 14, 'sp12_h_r_3') | |
// (11, 15, 'neigh_op_bnl_4') | |
// (12, 14, 'sp12_h_r_4') | |
// (13, 14, 'sp12_h_r_7') | |
// (14, 14, 'local_g1_0') | |
// (14, 14, 'lutff_6/in_3') | |
// (14, 14, 'sp12_h_r_8') | |
// (15, 14, 'sp12_h_r_11') | |
// (16, 14, 'sp12_h_r_12') | |
// (17, 14, 'sp12_h_r_15') | |
// (18, 14, 'sp12_h_r_16') | |
// (19, 14, 'sp12_h_r_19') | |
// (20, 14, 'sp12_h_r_20') | |
// (21, 14, 'sp12_h_r_23') | |
// (22, 14, 'sp12_h_l_23') | |
wire n167; | |
// (9, 13, 'neigh_op_tnr_6') | |
// (9, 14, 'neigh_op_rgt_6') | |
// (9, 15, 'neigh_op_bnr_6') | |
// (10, 13, 'neigh_op_top_6') | |
// (10, 14, 'local_g0_6') | |
// (10, 14, 'lutff_2/in_0') | |
// (10, 14, 'lutff_6/out') | |
// (10, 15, 'neigh_op_bot_6') | |
// (11, 13, 'neigh_op_tnl_6') | |
// (11, 14, 'neigh_op_lft_6') | |
// (11, 15, 'neigh_op_bnl_6') | |
reg n168 = 0; | |
// (9, 13, 'neigh_op_tnr_7') | |
// (9, 14, 'neigh_op_rgt_7') | |
// (9, 15, 'neigh_op_bnr_7') | |
// (10, 13, 'neigh_op_top_7') | |
// (10, 14, 'lutff_7/out') | |
// (10, 14, 'sp4_r_v_b_47') | |
// (10, 15, 'neigh_op_bot_7') | |
// (10, 15, 'sp4_r_v_b_34') | |
// (10, 16, 'local_g3_7') | |
// (10, 16, 'lutff_2/in_2') | |
// (10, 16, 'sp4_r_v_b_23') | |
// (10, 17, 'sp4_r_v_b_10') | |
// (11, 13, 'neigh_op_tnl_7') | |
// (11, 13, 'sp4_v_t_47') | |
// (11, 14, 'neigh_op_lft_7') | |
// (11, 14, 'sp4_v_b_47') | |
// (11, 15, 'neigh_op_bnl_7') | |
// (11, 15, 'sp4_v_b_34') | |
// (11, 16, 'sp4_v_b_23') | |
// (11, 17, 'sp4_v_b_10') | |
wire n169; | |
// (9, 13, 'sp4_h_r_10') | |
// (10, 12, 'neigh_op_tnr_1') | |
// (10, 13, 'neigh_op_rgt_1') | |
// (10, 13, 'sp4_h_r_23') | |
// (10, 13, 'sp4_h_r_7') | |
// (10, 14, 'neigh_op_bnr_1') | |
// (11, 11, 'sp4_r_v_b_43') | |
// (11, 12, 'local_g0_1') | |
// (11, 12, 'lutff_4/in_1') | |
// (11, 12, 'neigh_op_top_1') | |
// (11, 12, 'sp4_r_v_b_30') | |
// (11, 13, 'lutff_1/out') | |
// (11, 13, 'sp4_h_r_18') | |
// (11, 13, 'sp4_h_r_2') | |
// (11, 13, 'sp4_h_r_34') | |
// (11, 13, 'sp4_r_v_b_19') | |
// (11, 14, 'local_g1_1') | |
// (11, 14, 'lutff_5/in_3') | |
// (11, 14, 'neigh_op_bot_1') | |
// (11, 14, 'sp4_r_v_b_6') | |
// (12, 10, 'sp4_v_t_43') | |
// (12, 11, 'sp4_v_b_43') | |
// (12, 12, 'local_g2_1') | |
// (12, 12, 'lutff_2/in_3') | |
// (12, 12, 'neigh_op_tnl_1') | |
// (12, 12, 'sp4_v_b_30') | |
// (12, 13, 'neigh_op_lft_1') | |
// (12, 13, 'sp4_h_r_15') | |
// (12, 13, 'sp4_h_r_31') | |
// (12, 13, 'sp4_h_r_47') | |
// (12, 13, 'sp4_v_b_19') | |
// (12, 14, 'local_g2_1') | |
// (12, 14, 'lutff_2/in_3') | |
// (12, 14, 'neigh_op_bnl_1') | |
// (12, 14, 'sp4_h_r_6') | |
// (12, 14, 'sp4_v_b_6') | |
// (13, 10, 'sp4_r_v_b_42') | |
// (13, 11, 'sp4_r_v_b_31') | |
// (13, 12, 'local_g3_2') | |
// (13, 12, 'lutff_5/in_2') | |
// (13, 12, 'sp4_r_v_b_18') | |
// (13, 13, 'sp4_h_l_47') | |
// (13, 13, 'sp4_h_r_1') | |
// (13, 13, 'sp4_h_r_26') | |
// (13, 13, 'sp4_h_r_42') | |
// (13, 13, 'sp4_r_v_b_7') | |
// (13, 14, 'local_g1_3') | |
// (13, 14, 'lutff_3/in_3') | |
// (13, 14, 'sp4_h_r_19') | |
// (14, 9, 'sp4_v_t_42') | |
// (14, 10, 'sp4_v_b_42') | |
// (14, 11, 'sp4_v_b_31') | |
// (14, 12, 'sp4_v_b_18') | |
// (14, 13, 'local_g2_7') | |
// (14, 13, 'lutff_6/in_3') | |
// (14, 13, 'sp4_h_l_42') | |
// (14, 13, 'sp4_h_r_12') | |
// (14, 13, 'sp4_h_r_39') | |
// (14, 13, 'sp4_v_b_7') | |
// (14, 14, 'local_g2_6') | |
// (14, 14, 'lutff_5/in_1') | |
// (14, 14, 'sp4_h_r_30') | |
// (15, 13, 'local_g0_2') | |
// (15, 13, 'lutff_1/in_1') | |
// (15, 13, 'sp4_h_l_39') | |
// (15, 13, 'sp4_h_r_10') | |
// (15, 13, 'sp4_h_r_2') | |
// (15, 13, 'sp4_h_r_25') | |
// (15, 14, 'sp4_h_r_43') | |
// (16, 10, 'sp4_r_v_b_42') | |
// (16, 11, 'sp4_r_v_b_31') | |
// (16, 12, 'local_g3_2') | |
// (16, 12, 'lutff_5/in_0') | |
// (16, 12, 'sp4_r_v_b_18') | |
// (16, 13, 'sp4_h_r_15') | |
// (16, 13, 'sp4_h_r_23') | |
// (16, 13, 'sp4_h_r_36') | |
// (16, 13, 'sp4_r_v_b_7') | |
// (16, 14, 'sp4_h_l_43') | |
// (17, 9, 'sp4_v_t_42') | |
// (17, 10, 'sp4_v_b_42') | |
// (17, 11, 'sp4_v_b_31') | |
// (17, 12, 'sp4_v_b_18') | |
// (17, 13, 'sp4_h_l_36') | |
// (17, 13, 'sp4_h_r_26') | |
// (17, 13, 'sp4_h_r_34') | |
// (17, 13, 'sp4_h_r_4') | |
// (17, 13, 'sp4_v_b_7') | |
// (18, 10, 'sp4_r_v_b_41') | |
// (18, 11, 'sp4_r_v_b_28') | |
// (18, 12, 'local_g3_1') | |
// (18, 12, 'lutff_7/in_1') | |
// (18, 12, 'sp4_r_v_b_17') | |
// (18, 13, 'local_g2_7') | |
// (18, 13, 'lutff_4/in_1') | |
// (18, 13, 'lutff_5/in_2') | |
// (18, 13, 'lutff_6/in_1') | |
// (18, 13, 'sp4_h_r_17') | |
// (18, 13, 'sp4_h_r_39') | |
// (18, 13, 'sp4_h_r_47') | |
// (18, 13, 'sp4_r_v_b_4') | |
// (19, 9, 'sp4_v_t_41') | |
// (19, 10, 'sp4_v_b_41') | |
// (19, 11, 'sp4_v_b_28') | |
// (19, 12, 'sp4_v_b_17') | |
// (19, 13, 'sp4_h_l_39') | |
// (19, 13, 'sp4_h_l_47') | |
// (19, 13, 'sp4_h_r_28') | |
// (19, 13, 'sp4_v_b_4') | |
// (20, 10, 'sp4_r_v_b_47') | |
// (20, 11, 'sp4_r_v_b_34') | |
// (20, 12, 'local_g3_7') | |
// (20, 12, 'lutff_0/in_2') | |
// (20, 12, 'lutff_1/in_3') | |
// (20, 12, 'lutff_7/in_1') | |
// (20, 12, 'sp4_r_v_b_23') | |
// (20, 13, 'sp4_h_r_41') | |
// (20, 13, 'sp4_r_v_b_10') | |
// (21, 9, 'sp4_v_t_47') | |
// (21, 10, 'sp4_v_b_47') | |
// (21, 11, 'sp4_v_b_34') | |
// (21, 12, 'sp4_v_b_23') | |
// (21, 13, 'sp4_h_l_41') | |
// (21, 13, 'sp4_v_b_10') | |
wire n170; | |
// (9, 13, 'sp4_h_r_6') | |
// (10, 7, 'sp4_r_v_b_38') | |
// (10, 8, 'sp4_r_v_b_27') | |
// (10, 9, 'sp4_r_v_b_14') | |
// (10, 10, 'sp4_r_v_b_3') | |
// (10, 11, 'sp4_r_v_b_38') | |
// (10, 12, 'neigh_op_tnr_7') | |
// (10, 12, 'sp4_r_v_b_27') | |
// (10, 13, 'neigh_op_rgt_7') | |
// (10, 13, 'sp4_h_r_19') | |
// (10, 13, 'sp4_h_r_3') | |
// (10, 13, 'sp4_r_v_b_14') | |
// (10, 14, 'neigh_op_bnr_7') | |
// (10, 14, 'sp4_r_v_b_3') | |
// (11, 6, 'sp4_v_t_38') | |
// (11, 7, 'sp4_r_v_b_39') | |
// (11, 7, 'sp4_v_b_38') | |
// (11, 8, 'sp4_r_v_b_26') | |
// (11, 8, 'sp4_v_b_27') | |
// (11, 9, 'local_g0_6') | |
// (11, 9, 'lutff_6/in_2') | |
// (11, 9, 'lutff_7/in_1') | |
// (11, 9, 'sp4_r_v_b_15') | |
// (11, 9, 'sp4_v_b_14') | |
// (11, 10, 'local_g0_0') | |
// (11, 10, 'local_g1_2') | |
// (11, 10, 'lutff_2/in_3') | |
// (11, 10, 'lutff_4/in_0') | |
// (11, 10, 'sp4_h_r_8') | |
// (11, 10, 'sp4_r_v_b_2') | |
// (11, 10, 'sp4_v_b_3') | |
// (11, 10, 'sp4_v_t_38') | |
// (11, 11, 'sp4_r_v_b_39') | |
// (11, 11, 'sp4_v_b_38') | |
// (11, 12, 'neigh_op_top_7') | |
// (11, 12, 'sp4_r_v_b_26') | |
// (11, 12, 'sp4_r_v_b_42') | |
// (11, 12, 'sp4_v_b_27') | |
// (11, 13, 'lutff_7/out') | |
// (11, 13, 'sp4_h_r_14') | |
// (11, 13, 'sp4_h_r_30') | |
// (11, 13, 'sp4_r_v_b_15') | |
// (11, 13, 'sp4_r_v_b_31') | |
// (11, 13, 'sp4_r_v_b_47') | |
// (11, 13, 'sp4_v_b_14') | |
// (11, 14, 'neigh_op_bot_7') | |
// (11, 14, 'sp4_r_v_b_18') | |
// (11, 14, 'sp4_r_v_b_2') | |
// (11, 14, 'sp4_r_v_b_34') | |
// (11, 14, 'sp4_v_b_3') | |
// (11, 15, 'sp4_r_v_b_23') | |
// (11, 15, 'sp4_r_v_b_7') | |
// (11, 16, 'sp4_r_v_b_10') | |
// (12, 6, 'sp4_v_t_39') | |
// (12, 7, 'sp4_v_b_39') | |
// (12, 8, 'sp4_v_b_26') | |
// (12, 9, 'local_g0_7') | |
// (12, 9, 'lutff_0/in_3') | |
// (12, 9, 'lutff_4/in_3') | |
// (12, 9, 'sp4_v_b_15') | |
// (12, 10, 'sp4_h_r_21') | |
// (12, 10, 'sp4_h_r_7') | |
// (12, 10, 'sp4_v_b_2') | |
// (12, 10, 'sp4_v_t_39') | |
// (12, 11, 'sp4_h_r_7') | |
// (12, 11, 'sp4_v_b_39') | |
// (12, 11, 'sp4_v_t_42') | |
// (12, 12, 'neigh_op_tnl_7') | |
// (12, 12, 'sp4_h_r_3') | |
// (12, 12, 'sp4_v_b_26') | |
// (12, 12, 'sp4_v_b_42') | |
// (12, 12, 'sp4_v_t_47') | |
// (12, 13, 'local_g1_7') | |
// (12, 13, 'lutff_0/in_2') | |
// (12, 13, 'lutff_2/in_2') | |
// (12, 13, 'lutff_3/in_1') | |
// (12, 13, 'lutff_7/in_1') | |
// (12, 13, 'neigh_op_lft_7') | |
// (12, 13, 'sp4_h_r_27') | |
// (12, 13, 'sp4_h_r_43') | |
// (12, 13, 'sp4_v_b_15') | |
// (12, 13, 'sp4_v_b_31') | |
// (12, 13, 'sp4_v_b_47') | |
// (12, 14, 'neigh_op_bnl_7') | |
// (12, 14, 'sp4_v_b_18') | |
// (12, 14, 'sp4_v_b_2') | |
// (12, 14, 'sp4_v_b_34') | |
// (12, 15, 'sp4_v_b_23') | |
// (12, 15, 'sp4_v_b_7') | |
// (12, 16, 'sp4_v_b_10') | |
// (13, 6, 'sp4_r_v_b_43') | |
// (13, 7, 'sp4_r_v_b_30') | |
// (13, 8, 'sp4_r_v_b_19') | |
// (13, 9, 'local_g1_6') | |
// (13, 9, 'lutff_0/in_1') | |
// (13, 9, 'lutff_5/in_2') | |
// (13, 9, 'sp4_r_v_b_6') | |
// (13, 10, 'sp4_h_r_18') | |
// (13, 10, 'sp4_h_r_32') | |
// (13, 10, 'sp4_r_v_b_38') | |
// (13, 11, 'sp4_h_r_18') | |
// (13, 11, 'sp4_r_v_b_27') | |
// (13, 12, 'sp4_h_r_14') | |
// (13, 12, 'sp4_r_v_b_14') | |
// (13, 13, 'local_g2_6') | |
// (13, 13, 'lutff_3/in_3') | |
// (13, 13, 'lutff_4/in_0') | |
// (13, 13, 'sp4_h_l_43') | |
// (13, 13, 'sp4_h_r_38') | |
// (13, 13, 'sp4_h_r_9') | |
// (13, 13, 'sp4_r_v_b_3') | |
// (14, 5, 'sp4_v_t_43') | |
// (14, 6, 'sp4_v_b_43') | |
// (14, 7, 'sp4_r_v_b_45') | |
// (14, 7, 'sp4_v_b_30') | |
// (14, 8, 'sp4_r_v_b_32') | |
// (14, 8, 'sp4_v_b_19') | |
// (14, 9, 'local_g0_3') | |
// (14, 9, 'lutff_2/in_1') | |
// (14, 9, 'lutff_3/in_0') | |
// (14, 9, 'sp4_h_r_3') | |
// (14, 9, 'sp4_r_v_b_21') | |
// (14, 9, 'sp4_v_b_6') | |
// (14, 9, 'sp4_v_t_38') | |
// (14, 10, 'sp4_h_r_31') | |
// (14, 10, 'sp4_h_r_45') | |
// (14, 10, 'sp4_r_v_b_8') | |
// (14, 10, 'sp4_v_b_38') | |
// (14, 11, 'sp4_h_r_31') | |
// (14, 11, 'sp4_v_b_27') | |
// (14, 12, 'local_g2_3') | |
// (14, 12, 'lutff_7/in_0') | |
// (14, 12, 'sp4_h_r_27') | |
// (14, 12, 'sp4_v_b_14') | |
// (14, 13, 'sp4_h_l_38') | |
// (14, 13, 'sp4_h_r_20') | |
// (14, 13, 'sp4_h_r_3') | |
// (14, 13, 'sp4_v_b_3') | |
// (15, 6, 'sp4_v_t_45') | |
// (15, 7, 'sp4_r_v_b_36') | |
// (15, 7, 'sp4_v_b_45') | |
// (15, 8, 'sp4_r_v_b_25') | |
// (15, 8, 'sp4_v_b_32') | |
// (15, 9, 'local_g0_5') | |
// (15, 9, 'local_g2_4') | |
// (15, 9, 'lutff_5/in_3') | |
// (15, 9, 'lutff_6/in_1') | |
// (15, 9, 'sp4_h_r_14') | |
// (15, 9, 'sp4_r_v_b_12') | |
// (15, 9, 'sp4_r_v_b_44') | |
// (15, 9, 'sp4_v_b_21') | |
// (15, 10, 'sp4_h_l_45') | |
// (15, 10, 'sp4_h_r_42') | |
// (15, 10, 'sp4_r_v_b_1') | |
// (15, 10, 'sp4_r_v_b_33') | |
// (15, 10, 'sp4_v_b_8') | |
// (15, 11, 'local_g2_2') | |
// (15, 11, 'local_g3_2') | |
// (15, 11, 'lutff_1/in_0') | |
// (15, 11, 'lutff_3/in_1') | |
// (15, 11, 'sp4_h_r_42') | |
// (15, 11, 'sp4_r_v_b_20') | |
// (15, 12, 'local_g3_6') | |
// (15, 12, 'lutff_2/in_1') | |
// (15, 12, 'lutff_3/in_2') | |
// (15, 12, 'sp4_h_r_38') | |
// (15, 12, 'sp4_r_v_b_9') | |
// (15, 13, 'sp4_h_r_14') | |
// (15, 13, 'sp4_h_r_33') | |
// (16, 6, 'sp4_v_t_36') | |
// (16, 7, 'sp4_v_b_36') | |
// (16, 8, 'sp4_v_b_25') | |
// (16, 8, 'sp4_v_t_44') | |
// (16, 9, 'sp4_h_r_27') | |
// (16, 9, 'sp4_v_b_12') | |
// (16, 9, 'sp4_v_b_44') | |
// (16, 10, 'local_g1_2') | |
// (16, 10, 'local_g1_7') | |
// (16, 10, 'lutff_2/in_1') | |
// (16, 10, 'lutff_7/in_1') | |
// (16, 10, 'sp4_h_l_42') | |
// (16, 10, 'sp4_h_r_10') | |
// (16, 10, 'sp4_h_r_7') | |
// (16, 10, 'sp4_r_v_b_38') | |
// (16, 10, 'sp4_v_b_1') | |
// (16, 10, 'sp4_v_b_33') | |
// (16, 11, 'local_g1_4') | |
// (16, 11, 'lutff_5/in_2') | |
// (16, 11, 'lutff_7/in_0') | |
// (16, 11, 'sp4_h_l_42') | |
// (16, 11, 'sp4_r_v_b_27') | |
// (16, 11, 'sp4_v_b_20') | |
// (16, 12, 'local_g2_6') | |
// (16, 12, 'lutff_1/in_1') | |
// (16, 12, 'sp4_h_l_38') | |
// (16, 12, 'sp4_r_v_b_14') | |
// (16, 12, 'sp4_v_b_9') | |
// (16, 13, 'local_g2_3') | |
// (16, 13, 'local_g2_4') | |
// (16, 13, 'lutff_0/in_3') | |
// (16, 13, 'lutff_2/in_0') | |
// (16, 13, 'sp4_h_r_27') | |
// (16, 13, 'sp4_h_r_44') | |
// (16, 13, 'sp4_r_v_b_3') | |
// (17, 9, 'sp4_h_r_38') | |
// (17, 9, 'sp4_v_t_38') | |
// (17, 10, 'sp4_h_r_18') | |
// (17, 10, 'sp4_h_r_23') | |
// (17, 10, 'sp4_v_b_38') | |
// (17, 11, 'sp4_v_b_27') | |
// (17, 12, 'sp4_v_b_14') | |
// (17, 13, 'sp4_h_l_44') | |
// (17, 13, 'sp4_h_r_38') | |
// (17, 13, 'sp4_v_b_3') | |
// (18, 9, 'sp4_h_l_38') | |
// (18, 10, 'sp4_h_r_31') | |
// (18, 10, 'sp4_h_r_34') | |
// (18, 13, 'sp4_h_l_38') | |
// (19, 10, 'sp4_h_r_42') | |
// (19, 10, 'sp4_h_r_47') | |
// (20, 10, 'sp4_h_l_42') | |
// (20, 10, 'sp4_h_l_47') | |
wire n171; | |
// (9, 13, 'sp4_r_v_b_41') | |
// (9, 14, 'sp4_r_v_b_28') | |
// (9, 15, 'neigh_op_tnr_2') | |
// (9, 15, 'sp4_r_v_b_17') | |
// (9, 16, 'neigh_op_rgt_2') | |
// (9, 16, 'sp4_h_r_9') | |
// (9, 16, 'sp4_r_v_b_4') | |
// (9, 17, 'neigh_op_bnr_2') | |
// (10, 12, 'sp4_v_t_41') | |
// (10, 13, 'sp4_r_v_b_40') | |
// (10, 13, 'sp4_v_b_41') | |
// (10, 14, 'local_g3_4') | |
// (10, 14, 'lutff_0/in_1') | |
// (10, 14, 'sp4_r_v_b_29') | |
// (10, 14, 'sp4_v_b_28') | |
// (10, 15, 'neigh_op_top_2') | |
// (10, 15, 'sp4_r_v_b_16') | |
// (10, 15, 'sp4_v_b_17') | |
// (10, 16, 'lutff_2/out') | |
// (10, 16, 'sp4_h_r_20') | |
// (10, 16, 'sp4_r_v_b_5') | |
// (10, 16, 'sp4_v_b_4') | |
// (10, 17, 'neigh_op_bot_2') | |
// (11, 12, 'sp4_v_t_40') | |
// (11, 13, 'sp4_v_b_40') | |
// (11, 14, 'local_g2_5') | |
// (11, 14, 'lutff_1/in_0') | |
// (11, 14, 'sp4_v_b_29') | |
// (11, 15, 'neigh_op_tnl_2') | |
// (11, 15, 'sp4_v_b_16') | |
// (11, 16, 'neigh_op_lft_2') | |
// (11, 16, 'sp4_h_r_33') | |
// (11, 16, 'sp4_v_b_5') | |
// (11, 17, 'neigh_op_bnl_2') | |
// (12, 13, 'sp4_r_v_b_38') | |
// (12, 14, 'sp4_r_v_b_27') | |
// (12, 15, 'sp4_r_v_b_14') | |
// (12, 16, 'sp4_h_r_44') | |
// (12, 16, 'sp4_r_v_b_3') | |
// (13, 12, 'sp4_v_t_38') | |
// (13, 13, 'sp4_v_b_38') | |
// (13, 14, 'local_g2_3') | |
// (13, 14, 'lutff_4/in_3') | |
// (13, 14, 'sp4_v_b_27') | |
// (13, 15, 'sp4_v_b_14') | |
// (13, 16, 'sp4_h_l_44') | |
// (13, 16, 'sp4_v_b_3') | |
reg n172 = 0; | |
// (9, 14, 'neigh_op_tnr_0') | |
// (9, 15, 'neigh_op_rgt_0') | |
// (9, 16, 'neigh_op_bnr_0') | |
// (10, 14, 'neigh_op_top_0') | |
// (10, 15, 'lutff_0/out') | |
// (10, 16, 'local_g0_0') | |
// (10, 16, 'lutff_6/in_2') | |
// (10, 16, 'neigh_op_bot_0') | |
// (11, 14, 'neigh_op_tnl_0') | |
// (11, 15, 'neigh_op_lft_0') | |
// (11, 16, 'neigh_op_bnl_0') | |
reg n173 = 0; | |
// (9, 14, 'neigh_op_tnr_5') | |
// (9, 15, 'neigh_op_rgt_5') | |
// (9, 16, 'neigh_op_bnr_5') | |
// (10, 14, 'neigh_op_top_5') | |
// (10, 15, 'lutff_5/out') | |
// (10, 16, 'local_g1_5') | |
// (10, 16, 'lutff_3/in_1') | |
// (10, 16, 'neigh_op_bot_5') | |
// (11, 14, 'neigh_op_tnl_5') | |
// (11, 15, 'neigh_op_lft_5') | |
// (11, 16, 'neigh_op_bnl_5') | |
reg n174 = 0; | |
// (9, 14, 'neigh_op_tnr_6') | |
// (9, 15, 'neigh_op_rgt_6') | |
// (9, 16, 'neigh_op_bnr_6') | |
// (10, 14, 'neigh_op_top_6') | |
// (10, 15, 'lutff_6/out') | |
// (10, 16, 'local_g0_6') | |
// (10, 16, 'lutff_5/in_1') | |
// (10, 16, 'neigh_op_bot_6') | |
// (11, 14, 'neigh_op_tnl_6') | |
// (11, 15, 'neigh_op_lft_6') | |
// (11, 16, 'neigh_op_bnl_6') | |
reg n175 = 0; | |
// (9, 14, 'neigh_op_tnr_7') | |
// (9, 15, 'neigh_op_rgt_7') | |
// (9, 16, 'neigh_op_bnr_7') | |
// (10, 14, 'neigh_op_top_7') | |
// (10, 15, 'lutff_7/out') | |
// (10, 16, 'local_g0_7') | |
// (10, 16, 'lutff_4/in_1') | |
// (10, 16, 'neigh_op_bot_7') | |
// (11, 14, 'neigh_op_tnl_7') | |
// (11, 15, 'neigh_op_lft_7') | |
// (11, 16, 'neigh_op_bnl_7') | |
wire n176; | |
// (9, 15, 'neigh_op_tnr_3') | |
// (9, 16, 'neigh_op_rgt_3') | |
// (9, 16, 'sp4_h_r_11') | |
// (9, 17, 'neigh_op_bnr_3') | |
// (10, 15, 'local_g0_3') | |
// (10, 15, 'lutff_4/in_3') | |
// (10, 15, 'neigh_op_top_3') | |
// (10, 16, 'lutff_3/out') | |
// (10, 16, 'sp4_h_r_22') | |
// (10, 16, 'sp4_h_r_6') | |
// (10, 17, 'neigh_op_bot_3') | |
// (11, 15, 'neigh_op_tnl_3') | |
// (11, 16, 'neigh_op_lft_3') | |
// (11, 16, 'sp4_h_r_19') | |
// (11, 16, 'sp4_h_r_35') | |
// (11, 17, 'neigh_op_bnl_3') | |
// (12, 13, 'sp4_r_v_b_40') | |
// (12, 14, 'sp4_r_v_b_29') | |
// (12, 15, 'local_g3_0') | |
// (12, 15, 'lutff_1/in_0') | |
// (12, 15, 'sp4_r_v_b_16') | |
// (12, 16, 'sp4_h_r_30') | |
// (12, 16, 'sp4_h_r_46') | |
// (12, 16, 'sp4_r_v_b_5') | |
// (13, 12, 'sp4_v_t_40') | |
// (13, 13, 'sp4_r_v_b_37') | |
// (13, 13, 'sp4_v_b_40') | |
// (13, 14, 'sp4_r_v_b_24') | |
// (13, 14, 'sp4_v_b_29') | |
// (13, 15, 'sp4_r_v_b_13') | |
// (13, 15, 'sp4_v_b_16') | |
// (13, 16, 'sp4_h_l_46') | |
// (13, 16, 'sp4_h_r_43') | |
// (13, 16, 'sp4_r_v_b_0') | |
// (13, 16, 'sp4_v_b_5') | |
// (14, 12, 'sp4_v_t_37') | |
// (14, 13, 'sp4_v_b_37') | |
// (14, 14, 'sp4_v_b_24') | |
// (14, 15, 'local_g1_5') | |
// (14, 15, 'lutff_4/in_0') | |
// (14, 15, 'sp4_v_b_13') | |
// (14, 16, 'sp4_h_l_43') | |
// (14, 16, 'sp4_v_b_0') | |
wire n177; | |
// (9, 15, 'neigh_op_tnr_6') | |
// (9, 16, 'neigh_op_rgt_6') | |
// (9, 16, 'sp4_h_r_1') | |
// (9, 17, 'neigh_op_bnr_6') | |
// (10, 15, 'neigh_op_top_6') | |
// (10, 16, 'lutff_6/out') | |
// (10, 16, 'sp4_h_r_12') | |
// (10, 17, 'neigh_op_bot_6') | |
// (11, 15, 'local_g2_6') | |
// (11, 15, 'lutff_5/in_3') | |
// (11, 15, 'neigh_op_tnl_6') | |
// (11, 16, 'neigh_op_lft_6') | |
// (11, 16, 'sp4_h_r_25') | |
// (11, 17, 'neigh_op_bnl_6') | |
// (12, 13, 'sp4_r_v_b_36') | |
// (12, 14, 'sp4_r_v_b_25') | |
// (12, 15, 'local_g2_4') | |
// (12, 15, 'lutff_5/in_1') | |
// (12, 15, 'sp4_r_v_b_12') | |
// (12, 16, 'sp4_h_r_36') | |
// (12, 16, 'sp4_r_v_b_1') | |
// (13, 12, 'sp4_v_t_36') | |
// (13, 13, 'sp4_v_b_36') | |
// (13, 14, 'sp4_v_b_25') | |
// (13, 15, 'local_g1_4') | |
// (13, 15, 'lutff_7/in_2') | |
// (13, 15, 'sp4_v_b_12') | |
// (13, 16, 'sp4_h_l_36') | |
// (13, 16, 'sp4_v_b_1') | |
wire n178; | |
// (9, 15, 'sp4_h_r_11') | |
// (10, 15, 'local_g0_6') | |
// (10, 15, 'lutff_1/in_3') | |
// (10, 15, 'sp4_h_r_22') | |
// (11, 14, 'neigh_op_tnr_7') | |
// (11, 15, 'neigh_op_rgt_7') | |
// (11, 15, 'sp4_h_r_35') | |
// (11, 16, 'neigh_op_bnr_7') | |
// (12, 14, 'neigh_op_top_7') | |
// (12, 15, 'lutff_7/out') | |
// (12, 15, 'sp4_h_r_46') | |
// (12, 16, 'neigh_op_bot_7') | |
// (13, 14, 'neigh_op_tnl_7') | |
// (13, 15, 'neigh_op_lft_7') | |
// (13, 15, 'sp4_h_l_46') | |
// (13, 16, 'neigh_op_bnl_7') | |
wire n179; | |
// (10, 7, 'sp4_r_v_b_41') | |
// (10, 8, 'sp4_r_v_b_28') | |
// (10, 9, 'sp4_r_v_b_17') | |
// (10, 10, 'sp4_r_v_b_4') | |
// (11, 6, 'sp4_v_t_41') | |
// (11, 7, 'sp4_v_b_41') | |
// (11, 8, 'sp4_v_b_28') | |
// (11, 9, 'local_g0_1') | |
// (11, 9, 'lutff_6/in_1') | |
// (11, 9, 'sp4_v_b_17') | |
// (11, 10, 'sp4_h_r_11') | |
// (11, 10, 'sp4_v_b_4') | |
// (11, 12, 'sp4_h_r_9') | |
// (11, 14, 'local_g0_4') | |
// (11, 14, 'lutff_1/in_3') | |
// (11, 14, 'sp4_h_r_4') | |
// (12, 10, 'local_g1_4') | |
// (12, 10, 'lutff_2/in_1') | |
// (12, 10, 'sp4_h_r_22') | |
// (12, 10, 'sp4_h_r_4') | |
// (12, 12, 'local_g1_4') | |
// (12, 12, 'lutff_0/in_3') | |
// (12, 12, 'lutff_7/in_2') | |
// (12, 12, 'sp4_h_r_20') | |
// (12, 14, 'sp4_h_r_17') | |
// (12, 14, 'sp4_h_r_3') | |
// (13, 10, 'sp4_h_r_17') | |
// (13, 10, 'sp4_h_r_35') | |
// (13, 12, 'sp4_h_r_33') | |
// (13, 14, 'local_g0_6') | |
// (13, 14, 'lutff_4/in_0') | |
// (13, 14, 'sp4_h_r_14') | |
// (13, 14, 'sp4_h_r_28') | |
// (14, 10, 'sp4_h_r_28') | |
// (14, 10, 'sp4_h_r_46') | |
// (14, 11, 'sp4_r_v_b_46') | |
// (14, 12, 'neigh_op_tnr_3') | |
// (14, 12, 'sp4_h_r_44') | |
// (14, 12, 'sp4_r_v_b_35') | |
// (14, 13, 'neigh_op_rgt_3') | |
// (14, 13, 'sp4_r_v_b_22') | |
// (14, 13, 'sp4_r_v_b_38') | |
// (14, 14, 'neigh_op_bnr_3') | |
// (14, 14, 'sp4_h_r_27') | |
// (14, 14, 'sp4_h_r_41') | |
// (14, 14, 'sp4_r_v_b_11') | |
// (14, 14, 'sp4_r_v_b_27') | |
// (14, 15, 'sp4_r_v_b_14') | |
// (14, 16, 'sp4_r_v_b_3') | |
// (15, 10, 'local_g3_2') | |
// (15, 10, 'lutff_1/in_2') | |
// (15, 10, 'sp4_h_l_46') | |
// (15, 10, 'sp4_h_r_41') | |
// (15, 10, 'sp4_r_v_b_42') | |
// (15, 10, 'sp4_v_t_46') | |
// (15, 11, 'sp4_r_v_b_31') | |
// (15, 11, 'sp4_r_v_b_47') | |
// (15, 11, 'sp4_v_b_46') | |
// (15, 12, 'neigh_op_top_3') | |
// (15, 12, 'sp4_h_l_44') | |
// (15, 12, 'sp4_r_v_b_18') | |
// (15, 12, 'sp4_r_v_b_34') | |
// (15, 12, 'sp4_v_b_35') | |
// (15, 12, 'sp4_v_t_38') | |
// (15, 13, 'lutff_3/out') | |
// (15, 13, 'sp4_r_v_b_23') | |
// (15, 13, 'sp4_r_v_b_7') | |
// (15, 13, 'sp4_v_b_22') | |
// (15, 13, 'sp4_v_b_38') | |
// (15, 14, 'neigh_op_bot_3') | |
// (15, 14, 'sp4_h_l_41') | |
// (15, 14, 'sp4_h_r_38') | |
// (15, 14, 'sp4_r_v_b_10') | |
// (15, 14, 'sp4_v_b_11') | |
// (15, 14, 'sp4_v_b_27') | |
// (15, 15, 'sp4_v_b_14') | |
// (15, 16, 'sp4_v_b_3') | |
// (16, 9, 'sp4_v_t_42') | |
// (16, 10, 'sp4_h_l_41') | |
// (16, 10, 'sp4_v_b_42') | |
// (16, 10, 'sp4_v_t_47') | |
// (16, 11, 'sp4_v_b_31') | |
// (16, 11, 'sp4_v_b_47') | |
// (16, 12, 'neigh_op_tnl_3') | |
// (16, 12, 'sp4_v_b_18') | |
// (16, 12, 'sp4_v_b_34') | |
// (16, 13, 'neigh_op_lft_3') | |
// (16, 13, 'sp4_v_b_23') | |
// (16, 13, 'sp4_v_b_7') | |
// (16, 14, 'neigh_op_bnl_3') | |
// (16, 14, 'sp4_h_l_38') | |
// (16, 14, 'sp4_v_b_10') | |
wire n180; | |
// (10, 8, 'neigh_op_tnr_1') | |
// (10, 9, 'neigh_op_rgt_1') | |
// (10, 10, 'neigh_op_bnr_1') | |
// (11, 8, 'neigh_op_top_1') | |
// (11, 9, 'local_g1_1') | |
// (11, 9, 'lutff_1/out') | |
// (11, 9, 'lutff_7/in_3') | |
// (11, 10, 'neigh_op_bot_1') | |
// (12, 8, 'neigh_op_tnl_1') | |
// (12, 9, 'neigh_op_lft_1') | |
// (12, 10, 'neigh_op_bnl_1') | |
wire n181; | |
// (10, 8, 'neigh_op_tnr_3') | |
// (10, 9, 'neigh_op_rgt_3') | |
// (10, 10, 'neigh_op_bnr_3') | |
// (11, 8, 'neigh_op_top_3') | |
// (11, 9, 'local_g1_3') | |
// (11, 9, 'lutff_3/out') | |
// (11, 9, 'lutff_4/in_2') | |
// (11, 9, 'sp4_h_r_6') | |
// (11, 9, 'sp4_r_v_b_39') | |
// (11, 10, 'local_g0_3') | |
// (11, 10, 'lutff_6/in_3') | |
// (11, 10, 'neigh_op_bot_3') | |
// (11, 10, 'sp4_r_v_b_26') | |
// (11, 11, 'sp4_r_v_b_15') | |
// (11, 12, 'sp4_r_v_b_2') | |
// (11, 13, 'sp4_r_v_b_40') | |
// (11, 14, 'sp4_r_v_b_29') | |
// (11, 15, 'sp4_r_v_b_16') | |
// (11, 16, 'sp4_r_v_b_5') | |
// (12, 8, 'neigh_op_tnl_3') | |
// (12, 8, 'sp4_v_t_39') | |
// (12, 9, 'local_g0_3') | |
// (12, 9, 'lutff_6/in_3') | |
// (12, 9, 'neigh_op_lft_3') | |
// (12, 9, 'sp4_h_r_19') | |
// (12, 9, 'sp4_v_b_39') | |
// (12, 10, 'neigh_op_bnl_3') | |
// (12, 10, 'sp4_v_b_26') | |
// (12, 11, 'sp4_v_b_15') | |
// (12, 12, 'local_g0_2') | |
// (12, 12, 'lutff_7/in_1') | |
// (12, 12, 'sp4_h_r_8') | |
// (12, 12, 'sp4_v_b_2') | |
// (12, 12, 'sp4_v_t_40') | |
// (12, 13, 'local_g2_0') | |
// (12, 13, 'lutff_5/in_3') | |
// (12, 13, 'sp4_v_b_40') | |
// (12, 14, 'sp4_v_b_29') | |
// (12, 15, 'sp4_v_b_16') | |
// (12, 16, 'sp4_v_b_5') | |
// (13, 9, 'local_g2_6') | |
// (13, 9, 'lutff_4/in_2') | |
// (13, 9, 'sp4_h_r_30') | |
// (13, 12, 'local_g0_5') | |
// (13, 12, 'lutff_6/in_3') | |
// (13, 12, 'sp4_h_r_21') | |
// (14, 9, 'local_g2_3') | |
// (14, 9, 'lutff_6/in_3') | |
// (14, 9, 'sp4_h_r_43') | |
// (14, 10, 'sp4_r_v_b_43') | |
// (14, 10, 'sp4_r_v_b_46') | |
// (14, 11, 'sp4_r_v_b_30') | |
// (14, 11, 'sp4_r_v_b_35') | |
// (14, 12, 'local_g3_3') | |
// (14, 12, 'lutff_1/in_3') | |
// (14, 12, 'lutff_3/in_1') | |
// (14, 12, 'sp4_h_r_32') | |
// (14, 12, 'sp4_r_v_b_19') | |
// (14, 12, 'sp4_r_v_b_22') | |
// (14, 13, 'sp4_r_v_b_11') | |
// (14, 13, 'sp4_r_v_b_6') | |
// (15, 9, 'local_g1_6') | |
// (15, 9, 'lutff_0/in_1') | |
// (15, 9, 'sp4_h_l_43') | |
// (15, 9, 'sp4_h_r_6') | |
// (15, 9, 'sp4_v_t_43') | |
// (15, 9, 'sp4_v_t_46') | |
// (15, 10, 'local_g3_3') | |
// (15, 10, 'lutff_7/in_3') | |
// (15, 10, 'sp4_v_b_43') | |
// (15, 10, 'sp4_v_b_46') | |
// (15, 11, 'local_g2_3') | |
// (15, 11, 'lutff_2/in_3') | |
// (15, 11, 'lutff_7/in_0') | |
// (15, 11, 'sp4_v_b_30') | |
// (15, 11, 'sp4_v_b_35') | |
// (15, 12, 'local_g1_3') | |
// (15, 12, 'lutff_5/in_1') | |
// (15, 12, 'sp4_h_r_45') | |
// (15, 12, 'sp4_v_b_19') | |
// (15, 12, 'sp4_v_b_22') | |
// (15, 13, 'local_g1_3') | |
// (15, 13, 'lutff_2/in_0') | |
// (15, 13, 'sp4_v_b_11') | |
// (15, 13, 'sp4_v_b_6') | |
// (16, 9, 'sp4_h_r_19') | |
// (16, 12, 'sp4_h_l_45') | |
// (17, 9, 'sp4_h_r_30') | |
// (18, 9, 'sp4_h_r_43') | |
// (19, 9, 'sp4_h_l_43') | |
wire n182; | |
// (10, 8, 'neigh_op_tnr_4') | |
// (10, 9, 'neigh_op_rgt_4') | |
// (10, 10, 'neigh_op_bnr_4') | |
// (11, 8, 'neigh_op_top_4') | |
// (11, 9, 'local_g3_4') | |
// (11, 9, 'lutff_4/out') | |
// (11, 9, 'lutff_7/in_2') | |
// (11, 10, 'neigh_op_bot_4') | |
// (12, 8, 'neigh_op_tnl_4') | |
// (12, 9, 'neigh_op_lft_4') | |
// (12, 10, 'neigh_op_bnl_4') | |
wire n183; | |
// (10, 8, 'neigh_op_tnr_6') | |
// (10, 9, 'neigh_op_rgt_6') | |
// (10, 10, 'neigh_op_bnr_6') | |
// (11, 8, 'neigh_op_top_6') | |
// (11, 9, 'local_g1_6') | |
// (11, 9, 'lutff_6/out') | |
// (11, 9, 'lutff_7/in_0') | |
// (11, 10, 'neigh_op_bot_6') | |
// (12, 8, 'neigh_op_tnl_6') | |
// (12, 9, 'neigh_op_lft_6') | |
// (12, 10, 'neigh_op_bnl_6') | |
wire n184; | |
// (10, 8, 'neigh_op_tnr_7') | |
// (10, 9, 'neigh_op_rgt_7') | |
// (10, 9, 'sp4_r_v_b_46') | |
// (10, 10, 'neigh_op_bnr_7') | |
// (10, 10, 'sp4_r_v_b_35') | |
// (10, 11, 'sp4_r_v_b_22') | |
// (10, 12, 'sp4_r_v_b_11') | |
// (11, 8, 'neigh_op_top_7') | |
// (11, 8, 'sp4_v_t_46') | |
// (11, 9, 'lutff_7/out') | |
// (11, 9, 'sp4_v_b_46') | |
// (11, 10, 'neigh_op_bot_7') | |
// (11, 10, 'sp4_v_b_35') | |
// (11, 11, 'sp4_v_b_22') | |
// (11, 12, 'local_g0_3') | |
// (11, 12, 'lutff_1/in_0') | |
// (11, 12, 'sp4_v_b_11') | |
// (12, 8, 'neigh_op_tnl_7') | |
// (12, 9, 'neigh_op_lft_7') | |
// (12, 10, 'neigh_op_bnl_7') | |
wire n185; | |
// (10, 8, 'sp4_r_v_b_45') | |
// (10, 9, 'sp4_r_v_b_32') | |
// (10, 10, 'local_g3_5') | |
// (10, 10, 'lutff_4/in_0') | |
// (10, 10, 'sp4_r_v_b_21') | |
// (10, 11, 'sp4_r_v_b_8') | |
// (11, 7, 'sp4_v_t_45') | |
// (11, 8, 'sp4_v_b_45') | |
// (11, 9, 'sp4_v_b_32') | |
// (11, 10, 'sp4_v_b_21') | |
// (11, 11, 'sp4_h_r_8') | |
// (11, 11, 'sp4_v_b_8') | |
// (12, 10, 'neigh_op_tnr_0') | |
// (12, 11, 'neigh_op_rgt_0') | |
// (12, 11, 'sp4_h_r_21') | |
// (12, 12, 'neigh_op_bnr_0') | |
// (13, 10, 'neigh_op_top_0') | |
// (13, 11, 'lutff_0/out') | |
// (13, 11, 'sp4_h_r_32') | |
// (13, 12, 'neigh_op_bot_0') | |
// (14, 10, 'neigh_op_tnl_0') | |
// (14, 11, 'neigh_op_lft_0') | |
// (14, 11, 'sp4_h_r_45') | |
// (14, 12, 'neigh_op_bnl_0') | |
// (15, 11, 'sp4_h_l_45') | |
wire n186; | |
// (10, 9, 'neigh_op_tnr_0') | |
// (10, 10, 'neigh_op_rgt_0') | |
// (10, 11, 'neigh_op_bnr_0') | |
// (10, 11, 'sp4_r_v_b_43') | |
// (10, 12, 'sp4_r_v_b_30') | |
// (10, 13, 'sp4_r_v_b_19') | |
// (10, 14, 'sp4_r_v_b_6') | |
// (11, 9, 'neigh_op_top_0') | |
// (11, 10, 'lutff_0/out') | |
// (11, 10, 'sp4_h_r_0') | |
// (11, 10, 'sp4_v_t_43') | |
// (11, 11, 'neigh_op_bot_0') | |
// (11, 11, 'sp4_v_b_43') | |
// (11, 12, 'sp4_v_b_30') | |
// (11, 13, 'local_g0_3') | |
// (11, 13, 'lutff_5/in_2') | |
// (11, 13, 'sp4_v_b_19') | |
// (11, 14, 'sp4_v_b_6') | |
// (12, 9, 'neigh_op_tnl_0') | |
// (12, 10, 'neigh_op_lft_0') | |
// (12, 10, 'sp4_h_r_13') | |
// (12, 11, 'neigh_op_bnl_0') | |
// (13, 10, 'sp4_h_r_24') | |
// (14, 10, 'sp4_h_r_37') | |
// (15, 10, 'sp4_h_l_37') | |
wire n187; | |
// (10, 9, 'neigh_op_tnr_1') | |
// (10, 10, 'neigh_op_rgt_1') | |
// (10, 11, 'neigh_op_bnr_1') | |
// (10, 11, 'sp4_r_v_b_45') | |
// (10, 12, 'sp4_r_v_b_32') | |
// (10, 13, 'sp4_r_v_b_21') | |
// (10, 14, 'sp4_r_v_b_8') | |
// (11, 9, 'neigh_op_top_1') | |
// (11, 10, 'lutff_1/out') | |
// (11, 10, 'sp4_h_r_2') | |
// (11, 10, 'sp4_v_t_45') | |
// (11, 11, 'neigh_op_bot_1') | |
// (11, 11, 'sp4_v_b_45') | |
// (11, 12, 'sp4_v_b_32') | |
// (11, 13, 'local_g1_5') | |
// (11, 13, 'lutff_0/in_2') | |
// (11, 13, 'sp4_v_b_21') | |
// (11, 14, 'sp4_v_b_8') | |
// (12, 9, 'neigh_op_tnl_1') | |
// (12, 10, 'neigh_op_lft_1') | |
// (12, 10, 'sp4_h_r_15') | |
// (12, 11, 'neigh_op_bnl_1') | |
// (13, 10, 'sp4_h_r_26') | |
// (14, 10, 'sp4_h_r_39') | |
// (15, 10, 'sp4_h_l_39') | |
wire n188; | |
// (10, 9, 'neigh_op_tnr_2') | |
// (10, 10, 'neigh_op_rgt_2') | |
// (10, 11, 'neigh_op_bnr_2') | |
// (11, 9, 'neigh_op_top_2') | |
// (11, 10, 'lutff_2/out') | |
// (11, 10, 'sp4_r_v_b_37') | |
// (11, 11, 'neigh_op_bot_2') | |
// (11, 11, 'sp4_r_v_b_24') | |
// (11, 12, 'sp4_r_v_b_13') | |
// (11, 13, 'sp4_r_v_b_0') | |
// (12, 9, 'neigh_op_tnl_2') | |
// (12, 9, 'sp4_v_t_37') | |
// (12, 10, 'neigh_op_lft_2') | |
// (12, 10, 'sp4_v_b_37') | |
// (12, 11, 'neigh_op_bnl_2') | |
// (12, 11, 'sp4_v_b_24') | |
// (12, 12, 'local_g0_5') | |
// (12, 12, 'lutff_4/in_3') | |
// (12, 12, 'sp4_v_b_13') | |
// (12, 13, 'sp4_v_b_0') | |
wire n189; | |
// (10, 9, 'neigh_op_tnr_3') | |
// (10, 10, 'neigh_op_rgt_3') | |
// (10, 11, 'neigh_op_bnr_3') | |
// (11, 9, 'neigh_op_top_3') | |
// (11, 10, 'local_g2_3') | |
// (11, 10, 'lutff_2/in_1') | |
// (11, 10, 'lutff_3/out') | |
// (11, 11, 'neigh_op_bot_3') | |
// (12, 9, 'neigh_op_tnl_3') | |
// (12, 10, 'neigh_op_lft_3') | |
// (12, 11, 'neigh_op_bnl_3') | |
wire n190; | |
// (10, 9, 'neigh_op_tnr_4') | |
// (10, 10, 'neigh_op_rgt_4') | |
// (10, 11, 'neigh_op_bnr_4') | |
// (11, 9, 'neigh_op_top_4') | |
// (11, 10, 'local_g0_4') | |
// (11, 10, 'lutff_2/in_0') | |
// (11, 10, 'lutff_4/out') | |
// (11, 11, 'neigh_op_bot_4') | |
// (12, 9, 'neigh_op_tnl_4') | |
// (12, 10, 'neigh_op_lft_4') | |
// (12, 11, 'neigh_op_bnl_4') | |
wire n191; | |
// (10, 9, 'neigh_op_tnr_5') | |
// (10, 10, 'neigh_op_rgt_5') | |
// (10, 10, 'sp4_r_v_b_42') | |
// (10, 11, 'neigh_op_bnr_5') | |
// (10, 11, 'sp4_r_v_b_31') | |
// (10, 12, 'sp4_r_v_b_18') | |
// (10, 13, 'sp4_r_v_b_7') | |
// (11, 9, 'neigh_op_top_5') | |
// (11, 9, 'sp4_v_t_42') | |
// (11, 10, 'lutff_5/out') | |
// (11, 10, 'sp4_v_b_42') | |
// (11, 11, 'neigh_op_bot_5') | |
// (11, 11, 'sp4_v_b_31') | |
// (11, 12, 'sp4_v_b_18') | |
// (11, 13, 'local_g1_7') | |
// (11, 13, 'lutff_3/in_3') | |
// (11, 13, 'sp4_v_b_7') | |
// (12, 9, 'neigh_op_tnl_5') | |
// (12, 10, 'neigh_op_lft_5') | |
// (12, 11, 'neigh_op_bnl_5') | |
wire n192; | |
// (10, 9, 'neigh_op_tnr_6') | |
// (10, 10, 'neigh_op_rgt_6') | |
// (10, 11, 'neigh_op_bnr_6') | |
// (11, 9, 'neigh_op_top_6') | |
// (11, 10, 'local_g2_6') | |
// (11, 10, 'lutff_2/in_2') | |
// (11, 10, 'lutff_6/out') | |
// (11, 11, 'neigh_op_bot_6') | |
// (12, 9, 'neigh_op_tnl_6') | |
// (12, 10, 'neigh_op_lft_6') | |
// (12, 11, 'neigh_op_bnl_6') | |
wire n193; | |
// (10, 9, 'neigh_op_tnr_7') | |
// (10, 9, 'sp4_r_v_b_43') | |
// (10, 10, 'neigh_op_rgt_7') | |
// (10, 10, 'sp4_r_v_b_30') | |
// (10, 11, 'neigh_op_bnr_7') | |
// (10, 11, 'sp4_r_v_b_19') | |
// (10, 12, 'sp4_r_v_b_6') | |
// (11, 8, 'sp4_v_t_43') | |
// (11, 9, 'neigh_op_top_7') | |
// (11, 9, 'sp4_v_b_43') | |
// (11, 10, 'lutff_7/out') | |
// (11, 10, 'sp4_v_b_30') | |
// (11, 11, 'neigh_op_bot_7') | |
// (11, 11, 'sp4_v_b_19') | |
// (11, 12, 'local_g0_6') | |
// (11, 12, 'lutff_0/in_2') | |
// (11, 12, 'sp4_v_b_6') | |
// (12, 9, 'neigh_op_tnl_7') | |
// (12, 10, 'neigh_op_lft_7') | |
// (12, 11, 'neigh_op_bnl_7') | |
wire n194; | |
// (10, 10, 'local_g1_6') | |
// (10, 10, 'lutff_4/in_1') | |
// (10, 10, 'sp4_h_r_6') | |
// (11, 9, 'neigh_op_tnr_7') | |
// (11, 10, 'neigh_op_rgt_7') | |
// (11, 10, 'sp4_h_r_19') | |
// (11, 11, 'neigh_op_bnr_7') | |
// (12, 9, 'neigh_op_top_7') | |
// (12, 10, 'lutff_7/out') | |
// (12, 10, 'sp4_h_r_30') | |
// (12, 11, 'neigh_op_bot_7') | |
// (13, 9, 'neigh_op_tnl_7') | |
// (13, 10, 'neigh_op_lft_7') | |
// (13, 10, 'sp4_h_r_43') | |
// (13, 11, 'neigh_op_bnl_7') | |
// (14, 10, 'sp4_h_l_43') | |
wire n195; | |
// (10, 10, 'neigh_op_tnr_1') | |
// (10, 11, 'neigh_op_rgt_1') | |
// (10, 12, 'neigh_op_bnr_1') | |
// (11, 10, 'neigh_op_top_1') | |
// (11, 11, 'lutff_1/out') | |
// (11, 12, 'local_g1_1') | |
// (11, 12, 'lutff_3/in_3') | |
// (11, 12, 'neigh_op_bot_1') | |
// (12, 10, 'neigh_op_tnl_1') | |
// (12, 11, 'neigh_op_lft_1') | |
// (12, 12, 'neigh_op_bnl_1') | |
wire n196; | |
// (10, 10, 'neigh_op_tnr_2') | |
// (10, 11, 'neigh_op_rgt_2') | |
// (10, 11, 'sp4_h_r_9') | |
// (10, 12, 'neigh_op_bnr_2') | |
// (11, 10, 'neigh_op_top_2') | |
// (11, 11, 'lutff_2/out') | |
// (11, 11, 'sp4_h_r_20') | |
// (11, 12, 'neigh_op_bot_2') | |
// (12, 10, 'neigh_op_tnl_2') | |
// (12, 11, 'neigh_op_lft_2') | |
// (12, 11, 'sp4_h_r_33') | |
// (12, 12, 'neigh_op_bnl_2') | |
// (13, 8, 'sp4_r_v_b_38') | |
// (13, 9, 'sp4_r_v_b_27') | |
// (13, 10, 'local_g2_6') | |
// (13, 10, 'lutff_0/in_2') | |
// (13, 10, 'lutff_1/in_3') | |
// (13, 10, 'sp4_r_v_b_14') | |
// (13, 11, 'sp4_h_r_44') | |
// (13, 11, 'sp4_r_v_b_3') | |
// (14, 7, 'sp4_v_t_38') | |
// (14, 8, 'sp4_v_b_38') | |
// (14, 9, 'sp4_v_b_27') | |
// (14, 10, 'sp4_v_b_14') | |
// (14, 11, 'sp4_h_l_44') | |
// (14, 11, 'sp4_v_b_3') | |
wire n197; | |
// (10, 10, 'neigh_op_tnr_3') | |
// (10, 11, 'neigh_op_rgt_3') | |
// (10, 12, 'neigh_op_bnr_3') | |
// (11, 10, 'neigh_op_top_3') | |
// (11, 11, 'local_g0_3') | |
// (11, 11, 'lutff_3/out') | |
// (11, 11, 'lutff_4/in_1') | |
// (11, 12, 'neigh_op_bot_3') | |
// (12, 10, 'neigh_op_tnl_3') | |
// (12, 11, 'neigh_op_lft_3') | |
// (12, 12, 'neigh_op_bnl_3') | |
wire n198; | |
// (10, 10, 'neigh_op_tnr_4') | |
// (10, 11, 'neigh_op_rgt_4') | |
// (10, 12, 'neigh_op_bnr_4') | |
// (11, 10, 'neigh_op_top_4') | |
// (11, 11, 'lutff_4/out') | |
// (11, 11, 'sp12_h_r_0') | |
// (11, 12, 'neigh_op_bot_4') | |
// (12, 10, 'neigh_op_tnl_4') | |
// (12, 11, 'neigh_op_lft_4') | |
// (12, 11, 'sp12_h_r_3') | |
// (12, 12, 'neigh_op_bnl_4') | |
// (13, 11, 'sp12_h_r_4') | |
// (14, 11, 'sp12_h_r_7') | |
// (15, 11, 'sp12_h_r_8') | |
// (16, 11, 'local_g1_3') | |
// (16, 11, 'lutff_2/in_0') | |
// (16, 11, 'sp12_h_r_11') | |
// (17, 11, 'sp12_h_r_12') | |
// (18, 11, 'sp12_h_r_15') | |
// (19, 11, 'sp12_h_r_16') | |
// (20, 11, 'sp12_h_r_19') | |
// (21, 11, 'sp12_h_r_20') | |
// (22, 11, 'sp12_h_r_23') | |
// (23, 11, 'sp12_h_l_23') | |
wire n199; | |
// (10, 10, 'neigh_op_tnr_5') | |
// (10, 11, 'neigh_op_rgt_5') | |
// (10, 12, 'neigh_op_bnr_5') | |
// (11, 10, 'neigh_op_top_5') | |
// (11, 11, 'local_g0_5') | |
// (11, 11, 'lutff_5/out') | |
// (11, 11, 'lutff_6/in_3') | |
// (11, 12, 'neigh_op_bot_5') | |
// (12, 10, 'neigh_op_tnl_5') | |
// (12, 11, 'neigh_op_lft_5') | |
// (12, 12, 'neigh_op_bnl_5') | |
wire n200; | |
// (10, 10, 'neigh_op_tnr_7') | |
// (10, 11, 'neigh_op_rgt_7') | |
// (10, 12, 'neigh_op_bnr_7') | |
// (11, 10, 'neigh_op_top_7') | |
// (11, 11, 'local_g2_7') | |
// (11, 11, 'lutff_0/in_1') | |
// (11, 11, 'lutff_7/out') | |
// (11, 12, 'neigh_op_bot_7') | |
// (12, 10, 'neigh_op_tnl_7') | |
// (12, 11, 'neigh_op_lft_7') | |
// (12, 12, 'neigh_op_bnl_7') | |
wire n201; | |
// (10, 10, 'sp4_h_r_1') | |
// (11, 10, 'local_g1_4') | |
// (11, 10, 'lutff_7/in_0') | |
// (11, 10, 'sp4_h_r_12') | |
// (12, 9, 'neigh_op_tnr_2') | |
// (12, 10, 'neigh_op_rgt_2') | |
// (12, 10, 'sp4_h_r_25') | |
// (12, 11, 'neigh_op_bnr_2') | |
// (13, 9, 'neigh_op_top_2') | |
// (13, 10, 'lutff_2/out') | |
// (13, 10, 'sp4_h_r_36') | |
// (13, 11, 'neigh_op_bot_2') | |
// (14, 9, 'neigh_op_tnl_2') | |
// (14, 10, 'neigh_op_lft_2') | |
// (14, 10, 'sp4_h_l_36') | |
// (14, 11, 'neigh_op_bnl_2') | |
wire n202; | |
// (10, 10, 'sp4_h_r_3') | |
// (11, 10, 'local_g0_6') | |
// (11, 10, 'lutff_1/in_3') | |
// (11, 10, 'sp4_h_r_14') | |
// (12, 9, 'neigh_op_tnr_3') | |
// (12, 10, 'neigh_op_rgt_3') | |
// (12, 10, 'sp4_h_r_27') | |
// (12, 11, 'neigh_op_bnr_3') | |
// (13, 9, 'neigh_op_top_3') | |
// (13, 10, 'lutff_3/out') | |
// (13, 10, 'sp4_h_r_38') | |
// (13, 11, 'neigh_op_bot_3') | |
// (14, 9, 'neigh_op_tnl_3') | |
// (14, 10, 'neigh_op_lft_3') | |
// (14, 10, 'sp4_h_l_38') | |
// (14, 11, 'neigh_op_bnl_3') | |
wire n203; | |
// (10, 10, 'sp4_h_r_4') | |
// (11, 10, 'local_g1_1') | |
// (11, 10, 'lutff_4/in_2') | |
// (11, 10, 'sp4_h_r_17') | |
// (12, 10, 'local_g3_4') | |
// (12, 10, 'lutff_5/in_2') | |
// (12, 10, 'sp4_h_r_28') | |
// (12, 13, 'sp4_r_v_b_44') | |
// (12, 14, 'sp4_r_v_b_33') | |
// (12, 15, 'local_g3_4') | |
// (12, 15, 'lutff_6/in_3') | |
// (12, 15, 'sp4_r_v_b_20') | |
// (12, 16, 'sp4_r_v_b_9') | |
// (13, 10, 'sp4_h_r_41') | |
// (13, 12, 'sp4_h_r_9') | |
// (13, 12, 'sp4_v_t_44') | |
// (13, 13, 'sp4_v_b_44') | |
// (13, 14, 'sp4_v_b_33') | |
// (13, 15, 'sp4_v_b_20') | |
// (13, 16, 'sp4_v_b_9') | |
// (14, 10, 'sp4_h_l_41') | |
// (14, 10, 'sp4_h_r_8') | |
// (14, 11, 'sp4_r_v_b_40') | |
// (14, 12, 'sp4_h_r_20') | |
// (14, 12, 'sp4_r_v_b_29') | |
// (14, 13, 'sp4_r_v_b_16') | |
// (14, 14, 'sp4_r_v_b_5') | |
// (15, 8, 'sp4_r_v_b_40') | |
// (15, 9, 'local_g2_0') | |
// (15, 9, 'lutff_0/in_0') | |
// (15, 9, 'lutff_2/in_0') | |
// (15, 9, 'neigh_op_tnr_0') | |
// (15, 9, 'sp4_r_v_b_29') | |
// (15, 10, 'neigh_op_rgt_0') | |
// (15, 10, 'sp4_h_r_21') | |
// (15, 10, 'sp4_h_r_5') | |
// (15, 10, 'sp4_r_v_b_16') | |
// (15, 10, 'sp4_v_t_40') | |
// (15, 11, 'neigh_op_bnr_0') | |
// (15, 11, 'sp4_r_v_b_5') | |
// (15, 11, 'sp4_v_b_40') | |
// (15, 12, 'sp4_h_r_33') | |
// (15, 12, 'sp4_r_v_b_36') | |
// (15, 12, 'sp4_v_b_29') | |
// (15, 13, 'local_g0_0') | |
// (15, 13, 'lutff_4/in_0') | |
// (15, 13, 'sp4_r_v_b_25') | |
// (15, 13, 'sp4_v_b_16') | |
// (15, 14, 'sp4_r_v_b_12') | |
// (15, 14, 'sp4_v_b_5') | |
// (15, 15, 'local_g1_1') | |
// (15, 15, 'lutff_6/in_0') | |
// (15, 15, 'sp4_r_v_b_1') | |
// (16, 7, 'sp4_v_t_40') | |
// (16, 8, 'sp4_v_b_40') | |
// (16, 9, 'local_g1_0') | |
// (16, 9, 'lutff_6/in_3') | |
// (16, 9, 'neigh_op_top_0') | |
// (16, 9, 'sp4_r_v_b_44') | |
// (16, 9, 'sp4_v_b_29') | |
// (16, 10, 'lutff_0/out') | |
// (16, 10, 'sp4_h_r_16') | |
// (16, 10, 'sp4_h_r_32') | |
// (16, 10, 'sp4_r_v_b_33') | |
// (16, 10, 'sp4_v_b_16') | |
// (16, 11, 'neigh_op_bot_0') | |
// (16, 11, 'sp4_r_v_b_20') | |
// (16, 11, 'sp4_v_b_5') | |
// (16, 11, 'sp4_v_t_36') | |
// (16, 12, 'sp4_h_r_44') | |
// (16, 12, 'sp4_r_v_b_9') | |
// (16, 12, 'sp4_v_b_36') | |
// (16, 13, 'sp4_v_b_25') | |
// (16, 14, 'sp4_v_b_12') | |
// (16, 15, 'sp4_v_b_1') | |
// (17, 8, 'sp4_v_t_44') | |
// (17, 9, 'neigh_op_tnl_0') | |
// (17, 9, 'sp4_v_b_44') | |
// (17, 10, 'neigh_op_lft_0') | |
// (17, 10, 'sp4_h_r_29') | |
// (17, 10, 'sp4_h_r_45') | |
// (17, 10, 'sp4_v_b_33') | |
// (17, 11, 'neigh_op_bnl_0') | |
// (17, 11, 'sp4_v_b_20') | |
// (17, 12, 'sp4_h_l_44') | |
// (17, 12, 'sp4_v_b_9') | |
// (18, 10, 'sp4_h_l_45') | |
// (18, 10, 'sp4_h_r_40') | |
// (19, 10, 'sp4_h_l_40') | |
wire n204; | |
// (10, 10, 'sp4_h_r_5') | |
// (11, 10, 'local_g1_0') | |
// (11, 10, 'lutff_0/in_3') | |
// (11, 10, 'sp4_h_r_16') | |
// (12, 9, 'neigh_op_tnr_4') | |
// (12, 10, 'neigh_op_rgt_4') | |
// (12, 10, 'sp4_h_r_29') | |
// (12, 11, 'neigh_op_bnr_4') | |
// (13, 9, 'neigh_op_top_4') | |
// (13, 10, 'lutff_4/out') | |
// (13, 10, 'sp4_h_r_40') | |
// (13, 11, 'neigh_op_bot_4') | |
// (14, 9, 'neigh_op_tnl_4') | |
// (14, 10, 'neigh_op_lft_4') | |
// (14, 10, 'sp4_h_l_40') | |
// (14, 11, 'neigh_op_bnl_4') | |
wire n205; | |
// (10, 10, 'sp4_r_v_b_47') | |
// (10, 11, 'sp4_r_v_b_34') | |
// (10, 12, 'sp4_r_v_b_23') | |
// (10, 13, 'local_g2_2') | |
// (10, 13, 'lutff_6/in_2') | |
// (10, 13, 'lutff_7/in_3') | |
// (10, 13, 'sp4_r_v_b_10') | |
// (11, 9, 'sp4_v_t_47') | |
// (11, 10, 'sp4_v_b_47') | |
// (11, 11, 'sp4_v_b_34') | |
// (11, 12, 'sp4_v_b_23') | |
// (11, 13, 'local_g0_5') | |
// (11, 13, 'lutff_4/in_1') | |
// (11, 13, 'sp4_h_r_5') | |
// (11, 13, 'sp4_v_b_10') | |
// (12, 13, 'sp4_h_r_16') | |
// (13, 12, 'neigh_op_tnr_4') | |
// (13, 13, 'neigh_op_rgt_4') | |
// (13, 13, 'sp4_h_r_29') | |
// (13, 14, 'neigh_op_bnr_4') | |
// (14, 12, 'neigh_op_top_4') | |
// (14, 13, 'lutff_4/out') | |
// (14, 13, 'sp4_h_r_40') | |
// (14, 14, 'neigh_op_bot_4') | |
// (15, 12, 'neigh_op_tnl_4') | |
// (15, 13, 'neigh_op_lft_4') | |
// (15, 13, 'sp4_h_l_40') | |
// (15, 14, 'neigh_op_bnl_4') | |
wire n206; | |
// (10, 11, 'local_g0_1') | |
// (10, 11, 'lutff_3/in_2') | |
// (10, 11, 'sp4_h_r_1') | |
// (11, 11, 'sp4_h_r_12') | |
// (12, 10, 'neigh_op_tnr_2') | |
// (12, 11, 'neigh_op_rgt_2') | |
// (12, 11, 'sp4_h_r_25') | |
// (12, 12, 'neigh_op_bnr_2') | |
// (13, 10, 'neigh_op_top_2') | |
// (13, 11, 'lutff_2/out') | |
// (13, 11, 'sp4_h_r_36') | |
// (13, 12, 'neigh_op_bot_2') | |
// (14, 10, 'neigh_op_tnl_2') | |
// (14, 11, 'neigh_op_lft_2') | |
// (14, 11, 'sp4_h_l_36') | |
// (14, 12, 'neigh_op_bnl_2') | |
wire n207; | |
// (10, 11, 'local_g1_2') | |
// (10, 11, 'lutff_3/in_0') | |
// (10, 11, 'sp4_h_r_10') | |
// (11, 10, 'neigh_op_tnr_1') | |
// (11, 11, 'neigh_op_rgt_1') | |
// (11, 11, 'sp4_h_r_23') | |
// (11, 12, 'neigh_op_bnr_1') | |
// (12, 10, 'neigh_op_top_1') | |
// (12, 11, 'lutff_1/out') | |
// (12, 11, 'sp4_h_r_34') | |
// (12, 12, 'neigh_op_bot_1') | |
// (13, 10, 'neigh_op_tnl_1') | |
// (13, 11, 'neigh_op_lft_1') | |
// (13, 11, 'sp4_h_r_47') | |
// (13, 12, 'neigh_op_bnl_1') | |
// (14, 11, 'sp4_h_l_47') | |
wire n208; | |
// (10, 11, 'neigh_op_tnr_0') | |
// (10, 12, 'neigh_op_rgt_0') | |
// (10, 13, 'neigh_op_bnr_0') | |
// (11, 11, 'neigh_op_top_0') | |
// (11, 12, 'local_g3_0') | |
// (11, 12, 'lutff_0/out') | |
// (11, 12, 'lutff_1/in_2') | |
// (11, 13, 'neigh_op_bot_0') | |
// (12, 11, 'neigh_op_tnl_0') | |
// (12, 12, 'neigh_op_lft_0') | |
// (12, 13, 'neigh_op_bnl_0') | |
reg n209 = 0; | |
// (10, 11, 'neigh_op_tnr_1') | |
// (10, 12, 'neigh_op_rgt_1') | |
// (10, 13, 'neigh_op_bnr_1') | |
// (11, 11, 'neigh_op_top_1') | |
// (11, 12, 'local_g2_1') | |
// (11, 12, 'lutff_1/out') | |
// (11, 12, 'lutff_5/in_2') | |
// (11, 13, 'neigh_op_bot_1') | |
// (12, 11, 'neigh_op_tnl_1') | |
// (12, 12, 'neigh_op_lft_1') | |
// (12, 13, 'neigh_op_bnl_1') | |
wire n210; | |
// (10, 11, 'neigh_op_tnr_2') | |
// (10, 12, 'neigh_op_rgt_2') | |
// (10, 13, 'neigh_op_bnr_2') | |
// (11, 11, 'neigh_op_top_2') | |
// (11, 12, 'local_g1_2') | |
// (11, 12, 'lutff_2/out') | |
// (11, 12, 'lutff_5/in_0') | |
// (11, 13, 'neigh_op_bot_2') | |
// (12, 11, 'neigh_op_tnl_2') | |
// (12, 12, 'neigh_op_lft_2') | |
// (12, 13, 'neigh_op_bnl_2') | |
reg n211 = 0; | |
// (10, 11, 'neigh_op_tnr_3') | |
// (10, 12, 'neigh_op_rgt_3') | |
// (10, 13, 'neigh_op_bnr_3') | |
// (11, 11, 'local_g1_3') | |
// (11, 11, 'lutff_0/in_0') | |
// (11, 11, 'neigh_op_top_3') | |
// (11, 12, 'lutff_3/out') | |
// (11, 13, 'neigh_op_bot_3') | |
// (12, 11, 'neigh_op_tnl_3') | |
// (12, 12, 'neigh_op_lft_3') | |
// (12, 13, 'neigh_op_bnl_3') | |
wire n212; | |
// (10, 11, 'neigh_op_tnr_6') | |
// (10, 12, 'neigh_op_rgt_6') | |
// (10, 13, 'neigh_op_bnr_6') | |
// (11, 11, 'neigh_op_top_6') | |
// (11, 12, 'local_g1_6') | |
// (11, 12, 'lutff_3/in_0') | |
// (11, 12, 'lutff_6/out') | |
// (11, 13, 'neigh_op_bot_6') | |
// (12, 11, 'neigh_op_tnl_6') | |
// (12, 12, 'neigh_op_lft_6') | |
// (12, 13, 'neigh_op_bnl_6') | |
wire n213; | |
// (10, 11, 'sp12_h_r_1') | |
// (11, 11, 'local_g0_2') | |
// (11, 11, 'lutff_7/in_1') | |
// (11, 11, 'sp12_h_r_2') | |
// (12, 11, 'sp12_h_r_5') | |
// (13, 11, 'sp12_h_r_6') | |
// (14, 11, 'sp12_h_r_9') | |
// (15, 11, 'sp12_h_r_10') | |
// (16, 11, 'sp12_h_r_13') | |
// (17, 11, 'sp12_h_r_14') | |
// (18, 10, 'neigh_op_tnr_5') | |
// (18, 11, 'neigh_op_rgt_5') | |
// (18, 11, 'sp12_h_r_17') | |
// (18, 12, 'neigh_op_bnr_5') | |
// (19, 10, 'neigh_op_top_5') | |
// (19, 11, 'ram/RDATA_10') | |
// (19, 11, 'sp12_h_r_18') | |
// (19, 12, 'neigh_op_bot_5') | |
// (20, 10, 'neigh_op_tnl_5') | |
// (20, 11, 'neigh_op_lft_5') | |
// (20, 11, 'sp12_h_r_21') | |
// (20, 12, 'neigh_op_bnl_5') | |
// (21, 11, 'sp12_h_r_22') | |
// (22, 11, 'sp12_h_l_22') | |
wire n214; | |
// (10, 11, 'sp4_h_r_0') | |
// (11, 11, 'sp4_h_r_13') | |
// (12, 11, 'local_g3_0') | |
// (12, 11, 'lutff_7/in_2') | |
// (12, 11, 'sp4_h_r_24') | |
// (13, 11, 'sp4_h_r_37') | |
// (14, 11, 'sp4_h_l_37') | |
// (14, 11, 'sp4_h_r_9') | |
// (14, 12, 'local_g0_2') | |
// (14, 12, 'local_g1_2') | |
// (14, 12, 'lutff_0/in_0') | |
// (14, 12, 'lutff_2/in_2') | |
// (14, 12, 'lutff_3/in_3') | |
// (14, 12, 'lutff_7/in_2') | |
// (14, 12, 'sp4_h_r_2') | |
// (14, 13, 'local_g1_3') | |
// (14, 13, 'lutff_3/in_3') | |
// (14, 13, 'sp4_h_r_11') | |
// (15, 11, 'sp4_h_r_20') | |
// (15, 12, 'sp4_h_r_15') | |
// (15, 12, 'sp4_h_r_3') | |
// (15, 13, 'sp4_h_r_22') | |
// (16, 11, 'sp4_h_r_33') | |
// (16, 12, 'local_g0_6') | |
// (16, 12, 'lutff_1/in_3') | |
// (16, 12, 'sp4_h_r_14') | |
// (16, 12, 'sp4_h_r_26') | |
// (16, 13, 'sp4_h_r_35') | |
// (17, 10, 'sp4_r_v_b_46') | |
// (17, 11, 'neigh_op_tnr_3') | |
// (17, 11, 'sp4_h_r_44') | |
// (17, 11, 'sp4_r_v_b_35') | |
// (17, 12, 'neigh_op_rgt_3') | |
// (17, 12, 'sp4_h_r_27') | |
// (17, 12, 'sp4_h_r_39') | |
// (17, 12, 'sp4_r_v_b_22') | |
// (17, 12, 'sp4_r_v_b_38') | |
// (17, 13, 'neigh_op_bnr_3') | |
// (17, 13, 'sp4_h_r_46') | |
// (17, 13, 'sp4_r_v_b_11') | |
// (17, 13, 'sp4_r_v_b_27') | |
// (17, 14, 'sp4_r_v_b_14') | |
// (17, 15, 'sp4_r_v_b_3') | |
// (18, 9, 'sp4_v_t_46') | |
// (18, 10, 'sp4_r_v_b_47') | |
// (18, 10, 'sp4_v_b_46') | |
// (18, 11, 'neigh_op_top_3') | |
// (18, 11, 'sp4_h_l_44') | |
// (18, 11, 'sp4_r_v_b_34') | |
// (18, 11, 'sp4_v_b_35') | |
// (18, 11, 'sp4_v_t_38') | |
// (18, 12, 'lutff_3/out') | |
// (18, 12, 'sp4_h_l_39') | |
// (18, 12, 'sp4_h_r_38') | |
// (18, 12, 'sp4_h_r_6') | |
// (18, 12, 'sp4_r_v_b_23') | |
// (18, 12, 'sp4_r_v_b_39') | |
// (18, 12, 'sp4_v_b_22') | |
// (18, 12, 'sp4_v_b_38') | |
// (18, 13, 'neigh_op_bot_3') | |
// (18, 13, 'sp4_h_l_46') | |
// (18, 13, 'sp4_r_v_b_10') | |
// (18, 13, 'sp4_r_v_b_26') | |
// (18, 13, 'sp4_v_b_11') | |
// (18, 13, 'sp4_v_b_27') | |
// (18, 14, 'sp4_r_v_b_15') | |
// (18, 14, 'sp4_v_b_14') | |
// (18, 15, 'sp4_r_v_b_2') | |
// (18, 15, 'sp4_v_b_3') | |
// (19, 9, 'sp4_v_t_47') | |
// (19, 10, 'sp4_v_b_47') | |
// (19, 11, 'neigh_op_tnl_3') | |
// (19, 11, 'sp4_v_b_34') | |
// (19, 11, 'sp4_v_t_39') | |
// (19, 12, 'neigh_op_lft_3') | |
// (19, 12, 'sp4_h_l_38') | |
// (19, 12, 'sp4_h_r_19') | |
// (19, 12, 'sp4_v_b_23') | |
// (19, 12, 'sp4_v_b_39') | |
// (19, 13, 'neigh_op_bnl_3') | |
// (19, 13, 'sp4_h_r_10') | |
// (19, 13, 'sp4_v_b_10') | |
// (19, 13, 'sp4_v_b_26') | |
// (19, 14, 'sp4_v_b_15') | |
// (19, 15, 'sp4_h_r_2') | |
// (19, 15, 'sp4_v_b_2') | |
// (20, 12, 'sp4_h_r_30') | |
// (20, 13, 'local_g1_7') | |
// (20, 13, 'lutff_7/in_1') | |
// (20, 13, 'sp4_h_r_23') | |
// (20, 15, 'local_g1_7') | |
// (20, 15, 'lutff_1/in_1') | |
// (20, 15, 'sp4_h_r_15') | |
// (21, 12, 'sp4_h_r_43') | |
// (21, 13, 'sp4_h_r_34') | |
// (21, 15, 'sp4_h_r_26') | |
// (22, 12, 'sp4_h_l_43') | |
// (22, 13, 'sp4_h_r_47') | |
// (22, 15, 'sp4_h_r_39') | |
// (23, 13, 'sp4_h_l_47') | |
// (23, 15, 'sp4_h_l_39') | |
wire n215; | |
// (10, 11, 'sp4_h_r_3') | |
// (11, 11, 'local_g0_6') | |
// (11, 11, 'lutff_1/in_1') | |
// (11, 11, 'sp4_h_r_14') | |
// (12, 10, 'neigh_op_tnr_3') | |
// (12, 11, 'neigh_op_rgt_3') | |
// (12, 11, 'sp4_h_r_27') | |
// (12, 12, 'neigh_op_bnr_3') | |
// (13, 10, 'neigh_op_top_3') | |
// (13, 11, 'lutff_3/out') | |
// (13, 11, 'sp4_h_r_38') | |
// (13, 12, 'neigh_op_bot_3') | |
// (14, 10, 'neigh_op_tnl_3') | |
// (14, 11, 'neigh_op_lft_3') | |
// (14, 11, 'sp4_h_l_38') | |
// (14, 12, 'neigh_op_bnl_3') | |
wire n216; | |
// (10, 11, 'sp4_h_r_4') | |
// (11, 10, 'neigh_op_tnr_6') | |
// (11, 11, 'neigh_op_rgt_6') | |
// (11, 11, 'sp4_h_r_17') | |
// (11, 12, 'neigh_op_bnr_6') | |
// (12, 10, 'neigh_op_top_6') | |
// (12, 11, 'lutff_6/out') | |
// (12, 11, 'sp4_h_r_28') | |
// (12, 12, 'neigh_op_bot_6') | |
// (13, 10, 'neigh_op_tnl_6') | |
// (13, 11, 'neigh_op_lft_6') | |
// (13, 11, 'sp4_h_r_41') | |
// (13, 12, 'neigh_op_bnl_6') | |
// (14, 11, 'local_g0_4') | |
// (14, 11, 'lutff_3/in_1') | |
// (14, 11, 'sp4_h_l_41') | |
// (14, 11, 'sp4_h_r_4') | |
// (15, 11, 'sp4_h_r_17') | |
// (16, 11, 'sp4_h_r_28') | |
// (17, 11, 'sp4_h_r_41') | |
// (18, 11, 'sp4_h_l_41') | |
wire n217; | |
// (10, 11, 'sp4_h_r_5') | |
// (11, 11, 'local_g1_0') | |
// (11, 11, 'lutff_3/in_2') | |
// (11, 11, 'sp4_h_r_16') | |
// (12, 10, 'neigh_op_tnr_4') | |
// (12, 11, 'neigh_op_rgt_4') | |
// (12, 11, 'sp4_h_r_29') | |
// (12, 12, 'neigh_op_bnr_4') | |
// (13, 10, 'neigh_op_top_4') | |
// (13, 11, 'lutff_4/out') | |
// (13, 11, 'sp4_h_r_40') | |
// (13, 12, 'neigh_op_bot_4') | |
// (14, 10, 'neigh_op_tnl_4') | |
// (14, 11, 'neigh_op_lft_4') | |
// (14, 11, 'sp4_h_l_40') | |
// (14, 12, 'neigh_op_bnl_4') | |
wire n218; | |
// (10, 11, 'sp4_h_r_7') | |
// (11, 11, 'local_g1_2') | |
// (11, 11, 'lutff_5/in_2') | |
// (11, 11, 'sp4_h_r_18') | |
// (12, 10, 'neigh_op_tnr_5') | |
// (12, 11, 'neigh_op_rgt_5') | |
// (12, 11, 'sp4_h_r_31') | |
// (12, 12, 'neigh_op_bnr_5') | |
// (13, 10, 'neigh_op_top_5') | |
// (13, 11, 'lutff_5/out') | |
// (13, 11, 'sp4_h_r_42') | |
// (13, 12, 'neigh_op_bot_5') | |
// (14, 10, 'neigh_op_tnl_5') | |
// (14, 11, 'neigh_op_lft_5') | |
// (14, 11, 'sp4_h_l_42') | |
// (14, 12, 'neigh_op_bnl_5') | |
wire n219; | |
// (10, 11, 'sp4_r_v_b_47') | |
// (10, 12, 'sp4_r_v_b_34') | |
// (10, 13, 'neigh_op_tnr_5') | |
// (10, 13, 'sp4_r_v_b_23') | |
// (10, 14, 'neigh_op_rgt_5') | |
// (10, 14, 'sp4_r_v_b_10') | |
// (10, 15, 'neigh_op_bnr_5') | |
// (11, 10, 'sp4_v_t_47') | |
// (11, 11, 'sp4_v_b_47') | |
// (11, 12, 'local_g2_2') | |
// (11, 12, 'lutff_1/in_1') | |
// (11, 12, 'sp4_v_b_34') | |
// (11, 13, 'neigh_op_top_5') | |
// (11, 13, 'sp4_v_b_23') | |
// (11, 14, 'lutff_5/out') | |
// (11, 14, 'sp4_v_b_10') | |
// (11, 15, 'neigh_op_bot_5') | |
// (12, 13, 'neigh_op_tnl_5') | |
// (12, 14, 'neigh_op_lft_5') | |
// (12, 15, 'neigh_op_bnl_5') | |
wire n220; | |
// (10, 12, 'neigh_op_tnr_0') | |
// (10, 13, 'neigh_op_rgt_0') | |
// (10, 14, 'neigh_op_bnr_0') | |
// (11, 12, 'neigh_op_top_0') | |
// (11, 13, 'lutff_0/out') | |
// (11, 14, 'neigh_op_bot_0') | |
// (12, 12, 'neigh_op_tnl_0') | |
// (12, 13, 'local_g1_0') | |
// (12, 13, 'lutff_4/in_1') | |
// (12, 13, 'neigh_op_lft_0') | |
// (12, 14, 'neigh_op_bnl_0') | |
wire n221; | |
// (10, 12, 'neigh_op_tnr_3') | |
// (10, 13, 'neigh_op_rgt_3') | |
// (10, 14, 'neigh_op_bnr_3') | |
// (11, 12, 'neigh_op_top_3') | |
// (11, 13, 'lutff_3/out') | |
// (11, 13, 'sp4_h_r_6') | |
// (11, 14, 'neigh_op_bot_3') | |
// (12, 12, 'neigh_op_tnl_3') | |
// (12, 13, 'neigh_op_lft_3') | |
// (12, 13, 'sp4_h_r_19') | |
// (12, 14, 'neigh_op_bnl_3') | |
// (13, 13, 'local_g3_6') | |
// (13, 13, 'lutff_7/in_2') | |
// (13, 13, 'sp4_h_r_30') | |
// (14, 13, 'sp4_h_r_43') | |
// (15, 13, 'sp4_h_l_43') | |
wire n222; | |
// (10, 12, 'neigh_op_tnr_5') | |
// (10, 13, 'neigh_op_rgt_5') | |
// (10, 14, 'neigh_op_bnr_5') | |
// (11, 12, 'neigh_op_top_5') | |
// (11, 13, 'lutff_5/out') | |
// (11, 13, 'sp4_h_r_10') | |
// (11, 14, 'neigh_op_bot_5') | |
// (12, 12, 'neigh_op_tnl_5') | |
// (12, 13, 'neigh_op_lft_5') | |
// (12, 13, 'sp4_h_r_23') | |
// (12, 14, 'neigh_op_bnl_5') | |
// (13, 13, 'sp4_h_r_34') | |
// (14, 13, 'local_g3_7') | |
// (14, 13, 'lutff_1/in_1') | |
// (14, 13, 'sp4_h_r_47') | |
// (15, 13, 'sp4_h_l_47') | |
wire n223; | |
// (10, 12, 'neigh_op_tnr_6') | |
// (10, 13, 'neigh_op_rgt_6') | |
// (10, 14, 'neigh_op_bnr_6') | |
// (11, 12, 'neigh_op_top_6') | |
// (11, 13, 'local_g3_6') | |
// (11, 13, 'lutff_1/in_0') | |
// (11, 13, 'lutff_6/out') | |
// (11, 14, 'neigh_op_bot_6') | |
// (12, 12, 'neigh_op_tnl_6') | |
// (12, 13, 'neigh_op_lft_6') | |
// (12, 14, 'neigh_op_bnl_6') | |
wire n224; | |
// (10, 12, 'sp4_h_r_0') | |
// (11, 12, 'local_g1_5') | |
// (11, 12, 'lutff_3/in_1') | |
// (11, 12, 'sp4_h_r_13') | |
// (12, 12, 'neigh_op_tnr_5') | |
// (12, 12, 'sp4_h_r_24') | |
// (12, 13, 'neigh_op_rgt_5') | |
// (12, 14, 'neigh_op_bnr_5') | |
// (13, 12, 'neigh_op_top_5') | |
// (13, 12, 'sp4_h_r_37') | |
// (13, 13, 'lutff_5/out') | |
// (13, 13, 'sp4_r_v_b_43') | |
// (13, 14, 'neigh_op_bot_5') | |
// (13, 14, 'sp4_r_v_b_30') | |
// (13, 15, 'sp4_r_v_b_19') | |
// (13, 16, 'sp4_r_v_b_6') | |
// (14, 12, 'neigh_op_tnl_5') | |
// (14, 12, 'sp4_h_l_37') | |
// (14, 12, 'sp4_v_t_43') | |
// (14, 13, 'neigh_op_lft_5') | |
// (14, 13, 'sp4_v_b_43') | |
// (14, 14, 'neigh_op_bnl_5') | |
// (14, 14, 'sp4_v_b_30') | |
// (14, 15, 'sp4_v_b_19') | |
// (14, 16, 'sp4_v_b_6') | |
wire n225; | |
// (10, 13, 'local_g1_4') | |
// (10, 13, 'lutff_4/in_1') | |
// (10, 13, 'sp4_h_r_4') | |
// (11, 12, 'neigh_op_tnr_6') | |
// (11, 13, 'neigh_op_rgt_6') | |
// (11, 13, 'sp4_h_r_17') | |
// (11, 14, 'neigh_op_bnr_6') | |
// (12, 12, 'neigh_op_top_6') | |
// (12, 13, 'lutff_6/out') | |
// (12, 13, 'sp4_h_r_28') | |
// (12, 14, 'neigh_op_bot_6') | |
// (13, 12, 'neigh_op_tnl_6') | |
// (13, 13, 'neigh_op_lft_6') | |
// (13, 13, 'sp4_h_r_41') | |
// (13, 14, 'neigh_op_bnl_6') | |
// (14, 13, 'sp4_h_l_41') | |
wire n226; | |
// (10, 13, 'local_g2_3') | |
// (10, 13, 'lutff_3/in_0') | |
// (10, 13, 'neigh_op_tnr_3') | |
// (10, 14, 'local_g3_3') | |
// (10, 14, 'lutff_6/in_0') | |
// (10, 14, 'neigh_op_rgt_3') | |
// (10, 15, 'neigh_op_bnr_3') | |
// (11, 13, 'neigh_op_top_3') | |
// (11, 14, 'local_g2_3') | |
// (11, 14, 'lutff_1/in_2') | |
// (11, 14, 'lutff_3/out') | |
// (11, 14, 'lutff_4/in_3') | |
// (11, 15, 'neigh_op_bot_3') | |
// (12, 13, 'local_g2_3') | |
// (12, 13, 'lutff_6/in_3') | |
// (12, 13, 'neigh_op_tnl_3') | |
// (12, 14, 'local_g0_3') | |
// (12, 14, 'lutff_1/in_2') | |
// (12, 14, 'lutff_4/in_3') | |
// (12, 14, 'lutff_7/in_2') | |
// (12, 14, 'neigh_op_lft_3') | |
// (12, 15, 'local_g2_3') | |
// (12, 15, 'local_g3_3') | |
// (12, 15, 'lutff_1/in_2') | |
// (12, 15, 'lutff_5/in_2') | |
// (12, 15, 'lutff_6/in_2') | |
// (12, 15, 'neigh_op_bnl_3') | |
reg n227 = 0; | |
// (10, 13, 'neigh_op_tnr_0') | |
// (10, 13, 'sp4_r_v_b_45') | |
// (10, 14, 'local_g2_0') | |
// (10, 14, 'lutff_4/in_2') | |
// (10, 14, 'neigh_op_rgt_0') | |
// (10, 14, 'sp4_r_v_b_32') | |
// (10, 15, 'neigh_op_bnr_0') | |
// (10, 15, 'sp4_r_v_b_21') | |
// (10, 16, 'local_g2_0') | |
// (10, 16, 'lutff_0/in_2') | |
// (10, 16, 'sp4_r_v_b_8') | |
// (11, 12, 'sp4_v_t_45') | |
// (11, 13, 'neigh_op_top_0') | |
// (11, 13, 'sp4_v_b_45') | |
// (11, 14, 'local_g3_0') | |
// (11, 14, 'lutff_0/out') | |
// (11, 14, 'lutff_7/in_2') | |
// (11, 14, 'sp4_v_b_32') | |
// (11, 15, 'neigh_op_bot_0') | |
// (11, 15, 'sp4_v_b_21') | |
// (11, 16, 'sp4_v_b_8') | |
// (12, 13, 'neigh_op_tnl_0') | |
// (12, 14, 'neigh_op_lft_0') | |
// (12, 15, 'neigh_op_bnl_0') | |
wire n228; | |
// (10, 13, 'neigh_op_tnr_1') | |
// (10, 14, 'neigh_op_rgt_1') | |
// (10, 15, 'neigh_op_bnr_1') | |
// (11, 13, 'neigh_op_top_1') | |
// (11, 14, 'local_g3_1') | |
// (11, 14, 'lutff_1/out') | |
// (11, 14, 'lutff_2/in_2') | |
// (11, 15, 'neigh_op_bot_1') | |
// (12, 13, 'neigh_op_tnl_1') | |
// (12, 14, 'neigh_op_lft_1') | |
// (12, 15, 'neigh_op_bnl_1') | |
wire n229; | |
// (10, 13, 'neigh_op_tnr_2') | |
// (10, 14, 'local_g2_2') | |
// (10, 14, 'lutff_0/in_0') | |
// (10, 14, 'neigh_op_rgt_2') | |
// (10, 15, 'neigh_op_bnr_2') | |
// (11, 13, 'neigh_op_top_2') | |
// (11, 14, 'lutff_2/out') | |
// (11, 15, 'neigh_op_bot_2') | |
// (12, 13, 'neigh_op_tnl_2') | |
// (12, 14, 'neigh_op_lft_2') | |
// (12, 15, 'neigh_op_bnl_2') | |
wire n230; | |
// (10, 13, 'neigh_op_tnr_4') | |
// (10, 14, 'local_g2_4') | |
// (10, 14, 'lutff_1/in_1') | |
// (10, 14, 'neigh_op_rgt_4') | |
// (10, 15, 'neigh_op_bnr_4') | |
// (11, 13, 'neigh_op_top_4') | |
// (11, 14, 'lutff_4/out') | |
// (11, 15, 'neigh_op_bot_4') | |
// (12, 13, 'neigh_op_tnl_4') | |
// (12, 14, 'neigh_op_lft_4') | |
// (12, 15, 'neigh_op_bnl_4') | |
wire n231; | |
// (10, 13, 'neigh_op_tnr_7') | |
// (10, 14, 'neigh_op_rgt_7') | |
// (10, 14, 'sp4_h_r_3') | |
// (10, 15, 'neigh_op_bnr_7') | |
// (11, 13, 'neigh_op_top_7') | |
// (11, 14, 'local_g3_7') | |
// (11, 14, 'lutff_6/in_0') | |
// (11, 14, 'lutff_7/out') | |
// (11, 14, 'sp4_h_r_14') | |
// (11, 15, 'neigh_op_bot_7') | |
// (12, 13, 'neigh_op_tnl_7') | |
// (12, 14, 'local_g1_7') | |
// (12, 14, 'lutff_1/in_3') | |
// (12, 14, 'neigh_op_lft_7') | |
// (12, 14, 'sp4_h_r_27') | |
// (12, 15, 'neigh_op_bnl_7') | |
// (13, 14, 'sp4_h_r_38') | |
// (14, 14, 'local_g1_3') | |
// (14, 14, 'lutff_0/in_0') | |
// (14, 14, 'sp4_h_l_38') | |
// (14, 14, 'sp4_h_r_3') | |
// (15, 14, 'sp4_h_r_14') | |
// (16, 14, 'sp4_h_r_27') | |
// (17, 14, 'sp4_h_r_38') | |
// (18, 14, 'sp4_h_l_38') | |
wire n232; | |
// (10, 14, 'local_g1_0') | |
// (10, 14, 'lutff_5/in_2') | |
// (10, 14, 'sp4_h_r_8') | |
// (11, 13, 'neigh_op_tnr_0') | |
// (11, 14, 'neigh_op_rgt_0') | |
// (11, 14, 'sp4_h_r_21') | |
// (11, 15, 'neigh_op_bnr_0') | |
// (12, 13, 'neigh_op_top_0') | |
// (12, 14, 'lutff_0/out') | |
// (12, 14, 'sp4_h_r_32') | |
// (12, 15, 'neigh_op_bot_0') | |
// (13, 13, 'neigh_op_tnl_0') | |
// (13, 14, 'neigh_op_lft_0') | |
// (13, 14, 'sp4_h_r_45') | |
// (13, 15, 'neigh_op_bnl_0') | |
// (14, 14, 'sp4_h_l_45') | |
wire n233; | |
// (10, 14, 'neigh_op_tnr_7') | |
// (10, 15, 'local_g2_7') | |
// (10, 15, 'lutff_4/in_1') | |
// (10, 15, 'neigh_op_rgt_7') | |
// (10, 16, 'neigh_op_bnr_7') | |
// (11, 14, 'neigh_op_top_7') | |
// (11, 15, 'lutff_7/out') | |
// (11, 16, 'neigh_op_bot_7') | |
// (12, 14, 'neigh_op_tnl_7') | |
// (12, 15, 'neigh_op_lft_7') | |
// (12, 16, 'neigh_op_bnl_7') | |
wire n234; | |
// (10, 14, 'sp4_h_r_0') | |
// (11, 13, 'neigh_op_tnr_4') | |
// (11, 14, 'neigh_op_rgt_4') | |
// (11, 14, 'sp4_h_r_13') | |
// (11, 15, 'neigh_op_bnr_4') | |
// (12, 13, 'neigh_op_top_4') | |
// (12, 14, 'local_g0_4') | |
// (12, 14, 'lutff_4/out') | |
// (12, 14, 'lutff_6/in_0') | |
// (12, 14, 'sp4_h_r_24') | |
// (12, 15, 'neigh_op_bot_4') | |
// (13, 13, 'neigh_op_tnl_4') | |
// (13, 14, 'local_g1_4') | |
// (13, 14, 'lutff_0/in_3') | |
// (13, 14, 'lutff_7/in_2') | |
// (13, 14, 'neigh_op_lft_4') | |
// (13, 14, 'sp4_h_r_37') | |
// (13, 15, 'local_g3_4') | |
// (13, 15, 'lutff_4/in_1') | |
// (13, 15, 'neigh_op_bnl_4') | |
// (13, 15, 'sp4_r_v_b_40') | |
// (13, 16, 'sp4_r_v_b_29') | |
// (13, 17, 'sp4_r_v_b_16') | |
// (13, 18, 'sp4_r_v_b_5') | |
// (14, 14, 'sp4_h_l_37') | |
// (14, 14, 'sp4_v_t_40') | |
// (14, 15, 'local_g2_0') | |
// (14, 15, 'lutff_0/in_0') | |
// (14, 15, 'lutff_7/in_1') | |
// (14, 15, 'sp4_v_b_40') | |
// (14, 16, 'sp4_v_b_29') | |
// (14, 17, 'sp4_v_b_16') | |
// (14, 18, 'sp4_v_b_5') | |
wire n235; | |
// (10, 14, 'sp4_h_r_5') | |
// (11, 14, 'local_g0_0') | |
// (11, 14, 'local_g1_0') | |
// (11, 14, 'lutff_4/in_2') | |
// (11, 14, 'lutff_5/in_2') | |
// (11, 14, 'sp4_h_r_16') | |
// (12, 14, 'sp4_h_r_29') | |
// (13, 14, 'sp4_h_r_40') | |
// (14, 14, 'sp4_h_l_40') | |
// (14, 14, 'sp4_h_r_5') | |
// (15, 14, 'sp4_h_r_16') | |
// (16, 13, 'neigh_op_tnr_4') | |
// (16, 14, 'neigh_op_rgt_4') | |
// (16, 14, 'sp4_h_r_29') | |
// (16, 15, 'neigh_op_bnr_4') | |
// (17, 13, 'neigh_op_top_4') | |
// (17, 14, 'lutff_4/out') | |
// (17, 14, 'sp4_h_r_40') | |
// (17, 15, 'neigh_op_bot_4') | |
// (18, 13, 'neigh_op_tnl_4') | |
// (18, 14, 'neigh_op_lft_4') | |
// (18, 14, 'sp4_h_l_40') | |
// (18, 15, 'neigh_op_bnl_4') | |
wire n236; | |
// (10, 15, 'sp4_h_r_5') | |
// (11, 15, 'local_g1_0') | |
// (11, 15, 'lutff_7/in_2') | |
// (11, 15, 'sp4_h_r_16') | |
// (12, 14, 'neigh_op_tnr_4') | |
// (12, 15, 'neigh_op_rgt_4') | |
// (12, 15, 'sp4_h_r_29') | |
// (12, 16, 'neigh_op_bnr_4') | |
// (13, 14, 'neigh_op_top_4') | |
// (13, 15, 'lutff_4/out') | |
// (13, 15, 'sp4_h_r_40') | |
// (13, 16, 'neigh_op_bot_4') | |
// (14, 14, 'neigh_op_tnl_4') | |
// (14, 15, 'neigh_op_lft_4') | |
// (14, 15, 'sp4_h_l_40') | |
// (14, 16, 'neigh_op_bnl_4') | |
wire n237; | |
// (10, 16, 'lutff_1/cout') | |
// (10, 16, 'lutff_2/in_3') | |
wire n238; | |
// (10, 16, 'lutff_2/cout') | |
// (10, 16, 'lutff_3/in_3') | |
wire n239; | |
// (10, 16, 'lutff_3/cout') | |
// (10, 16, 'lutff_4/in_3') | |
wire n240; | |
// (10, 16, 'lutff_4/cout') | |
// (10, 16, 'lutff_5/in_3') | |
wire n241; | |
// (10, 16, 'lutff_5/cout') | |
// (10, 16, 'lutff_6/in_3') | |
wire n242; | |
// (10, 16, 'lutff_6/cout') | |
// (10, 16, 'lutff_7/in_3') | |
wire n243; | |
// (11, 8, 'neigh_op_tnr_0') | |
// (11, 9, 'neigh_op_rgt_0') | |
// (11, 10, 'neigh_op_bnr_0') | |
// (12, 8, 'neigh_op_top_0') | |
// (12, 9, 'local_g1_0') | |
// (12, 9, 'lutff_0/out') | |
// (12, 9, 'lutff_7/in_0') | |
// (12, 10, 'neigh_op_bot_0') | |
// (13, 8, 'neigh_op_tnl_0') | |
// (13, 9, 'neigh_op_lft_0') | |
// (13, 10, 'neigh_op_bnl_0') | |
wire n244; | |
// (11, 8, 'neigh_op_tnr_1') | |
// (11, 9, 'neigh_op_rgt_1') | |
// (11, 10, 'neigh_op_bnr_1') | |
// (12, 8, 'neigh_op_top_1') | |
// (12, 9, 'local_g2_1') | |
// (12, 9, 'lutff_1/out') | |
// (12, 9, 'lutff_4/in_1') | |
// (12, 10, 'neigh_op_bot_1') | |
// (13, 8, 'neigh_op_tnl_1') | |
// (13, 9, 'neigh_op_lft_1') | |
// (13, 10, 'neigh_op_bnl_1') | |
wire n245; | |
// (11, 8, 'neigh_op_tnr_4') | |
// (11, 9, 'neigh_op_rgt_4') | |
// (11, 10, 'neigh_op_bnr_4') | |
// (12, 8, 'neigh_op_top_4') | |
// (12, 9, 'local_g1_4') | |
// (12, 9, 'lutff_4/out') | |
// (12, 9, 'lutff_7/in_2') | |
// (12, 10, 'neigh_op_bot_4') | |
// (13, 8, 'neigh_op_tnl_4') | |
// (13, 9, 'neigh_op_lft_4') | |
// (13, 10, 'neigh_op_bnl_4') | |
wire n246; | |
// (11, 8, 'neigh_op_tnr_5') | |
// (11, 9, 'neigh_op_rgt_5') | |
// (11, 10, 'local_g0_5') | |
// (11, 10, 'lutff_5/in_0') | |
// (11, 10, 'neigh_op_bnr_5') | |
// (12, 8, 'neigh_op_top_5') | |
// (12, 9, 'lutff_5/out') | |
// (12, 10, 'neigh_op_bot_5') | |
// (13, 8, 'neigh_op_tnl_5') | |
// (13, 9, 'neigh_op_lft_5') | |
// (13, 10, 'neigh_op_bnl_5') | |
wire n247; | |
// (11, 8, 'neigh_op_tnr_6') | |
// (11, 9, 'neigh_op_rgt_6') | |
// (11, 10, 'neigh_op_bnr_6') | |
// (12, 8, 'neigh_op_top_6') | |
// (12, 9, 'local_g2_6') | |
// (12, 9, 'lutff_6/out') | |
// (12, 9, 'lutff_7/in_3') | |
// (12, 10, 'neigh_op_bot_6') | |
// (13, 8, 'neigh_op_tnl_6') | |
// (13, 9, 'neigh_op_lft_6') | |
// (13, 10, 'neigh_op_bnl_6') | |
wire n248; | |
// (11, 9, 'local_g0_2') | |
// (11, 9, 'lutff_1/in_1') | |
// (11, 9, 'lutff_4/in_0') | |
// (11, 9, 'sp4_h_r_10') | |
// (12, 8, 'neigh_op_tnr_1') | |
// (12, 9, 'neigh_op_rgt_1') | |
// (12, 9, 'sp4_h_r_23') | |
// (12, 10, 'local_g0_1') | |
// (12, 10, 'lutff_1/in_2') | |
// (12, 10, 'neigh_op_bnr_1') | |
// (13, 8, 'neigh_op_top_1') | |
// (13, 9, 'lutff_1/out') | |
// (13, 9, 'sp4_h_r_34') | |
// (13, 10, 'local_g1_1') | |
// (13, 10, 'lutff_2/in_2') | |
// (13, 10, 'neigh_op_bot_1') | |
// (14, 8, 'neigh_op_tnl_1') | |
// (14, 9, 'neigh_op_lft_1') | |
// (14, 9, 'sp4_h_r_47') | |
// (14, 10, 'neigh_op_bnl_1') | |
// (15, 9, 'sp4_h_l_47') | |
wire n249; | |
// (11, 9, 'neigh_op_tnr_1') | |
// (11, 10, 'local_g3_1') | |
// (11, 10, 'lutff_7/in_1') | |
// (11, 10, 'neigh_op_rgt_1') | |
// (11, 11, 'neigh_op_bnr_1') | |
// (12, 9, 'neigh_op_top_1') | |
// (12, 10, 'lutff_1/out') | |
// (12, 11, 'neigh_op_bot_1') | |
// (13, 9, 'neigh_op_tnl_1') | |
// (13, 10, 'neigh_op_lft_1') | |
// (13, 11, 'neigh_op_bnl_1') | |
wire n250; | |
// (11, 9, 'neigh_op_tnr_2') | |
// (11, 10, 'local_g2_2') | |
// (11, 10, 'lutff_1/in_1') | |
// (11, 10, 'neigh_op_rgt_2') | |
// (11, 11, 'neigh_op_bnr_2') | |
// (12, 9, 'neigh_op_top_2') | |
// (12, 10, 'lutff_2/out') | |
// (12, 11, 'neigh_op_bot_2') | |
// (13, 9, 'neigh_op_tnl_2') | |
// (13, 10, 'neigh_op_lft_2') | |
// (13, 11, 'neigh_op_bnl_2') | |
wire n251; | |
// (11, 9, 'neigh_op_tnr_3') | |
// (11, 10, 'local_g3_3') | |
// (11, 10, 'lutff_0/in_2') | |
// (11, 10, 'neigh_op_rgt_3') | |
// (11, 11, 'neigh_op_bnr_3') | |
// (12, 9, 'neigh_op_top_3') | |
// (12, 10, 'lutff_3/out') | |
// (12, 11, 'neigh_op_bot_3') | |
// (13, 9, 'neigh_op_tnl_3') | |
// (13, 10, 'neigh_op_lft_3') | |
// (13, 11, 'neigh_op_bnl_3') | |
wire n252; | |
// (11, 9, 'neigh_op_tnr_4') | |
// (11, 10, 'neigh_op_rgt_4') | |
// (11, 11, 'neigh_op_bnr_4') | |
// (12, 9, 'neigh_op_top_4') | |
// (12, 10, 'lutff_4/out') | |
// (12, 10, 'sp4_r_v_b_41') | |
// (12, 11, 'neigh_op_bot_4') | |
// (12, 11, 'sp4_r_v_b_28') | |
// (12, 12, 'local_g3_1') | |
// (12, 12, 'lutff_1/in_3') | |
// (12, 12, 'sp4_r_v_b_17') | |
// (12, 13, 'sp4_r_v_b_4') | |
// (13, 9, 'neigh_op_tnl_4') | |
// (13, 9, 'sp4_v_t_41') | |
// (13, 10, 'neigh_op_lft_4') | |
// (13, 10, 'sp4_v_b_41') | |
// (13, 11, 'neigh_op_bnl_4') | |
// (13, 11, 'sp4_v_b_28') | |
// (13, 12, 'sp4_v_b_17') | |
// (13, 13, 'sp4_v_b_4') | |
wire n253; | |
// (11, 9, 'neigh_op_tnr_5') | |
// (11, 10, 'neigh_op_rgt_5') | |
// (11, 11, 'neigh_op_bnr_5') | |
// (12, 9, 'neigh_op_top_5') | |
// (12, 10, 'lutff_5/out') | |
// (12, 10, 'sp4_h_r_10') | |
// (12, 11, 'neigh_op_bot_5') | |
// (13, 9, 'neigh_op_tnl_5') | |
// (13, 10, 'neigh_op_lft_5') | |
// (13, 10, 'sp4_h_r_23') | |
// (13, 11, 'neigh_op_bnl_5') | |
// (14, 10, 'local_g3_2') | |
// (14, 10, 'lutff_4/in_3') | |
// (14, 10, 'sp4_h_r_34') | |
// (15, 10, 'sp4_h_r_47') | |
// (16, 10, 'sp4_h_l_47') | |
wire n254; | |
// (11, 9, 'neigh_op_tnr_6') | |
// (11, 10, 'neigh_op_rgt_6') | |
// (11, 10, 'sp4_h_r_1') | |
// (11, 11, 'neigh_op_bnr_6') | |
// (12, 9, 'neigh_op_top_6') | |
// (12, 10, 'lutff_6/out') | |
// (12, 10, 'sp4_h_r_12') | |
// (12, 11, 'neigh_op_bot_6') | |
// (13, 9, 'neigh_op_tnl_6') | |
// (13, 10, 'neigh_op_lft_6') | |
// (13, 10, 'sp4_h_r_25') | |
// (13, 11, 'neigh_op_bnl_6') | |
// (14, 10, 'local_g2_4') | |
// (14, 10, 'lutff_7/in_1') | |
// (14, 10, 'sp4_h_r_36') | |
// (15, 10, 'sp4_h_l_36') | |
wire n255; | |
// (11, 9, 'sp4_r_v_b_40') | |
// (11, 10, 'sp4_r_v_b_29') | |
// (11, 11, 'sp4_r_v_b_16') | |
// (11, 12, 'sp4_r_v_b_5') | |
// (12, 8, 'sp4_v_t_40') | |
// (12, 9, 'sp4_v_b_40') | |
// (12, 10, 'sp4_v_b_29') | |
// (12, 11, 'local_g1_0') | |
// (12, 11, 'lutff_0/in_1') | |
// (12, 11, 'sp4_v_b_16') | |
// (12, 12, 'sp4_h_r_0') | |
// (12, 12, 'sp4_v_b_5') | |
// (13, 9, 'sp4_r_v_b_36') | |
// (13, 10, 'sp4_r_v_b_25') | |
// (13, 11, 'local_g2_4') | |
// (13, 11, 'lutff_1/in_1') | |
// (13, 11, 'sp4_r_v_b_12') | |
// (13, 12, 'sp4_h_r_13') | |
// (13, 12, 'sp4_r_v_b_1') | |
// (14, 8, 'sp4_v_t_36') | |
// (14, 9, 'sp4_v_b_36') | |
// (14, 10, 'sp4_v_b_25') | |
// (14, 11, 'sp4_v_b_12') | |
// (14, 12, 'sp4_h_r_24') | |
// (14, 12, 'sp4_h_r_8') | |
// (14, 12, 'sp4_v_b_1') | |
// (15, 11, 'neigh_op_tnr_0') | |
// (15, 12, 'local_g3_0') | |
// (15, 12, 'lutff_5/in_0') | |
// (15, 12, 'lutff_7/in_0') | |
// (15, 12, 'neigh_op_rgt_0') | |
// (15, 12, 'sp4_h_r_21') | |
// (15, 12, 'sp4_h_r_37') | |
// (15, 13, 'neigh_op_bnr_0') | |
// (16, 11, 'neigh_op_top_0') | |
// (16, 12, 'lutff_0/out') | |
// (16, 12, 'sp4_h_l_37') | |
// (16, 12, 'sp4_h_r_0') | |
// (16, 12, 'sp4_h_r_32') | |
// (16, 13, 'neigh_op_bot_0') | |
// (17, 11, 'neigh_op_tnl_0') | |
// (17, 12, 'neigh_op_lft_0') | |
// (17, 12, 'sp4_h_r_13') | |
// (17, 12, 'sp4_h_r_45') | |
// (17, 13, 'neigh_op_bnl_0') | |
// (18, 12, 'sp4_h_l_45') | |
// (18, 12, 'sp4_h_r_24') | |
// (19, 12, 'sp4_h_r_37') | |
// (20, 12, 'sp4_h_l_37') | |
wire n256; | |
// (11, 9, 'sp4_r_v_b_41') | |
// (11, 10, 'sp4_r_v_b_28') | |
// (11, 11, 'neigh_op_tnr_2') | |
// (11, 11, 'sp4_r_v_b_17') | |
// (11, 12, 'neigh_op_rgt_2') | |
// (11, 12, 'sp4_r_v_b_4') | |
// (11, 13, 'neigh_op_bnr_2') | |
// (12, 8, 'sp4_v_t_41') | |
// (12, 9, 'local_g3_1') | |
// (12, 9, 'lutff_7/in_1') | |
// (12, 9, 'sp4_v_b_41') | |
// (12, 10, 'sp4_v_b_28') | |
// (12, 11, 'neigh_op_top_2') | |
// (12, 11, 'sp4_v_b_17') | |
// (12, 12, 'lutff_2/out') | |
// (12, 12, 'sp4_v_b_4') | |
// (12, 13, 'neigh_op_bot_2') | |
// (13, 11, 'neigh_op_tnl_2') | |
// (13, 12, 'neigh_op_lft_2') | |
// (13, 13, 'neigh_op_bnl_2') | |
wire n257; | |
// (11, 9, 'sp4_r_v_b_42') | |
// (11, 10, 'sp4_r_v_b_31') | |
// (11, 11, 'sp4_r_v_b_18') | |
// (11, 12, 'sp4_r_v_b_7') | |
// (12, 8, 'sp4_v_t_42') | |
// (12, 9, 'sp4_v_b_42') | |
// (12, 10, 'sp4_v_b_31') | |
// (12, 11, 'local_g0_2') | |
// (12, 11, 'lutff_7/in_1') | |
// (12, 11, 'sp4_v_b_18') | |
// (12, 12, 'sp4_h_r_2') | |
// (12, 12, 'sp4_v_b_7') | |
// (13, 11, 'neigh_op_tnr_5') | |
// (13, 12, 'local_g3_5') | |
// (13, 12, 'lutff_0/in_2') | |
// (13, 12, 'neigh_op_rgt_5') | |
// (13, 12, 'sp4_h_r_15') | |
// (13, 13, 'neigh_op_bnr_5') | |
// (14, 11, 'neigh_op_top_5') | |
// (14, 12, 'local_g0_5') | |
// (14, 12, 'lutff_0/in_3') | |
// (14, 12, 'lutff_3/in_0') | |
// (14, 12, 'lutff_5/out') | |
// (14, 12, 'sp4_h_r_26') | |
// (14, 13, 'neigh_op_bot_5') | |
// (15, 11, 'neigh_op_tnl_5') | |
// (15, 12, 'neigh_op_lft_5') | |
// (15, 12, 'sp4_h_r_39') | |
// (15, 13, 'neigh_op_bnl_5') | |
// (16, 12, 'sp4_h_l_39') | |
wire n258; | |
// (11, 10, 'local_g0_2') | |
// (11, 10, 'lutff_5/in_1') | |
// (11, 10, 'sp4_h_r_10') | |
// (12, 9, 'neigh_op_tnr_1') | |
// (12, 10, 'neigh_op_rgt_1') | |
// (12, 10, 'sp4_h_r_23') | |
// (12, 11, 'neigh_op_bnr_1') | |
// (13, 9, 'neigh_op_top_1') | |
// (13, 10, 'lutff_1/out') | |
// (13, 10, 'sp4_h_r_34') | |
// (13, 11, 'neigh_op_bot_1') | |
// (14, 9, 'neigh_op_tnl_1') | |
// (14, 10, 'neigh_op_lft_1') | |
// (14, 10, 'sp4_h_r_47') | |
// (14, 11, 'neigh_op_bnl_1') | |
// (15, 10, 'sp4_h_l_47') | |
wire n259; | |
// (11, 10, 'local_g1_3') | |
// (11, 10, 'lutff_3/in_3') | |
// (11, 10, 'lutff_6/in_0') | |
// (11, 10, 'sp4_h_r_3') | |
// (12, 10, 'local_g1_6') | |
// (12, 10, 'lutff_4/in_1') | |
// (12, 10, 'sp4_h_r_14') | |
// (13, 9, 'neigh_op_tnr_3') | |
// (13, 10, 'local_g2_3') | |
// (13, 10, 'lutff_5/in_2') | |
// (13, 10, 'neigh_op_rgt_3') | |
// (13, 10, 'sp4_h_r_27') | |
// (13, 11, 'neigh_op_bnr_3') | |
// (14, 9, 'neigh_op_top_3') | |
// (14, 10, 'lutff_3/out') | |
// (14, 10, 'sp4_h_r_38') | |
// (14, 11, 'neigh_op_bot_3') | |
// (15, 9, 'neigh_op_tnl_3') | |
// (15, 10, 'neigh_op_lft_3') | |
// (15, 10, 'sp4_h_l_38') | |
// (15, 11, 'neigh_op_bnl_3') | |
wire n260; | |
// (11, 10, 'neigh_op_tnr_0') | |
// (11, 11, 'neigh_op_rgt_0') | |
// (11, 12, 'neigh_op_bnr_0') | |
// (12, 10, 'neigh_op_top_0') | |
// (12, 11, 'lutff_0/out') | |
// (12, 12, 'local_g1_0') | |
// (12, 12, 'lutff_6/in_1') | |
// (12, 12, 'neigh_op_bot_0') | |
// (13, 10, 'neigh_op_tnl_0') | |
// (13, 11, 'neigh_op_lft_0') | |
// (13, 12, 'neigh_op_bnl_0') | |
wire n261; | |
// (11, 10, 'neigh_op_tnr_2') | |
// (11, 11, 'local_g3_2') | |
// (11, 11, 'lutff_1/in_0') | |
// (11, 11, 'neigh_op_rgt_2') | |
// (11, 12, 'neigh_op_bnr_2') | |
// (12, 10, 'neigh_op_top_2') | |
// (12, 11, 'lutff_2/out') | |
// (12, 12, 'neigh_op_bot_2') | |
// (13, 10, 'neigh_op_tnl_2') | |
// (13, 11, 'neigh_op_lft_2') | |
// (13, 12, 'neigh_op_bnl_2') | |
wire n262; | |
// (11, 10, 'neigh_op_tnr_3') | |
// (11, 11, 'local_g3_3') | |
// (11, 11, 'lutff_3/in_3') | |
// (11, 11, 'neigh_op_rgt_3') | |
// (11, 12, 'neigh_op_bnr_3') | |
// (12, 10, 'neigh_op_top_3') | |
// (12, 11, 'lutff_3/out') | |
// (12, 12, 'neigh_op_bot_3') | |
// (13, 10, 'neigh_op_tnl_3') | |
// (13, 11, 'neigh_op_lft_3') | |
// (13, 12, 'neigh_op_bnl_3') | |
wire n263; | |
// (11, 10, 'neigh_op_tnr_4') | |
// (11, 11, 'local_g2_4') | |
// (11, 11, 'lutff_5/in_1') | |
// (11, 11, 'neigh_op_rgt_4') | |
// (11, 12, 'neigh_op_bnr_4') | |
// (12, 10, 'neigh_op_top_4') | |
// (12, 11, 'lutff_4/out') | |
// (12, 12, 'neigh_op_bot_4') | |
// (13, 10, 'neigh_op_tnl_4') | |
// (13, 11, 'neigh_op_lft_4') | |
// (13, 12, 'neigh_op_bnl_4') | |
wire n264; | |
// (11, 10, 'neigh_op_tnr_5') | |
// (11, 11, 'neigh_op_rgt_5') | |
// (11, 12, 'neigh_op_bnr_5') | |
// (12, 8, 'sp4_r_v_b_46') | |
// (12, 9, 'sp4_r_v_b_35') | |
// (12, 10, 'neigh_op_top_5') | |
// (12, 10, 'sp4_r_v_b_22') | |
// (12, 11, 'lutff_5/out') | |
// (12, 11, 'sp4_r_v_b_11') | |
// (12, 12, 'neigh_op_bot_5') | |
// (13, 7, 'sp4_v_t_46') | |
// (13, 8, 'sp4_v_b_46') | |
// (13, 9, 'sp4_v_b_35') | |
// (13, 10, 'neigh_op_tnl_5') | |
// (13, 10, 'sp4_v_b_22') | |
// (13, 11, 'neigh_op_lft_5') | |
// (13, 11, 'sp4_h_r_5') | |
// (13, 11, 'sp4_v_b_11') | |
// (13, 12, 'neigh_op_bnl_5') | |
// (14, 11, 'local_g1_0') | |
// (14, 11, 'lutff_0/in_1') | |
// (14, 11, 'sp4_h_r_16') | |
// (15, 11, 'sp4_h_r_29') | |
// (16, 11, 'sp4_h_r_40') | |
// (17, 11, 'sp4_h_l_40') | |
wire n265; | |
// (11, 10, 'neigh_op_tnr_7') | |
// (11, 11, 'neigh_op_rgt_7') | |
// (11, 12, 'neigh_op_bnr_7') | |
// (12, 10, 'neigh_op_top_7') | |
// (12, 11, 'lutff_7/out') | |
// (12, 12, 'neigh_op_bot_7') | |
// (13, 10, 'neigh_op_tnl_7') | |
// (13, 11, 'neigh_op_lft_7') | |
// (13, 12, 'local_g2_7') | |
// (13, 12, 'lutff_3/in_0') | |
// (13, 12, 'neigh_op_bnl_7') | |
wire n266; | |
// (11, 10, 'sp12_h_r_0') | |
// (12, 7, 'sp4_r_v_b_45') | |
// (12, 8, 'sp4_r_v_b_32') | |
// (12, 9, 'local_g3_5') | |
// (12, 9, 'lutff_1/in_1') | |
// (12, 9, 'lutff_4/in_0') | |
// (12, 9, 'lutff_6/in_2') | |
// (12, 9, 'sp4_r_v_b_21') | |
// (12, 10, 'local_g1_3') | |
// (12, 10, 'lutff_7/in_1') | |
// (12, 10, 'sp12_h_r_3') | |
// (12, 10, 'sp4_r_v_b_8') | |
// (12, 11, 'sp4_r_v_b_39') | |
// (12, 12, 'sp4_r_v_b_26') | |
// (12, 13, 'local_g2_7') | |
// (12, 13, 'lutff_6/in_1') | |
// (12, 13, 'sp4_r_v_b_15') | |
// (12, 14, 'sp4_r_v_b_2') | |
// (13, 6, 'sp4_v_t_45') | |
// (13, 7, 'sp4_v_b_45') | |
// (13, 8, 'sp4_v_b_32') | |
// (13, 9, 'sp4_v_b_21') | |
// (13, 10, 'sp12_h_r_4') | |
// (13, 10, 'sp4_h_r_8') | |
// (13, 10, 'sp4_v_b_8') | |
// (13, 10, 'sp4_v_t_39') | |
// (13, 11, 'sp4_v_b_39') | |
// (13, 12, 'sp4_v_b_26') | |
// (13, 13, 'sp4_v_b_15') | |
// (13, 14, 'sp4_v_b_2') | |
// (14, 9, 'local_g2_0') | |
// (14, 9, 'lutff_2/in_0') | |
// (14, 9, 'neigh_op_tnr_0') | |
// (14, 10, 'neigh_op_rgt_0') | |
// (14, 10, 'sp12_h_r_7') | |
// (14, 10, 'sp4_h_r_21') | |
// (14, 11, 'neigh_op_bnr_0') | |
// (15, 6, 'sp12_v_t_23') | |
// (15, 7, 'sp12_v_b_23') | |
// (15, 8, 'sp12_v_b_20') | |
// (15, 9, 'local_g1_0') | |
// (15, 9, 'lutff_1/in_2') | |
// (15, 9, 'neigh_op_top_0') | |
// (15, 9, 'sp12_v_b_19') | |
// (15, 10, 'lutff_0/out') | |
// (15, 10, 'sp12_h_r_8') | |
// (15, 10, 'sp12_v_b_16') | |
// (15, 10, 'sp4_h_r_32') | |
// (15, 11, 'neigh_op_bot_0') | |
// (15, 11, 'sp12_v_b_15') | |
// (15, 12, 'sp12_v_b_12') | |
// (15, 13, 'sp12_v_b_11') | |
// (15, 14, 'sp12_v_b_8') | |
// (15, 15, 'local_g2_7') | |
// (15, 15, 'lutff_5/in_0') | |
// (15, 15, 'sp12_v_b_7') | |
// (15, 16, 'sp12_v_b_4') | |
// (15, 17, 'sp12_v_b_3') | |
// (15, 18, 'sp12_v_b_0') | |
// (16, 9, 'neigh_op_tnl_0') | |
// (16, 10, 'neigh_op_lft_0') | |
// (16, 10, 'sp12_h_r_11') | |
// (16, 10, 'sp4_h_r_45') | |
// (16, 11, 'neigh_op_bnl_0') | |
// (17, 10, 'sp12_h_r_12') | |
// (17, 10, 'sp4_h_l_45') | |
// (18, 10, 'sp12_h_r_15') | |
// (19, 10, 'sp12_h_r_16') | |
// (20, 10, 'sp12_h_r_19') | |
// (21, 10, 'sp12_h_r_20') | |
// (22, 10, 'sp12_h_r_23') | |
// (23, 10, 'sp12_h_l_23') | |
wire n267; | |
// (11, 10, 'sp4_r_v_b_40') | |
// (11, 11, 'sp4_r_v_b_29') | |
// (11, 12, 'sp4_r_v_b_16') | |
// (11, 13, 'sp4_r_v_b_5') | |
// (12, 9, 'sp4_h_r_5') | |
// (12, 9, 'sp4_v_t_40') | |
// (12, 10, 'local_g2_0') | |
// (12, 10, 'lutff_5/in_1') | |
// (12, 10, 'sp4_r_v_b_43') | |
// (12, 10, 'sp4_v_b_40') | |
// (12, 11, 'sp4_r_v_b_30') | |
// (12, 11, 'sp4_v_b_29') | |
// (12, 12, 'sp4_r_v_b_19') | |
// (12, 12, 'sp4_v_b_16') | |
// (12, 13, 'sp4_r_v_b_6') | |
// (12, 13, 'sp4_v_b_5') | |
// (13, 9, 'sp4_h_r_0') | |
// (13, 9, 'sp4_h_r_16') | |
// (13, 9, 'sp4_v_t_43') | |
// (13, 10, 'local_g3_3') | |
// (13, 10, 'lutff_6/in_2') | |
// (13, 10, 'sp4_v_b_43') | |
// (13, 11, 'sp4_v_b_30') | |
// (13, 12, 'sp4_v_b_19') | |
// (13, 13, 'sp4_v_b_6') | |
// (14, 8, 'neigh_op_tnr_4') | |
// (14, 9, 'neigh_op_rgt_4') | |
// (14, 9, 'sp4_h_r_13') | |
// (14, 9, 'sp4_h_r_29') | |
// (14, 10, 'neigh_op_bnr_4') | |
// (15, 8, 'neigh_op_top_4') | |
// (15, 9, 'local_g3_4') | |
// (15, 9, 'lutff_0/in_3') | |
// (15, 9, 'lutff_2/in_1') | |
// (15, 9, 'lutff_4/out') | |
// (15, 9, 'sp4_h_r_24') | |
// (15, 9, 'sp4_h_r_40') | |
// (15, 10, 'neigh_op_bot_4') | |
// (16, 8, 'neigh_op_tnl_4') | |
// (16, 9, 'neigh_op_lft_4') | |
// (16, 9, 'sp4_h_l_40') | |
// (16, 9, 'sp4_h_r_37') | |
// (16, 10, 'neigh_op_bnl_4') | |
// (17, 9, 'sp4_h_l_37') | |
wire n268; | |
// (11, 10, 'sp4_r_v_b_41') | |
// (11, 11, 'sp4_r_v_b_28') | |
// (11, 12, 'sp4_r_v_b_17') | |
// (11, 13, 'sp4_r_v_b_4') | |
// (11, 15, 'sp4_h_r_11') | |
// (12, 9, 'sp4_v_t_41') | |
// (12, 10, 'local_g3_1') | |
// (12, 10, 'lutff_3/in_1') | |
// (12, 10, 'sp4_v_b_41') | |
// (12, 11, 'sp4_v_b_28') | |
// (12, 12, 'sp4_v_b_17') | |
// (12, 13, 'local_g0_3') | |
// (12, 13, 'lutff_1/in_2') | |
// (12, 13, 'lutff_2/in_3') | |
// (12, 13, 'lutff_5/in_2') | |
// (12, 13, 'sp4_h_r_11') | |
// (12, 13, 'sp4_v_b_4') | |
// (12, 15, 'local_g0_6') | |
// (12, 15, 'lutff_1/in_1') | |
// (12, 15, 'sp4_h_r_22') | |
// (13, 13, 'sp4_h_r_22') | |
// (13, 15, 'sp4_h_r_35') | |
// (14, 11, 'local_g2_6') | |
// (14, 11, 'lutff_7/in_3') | |
// (14, 11, 'sp4_r_v_b_38') | |
// (14, 12, 'neigh_op_tnr_7') | |
// (14, 12, 'sp4_r_v_b_27') | |
// (14, 12, 'sp4_r_v_b_43') | |
// (14, 13, 'neigh_op_rgt_7') | |
// (14, 13, 'sp4_h_r_35') | |
// (14, 13, 'sp4_r_v_b_14') | |
// (14, 13, 'sp4_r_v_b_30') | |
// (14, 14, 'neigh_op_bnr_7') | |
// (14, 14, 'sp4_r_v_b_19') | |
// (14, 14, 'sp4_r_v_b_3') | |
// (14, 15, 'local_g1_6') | |
// (14, 15, 'lutff_4/in_3') | |
// (14, 15, 'sp4_h_r_46') | |
// (14, 15, 'sp4_r_v_b_6') | |
// (15, 10, 'sp4_v_t_38') | |
// (15, 11, 'sp4_v_b_38') | |
// (15, 11, 'sp4_v_t_43') | |
// (15, 12, 'neigh_op_top_7') | |
// (15, 12, 'sp4_v_b_27') | |
// (15, 12, 'sp4_v_b_43') | |
// (15, 13, 'lutff_7/out') | |
// (15, 13, 'sp4_h_r_46') | |
// (15, 13, 'sp4_v_b_14') | |
// (15, 13, 'sp4_v_b_30') | |
// (15, 14, 'neigh_op_bot_7') | |
// (15, 14, 'sp4_v_b_19') | |
// (15, 14, 'sp4_v_b_3') | |
// (15, 15, 'sp4_h_l_46') | |
// (15, 15, 'sp4_v_b_6') | |
// (16, 12, 'neigh_op_tnl_7') | |
// (16, 13, 'neigh_op_lft_7') | |
// (16, 13, 'sp4_h_l_46') | |
// (16, 14, 'neigh_op_bnl_7') | |
wire n269; | |
// (11, 10, 'sp4_r_v_b_45') | |
// (11, 11, 'sp4_r_v_b_32') | |
// (11, 12, 'sp4_r_v_b_21') | |
// (11, 13, 'sp4_r_v_b_8') | |
// (12, 9, 'sp4_h_r_2') | |
// (12, 9, 'sp4_v_t_45') | |
// (12, 10, 'local_g3_5') | |
// (12, 10, 'lutff_6/in_2') | |
// (12, 10, 'sp4_v_b_45') | |
// (12, 11, 'sp4_v_b_32') | |
// (12, 12, 'sp4_v_b_21') | |
// (12, 13, 'sp4_v_b_8') | |
// (13, 8, 'neigh_op_tnr_5') | |
// (13, 9, 'neigh_op_rgt_5') | |
// (13, 9, 'sp4_h_r_15') | |
// (13, 10, 'local_g0_5') | |
// (13, 10, 'lutff_7/in_2') | |
// (13, 10, 'neigh_op_bnr_5') | |
// (14, 8, 'neigh_op_top_5') | |
// (14, 9, 'local_g2_5') | |
// (14, 9, 'lutff_5/out') | |
// (14, 9, 'lutff_6/in_1') | |
// (14, 9, 'lutff_7/in_2') | |
// (14, 9, 'sp4_h_r_26') | |
// (14, 10, 'neigh_op_bot_5') | |
// (15, 8, 'neigh_op_tnl_5') | |
// (15, 9, 'neigh_op_lft_5') | |
// (15, 9, 'sp4_h_r_39') | |
// (15, 10, 'neigh_op_bnl_5') | |
// (16, 9, 'sp4_h_l_39') | |
wire n270; | |
// (11, 10, 'sp4_r_v_b_46') | |
// (11, 11, 'sp4_r_v_b_35') | |
// (11, 12, 'sp4_r_v_b_22') | |
// (11, 13, 'sp4_r_v_b_11') | |
// (12, 9, 'local_g1_6') | |
// (12, 9, 'lutff_1/in_2') | |
// (12, 9, 'sp4_h_r_11') | |
// (12, 9, 'sp4_h_r_6') | |
// (12, 9, 'sp4_v_t_46') | |
// (12, 10, 'sp4_v_b_46') | |
// (12, 11, 'sp4_v_b_35') | |
// (12, 12, 'local_g0_6') | |
// (12, 12, 'lutff_2/in_0') | |
// (12, 12, 'sp4_v_b_22') | |
// (12, 13, 'sp4_v_b_11') | |
// (13, 9, 'local_g0_6') | |
// (13, 9, 'lutff_3/in_3') | |
// (13, 9, 'sp4_h_r_19') | |
// (13, 9, 'sp4_h_r_22') | |
// (14, 9, 'sp4_h_r_30') | |
// (14, 9, 'sp4_h_r_35') | |
// (15, 9, 'sp4_h_r_43') | |
// (15, 9, 'sp4_h_r_46') | |
// (16, 9, 'sp4_h_l_43') | |
// (16, 9, 'sp4_h_l_46') | |
// (16, 9, 'sp4_h_r_3') | |
// (16, 10, 'local_g1_5') | |
// (16, 10, 'lutff_5/in_3') | |
// (16, 10, 'sp4_h_r_5') | |
// (17, 9, 'sp4_h_r_14') | |
// (17, 10, 'sp4_h_r_16') | |
// (18, 9, 'sp4_h_r_27') | |
// (18, 10, 'sp4_h_r_29') | |
// (18, 10, 'sp4_r_v_b_46') | |
// (18, 11, 'sp4_r_v_b_35') | |
// (18, 12, 'sp4_r_v_b_22') | |
// (18, 13, 'sp4_r_v_b_11') | |
// (19, 7, 'sp4_r_v_b_40') | |
// (19, 8, 'neigh_op_tnr_0') | |
// (19, 8, 'sp4_r_v_b_29') | |
// (19, 9, 'neigh_op_rgt_0') | |
// (19, 9, 'sp4_h_r_38') | |
// (19, 9, 'sp4_h_r_5') | |
// (19, 9, 'sp4_r_v_b_16') | |
// (19, 9, 'sp4_v_t_46') | |
// (19, 10, 'neigh_op_bnr_0') | |
// (19, 10, 'sp4_h_r_40') | |
// (19, 10, 'sp4_r_v_b_5') | |
// (19, 10, 'sp4_v_b_46') | |
// (19, 11, 'sp4_v_b_35') | |
// (19, 12, 'local_g1_6') | |
// (19, 12, 'ram/WDATA_7') | |
// (19, 12, 'sp4_v_b_22') | |
// (19, 13, 'sp4_v_b_11') | |
// (20, 6, 'sp4_v_t_40') | |
// (20, 7, 'sp4_v_b_40') | |
// (20, 8, 'neigh_op_top_0') | |
// (20, 8, 'sp4_v_b_29') | |
// (20, 9, 'lutff_0/out') | |
// (20, 9, 'sp4_h_l_38') | |
// (20, 9, 'sp4_h_r_0') | |
// (20, 9, 'sp4_h_r_16') | |
// (20, 9, 'sp4_v_b_16') | |
// (20, 10, 'neigh_op_bot_0') | |
// (20, 10, 'sp4_h_l_40') | |
// (20, 10, 'sp4_v_b_5') | |
// (21, 8, 'neigh_op_tnl_0') | |
// (21, 9, 'neigh_op_lft_0') | |
// (21, 9, 'sp4_h_r_13') | |
// (21, 9, 'sp4_h_r_29') | |
// (21, 10, 'neigh_op_bnl_0') | |
// (22, 9, 'sp4_h_r_24') | |
// (22, 9, 'sp4_h_r_40') | |
// (23, 9, 'sp4_h_l_40') | |
// (23, 9, 'sp4_h_r_37') | |
// (24, 9, 'sp4_h_l_37') | |
wire n271; | |
// (11, 11, 'neigh_op_tnr_0') | |
// (11, 12, 'neigh_op_rgt_0') | |
// (11, 13, 'neigh_op_bnr_0') | |
// (12, 11, 'neigh_op_top_0') | |
// (12, 12, 'lutff_0/out') | |
// (12, 13, 'local_g0_0') | |
// (12, 13, 'lutff_0/in_0') | |
// (12, 13, 'neigh_op_bot_0') | |
// (13, 11, 'neigh_op_tnl_0') | |
// (13, 12, 'neigh_op_lft_0') | |
// (13, 13, 'neigh_op_bnl_0') | |
wire n272; | |
// (11, 11, 'neigh_op_tnr_1') | |
// (11, 12, 'neigh_op_rgt_1') | |
// (11, 13, 'neigh_op_bnr_1') | |
// (12, 11, 'neigh_op_top_1') | |
// (12, 12, 'local_g0_1') | |
// (12, 12, 'lutff_1/out') | |
// (12, 12, 'lutff_3/in_0') | |
// (12, 13, 'neigh_op_bot_1') | |
// (13, 11, 'neigh_op_tnl_1') | |
// (13, 12, 'neigh_op_lft_1') | |
// (13, 13, 'neigh_op_bnl_1') | |
wire n273; | |
// (11, 11, 'neigh_op_tnr_3') | |
// (11, 12, 'neigh_op_rgt_3') | |
// (11, 13, 'neigh_op_bnr_3') | |
// (12, 11, 'neigh_op_top_3') | |
// (12, 12, 'local_g3_3') | |
// (12, 12, 'lutff_3/out') | |
// (12, 12, 'lutff_4/in_2') | |
// (12, 13, 'neigh_op_bot_3') | |
// (13, 11, 'neigh_op_tnl_3') | |
// (13, 12, 'neigh_op_lft_3') | |
// (13, 13, 'neigh_op_bnl_3') | |
reg n274 = 0; | |
// (11, 11, 'neigh_op_tnr_4') | |
// (11, 12, 'neigh_op_rgt_4') | |
// (11, 13, 'neigh_op_bnr_4') | |
// (12, 11, 'neigh_op_top_4') | |
// (12, 11, 'sp4_r_v_b_36') | |
// (12, 12, 'lutff_4/out') | |
// (12, 12, 'sp4_r_v_b_25') | |
// (12, 13, 'neigh_op_bot_4') | |
// (12, 13, 'sp4_r_v_b_12') | |
// (12, 14, 'sp4_r_v_b_1') | |
// (13, 10, 'sp4_h_r_6') | |
// (13, 10, 'sp4_v_t_36') | |
// (13, 11, 'neigh_op_tnl_4') | |
// (13, 11, 'sp4_v_b_36') | |
// (13, 12, 'neigh_op_lft_4') | |
// (13, 12, 'sp4_v_b_25') | |
// (13, 13, 'neigh_op_bnl_4') | |
// (13, 13, 'sp4_v_b_12') | |
// (13, 14, 'sp4_v_b_1') | |
// (14, 10, 'sp4_h_r_19') | |
// (15, 10, 'local_g2_6') | |
// (15, 10, 'lutff_6/in_2') | |
// (15, 10, 'sp4_h_r_30') | |
// (16, 10, 'sp4_h_r_43') | |
// (17, 10, 'sp4_h_l_43') | |
wire n275; | |
// (11, 11, 'neigh_op_tnr_5') | |
// (11, 12, 'neigh_op_rgt_5') | |
// (11, 13, 'neigh_op_bnr_5') | |
// (12, 11, 'neigh_op_top_5') | |
// (12, 12, 'lutff_5/out') | |
// (12, 12, 'sp4_h_r_10') | |
// (12, 13, 'neigh_op_bot_5') | |
// (13, 11, 'neigh_op_tnl_5') | |
// (13, 12, 'neigh_op_lft_5') | |
// (13, 12, 'sp4_h_r_23') | |
// (13, 13, 'neigh_op_bnl_5') | |
// (14, 12, 'sp4_h_r_34') | |
// (15, 12, 'local_g2_7') | |
// (15, 12, 'lutff_1/in_0') | |
// (15, 12, 'sp4_h_r_47') | |
// (16, 12, 'sp4_h_l_47') | |
wire n276; | |
// (11, 11, 'neigh_op_tnr_6') | |
// (11, 12, 'neigh_op_rgt_6') | |
// (11, 13, 'neigh_op_bnr_6') | |
// (12, 11, 'neigh_op_top_6') | |
// (12, 12, 'local_g1_6') | |
// (12, 12, 'lutff_5/in_2') | |
// (12, 12, 'lutff_6/out') | |
// (12, 13, 'neigh_op_bot_6') | |
// (13, 11, 'neigh_op_tnl_6') | |
// (13, 12, 'neigh_op_lft_6') | |
// (13, 13, 'neigh_op_bnl_6') | |
wire n277; | |
// (11, 11, 'neigh_op_tnr_7') | |
// (11, 12, 'neigh_op_rgt_7') | |
// (11, 13, 'neigh_op_bnr_7') | |
// (12, 11, 'neigh_op_top_7') | |
// (12, 12, 'lutff_7/out') | |
// (12, 13, 'local_g0_7') | |
// (12, 13, 'lutff_0/in_1') | |
// (12, 13, 'neigh_op_bot_7') | |
// (13, 11, 'neigh_op_tnl_7') | |
// (13, 12, 'neigh_op_lft_7') | |
// (13, 13, 'neigh_op_bnl_7') | |
wire n278; | |
// (11, 11, 'sp4_h_r_1') | |
// (12, 11, 'local_g0_4') | |
// (12, 11, 'lutff_3/in_1') | |
// (12, 11, 'sp4_h_r_12') | |
// (13, 11, 'local_g1_1') | |
// (13, 11, 'lutff_4/in_2') | |
// (13, 11, 'sp4_h_r_25') | |
// (13, 11, 'sp4_h_r_9') | |
// (14, 11, 'sp4_h_r_20') | |
// (14, 11, 'sp4_h_r_36') | |
// (15, 10, 'neigh_op_tnr_6') | |
// (15, 11, 'local_g3_6') | |
// (15, 11, 'lutff_2/in_1') | |
// (15, 11, 'neigh_op_rgt_6') | |
// (15, 11, 'sp4_h_l_36') | |
// (15, 11, 'sp4_h_r_1') | |
// (15, 11, 'sp4_h_r_33') | |
// (15, 12, 'neigh_op_bnr_6') | |
// (16, 10, 'neigh_op_top_6') | |
// (16, 11, 'local_g2_6') | |
// (16, 11, 'lutff_0/in_0') | |
// (16, 11, 'lutff_6/out') | |
// (16, 11, 'sp4_h_r_12') | |
// (16, 11, 'sp4_h_r_44') | |
// (16, 12, 'neigh_op_bot_6') | |
// (17, 10, 'neigh_op_tnl_6') | |
// (17, 11, 'neigh_op_lft_6') | |
// (17, 11, 'sp4_h_l_44') | |
// (17, 11, 'sp4_h_r_25') | |
// (17, 12, 'neigh_op_bnl_6') | |
// (18, 11, 'sp4_h_r_36') | |
// (19, 11, 'sp4_h_l_36') | |
wire n279; | |
// (11, 11, 'sp4_h_r_6') | |
// (12, 11, 'local_g1_3') | |
// (12, 11, 'lutff_4/in_2') | |
// (12, 11, 'sp4_h_r_19') | |
// (13, 8, 'sp4_r_v_b_46') | |
// (13, 9, 'sp4_r_v_b_35') | |
// (13, 10, 'sp4_r_v_b_22') | |
// (13, 11, 'sp4_h_r_30') | |
// (13, 11, 'sp4_r_v_b_11') | |
// (13, 13, 'sp4_h_r_6') | |
// (14, 7, 'sp4_v_t_46') | |
// (14, 8, 'sp4_r_v_b_43') | |
// (14, 8, 'sp4_v_b_46') | |
// (14, 9, 'sp4_r_v_b_30') | |
// (14, 9, 'sp4_v_b_35') | |
// (14, 10, 'local_g1_6') | |
// (14, 10, 'lutff_2/in_3') | |
// (14, 10, 'sp4_r_v_b_19') | |
// (14, 10, 'sp4_v_b_22') | |
// (14, 11, 'sp4_h_r_11') | |
// (14, 11, 'sp4_h_r_43') | |
// (14, 11, 'sp4_r_v_b_6') | |
// (14, 11, 'sp4_v_b_11') | |
// (14, 13, 'local_g0_3') | |
// (14, 13, 'lutff_3/in_2') | |
// (14, 13, 'sp4_h_r_19') | |
// (15, 7, 'sp4_v_t_43') | |
// (15, 8, 'sp4_v_b_43') | |
// (15, 9, 'sp4_v_b_30') | |
// (15, 10, 'local_g0_3') | |
// (15, 10, 'lutff_7/in_2') | |
// (15, 10, 'sp4_v_b_19') | |
// (15, 11, 'sp4_h_l_43') | |
// (15, 11, 'sp4_h_r_22') | |
// (15, 11, 'sp4_h_r_6') | |
// (15, 11, 'sp4_v_b_6') | |
// (15, 13, 'sp4_h_r_30') | |
// (16, 10, 'local_g3_7') | |
// (16, 10, 'lutff_4/in_0') | |
// (16, 10, 'neigh_op_tnr_7') | |
// (16, 10, 'sp4_r_v_b_43') | |
// (16, 11, 'local_g2_7') | |
// (16, 11, 'lutff_7/in_2') | |
// (16, 11, 'neigh_op_rgt_7') | |
// (16, 11, 'sp4_h_r_19') | |
// (16, 11, 'sp4_h_r_35') | |
// (16, 11, 'sp4_r_v_b_30') | |
// (16, 12, 'neigh_op_bnr_7') | |
// (16, 12, 'sp4_r_v_b_19') | |
// (16, 13, 'sp4_h_r_43') | |
// (16, 13, 'sp4_r_v_b_6') | |
// (17, 9, 'sp4_v_t_43') | |
// (17, 10, 'neigh_op_top_7') | |
// (17, 10, 'sp4_v_b_43') | |
// (17, 11, 'lutff_7/out') | |
// (17, 11, 'sp4_h_r_30') | |
// (17, 11, 'sp4_h_r_46') | |
// (17, 11, 'sp4_v_b_30') | |
// (17, 12, 'neigh_op_bot_7') | |
// (17, 12, 'sp4_v_b_19') | |
// (17, 13, 'local_g0_6') | |
// (17, 13, 'lutff_2/in_0') | |
// (17, 13, 'sp4_h_l_43') | |
// (17, 13, 'sp4_v_b_6') | |
// (18, 10, 'neigh_op_tnl_7') | |
// (18, 11, 'neigh_op_lft_7') | |
// (18, 11, 'sp4_h_l_46') | |
// (18, 11, 'sp4_h_r_43') | |
// (18, 12, 'neigh_op_bnl_7') | |
// (19, 11, 'sp4_h_l_43') | |
wire n280; | |
// (11, 11, 'sp4_h_r_7') | |
// (12, 11, 'sp4_h_r_18') | |
// (13, 10, 'neigh_op_tnr_5') | |
// (13, 11, 'neigh_op_rgt_5') | |
// (13, 11, 'sp12_h_r_1') | |
// (13, 11, 'sp4_h_r_31') | |
// (13, 12, 'neigh_op_bnr_5') | |
// (14, 10, 'neigh_op_top_5') | |
// (14, 11, 'lutff_5/out') | |
// (14, 11, 'sp12_h_r_2') | |
// (14, 11, 'sp4_h_r_42') | |
// (14, 12, 'neigh_op_bot_5') | |
// (15, 10, 'neigh_op_tnl_5') | |
// (15, 11, 'neigh_op_lft_5') | |
// (15, 11, 'sp12_h_r_5') | |
// (15, 11, 'sp4_h_l_42') | |
// (15, 11, 'sp4_h_r_7') | |
// (15, 12, 'neigh_op_bnl_5') | |
// (16, 11, 'sp12_h_r_6') | |
// (16, 11, 'sp4_h_r_18') | |
// (17, 11, 'sp12_h_r_9') | |
// (17, 11, 'sp4_h_r_31') | |
// (18, 11, 'local_g1_2') | |
// (18, 11, 'lutff_6/in_1') | |
// (18, 11, 'sp12_h_r_10') | |
// (18, 11, 'sp4_h_r_42') | |
// (18, 12, 'sp4_r_v_b_42') | |
// (18, 13, 'sp4_r_v_b_31') | |
// (18, 14, 'sp4_r_v_b_18') | |
// (18, 15, 'sp4_r_v_b_7') | |
// (19, 11, 'sp12_h_r_13') | |
// (19, 11, 'sp4_h_l_42') | |
// (19, 11, 'sp4_v_t_42') | |
// (19, 12, 'local_g2_2') | |
// (19, 12, 'ram/WCLKE') | |
// (19, 12, 'sp4_v_b_42') | |
// (19, 13, 'sp4_v_b_31') | |
// (19, 14, 'sp4_v_b_18') | |
// (19, 15, 'sp4_v_b_7') | |
// (20, 11, 'sp12_h_r_14') | |
// (21, 11, 'sp12_h_r_17') | |
// (22, 11, 'sp12_h_r_18') | |
// (23, 11, 'sp12_h_r_21') | |
// (24, 11, 'sp12_h_r_22') | |
// (25, 11, 'sp12_h_l_22') | |
wire n281; | |
// (11, 11, 'sp4_r_v_b_45') | |
// (11, 12, 'sp4_r_v_b_32') | |
// (11, 13, 'sp4_r_v_b_21') | |
// (11, 14, 'sp4_r_v_b_8') | |
// (12, 10, 'local_g1_0') | |
// (12, 10, 'lutff_3/in_2') | |
// (12, 10, 'sp4_h_r_8') | |
// (12, 10, 'sp4_v_t_45') | |
// (12, 11, 'sp4_r_v_b_46') | |
// (12, 11, 'sp4_v_b_45') | |
// (12, 12, 'sp4_r_v_b_35') | |
// (12, 12, 'sp4_v_b_32') | |
// (12, 13, 'local_g1_5') | |
// (12, 13, 'local_g3_6') | |
// (12, 13, 'lutff_1/in_1') | |
// (12, 13, 'lutff_5/in_0') | |
// (12, 13, 'sp4_r_v_b_22') | |
// (12, 13, 'sp4_v_b_21') | |
// (12, 14, 'sp4_r_v_b_11') | |
// (12, 14, 'sp4_v_b_8') | |
// (13, 9, 'neigh_op_tnr_0') | |
// (13, 10, 'local_g3_0') | |
// (13, 10, 'lutff_4/in_1') | |
// (13, 10, 'neigh_op_rgt_0') | |
// (13, 10, 'sp4_h_r_21') | |
// (13, 10, 'sp4_h_r_5') | |
// (13, 10, 'sp4_v_t_46') | |
// (13, 11, 'neigh_op_bnr_0') | |
// (13, 11, 'sp4_v_b_46') | |
// (13, 12, 'sp4_v_b_35') | |
// (13, 13, 'sp4_v_b_22') | |
// (13, 14, 'sp4_v_b_11') | |
// (14, 9, 'neigh_op_top_0') | |
// (14, 10, 'lutff_0/out') | |
// (14, 10, 'sp4_h_r_16') | |
// (14, 10, 'sp4_h_r_32') | |
// (14, 11, 'neigh_op_bot_0') | |
// (15, 9, 'neigh_op_tnl_0') | |
// (15, 10, 'neigh_op_lft_0') | |
// (15, 10, 'sp4_h_r_29') | |
// (15, 10, 'sp4_h_r_45') | |
// (15, 11, 'neigh_op_bnl_0') | |
// (16, 10, 'sp4_h_l_45') | |
// (16, 10, 'sp4_h_r_40') | |
// (17, 10, 'sp4_h_l_40') | |
wire n282; | |
// (11, 12, 'neigh_op_tnr_0') | |
// (11, 13, 'neigh_op_rgt_0') | |
// (11, 14, 'neigh_op_bnr_0') | |
// (12, 12, 'neigh_op_top_0') | |
// (12, 13, 'local_g3_0') | |
// (12, 13, 'lutff_0/out') | |
// (12, 13, 'lutff_4/in_3') | |
// (12, 14, 'neigh_op_bot_0') | |
// (13, 12, 'neigh_op_tnl_0') | |
// (13, 13, 'neigh_op_lft_0') | |
// (13, 14, 'neigh_op_bnl_0') | |
wire n283; | |
// (11, 12, 'neigh_op_tnr_1') | |
// (11, 13, 'neigh_op_rgt_1') | |
// (11, 14, 'neigh_op_bnr_1') | |
// (12, 12, 'neigh_op_top_1') | |
// (12, 13, 'local_g2_1') | |
// (12, 13, 'lutff_1/out') | |
// (12, 13, 'lutff_7/in_0') | |
// (12, 14, 'neigh_op_bot_1') | |
// (13, 12, 'neigh_op_tnl_1') | |
// (13, 13, 'neigh_op_lft_1') | |
// (13, 14, 'neigh_op_bnl_1') | |
wire n284; | |
// (11, 12, 'neigh_op_tnr_2') | |
// (11, 13, 'neigh_op_rgt_2') | |
// (11, 14, 'neigh_op_bnr_2') | |
// (12, 12, 'neigh_op_top_2') | |
// (12, 13, 'local_g3_2') | |
// (12, 13, 'lutff_0/in_3') | |
// (12, 13, 'lutff_2/out') | |
// (12, 14, 'neigh_op_bot_2') | |
// (13, 12, 'neigh_op_tnl_2') | |
// (13, 13, 'neigh_op_lft_2') | |
// (13, 14, 'neigh_op_bnl_2') | |
wire n285; | |
// (11, 12, 'neigh_op_tnr_3') | |
// (11, 13, 'neigh_op_rgt_3') | |
// (11, 14, 'neigh_op_bnr_3') | |
// (12, 12, 'neigh_op_top_3') | |
// (12, 13, 'local_g1_3') | |
// (12, 13, 'lutff_3/out') | |
// (12, 13, 'lutff_7/in_3') | |
// (12, 14, 'neigh_op_bot_3') | |
// (13, 12, 'neigh_op_tnl_3') | |
// (13, 13, 'neigh_op_lft_3') | |
// (13, 14, 'neigh_op_bnl_3') | |
reg n286 = 0; | |
// (11, 12, 'neigh_op_tnr_4') | |
// (11, 13, 'neigh_op_rgt_4') | |
// (11, 14, 'neigh_op_bnr_4') | |
// (12, 12, 'neigh_op_top_4') | |
// (12, 13, 'lutff_4/out') | |
// (12, 14, 'neigh_op_bot_4') | |
// (13, 12, 'neigh_op_tnl_4') | |
// (13, 13, 'local_g1_4') | |
// (13, 13, 'lutff_0/in_3') | |
// (13, 13, 'neigh_op_lft_4') | |
// (13, 14, 'neigh_op_bnl_4') | |
wire n287; | |
// (11, 12, 'neigh_op_tnr_5') | |
// (11, 13, 'neigh_op_rgt_5') | |
// (11, 14, 'neigh_op_bnr_5') | |
// (12, 12, 'neigh_op_top_5') | |
// (12, 13, 'local_g0_5') | |
// (12, 13, 'lutff_5/out') | |
// (12, 13, 'lutff_7/in_2') | |
// (12, 14, 'neigh_op_bot_5') | |
// (13, 12, 'neigh_op_tnl_5') | |
// (13, 13, 'neigh_op_lft_5') | |
// (13, 14, 'neigh_op_bnl_5') | |
wire n288; | |
// (11, 12, 'neigh_op_tnr_7') | |
// (11, 13, 'neigh_op_rgt_7') | |
// (11, 13, 'sp4_h_r_3') | |
// (11, 14, 'neigh_op_bnr_7') | |
// (12, 12, 'neigh_op_top_7') | |
// (12, 13, 'lutff_7/out') | |
// (12, 13, 'sp4_h_r_14') | |
// (12, 14, 'neigh_op_bot_7') | |
// (13, 12, 'neigh_op_tnl_7') | |
// (13, 13, 'neigh_op_lft_7') | |
// (13, 13, 'sp4_h_r_27') | |
// (13, 14, 'neigh_op_bnl_7') | |
// (14, 13, 'local_g2_6') | |
// (14, 13, 'lutff_1/in_3') | |
// (14, 13, 'sp4_h_r_38') | |
// (15, 13, 'sp4_h_l_38') | |
wire n289; | |
// (11, 12, 'sp4_h_r_0') | |
// (12, 9, 'sp4_r_v_b_45') | |
// (12, 10, 'sp4_r_v_b_32') | |
// (12, 11, 'neigh_op_tnr_4') | |
// (12, 11, 'sp4_r_v_b_21') | |
// (12, 12, 'neigh_op_rgt_4') | |
// (12, 12, 'sp4_h_r_13') | |
// (12, 12, 'sp4_r_v_b_8') | |
// (12, 13, 'neigh_op_bnr_4') | |
// (13, 8, 'sp4_v_t_45') | |
// (13, 9, 'local_g2_5') | |
// (13, 9, 'lutff_1/in_0') | |
// (13, 9, 'lutff_3/in_0') | |
// (13, 9, 'lutff_6/in_3') | |
// (13, 9, 'sp4_r_v_b_44') | |
// (13, 9, 'sp4_v_b_45') | |
// (13, 10, 'sp4_r_v_b_33') | |
// (13, 10, 'sp4_v_b_32') | |
// (13, 11, 'neigh_op_top_4') | |
// (13, 11, 'sp4_r_v_b_20') | |
// (13, 11, 'sp4_r_v_b_36') | |
// (13, 11, 'sp4_v_b_21') | |
// (13, 12, 'local_g3_4') | |
// (13, 12, 'lutff_2/in_1') | |
// (13, 12, 'lutff_4/out') | |
// (13, 12, 'lutff_7/in_2') | |
// (13, 12, 'sp4_h_r_24') | |
// (13, 12, 'sp4_h_r_8') | |
// (13, 12, 'sp4_r_v_b_25') | |
// (13, 12, 'sp4_r_v_b_9') | |
// (13, 12, 'sp4_v_b_8') | |
// (13, 13, 'neigh_op_bot_4') | |
// (13, 13, 'sp4_r_v_b_12') | |
// (13, 14, 'sp4_r_v_b_1') | |
// (14, 8, 'sp4_v_t_44') | |
// (14, 9, 'local_g3_4') | |
// (14, 9, 'lutff_5/in_0') | |
// (14, 9, 'sp4_r_v_b_43') | |
// (14, 9, 'sp4_v_b_44') | |
// (14, 10, 'local_g2_1') | |
// (14, 10, 'lutff_0/in_3') | |
// (14, 10, 'lutff_3/in_0') | |
// (14, 10, 'sp4_h_r_6') | |
// (14, 10, 'sp4_r_v_b_30') | |
// (14, 10, 'sp4_v_b_33') | |
// (14, 10, 'sp4_v_t_36') | |
// (14, 11, 'neigh_op_tnl_4') | |
// (14, 11, 'sp4_r_v_b_19') | |
// (14, 11, 'sp4_v_b_20') | |
// (14, 11, 'sp4_v_b_36') | |
// (14, 12, 'neigh_op_lft_4') | |
// (14, 12, 'sp4_h_r_21') | |
// (14, 12, 'sp4_h_r_37') | |
// (14, 12, 'sp4_r_v_b_6') | |
// (14, 12, 'sp4_v_b_25') | |
// (14, 12, 'sp4_v_b_9') | |
// (14, 13, 'neigh_op_bnl_4') | |
// (14, 13, 'sp4_v_b_12') | |
// (14, 14, 'sp4_v_b_1') | |
// (15, 8, 'sp4_v_t_43') | |
// (15, 9, 'local_g2_3') | |
// (15, 9, 'lutff_4/in_1') | |
// (15, 9, 'sp4_v_b_43') | |
// (15, 10, 'sp4_h_r_19') | |
// (15, 10, 'sp4_v_b_30') | |
// (15, 11, 'local_g0_3') | |
// (15, 11, 'lutff_6/in_3') | |
// (15, 11, 'sp4_v_b_19') | |
// (15, 12, 'sp4_h_l_37') | |
// (15, 12, 'sp4_h_r_32') | |
// (15, 12, 'sp4_v_b_6') | |
// (16, 9, 'sp4_r_v_b_45') | |
// (16, 10, 'local_g2_6') | |
// (16, 10, 'lutff_3/in_1') | |
// (16, 10, 'sp4_h_r_30') | |
// (16, 10, 'sp4_r_v_b_32') | |
// (16, 11, 'local_g3_5') | |
// (16, 11, 'lutff_6/in_2') | |
// (16, 11, 'sp4_r_v_b_21') | |
// (16, 12, 'local_g2_5') | |
// (16, 12, 'lutff_0/in_1') | |
// (16, 12, 'lutff_4/in_3') | |
// (16, 12, 'sp4_h_r_45') | |
// (16, 12, 'sp4_r_v_b_8') | |
// (17, 8, 'sp4_v_t_45') | |
// (17, 9, 'sp4_v_b_45') | |
// (17, 10, 'sp4_h_r_43') | |
// (17, 10, 'sp4_v_b_32') | |
// (17, 11, 'sp4_v_b_21') | |
// (17, 12, 'sp4_h_l_45') | |
// (17, 12, 'sp4_v_b_8') | |
// (18, 10, 'sp4_h_l_43') | |
wire n290; | |
// (11, 13, 'neigh_op_tnr_1') | |
// (11, 14, 'neigh_op_rgt_1') | |
// (11, 15, 'neigh_op_bnr_1') | |
// (12, 13, 'neigh_op_top_1') | |
// (12, 14, 'local_g3_1') | |
// (12, 14, 'lutff_1/out') | |
// (12, 14, 'lutff_5/in_1') | |
// (12, 15, 'neigh_op_bot_1') | |
// (13, 13, 'neigh_op_tnl_1') | |
// (13, 14, 'neigh_op_lft_1') | |
// (13, 15, 'neigh_op_bnl_1') | |
wire n291; | |
// (11, 13, 'neigh_op_tnr_2') | |
// (11, 14, 'neigh_op_rgt_2') | |
// (11, 15, 'neigh_op_bnr_2') | |
// (12, 13, 'local_g0_2') | |
// (12, 13, 'lutff_4/in_0') | |
// (12, 13, 'neigh_op_top_2') | |
// (12, 14, 'lutff_2/out') | |
// (12, 15, 'neigh_op_bot_2') | |
// (13, 13, 'neigh_op_tnl_2') | |
// (13, 14, 'neigh_op_lft_2') | |
// (13, 15, 'neigh_op_bnl_2') | |
wire n292; | |
// (11, 13, 'neigh_op_tnr_5') | |
// (11, 14, 'local_g3_5') | |
// (11, 14, 'lutff_6/in_2') | |
// (11, 14, 'neigh_op_rgt_5') | |
// (11, 15, 'neigh_op_bnr_5') | |
// (12, 13, 'neigh_op_top_5') | |
// (12, 14, 'lutff_5/out') | |
// (12, 15, 'neigh_op_bot_5') | |
// (13, 13, 'neigh_op_tnl_5') | |
// (13, 14, 'neigh_op_lft_5') | |
// (13, 15, 'neigh_op_bnl_5') | |
wire n293; | |
// (11, 13, 'neigh_op_tnr_6') | |
// (11, 14, 'local_g2_6') | |
// (11, 14, 'lutff_2/in_0') | |
// (11, 14, 'neigh_op_rgt_6') | |
// (11, 15, 'neigh_op_bnr_6') | |
// (12, 13, 'neigh_op_top_6') | |
// (12, 14, 'lutff_6/out') | |
// (12, 15, 'neigh_op_bot_6') | |
// (13, 13, 'neigh_op_tnl_6') | |
// (13, 14, 'neigh_op_lft_6') | |
// (13, 15, 'neigh_op_bnl_6') | |
wire n294; | |
// (11, 13, 'neigh_op_tnr_7') | |
// (11, 14, 'neigh_op_rgt_7') | |
// (11, 15, 'neigh_op_bnr_7') | |
// (12, 13, 'neigh_op_top_7') | |
// (12, 14, 'local_g0_7') | |
// (12, 14, 'lutff_0/in_1') | |
// (12, 14, 'lutff_7/out') | |
// (12, 15, 'neigh_op_bot_7') | |
// (13, 13, 'neigh_op_tnl_7') | |
// (13, 14, 'neigh_op_lft_7') | |
// (13, 15, 'neigh_op_bnl_7') | |
wire n295; | |
// (11, 13, 'sp4_r_v_b_37') | |
// (11, 14, 'sp4_r_v_b_24') | |
// (11, 15, 'sp4_r_v_b_13') | |
// (11, 16, 'sp4_r_v_b_0') | |
// (12, 10, 'local_g0_5') | |
// (12, 10, 'lutff_6/in_1') | |
// (12, 10, 'sp4_h_r_5') | |
// (12, 11, 'sp4_r_v_b_37') | |
// (12, 12, 'sp4_h_r_6') | |
// (12, 12, 'sp4_r_v_b_24') | |
// (12, 12, 'sp4_v_t_37') | |
// (12, 13, 'sp4_r_v_b_13') | |
// (12, 13, 'sp4_v_b_37') | |
// (12, 14, 'sp4_r_v_b_0') | |
// (12, 14, 'sp4_v_b_24') | |
// (12, 15, 'local_g1_5') | |
// (12, 15, 'lutff_5/in_3') | |
// (12, 15, 'sp4_r_v_b_45') | |
// (12, 15, 'sp4_v_b_13') | |
// (12, 16, 'sp4_r_v_b_32') | |
// (12, 16, 'sp4_v_b_0') | |
// (12, 17, 'sp4_r_v_b_21') | |
// (12, 18, 'sp4_r_v_b_8') | |
// (13, 10, 'sp4_h_r_0') | |
// (13, 10, 'sp4_h_r_16') | |
// (13, 10, 'sp4_v_t_37') | |
// (13, 11, 'sp4_v_b_37') | |
// (13, 12, 'sp4_h_r_19') | |
// (13, 12, 'sp4_v_b_24') | |
// (13, 13, 'sp4_v_b_13') | |
// (13, 14, 'sp4_v_b_0') | |
// (13, 14, 'sp4_v_t_45') | |
// (13, 15, 'local_g3_5') | |
// (13, 15, 'lutff_7/in_3') | |
// (13, 15, 'sp4_v_b_45') | |
// (13, 16, 'sp4_v_b_32') | |
// (13, 17, 'sp4_v_b_21') | |
// (13, 18, 'sp4_v_b_8') | |
// (14, 9, 'local_g2_4') | |
// (14, 9, 'lutff_6/in_2') | |
// (14, 9, 'lutff_7/in_3') | |
// (14, 9, 'neigh_op_tnr_4') | |
// (14, 10, 'local_g3_4') | |
// (14, 10, 'lutff_1/in_0') | |
// (14, 10, 'neigh_op_rgt_4') | |
// (14, 10, 'sp4_h_r_13') | |
// (14, 10, 'sp4_h_r_29') | |
// (14, 11, 'neigh_op_bnr_4') | |
// (14, 12, 'sp4_h_r_30') | |
// (15, 9, 'local_g1_4') | |
// (15, 9, 'lutff_5/in_0') | |
// (15, 9, 'neigh_op_top_4') | |
// (15, 9, 'sp4_r_v_b_36') | |
// (15, 10, 'lutff_4/out') | |
// (15, 10, 'sp4_h_r_24') | |
// (15, 10, 'sp4_h_r_40') | |
// (15, 10, 'sp4_r_v_b_25') | |
// (15, 11, 'neigh_op_bot_4') | |
// (15, 11, 'sp4_r_v_b_12') | |
// (15, 12, 'sp4_h_r_43') | |
// (15, 12, 'sp4_r_v_b_1') | |
// (16, 8, 'sp4_v_t_36') | |
// (16, 9, 'neigh_op_tnl_4') | |
// (16, 9, 'sp4_v_b_36') | |
// (16, 10, 'neigh_op_lft_4') | |
// (16, 10, 'sp4_h_l_40') | |
// (16, 10, 'sp4_h_r_37') | |
// (16, 10, 'sp4_v_b_25') | |
// (16, 11, 'neigh_op_bnl_4') | |
// (16, 11, 'sp4_v_b_12') | |
// (16, 12, 'sp4_h_l_43') | |
// (16, 12, 'sp4_v_b_1') | |
// (17, 10, 'sp4_h_l_37') | |
wire n296; | |
// (11, 14, 'neigh_op_tnr_1') | |
// (11, 15, 'local_g3_1') | |
// (11, 15, 'lutff_7/in_1') | |
// (11, 15, 'neigh_op_rgt_1') | |
// (11, 16, 'neigh_op_bnr_1') | |
// (12, 14, 'neigh_op_top_1') | |
// (12, 15, 'lutff_1/out') | |
// (12, 16, 'neigh_op_bot_1') | |
// (13, 14, 'neigh_op_tnl_1') | |
// (13, 15, 'neigh_op_lft_1') | |
// (13, 16, 'neigh_op_bnl_1') | |
wire n297; | |
// (11, 14, 'neigh_op_tnr_4') | |
// (11, 15, 'local_g2_4') | |
// (11, 15, 'lutff_5/in_1') | |
// (11, 15, 'neigh_op_rgt_4') | |
// (11, 16, 'neigh_op_bnr_4') | |
// (12, 14, 'neigh_op_top_4') | |
// (12, 15, 'lutff_4/out') | |
// (12, 16, 'neigh_op_bot_4') | |
// (13, 14, 'neigh_op_tnl_4') | |
// (13, 15, 'neigh_op_lft_4') | |
// (13, 16, 'neigh_op_bnl_4') | |
wire n298; | |
// (11, 14, 'neigh_op_tnr_5') | |
// (11, 15, 'neigh_op_rgt_5') | |
// (11, 16, 'neigh_op_bnr_5') | |
// (12, 14, 'neigh_op_top_5') | |
// (12, 15, 'local_g2_5') | |
// (12, 15, 'lutff_4/in_1') | |
// (12, 15, 'lutff_5/out') | |
// (12, 16, 'neigh_op_bot_5') | |
// (13, 14, 'neigh_op_tnl_5') | |
// (13, 15, 'neigh_op_lft_5') | |
// (13, 16, 'neigh_op_bnl_5') | |
wire n299; | |
// (11, 14, 'neigh_op_tnr_6') | |
// (11, 15, 'neigh_op_rgt_6') | |
// (11, 16, 'neigh_op_bnr_6') | |
// (12, 14, 'neigh_op_top_6') | |
// (12, 15, 'local_g2_6') | |
// (12, 15, 'lutff_6/out') | |
// (12, 15, 'lutff_7/in_1') | |
// (12, 16, 'neigh_op_bot_6') | |
// (13, 14, 'neigh_op_tnl_6') | |
// (13, 15, 'neigh_op_lft_6') | |
// (13, 16, 'neigh_op_bnl_6') | |
wire n300; | |
// (11, 14, 'sp4_h_r_0') | |
// (12, 14, 'local_g1_5') | |
// (12, 14, 'lutff_2/in_2') | |
// (12, 14, 'lutff_6/in_2') | |
// (12, 14, 'sp4_h_r_13') | |
// (13, 14, 'sp4_h_r_24') | |
// (14, 14, 'sp4_h_r_37') | |
// (15, 13, 'neigh_op_tnr_2') | |
// (15, 14, 'neigh_op_rgt_2') | |
// (15, 14, 'sp4_h_l_37') | |
// (15, 14, 'sp4_h_r_9') | |
// (15, 15, 'neigh_op_bnr_2') | |
// (16, 13, 'neigh_op_top_2') | |
// (16, 14, 'lutff_2/out') | |
// (16, 14, 'sp4_h_r_20') | |
// (16, 15, 'neigh_op_bot_2') | |
// (17, 13, 'neigh_op_tnl_2') | |
// (17, 14, 'neigh_op_lft_2') | |
// (17, 14, 'sp4_h_r_33') | |
// (17, 15, 'neigh_op_bnl_2') | |
// (18, 14, 'sp4_h_r_44') | |
// (19, 14, 'sp4_h_l_44') | |
reg n301 = 0; | |
// (12, 1, 'sp4_r_v_b_47') | |
// (12, 2, 'sp4_r_v_b_34') | |
// (12, 3, 'local_g3_7') | |
// (12, 3, 'lutff_1/in_3') | |
// (12, 3, 'sp4_r_v_b_23') | |
// (12, 4, 'sp4_r_v_b_10') | |
// (13, 0, 'span4_vert_47') | |
// (13, 1, 'sp4_v_b_47') | |
// (13, 2, 'sp4_v_b_34') | |
// (13, 3, 'sp4_v_b_23') | |
// (13, 4, 'sp4_h_r_5') | |
// (13, 4, 'sp4_v_b_10') | |
// (14, 4, 'sp4_h_r_16') | |
// (15, 4, 'sp4_h_r_29') | |
// (16, 4, 'sp4_h_r_40') | |
// (17, 4, 'sp4_h_l_40') | |
// (17, 4, 'sp4_h_r_9') | |
// (18, 4, 'sp4_h_r_20') | |
// (19, 4, 'sp4_h_r_33') | |
// (20, 0, 'logic_op_tnr_6') | |
// (20, 1, 'neigh_op_rgt_6') | |
// (20, 1, 'sp4_r_v_b_44') | |
// (20, 2, 'neigh_op_bnr_6') | |
// (20, 2, 'sp4_r_v_b_33') | |
// (20, 3, 'sp4_r_v_b_20') | |
// (20, 4, 'sp4_h_r_44') | |
// (20, 4, 'sp4_r_v_b_9') | |
// (21, 0, 'logic_op_top_6') | |
// (21, 0, 'span4_vert_44') | |
// (21, 1, 'lutff_6/out') | |
// (21, 1, 'sp4_v_b_44') | |
// (21, 2, 'neigh_op_bot_6') | |
// (21, 2, 'sp4_v_b_33') | |
// (21, 3, 'sp4_v_b_20') | |
// (21, 4, 'sp4_h_l_44') | |
// (21, 4, 'sp4_v_b_9') | |
// (22, 0, 'logic_op_tnl_6') | |
// (22, 1, 'neigh_op_lft_6') | |
// (22, 2, 'neigh_op_bnl_6') | |
wire n302; | |
// (12, 6, 'sp4_r_v_b_45') | |
// (12, 7, 'sp4_r_v_b_32') | |
// (12, 8, 'sp4_r_v_b_21') | |
// (12, 9, 'local_g2_0') | |
// (12, 9, 'lutff_0/in_0') | |
// (12, 9, 'sp4_r_v_b_41') | |
// (12, 9, 'sp4_r_v_b_8') | |
// (12, 10, 'sp4_r_v_b_28') | |
// (12, 11, 'local_g3_1') | |
// (12, 11, 'lutff_0/in_2') | |
// (12, 11, 'sp4_r_v_b_17') | |
// (12, 12, 'sp4_r_v_b_4') | |
// (13, 5, 'sp4_v_t_45') | |
// (13, 6, 'sp4_v_b_45') | |
// (13, 7, 'sp4_v_b_32') | |
// (13, 8, 'sp4_h_r_4') | |
// (13, 8, 'sp4_v_b_21') | |
// (13, 8, 'sp4_v_t_41') | |
// (13, 9, 'sp4_h_r_3') | |
// (13, 9, 'sp4_r_v_b_43') | |
// (13, 9, 'sp4_v_b_41') | |
// (13, 9, 'sp4_v_b_8') | |
// (13, 10, 'sp4_r_v_b_30') | |
// (13, 10, 'sp4_v_b_28') | |
// (13, 11, 'sp4_r_v_b_19') | |
// (13, 11, 'sp4_v_b_17') | |
// (13, 12, 'sp4_r_v_b_6') | |
// (13, 12, 'sp4_v_b_4') | |
// (13, 13, 'sp4_h_r_2') | |
// (13, 13, 'sp4_r_v_b_42') | |
// (13, 14, 'sp4_r_v_b_31') | |
// (13, 15, 'sp4_r_v_b_18') | |
// (13, 16, 'sp4_r_v_b_7') | |
// (14, 8, 'sp4_h_r_17') | |
// (14, 8, 'sp4_v_t_43') | |
// (14, 9, 'sp4_h_r_14') | |
// (14, 9, 'sp4_v_b_43') | |
// (14, 10, 'local_g2_6') | |
// (14, 10, 'lutff_5/in_1') | |
// (14, 10, 'sp4_v_b_30') | |
// (14, 11, 'local_g0_3') | |
// (14, 11, 'lutff_5/in_2') | |
// (14, 11, 'sp4_v_b_19') | |
// (14, 12, 'sp4_h_r_1') | |
// (14, 12, 'sp4_v_b_6') | |
// (14, 12, 'sp4_v_t_42') | |
// (14, 13, 'local_g1_7') | |
// (14, 13, 'local_g3_2') | |
// (14, 13, 'lutff_2/in_1') | |
// (14, 13, 'lutff_5/in_1') | |
// (14, 13, 'sp4_h_r_15') | |
// (14, 13, 'sp4_v_b_42') | |
// (14, 14, 'sp4_v_b_31') | |
// (14, 15, 'sp4_v_b_18') | |
// (14, 16, 'sp4_v_b_7') | |
// (15, 8, 'sp4_h_r_28') | |
// (15, 9, 'sp4_h_r_27') | |
// (15, 12, 'local_g0_4') | |
// (15, 12, 'lutff_5/in_3') | |
// (15, 12, 'lutff_7/in_1') | |
// (15, 12, 'sp4_h_r_12') | |
// (15, 13, 'sp4_h_r_26') | |
// (16, 8, 'sp4_h_r_41') | |
// (16, 9, 'sp4_h_r_38') | |
// (16, 9, 'sp4_r_v_b_41') | |
// (16, 10, 'sp4_r_v_b_28') | |
// (16, 10, 'sp4_r_v_b_44') | |
// (16, 11, 'neigh_op_tnr_2') | |
// (16, 11, 'sp4_r_v_b_17') | |
// (16, 11, 'sp4_r_v_b_33') | |
// (16, 12, 'neigh_op_rgt_2') | |
// (16, 12, 'sp4_h_r_25') | |
// (16, 12, 'sp4_r_v_b_20') | |
// (16, 12, 'sp4_r_v_b_4') | |
// (16, 13, 'local_g0_2') | |
// (16, 13, 'lutff_7/in_3') | |
// (16, 13, 'neigh_op_bnr_2') | |
// (16, 13, 'sp4_h_r_39') | |
// (16, 13, 'sp4_r_v_b_9') | |
// (17, 8, 'sp4_h_l_41') | |
// (17, 8, 'sp4_v_t_41') | |
// (17, 9, 'sp4_h_l_38') | |
// (17, 9, 'sp4_v_b_41') | |
// (17, 9, 'sp4_v_t_44') | |
// (17, 10, 'sp4_v_b_28') | |
// (17, 10, 'sp4_v_b_44') | |
// (17, 11, 'neigh_op_top_2') | |
// (17, 11, 'sp4_v_b_17') | |
// (17, 11, 'sp4_v_b_33') | |
// (17, 12, 'lutff_2/out') | |
// (17, 12, 'sp4_h_r_36') | |
// (17, 12, 'sp4_v_b_20') | |
// (17, 12, 'sp4_v_b_4') | |
// (17, 13, 'local_g0_2') | |
// (17, 13, 'lutff_6/in_0') | |
// (17, 13, 'neigh_op_bot_2') | |
// (17, 13, 'sp4_h_l_39') | |
// (17, 13, 'sp4_v_b_9') | |
// (18, 11, 'neigh_op_tnl_2') | |
// (18, 12, 'neigh_op_lft_2') | |
// (18, 12, 'sp4_h_l_36') | |
// (18, 13, 'neigh_op_bnl_2') | |
wire n303; | |
// (12, 7, 'sp4_r_v_b_44') | |
// (12, 8, 'sp4_r_v_b_33') | |
// (12, 9, 'local_g3_4') | |
// (12, 9, 'lutff_5/in_0') | |
// (12, 9, 'sp4_r_v_b_20') | |
// (12, 10, 'local_g2_1') | |
// (12, 10, 'lutff_0/in_1') | |
// (12, 10, 'sp4_r_v_b_9') | |
// (12, 11, 'sp4_r_v_b_44') | |
// (12, 12, 'neigh_op_tnr_2') | |
// (12, 12, 'sp4_r_v_b_33') | |
// (12, 13, 'neigh_op_rgt_2') | |
// (12, 13, 'sp4_r_v_b_20') | |
// (12, 14, 'local_g1_2') | |
// (12, 14, 'lutff_1/in_0') | |
// (12, 14, 'neigh_op_bnr_2') | |
// (12, 14, 'sp4_r_v_b_9') | |
// (13, 6, 'sp4_r_v_b_36') | |
// (13, 6, 'sp4_v_t_44') | |
// (13, 7, 'sp4_r_v_b_25') | |
// (13, 7, 'sp4_v_b_44') | |
// (13, 8, 'sp4_r_v_b_12') | |
// (13, 8, 'sp4_v_b_33') | |
// (13, 9, 'local_g0_4') | |
// (13, 9, 'local_g1_1') | |
// (13, 9, 'lutff_2/in_2') | |
// (13, 9, 'lutff_4/in_0') | |
// (13, 9, 'sp4_r_v_b_1') | |
// (13, 9, 'sp4_v_b_20') | |
// (13, 10, 'sp4_r_v_b_40') | |
// (13, 10, 'sp4_v_b_9') | |
// (13, 10, 'sp4_v_t_44') | |
// (13, 11, 'sp4_r_v_b_29') | |
// (13, 11, 'sp4_v_b_44') | |
// (13, 12, 'neigh_op_top_2') | |
// (13, 12, 'sp4_r_v_b_16') | |
// (13, 12, 'sp4_v_b_33') | |
// (13, 13, 'lutff_2/out') | |
// (13, 13, 'sp4_r_v_b_5') | |
// (13, 13, 'sp4_v_b_20') | |
// (13, 14, 'neigh_op_bot_2') | |
// (13, 14, 'sp4_v_b_9') | |
// (14, 5, 'sp4_v_t_36') | |
// (14, 6, 'sp4_v_b_36') | |
// (14, 7, 'sp4_v_b_25') | |
// (14, 8, 'sp4_v_b_12') | |
// (14, 9, 'local_g1_5') | |
// (14, 9, 'lutff_4/in_2') | |
// (14, 9, 'sp4_h_r_5') | |
// (14, 9, 'sp4_v_b_1') | |
// (14, 9, 'sp4_v_t_40') | |
// (14, 10, 'sp4_v_b_40') | |
// (14, 11, 'sp4_v_b_29') | |
// (14, 12, 'neigh_op_tnl_2') | |
// (14, 12, 'sp4_v_b_16') | |
// (14, 13, 'neigh_op_lft_2') | |
// (14, 13, 'sp4_v_b_5') | |
// (14, 14, 'local_g2_2') | |
// (14, 14, 'lutff_0/in_2') | |
// (14, 14, 'lutff_2/in_0') | |
// (14, 14, 'lutff_4/in_0') | |
// (14, 14, 'neigh_op_bnl_2') | |
// (15, 9, 'sp4_h_r_16') | |
// (16, 9, 'sp4_h_r_29') | |
// (17, 9, 'sp4_h_r_40') | |
// (18, 9, 'sp4_h_l_40') | |
wire n304; | |
// (12, 8, 'neigh_op_tnr_0') | |
// (12, 9, 'neigh_op_rgt_0') | |
// (12, 10, 'neigh_op_bnr_0') | |
// (13, 8, 'neigh_op_top_0') | |
// (13, 9, 'local_g2_0') | |
// (13, 9, 'lutff_0/out') | |
// (13, 9, 'lutff_5/in_3') | |
// (13, 10, 'neigh_op_bot_0') | |
// (14, 8, 'neigh_op_tnl_0') | |
// (14, 9, 'neigh_op_lft_0') | |
// (14, 10, 'neigh_op_bnl_0') | |
wire n305; | |
// (12, 8, 'neigh_op_tnr_2') | |
// (12, 9, 'neigh_op_rgt_2') | |
// (12, 10, 'neigh_op_bnr_2') | |
// (13, 8, 'neigh_op_top_2') | |
// (13, 9, 'local_g0_2') | |
// (13, 9, 'lutff_2/out') | |
// (13, 9, 'lutff_5/in_1') | |
// (13, 10, 'neigh_op_bot_2') | |
// (14, 8, 'neigh_op_tnl_2') | |
// (14, 9, 'neigh_op_lft_2') | |
// (14, 10, 'neigh_op_bnl_2') | |
wire n306; | |
// (12, 8, 'neigh_op_tnr_3') | |
// (12, 9, 'local_g2_3') | |
// (12, 9, 'lutff_6/in_1') | |
// (12, 9, 'neigh_op_rgt_3') | |
// (12, 9, 'sp4_r_v_b_38') | |
// (12, 10, 'local_g0_3') | |
// (12, 10, 'lutff_7/in_2') | |
// (12, 10, 'neigh_op_bnr_3') | |
// (12, 10, 'sp4_r_v_b_27') | |
// (12, 11, 'sp4_r_v_b_14') | |
// (12, 12, 'sp4_r_v_b_3') | |
// (13, 8, 'neigh_op_top_3') | |
// (13, 8, 'sp4_v_t_38') | |
// (13, 9, 'lutff_3/out') | |
// (13, 9, 'sp4_v_b_38') | |
// (13, 10, 'neigh_op_bot_3') | |
// (13, 10, 'sp4_v_b_27') | |
// (13, 11, 'local_g1_6') | |
// (13, 11, 'lutff_0/in_1') | |
// (13, 11, 'sp4_v_b_14') | |
// (13, 12, 'sp4_v_b_3') | |
// (14, 8, 'neigh_op_tnl_3') | |
// (14, 9, 'neigh_op_lft_3') | |
// (14, 10, 'neigh_op_bnl_3') | |
wire n307; | |
// (12, 8, 'neigh_op_tnr_4') | |
// (12, 9, 'neigh_op_rgt_4') | |
// (12, 10, 'neigh_op_bnr_4') | |
// (13, 8, 'neigh_op_top_4') | |
// (13, 9, 'local_g3_4') | |
// (13, 9, 'lutff_4/out') | |
// (13, 9, 'lutff_5/in_0') | |
// (13, 10, 'neigh_op_bot_4') | |
// (14, 8, 'neigh_op_tnl_4') | |
// (14, 9, 'neigh_op_lft_4') | |
// (14, 10, 'neigh_op_bnl_4') | |
wire n308; | |
// (12, 8, 'neigh_op_tnr_5') | |
// (12, 9, 'neigh_op_rgt_5') | |
// (12, 10, 'neigh_op_bnr_5') | |
// (13, 2, 'sp12_v_t_22') | |
// (13, 3, 'sp12_v_b_22') | |
// (13, 4, 'sp12_v_b_21') | |
// (13, 5, 'sp12_v_b_18') | |
// (13, 6, 'sp12_v_b_17') | |
// (13, 7, 'sp12_v_b_14') | |
// (13, 8, 'neigh_op_top_5') | |
// (13, 8, 'sp12_v_b_13') | |
// (13, 9, 'lutff_5/out') | |
// (13, 9, 'sp12_v_b_10') | |
// (13, 10, 'neigh_op_bot_5') | |
// (13, 10, 'sp12_v_b_9') | |
// (13, 11, 'sp12_v_b_6') | |
// (13, 12, 'sp12_v_b_5') | |
// (13, 13, 'local_g3_2') | |
// (13, 13, 'lutff_7/in_0') | |
// (13, 13, 'sp12_v_b_2') | |
// (13, 14, 'sp12_v_b_1') | |
// (14, 8, 'neigh_op_tnl_5') | |
// (14, 9, 'neigh_op_lft_5') | |
// (14, 10, 'neigh_op_bnl_5') | |
wire n309; | |
// (12, 8, 'neigh_op_tnr_6') | |
// (12, 9, 'local_g3_6') | |
// (12, 9, 'lutff_5/in_2') | |
// (12, 9, 'neigh_op_rgt_6') | |
// (12, 10, 'local_g0_6') | |
// (12, 10, 'lutff_0/in_2') | |
// (12, 10, 'neigh_op_bnr_6') | |
// (13, 8, 'neigh_op_top_6') | |
// (13, 9, 'local_g3_6') | |
// (13, 9, 'lutff_2/in_1') | |
// (13, 9, 'lutff_4/in_3') | |
// (13, 9, 'lutff_6/out') | |
// (13, 10, 'local_g1_6') | |
// (13, 10, 'lutff_1/in_2') | |
// (13, 10, 'neigh_op_bot_6') | |
// (14, 8, 'neigh_op_tnl_6') | |
// (14, 9, 'neigh_op_lft_6') | |
// (14, 10, 'neigh_op_bnl_6') | |
wire n310; | |
// (12, 9, 'neigh_op_tnr_5') | |
// (12, 10, 'neigh_op_rgt_5') | |
// (12, 10, 'sp4_r_v_b_42') | |
// (12, 11, 'neigh_op_bnr_5') | |
// (12, 11, 'sp4_r_v_b_31') | |
// (12, 12, 'local_g3_2') | |
// (12, 12, 'lutff_1/in_2') | |
// (12, 12, 'sp4_r_v_b_18') | |
// (12, 13, 'sp4_r_v_b_7') | |
// (13, 9, 'neigh_op_top_5') | |
// (13, 9, 'sp4_v_t_42') | |
// (13, 10, 'lutff_5/out') | |
// (13, 10, 'sp4_v_b_42') | |
// (13, 11, 'neigh_op_bot_5') | |
// (13, 11, 'sp4_v_b_31') | |
// (13, 12, 'sp4_v_b_18') | |
// (13, 13, 'sp4_v_b_7') | |
// (14, 9, 'neigh_op_tnl_5') | |
// (14, 10, 'neigh_op_lft_5') | |
// (14, 11, 'neigh_op_bnl_5') | |
wire n311; | |
// (12, 9, 'neigh_op_tnr_6') | |
// (12, 10, 'neigh_op_rgt_6') | |
// (12, 11, 'neigh_op_bnr_6') | |
// (13, 9, 'neigh_op_top_6') | |
// (13, 10, 'lutff_6/out') | |
// (13, 11, 'neigh_op_bot_6') | |
// (14, 9, 'neigh_op_tnl_6') | |
// (14, 10, 'local_g0_6') | |
// (14, 10, 'lutff_4/in_0') | |
// (14, 10, 'neigh_op_lft_6') | |
// (14, 11, 'neigh_op_bnl_6') | |
wire n312; | |
// (12, 9, 'neigh_op_tnr_7') | |
// (12, 10, 'neigh_op_rgt_7') | |
// (12, 11, 'neigh_op_bnr_7') | |
// (13, 9, 'neigh_op_top_7') | |
// (13, 10, 'lutff_7/out') | |
// (13, 11, 'neigh_op_bot_7') | |
// (14, 9, 'neigh_op_tnl_7') | |
// (14, 10, 'local_g0_7') | |
// (14, 10, 'lutff_7/in_2') | |
// (14, 10, 'neigh_op_lft_7') | |
// (14, 11, 'neigh_op_bnl_7') | |
wire n313; | |
// (12, 9, 'sp4_h_r_0') | |
// (13, 8, 'neigh_op_tnr_4') | |
// (13, 8, 'sp4_r_v_b_37') | |
// (13, 9, 'neigh_op_rgt_4') | |
// (13, 9, 'sp4_h_r_13') | |
// (13, 9, 'sp4_r_v_b_24') | |
// (13, 9, 'sp4_r_v_b_40') | |
// (13, 10, 'local_g0_4') | |
// (13, 10, 'lutff_1/in_1') | |
// (13, 10, 'neigh_op_bnr_4') | |
// (13, 10, 'sp4_r_v_b_13') | |
// (13, 10, 'sp4_r_v_b_29') | |
// (13, 11, 'sp4_r_v_b_0') | |
// (13, 11, 'sp4_r_v_b_16') | |
// (13, 12, 'sp4_r_v_b_5') | |
// (14, 7, 'sp4_v_t_37') | |
// (14, 8, 'neigh_op_top_4') | |
// (14, 8, 'sp4_v_b_37') | |
// (14, 8, 'sp4_v_t_40') | |
// (14, 9, 'lutff_4/out') | |
// (14, 9, 'sp4_h_r_24') | |
// (14, 9, 'sp4_h_r_8') | |
// (14, 9, 'sp4_v_b_24') | |
// (14, 9, 'sp4_v_b_40') | |
// (14, 10, 'neigh_op_bot_4') | |
// (14, 10, 'sp4_v_b_13') | |
// (14, 10, 'sp4_v_b_29') | |
// (14, 11, 'sp4_h_r_6') | |
// (14, 11, 'sp4_v_b_0') | |
// (14, 11, 'sp4_v_b_16') | |
// (14, 12, 'sp4_h_r_11') | |
// (14, 12, 'sp4_v_b_5') | |
// (15, 8, 'neigh_op_tnl_4') | |
// (15, 9, 'neigh_op_lft_4') | |
// (15, 9, 'sp4_h_r_21') | |
// (15, 9, 'sp4_h_r_37') | |
// (15, 10, 'neigh_op_bnl_4') | |
// (15, 11, 'sp4_h_r_19') | |
// (15, 12, 'sp4_h_r_22') | |
// (16, 9, 'sp4_h_l_37') | |
// (16, 9, 'sp4_h_r_32') | |
// (16, 9, 'sp4_h_r_8') | |
// (16, 11, 'sp4_h_r_30') | |
// (16, 12, 'sp4_h_r_35') | |
// (17, 9, 'local_g2_5') | |
// (17, 9, 'lutff_1/in_2') | |
// (17, 9, 'sp4_h_r_21') | |
// (17, 9, 'sp4_h_r_45') | |
// (17, 11, 'sp4_h_r_43') | |
// (17, 12, 'sp4_h_r_46') | |
// (18, 9, 'sp4_h_l_45') | |
// (18, 9, 'sp4_h_r_32') | |
// (18, 11, 'sp4_h_l_43') | |
// (18, 11, 'sp4_h_r_2') | |
// (18, 12, 'sp4_h_l_46') | |
// (18, 12, 'sp4_h_r_2') | |
// (19, 9, 'sp4_h_r_45') | |
// (19, 10, 'local_g3_5') | |
// (19, 10, 'ram/WDATA_0') | |
// (19, 10, 'sp4_r_v_b_45') | |
// (19, 11, 'local_g0_7') | |
// (19, 11, 'ram/RADDR_0') | |
// (19, 11, 'sp4_h_r_15') | |
// (19, 11, 'sp4_r_v_b_32') | |
// (19, 12, 'local_g0_7') | |
// (19, 12, 'ram/WADDR_0') | |
// (19, 12, 'sp4_h_r_15') | |
// (19, 12, 'sp4_r_v_b_21') | |
// (19, 13, 'sp4_r_v_b_8') | |
// (20, 9, 'sp4_h_l_45') | |
// (20, 9, 'sp4_v_t_45') | |
// (20, 10, 'sp4_v_b_45') | |
// (20, 11, 'sp4_h_r_26') | |
// (20, 11, 'sp4_v_b_32') | |
// (20, 12, 'sp4_h_r_26') | |
// (20, 12, 'sp4_v_b_21') | |
// (20, 13, 'sp4_v_b_8') | |
// (21, 11, 'sp4_h_r_39') | |
// (21, 12, 'sp4_h_r_39') | |
// (22, 11, 'sp4_h_l_39') | |
// (22, 12, 'sp4_h_l_39') | |
wire n314; | |
// (12, 9, 'sp4_h_r_10') | |
// (13, 8, 'neigh_op_tnr_1') | |
// (13, 9, 'neigh_op_rgt_1') | |
// (13, 9, 'sp4_h_r_23') | |
// (13, 9, 'sp4_h_r_7') | |
// (13, 10, 'local_g0_1') | |
// (13, 10, 'lutff_2/in_1') | |
// (13, 10, 'neigh_op_bnr_1') | |
// (14, 8, 'neigh_op_top_1') | |
// (14, 8, 'sp4_r_v_b_46') | |
// (14, 9, 'lutff_1/out') | |
// (14, 9, 'sp4_h_r_18') | |
// (14, 9, 'sp4_h_r_34') | |
// (14, 9, 'sp4_r_v_b_35') | |
// (14, 10, 'neigh_op_bot_1') | |
// (14, 10, 'sp4_r_v_b_22') | |
// (14, 11, 'sp4_r_v_b_11') | |
// (15, 7, 'sp4_v_t_46') | |
// (15, 8, 'neigh_op_tnl_1') | |
// (15, 8, 'sp4_v_b_46') | |
// (15, 9, 'neigh_op_lft_1') | |
// (15, 9, 'sp4_h_r_31') | |
// (15, 9, 'sp4_h_r_47') | |
// (15, 9, 'sp4_v_b_35') | |
// (15, 10, 'neigh_op_bnl_1') | |
// (15, 10, 'sp4_v_b_22') | |
// (15, 11, 'sp4_h_r_11') | |
// (15, 11, 'sp4_v_b_11') | |
// (16, 9, 'sp4_h_l_47') | |
// (16, 9, 'sp4_h_r_42') | |
// (16, 9, 'sp4_h_r_6') | |
// (16, 11, 'sp4_h_r_22') | |
// (17, 9, 'local_g1_7') | |
// (17, 9, 'lutff_2/in_0') | |
// (17, 9, 'sp4_h_l_42') | |
// (17, 9, 'sp4_h_r_19') | |
// (17, 9, 'sp4_h_r_7') | |
// (17, 11, 'sp4_h_r_35') | |
// (18, 8, 'sp4_r_v_b_40') | |
// (18, 9, 'sp4_h_r_18') | |
// (18, 9, 'sp4_h_r_30') | |
// (18, 9, 'sp4_r_v_b_29') | |
// (18, 10, 'sp4_r_v_b_16') | |
// (18, 11, 'sp4_h_r_46') | |
// (18, 11, 'sp4_r_v_b_5') | |
// (19, 7, 'sp4_v_t_40') | |
// (19, 8, 'sp4_v_b_40') | |
// (19, 9, 'sp4_h_r_31') | |
// (19, 9, 'sp4_h_r_43') | |
// (19, 9, 'sp4_v_b_29') | |
// (19, 10, 'local_g1_0') | |
// (19, 10, 'ram/WDATA_1') | |
// (19, 10, 'sp4_r_v_b_43') | |
// (19, 10, 'sp4_v_b_16') | |
// (19, 11, 'local_g1_5') | |
// (19, 11, 'ram/RADDR_1') | |
// (19, 11, 'sp4_h_l_46') | |
// (19, 11, 'sp4_r_v_b_30') | |
// (19, 11, 'sp4_v_b_5') | |
// (19, 12, 'local_g3_3') | |
// (19, 12, 'ram/WADDR_1') | |
// (19, 12, 'sp4_r_v_b_19') | |
// (19, 13, 'sp4_r_v_b_6') | |
// (20, 9, 'sp4_h_l_43') | |
// (20, 9, 'sp4_h_r_42') | |
// (20, 9, 'sp4_v_t_43') | |
// (20, 10, 'sp4_v_b_43') | |
// (20, 11, 'sp4_v_b_30') | |
// (20, 12, 'sp4_v_b_19') | |
// (20, 13, 'sp4_v_b_6') | |
// (21, 9, 'sp4_h_l_42') | |
wire n315; | |
// (12, 9, 'sp4_h_r_9') | |
// (13, 9, 'sp4_h_r_20') | |
// (14, 8, 'neigh_op_tnr_6') | |
// (14, 9, 'neigh_op_rgt_6') | |
// (14, 9, 'sp4_h_r_33') | |
// (14, 10, 'neigh_op_bnr_6') | |
// (15, 8, 'neigh_op_top_6') | |
// (15, 9, 'lutff_6/out') | |
// (15, 9, 'sp4_h_r_44') | |
// (15, 10, 'neigh_op_bot_6') | |
// (15, 10, 'sp4_r_v_b_39') | |
// (15, 11, 'sp4_r_v_b_26') | |
// (15, 12, 'sp4_r_v_b_15') | |
// (15, 13, 'sp4_r_v_b_2') | |
// (16, 8, 'neigh_op_tnl_6') | |
// (16, 9, 'neigh_op_lft_6') | |
// (16, 9, 'sp4_h_l_44') | |
// (16, 9, 'sp4_v_t_39') | |
// (16, 10, 'neigh_op_bnl_6') | |
// (16, 10, 'sp4_v_b_39') | |
// (16, 11, 'local_g3_2') | |
// (16, 11, 'lutff_3/in_2') | |
// (16, 11, 'sp4_v_b_26') | |
// (16, 12, 'sp4_v_b_15') | |
// (16, 13, 'sp4_v_b_2') | |
wire n316; | |
// (12, 9, 'sp4_r_v_b_43') | |
// (12, 10, 'sp4_r_v_b_30') | |
// (12, 11, 'local_g3_3') | |
// (12, 11, 'lutff_6/in_2') | |
// (12, 11, 'sp4_r_v_b_19') | |
// (12, 12, 'sp4_r_v_b_6') | |
// (13, 8, 'sp4_v_t_43') | |
// (13, 9, 'sp4_v_b_43') | |
// (13, 10, 'sp4_v_b_30') | |
// (13, 11, 'local_g2_6') | |
// (13, 11, 'lutff_7/in_1') | |
// (13, 11, 'neigh_op_tnr_6') | |
// (13, 11, 'sp4_v_b_19') | |
// (13, 12, 'neigh_op_rgt_6') | |
// (13, 12, 'sp4_h_r_1') | |
// (13, 12, 'sp4_v_b_6') | |
// (13, 13, 'neigh_op_bnr_6') | |
// (14, 11, 'neigh_op_top_6') | |
// (14, 12, 'local_g1_6') | |
// (14, 12, 'lutff_1/in_0') | |
// (14, 12, 'lutff_4/in_3') | |
// (14, 12, 'lutff_6/out') | |
// (14, 12, 'sp4_h_r_12') | |
// (14, 13, 'neigh_op_bot_6') | |
// (15, 11, 'neigh_op_tnl_6') | |
// (15, 12, 'neigh_op_lft_6') | |
// (15, 12, 'sp4_h_r_25') | |
// (15, 13, 'neigh_op_bnl_6') | |
// (16, 12, 'sp4_h_r_36') | |
// (17, 12, 'sp4_h_l_36') | |
wire n317; | |
// (12, 9, 'sp4_r_v_b_44') | |
// (12, 10, 'sp4_r_v_b_33') | |
// (12, 11, 'local_g3_4') | |
// (12, 11, 'lutff_6/in_1') | |
// (12, 11, 'sp4_r_v_b_20') | |
// (12, 12, 'sp4_r_v_b_9') | |
// (13, 8, 'sp4_v_t_44') | |
// (13, 9, 'sp4_v_b_44') | |
// (13, 10, 'sp4_v_b_33') | |
// (13, 11, 'sp4_v_b_20') | |
// (13, 12, 'sp4_h_r_4') | |
// (13, 12, 'sp4_v_b_9') | |
// (14, 10, 'sp4_r_v_b_36') | |
// (14, 11, 'neigh_op_tnr_6') | |
// (14, 11, 'sp4_r_v_b_25') | |
// (14, 12, 'local_g2_6') | |
// (14, 12, 'lutff_1/in_1') | |
// (14, 12, 'lutff_4/in_0') | |
// (14, 12, 'neigh_op_rgt_6') | |
// (14, 12, 'sp4_h_r_17') | |
// (14, 12, 'sp4_r_v_b_12') | |
// (14, 13, 'local_g1_6') | |
// (14, 13, 'lutff_3/in_0') | |
// (14, 13, 'neigh_op_bnr_6') | |
// (14, 13, 'sp4_r_v_b_1') | |
// (15, 9, 'sp4_v_t_36') | |
// (15, 10, 'sp4_v_b_36') | |
// (15, 11, 'neigh_op_top_6') | |
// (15, 11, 'sp4_r_v_b_40') | |
// (15, 11, 'sp4_v_b_25') | |
// (15, 12, 'lutff_6/out') | |
// (15, 12, 'sp4_h_r_28') | |
// (15, 12, 'sp4_r_v_b_29') | |
// (15, 12, 'sp4_v_b_12') | |
// (15, 13, 'neigh_op_bot_6') | |
// (15, 13, 'sp4_h_r_1') | |
// (15, 13, 'sp4_r_v_b_16') | |
// (15, 13, 'sp4_v_b_1') | |
// (15, 14, 'sp4_r_v_b_5') | |
// (16, 10, 'sp4_v_t_40') | |
// (16, 11, 'neigh_op_tnl_6') | |
// (16, 11, 'sp4_v_b_40') | |
// (16, 12, 'neigh_op_lft_6') | |
// (16, 12, 'sp4_h_r_41') | |
// (16, 12, 'sp4_v_b_29') | |
// (16, 13, 'local_g2_6') | |
// (16, 13, 'lutff_2/in_2') | |
// (16, 13, 'neigh_op_bnl_6') | |
// (16, 13, 'sp4_h_r_12') | |
// (16, 13, 'sp4_v_b_16') | |
// (16, 14, 'sp4_h_r_5') | |
// (16, 14, 'sp4_v_b_5') | |
// (17, 12, 'sp4_h_l_41') | |
// (17, 13, 'local_g3_1') | |
// (17, 13, 'lutff_1/in_1') | |
// (17, 13, 'sp4_h_r_25') | |
// (17, 14, 'sp4_h_r_16') | |
// (18, 13, 'sp4_h_r_36') | |
// (18, 14, 'sp4_h_r_29') | |
// (19, 13, 'sp4_h_l_36') | |
// (19, 14, 'sp4_h_r_40') | |
// (20, 14, 'local_g0_0') | |
// (20, 14, 'lutff_0/in_0') | |
// (20, 14, 'sp4_h_l_40') | |
// (20, 14, 'sp4_h_r_8') | |
// (21, 14, 'sp4_h_r_21') | |
// (22, 14, 'sp4_h_r_32') | |
// (23, 14, 'sp4_h_r_45') | |
// (24, 14, 'sp4_h_l_45') | |
wire n318; | |
// (12, 9, 'sp4_r_v_b_47') | |
// (12, 10, 'sp4_r_v_b_34') | |
// (12, 11, 'local_g3_7') | |
// (12, 11, 'lutff_5/in_1') | |
// (12, 11, 'sp4_r_v_b_23') | |
// (12, 12, 'sp4_r_v_b_10') | |
// (13, 8, 'sp4_v_t_47') | |
// (13, 9, 'sp4_v_b_47') | |
// (13, 10, 'sp4_v_b_34') | |
// (13, 11, 'local_g1_7') | |
// (13, 11, 'lutff_6/in_2') | |
// (13, 11, 'sp4_v_b_23') | |
// (13, 12, 'sp4_h_r_5') | |
// (13, 12, 'sp4_v_b_10') | |
// (14, 12, 'sp4_h_r_16') | |
// (15, 11, 'neigh_op_tnr_4') | |
// (15, 12, 'neigh_op_rgt_4') | |
// (15, 12, 'sp4_h_r_29') | |
// (15, 13, 'local_g0_4') | |
// (15, 13, 'lutff_2/in_2') | |
// (15, 13, 'neigh_op_bnr_4') | |
// (16, 11, 'neigh_op_top_4') | |
// (16, 12, 'lutff_4/out') | |
// (16, 12, 'sp4_h_r_40') | |
// (16, 13, 'local_g1_4') | |
// (16, 13, 'lutff_6/in_3') | |
// (16, 13, 'neigh_op_bot_4') | |
// (17, 11, 'neigh_op_tnl_4') | |
// (17, 12, 'neigh_op_lft_4') | |
// (17, 12, 'sp4_h_l_40') | |
// (17, 13, 'neigh_op_bnl_4') | |
wire n319; | |
// (12, 10, 'local_g2_6') | |
// (12, 10, 'lutff_2/in_2') | |
// (12, 10, 'sp4_r_v_b_38') | |
// (12, 11, 'neigh_op_tnr_7') | |
// (12, 11, 'sp4_r_v_b_27') | |
// (12, 12, 'local_g2_7') | |
// (12, 12, 'lutff_0/in_1') | |
// (12, 12, 'lutff_7/in_0') | |
// (12, 12, 'neigh_op_rgt_7') | |
// (12, 12, 'sp4_r_v_b_14') | |
// (12, 13, 'neigh_op_bnr_7') | |
// (12, 13, 'sp4_r_v_b_3') | |
// (13, 9, 'sp4_v_t_38') | |
// (13, 10, 'local_g3_6') | |
// (13, 10, 'lutff_3/in_2') | |
// (13, 10, 'sp4_v_b_38') | |
// (13, 11, 'neigh_op_top_7') | |
// (13, 11, 'sp4_v_b_27') | |
// (13, 12, 'lutff_7/out') | |
// (13, 12, 'sp4_v_b_14') | |
// (13, 13, 'neigh_op_bot_7') | |
// (13, 13, 'sp4_v_b_3') | |
// (14, 11, 'neigh_op_tnl_7') | |
// (14, 12, 'neigh_op_lft_7') | |
// (14, 13, 'neigh_op_bnl_7') | |
wire n320; | |
// (12, 10, 'lutff_0/cout') | |
// (12, 10, 'lutff_1/in_3') | |
wire n321; | |
// (12, 10, 'lutff_1/cout') | |
// (12, 10, 'lutff_2/in_3') | |
wire n322; | |
// (12, 10, 'lutff_2/cout') | |
// (12, 10, 'lutff_3/in_3') | |
wire n323; | |
// (12, 10, 'lutff_3/cout') | |
// (12, 10, 'lutff_4/in_3') | |
wire n324; | |
// (12, 10, 'lutff_4/cout') | |
// (12, 10, 'lutff_5/in_3') | |
wire n325; | |
// (12, 10, 'lutff_5/cout') | |
// (12, 10, 'lutff_6/in_3') | |
wire n326; | |
// (12, 10, 'lutff_6/cout') | |
// (12, 10, 'lutff_7/in_3') | |
wire n327; | |
// (12, 10, 'lutff_7/cout') | |
// (12, 11, 'carry_in') | |
// (12, 11, 'carry_in_mux') | |
// (12, 11, 'lutff_0/in_3') | |
wire n328; | |
// (12, 10, 'neigh_op_tnr_1') | |
// (12, 11, 'neigh_op_rgt_1') | |
// (12, 12, 'local_g1_1') | |
// (12, 12, 'lutff_6/in_0') | |
// (12, 12, 'neigh_op_bnr_1') | |
// (13, 10, 'neigh_op_top_1') | |
// (13, 11, 'lutff_1/out') | |
// (13, 12, 'neigh_op_bot_1') | |
// (14, 10, 'neigh_op_tnl_1') | |
// (14, 11, 'neigh_op_lft_1') | |
// (14, 12, 'neigh_op_bnl_1') | |
wire n329; | |
// (12, 10, 'neigh_op_tnr_6') | |
// (12, 11, 'neigh_op_rgt_6') | |
// (12, 12, 'neigh_op_bnr_6') | |
// (13, 10, 'neigh_op_top_6') | |
// (13, 11, 'lutff_6/out') | |
// (13, 12, 'neigh_op_bot_6') | |
// (14, 10, 'neigh_op_tnl_6') | |
// (14, 11, 'local_g0_6') | |
// (14, 11, 'lutff_0/in_0') | |
// (14, 11, 'neigh_op_lft_6') | |
// (14, 12, 'neigh_op_bnl_6') | |
wire n330; | |
// (12, 10, 'neigh_op_tnr_7') | |
// (12, 11, 'neigh_op_rgt_7') | |
// (12, 12, 'neigh_op_bnr_7') | |
// (13, 10, 'neigh_op_top_7') | |
// (13, 11, 'lutff_7/out') | |
// (13, 12, 'neigh_op_bot_7') | |
// (14, 10, 'neigh_op_tnl_7') | |
// (14, 11, 'local_g0_7') | |
// (14, 11, 'lutff_3/in_2') | |
// (14, 11, 'neigh_op_lft_7') | |
// (14, 12, 'neigh_op_bnl_7') | |
wire n331; | |
// (12, 10, 'sp4_h_r_3') | |
// (13, 10, 'local_g0_6') | |
// (13, 10, 'lutff_5/in_1') | |
// (13, 10, 'sp4_h_r_14') | |
// (14, 9, 'neigh_op_tnr_3') | |
// (14, 10, 'neigh_op_rgt_3') | |
// (14, 10, 'sp4_h_r_11') | |
// (14, 10, 'sp4_h_r_27') | |
// (14, 11, 'neigh_op_bnr_3') | |
// (15, 9, 'neigh_op_top_3') | |
// (15, 10, 'lutff_3/out') | |
// (15, 10, 'sp4_h_r_22') | |
// (15, 10, 'sp4_h_r_38') | |
// (15, 10, 'sp4_h_r_6') | |
// (15, 11, 'neigh_op_bot_3') | |
// (16, 9, 'neigh_op_tnl_3') | |
// (16, 10, 'neigh_op_lft_3') | |
// (16, 10, 'sp4_h_l_38') | |
// (16, 10, 'sp4_h_r_19') | |
// (16, 10, 'sp4_h_r_35') | |
// (16, 11, 'neigh_op_bnl_3') | |
// (17, 7, 'sp4_r_v_b_40') | |
// (17, 8, 'sp4_r_v_b_29') | |
// (17, 9, 'local_g3_0') | |
// (17, 9, 'lutff_4/in_1') | |
// (17, 9, 'sp4_r_v_b_16') | |
// (17, 10, 'sp4_h_r_30') | |
// (17, 10, 'sp4_h_r_46') | |
// (17, 10, 'sp4_r_v_b_5') | |
// (18, 6, 'sp4_v_t_40') | |
// (18, 7, 'sp4_v_b_40') | |
// (18, 8, 'sp4_v_b_29') | |
// (18, 9, 'sp4_v_b_16') | |
// (18, 10, 'sp4_h_l_46') | |
// (18, 10, 'sp4_h_r_43') | |
// (18, 10, 'sp4_v_b_5') | |
// (18, 11, 'sp4_r_v_b_46') | |
// (18, 12, 'sp4_r_v_b_35') | |
// (18, 13, 'sp4_r_v_b_22') | |
// (18, 14, 'sp4_r_v_b_11') | |
// (19, 10, 'local_g0_2') | |
// (19, 10, 'ram/WDATA_4') | |
// (19, 10, 'sp4_h_l_43') | |
// (19, 10, 'sp4_h_r_2') | |
// (19, 10, 'sp4_v_t_46') | |
// (19, 11, 'local_g3_6') | |
// (19, 11, 'ram/RADDR_4') | |
// (19, 11, 'sp4_v_b_46') | |
// (19, 12, 'local_g2_3') | |
// (19, 12, 'ram/WADDR_4') | |
// (19, 12, 'sp4_v_b_35') | |
// (19, 13, 'sp4_v_b_22') | |
// (19, 14, 'sp4_v_b_11') | |
// (20, 10, 'sp4_h_r_15') | |
// (21, 10, 'sp4_h_r_26') | |
// (22, 10, 'sp4_h_r_39') | |
// (23, 10, 'sp4_h_l_39') | |
wire n332; | |
// (12, 10, 'sp4_r_v_b_37') | |
// (12, 11, 'sp4_r_v_b_24') | |
// (12, 12, 'sp4_r_v_b_13') | |
// (12, 13, 'sp4_r_v_b_0') | |
// (13, 9, 'sp4_v_t_37') | |
// (13, 10, 'sp4_v_b_37') | |
// (13, 11, 'sp4_v_b_24') | |
// (13, 12, 'local_g1_5') | |
// (13, 12, 'lutff_0/in_0') | |
// (13, 12, 'sp4_v_b_13') | |
// (13, 13, 'sp4_h_r_7') | |
// (13, 13, 'sp4_v_b_0') | |
// (14, 13, 'sp4_h_r_18') | |
// (15, 13, 'sp4_h_r_31') | |
// (16, 13, 'sp4_h_r_42') | |
// (17, 13, 'sp4_h_l_42') | |
// (17, 13, 'sp4_h_r_11') | |
// (18, 13, 'local_g0_6') | |
// (18, 13, 'lutff_2/in_0') | |
// (18, 13, 'sp4_h_r_22') | |
// (19, 7, 'sp4_r_v_b_46') | |
// (19, 8, 'sp4_r_v_b_35') | |
// (19, 9, 'local_g3_6') | |
// (19, 9, 'ram/WDATA_15') | |
// (19, 9, 'sp4_r_v_b_22') | |
// (19, 10, 'sp4_r_v_b_11') | |
// (19, 11, 'sp4_r_v_b_38') | |
// (19, 12, 'neigh_op_tnr_7') | |
// (19, 12, 'sp4_r_v_b_27') | |
// (19, 13, 'neigh_op_rgt_7') | |
// (19, 13, 'sp4_h_r_35') | |
// (19, 13, 'sp4_r_v_b_14') | |
// (19, 14, 'neigh_op_bnr_7') | |
// (19, 14, 'sp4_r_v_b_3') | |
// (20, 6, 'sp4_v_t_46') | |
// (20, 7, 'sp4_v_b_46') | |
// (20, 8, 'sp4_v_b_35') | |
// (20, 9, 'sp4_v_b_22') | |
// (20, 10, 'local_g0_0') | |
// (20, 10, 'lutff_4/in_0') | |
// (20, 10, 'sp4_h_r_8') | |
// (20, 10, 'sp4_v_b_11') | |
// (20, 10, 'sp4_v_t_38') | |
// (20, 11, 'sp4_v_b_38') | |
// (20, 12, 'neigh_op_top_7') | |
// (20, 12, 'sp4_v_b_27') | |
// (20, 13, 'lutff_7/out') | |
// (20, 13, 'sp4_h_r_46') | |
// (20, 13, 'sp4_v_b_14') | |
// (20, 14, 'neigh_op_bot_7') | |
// (20, 14, 'sp4_v_b_3') | |
// (21, 10, 'sp4_h_r_21') | |
// (21, 12, 'neigh_op_tnl_7') | |
// (21, 13, 'neigh_op_lft_7') | |
// (21, 13, 'sp4_h_l_46') | |
// (21, 14, 'neigh_op_bnl_7') | |
// (22, 10, 'sp4_h_r_32') | |
// (23, 10, 'sp4_h_r_45') | |
// (24, 10, 'sp4_h_l_45') | |
wire n333; | |
// (12, 10, 'sp4_r_v_b_40') | |
// (12, 11, 'sp4_r_v_b_29') | |
// (12, 12, 'sp4_r_v_b_16') | |
// (12, 13, 'sp4_r_v_b_5') | |
// (13, 9, 'sp4_v_t_40') | |
// (13, 10, 'sp4_v_b_40') | |
// (13, 11, 'local_g2_5') | |
// (13, 11, 'lutff_7/in_2') | |
// (13, 11, 'sp4_v_b_29') | |
// (13, 12, 'sp4_v_b_16') | |
// (13, 13, 'sp4_h_r_5') | |
// (13, 13, 'sp4_v_b_5') | |
// (14, 13, 'sp4_h_r_16') | |
// (15, 13, 'sp4_h_r_29') | |
// (16, 12, 'neigh_op_tnr_1') | |
// (16, 13, 'neigh_op_rgt_1') | |
// (16, 13, 'sp4_h_r_40') | |
// (16, 14, 'neigh_op_bnr_1') | |
// (17, 10, 'sp4_r_v_b_38') | |
// (17, 11, 'sp4_r_v_b_27') | |
// (17, 12, 'neigh_op_top_1') | |
// (17, 12, 'sp4_r_v_b_14') | |
// (17, 13, 'lutff_1/out') | |
// (17, 13, 'sp4_h_l_40') | |
// (17, 13, 'sp4_h_r_2') | |
// (17, 13, 'sp4_r_v_b_3') | |
// (17, 14, 'neigh_op_bot_1') | |
// (18, 9, 'sp4_h_r_8') | |
// (18, 9, 'sp4_v_t_38') | |
// (18, 10, 'local_g3_6') | |
// (18, 10, 'lutff_5/in_2') | |
// (18, 10, 'sp4_v_b_38') | |
// (18, 11, 'sp4_v_b_27') | |
// (18, 12, 'neigh_op_tnl_1') | |
// (18, 12, 'sp4_v_b_14') | |
// (18, 13, 'local_g1_1') | |
// (18, 13, 'lutff_7/in_1') | |
// (18, 13, 'neigh_op_lft_1') | |
// (18, 13, 'sp4_h_r_15') | |
// (18, 13, 'sp4_v_b_3') | |
// (18, 14, 'neigh_op_bnl_1') | |
// (19, 9, 'local_g1_5') | |
// (19, 9, 'ram/WDATA_14') | |
// (19, 9, 'sp4_h_r_21') | |
// (19, 13, 'sp4_h_r_26') | |
// (20, 9, 'sp4_h_r_32') | |
// (20, 13, 'sp4_h_r_39') | |
// (21, 9, 'sp4_h_r_45') | |
// (21, 13, 'sp4_h_l_39') | |
// (22, 9, 'sp4_h_l_45') | |
wire n334; | |
// (12, 10, 'sp4_r_v_b_44') | |
// (12, 11, 'sp4_r_v_b_33') | |
// (12, 12, 'sp4_r_v_b_20') | |
// (12, 13, 'sp4_r_v_b_9') | |
// (13, 9, 'sp4_h_r_9') | |
// (13, 9, 'sp4_v_t_44') | |
// (13, 10, 'local_g3_4') | |
// (13, 10, 'lutff_6/in_1') | |
// (13, 10, 'sp4_v_b_44') | |
// (13, 11, 'sp4_v_b_33') | |
// (13, 12, 'sp4_v_b_20') | |
// (13, 13, 'sp4_v_b_9') | |
// (14, 9, 'sp4_h_r_20') | |
// (15, 8, 'neigh_op_tnr_6') | |
// (15, 9, 'neigh_op_rgt_6') | |
// (15, 9, 'sp4_h_r_1') | |
// (15, 9, 'sp4_h_r_33') | |
// (15, 10, 'neigh_op_bnr_6') | |
// (16, 8, 'neigh_op_top_6') | |
// (16, 9, 'lutff_6/out') | |
// (16, 9, 'sp4_h_r_12') | |
// (16, 9, 'sp4_h_r_44') | |
// (16, 10, 'neigh_op_bot_6') | |
// (17, 8, 'neigh_op_tnl_6') | |
// (17, 9, 'neigh_op_lft_6') | |
// (17, 9, 'sp4_h_l_44') | |
// (17, 9, 'sp4_h_r_25') | |
// (17, 10, 'neigh_op_bnl_6') | |
// (18, 9, 'sp4_h_r_36') | |
// (18, 10, 'sp4_r_v_b_36') | |
// (18, 10, 'sp4_r_v_b_43') | |
// (18, 11, 'sp4_r_v_b_25') | |
// (18, 11, 'sp4_r_v_b_30') | |
// (18, 12, 'sp4_r_v_b_12') | |
// (18, 12, 'sp4_r_v_b_19') | |
// (18, 13, 'sp4_r_v_b_1') | |
// (18, 13, 'sp4_r_v_b_6') | |
// (19, 9, 'sp4_h_l_36') | |
// (19, 9, 'sp4_h_r_9') | |
// (19, 9, 'sp4_v_t_36') | |
// (19, 9, 'sp4_v_t_43') | |
// (19, 10, 'local_g3_4') | |
// (19, 10, 'ram/WDATA_5') | |
// (19, 10, 'sp4_v_b_36') | |
// (19, 10, 'sp4_v_b_43') | |
// (19, 11, 'local_g3_1') | |
// (19, 11, 'ram/RADDR_5') | |
// (19, 11, 'sp4_v_b_25') | |
// (19, 11, 'sp4_v_b_30') | |
// (19, 12, 'local_g1_3') | |
// (19, 12, 'ram/WADDR_5') | |
// (19, 12, 'sp4_v_b_12') | |
// (19, 12, 'sp4_v_b_19') | |
// (19, 13, 'sp4_v_b_1') | |
// (19, 13, 'sp4_v_b_6') | |
// (20, 9, 'local_g1_4') | |
// (20, 9, 'lutff_5/in_0') | |
// (20, 9, 'sp4_h_r_20') | |
// (21, 9, 'sp4_h_r_33') | |
// (22, 9, 'sp4_h_r_44') | |
// (23, 9, 'sp4_h_l_44') | |
wire n335; | |
// (12, 10, 'sp4_r_v_b_47') | |
// (12, 11, 'sp4_r_v_b_34') | |
// (12, 12, 'sp4_r_v_b_23') | |
// (12, 13, 'sp4_r_v_b_10') | |
// (13, 9, 'sp4_h_r_10') | |
// (13, 9, 'sp4_v_t_47') | |
// (13, 10, 'sp4_v_b_47') | |
// (13, 11, 'local_g2_2') | |
// (13, 11, 'lutff_0/in_2') | |
// (13, 11, 'sp4_v_b_34') | |
// (13, 12, 'sp4_v_b_23') | |
// (13, 13, 'sp4_v_b_10') | |
// (14, 8, 'neigh_op_tnr_1') | |
// (14, 9, 'neigh_op_rgt_1') | |
// (14, 9, 'sp4_h_r_23') | |
// (14, 10, 'neigh_op_bnr_1') | |
// (15, 7, 'sp4_r_v_b_43') | |
// (15, 8, 'neigh_op_top_1') | |
// (15, 8, 'sp4_r_v_b_30') | |
// (15, 9, 'lutff_1/out') | |
// (15, 9, 'sp4_h_r_2') | |
// (15, 9, 'sp4_h_r_34') | |
// (15, 9, 'sp4_r_v_b_19') | |
// (15, 10, 'neigh_op_bot_1') | |
// (15, 10, 'sp4_r_v_b_6') | |
// (16, 6, 'sp4_v_t_43') | |
// (16, 7, 'sp4_v_b_43') | |
// (16, 8, 'neigh_op_tnl_1') | |
// (16, 8, 'sp4_v_b_30') | |
// (16, 9, 'neigh_op_lft_1') | |
// (16, 9, 'sp4_h_r_15') | |
// (16, 9, 'sp4_h_r_47') | |
// (16, 9, 'sp4_v_b_19') | |
// (16, 10, 'neigh_op_bnl_1') | |
// (16, 10, 'sp4_h_r_6') | |
// (16, 10, 'sp4_v_b_6') | |
// (17, 9, 'sp4_h_l_47') | |
// (17, 9, 'sp4_h_r_26') | |
// (17, 10, 'sp4_h_r_19') | |
// (18, 9, 'sp4_h_r_39') | |
// (18, 10, 'sp4_h_r_30') | |
// (18, 10, 'sp4_r_v_b_39') | |
// (18, 11, 'sp4_r_v_b_26') | |
// (18, 12, 'sp4_r_v_b_15') | |
// (18, 13, 'sp4_r_v_b_2') | |
// (19, 9, 'sp4_h_l_39') | |
// (19, 9, 'sp4_h_r_2') | |
// (19, 9, 'sp4_v_t_39') | |
// (19, 10, 'local_g2_3') | |
// (19, 10, 'ram/WDATA_7') | |
// (19, 10, 'sp4_h_r_43') | |
// (19, 10, 'sp4_v_b_39') | |
// (19, 11, 'local_g2_2') | |
// (19, 11, 'ram/RADDR_7') | |
// (19, 11, 'sp4_v_b_26') | |
// (19, 12, 'local_g1_7') | |
// (19, 12, 'ram/WADDR_7') | |
// (19, 12, 'sp4_v_b_15') | |
// (19, 13, 'sp4_v_b_2') | |
// (20, 9, 'local_g1_7') | |
// (20, 9, 'lutff_3/in_3') | |
// (20, 9, 'sp4_h_r_15') | |
// (20, 10, 'sp4_h_l_43') | |
// (21, 9, 'sp4_h_r_26') | |
// (22, 9, 'sp4_h_r_39') | |
// (23, 9, 'sp4_h_l_39') | |
wire n336; | |
// (12, 11, 'local_g0_1') | |
// (12, 11, 'lutff_1/in_2') | |
// (12, 11, 'sp12_h_r_1') | |
// (13, 11, 'sp12_h_r_2') | |
// (14, 11, 'sp12_h_r_5') | |
// (14, 12, 'sp4_r_v_b_47') | |
// (14, 13, 'local_g2_2') | |
// (14, 13, 'lutff_5/in_3') | |
// (14, 13, 'sp4_r_v_b_34') | |
// (14, 14, 'sp4_r_v_b_23') | |
// (14, 15, 'sp4_r_v_b_10') | |
// (15, 11, 'local_g0_2') | |
// (15, 11, 'lutff_0/in_0') | |
// (15, 11, 'lutff_7/in_3') | |
// (15, 11, 'sp12_h_r_6') | |
// (15, 11, 'sp4_h_r_10') | |
// (15, 11, 'sp4_v_t_47') | |
// (15, 12, 'local_g3_7') | |
// (15, 12, 'lutff_3/in_3') | |
// (15, 12, 'sp4_v_b_47') | |
// (15, 13, 'sp4_v_b_34') | |
// (15, 14, 'sp4_v_b_23') | |
// (15, 15, 'sp4_v_b_10') | |
// (16, 10, 'neigh_op_tnr_1') | |
// (16, 11, 'neigh_op_rgt_1') | |
// (16, 11, 'sp12_h_r_9') | |
// (16, 11, 'sp4_h_r_23') | |
// (16, 11, 'sp4_h_r_7') | |
// (16, 12, 'neigh_op_bnr_1') | |
// (17, 10, 'neigh_op_top_1') | |
// (17, 11, 'lutff_1/out') | |
// (17, 11, 'sp12_h_r_10') | |
// (17, 11, 'sp4_h_r_18') | |
// (17, 11, 'sp4_h_r_2') | |
// (17, 11, 'sp4_h_r_34') | |
// (17, 12, 'neigh_op_bot_1') | |
// (18, 10, 'neigh_op_tnl_1') | |
// (18, 11, 'neigh_op_lft_1') | |
// (18, 11, 'sp12_h_r_13') | |
// (18, 11, 'sp4_h_r_15') | |
// (18, 11, 'sp4_h_r_31') | |
// (18, 11, 'sp4_h_r_47') | |
// (18, 12, 'neigh_op_bnl_1') | |
// (19, 11, 'sp12_h_r_14') | |
// (19, 11, 'sp4_h_l_47') | |
// (19, 11, 'sp4_h_r_26') | |
// (19, 11, 'sp4_h_r_42') | |
// (19, 12, 'sp4_r_v_b_37') | |
// (19, 13, 'sp4_r_v_b_24') | |
// (19, 14, 'sp4_r_v_b_13') | |
// (19, 15, 'sp4_r_v_b_0') | |
// (20, 11, 'local_g2_7') | |
// (20, 11, 'lutff_4/in_3') | |
// (20, 11, 'sp12_h_r_17') | |
// (20, 11, 'sp4_h_l_42') | |
// (20, 11, 'sp4_h_r_39') | |
// (20, 11, 'sp4_v_t_37') | |
// (20, 12, 'sp4_v_b_37') | |
// (20, 13, 'local_g2_0') | |
// (20, 13, 'lutff_6/in_2') | |
// (20, 13, 'sp4_v_b_24') | |
// (20, 14, 'sp4_v_b_13') | |
// (20, 15, 'sp4_v_b_0') | |
// (21, 11, 'sp12_h_r_18') | |
// (21, 11, 'sp4_h_l_39') | |
// (22, 11, 'sp12_h_r_21') | |
// (23, 11, 'sp12_h_r_22') | |
// (24, 11, 'sp12_h_l_22') | |
wire n337; | |
// (12, 11, 'local_g0_3') | |
// (12, 11, 'lutff_5/in_2') | |
// (12, 11, 'sp4_h_r_3') | |
// (13, 11, 'sp4_h_r_14') | |
// (13, 12, 'local_g0_3') | |
// (13, 12, 'lutff_1/in_2') | |
// (13, 12, 'sp4_h_r_3') | |
// (13, 13, 'sp4_h_r_3') | |
// (14, 11, 'sp4_h_r_27') | |
// (14, 12, 'sp4_h_r_14') | |
// (14, 13, 'local_g0_6') | |
// (14, 13, 'lutff_3/in_1') | |
// (14, 13, 'sp4_h_r_14') | |
// (15, 9, 'sp4_r_v_b_43') | |
// (15, 10, 'sp4_r_v_b_30') | |
// (15, 11, 'neigh_op_tnr_3') | |
// (15, 11, 'sp4_h_r_38') | |
// (15, 11, 'sp4_r_v_b_19') | |
// (15, 12, 'neigh_op_rgt_3') | |
// (15, 12, 'sp4_h_r_27') | |
// (15, 12, 'sp4_r_v_b_38') | |
// (15, 12, 'sp4_r_v_b_6') | |
// (15, 13, 'local_g0_3') | |
// (15, 13, 'lutff_2/in_1') | |
// (15, 13, 'neigh_op_bnr_3') | |
// (15, 13, 'sp4_h_r_27') | |
// (15, 13, 'sp4_r_v_b_27') | |
// (15, 14, 'sp4_r_v_b_14') | |
// (15, 15, 'sp4_r_v_b_3') | |
// (16, 8, 'sp4_v_t_43') | |
// (16, 9, 'sp4_v_b_43') | |
// (16, 10, 'local_g3_6') | |
// (16, 10, 'lutff_2/in_3') | |
// (16, 10, 'sp4_r_v_b_47') | |
// (16, 10, 'sp4_v_b_30') | |
// (16, 11, 'neigh_op_top_3') | |
// (16, 11, 'sp4_h_l_38') | |
// (16, 11, 'sp4_r_v_b_34') | |
// (16, 11, 'sp4_v_b_19') | |
// (16, 11, 'sp4_v_t_38') | |
// (16, 12, 'lutff_3/out') | |
// (16, 12, 'sp4_h_r_38') | |
// (16, 12, 'sp4_r_v_b_23') | |
// (16, 12, 'sp4_r_v_b_39') | |
// (16, 12, 'sp4_v_b_38') | |
// (16, 12, 'sp4_v_b_6') | |
// (16, 13, 'local_g1_3') | |
// (16, 13, 'lutff_6/in_0') | |
// (16, 13, 'neigh_op_bot_3') | |
// (16, 13, 'sp4_h_r_38') | |
// (16, 13, 'sp4_r_v_b_10') | |
// (16, 13, 'sp4_r_v_b_26') | |
// (16, 13, 'sp4_v_b_27') | |
// (16, 14, 'sp4_r_v_b_15') | |
// (16, 14, 'sp4_v_b_14') | |
// (16, 15, 'sp4_r_v_b_2') | |
// (16, 15, 'sp4_v_b_3') | |
// (17, 9, 'sp4_v_t_47') | |
// (17, 10, 'sp4_v_b_47') | |
// (17, 11, 'neigh_op_tnl_3') | |
// (17, 11, 'sp4_v_b_34') | |
// (17, 11, 'sp4_v_t_39') | |
// (17, 12, 'neigh_op_lft_3') | |
// (17, 12, 'sp4_h_l_38') | |
// (17, 12, 'sp4_v_b_23') | |
// (17, 12, 'sp4_v_b_39') | |
// (17, 13, 'neigh_op_bnl_3') | |
// (17, 13, 'sp4_h_l_38') | |
// (17, 13, 'sp4_v_b_10') | |
// (17, 13, 'sp4_v_b_26') | |
// (17, 14, 'local_g0_7') | |
// (17, 14, 'lutff_6/in_1') | |
// (17, 14, 'sp4_v_b_15') | |
// (17, 15, 'sp4_v_b_2') | |
wire n338; | |
// (12, 11, 'local_g1_1') | |
// (12, 11, 'lutff_1/in_1') | |
// (12, 11, 'sp4_h_r_9') | |
// (13, 11, 'local_g0_4') | |
// (13, 11, 'lutff_2/in_2') | |
// (13, 11, 'sp4_h_r_20') | |
// (14, 10, 'neigh_op_tnr_6') | |
// (14, 11, 'neigh_op_rgt_6') | |
// (14, 11, 'sp4_h_r_33') | |
// (14, 12, 'neigh_op_bnr_6') | |
// (15, 10, 'neigh_op_top_6') | |
// (15, 11, 'local_g1_6') | |
// (15, 11, 'lutff_0/in_1') | |
// (15, 11, 'lutff_6/out') | |
// (15, 11, 'lutff_7/in_2') | |
// (15, 11, 'sp4_h_r_44') | |
// (15, 12, 'neigh_op_bot_6') | |
// (16, 10, 'neigh_op_tnl_6') | |
// (16, 11, 'neigh_op_lft_6') | |
// (16, 11, 'sp4_h_l_44') | |
// (16, 12, 'neigh_op_bnl_6') | |
wire n339; | |
// (12, 11, 'local_g1_2') | |
// (12, 11, 'lutff_3/in_2') | |
// (12, 11, 'sp4_h_r_2') | |
// (13, 11, 'sp4_h_r_15') | |
// (13, 12, 'sp4_r_v_b_44') | |
// (13, 13, 'local_g0_2') | |
// (13, 13, 'lutff_4/in_2') | |
// (13, 13, 'sp4_r_v_b_33') | |
// (13, 14, 'sp4_r_v_b_20') | |
// (13, 15, 'sp4_r_v_b_9') | |
// (14, 11, 'sp4_h_r_26') | |
// (14, 11, 'sp4_h_r_3') | |
// (14, 11, 'sp4_v_t_44') | |
// (14, 12, 'sp4_v_b_44') | |
// (14, 13, 'local_g2_1') | |
// (14, 13, 'lutff_5/in_0') | |
// (14, 13, 'sp4_v_b_33') | |
// (14, 14, 'sp4_v_b_20') | |
// (14, 15, 'sp4_v_b_9') | |
// (15, 11, 'local_g0_6') | |
// (15, 11, 'lutff_2/in_2') | |
// (15, 11, 'sp4_h_r_14') | |
// (15, 11, 'sp4_h_r_39') | |
// (16, 10, 'neigh_op_tnr_3') | |
// (16, 11, 'local_g2_3') | |
// (16, 11, 'lutff_0/in_1') | |
// (16, 11, 'neigh_op_rgt_3') | |
// (16, 11, 'sp4_h_l_39') | |
// (16, 11, 'sp4_h_r_11') | |
// (16, 11, 'sp4_h_r_27') | |
// (16, 12, 'local_g1_3') | |
// (16, 12, 'lutff_7/in_3') | |
// (16, 12, 'neigh_op_bnr_3') | |
// (17, 10, 'neigh_op_top_3') | |
// (17, 11, 'lutff_3/out') | |
// (17, 11, 'sp4_h_r_22') | |
// (17, 11, 'sp4_h_r_38') | |
// (17, 11, 'sp4_r_v_b_39') | |
// (17, 12, 'neigh_op_bot_3') | |
// (17, 12, 'sp4_r_v_b_26') | |
// (17, 13, 'local_g2_7') | |
// (17, 13, 'lutff_7/in_0') | |
// (17, 13, 'sp4_r_v_b_15') | |
// (17, 14, 'sp4_r_v_b_2') | |
// (18, 10, 'neigh_op_tnl_3') | |
// (18, 10, 'sp4_v_t_39') | |
// (18, 11, 'neigh_op_lft_3') | |
// (18, 11, 'sp4_h_l_38') | |
// (18, 11, 'sp4_h_r_35') | |
// (18, 11, 'sp4_v_b_39') | |
// (18, 12, 'neigh_op_bnl_3') | |
// (18, 12, 'sp4_v_b_26') | |
// (18, 13, 'sp4_v_b_15') | |
// (18, 14, 'sp4_v_b_2') | |
// (19, 11, 'sp4_h_r_46') | |
// (20, 11, 'sp4_h_l_46') | |
wire n340; | |
// (12, 11, 'local_g1_4') | |
// (12, 11, 'lutff_4/in_1') | |
// (12, 11, 'sp4_h_r_11') | |
// (12, 11, 'sp4_h_r_4') | |
// (13, 11, 'local_g0_6') | |
// (13, 11, 'lutff_5/in_1') | |
// (13, 11, 'sp4_h_r_17') | |
// (13, 11, 'sp4_h_r_22') | |
// (14, 11, 'sp4_h_r_28') | |
// (14, 11, 'sp4_h_r_35') | |
// (15, 8, 'sp4_r_v_b_46') | |
// (15, 9, 'neigh_op_tnr_3') | |
// (15, 9, 'sp4_r_v_b_35') | |
// (15, 10, 'local_g2_3') | |
// (15, 10, 'lutff_7/in_0') | |
// (15, 10, 'neigh_op_rgt_3') | |
// (15, 10, 'sp4_r_v_b_22') | |
// (15, 11, 'neigh_op_bnr_3') | |
// (15, 11, 'sp4_h_r_41') | |
// (15, 11, 'sp4_h_r_46') | |
// (15, 11, 'sp4_r_v_b_11') | |
// (16, 7, 'sp4_v_t_46') | |
// (16, 8, 'sp4_v_b_46') | |
// (16, 9, 'neigh_op_top_3') | |
// (16, 9, 'sp4_v_b_35') | |
// (16, 10, 'local_g2_3') | |
// (16, 10, 'lutff_3/out') | |
// (16, 10, 'lutff_4/in_3') | |
// (16, 10, 'sp4_v_b_22') | |
// (16, 11, 'neigh_op_bot_3') | |
// (16, 11, 'sp4_h_l_41') | |
// (16, 11, 'sp4_h_l_46') | |
// (16, 11, 'sp4_v_b_11') | |
// (17, 9, 'neigh_op_tnl_3') | |
// (17, 10, 'neigh_op_lft_3') | |
// (17, 11, 'neigh_op_bnl_3') | |
wire n341; | |
// (12, 11, 'local_g3_2') | |
// (12, 11, 'lutff_2/in_1') | |
// (12, 11, 'neigh_op_tnr_2') | |
// (12, 12, 'neigh_op_rgt_2') | |
// (12, 13, 'neigh_op_bnr_2') | |
// (13, 11, 'local_g0_2') | |
// (13, 11, 'lutff_3/in_1') | |
// (13, 11, 'neigh_op_top_2') | |
// (13, 12, 'local_g2_2') | |
// (13, 12, 'lutff_2/out') | |
// (13, 12, 'lutff_6/in_2') | |
// (13, 13, 'neigh_op_bot_2') | |
// (14, 11, 'neigh_op_tnl_2') | |
// (14, 12, 'neigh_op_lft_2') | |
// (14, 13, 'neigh_op_bnl_2') | |
wire n342; | |
// (12, 11, 'lutff_0/cout') | |
// (12, 11, 'lutff_1/in_3') | |
wire n343; | |
// (12, 11, 'lutff_1/cout') | |
// (12, 11, 'lutff_2/in_3') | |
wire n344; | |
// (12, 11, 'lutff_2/cout') | |
// (12, 11, 'lutff_3/in_3') | |
wire n345; | |
// (12, 11, 'lutff_3/cout') | |
// (12, 11, 'lutff_4/in_3') | |
wire n346; | |
// (12, 11, 'lutff_4/cout') | |
// (12, 11, 'lutff_5/in_3') | |
wire n347; | |
// (12, 11, 'lutff_5/cout') | |
// (12, 11, 'lutff_6/in_3') | |
wire n348; | |
// (12, 11, 'lutff_6/cout') | |
// (12, 11, 'lutff_7/in_3') | |
wire n349; | |
// (12, 11, 'neigh_op_tnr_0') | |
// (12, 12, 'neigh_op_rgt_0') | |
// (12, 13, 'neigh_op_bnr_0') | |
// (13, 11, 'neigh_op_top_0') | |
// (13, 12, 'local_g0_0') | |
// (13, 12, 'lutff_0/out') | |
// (13, 12, 'lutff_3/in_1') | |
// (13, 13, 'neigh_op_bot_0') | |
// (14, 11, 'neigh_op_tnl_0') | |
// (14, 12, 'neigh_op_lft_0') | |
// (14, 13, 'neigh_op_bnl_0') | |
wire n350; | |
// (12, 11, 'neigh_op_tnr_1') | |
// (12, 12, 'neigh_op_rgt_1') | |
// (12, 13, 'neigh_op_bnr_1') | |
// (13, 10, 'sp4_r_v_b_43') | |
// (13, 11, 'local_g0_1') | |
// (13, 11, 'lutff_6/in_1') | |
// (13, 11, 'neigh_op_top_1') | |
// (13, 11, 'sp4_r_v_b_30') | |
// (13, 12, 'lutff_1/out') | |
// (13, 12, 'sp4_r_v_b_19') | |
// (13, 13, 'neigh_op_bot_1') | |
// (13, 13, 'sp4_r_v_b_6') | |
// (14, 9, 'sp4_h_r_6') | |
// (14, 9, 'sp4_v_t_43') | |
// (14, 10, 'sp4_v_b_43') | |
// (14, 11, 'neigh_op_tnl_1') | |
// (14, 11, 'sp4_v_b_30') | |
// (14, 12, 'neigh_op_lft_1') | |
// (14, 12, 'sp4_v_b_19') | |
// (14, 13, 'neigh_op_bnl_1') | |
// (14, 13, 'sp4_h_r_6') | |
// (14, 13, 'sp4_v_b_6') | |
// (15, 9, 'sp4_h_r_19') | |
// (15, 13, 'sp4_h_r_19') | |
// (16, 9, 'sp4_h_r_30') | |
// (16, 13, 'sp4_h_r_30') | |
// (17, 9, 'sp4_h_r_43') | |
// (17, 13, 'sp4_h_r_43') | |
// (18, 9, 'local_g1_1') | |
// (18, 9, 'lutff_5/in_1') | |
// (18, 9, 'sp4_h_l_43') | |
// (18, 9, 'sp4_h_r_9') | |
// (18, 13, 'local_g1_6') | |
// (18, 13, 'lutff_3/in_2') | |
// (18, 13, 'sp4_h_l_43') | |
// (18, 13, 'sp4_h_r_6') | |
// (19, 9, 'local_g1_4') | |
// (19, 9, 'ram/WDATA_13') | |
// (19, 9, 'sp4_h_r_20') | |
// (19, 13, 'sp4_h_r_19') | |
// (20, 9, 'sp4_h_r_33') | |
// (20, 13, 'sp4_h_r_30') | |
// (21, 9, 'sp4_h_r_44') | |
// (21, 13, 'sp4_h_r_43') | |
// (22, 9, 'sp4_h_l_44') | |
// (22, 13, 'sp4_h_l_43') | |
wire n351; | |
// (12, 11, 'neigh_op_tnr_3') | |
// (12, 12, 'neigh_op_rgt_3') | |
// (12, 13, 'neigh_op_bnr_3') | |
// (13, 11, 'neigh_op_top_3') | |
// (13, 12, 'lutff_3/out') | |
// (13, 12, 'sp4_h_r_6') | |
// (13, 13, 'neigh_op_bot_3') | |
// (14, 11, 'neigh_op_tnl_3') | |
// (14, 12, 'neigh_op_lft_3') | |
// (14, 12, 'sp4_h_r_19') | |
// (14, 13, 'neigh_op_bnl_3') | |
// (15, 12, 'sp4_h_r_30') | |
// (16, 12, 'local_g3_3') | |
// (16, 12, 'lutff_2/in_2') | |
// (16, 12, 'sp4_h_r_43') | |
// (17, 12, 'sp4_h_l_43') | |
wire n352; | |
// (12, 11, 'neigh_op_tnr_5') | |
// (12, 12, 'local_g2_5') | |
// (12, 12, 'lutff_4/in_1') | |
// (12, 12, 'neigh_op_rgt_5') | |
// (12, 13, 'neigh_op_bnr_5') | |
// (13, 11, 'neigh_op_top_5') | |
// (13, 12, 'lutff_5/out') | |
// (13, 13, 'neigh_op_bot_5') | |
// (14, 11, 'neigh_op_tnl_5') | |
// (14, 12, 'neigh_op_lft_5') | |
// (14, 13, 'neigh_op_bnl_5') | |
wire n353; | |
// (12, 11, 'neigh_op_tnr_6') | |
// (12, 12, 'neigh_op_rgt_6') | |
// (12, 13, 'neigh_op_bnr_6') | |
// (13, 11, 'neigh_op_top_6') | |
// (13, 12, 'lutff_6/out') | |
// (13, 13, 'local_g0_6') | |
// (13, 13, 'lutff_5/in_3') | |
// (13, 13, 'neigh_op_bot_6') | |
// (14, 11, 'neigh_op_tnl_6') | |
// (14, 12, 'neigh_op_lft_6') | |
// (14, 13, 'neigh_op_bnl_6') | |
wire n354; | |
// (12, 11, 'sp12_h_r_0') | |
// (13, 11, 'local_g0_3') | |
// (13, 11, 'lutff_2/in_1') | |
// (13, 11, 'sp12_h_r_3') | |
// (14, 11, 'sp12_h_r_4') | |
// (15, 11, 'sp12_h_r_7') | |
// (16, 11, 'sp12_h_r_8') | |
// (17, 8, 'sp4_r_v_b_40') | |
// (17, 9, 'sp4_r_v_b_29') | |
// (17, 10, 'sp4_r_v_b_16') | |
// (17, 11, 'sp12_h_r_11') | |
// (17, 11, 'sp4_r_v_b_5') | |
// (18, 7, 'sp4_v_t_40') | |
// (18, 8, 'sp4_v_b_40') | |
// (18, 9, 'sp4_v_b_29') | |
// (18, 10, 'local_g0_0') | |
// (18, 10, 'lutff_2/in_2') | |
// (18, 10, 'sp4_v_b_16') | |
// (18, 11, 'sp12_h_r_12') | |
// (18, 11, 'sp4_h_r_0') | |
// (18, 11, 'sp4_v_b_5') | |
// (19, 8, 'sp4_r_v_b_36') | |
// (19, 9, 'local_g0_1') | |
// (19, 9, 'ram/WDATA_9') | |
// (19, 9, 'sp4_r_v_b_25') | |
// (19, 10, 'neigh_op_tnr_4') | |
// (19, 10, 'sp4_r_v_b_12') | |
// (19, 11, 'neigh_op_rgt_4') | |
// (19, 11, 'sp12_h_r_15') | |
// (19, 11, 'sp4_h_r_13') | |
// (19, 11, 'sp4_r_v_b_1') | |
// (19, 12, 'neigh_op_bnr_4') | |
// (20, 7, 'sp4_v_t_36') | |
// (20, 8, 'sp4_v_b_36') | |
// (20, 9, 'sp4_v_b_25') | |
// (20, 10, 'neigh_op_top_4') | |
// (20, 10, 'sp4_v_b_12') | |
// (20, 11, 'lutff_4/out') | |
// (20, 11, 'sp12_h_r_16') | |
// (20, 11, 'sp4_h_r_24') | |
// (20, 11, 'sp4_h_r_8') | |
// (20, 11, 'sp4_v_b_1') | |
// (20, 12, 'local_g1_4') | |
// (20, 12, 'lutff_5/in_0') | |
// (20, 12, 'neigh_op_bot_4') | |
// (21, 10, 'neigh_op_tnl_4') | |
// (21, 11, 'neigh_op_lft_4') | |
// (21, 11, 'sp12_h_r_19') | |
// (21, 11, 'sp4_h_r_21') | |
// (21, 11, 'sp4_h_r_37') | |
// (21, 12, 'neigh_op_bnl_4') | |
// (22, 11, 'sp12_h_r_20') | |
// (22, 11, 'sp4_h_l_37') | |
// (22, 11, 'sp4_h_r_32') | |
// (23, 11, 'sp12_h_r_23') | |
// (23, 11, 'sp4_h_r_45') | |
// (24, 11, 'sp12_h_l_23') | |
// (24, 11, 'sp4_h_l_45') | |
wire n355; | |
// (12, 11, 'sp4_h_r_0') | |
// (13, 10, 'neigh_op_tnr_4') | |
// (13, 11, 'local_g3_4') | |
// (13, 11, 'lutff_3/in_2') | |
// (13, 11, 'neigh_op_rgt_4') | |
// (13, 11, 'sp4_h_r_13') | |
// (13, 12, 'neigh_op_bnr_4') | |
// (14, 10, 'neigh_op_top_4') | |
// (14, 11, 'lutff_4/out') | |
// (14, 11, 'sp4_h_r_24') | |
// (14, 12, 'neigh_op_bot_4') | |
// (15, 10, 'neigh_op_tnl_4') | |
// (15, 11, 'neigh_op_lft_4') | |
// (15, 11, 'sp4_h_r_37') | |
// (15, 12, 'neigh_op_bnl_4') | |
// (16, 11, 'sp4_h_l_37') | |
// (16, 11, 'sp4_h_r_8') | |
// (17, 11, 'sp4_h_r_21') | |
// (18, 11, 'sp4_h_r_32') | |
// (19, 8, 'sp4_r_v_b_39') | |
// (19, 8, 'sp4_r_v_b_45') | |
// (19, 9, 'local_g2_0') | |
// (19, 9, 'ram/WDATA_10') | |
// (19, 9, 'sp4_r_v_b_26') | |
// (19, 9, 'sp4_r_v_b_32') | |
// (19, 10, 'sp4_r_v_b_15') | |
// (19, 10, 'sp4_r_v_b_21') | |
// (19, 11, 'sp4_h_r_45') | |
// (19, 11, 'sp4_r_v_b_2') | |
// (19, 11, 'sp4_r_v_b_8') | |
// (19, 12, 'sp4_r_v_b_45') | |
// (19, 13, 'sp4_r_v_b_32') | |
// (19, 14, 'sp4_r_v_b_21') | |
// (19, 15, 'sp4_r_v_b_8') | |
// (20, 7, 'sp4_v_t_39') | |
// (20, 7, 'sp4_v_t_45') | |
// (20, 8, 'sp4_v_b_39') | |
// (20, 8, 'sp4_v_b_45') | |
// (20, 9, 'sp4_v_b_26') | |
// (20, 9, 'sp4_v_b_32') | |
// (20, 10, 'local_g0_7') | |
// (20, 10, 'lutff_1/in_2') | |
// (20, 10, 'sp4_v_b_15') | |
// (20, 10, 'sp4_v_b_21') | |
// (20, 11, 'sp4_h_l_45') | |
// (20, 11, 'sp4_v_b_2') | |
// (20, 11, 'sp4_v_b_8') | |
// (20, 11, 'sp4_v_t_45') | |
// (20, 12, 'local_g3_5') | |
// (20, 12, 'lutff_6/in_2') | |
// (20, 12, 'sp4_v_b_45') | |
// (20, 13, 'sp4_v_b_32') | |
// (20, 14, 'sp4_v_b_21') | |
// (20, 15, 'sp4_v_b_8') | |
wire n356; | |
// (12, 12, 'local_g0_4') | |
// (12, 12, 'lutff_2/in_2') | |
// (12, 12, 'sp4_h_r_4') | |
// (12, 13, 'local_g1_1') | |
// (12, 13, 'lutff_6/in_0') | |
// (12, 13, 'sp4_h_r_9') | |
// (13, 12, 'sp4_h_r_17') | |
// (13, 13, 'sp4_h_r_20') | |
// (14, 12, 'sp4_h_r_28') | |
// (14, 13, 'sp4_h_r_33') | |
// (14, 14, 'neigh_op_tnr_0') | |
// (14, 15, 'neigh_op_rgt_0') | |
// (14, 16, 'neigh_op_bnr_0') | |
// (15, 12, 'sp4_h_r_41') | |
// (15, 13, 'sp4_h_r_44') | |
// (15, 13, 'sp4_r_v_b_41') | |
// (15, 14, 'neigh_op_top_0') | |
// (15, 14, 'sp4_r_v_b_28') | |
// (15, 14, 'sp4_r_v_b_44') | |
// (15, 15, 'lutff_0/out') | |
// (15, 15, 'sp4_r_v_b_17') | |
// (15, 15, 'sp4_r_v_b_33') | |
// (15, 16, 'neigh_op_bot_0') | |
// (15, 16, 'sp4_r_v_b_20') | |
// (15, 16, 'sp4_r_v_b_4') | |
// (15, 17, 'sp4_r_v_b_9') | |
// (16, 12, 'sp4_h_l_41') | |
// (16, 12, 'sp4_v_t_41') | |
// (16, 13, 'sp4_h_l_44') | |
// (16, 13, 'sp4_v_b_41') | |
// (16, 13, 'sp4_v_t_44') | |
// (16, 14, 'neigh_op_tnl_0') | |
// (16, 14, 'sp4_v_b_28') | |
// (16, 14, 'sp4_v_b_44') | |
// (16, 15, 'neigh_op_lft_0') | |
// (16, 15, 'sp4_v_b_17') | |
// (16, 15, 'sp4_v_b_33') | |
// (16, 16, 'neigh_op_bnl_0') | |
// (16, 16, 'sp4_v_b_20') | |
// (16, 16, 'sp4_v_b_4') | |
// (16, 17, 'sp4_v_b_9') | |
wire n357; | |
// (12, 12, 'neigh_op_tnr_0') | |
// (12, 13, 'neigh_op_rgt_0') | |
// (12, 13, 'sp4_h_r_5') | |
// (12, 14, 'neigh_op_bnr_0') | |
// (13, 12, 'neigh_op_top_0') | |
// (13, 13, 'lutff_0/out') | |
// (13, 13, 'sp4_h_r_16') | |
// (13, 14, 'neigh_op_bot_0') | |
// (14, 12, 'neigh_op_tnl_0') | |
// (14, 13, 'neigh_op_lft_0') | |
// (14, 13, 'sp4_h_r_29') | |
// (14, 14, 'neigh_op_bnl_0') | |
// (15, 13, 'local_g3_0') | |
// (15, 13, 'lutff_0/in_3') | |
// (15, 13, 'lutff_3/in_0') | |
// (15, 13, 'sp4_h_r_40') | |
// (16, 13, 'sp4_h_l_40') | |
wire n358; | |
// (12, 12, 'neigh_op_tnr_1') | |
// (12, 13, 'neigh_op_rgt_1') | |
// (12, 14, 'neigh_op_bnr_1') | |
// (13, 12, 'neigh_op_top_1') | |
// (13, 13, 'local_g1_1') | |
// (13, 13, 'lutff_1/out') | |
// (13, 13, 'lutff_2/in_0') | |
// (13, 14, 'neigh_op_bot_1') | |
// (14, 12, 'neigh_op_tnl_1') | |
// (14, 13, 'neigh_op_lft_1') | |
// (14, 14, 'neigh_op_bnl_1') | |
wire n359; | |
// (12, 12, 'neigh_op_tnr_3') | |
// (12, 13, 'neigh_op_rgt_3') | |
// (12, 14, 'neigh_op_bnr_3') | |
// (13, 12, 'neigh_op_top_3') | |
// (13, 13, 'local_g2_3') | |
// (13, 13, 'lutff_3/out') | |
// (13, 13, 'lutff_5/in_2') | |
// (13, 14, 'neigh_op_bot_3') | |
// (14, 12, 'neigh_op_tnl_3') | |
// (14, 13, 'neigh_op_lft_3') | |
// (14, 14, 'neigh_op_bnl_3') | |
wire n360; | |
// (12, 12, 'neigh_op_tnr_4') | |
// (12, 13, 'neigh_op_rgt_4') | |
// (12, 14, 'neigh_op_bnr_4') | |
// (13, 12, 'neigh_op_top_4') | |
// (13, 13, 'local_g0_4') | |
// (13, 13, 'lutff_4/out') | |
// (13, 13, 'lutff_5/in_1') | |
// (13, 14, 'neigh_op_bot_4') | |
// (14, 12, 'neigh_op_tnl_4') | |
// (14, 13, 'neigh_op_lft_4') | |
// (14, 14, 'neigh_op_bnl_4') | |
wire n361; | |
// (12, 12, 'neigh_op_tnr_6') | |
// (12, 13, 'neigh_op_rgt_6') | |
// (12, 14, 'neigh_op_bnr_6') | |
// (13, 12, 'neigh_op_top_6') | |
// (13, 13, 'local_g1_6') | |
// (13, 13, 'lutff_3/in_2') | |
// (13, 13, 'lutff_6/out') | |
// (13, 14, 'neigh_op_bot_6') | |
// (14, 12, 'neigh_op_tnl_6') | |
// (14, 13, 'neigh_op_lft_6') | |
// (14, 14, 'neigh_op_bnl_6') | |
reg n362 = 0; | |
// (12, 12, 'neigh_op_tnr_7') | |
// (12, 13, 'neigh_op_rgt_7') | |
// (12, 14, 'neigh_op_bnr_7') | |
// (13, 12, 'neigh_op_top_7') | |
// (13, 13, 'local_g0_7') | |
// (13, 13, 'lutff_2/in_3') | |
// (13, 13, 'lutff_7/out') | |
// (13, 14, 'neigh_op_bot_7') | |
// (14, 12, 'neigh_op_tnl_7') | |
// (14, 13, 'neigh_op_lft_7') | |
// (14, 14, 'neigh_op_bnl_7') | |
wire n363; | |
// (12, 12, 'sp4_r_v_b_40') | |
// (12, 13, 'sp4_r_v_b_29') | |
// (12, 14, 'sp4_r_v_b_16') | |
// (12, 15, 'sp4_r_v_b_5') | |
// (13, 11, 'sp4_v_t_40') | |
// (13, 12, 'local_g2_0') | |
// (13, 12, 'lutff_5/in_3') | |
// (13, 12, 'sp4_v_b_40') | |
// (13, 13, 'sp4_v_b_29') | |
// (13, 14, 'local_g0_0') | |
// (13, 14, 'lutff_0/in_0') | |
// (13, 14, 'sp4_v_b_16') | |
// (13, 15, 'sp4_h_r_0') | |
// (13, 15, 'sp4_v_b_5') | |
// (14, 14, 'neigh_op_tnr_4') | |
// (14, 15, 'neigh_op_rgt_4') | |
// (14, 15, 'sp4_h_r_13') | |
// (14, 16, 'neigh_op_bnr_4') | |
// (15, 14, 'neigh_op_top_4') | |
// (15, 15, 'lutff_4/out') | |
// (15, 15, 'sp4_h_r_24') | |
// (15, 16, 'neigh_op_bot_4') | |
// (16, 14, 'neigh_op_tnl_4') | |
// (16, 15, 'neigh_op_lft_4') | |
// (16, 15, 'sp4_h_r_37') | |
// (16, 16, 'neigh_op_bnl_4') | |
// (17, 15, 'sp4_h_l_37') | |
reg n364 = 0; | |
// (12, 12, 'sp4_r_v_b_41') | |
// (12, 13, 'sp4_r_v_b_28') | |
// (12, 14, 'neigh_op_tnr_2') | |
// (12, 14, 'sp4_r_v_b_17') | |
// (12, 15, 'neigh_op_rgt_2') | |
// (12, 15, 'sp4_r_v_b_4') | |
// (12, 16, 'neigh_op_bnr_2') | |
// (13, 11, 'sp4_v_t_41') | |
// (13, 12, 'sp4_v_b_41') | |
// (13, 13, 'local_g3_4') | |
// (13, 13, 'lutff_1/in_2') | |
// (13, 13, 'sp4_v_b_28') | |
// (13, 14, 'neigh_op_top_2') | |
// (13, 14, 'sp4_v_b_17') | |
// (13, 15, 'lutff_2/out') | |
// (13, 15, 'sp4_v_b_4') | |
// (13, 16, 'neigh_op_bot_2') | |
// (14, 14, 'neigh_op_tnl_2') | |
// (14, 15, 'neigh_op_lft_2') | |
// (14, 16, 'neigh_op_bnl_2') | |
wire n365; | |
// (12, 13, 'neigh_op_tnr_0') | |
// (12, 14, 'local_g2_0') | |
// (12, 14, 'lutff_0/in_0') | |
// (12, 14, 'neigh_op_rgt_0') | |
// (12, 15, 'neigh_op_bnr_0') | |
// (13, 13, 'neigh_op_top_0') | |
// (13, 14, 'lutff_0/out') | |
// (13, 15, 'neigh_op_bot_0') | |
// (14, 13, 'neigh_op_tnl_0') | |
// (14, 14, 'neigh_op_lft_0') | |
// (14, 15, 'neigh_op_bnl_0') | |
wire n366; | |
// (12, 13, 'neigh_op_tnr_3') | |
// (12, 14, 'neigh_op_rgt_3') | |
// (12, 15, 'neigh_op_bnr_3') | |
// (13, 13, 'local_g1_3') | |
// (13, 13, 'lutff_7/in_3') | |
// (13, 13, 'neigh_op_top_3') | |
// (13, 14, 'lutff_3/out') | |
// (13, 15, 'neigh_op_bot_3') | |
// (14, 13, 'neigh_op_tnl_3') | |
// (14, 14, 'neigh_op_lft_3') | |
// (14, 15, 'neigh_op_bnl_3') | |
wire n367; | |
// (12, 13, 'neigh_op_tnr_4') | |
// (12, 14, 'neigh_op_rgt_4') | |
// (12, 15, 'neigh_op_bnr_4') | |
// (13, 13, 'neigh_op_top_4') | |
// (13, 13, 'sp4_r_v_b_36') | |
// (13, 14, 'lutff_4/out') | |
// (13, 14, 'sp4_h_r_8') | |
// (13, 14, 'sp4_r_v_b_25') | |
// (13, 15, 'neigh_op_bot_4') | |
// (13, 15, 'sp4_r_v_b_12') | |
// (13, 16, 'sp4_r_v_b_1') | |
// (14, 12, 'sp4_v_t_36') | |
// (14, 13, 'neigh_op_tnl_4') | |
// (14, 13, 'sp4_v_b_36') | |
// (14, 14, 'neigh_op_lft_4') | |
// (14, 14, 'sp4_h_r_21') | |
// (14, 14, 'sp4_v_b_25') | |
// (14, 15, 'neigh_op_bnl_4') | |
// (14, 15, 'sp4_v_b_12') | |
// (14, 16, 'sp4_h_r_1') | |
// (14, 16, 'sp4_v_b_1') | |
// (15, 14, 'sp4_h_r_32') | |
// (15, 16, 'sp4_h_r_12') | |
// (16, 14, 'local_g3_5') | |
// (16, 14, 'lutff_1/in_3') | |
// (16, 14, 'sp4_h_r_45') | |
// (16, 16, 'sp4_h_r_25') | |
// (17, 14, 'sp4_h_l_45') | |
// (17, 16, 'sp4_h_r_36') | |
// (18, 16, 'sp4_h_l_36') | |
// (18, 16, 'sp4_h_r_1') | |
// (19, 16, 'local_g0_4') | |
// (19, 16, 'ram/WDATA_2') | |
// (19, 16, 'sp4_h_r_12') | |
// (20, 16, 'sp4_h_r_25') | |
// (21, 16, 'sp4_h_r_36') | |
// (22, 16, 'sp4_h_l_36') | |
wire n368; | |
// (12, 13, 'neigh_op_tnr_5') | |
// (12, 14, 'neigh_op_rgt_5') | |
// (12, 15, 'neigh_op_bnr_5') | |
// (13, 13, 'neigh_op_top_5') | |
// (13, 14, 'lutff_5/out') | |
// (13, 14, 'sp4_h_r_10') | |
// (13, 15, 'neigh_op_bot_5') | |
// (14, 13, 'neigh_op_tnl_5') | |
// (14, 14, 'neigh_op_lft_5') | |
// (14, 14, 'sp4_h_r_23') | |
// (14, 15, 'neigh_op_bnl_5') | |
// (15, 14, 'local_g2_2') | |
// (15, 14, 'lutff_2/in_2') | |
// (15, 14, 'lutff_5/in_3') | |
// (15, 14, 'sp4_h_r_34') | |
// (16, 14, 'sp4_h_r_47') | |
// (17, 14, 'sp4_h_l_47') | |
wire n369; | |
// (12, 13, 'neigh_op_tnr_6') | |
// (12, 14, 'neigh_op_rgt_6') | |
// (12, 14, 'sp4_h_r_1') | |
// (12, 15, 'neigh_op_bnr_6') | |
// (13, 12, 'sp4_r_v_b_37') | |
// (13, 13, 'neigh_op_top_6') | |
// (13, 13, 'sp4_r_v_b_24') | |
// (13, 14, 'local_g2_6') | |
// (13, 14, 'lutff_4/in_2') | |
// (13, 14, 'lutff_6/out') | |
// (13, 14, 'sp4_h_r_12') | |
// (13, 14, 'sp4_r_v_b_13') | |
// (13, 14, 'sp4_r_v_b_45') | |
// (13, 15, 'local_g1_6') | |
// (13, 15, 'lutff_7/in_0') | |
// (13, 15, 'neigh_op_bot_6') | |
// (13, 15, 'sp4_r_v_b_0') | |
// (13, 15, 'sp4_r_v_b_32') | |
// (13, 16, 'sp4_r_v_b_21') | |
// (13, 17, 'sp4_r_v_b_8') | |
// (14, 11, 'sp4_v_t_37') | |
// (14, 12, 'sp4_v_b_37') | |
// (14, 13, 'neigh_op_tnl_6') | |
// (14, 13, 'sp4_h_r_1') | |
// (14, 13, 'sp4_v_b_24') | |
// (14, 13, 'sp4_v_t_45') | |
// (14, 14, 'local_g0_6') | |
// (14, 14, 'local_g1_6') | |
// (14, 14, 'lutff_0/in_1') | |
// (14, 14, 'lutff_6/in_2') | |
// (14, 14, 'neigh_op_lft_6') | |
// (14, 14, 'sp4_h_r_25') | |
// (14, 14, 'sp4_v_b_13') | |
// (14, 14, 'sp4_v_b_45') | |
// (14, 15, 'local_g3_6') | |
// (14, 15, 'lutff_4/in_1') | |
// (14, 15, 'neigh_op_bnl_6') | |
// (14, 15, 'sp4_h_r_6') | |
// (14, 15, 'sp4_v_b_0') | |
// (14, 15, 'sp4_v_b_32') | |
// (14, 16, 'sp4_v_b_21') | |
// (14, 17, 'sp4_v_b_8') | |
// (15, 13, 'sp4_h_r_12') | |
// (15, 14, 'local_g2_4') | |
// (15, 14, 'lutff_3/in_1') | |
// (15, 14, 'sp4_h_r_36') | |
// (15, 15, 'local_g0_3') | |
// (15, 15, 'local_g1_3') | |
// (15, 15, 'lutff_1/in_3') | |
// (15, 15, 'lutff_5/in_2') | |
// (15, 15, 'lutff_6/in_2') | |
// (15, 15, 'sp4_h_r_19') | |
// (16, 13, 'sp4_h_r_25') | |
// (16, 14, 'sp4_h_l_36') | |
// (16, 14, 'sp4_h_r_1') | |
// (16, 14, 'sp4_h_r_4') | |
// (16, 15, 'sp4_h_r_30') | |
// (17, 13, 'local_g3_4') | |
// (17, 13, 'lutff_2/in_1') | |
// (17, 13, 'lutff_6/in_1') | |
// (17, 13, 'lutff_7/in_2') | |
// (17, 13, 'sp4_h_r_36') | |
// (17, 14, 'local_g0_4') | |
// (17, 14, 'lutff_6/in_2') | |
// (17, 14, 'sp4_h_r_12') | |
// (17, 14, 'sp4_h_r_17') | |
// (17, 15, 'sp4_h_r_43') | |
// (18, 13, 'local_g0_4') | |
// (18, 13, 'lutff_global/s_r') | |
// (18, 13, 'sp4_h_l_36') | |
// (18, 13, 'sp4_h_r_4') | |
// (18, 14, 'sp4_h_r_25') | |
// (18, 14, 'sp4_h_r_28') | |
// (18, 15, 'sp4_h_l_43') | |
// (18, 15, 'sp4_h_r_9') | |
// (19, 11, 'sp4_r_v_b_41') | |
// (19, 12, 'sp4_r_v_b_28') | |
// (19, 13, 'sp4_h_r_17') | |
// (19, 13, 'sp4_r_v_b_17') | |
// (19, 14, 'sp4_h_r_36') | |
// (19, 14, 'sp4_h_r_41') | |
// (19, 14, 'sp4_r_v_b_4') | |
// (19, 15, 'sp4_h_r_20') | |
// (20, 10, 'sp4_v_t_41') | |
// (20, 11, 'sp4_v_b_41') | |
// (20, 12, 'local_g2_4') | |
// (20, 12, 'lutff_global/s_r') | |
// (20, 12, 'sp4_v_b_28') | |
// (20, 13, 'local_g1_1') | |
// (20, 13, 'lutff_6/in_0') | |
// (20, 13, 'sp4_h_r_28') | |
// (20, 13, 'sp4_v_b_17') | |
// (20, 14, 'local_g1_0') | |
// (20, 14, 'lutff_0/in_3') | |
// (20, 14, 'sp4_h_l_36') | |
// (20, 14, 'sp4_h_l_41') | |
// (20, 14, 'sp4_h_r_0') | |
// (20, 14, 'sp4_v_b_4') | |
// (20, 15, 'local_g2_1') | |
// (20, 15, 'lutff_1/in_0') | |
// (20, 15, 'sp4_h_r_33') | |
// (21, 13, 'sp4_h_r_41') | |
// (21, 14, 'sp4_h_r_13') | |
// (21, 15, 'sp4_h_r_44') | |
// (22, 13, 'sp4_h_l_41') | |
// (22, 14, 'sp4_h_r_24') | |
// (22, 15, 'sp4_h_l_44') | |
// (23, 14, 'sp4_h_r_37') | |
// (24, 14, 'sp4_h_l_37') | |
wire n370; | |
// (12, 13, 'neigh_op_tnr_7') | |
// (12, 14, 'local_g3_7') | |
// (12, 14, 'lutff_5/in_3') | |
// (12, 14, 'neigh_op_rgt_7') | |
// (12, 15, 'neigh_op_bnr_7') | |
// (13, 13, 'neigh_op_top_7') | |
// (13, 14, 'lutff_7/out') | |
// (13, 15, 'neigh_op_bot_7') | |
// (14, 13, 'neigh_op_tnl_7') | |
// (14, 14, 'neigh_op_lft_7') | |
// (14, 15, 'neigh_op_bnl_7') | |
wire n371; | |
// (12, 13, 'sp4_h_r_2') | |
// (13, 13, 'local_g1_7') | |
// (13, 13, 'lutff_1/in_3') | |
// (13, 13, 'sp4_h_r_15') | |
// (14, 13, 'sp4_h_r_26') | |
// (15, 13, 'sp4_h_r_39') | |
// (16, 13, 'sp4_h_l_39') | |
// (16, 13, 'sp4_h_r_2') | |
// (17, 13, 'sp4_h_r_15') | |
// (18, 11, 'neigh_op_tnr_7') | |
// (18, 12, 'neigh_op_rgt_7') | |
// (18, 13, 'neigh_op_bnr_7') | |
// (18, 13, 'sp4_h_r_26') | |
// (19, 10, 'sp4_r_v_b_39') | |
// (19, 11, 'neigh_op_top_7') | |
// (19, 11, 'sp4_r_v_b_26') | |
// (19, 12, 'ram/RDATA_0') | |
// (19, 12, 'sp4_r_v_b_15') | |
// (19, 13, 'neigh_op_bot_7') | |
// (19, 13, 'sp4_h_r_39') | |
// (19, 13, 'sp4_r_v_b_2') | |
// (20, 9, 'sp4_v_t_39') | |
// (20, 10, 'sp4_v_b_39') | |
// (20, 11, 'neigh_op_tnl_7') | |
// (20, 11, 'sp4_v_b_26') | |
// (20, 12, 'neigh_op_lft_7') | |
// (20, 12, 'sp4_v_b_15') | |
// (20, 13, 'neigh_op_bnl_7') | |
// (20, 13, 'sp4_h_l_39') | |
// (20, 13, 'sp4_v_b_2') | |
wire n372; | |
// (12, 13, 'sp4_h_r_6') | |
// (13, 12, 'neigh_op_tnr_7') | |
// (13, 13, 'neigh_op_rgt_7') | |
// (13, 13, 'sp4_h_r_19') | |
// (13, 14, 'neigh_op_bnr_7') | |
// (14, 12, 'neigh_op_top_7') | |
// (14, 13, 'lutff_7/out') | |
// (14, 13, 'sp4_h_r_30') | |
// (14, 14, 'neigh_op_bot_7') | |
// (15, 6, 'sp4_r_v_b_45') | |
// (15, 7, 'sp4_r_v_b_32') | |
// (15, 8, 'sp4_r_v_b_21') | |
// (15, 9, 'sp4_r_v_b_8') | |
// (15, 10, 'sp4_r_v_b_37') | |
// (15, 11, 'sp4_r_v_b_24') | |
// (15, 12, 'neigh_op_tnl_7') | |
// (15, 12, 'sp4_r_v_b_13') | |
// (15, 13, 'neigh_op_lft_7') | |
// (15, 13, 'sp4_h_r_43') | |
// (15, 13, 'sp4_r_v_b_0') | |
// (15, 14, 'neigh_op_bnl_7') | |
// (16, 5, 'sp4_v_t_45') | |
// (16, 6, 'sp4_v_b_45') | |
// (16, 7, 'local_g3_0') | |
// (16, 7, 'lutff_0/in_3') | |
// (16, 7, 'lutff_3/in_2') | |
// (16, 7, 'lutff_5/in_0') | |
// (16, 7, 'lutff_7/in_2') | |
// (16, 7, 'sp4_v_b_32') | |
// (16, 8, 'local_g1_5') | |
// (16, 8, 'lutff_1/in_3') | |
// (16, 8, 'lutff_2/in_0') | |
// (16, 8, 'lutff_4/in_0') | |
// (16, 8, 'lutff_7/in_1') | |
// (16, 8, 'sp4_v_b_21') | |
// (16, 9, 'local_g0_5') | |
// (16, 9, 'lutff_4/in_3') | |
// (16, 9, 'lutff_5/in_0') | |
// (16, 9, 'sp4_h_r_5') | |
// (16, 9, 'sp4_v_b_8') | |
// (16, 9, 'sp4_v_t_37') | |
// (16, 10, 'sp4_v_b_37') | |
// (16, 11, 'sp4_v_b_24') | |
// (16, 12, 'sp4_v_b_13') | |
// (16, 13, 'sp4_h_l_43') | |
// (16, 13, 'sp4_v_b_0') | |
// (17, 9, 'sp4_h_r_16') | |
// (18, 9, 'sp4_h_r_29') | |
// (19, 9, 'sp4_h_r_40') | |
// (20, 9, 'sp4_h_l_40') | |
wire n373; | |
// (12, 14, 'neigh_op_tnr_7') | |
// (12, 15, 'neigh_op_rgt_7') | |
// (12, 16, 'neigh_op_bnr_7') | |
// (13, 13, 'sp4_r_v_b_39') | |
// (13, 14, 'neigh_op_top_7') | |
// (13, 14, 'sp4_r_v_b_26') | |
// (13, 15, 'lutff_7/out') | |
// (13, 15, 'sp4_r_v_b_15') | |
// (13, 16, 'neigh_op_bot_7') | |
// (13, 16, 'sp4_r_v_b_2') | |
// (14, 12, 'sp4_v_t_39') | |
// (14, 13, 'sp4_v_b_39') | |
// (14, 14, 'neigh_op_tnl_7') | |
// (14, 14, 'sp4_v_b_26') | |
// (14, 15, 'local_g1_7') | |
// (14, 15, 'lutff_1/in_3') | |
// (14, 15, 'neigh_op_lft_7') | |
// (14, 15, 'sp4_v_b_15') | |
// (14, 16, 'neigh_op_bnl_7') | |
// (14, 16, 'sp4_h_r_2') | |
// (14, 16, 'sp4_v_b_2') | |
// (15, 16, 'sp4_h_r_15') | |
// (16, 16, 'sp4_h_r_26') | |
// (17, 16, 'sp4_h_r_39') | |
// (18, 16, 'sp4_h_l_39') | |
// (18, 16, 'sp4_h_r_5') | |
// (19, 16, 'local_g0_0') | |
// (19, 16, 'ram/WDATA_6') | |
// (19, 16, 'sp4_h_r_16') | |
// (20, 16, 'sp4_h_r_29') | |
// (21, 16, 'sp4_h_r_40') | |
// (22, 16, 'sp4_h_l_40') | |
wire n374; | |
// (12, 15, 'local_g1_0') | |
// (12, 15, 'lutff_7/in_2') | |
// (12, 15, 'sp4_h_r_8') | |
// (13, 14, 'neigh_op_tnr_0') | |
// (13, 15, 'neigh_op_rgt_0') | |
// (13, 15, 'sp4_h_r_21') | |
// (13, 16, 'neigh_op_bnr_0') | |
// (14, 14, 'neigh_op_top_0') | |
// (14, 15, 'lutff_0/out') | |
// (14, 15, 'sp4_h_r_32') | |
// (14, 16, 'neigh_op_bot_0') | |
// (15, 14, 'neigh_op_tnl_0') | |
// (15, 15, 'neigh_op_lft_0') | |
// (15, 15, 'sp4_h_r_45') | |
// (15, 16, 'neigh_op_bnl_0') | |
// (16, 15, 'sp4_h_l_45') | |
wire n375; | |
// (12, 15, 'local_g1_6') | |
// (12, 15, 'lutff_4/in_3') | |
// (12, 15, 'sp4_h_r_6') | |
// (13, 14, 'neigh_op_tnr_7') | |
// (13, 15, 'neigh_op_rgt_7') | |
// (13, 15, 'sp4_h_r_19') | |
// (13, 16, 'neigh_op_bnr_7') | |
// (14, 14, 'neigh_op_top_7') | |
// (14, 15, 'lutff_7/out') | |
// (14, 15, 'sp4_h_r_30') | |
// (14, 16, 'neigh_op_bot_7') | |
// (15, 14, 'neigh_op_tnl_7') | |
// (15, 15, 'neigh_op_lft_7') | |
// (15, 15, 'sp4_h_r_43') | |
// (15, 16, 'neigh_op_bnl_7') | |
// (16, 15, 'sp4_h_l_43') | |
reg n376 = 0; | |
// (13, 1, 'neigh_op_tnr_0') | |
// (13, 2, 'neigh_op_rgt_0') | |
// (13, 3, 'neigh_op_bnr_0') | |
// (14, 1, 'neigh_op_top_0') | |
// (14, 1, 'sp4_r_v_b_12') | |
// (14, 2, 'lutff_0/out') | |
// (14, 2, 'sp4_r_v_b_1') | |
// (14, 3, 'neigh_op_bot_0') | |
// (15, 0, 'io_0/OUT_ENB') | |
// (15, 0, 'local_g1_4') | |
// (15, 0, 'span4_vert_12') | |
// (15, 1, 'neigh_op_tnl_0') | |
// (15, 1, 'sp4_v_b_12') | |
// (15, 2, 'neigh_op_lft_0') | |
// (15, 2, 'sp4_v_b_1') | |
// (15, 3, 'neigh_op_bnl_0') | |
reg n377 = 0; | |
// (13, 1, 'neigh_op_tnr_2') | |
// (13, 1, 'sp4_r_v_b_1') | |
// (13, 2, 'neigh_op_rgt_2') | |
// (13, 2, 'sp4_r_v_b_36') | |
// (13, 3, 'neigh_op_bnr_2') | |
// (13, 3, 'sp4_r_v_b_25') | |
// (13, 4, 'sp4_r_v_b_12') | |
// (13, 5, 'sp4_r_v_b_1') | |
// (14, 0, 'span4_horz_r_0') | |
// (14, 0, 'span4_vert_1') | |
// (14, 1, 'neigh_op_top_2') | |
// (14, 1, 'sp4_v_b_1') | |
// (14, 1, 'sp4_v_t_36') | |
// (14, 2, 'lutff_2/out') | |
// (14, 2, 'sp4_v_b_36') | |
// (14, 3, 'neigh_op_bot_2') | |
// (14, 3, 'sp4_v_b_25') | |
// (14, 4, 'sp4_v_b_12') | |
// (14, 5, 'sp4_v_b_1') | |
// (15, 0, 'span4_horz_r_4') | |
// (15, 1, 'neigh_op_tnl_2') | |
// (15, 2, 'neigh_op_lft_2') | |
// (15, 3, 'neigh_op_bnl_2') | |
// (16, 0, 'io_0/OUT_ENB') | |
// (16, 0, 'local_g1_0') | |
// (16, 0, 'span4_horz_r_8') | |
// (17, 0, 'span4_horz_r_12') | |
// (18, 0, 'span4_horz_l_12') | |
wire n378; | |
// (13, 2, 'sp4_h_r_4') | |
// (14, 2, 'local_g1_1') | |
// (14, 2, 'lutff_0/in_0') | |
// (14, 2, 'sp4_h_r_17') | |
// (14, 7, 'sp4_r_v_b_38') | |
// (14, 8, 'sp4_r_v_b_27') | |
// (14, 9, 'sp4_r_v_b_14') | |
// (14, 10, 'local_g1_3') | |
// (14, 10, 'lutff_0/in_0') | |
// (14, 10, 'sp4_r_v_b_3') | |
// (14, 11, 'sp4_r_v_b_41') | |
// (14, 12, 'sp4_r_v_b_28') | |
// (14, 13, 'local_g3_1') | |
// (14, 13, 'lutff_6/in_2') | |
// (14, 13, 'sp4_r_v_b_17') | |
// (14, 14, 'sp4_r_v_b_4') | |
// (15, 2, 'local_g3_4') | |
// (15, 2, 'lutff_0/in_3') | |
// (15, 2, 'sp4_h_r_28') | |
// (15, 6, 'sp4_v_t_38') | |
// (15, 7, 'sp4_v_b_38') | |
// (15, 8, 'sp4_v_b_27') | |
// (15, 9, 'sp4_v_b_14') | |
// (15, 10, 'sp4_h_r_10') | |
// (15, 10, 'sp4_v_b_3') | |
// (15, 10, 'sp4_v_t_41') | |
// (15, 11, 'sp4_v_b_41') | |
// (15, 12, 'sp4_v_b_28') | |
// (15, 13, 'sp4_v_b_17') | |
// (15, 14, 'sp4_v_b_4') | |
// (16, 2, 'sp4_h_r_41') | |
// (16, 3, 'sp4_r_v_b_47') | |
// (16, 4, 'sp4_r_v_b_34') | |
// (16, 5, 'sp4_r_v_b_23') | |
// (16, 6, 'sp4_r_v_b_10') | |
// (16, 7, 'sp4_r_v_b_39') | |
// (16, 8, 'sp4_r_v_b_26') | |
// (16, 9, 'neigh_op_tnr_1') | |
// (16, 9, 'sp4_r_v_b_15') | |
// (16, 10, 'neigh_op_rgt_1') | |
// (16, 10, 'sp4_h_r_23') | |
// (16, 10, 'sp4_r_v_b_2') | |
// (16, 11, 'neigh_op_bnr_1') | |
// (17, 2, 'sp4_h_l_41') | |
// (17, 2, 'sp4_v_t_47') | |
// (17, 3, 'sp4_v_b_47') | |
// (17, 4, 'sp4_v_b_34') | |
// (17, 5, 'sp4_v_b_23') | |
// (17, 6, 'sp4_v_b_10') | |
// (17, 6, 'sp4_v_t_39') | |
// (17, 7, 'sp4_v_b_39') | |
// (17, 8, 'sp4_v_b_26') | |
// (17, 9, 'neigh_op_top_1') | |
// (17, 9, 'sp4_r_v_b_46') | |
// (17, 9, 'sp4_v_b_15') | |
// (17, 10, 'lutff_1/out') | |
// (17, 10, 'sp4_h_r_34') | |
// (17, 10, 'sp4_r_v_b_35') | |
// (17, 10, 'sp4_v_b_2') | |
// (17, 11, 'neigh_op_bot_1') | |
// (17, 11, 'sp4_r_v_b_22') | |
// (17, 12, 'sp4_r_v_b_11') | |
// (18, 8, 'sp4_v_t_46') | |
// (18, 9, 'neigh_op_tnl_1') | |
// (18, 9, 'sp4_v_b_46') | |
// (18, 10, 'neigh_op_lft_1') | |
// (18, 10, 'sp4_h_r_47') | |
// (18, 10, 'sp4_v_b_35') | |
// (18, 11, 'neigh_op_bnl_1') | |
// (18, 11, 'sp4_v_b_22') | |
// (18, 12, 'sp4_h_r_5') | |
// (18, 12, 'sp4_v_b_11') | |
// (19, 10, 'sp4_h_l_47') | |
// (19, 12, 'local_g1_0') | |
// (19, 12, 'ram/WDATA_3') | |
// (19, 12, 'sp4_h_r_16') | |
// (20, 12, 'sp4_h_r_29') | |
// (21, 12, 'sp4_h_r_40') | |
// (22, 12, 'sp4_h_l_40') | |
wire n379; | |
// (13, 2, 'sp4_h_r_5') | |
// (13, 12, 'local_g1_3') | |
// (13, 12, 'lutff_5/in_1') | |
// (13, 12, 'sp4_h_r_11') | |
// (14, 2, 'local_g0_0') | |
// (14, 2, 'lutff_2/in_0') | |
// (14, 2, 'sp4_h_r_16') | |
// (14, 10, 'local_g0_2') | |
// (14, 10, 'lutff_3/in_1') | |
// (14, 10, 'sp4_h_r_2') | |
// (14, 12, 'sp4_h_r_22') | |
// (15, 2, 'sp4_h_r_29') | |
// (15, 10, 'sp4_h_r_15') | |
// (15, 12, 'sp4_h_r_35') | |
// (16, 1, 'sp4_r_v_b_18') | |
// (16, 2, 'local_g1_7') | |
// (16, 2, 'lutff_2/in_2') | |
// (16, 2, 'sp4_h_r_40') | |
// (16, 2, 'sp4_r_v_b_7') | |
// (16, 3, 'sp4_r_v_b_46') | |
// (16, 4, 'sp4_r_v_b_35') | |
// (16, 5, 'sp4_r_v_b_22') | |
// (16, 6, 'sp4_r_v_b_11') | |
// (16, 7, 'sp4_r_v_b_38') | |
// (16, 8, 'neigh_op_tnr_7') | |
// (16, 8, 'sp4_r_v_b_27') | |
// (16, 9, 'neigh_op_rgt_7') | |
// (16, 9, 'sp4_r_v_b_14') | |
// (16, 9, 'sp4_r_v_b_46') | |
// (16, 10, 'neigh_op_bnr_7') | |
// (16, 10, 'sp4_h_r_26') | |
// (16, 10, 'sp4_r_v_b_3') | |
// (16, 10, 'sp4_r_v_b_35') | |
// (16, 11, 'sp4_r_v_b_22') | |
// (16, 12, 'sp4_h_r_46') | |
// (16, 12, 'sp4_r_v_b_11') | |
// (17, 0, 'span4_vert_18') | |
// (17, 1, 'sp4_v_b_18') | |
// (17, 2, 'sp4_h_l_40') | |
// (17, 2, 'sp4_v_b_7') | |
// (17, 2, 'sp4_v_t_46') | |
// (17, 3, 'sp4_v_b_46') | |
// (17, 4, 'sp4_v_b_35') | |
// (17, 5, 'sp4_v_b_22') | |
// (17, 6, 'sp4_v_b_11') | |
// (17, 6, 'sp4_v_t_38') | |
// (17, 7, 'sp4_r_v_b_39') | |
// (17, 7, 'sp4_v_b_38') | |
// (17, 8, 'neigh_op_top_7') | |
// (17, 8, 'sp4_r_v_b_26') | |
// (17, 8, 'sp4_v_b_27') | |
// (17, 8, 'sp4_v_t_46') | |
// (17, 9, 'lutff_7/out') | |
// (17, 9, 'sp4_r_v_b_15') | |
// (17, 9, 'sp4_r_v_b_47') | |
// (17, 9, 'sp4_v_b_14') | |
// (17, 9, 'sp4_v_b_46') | |
// (17, 10, 'neigh_op_bot_7') | |
// (17, 10, 'sp4_h_r_39') | |
// (17, 10, 'sp4_r_v_b_2') | |
// (17, 10, 'sp4_r_v_b_34') | |
// (17, 10, 'sp4_v_b_3') | |
// (17, 10, 'sp4_v_b_35') | |
// (17, 11, 'sp4_r_v_b_23') | |
// (17, 11, 'sp4_v_b_22') | |
// (17, 12, 'sp4_h_l_46') | |
// (17, 12, 'sp4_r_v_b_10') | |
// (17, 12, 'sp4_v_b_11') | |
// (18, 6, 'sp4_v_t_39') | |
// (18, 7, 'sp4_v_b_39') | |
// (18, 8, 'neigh_op_tnl_7') | |
// (18, 8, 'sp4_v_b_26') | |
// (18, 8, 'sp4_v_t_47') | |
// (18, 9, 'neigh_op_lft_7') | |
// (18, 9, 'sp4_v_b_15') | |
// (18, 9, 'sp4_v_b_47') | |
// (18, 10, 'neigh_op_bnl_7') | |
// (18, 10, 'sp4_h_l_39') | |
// (18, 10, 'sp4_v_b_2') | |
// (18, 10, 'sp4_v_b_34') | |
// (18, 11, 'sp4_v_b_23') | |
// (18, 12, 'sp4_h_r_4') | |
// (18, 12, 'sp4_v_b_10') | |
// (19, 12, 'local_g1_1') | |
// (19, 12, 'ram/WDATA_4') | |
// (19, 12, 'sp4_h_r_17') | |
// (20, 12, 'sp4_h_r_28') | |
// (21, 12, 'sp4_h_r_41') | |
// (22, 12, 'sp4_h_l_41') | |
wire n380; | |
// (13, 8, 'neigh_op_tnr_2') | |
// (13, 9, 'neigh_op_rgt_2') | |
// (13, 10, 'neigh_op_bnr_2') | |
// (14, 8, 'neigh_op_top_2') | |
// (14, 9, 'local_g3_2') | |
// (14, 9, 'lutff_2/out') | |
// (14, 9, 'lutff_3/in_2') | |
// (14, 10, 'neigh_op_bot_2') | |
// (15, 8, 'neigh_op_tnl_2') | |
// (15, 9, 'neigh_op_lft_2') | |
// (15, 10, 'neigh_op_bnl_2') | |
wire n381; | |
// (13, 8, 'neigh_op_tnr_3') | |
// (13, 9, 'neigh_op_rgt_3') | |
// (13, 9, 'sp4_r_v_b_38') | |
// (13, 10, 'neigh_op_bnr_3') | |
// (13, 10, 'sp4_r_v_b_27') | |
// (13, 11, 'sp4_r_v_b_14') | |
// (13, 12, 'sp4_r_v_b_3') | |
// (14, 8, 'neigh_op_top_3') | |
// (14, 8, 'sp4_v_t_38') | |
// (14, 9, 'lutff_3/out') | |
// (14, 9, 'sp4_v_b_38') | |
// (14, 10, 'neigh_op_bot_3') | |
// (14, 10, 'sp4_v_b_27') | |
// (14, 11, 'local_g1_6') | |
// (14, 11, 'lutff_1/in_0') | |
// (14, 11, 'sp4_v_b_14') | |
// (14, 12, 'sp4_v_b_3') | |
// (15, 8, 'neigh_op_tnl_3') | |
// (15, 9, 'neigh_op_lft_3') | |
// (15, 10, 'neigh_op_bnl_3') | |
wire n382; | |
// (13, 8, 'neigh_op_tnr_6') | |
// (13, 9, 'neigh_op_rgt_6') | |
// (13, 10, 'neigh_op_bnr_6') | |
// (14, 8, 'neigh_op_top_6') | |
// (14, 9, 'local_g2_6') | |
// (14, 9, 'lutff_3/in_3') | |
// (14, 9, 'lutff_6/out') | |
// (14, 10, 'neigh_op_bot_6') | |
// (15, 8, 'neigh_op_tnl_6') | |
// (15, 9, 'neigh_op_lft_6') | |
// (15, 10, 'neigh_op_bnl_6') | |
wire n383; | |
// (13, 8, 'neigh_op_tnr_7') | |
// (13, 9, 'neigh_op_rgt_7') | |
// (13, 10, 'neigh_op_bnr_7') | |
// (14, 8, 'neigh_op_top_7') | |
// (14, 9, 'local_g1_7') | |
// (14, 9, 'lutff_3/in_1') | |
// (14, 9, 'lutff_7/out') | |
// (14, 10, 'neigh_op_bot_7') | |
// (15, 8, 'neigh_op_tnl_7') | |
// (15, 9, 'neigh_op_lft_7') | |
// (15, 10, 'neigh_op_bnl_7') | |
wire n384; | |
// (13, 8, 'sp4_r_v_b_42') | |
// (13, 9, 'neigh_op_tnr_1') | |
// (13, 9, 'sp4_r_v_b_31') | |
// (13, 9, 'sp4_r_v_b_47') | |
// (13, 10, 'local_g3_1') | |
// (13, 10, 'lutff_7/in_1') | |
// (13, 10, 'neigh_op_rgt_1') | |
// (13, 10, 'sp4_h_r_7') | |
// (13, 10, 'sp4_r_v_b_18') | |
// (13, 10, 'sp4_r_v_b_34') | |
// (13, 11, 'neigh_op_bnr_1') | |
// (13, 11, 'sp4_r_v_b_23') | |
// (13, 11, 'sp4_r_v_b_7') | |
// (13, 12, 'sp4_r_v_b_10') | |
// (14, 7, 'sp4_v_t_42') | |
// (14, 8, 'sp4_v_b_42') | |
// (14, 8, 'sp4_v_t_47') | |
// (14, 9, 'neigh_op_top_1') | |
// (14, 9, 'sp4_v_b_31') | |
// (14, 9, 'sp4_v_b_47') | |
// (14, 10, 'lutff_1/out') | |
// (14, 10, 'sp4_h_r_18') | |
// (14, 10, 'sp4_v_b_18') | |
// (14, 10, 'sp4_v_b_34') | |
// (14, 11, 'neigh_op_bot_1') | |
// (14, 11, 'sp4_h_r_1') | |
// (14, 11, 'sp4_v_b_23') | |
// (14, 11, 'sp4_v_b_7') | |
// (14, 12, 'sp4_h_r_10') | |
// (14, 12, 'sp4_v_b_10') | |
// (15, 9, 'neigh_op_tnl_1') | |
// (15, 10, 'neigh_op_lft_1') | |
// (15, 10, 'sp4_h_r_31') | |
// (15, 11, 'neigh_op_bnl_1') | |
// (15, 11, 'sp4_h_r_12') | |
// (15, 12, 'sp4_h_r_23') | |
// (16, 10, 'sp4_h_r_42') | |
// (16, 11, 'sp4_h_r_25') | |
// (16, 12, 'sp4_h_r_34') | |
// (17, 10, 'sp4_h_l_42') | |
// (17, 10, 'sp4_h_r_3') | |
// (17, 10, 'sp4_h_r_7') | |
// (17, 11, 'sp4_h_r_36') | |
// (17, 12, 'sp4_h_r_47') | |
// (18, 10, 'sp4_h_r_14') | |
// (18, 10, 'sp4_h_r_18') | |
// (18, 11, 'sp4_h_l_36') | |
// (18, 11, 'sp4_h_r_4') | |
// (18, 12, 'sp4_h_l_47') | |
// (18, 12, 'sp4_h_r_1') | |
// (19, 10, 'local_g3_3') | |
// (19, 10, 'ram/WDATA_6') | |
// (19, 10, 'sp4_h_r_27') | |
// (19, 10, 'sp4_h_r_31') | |
// (19, 11, 'local_g0_1') | |
// (19, 11, 'ram/RADDR_6') | |
// (19, 11, 'sp4_h_r_17') | |
// (19, 12, 'local_g1_4') | |
// (19, 12, 'ram/WADDR_6') | |
// (19, 12, 'sp4_h_r_12') | |
// (20, 7, 'sp4_r_v_b_36') | |
// (20, 8, 'sp4_r_v_b_25') | |
// (20, 9, 'local_g2_4') | |
// (20, 9, 'lutff_2/in_2') | |
// (20, 9, 'sp4_r_v_b_12') | |
// (20, 10, 'sp4_h_r_38') | |
// (20, 10, 'sp4_h_r_42') | |
// (20, 10, 'sp4_r_v_b_1') | |
// (20, 11, 'sp4_h_r_28') | |
// (20, 12, 'sp4_h_r_25') | |
// (21, 6, 'sp4_v_t_36') | |
// (21, 7, 'sp4_v_b_36') | |
// (21, 8, 'sp4_v_b_25') | |
// (21, 9, 'sp4_v_b_12') | |
// (21, 10, 'sp4_h_l_38') | |
// (21, 10, 'sp4_h_l_42') | |
// (21, 10, 'sp4_v_b_1') | |
// (21, 11, 'sp4_h_r_41') | |
// (21, 12, 'sp4_h_r_36') | |
// (22, 11, 'sp4_h_l_41') | |
// (22, 12, 'sp4_h_l_36') | |
wire n385; | |
// (13, 9, 'neigh_op_tnr_2') | |
// (13, 10, 'neigh_op_rgt_2') | |
// (13, 10, 'sp4_h_r_9') | |
// (13, 11, 'local_g1_2') | |
// (13, 11, 'lutff_5/in_2') | |
// (13, 11, 'neigh_op_bnr_2') | |
// (14, 9, 'neigh_op_top_2') | |
// (14, 10, 'lutff_2/out') | |
// (14, 10, 'sp4_h_r_20') | |
// (14, 10, 'sp4_h_r_4') | |
// (14, 10, 'sp4_r_v_b_37') | |
// (14, 11, 'neigh_op_bot_2') | |
// (14, 11, 'sp4_r_v_b_24') | |
// (14, 12, 'sp4_r_v_b_13') | |
// (14, 13, 'sp4_r_v_b_0') | |
// (15, 9, 'neigh_op_tnl_2') | |
// (15, 9, 'sp4_h_r_5') | |
// (15, 9, 'sp4_v_t_37') | |
// (15, 10, 'neigh_op_lft_2') | |
// (15, 10, 'sp4_h_r_17') | |
// (15, 10, 'sp4_h_r_33') | |
// (15, 10, 'sp4_v_b_37') | |
// (15, 11, 'neigh_op_bnl_2') | |
// (15, 11, 'sp4_v_b_24') | |
// (15, 12, 'sp4_v_b_13') | |
// (15, 13, 'sp4_v_b_0') | |
// (16, 9, 'sp4_h_r_16') | |
// (16, 10, 'sp4_h_r_28') | |
// (16, 10, 'sp4_h_r_44') | |
// (17, 9, 'sp4_h_r_29') | |
// (17, 10, 'sp4_h_l_44') | |
// (17, 10, 'sp4_h_r_41') | |
// (17, 10, 'sp4_h_r_5') | |
// (18, 9, 'sp4_h_r_40') | |
// (18, 10, 'local_g0_7') | |
// (18, 10, 'lutff_1/in_0') | |
// (18, 10, 'sp4_h_l_41') | |
// (18, 10, 'sp4_h_r_16') | |
// (18, 10, 'sp4_h_r_7') | |
// (19, 9, 'local_g1_1') | |
// (19, 9, 'ram/WDATA_12') | |
// (19, 9, 'sp4_h_l_40') | |
// (19, 9, 'sp4_h_r_1') | |
// (19, 10, 'sp4_h_r_18') | |
// (19, 10, 'sp4_h_r_29') | |
// (20, 9, 'sp4_h_r_12') | |
// (20, 10, 'sp4_h_r_31') | |
// (20, 10, 'sp4_h_r_40') | |
// (20, 11, 'sp4_r_v_b_40') | |
// (20, 12, 'local_g1_5') | |
// (20, 12, 'lutff_2/in_2') | |
// (20, 12, 'sp4_r_v_b_29') | |
// (20, 13, 'sp4_r_v_b_16') | |
// (20, 14, 'sp4_r_v_b_5') | |
// (21, 9, 'sp4_h_r_25') | |
// (21, 10, 'sp4_h_l_40') | |
// (21, 10, 'sp4_h_r_42') | |
// (21, 10, 'sp4_v_t_40') | |
// (21, 11, 'sp4_v_b_40') | |
// (21, 12, 'sp4_v_b_29') | |
// (21, 13, 'sp4_v_b_16') | |
// (21, 14, 'sp4_v_b_5') | |
// (22, 9, 'sp4_h_r_36') | |
// (22, 10, 'sp4_h_l_42') | |
// (23, 9, 'sp4_h_l_36') | |
wire n386; | |
// (13, 9, 'neigh_op_tnr_4') | |
// (13, 10, 'neigh_op_rgt_4') | |
// (13, 11, 'neigh_op_bnr_4') | |
// (14, 9, 'neigh_op_top_4') | |
// (14, 10, 'lutff_4/out') | |
// (14, 11, 'neigh_op_bot_4') | |
// (15, 9, 'neigh_op_tnl_4') | |
// (15, 10, 'neigh_op_lft_4') | |
// (15, 11, 'local_g3_4') | |
// (15, 11, 'lutff_5/in_0') | |
// (15, 11, 'neigh_op_bnl_4') | |
wire n387; | |
// (13, 9, 'neigh_op_tnr_5') | |
// (13, 10, 'neigh_op_rgt_5') | |
// (13, 11, 'local_g0_5') | |
// (13, 11, 'lutff_1/in_2') | |
// (13, 11, 'neigh_op_bnr_5') | |
// (14, 7, 'sp4_r_v_b_46') | |
// (14, 8, 'sp4_r_v_b_35') | |
// (14, 9, 'neigh_op_top_5') | |
// (14, 9, 'sp4_r_v_b_22') | |
// (14, 9, 'sp4_r_v_b_38') | |
// (14, 10, 'lutff_5/out') | |
// (14, 10, 'sp4_h_r_10') | |
// (14, 10, 'sp4_r_v_b_11') | |
// (14, 10, 'sp4_r_v_b_27') | |
// (14, 11, 'neigh_op_bot_5') | |
// (14, 11, 'sp4_r_v_b_14') | |
// (14, 12, 'sp4_r_v_b_3') | |
// (15, 6, 'sp4_v_t_46') | |
// (15, 7, 'sp4_v_b_46') | |
// (15, 8, 'sp4_v_b_35') | |
// (15, 8, 'sp4_v_t_38') | |
// (15, 9, 'neigh_op_tnl_5') | |
// (15, 9, 'sp4_v_b_22') | |
// (15, 9, 'sp4_v_b_38') | |
// (15, 10, 'neigh_op_lft_5') | |
// (15, 10, 'sp4_h_r_11') | |
// (15, 10, 'sp4_h_r_23') | |
// (15, 10, 'sp4_v_b_11') | |
// (15, 10, 'sp4_v_b_27') | |
// (15, 11, 'neigh_op_bnl_5') | |
// (15, 11, 'sp4_v_b_14') | |
// (15, 12, 'sp4_h_r_9') | |
// (15, 12, 'sp4_v_b_3') | |
// (16, 10, 'sp4_h_r_22') | |
// (16, 10, 'sp4_h_r_34') | |
// (16, 12, 'sp4_h_r_20') | |
// (17, 10, 'sp4_h_r_35') | |
// (17, 10, 'sp4_h_r_47') | |
// (17, 11, 'sp4_r_v_b_38') | |
// (17, 12, 'sp4_h_r_33') | |
// (17, 12, 'sp4_r_v_b_27') | |
// (17, 13, 'sp4_r_v_b_14') | |
// (17, 14, 'sp4_r_v_b_3') | |
// (18, 7, 'sp4_r_v_b_40') | |
// (18, 8, 'sp4_r_v_b_29') | |
// (18, 9, 'sp4_r_v_b_16') | |
// (18, 10, 'sp4_h_l_47') | |
// (18, 10, 'sp4_h_r_46') | |
// (18, 10, 'sp4_r_v_b_5') | |
// (18, 10, 'sp4_v_t_38') | |
// (18, 11, 'sp4_v_b_38') | |
// (18, 12, 'local_g3_3') | |
// (18, 12, 'lutff_2/in_2') | |
// (18, 12, 'sp4_h_r_44') | |
// (18, 12, 'sp4_v_b_27') | |
// (18, 13, 'sp4_v_b_14') | |
// (18, 14, 'sp4_v_b_3') | |
// (19, 6, 'sp4_v_t_40') | |
// (19, 7, 'sp4_v_b_40') | |
// (19, 8, 'sp4_v_b_29') | |
// (19, 9, 'local_g0_0') | |
// (19, 9, 'ram/WDATA_8') | |
// (19, 9, 'sp4_v_b_16') | |
// (19, 10, 'sp4_h_l_46') | |
// (19, 10, 'sp4_v_b_5') | |
// (19, 12, 'sp4_h_l_44') | |
// (19, 12, 'sp4_h_r_0') | |
// (20, 12, 'local_g0_5') | |
// (20, 12, 'lutff_3/in_0') | |
// (20, 12, 'sp4_h_r_13') | |
// (21, 12, 'sp4_h_r_24') | |
// (22, 12, 'sp4_h_r_37') | |
// (23, 12, 'sp4_h_l_37') | |
wire n388; | |
// (13, 9, 'neigh_op_tnr_7') | |
// (13, 10, 'neigh_op_rgt_7') | |
// (13, 11, 'neigh_op_bnr_7') | |
// (14, 9, 'neigh_op_top_7') | |
// (14, 10, 'lutff_7/out') | |
// (14, 11, 'local_g1_7') | |
// (14, 11, 'lutff_2/in_2') | |
// (14, 11, 'neigh_op_bot_7') | |
// (15, 9, 'neigh_op_tnl_7') | |
// (15, 10, 'neigh_op_lft_7') | |
// (15, 11, 'neigh_op_bnl_7') | |
wire n389; | |
// (13, 9, 'sp4_h_r_1') | |
// (14, 9, 'local_g0_4') | |
// (14, 9, 'lutff_5/in_1') | |
// (14, 9, 'sp4_h_r_12') | |
// (14, 11, 'local_g0_0') | |
// (14, 11, 'lutff_6/in_0') | |
// (14, 11, 'sp4_h_r_8') | |
// (15, 9, 'sp4_h_r_25') | |
// (15, 11, 'sp4_h_r_21') | |
// (16, 9, 'sp4_h_r_36') | |
// (16, 11, 'sp4_h_r_32') | |
// (17, 8, 'neigh_op_tnr_0') | |
// (17, 8, 'sp4_r_v_b_45') | |
// (17, 9, 'neigh_op_rgt_0') | |
// (17, 9, 'sp4_h_l_36') | |
// (17, 9, 'sp4_h_r_5') | |
// (17, 9, 'sp4_r_v_b_32') | |
// (17, 10, 'neigh_op_bnr_0') | |
// (17, 10, 'sp4_r_v_b_21') | |
// (17, 11, 'sp4_h_r_45') | |
// (17, 11, 'sp4_r_v_b_8') | |
// (18, 7, 'sp4_r_v_b_41') | |
// (18, 7, 'sp4_v_t_45') | |
// (18, 8, 'neigh_op_top_0') | |
// (18, 8, 'sp4_r_v_b_28') | |
// (18, 8, 'sp4_r_v_b_44') | |
// (18, 8, 'sp4_v_b_45') | |
// (18, 9, 'lutff_0/out') | |
// (18, 9, 'sp4_h_r_16') | |
// (18, 9, 'sp4_r_v_b_17') | |
// (18, 9, 'sp4_r_v_b_33') | |
// (18, 9, 'sp4_v_b_32') | |
// (18, 10, 'neigh_op_bot_0') | |
// (18, 10, 'sp4_r_v_b_20') | |
// (18, 10, 'sp4_r_v_b_4') | |
// (18, 10, 'sp4_v_b_21') | |
// (18, 11, 'local_g2_1') | |
// (18, 11, 'lutff_3/in_2') | |
// (18, 11, 'sp4_h_l_45') | |
// (18, 11, 'sp4_r_v_b_41') | |
// (18, 11, 'sp4_r_v_b_9') | |
// (18, 11, 'sp4_v_b_8') | |
// (18, 12, 'sp4_r_v_b_28') | |
// (18, 13, 'sp4_r_v_b_17') | |
// (18, 14, 'sp4_r_v_b_4') | |
// (19, 6, 'sp4_v_t_41') | |
// (19, 7, 'sp4_v_b_41') | |
// (19, 7, 'sp4_v_t_44') | |
// (19, 8, 'neigh_op_tnl_0') | |
// (19, 8, 'sp4_v_b_28') | |
// (19, 8, 'sp4_v_b_44') | |
// (19, 9, 'neigh_op_lft_0') | |
// (19, 9, 'sp4_h_r_29') | |
// (19, 9, 'sp4_v_b_17') | |
// (19, 9, 'sp4_v_b_33') | |
// (19, 10, 'neigh_op_bnl_0') | |
// (19, 10, 'sp4_v_b_20') | |
// (19, 10, 'sp4_v_b_4') | |
// (19, 10, 'sp4_v_t_41') | |
// (19, 11, 'sp4_v_b_41') | |
// (19, 11, 'sp4_v_b_9') | |
// (19, 12, 'local_g2_4') | |
// (19, 12, 'ram/WDATA_6') | |
// (19, 12, 'sp4_v_b_28') | |
// (19, 13, 'sp4_v_b_17') | |
// (19, 14, 'sp4_v_b_4') | |
// (20, 9, 'sp4_h_r_40') | |
// (21, 9, 'sp4_h_l_40') | |
wire n390; | |
// (13, 9, 'sp4_r_v_b_46') | |
// (13, 10, 'sp4_r_v_b_35') | |
// (13, 11, 'local_g3_6') | |
// (13, 11, 'lutff_4/in_1') | |
// (13, 11, 'sp4_r_v_b_22') | |
// (13, 12, 'sp4_r_v_b_11') | |
// (14, 8, 'sp4_v_t_46') | |
// (14, 9, 'sp4_v_b_46') | |
// (14, 10, 'sp4_v_b_35') | |
// (14, 11, 'sp4_v_b_22') | |
// (14, 12, 'sp4_h_r_6') | |
// (14, 12, 'sp4_v_b_11') | |
// (15, 11, 'neigh_op_tnr_7') | |
// (15, 12, 'neigh_op_rgt_7') | |
// (15, 12, 'sp4_h_r_19') | |
// (15, 13, 'neigh_op_bnr_7') | |
// (16, 10, 'sp4_r_v_b_39') | |
// (16, 11, 'neigh_op_top_7') | |
// (16, 11, 'sp4_r_v_b_26') | |
// (16, 12, 'lutff_7/out') | |
// (16, 12, 'sp4_h_r_30') | |
// (16, 12, 'sp4_r_v_b_15') | |
// (16, 13, 'neigh_op_bot_7') | |
// (16, 13, 'sp4_r_v_b_2') | |
// (17, 9, 'sp4_h_r_2') | |
// (17, 9, 'sp4_r_v_b_43') | |
// (17, 9, 'sp4_v_t_39') | |
// (17, 10, 'sp4_r_v_b_30') | |
// (17, 10, 'sp4_v_b_39') | |
// (17, 11, 'neigh_op_tnl_7') | |
// (17, 11, 'sp4_r_v_b_19') | |
// (17, 11, 'sp4_v_b_26') | |
// (17, 12, 'neigh_op_lft_7') | |
// (17, 12, 'sp4_h_r_43') | |
// (17, 12, 'sp4_r_v_b_6') | |
// (17, 12, 'sp4_v_b_15') | |
// (17, 13, 'neigh_op_bnl_7') | |
// (17, 13, 'sp4_v_b_2') | |
// (18, 8, 'sp4_v_t_43') | |
// (18, 9, 'sp4_h_r_15') | |
// (18, 9, 'sp4_v_b_43') | |
// (18, 10, 'local_g2_6') | |
// (18, 10, 'lutff_3/in_1') | |
// (18, 10, 'sp4_v_b_30') | |
// (18, 11, 'sp4_v_b_19') | |
// (18, 12, 'sp4_h_l_43') | |
// (18, 12, 'sp4_h_r_9') | |
// (18, 12, 'sp4_v_b_6') | |
// (19, 9, 'local_g3_2') | |
// (19, 9, 'ram/WDATA_11') | |
// (19, 9, 'sp4_h_r_26') | |
// (19, 12, 'sp4_h_r_20') | |
// (20, 9, 'sp4_h_r_39') | |
// (20, 12, 'local_g3_1') | |
// (20, 12, 'lutff_4/in_2') | |
// (20, 12, 'sp4_h_r_33') | |
// (21, 9, 'sp4_h_l_39') | |
// (21, 12, 'sp4_h_r_44') | |
// (22, 12, 'sp4_h_l_44') | |
wire n391; | |
// (13, 10, 'local_g0_2') | |
// (13, 10, 'lutff_3/in_1') | |
// (13, 10, 'sp4_h_r_10') | |
// (14, 9, 'neigh_op_tnr_1') | |
// (14, 10, 'neigh_op_rgt_1') | |
// (14, 10, 'sp4_h_r_23') | |
// (14, 11, 'neigh_op_bnr_1') | |
// (15, 9, 'neigh_op_top_1') | |
// (15, 10, 'lutff_1/out') | |
// (15, 10, 'sp4_h_r_2') | |
// (15, 10, 'sp4_h_r_34') | |
// (15, 11, 'neigh_op_bot_1') | |
// (16, 7, 'sp4_r_v_b_41') | |
// (16, 8, 'sp4_r_v_b_28') | |
// (16, 9, 'neigh_op_tnl_1') | |
// (16, 9, 'sp4_r_v_b_17') | |
// (16, 10, 'neigh_op_lft_1') | |
// (16, 10, 'sp4_h_r_15') | |
// (16, 10, 'sp4_h_r_47') | |
// (16, 10, 'sp4_r_v_b_4') | |
// (16, 11, 'neigh_op_bnl_1') | |
// (17, 6, 'sp4_v_t_41') | |
// (17, 7, 'sp4_v_b_41') | |
// (17, 8, 'sp4_v_b_28') | |
// (17, 9, 'local_g0_1') | |
// (17, 9, 'lutff_3/in_0') | |
// (17, 9, 'sp4_v_b_17') | |
// (17, 10, 'sp4_h_l_47') | |
// (17, 10, 'sp4_h_r_26') | |
// (17, 10, 'sp4_v_b_4') | |
// (18, 10, 'sp4_h_r_39') | |
// (18, 11, 'sp4_r_v_b_39') | |
// (18, 11, 'sp4_r_v_b_42') | |
// (18, 12, 'sp4_r_v_b_26') | |
// (18, 12, 'sp4_r_v_b_31') | |
// (18, 13, 'sp4_r_v_b_15') | |
// (18, 13, 'sp4_r_v_b_18') | |
// (18, 14, 'sp4_r_v_b_2') | |
// (18, 14, 'sp4_r_v_b_7') | |
// (19, 10, 'local_g1_5') | |
// (19, 10, 'ram/WDATA_2') | |
// (19, 10, 'sp4_h_l_39') | |
// (19, 10, 'sp4_h_r_5') | |
// (19, 10, 'sp4_v_t_39') | |
// (19, 10, 'sp4_v_t_42') | |
// (19, 11, 'local_g3_2') | |
// (19, 11, 'ram/RADDR_2') | |
// (19, 11, 'sp4_v_b_39') | |
// (19, 11, 'sp4_v_b_42') | |
// (19, 12, 'local_g3_2') | |
// (19, 12, 'ram/WADDR_2') | |
// (19, 12, 'sp4_v_b_26') | |
// (19, 12, 'sp4_v_b_31') | |
// (19, 13, 'sp4_v_b_15') | |
// (19, 13, 'sp4_v_b_18') | |
// (19, 14, 'sp4_v_b_2') | |
// (19, 14, 'sp4_v_b_7') | |
// (20, 10, 'sp4_h_r_16') | |
// (21, 10, 'sp4_h_r_29') | |
// (22, 10, 'sp4_h_r_40') | |
// (23, 10, 'sp4_h_l_40') | |
wire n392; | |
// (13, 10, 'local_g3_7') | |
// (13, 10, 'lutff_4/in_2') | |
// (13, 10, 'neigh_op_tnr_7') | |
// (13, 11, 'neigh_op_rgt_7') | |
// (13, 11, 'sp4_h_r_3') | |
// (13, 12, 'neigh_op_bnr_7') | |
// (14, 10, 'neigh_op_top_7') | |
// (14, 11, 'lutff_7/out') | |
// (14, 11, 'sp4_h_r_14') | |
// (14, 11, 'sp4_r_v_b_47') | |
// (14, 12, 'neigh_op_bot_7') | |
// (14, 12, 'sp4_r_v_b_34') | |
// (14, 13, 'sp4_r_v_b_23') | |
// (14, 14, 'sp4_r_v_b_10') | |
// (15, 10, 'neigh_op_tnl_7') | |
// (15, 10, 'sp4_h_r_3') | |
// (15, 10, 'sp4_v_t_47') | |
// (15, 11, 'neigh_op_lft_7') | |
// (15, 11, 'sp4_h_r_27') | |
// (15, 11, 'sp4_v_b_47') | |
// (15, 12, 'neigh_op_bnl_7') | |
// (15, 12, 'sp4_v_b_34') | |
// (15, 13, 'sp4_v_b_23') | |
// (15, 14, 'sp4_v_b_10') | |
// (16, 8, 'sp4_r_v_b_38') | |
// (16, 9, 'sp4_r_v_b_27') | |
// (16, 10, 'sp4_h_r_14') | |
// (16, 10, 'sp4_r_v_b_14') | |
// (16, 11, 'sp4_h_r_38') | |
// (16, 11, 'sp4_r_v_b_3') | |
// (17, 7, 'sp4_v_t_38') | |
// (17, 8, 'sp4_v_b_38') | |
// (17, 9, 'sp4_v_b_27') | |
// (17, 10, 'local_g0_6') | |
// (17, 10, 'lutff_4/in_0') | |
// (17, 10, 'sp4_h_r_27') | |
// (17, 10, 'sp4_v_b_14') | |
// (17, 11, 'sp4_h_l_38') | |
// (17, 11, 'sp4_h_r_3') | |
// (17, 11, 'sp4_v_b_3') | |
// (18, 10, 'sp4_h_r_38') | |
// (18, 11, 'sp4_h_r_14') | |
// (18, 11, 'sp4_r_v_b_45') | |
// (18, 12, 'sp4_r_v_b_32') | |
// (18, 13, 'sp4_r_v_b_21') | |
// (18, 14, 'sp4_r_v_b_8') | |
// (19, 10, 'local_g1_6') | |
// (19, 10, 'ram/WDATA_3') | |
// (19, 10, 'sp4_h_l_38') | |
// (19, 10, 'sp4_h_r_6') | |
// (19, 10, 'sp4_v_t_45') | |
// (19, 11, 'local_g3_3') | |
// (19, 11, 'ram/RADDR_3') | |
// (19, 11, 'sp4_h_r_27') | |
// (19, 11, 'sp4_v_b_45') | |
// (19, 12, 'local_g2_0') | |
// (19, 12, 'ram/WADDR_3') | |
// (19, 12, 'sp4_v_b_32') | |
// (19, 13, 'sp4_v_b_21') | |
// (19, 14, 'sp4_v_b_8') | |
// (20, 10, 'sp4_h_r_19') | |
// (20, 11, 'sp4_h_r_38') | |
// (21, 10, 'sp4_h_r_30') | |
// (21, 11, 'sp4_h_l_38') | |
// (22, 10, 'sp4_h_r_43') | |
// (23, 10, 'sp4_h_l_43') | |
wire n393; | |
// (13, 10, 'lutff_1/cout') | |
// (13, 10, 'lutff_2/in_3') | |
wire n394; | |
// (13, 10, 'lutff_2/cout') | |
// (13, 10, 'lutff_3/in_3') | |
wire n395; | |
// (13, 10, 'lutff_3/cout') | |
// (13, 10, 'lutff_4/in_3') | |
wire n396; | |
// (13, 10, 'lutff_4/cout') | |
// (13, 10, 'lutff_5/in_3') | |
wire n397; | |
// (13, 10, 'lutff_5/cout') | |
// (13, 10, 'lutff_6/in_3') | |
wire n398; | |
// (13, 10, 'lutff_6/cout') | |
// (13, 10, 'lutff_7/in_3') | |
wire n399; | |
// (13, 10, 'lutff_7/cout') | |
// (13, 11, 'carry_in') | |
// (13, 11, 'carry_in_mux') | |
// (13, 11, 'lutff_0/in_3') | |
wire n400; | |
// (13, 10, 'neigh_op_tnr_0') | |
// (13, 10, 'sp4_r_v_b_45') | |
// (13, 11, 'neigh_op_rgt_0') | |
// (13, 11, 'sp4_r_v_b_32') | |
// (13, 12, 'neigh_op_bnr_0') | |
// (13, 12, 'sp4_r_v_b_21') | |
// (13, 13, 'sp4_r_v_b_8') | |
// (14, 9, 'sp4_v_t_45') | |
// (14, 10, 'neigh_op_top_0') | |
// (14, 10, 'sp4_v_b_45') | |
// (14, 11, 'lutff_0/out') | |
// (14, 11, 'sp4_v_b_32') | |
// (14, 12, 'neigh_op_bot_0') | |
// (14, 12, 'sp4_v_b_21') | |
// (14, 13, 'local_g1_0') | |
// (14, 13, 'lutff_0/in_1') | |
// (14, 13, 'sp4_v_b_8') | |
// (15, 10, 'neigh_op_tnl_0') | |
// (15, 11, 'neigh_op_lft_0') | |
// (15, 12, 'neigh_op_bnl_0') | |
reg n401 = 0; | |
// (13, 10, 'neigh_op_tnr_1') | |
// (13, 11, 'neigh_op_rgt_1') | |
// (13, 12, 'neigh_op_bnr_1') | |
// (14, 10, 'neigh_op_top_1') | |
// (14, 11, 'lutff_1/out') | |
// (14, 12, 'neigh_op_bot_1') | |
// (15, 10, 'local_g2_1') | |
// (15, 10, 'lutff_2/in_3') | |
// (15, 10, 'neigh_op_tnl_1') | |
// (15, 11, 'neigh_op_lft_1') | |
// (15, 12, 'neigh_op_bnl_1') | |
wire n402; | |
// (13, 10, 'neigh_op_tnr_2') | |
// (13, 11, 'neigh_op_rgt_2') | |
// (13, 12, 'neigh_op_bnr_2') | |
// (14, 10, 'neigh_op_top_2') | |
// (14, 11, 'local_g2_2') | |
// (14, 11, 'lutff_1/in_1') | |
// (14, 11, 'lutff_2/out') | |
// (14, 12, 'neigh_op_bot_2') | |
// (15, 10, 'neigh_op_tnl_2') | |
// (15, 11, 'neigh_op_lft_2') | |
// (15, 12, 'neigh_op_bnl_2') | |
wire n403; | |
// (13, 10, 'neigh_op_tnr_3') | |
// (13, 11, 'neigh_op_rgt_3') | |
// (13, 12, 'neigh_op_bnr_3') | |
// (14, 10, 'neigh_op_top_3') | |
// (14, 11, 'lutff_3/out') | |
// (14, 12, 'neigh_op_bot_3') | |
// (15, 10, 'neigh_op_tnl_3') | |
// (15, 11, 'neigh_op_lft_3') | |
// (15, 12, 'local_g2_3') | |
// (15, 12, 'lutff_0/in_1') | |
// (15, 12, 'neigh_op_bnl_3') | |
wire n404; | |
// (13, 10, 'neigh_op_tnr_6') | |
// (13, 11, 'neigh_op_rgt_6') | |
// (13, 12, 'neigh_op_bnr_6') | |
// (14, 10, 'neigh_op_top_6') | |
// (14, 11, 'local_g3_6') | |
// (14, 11, 'lutff_1/in_2') | |
// (14, 11, 'lutff_6/out') | |
// (14, 12, 'neigh_op_bot_6') | |
// (15, 10, 'neigh_op_tnl_6') | |
// (15, 11, 'neigh_op_lft_6') | |
// (15, 12, 'neigh_op_bnl_6') | |
wire n405; | |
// (13, 11, 'lutff_0/cout') | |
// (13, 11, 'lutff_1/in_3') | |
wire n406; | |
// (13, 11, 'lutff_1/cout') | |
// (13, 11, 'lutff_2/in_3') | |
wire n407; | |
// (13, 11, 'lutff_2/cout') | |
// (13, 11, 'lutff_3/in_3') | |
wire n408; | |
// (13, 11, 'lutff_3/cout') | |
// (13, 11, 'lutff_4/in_3') | |
wire n409; | |
// (13, 11, 'lutff_4/cout') | |
// (13, 11, 'lutff_5/in_3') | |
wire n410; | |
// (13, 11, 'lutff_5/cout') | |
// (13, 11, 'lutff_6/in_3') | |
wire n411; | |
// (13, 11, 'lutff_6/cout') | |
// (13, 11, 'lutff_7/in_3') | |
wire n412; | |
// (13, 11, 'lutff_7/cout') | |
// (13, 12, 'carry_in') | |
// (13, 12, 'carry_in_mux') | |
// (13, 12, 'lutff_0/in_3') | |
wire n413; | |
// (13, 11, 'neigh_op_tnr_0') | |
// (13, 12, 'neigh_op_rgt_0') | |
// (13, 13, 'neigh_op_bnr_0') | |
// (14, 11, 'neigh_op_top_0') | |
// (14, 12, 'local_g3_0') | |
// (14, 12, 'lutff_0/out') | |
// (14, 12, 'lutff_2/in_3') | |
// (14, 13, 'neigh_op_bot_0') | |
// (15, 11, 'neigh_op_tnl_0') | |
// (15, 12, 'neigh_op_lft_0') | |
// (15, 13, 'neigh_op_bnl_0') | |
wire n414; | |
// (13, 11, 'neigh_op_tnr_1') | |
// (13, 12, 'neigh_op_rgt_1') | |
// (13, 13, 'neigh_op_bnr_1') | |
// (14, 11, 'neigh_op_top_1') | |
// (14, 12, 'local_g1_1') | |
// (14, 12, 'lutff_1/out') | |
// (14, 12, 'lutff_7/in_3') | |
// (14, 13, 'neigh_op_bot_1') | |
// (15, 11, 'neigh_op_tnl_1') | |
// (15, 12, 'neigh_op_lft_1') | |
// (15, 13, 'neigh_op_bnl_1') | |
wire n415; | |
// (13, 11, 'neigh_op_tnr_2') | |
// (13, 12, 'neigh_op_rgt_2') | |
// (13, 13, 'neigh_op_bnr_2') | |
// (14, 9, 'sp4_r_v_b_40') | |
// (14, 10, 'sp4_r_v_b_29') | |
// (14, 11, 'neigh_op_top_2') | |
// (14, 11, 'sp4_r_v_b_16') | |
// (14, 12, 'lutff_2/out') | |
// (14, 12, 'sp4_r_v_b_5') | |
// (14, 13, 'neigh_op_bot_2') | |
// (15, 8, 'sp4_v_t_40') | |
// (15, 9, 'sp4_v_b_40') | |
// (15, 10, 'sp4_v_b_29') | |
// (15, 11, 'neigh_op_tnl_2') | |
// (15, 11, 'sp4_v_b_16') | |
// (15, 12, 'neigh_op_lft_2') | |
// (15, 12, 'sp4_h_r_5') | |
// (15, 12, 'sp4_v_b_5') | |
// (15, 13, 'neigh_op_bnl_2') | |
// (16, 12, 'local_g1_0') | |
// (16, 12, 'lutff_1/in_2') | |
// (16, 12, 'sp4_h_r_16') | |
// (17, 12, 'sp4_h_r_29') | |
// (18, 12, 'sp4_h_r_40') | |
// (19, 12, 'sp4_h_l_40') | |
wire n416; | |
// (13, 11, 'neigh_op_tnr_3') | |
// (13, 12, 'neigh_op_rgt_3') | |
// (13, 13, 'neigh_op_bnr_3') | |
// (14, 11, 'neigh_op_top_3') | |
// (14, 12, 'local_g0_3') | |
// (14, 12, 'lutff_2/in_1') | |
// (14, 12, 'lutff_3/out') | |
// (14, 13, 'neigh_op_bot_3') | |
// (15, 11, 'neigh_op_tnl_3') | |
// (15, 12, 'neigh_op_lft_3') | |
// (15, 13, 'neigh_op_bnl_3') | |
wire n417; | |
// (13, 11, 'neigh_op_tnr_4') | |
// (13, 12, 'neigh_op_rgt_4') | |
// (13, 13, 'neigh_op_bnr_4') | |
// (14, 11, 'neigh_op_top_4') | |
// (14, 12, 'local_g2_4') | |
// (14, 12, 'lutff_4/out') | |
// (14, 12, 'lutff_7/in_1') | |
// (14, 13, 'neigh_op_bot_4') | |
// (15, 11, 'neigh_op_tnl_4') | |
// (15, 12, 'neigh_op_lft_4') | |
// (15, 13, 'neigh_op_bnl_4') | |
wire n418; | |
// (13, 11, 'neigh_op_tnr_7') | |
// (13, 12, 'neigh_op_rgt_7') | |
// (13, 13, 'neigh_op_bnr_7') | |
// (14, 11, 'neigh_op_top_7') | |
// (14, 12, 'lutff_7/out') | |
// (14, 13, 'neigh_op_bot_7') | |
// (15, 11, 'neigh_op_tnl_7') | |
// (15, 12, 'local_g1_7') | |
// (15, 12, 'lutff_4/in_0') | |
// (15, 12, 'neigh_op_lft_7') | |
// (15, 13, 'neigh_op_bnl_7') | |
wire n419; | |
// (13, 11, 'sp4_r_v_b_42') | |
// (13, 12, 'sp4_r_v_b_31') | |
// (13, 13, 'sp4_r_v_b_18') | |
// (13, 14, 'sp4_r_v_b_7') | |
// (14, 10, 'sp4_h_r_7') | |
// (14, 10, 'sp4_v_t_42') | |
// (14, 11, 'sp4_v_b_42') | |
// (14, 12, 'local_g2_7') | |
// (14, 12, 'lutff_5/in_0') | |
// (14, 12, 'sp4_v_b_31') | |
// (14, 13, 'sp4_v_b_18') | |
// (14, 14, 'sp4_v_b_7') | |
// (15, 10, 'sp4_h_r_18') | |
// (16, 10, 'sp4_h_r_31') | |
// (17, 10, 'sp4_h_r_42') | |
// (17, 12, 'local_g0_2') | |
// (17, 12, 'lutff_7/in_3') | |
// (17, 12, 'sp4_h_r_10') | |
// (18, 10, 'sp4_h_l_42') | |
// (18, 10, 'sp4_h_r_4') | |
// (18, 12, 'sp4_h_r_23') | |
// (19, 9, 'neigh_op_tnr_6') | |
// (19, 10, 'neigh_op_rgt_6') | |
// (19, 10, 'sp4_h_r_17') | |
// (19, 11, 'local_g1_6') | |
// (19, 11, 'neigh_op_bnr_6') | |
// (19, 11, 'ram/WDATA_15') | |
// (19, 12, 'sp4_h_r_34') | |
// (20, 9, 'neigh_op_top_6') | |
// (20, 9, 'sp4_r_v_b_40') | |
// (20, 10, 'lutff_6/out') | |
// (20, 10, 'sp4_h_r_28') | |
// (20, 10, 'sp4_r_v_b_29') | |
// (20, 11, 'neigh_op_bot_6') | |
// (20, 11, 'sp4_r_v_b_16') | |
// (20, 12, 'sp4_h_r_47') | |
// (20, 12, 'sp4_r_v_b_5') | |
// (21, 8, 'sp4_v_t_40') | |
// (21, 9, 'neigh_op_tnl_6') | |
// (21, 9, 'sp4_v_b_40') | |
// (21, 10, 'neigh_op_lft_6') | |
// (21, 10, 'sp4_h_r_41') | |
// (21, 10, 'sp4_v_b_29') | |
// (21, 11, 'local_g3_6') | |
// (21, 11, 'lutff_7/in_0') | |
// (21, 11, 'neigh_op_bnl_6') | |
// (21, 11, 'sp4_v_b_16') | |
// (21, 12, 'sp4_h_l_47') | |
// (21, 12, 'sp4_v_b_5') | |
// (22, 10, 'sp4_h_l_41') | |
wire n420; | |
// (13, 11, 'sp4_r_v_b_47') | |
// (13, 12, 'sp4_r_v_b_34') | |
// (13, 13, 'neigh_op_tnr_5') | |
// (13, 13, 'sp4_r_v_b_23') | |
// (13, 14, 'neigh_op_rgt_5') | |
// (13, 14, 'sp4_r_v_b_10') | |
// (13, 15, 'neigh_op_bnr_5') | |
// (14, 10, 'sp4_v_t_47') | |
// (14, 11, 'local_g2_7') | |
// (14, 11, 'lutff_6/in_1') | |
// (14, 11, 'sp4_v_b_47') | |
// (14, 12, 'sp4_v_b_34') | |
// (14, 13, 'neigh_op_top_5') | |
// (14, 13, 'sp4_v_b_23') | |
// (14, 14, 'lutff_5/out') | |
// (14, 14, 'sp4_v_b_10') | |
// (14, 15, 'neigh_op_bot_5') | |
// (15, 13, 'neigh_op_tnl_5') | |
// (15, 14, 'neigh_op_lft_5') | |
// (15, 15, 'neigh_op_bnl_5') | |
wire n421; | |
// (13, 12, 'neigh_op_tnr_0') | |
// (13, 13, 'neigh_op_rgt_0') | |
// (13, 14, 'neigh_op_bnr_0') | |
// (14, 12, 'neigh_op_top_0') | |
// (14, 13, 'lutff_0/out') | |
// (14, 13, 'sp4_h_r_0') | |
// (14, 14, 'neigh_op_bot_0') | |
// (15, 12, 'neigh_op_tnl_0') | |
// (15, 13, 'neigh_op_lft_0') | |
// (15, 13, 'sp4_h_r_13') | |
// (15, 14, 'neigh_op_bnl_0') | |
// (16, 13, 'local_g3_0') | |
// (16, 13, 'lutff_1/in_0') | |
// (16, 13, 'sp4_h_r_24') | |
// (17, 13, 'sp4_h_r_37') | |
// (18, 13, 'sp4_h_l_37') | |
reg n422 = 0; | |
// (13, 12, 'neigh_op_tnr_1') | |
// (13, 13, 'neigh_op_rgt_1') | |
// (13, 14, 'neigh_op_bnr_1') | |
// (14, 12, 'neigh_op_top_1') | |
// (14, 13, 'lutff_1/out') | |
// (14, 14, 'neigh_op_bot_1') | |
// (15, 12, 'neigh_op_tnl_1') | |
// (15, 13, 'local_g0_1') | |
// (15, 13, 'lutff_5/in_0') | |
// (15, 13, 'neigh_op_lft_1') | |
// (15, 14, 'neigh_op_bnl_1') | |
wire n423; | |
// (13, 12, 'neigh_op_tnr_2') | |
// (13, 13, 'neigh_op_rgt_2') | |
// (13, 14, 'neigh_op_bnr_2') | |
// (14, 12, 'neigh_op_top_2') | |
// (14, 13, 'lutff_2/out') | |
// (14, 14, 'local_g1_2') | |
// (14, 14, 'lutff_2/in_1') | |
// (14, 14, 'lutff_3/in_2') | |
// (14, 14, 'neigh_op_bot_2') | |
// (15, 12, 'neigh_op_tnl_2') | |
// (15, 13, 'neigh_op_lft_2') | |
// (15, 14, 'neigh_op_bnl_2') | |
wire n424; | |
// (13, 12, 'neigh_op_tnr_3') | |
// (13, 13, 'neigh_op_rgt_3') | |
// (13, 14, 'neigh_op_bnr_3') | |
// (14, 12, 'neigh_op_top_3') | |
// (14, 13, 'local_g3_3') | |
// (14, 13, 'lutff_3/out') | |
// (14, 13, 'lutff_4/in_0') | |
// (14, 14, 'neigh_op_bot_3') | |
// (15, 12, 'neigh_op_tnl_3') | |
// (15, 13, 'neigh_op_lft_3') | |
// (15, 14, 'neigh_op_bnl_3') | |
wire n425; | |
// (13, 12, 'neigh_op_tnr_5') | |
// (13, 13, 'neigh_op_rgt_5') | |
// (13, 14, 'neigh_op_bnr_5') | |
// (14, 12, 'neigh_op_top_5') | |
// (14, 13, 'local_g0_5') | |
// (14, 13, 'lutff_4/in_1') | |
// (14, 13, 'lutff_5/out') | |
// (14, 14, 'neigh_op_bot_5') | |
// (15, 12, 'neigh_op_tnl_5') | |
// (15, 13, 'neigh_op_lft_5') | |
// (15, 14, 'neigh_op_bnl_5') | |
wire n426; | |
// (13, 12, 'neigh_op_tnr_6') | |
// (13, 13, 'neigh_op_rgt_6') | |
// (13, 14, 'neigh_op_bnr_6') | |
// (14, 12, 'neigh_op_top_6') | |
// (14, 13, 'local_g3_6') | |
// (14, 13, 'lutff_1/in_2') | |
// (14, 13, 'lutff_6/out') | |
// (14, 14, 'neigh_op_bot_6') | |
// (15, 12, 'neigh_op_tnl_6') | |
// (15, 13, 'neigh_op_lft_6') | |
// (15, 14, 'neigh_op_bnl_6') | |
wire n427; | |
// (13, 13, 'local_g1_2') | |
// (13, 13, 'lutff_5/in_0') | |
// (13, 13, 'sp4_h_r_10') | |
// (14, 12, 'neigh_op_tnr_1') | |
// (14, 13, 'neigh_op_rgt_1') | |
// (14, 13, 'sp4_h_r_23') | |
// (14, 14, 'neigh_op_bnr_1') | |
// (15, 12, 'neigh_op_top_1') | |
// (15, 13, 'lutff_1/out') | |
// (15, 13, 'sp4_h_r_34') | |
// (15, 14, 'neigh_op_bot_1') | |
// (16, 12, 'neigh_op_tnl_1') | |
// (16, 13, 'neigh_op_lft_1') | |
// (16, 13, 'sp4_h_r_47') | |
// (16, 14, 'neigh_op_bnl_1') | |
// (17, 13, 'sp4_h_l_47') | |
wire n428; | |
// (13, 13, 'neigh_op_tnr_0') | |
// (13, 14, 'neigh_op_rgt_0') | |
// (13, 15, 'neigh_op_bnr_0') | |
// (14, 13, 'neigh_op_top_0') | |
// (14, 13, 'sp4_r_v_b_44') | |
// (14, 14, 'lutff_0/out') | |
// (14, 14, 'sp4_h_r_0') | |
// (14, 14, 'sp4_r_v_b_33') | |
// (14, 15, 'neigh_op_bot_0') | |
// (14, 15, 'sp4_r_v_b_20') | |
// (14, 16, 'sp4_r_v_b_9') | |
// (15, 12, 'sp4_v_t_44') | |
// (15, 13, 'neigh_op_tnl_0') | |
// (15, 13, 'sp4_v_b_44') | |
// (15, 14, 'neigh_op_lft_0') | |
// (15, 14, 'sp4_h_r_13') | |
// (15, 14, 'sp4_v_b_33') | |
// (15, 15, 'neigh_op_bnl_0') | |
// (15, 15, 'sp4_v_b_20') | |
// (15, 16, 'sp4_h_r_3') | |
// (15, 16, 'sp4_v_b_9') | |
// (16, 14, 'sp4_h_r_24') | |
// (16, 16, 'sp4_h_r_14') | |
// (17, 14, 'sp4_h_r_37') | |
// (17, 16, 'sp4_h_r_27') | |
// (18, 14, 'sp4_h_l_37') | |
// (18, 14, 'sp4_h_r_8') | |
// (18, 16, 'sp4_h_r_38') | |
// (19, 14, 'sp4_h_r_21') | |
// (19, 16, 'local_g1_3') | |
// (19, 16, 'ram/WDATA_0') | |
// (19, 16, 'sp4_h_l_38') | |
// (19, 16, 'sp4_h_r_11') | |
// (20, 14, 'local_g3_0') | |
// (20, 14, 'lutff_4/in_1') | |
// (20, 14, 'sp4_h_r_32') | |
// (20, 16, 'sp4_h_r_22') | |
// (21, 14, 'sp4_h_r_45') | |
// (21, 16, 'sp4_h_r_35') | |
// (22, 14, 'sp4_h_l_45') | |
// (22, 16, 'sp4_h_r_46') | |
// (23, 16, 'sp4_h_l_46') | |
wire n429; | |
// (13, 13, 'neigh_op_tnr_4') | |
// (13, 14, 'neigh_op_rgt_4') | |
// (13, 15, 'neigh_op_bnr_4') | |
// (14, 13, 'local_g0_4') | |
// (14, 13, 'lutff_4/in_2') | |
// (14, 13, 'neigh_op_top_4') | |
// (14, 14, 'local_g0_4') | |
// (14, 14, 'lutff_3/in_3') | |
// (14, 14, 'lutff_4/out') | |
// (14, 15, 'neigh_op_bot_4') | |
// (15, 13, 'neigh_op_tnl_4') | |
// (15, 14, 'neigh_op_lft_4') | |
// (15, 15, 'neigh_op_bnl_4') | |
wire n430; | |
// (13, 13, 'neigh_op_tnr_6') | |
// (13, 14, 'neigh_op_rgt_6') | |
// (13, 14, 'sp4_h_r_1') | |
// (13, 15, 'neigh_op_bnr_6') | |
// (14, 13, 'neigh_op_top_6') | |
// (14, 13, 'sp4_r_v_b_40') | |
// (14, 14, 'lutff_6/out') | |
// (14, 14, 'sp4_h_r_12') | |
// (14, 14, 'sp4_r_v_b_29') | |
// (14, 15, 'neigh_op_bot_6') | |
// (14, 15, 'sp4_r_v_b_16') | |
// (14, 16, 'sp4_r_v_b_5') | |
// (15, 12, 'sp4_v_t_40') | |
// (15, 13, 'neigh_op_tnl_6') | |
// (15, 13, 'sp4_v_b_40') | |
// (15, 14, 'neigh_op_lft_6') | |
// (15, 14, 'sp4_h_r_25') | |
// (15, 14, 'sp4_v_b_29') | |
// (15, 15, 'neigh_op_bnl_6') | |
// (15, 15, 'sp4_v_b_16') | |
// (15, 16, 'sp4_h_r_5') | |
// (15, 16, 'sp4_v_b_5') | |
// (16, 14, 'sp4_h_r_36') | |
// (16, 16, 'sp4_h_r_16') | |
// (17, 14, 'local_g1_1') | |
// (17, 14, 'lutff_3/in_1') | |
// (17, 14, 'sp4_h_l_36') | |
// (17, 14, 'sp4_h_r_1') | |
// (17, 16, 'sp4_h_r_29') | |
// (18, 14, 'sp4_h_r_12') | |
// (18, 16, 'sp4_h_r_40') | |
// (19, 14, 'sp4_h_r_25') | |
// (19, 16, 'local_g0_5') | |
// (19, 16, 'ram/WDATA_1') | |
// (19, 16, 'sp4_h_l_40') | |
// (19, 16, 'sp4_h_r_5') | |
// (20, 14, 'sp4_h_r_36') | |
// (20, 16, 'sp4_h_r_16') | |
// (21, 14, 'sp4_h_l_36') | |
// (21, 16, 'sp4_h_r_29') | |
// (22, 16, 'sp4_h_r_40') | |
// (23, 16, 'sp4_h_l_40') | |
wire n431; | |
// (13, 14, 'local_g1_0') | |
// (13, 14, 'local_g1_1') | |
// (13, 14, 'lutff_3/in_1') | |
// (13, 14, 'lutff_7/in_0') | |
// (13, 14, 'sp4_h_r_0') | |
// (13, 14, 'sp4_h_r_9') | |
// (14, 14, 'sp4_h_r_13') | |
// (14, 14, 'sp4_h_r_20') | |
// (15, 14, 'sp4_h_r_24') | |
// (15, 14, 'sp4_h_r_33') | |
// (16, 14, 'sp4_h_r_37') | |
// (16, 14, 'sp4_h_r_44') | |
// (17, 13, 'neigh_op_tnr_2') | |
// (17, 14, 'neigh_op_rgt_2') | |
// (17, 14, 'sp4_h_l_37') | |
// (17, 14, 'sp4_h_l_44') | |
// (17, 14, 'sp4_h_r_9') | |
// (17, 15, 'neigh_op_bnr_2') | |
// (18, 13, 'neigh_op_top_2') | |
// (18, 14, 'lutff_2/out') | |
// (18, 14, 'sp4_h_r_20') | |
// (18, 15, 'neigh_op_bot_2') | |
// (19, 13, 'neigh_op_tnl_2') | |
// (19, 14, 'neigh_op_lft_2') | |
// (19, 14, 'sp4_h_r_33') | |
// (19, 15, 'neigh_op_bnl_2') | |
// (20, 14, 'sp4_h_r_44') | |
// (21, 14, 'sp4_h_l_44') | |
reg n432 = 0; | |
// (13, 14, 'neigh_op_tnr_1') | |
// (13, 15, 'neigh_op_rgt_1') | |
// (13, 16, 'neigh_op_bnr_1') | |
// (14, 14, 'local_g1_1') | |
// (14, 14, 'lutff_5/in_3') | |
// (14, 14, 'neigh_op_top_1') | |
// (14, 15, 'local_g2_1') | |
// (14, 15, 'lutff_1/out') | |
// (14, 15, 'lutff_7/in_0') | |
// (14, 16, 'neigh_op_bot_1') | |
// (15, 14, 'neigh_op_tnl_1') | |
// (15, 15, 'neigh_op_lft_1') | |
// (15, 16, 'neigh_op_bnl_1') | |
wire n433; | |
// (13, 14, 'neigh_op_tnr_3') | |
// (13, 15, 'local_g3_3') | |
// (13, 15, 'lutff_4/in_0') | |
// (13, 15, 'neigh_op_rgt_3') | |
// (13, 16, 'neigh_op_bnr_3') | |
// (14, 12, 'sp4_r_v_b_42') | |
// (14, 13, 'local_g0_7') | |
// (14, 13, 'lutff_6/in_1') | |
// (14, 13, 'sp4_r_v_b_31') | |
// (14, 14, 'neigh_op_top_3') | |
// (14, 14, 'sp4_r_v_b_18') | |
// (14, 15, 'lutff_3/out') | |
// (14, 15, 'sp4_r_v_b_7') | |
// (14, 16, 'neigh_op_bot_3') | |
// (15, 11, 'sp4_v_t_42') | |
// (15, 12, 'sp4_v_b_42') | |
// (15, 13, 'sp4_v_b_31') | |
// (15, 14, 'neigh_op_tnl_3') | |
// (15, 14, 'sp4_v_b_18') | |
// (15, 15, 'neigh_op_lft_3') | |
// (15, 15, 'sp4_v_b_7') | |
// (15, 16, 'neigh_op_bnl_3') | |
wire n434; | |
// (13, 14, 'neigh_op_tnr_4') | |
// (13, 15, 'neigh_op_rgt_4') | |
// (13, 16, 'neigh_op_bnr_4') | |
// (14, 14, 'neigh_op_top_4') | |
// (14, 14, 'sp4_r_v_b_36') | |
// (14, 15, 'local_g3_4') | |
// (14, 15, 'lutff_4/out') | |
// (14, 15, 'lutff_5/in_0') | |
// (14, 15, 'sp4_r_v_b_25') | |
// (14, 16, 'neigh_op_bot_4') | |
// (14, 16, 'sp4_r_v_b_12') | |
// (14, 17, 'sp4_r_v_b_1') | |
// (15, 13, 'sp4_v_t_36') | |
// (15, 14, 'neigh_op_tnl_4') | |
// (15, 14, 'sp4_v_b_36') | |
// (15, 15, 'neigh_op_lft_4') | |
// (15, 15, 'sp4_v_b_25') | |
// (15, 16, 'neigh_op_bnl_4') | |
// (15, 16, 'sp4_v_b_12') | |
// (15, 17, 'sp4_h_r_7') | |
// (15, 17, 'sp4_v_b_1') | |
// (16, 17, 'sp4_h_r_18') | |
// (17, 17, 'sp4_h_r_31') | |
// (18, 14, 'sp4_r_v_b_36') | |
// (18, 15, 'sp4_r_v_b_25') | |
// (18, 16, 'sp4_r_v_b_12') | |
// (18, 17, 'sp4_h_r_42') | |
// (18, 17, 'sp4_r_v_b_1') | |
// (19, 13, 'sp4_v_t_36') | |
// (19, 14, 'sp4_v_b_36') | |
// (19, 15, 'sp4_v_b_25') | |
// (19, 16, 'local_g1_4') | |
// (19, 16, 'ram/WDATA_3') | |
// (19, 16, 'sp4_v_b_12') | |
// (19, 17, 'sp4_h_l_42') | |
// (19, 17, 'sp4_v_b_1') | |
reg n435 = 0; | |
// (13, 14, 'neigh_op_tnr_5') | |
// (13, 15, 'neigh_op_rgt_5') | |
// (13, 16, 'neigh_op_bnr_5') | |
// (14, 14, 'neigh_op_top_5') | |
// (14, 15, 'local_g0_5') | |
// (14, 15, 'lutff_3/in_2') | |
// (14, 15, 'lutff_5/out') | |
// (14, 16, 'neigh_op_bot_5') | |
// (15, 14, 'neigh_op_tnl_5') | |
// (15, 15, 'neigh_op_lft_5') | |
// (15, 16, 'neigh_op_bnl_5') | |
wire n436; | |
// (14, 1, 'neigh_op_bnr_0') | |
// (14, 1, 'neigh_op_bnr_4') | |
// (15, 0, 'io_0/D_IN_0') | |
// (15, 0, 'span12_vert_16') | |
// (15, 1, 'neigh_op_bot_0') | |
// (15, 1, 'neigh_op_bot_4') | |
// (15, 1, 'sp12_v_b_16') | |
// (15, 2, 'sp12_v_b_15') | |
// (15, 3, 'sp12_v_b_12') | |
// (15, 4, 'sp12_v_b_11') | |
// (15, 5, 'sp12_v_b_8') | |
// (15, 6, 'sp12_v_b_7') | |
// (15, 7, 'local_g3_4') | |
// (15, 7, 'lutff_0/in_3') | |
// (15, 7, 'sp12_v_b_4') | |
// (15, 8, 'sp12_v_b_3') | |
// (15, 9, 'sp12_v_b_0') | |
// (16, 1, 'neigh_op_bnl_0') | |
// (16, 1, 'neigh_op_bnl_4') | |
reg n437 = 0; | |
// (14, 1, 'neigh_op_tnr_0') | |
// (14, 1, 'sp4_r_v_b_13') | |
// (14, 2, 'neigh_op_rgt_0') | |
// (14, 2, 'sp4_r_v_b_0') | |
// (14, 3, 'neigh_op_bnr_0') | |
// (15, 0, 'io_0/D_OUT_0') | |
// (15, 0, 'local_g1_5') | |
// (15, 0, 'span4_vert_13') | |
// (15, 1, 'neigh_op_top_0') | |
// (15, 1, 'sp4_v_b_13') | |
// (15, 2, 'lutff_0/out') | |
// (15, 2, 'sp4_v_b_0') | |
// (15, 3, 'neigh_op_bot_0') | |
// (16, 1, 'neigh_op_tnl_0') | |
// (16, 2, 'neigh_op_lft_0') | |
// (16, 3, 'neigh_op_bnl_0') | |
reg n438 = 0; | |
// (14, 5, 'sp4_r_v_b_40') | |
// (14, 6, 'neigh_op_tnr_0') | |
// (14, 6, 'sp4_r_v_b_29') | |
// (14, 7, 'neigh_op_rgt_0') | |
// (14, 7, 'sp4_r_v_b_16') | |
// (14, 8, 'neigh_op_bnr_0') | |
// (14, 8, 'sp4_r_v_b_5') | |
// (14, 9, 'sp4_r_v_b_45') | |
// (14, 10, 'sp4_r_v_b_32') | |
// (14, 11, 'sp4_r_v_b_21') | |
// (14, 12, 'sp4_r_v_b_8') | |
// (15, 4, 'sp4_v_t_40') | |
// (15, 5, 'sp4_v_b_40') | |
// (15, 6, 'neigh_op_top_0') | |
// (15, 6, 'sp4_v_b_29') | |
// (15, 7, 'lutff_0/out') | |
// (15, 7, 'sp4_v_b_16') | |
// (15, 8, 'neigh_op_bot_0') | |
// (15, 8, 'sp4_v_b_5') | |
// (15, 8, 'sp4_v_t_45') | |
// (15, 9, 'sp4_v_b_45') | |
// (15, 10, 'sp4_v_b_32') | |
// (15, 11, 'local_g0_5') | |
// (15, 11, 'lutff_4/in_3') | |
// (15, 11, 'sp4_v_b_21') | |
// (15, 12, 'sp4_v_b_8') | |
// (16, 6, 'neigh_op_tnl_0') | |
// (16, 7, 'neigh_op_lft_0') | |
// (16, 8, 'neigh_op_bnl_0') | |
wire n439; | |
// (14, 8, 'neigh_op_tnr_0') | |
// (14, 9, 'neigh_op_rgt_0') | |
// (14, 10, 'neigh_op_bnr_0') | |
// (15, 8, 'neigh_op_top_0') | |
// (15, 9, 'local_g0_0') | |
// (15, 9, 'lutff_0/out') | |
// (15, 9, 'lutff_6/in_2') | |
// (15, 10, 'neigh_op_bot_0') | |
// (16, 8, 'neigh_op_tnl_0') | |
// (16, 9, 'neigh_op_lft_0') | |
// (16, 10, 'neigh_op_bnl_0') | |
wire n440; | |
// (14, 8, 'neigh_op_tnr_2') | |
// (14, 9, 'neigh_op_rgt_2') | |
// (14, 10, 'neigh_op_bnr_2') | |
// (15, 8, 'neigh_op_top_2') | |
// (15, 9, 'local_g3_2') | |
// (15, 9, 'lutff_2/out') | |
// (15, 9, 'lutff_6/in_3') | |
// (15, 10, 'neigh_op_bot_2') | |
// (16, 8, 'neigh_op_tnl_2') | |
// (16, 9, 'neigh_op_lft_2') | |
// (16, 10, 'neigh_op_bnl_2') | |
wire n441; | |
// (14, 8, 'neigh_op_tnr_5') | |
// (14, 9, 'neigh_op_rgt_5') | |
// (14, 10, 'neigh_op_bnr_5') | |
// (15, 8, 'neigh_op_top_5') | |
// (15, 9, 'local_g1_5') | |
// (15, 9, 'lutff_5/out') | |
// (15, 9, 'lutff_6/in_0') | |
// (15, 10, 'neigh_op_bot_5') | |
// (16, 8, 'neigh_op_tnl_5') | |
// (16, 9, 'neigh_op_lft_5') | |
// (16, 10, 'neigh_op_bnl_5') | |
wire n442; | |
// (14, 8, 'sp4_h_r_0') | |
// (15, 7, 'neigh_op_tnr_4') | |
// (15, 8, 'neigh_op_rgt_4') | |
// (15, 8, 'sp4_h_r_13') | |
// (15, 9, 'neigh_op_bnr_4') | |
// (16, 7, 'neigh_op_top_4') | |
// (16, 7, 'sp4_r_v_b_36') | |
// (16, 8, 'local_g3_4') | |
// (16, 8, 'lutff_3/in_2') | |
// (16, 8, 'lutff_4/out') | |
// (16, 8, 'sp4_h_r_24') | |
// (16, 8, 'sp4_r_v_b_25') | |
// (16, 9, 'neigh_op_bot_4') | |
// (16, 9, 'sp4_r_v_b_12') | |
// (16, 10, 'sp4_r_v_b_1') | |
// (17, 6, 'sp4_v_t_36') | |
// (17, 7, 'neigh_op_tnl_4') | |
// (17, 7, 'sp4_v_b_36') | |
// (17, 8, 'local_g0_4') | |
// (17, 8, 'lutff_6/in_0') | |
// (17, 8, 'neigh_op_lft_4') | |
// (17, 8, 'sp4_h_r_37') | |
// (17, 8, 'sp4_v_b_25') | |
// (17, 9, 'neigh_op_bnl_4') | |
// (17, 9, 'sp4_r_v_b_37') | |
// (17, 9, 'sp4_v_b_12') | |
// (17, 10, 'sp4_h_r_1') | |
// (17, 10, 'sp4_r_v_b_24') | |
// (17, 10, 'sp4_v_b_1') | |
// (17, 11, 'sp4_r_v_b_13') | |
// (17, 12, 'sp4_r_v_b_0') | |
// (18, 8, 'sp4_h_l_37') | |
// (18, 8, 'sp4_v_t_37') | |
// (18, 9, 'local_g3_5') | |
// (18, 9, 'lutff_4/in_2') | |
// (18, 9, 'sp4_v_b_37') | |
// (18, 10, 'sp4_h_r_12') | |
// (18, 10, 'sp4_v_b_24') | |
// (18, 11, 'sp4_v_b_13') | |
// (18, 12, 'sp4_v_b_0') | |
// (19, 10, 'local_g3_1') | |
// (19, 10, 'ram/WADDR_7') | |
// (19, 10, 'sp4_h_r_25') | |
// (20, 10, 'sp4_h_r_36') | |
// (21, 10, 'sp4_h_l_36') | |
wire n443; | |
// (14, 9, 'neigh_op_tnr_2') | |
// (14, 10, 'neigh_op_rgt_2') | |
// (14, 11, 'neigh_op_bnr_2') | |
// (15, 9, 'neigh_op_top_2') | |
// (15, 10, 'local_g2_2') | |
// (15, 10, 'lutff_2/out') | |
// (15, 10, 'lutff_4/in_2') | |
// (15, 10, 'lutff_5/in_1') | |
// (15, 11, 'neigh_op_bot_2') | |
// (16, 9, 'neigh_op_tnl_2') | |
// (16, 10, 'neigh_op_lft_2') | |
// (16, 11, 'neigh_op_bnl_2') | |
wire n444; | |
// (14, 9, 'neigh_op_tnr_5') | |
// (14, 10, 'neigh_op_rgt_5') | |
// (14, 11, 'neigh_op_bnr_5') | |
// (15, 9, 'neigh_op_top_5') | |
// (15, 10, 'lutff_5/out') | |
// (15, 10, 'sp4_r_v_b_43') | |
// (15, 11, 'neigh_op_bot_5') | |
// (15, 11, 'sp4_r_v_b_30') | |
// (15, 12, 'sp4_r_v_b_19') | |
// (15, 13, 'local_g1_6') | |
// (15, 13, 'lutff_4/in_3') | |
// (15, 13, 'sp4_r_v_b_6') | |
// (16, 9, 'neigh_op_tnl_5') | |
// (16, 9, 'sp4_v_t_43') | |
// (16, 10, 'neigh_op_lft_5') | |
// (16, 10, 'sp4_v_b_43') | |
// (16, 11, 'neigh_op_bnl_5') | |
// (16, 11, 'sp4_v_b_30') | |
// (16, 12, 'sp4_v_b_19') | |
// (16, 13, 'sp4_v_b_6') | |
wire n445; | |
// (14, 9, 'neigh_op_tnr_7') | |
// (14, 10, 'neigh_op_rgt_7') | |
// (14, 11, 'neigh_op_bnr_7') | |
// (15, 9, 'neigh_op_top_7') | |
// (15, 10, 'lutff_7/out') | |
// (15, 11, 'neigh_op_bot_7') | |
// (16, 9, 'neigh_op_tnl_7') | |
// (16, 10, 'local_g0_7') | |
// (16, 10, 'lutff_7/in_0') | |
// (16, 10, 'neigh_op_lft_7') | |
// (16, 11, 'neigh_op_bnl_7') | |
wire n446; | |
// (14, 9, 'sp4_h_r_2') | |
// (15, 8, 'neigh_op_tnr_5') | |
// (15, 8, 'sp4_r_v_b_39') | |
// (15, 9, 'neigh_op_rgt_5') | |
// (15, 9, 'sp4_h_r_15') | |
// (15, 9, 'sp4_r_v_b_26') | |
// (15, 10, 'neigh_op_bnr_5') | |
// (15, 10, 'sp4_r_v_b_15') | |
// (15, 11, 'sp4_r_v_b_2') | |
// (16, 7, 'sp4_h_r_7') | |
// (16, 7, 'sp4_v_t_39') | |
// (16, 8, 'local_g0_5') | |
// (16, 8, 'lutff_5/in_0') | |
// (16, 8, 'neigh_op_top_5') | |
// (16, 8, 'sp4_v_b_39') | |
// (16, 9, 'lutff_5/out') | |
// (16, 9, 'sp4_h_r_26') | |
// (16, 9, 'sp4_v_b_26') | |
// (16, 10, 'neigh_op_bot_5') | |
// (16, 10, 'sp4_v_b_15') | |
// (16, 11, 'sp4_v_b_2') | |
// (17, 6, 'sp4_r_v_b_45') | |
// (17, 7, 'sp4_h_r_18') | |
// (17, 7, 'sp4_r_v_b_32') | |
// (17, 8, 'local_g2_5') | |
// (17, 8, 'lutff_6/in_1') | |
// (17, 8, 'neigh_op_tnl_5') | |
// (17, 8, 'sp4_r_v_b_21') | |
// (17, 9, 'neigh_op_lft_5') | |
// (17, 9, 'sp4_h_r_39') | |
// (17, 9, 'sp4_r_v_b_8') | |
// (17, 10, 'neigh_op_bnl_5') | |
// (18, 5, 'sp4_v_t_45') | |
// (18, 6, 'sp4_v_b_45') | |
// (18, 7, 'sp4_h_r_31') | |
// (18, 7, 'sp4_v_b_32') | |
// (18, 8, 'local_g0_5') | |
// (18, 8, 'lutff_1/in_2') | |
// (18, 8, 'sp4_v_b_21') | |
// (18, 9, 'sp4_h_l_39') | |
// (18, 9, 'sp4_v_b_8') | |
// (19, 7, 'sp4_h_r_42') | |
// (19, 8, 'sp4_r_v_b_42') | |
// (19, 9, 'sp4_r_v_b_31') | |
// (19, 10, 'local_g3_2') | |
// (19, 10, 'ram/WADDR_0') | |
// (19, 10, 'sp4_r_v_b_18') | |
// (19, 11, 'sp4_r_v_b_7') | |
// (20, 7, 'sp4_h_l_42') | |
// (20, 7, 'sp4_v_t_42') | |
// (20, 8, 'sp4_v_b_42') | |
// (20, 9, 'sp4_v_b_31') | |
// (20, 10, 'sp4_v_b_18') | |
// (20, 11, 'sp4_v_b_7') | |
wire n447; | |
// (14, 9, 'sp4_h_r_4') | |
// (15, 9, 'local_g1_1') | |
// (15, 9, 'lutff_4/in_2') | |
// (15, 9, 'sp4_h_r_17') | |
// (16, 9, 'sp4_h_r_28') | |
// (16, 12, 'local_g0_2') | |
// (16, 12, 'lutff_5/in_3') | |
// (16, 12, 'sp4_h_r_2') | |
// (17, 9, 'sp4_h_r_41') | |
// (17, 12, 'sp4_h_r_15') | |
// (18, 9, 'sp4_h_l_41') | |
// (18, 9, 'sp4_h_r_4') | |
// (18, 12, 'sp4_h_r_26') | |
// (19, 8, 'neigh_op_tnr_6') | |
// (19, 9, 'neigh_op_rgt_6') | |
// (19, 9, 'sp4_h_r_17') | |
// (19, 9, 'sp4_r_v_b_44') | |
// (19, 10, 'neigh_op_bnr_6') | |
// (19, 10, 'sp4_r_v_b_33') | |
// (19, 11, 'sp4_r_v_b_20') | |
// (19, 12, 'local_g2_1') | |
// (19, 12, 'ram/WDATA_5') | |
// (19, 12, 'sp4_h_r_39') | |
// (19, 12, 'sp4_r_v_b_9') | |
// (20, 8, 'neigh_op_top_6') | |
// (20, 8, 'sp4_v_t_44') | |
// (20, 9, 'lutff_6/out') | |
// (20, 9, 'sp4_h_r_28') | |
// (20, 9, 'sp4_v_b_44') | |
// (20, 10, 'neigh_op_bot_6') | |
// (20, 10, 'sp4_v_b_33') | |
// (20, 11, 'sp4_v_b_20') | |
// (20, 12, 'sp4_h_l_39') | |
// (20, 12, 'sp4_v_b_9') | |
// (21, 8, 'neigh_op_tnl_6') | |
// (21, 9, 'neigh_op_lft_6') | |
// (21, 9, 'sp4_h_r_41') | |
// (21, 10, 'local_g2_6') | |
// (21, 10, 'lutff_4/in_2') | |
// (21, 10, 'neigh_op_bnl_6') | |
// (22, 9, 'sp4_h_l_41') | |
wire n448; | |
// (14, 10, 'neigh_op_tnr_0') | |
// (14, 11, 'neigh_op_rgt_0') | |
// (14, 12, 'neigh_op_bnr_0') | |
// (15, 10, 'neigh_op_top_0') | |
// (15, 11, 'local_g3_0') | |
// (15, 11, 'lutff_0/out') | |
// (15, 11, 'lutff_1/in_2') | |
// (15, 12, 'neigh_op_bot_0') | |
// (16, 10, 'neigh_op_tnl_0') | |
// (16, 11, 'neigh_op_lft_0') | |
// (16, 12, 'neigh_op_bnl_0') | |
wire n449; | |
// (14, 10, 'neigh_op_tnr_1') | |
// (14, 11, 'neigh_op_rgt_1') | |
// (14, 12, 'neigh_op_bnr_1') | |
// (15, 10, 'neigh_op_top_1') | |
// (15, 11, 'lutff_1/out') | |
// (15, 12, 'neigh_op_bot_1') | |
// (16, 10, 'neigh_op_tnl_1') | |
// (16, 11, 'local_g1_1') | |
// (16, 11, 'lutff_1/in_1') | |
// (16, 11, 'neigh_op_lft_1') | |
// (16, 12, 'neigh_op_bnl_1') | |
wire n450; | |
// (14, 10, 'neigh_op_tnr_2') | |
// (14, 11, 'neigh_op_rgt_2') | |
// (14, 12, 'neigh_op_bnr_2') | |
// (15, 10, 'neigh_op_top_2') | |
// (15, 11, 'lutff_2/out') | |
// (15, 12, 'neigh_op_bot_2') | |
// (16, 10, 'neigh_op_tnl_2') | |
// (16, 11, 'local_g0_2') | |
// (16, 11, 'lutff_5/in_1') | |
// (16, 11, 'neigh_op_lft_2') | |
// (16, 12, 'neigh_op_bnl_2') | |
wire n451; | |
// (14, 10, 'neigh_op_tnr_3') | |
// (14, 11, 'neigh_op_rgt_3') | |
// (14, 12, 'neigh_op_bnr_3') | |
// (15, 10, 'neigh_op_top_3') | |
// (15, 11, 'local_g3_3') | |
// (15, 11, 'lutff_1/in_3') | |
// (15, 11, 'lutff_3/out') | |
// (15, 12, 'neigh_op_bot_3') | |
// (16, 10, 'neigh_op_tnl_3') | |
// (16, 11, 'neigh_op_lft_3') | |
// (16, 12, 'neigh_op_bnl_3') | |
wire n452; | |
// (14, 10, 'neigh_op_tnr_4') | |
// (14, 11, 'neigh_op_rgt_4') | |
// (14, 12, 'neigh_op_bnr_4') | |
// (15, 10, 'neigh_op_top_4') | |
// (15, 11, 'lutff_4/out') | |
// (15, 11, 'sp4_r_v_b_41') | |
// (15, 12, 'neigh_op_bot_4') | |
// (15, 12, 'sp4_r_v_b_28') | |
// (15, 13, 'local_g3_1') | |
// (15, 13, 'lutff_0/in_0') | |
// (15, 13, 'lutff_7/in_3') | |
// (15, 13, 'sp4_r_v_b_17') | |
// (15, 14, 'sp4_r_v_b_4') | |
// (16, 10, 'neigh_op_tnl_4') | |
// (16, 10, 'sp4_v_t_41') | |
// (16, 11, 'neigh_op_lft_4') | |
// (16, 11, 'sp4_v_b_41') | |
// (16, 12, 'neigh_op_bnl_4') | |
// (16, 12, 'sp4_v_b_28') | |
// (16, 13, 'sp4_v_b_17') | |
// (16, 14, 'sp4_v_b_4') | |
wire n453; | |
// (14, 10, 'neigh_op_tnr_5') | |
// (14, 11, 'neigh_op_rgt_5') | |
// (14, 12, 'neigh_op_bnr_5') | |
// (15, 10, 'neigh_op_top_5') | |
// (15, 11, 'lutff_5/out') | |
// (15, 12, 'neigh_op_bot_5') | |
// (16, 10, 'neigh_op_tnl_5') | |
// (16, 11, 'local_g1_5') | |
// (16, 11, 'lutff_3/in_1') | |
// (16, 11, 'neigh_op_lft_5') | |
// (16, 12, 'neigh_op_bnl_5') | |
wire n454; | |
// (14, 10, 'neigh_op_tnr_7') | |
// (14, 11, 'neigh_op_rgt_7') | |
// (14, 12, 'neigh_op_bnr_7') | |
// (15, 10, 'neigh_op_top_7') | |
// (15, 11, 'local_g1_7') | |
// (15, 11, 'lutff_1/in_1') | |
// (15, 11, 'lutff_7/out') | |
// (15, 12, 'neigh_op_bot_7') | |
// (16, 10, 'neigh_op_tnl_7') | |
// (16, 11, 'neigh_op_lft_7') | |
// (16, 12, 'neigh_op_bnl_7') | |
wire n455; | |
// (14, 10, 'sp4_h_r_1') | |
// (15, 10, 'local_g1_4') | |
// (15, 10, 'lutff_0/in_1') | |
// (15, 10, 'lutff_5/in_0') | |
// (15, 10, 'sp4_h_r_12') | |
// (16, 9, 'neigh_op_tnr_2') | |
// (16, 10, 'neigh_op_rgt_2') | |
// (16, 10, 'sp4_h_r_25') | |
// (16, 11, 'neigh_op_bnr_2') | |
// (17, 9, 'neigh_op_top_2') | |
// (17, 10, 'lutff_2/out') | |
// (17, 10, 'sp4_h_r_36') | |
// (17, 11, 'neigh_op_bot_2') | |
// (18, 9, 'neigh_op_tnl_2') | |
// (18, 10, 'neigh_op_lft_2') | |
// (18, 10, 'sp4_h_l_36') | |
// (18, 11, 'neigh_op_bnl_2') | |
reg n456 = 0; | |
// (14, 11, 'neigh_op_tnr_0') | |
// (14, 12, 'neigh_op_rgt_0') | |
// (14, 13, 'neigh_op_bnr_0') | |
// (15, 11, 'neigh_op_top_0') | |
// (15, 12, 'local_g2_0') | |
// (15, 12, 'lutff_0/out') | |
// (15, 12, 'lutff_6/in_2') | |
// (15, 13, 'neigh_op_bot_0') | |
// (16, 11, 'neigh_op_tnl_0') | |
// (16, 12, 'neigh_op_lft_0') | |
// (16, 13, 'neigh_op_bnl_0') | |
reg n457 = 0; | |
// (14, 11, 'neigh_op_tnr_1') | |
// (14, 12, 'neigh_op_rgt_1') | |
// (14, 13, 'neigh_op_bnr_1') | |
// (15, 11, 'neigh_op_top_1') | |
// (15, 12, 'lutff_1/out') | |
// (15, 12, 'sp4_h_r_2') | |
// (15, 13, 'neigh_op_bot_1') | |
// (16, 11, 'neigh_op_tnl_1') | |
// (16, 12, 'neigh_op_lft_1') | |
// (16, 12, 'sp4_h_r_15') | |
// (16, 13, 'neigh_op_bnl_1') | |
// (17, 12, 'local_g2_2') | |
// (17, 12, 'lutff_2/in_0') | |
// (17, 12, 'sp4_h_r_26') | |
// (18, 12, 'sp4_h_r_39') | |
// (19, 12, 'sp4_h_l_39') | |
wire n458; | |
// (14, 11, 'neigh_op_tnr_2') | |
// (14, 12, 'neigh_op_rgt_2') | |
// (14, 13, 'neigh_op_bnr_2') | |
// (15, 11, 'neigh_op_top_2') | |
// (15, 12, 'local_g1_2') | |
// (15, 12, 'lutff_1/in_2') | |
// (15, 12, 'lutff_2/out') | |
// (15, 13, 'neigh_op_bot_2') | |
// (16, 11, 'neigh_op_tnl_2') | |
// (16, 12, 'neigh_op_lft_2') | |
// (16, 13, 'neigh_op_bnl_2') | |
wire n459; | |
// (14, 11, 'neigh_op_tnr_3') | |
// (14, 12, 'neigh_op_rgt_3') | |
// (14, 13, 'neigh_op_bnr_3') | |
// (15, 11, 'neigh_op_top_3') | |
// (15, 12, 'local_g3_3') | |
// (15, 12, 'lutff_2/in_2') | |
// (15, 12, 'lutff_3/out') | |
// (15, 13, 'neigh_op_bot_3') | |
// (16, 11, 'neigh_op_tnl_3') | |
// (16, 12, 'neigh_op_lft_3') | |
// (16, 13, 'neigh_op_bnl_3') | |
wire n460; | |
// (14, 11, 'neigh_op_tnr_4') | |
// (14, 12, 'neigh_op_rgt_4') | |
// (14, 13, 'neigh_op_bnr_4') | |
// (15, 11, 'neigh_op_top_4') | |
// (15, 12, 'local_g3_4') | |
// (15, 12, 'lutff_0/in_3') | |
// (15, 12, 'lutff_4/out') | |
// (15, 13, 'neigh_op_bot_4') | |
// (16, 11, 'neigh_op_tnl_4') | |
// (16, 12, 'neigh_op_lft_4') | |
// (16, 13, 'neigh_op_bnl_4') | |
wire n461; | |
// (14, 11, 'neigh_op_tnr_5') | |
// (14, 12, 'neigh_op_rgt_5') | |
// (14, 13, 'neigh_op_bnr_5') | |
// (15, 11, 'neigh_op_top_5') | |
// (15, 12, 'local_g3_5') | |
// (15, 12, 'lutff_2/in_0') | |
// (15, 12, 'lutff_5/out') | |
// (15, 13, 'neigh_op_bot_5') | |
// (16, 11, 'neigh_op_tnl_5') | |
// (16, 12, 'neigh_op_lft_5') | |
// (16, 13, 'neigh_op_bnl_5') | |
wire n462; | |
// (14, 11, 'neigh_op_tnr_7') | |
// (14, 12, 'neigh_op_rgt_7') | |
// (14, 13, 'neigh_op_bnr_7') | |
// (15, 11, 'neigh_op_top_7') | |
// (15, 12, 'local_g0_7') | |
// (15, 12, 'lutff_2/in_3') | |
// (15, 12, 'lutff_7/out') | |
// (15, 13, 'neigh_op_bot_7') | |
// (16, 11, 'neigh_op_tnl_7') | |
// (16, 12, 'neigh_op_lft_7') | |
// (16, 13, 'neigh_op_bnl_7') | |
wire n463; | |
// (14, 12, 'local_g1_4') | |
// (14, 12, 'lutff_6/in_3') | |
// (14, 12, 'sp4_h_r_4') | |
// (15, 12, 'sp4_h_r_17') | |
// (16, 12, 'sp4_h_r_28') | |
// (17, 9, 'neigh_op_tnr_6') | |
// (17, 9, 'sp4_r_v_b_41') | |
// (17, 10, 'neigh_op_rgt_6') | |
// (17, 10, 'sp4_r_v_b_28') | |
// (17, 11, 'local_g1_6') | |
// (17, 11, 'lutff_4/in_3') | |
// (17, 11, 'neigh_op_bnr_6') | |
// (17, 11, 'sp4_r_v_b_17') | |
// (17, 12, 'sp4_h_r_41') | |
// (17, 12, 'sp4_r_v_b_4') | |
// (18, 8, 'sp4_v_t_41') | |
// (18, 9, 'neigh_op_top_6') | |
// (18, 9, 'sp4_v_b_41') | |
// (18, 10, 'lutff_6/out') | |
// (18, 10, 'sp4_v_b_28') | |
// (18, 11, 'neigh_op_bot_6') | |
// (18, 11, 'sp4_v_b_17') | |
// (18, 12, 'local_g1_4') | |
// (18, 12, 'lutff_0/in_3') | |
// (18, 12, 'sp4_h_l_41') | |
// (18, 12, 'sp4_v_b_4') | |
// (19, 9, 'neigh_op_tnl_6') | |
// (19, 10, 'neigh_op_lft_6') | |
// (19, 11, 'local_g2_6') | |
// (19, 11, 'neigh_op_bnl_6') | |
// (19, 11, 'ram/WDATA_14') | |
wire n464; | |
// (14, 12, 'neigh_op_tnr_0') | |
// (14, 13, 'neigh_op_rgt_0') | |
// (14, 14, 'neigh_op_bnr_0') | |
// (15, 12, 'neigh_op_top_0') | |
// (15, 13, 'local_g1_0') | |
// (15, 13, 'lutff_0/out') | |
// (15, 13, 'lutff_4/in_1') | |
// (15, 14, 'neigh_op_bot_0') | |
// (16, 12, 'neigh_op_tnl_0') | |
// (16, 13, 'neigh_op_lft_0') | |
// (16, 14, 'neigh_op_bnl_0') | |
wire n465; | |
// (14, 12, 'neigh_op_tnr_2') | |
// (14, 13, 'neigh_op_rgt_2') | |
// (14, 14, 'neigh_op_bnr_2') | |
// (15, 12, 'neigh_op_top_2') | |
// (15, 13, 'lutff_2/out') | |
// (15, 14, 'neigh_op_bot_2') | |
// (16, 12, 'neigh_op_tnl_2') | |
// (16, 13, 'local_g1_2') | |
// (16, 13, 'lutff_0/in_1') | |
// (16, 13, 'neigh_op_lft_2') | |
// (16, 14, 'neigh_op_bnl_2') | |
wire n466; | |
// (14, 12, 'neigh_op_tnr_4') | |
// (14, 13, 'local_g3_4') | |
// (14, 13, 'lutff_2/in_3') | |
// (14, 13, 'lutff_4/in_3') | |
// (14, 13, 'neigh_op_rgt_4') | |
// (14, 14, 'neigh_op_bnr_4') | |
// (15, 12, 'neigh_op_top_4') | |
// (15, 13, 'lutff_4/out') | |
// (15, 14, 'neigh_op_bot_4') | |
// (16, 12, 'neigh_op_tnl_4') | |
// (16, 13, 'neigh_op_lft_4') | |
// (16, 14, 'neigh_op_bnl_4') | |
wire n467; | |
// (14, 12, 'neigh_op_tnr_5') | |
// (14, 13, 'neigh_op_rgt_5') | |
// (14, 14, 'neigh_op_bnr_5') | |
// (15, 12, 'neigh_op_top_5') | |
// (15, 13, 'local_g2_5') | |
// (15, 13, 'lutff_0/in_1') | |
// (15, 13, 'lutff_5/out') | |
// (15, 13, 'lutff_7/in_0') | |
// (15, 14, 'neigh_op_bot_5') | |
// (16, 12, 'neigh_op_tnl_5') | |
// (16, 13, 'neigh_op_lft_5') | |
// (16, 14, 'neigh_op_bnl_5') | |
wire n468; | |
// (14, 12, 'neigh_op_tnr_6') | |
// (14, 13, 'neigh_op_rgt_6') | |
// (14, 14, 'neigh_op_bnr_6') | |
// (15, 12, 'neigh_op_top_6') | |
// (15, 13, 'local_g0_6') | |
// (15, 13, 'lutff_0/in_2') | |
// (15, 13, 'lutff_3/in_3') | |
// (15, 13, 'lutff_6/out') | |
// (15, 14, 'neigh_op_bot_6') | |
// (16, 12, 'neigh_op_tnl_6') | |
// (16, 13, 'neigh_op_lft_6') | |
// (16, 14, 'neigh_op_bnl_6') | |
wire n469; | |
// (14, 12, 'sp4_h_r_0') | |
// (15, 12, 'local_g0_5') | |
// (15, 12, 'lutff_4/in_3') | |
// (15, 12, 'sp4_h_r_13') | |
// (16, 12, 'sp4_h_r_24') | |
// (17, 11, 'neigh_op_tnr_0') | |
// (17, 12, 'neigh_op_rgt_0') | |
// (17, 12, 'sp4_h_r_37') | |
// (17, 13, 'neigh_op_bnr_0') | |
// (18, 11, 'neigh_op_top_0') | |
// (18, 12, 'lutff_0/out') | |
// (18, 12, 'sp4_h_l_37') | |
// (18, 12, 'sp4_h_r_0') | |
// (18, 13, 'neigh_op_bot_0') | |
// (19, 11, 'neigh_op_tnl_0') | |
// (19, 12, 'neigh_op_lft_0') | |
// (19, 12, 'sp4_h_r_13') | |
// (19, 13, 'neigh_op_bnl_0') | |
// (20, 12, 'sp4_h_r_24') | |
// (21, 12, 'sp4_h_r_37') | |
// (22, 12, 'sp4_h_l_37') | |
reg n470 = 0; | |
// (14, 12, 'sp4_r_v_b_40') | |
// (14, 13, 'sp4_r_v_b_29') | |
// (14, 14, 'local_g3_0') | |
// (14, 14, 'lutff_5/in_0') | |
// (14, 14, 'sp4_h_r_11') | |
// (14, 14, 'sp4_r_v_b_16') | |
// (14, 15, 'local_g0_4') | |
// (14, 15, 'lutff_3/in_1') | |
// (14, 15, 'lutff_7/in_3') | |
// (14, 15, 'sp4_h_r_4') | |
// (14, 15, 'sp4_r_v_b_5') | |
// (15, 11, 'sp4_v_t_40') | |
// (15, 12, 'sp4_v_b_40') | |
// (15, 13, 'sp4_v_b_29') | |
// (15, 14, 'sp4_h_r_22') | |
// (15, 14, 'sp4_v_b_16') | |
// (15, 15, 'local_g0_5') | |
// (15, 15, 'lutff_0/in_1') | |
// (15, 15, 'lutff_4/in_1') | |
// (15, 15, 'sp4_h_r_17') | |
// (15, 15, 'sp4_h_r_5') | |
// (15, 15, 'sp4_v_b_5') | |
// (16, 14, 'local_g3_3') | |
// (16, 14, 'lutff_2/in_2') | |
// (16, 14, 'sp4_h_r_35') | |
// (16, 15, 'sp4_h_r_0') | |
// (16, 15, 'sp4_h_r_16') | |
// (16, 15, 'sp4_h_r_28') | |
// (17, 12, 'sp4_r_v_b_45') | |
// (17, 13, 'sp4_r_v_b_32') | |
// (17, 14, 'local_g2_4') | |
// (17, 14, 'lutff_4/in_0') | |
// (17, 14, 'neigh_op_tnr_4') | |
// (17, 14, 'sp4_h_r_46') | |
// (17, 14, 'sp4_r_v_b_21') | |
// (17, 14, 'sp4_r_v_b_37') | |
// (17, 15, 'local_g3_4') | |
// (17, 15, 'lutff_5/in_0') | |
// (17, 15, 'neigh_op_rgt_4') | |
// (17, 15, 'sp4_h_r_13') | |
// (17, 15, 'sp4_h_r_29') | |
// (17, 15, 'sp4_h_r_41') | |
// (17, 15, 'sp4_r_v_b_24') | |
// (17, 15, 'sp4_r_v_b_40') | |
// (17, 15, 'sp4_r_v_b_8') | |
// (17, 16, 'neigh_op_bnr_4') | |
// (17, 16, 'sp4_r_v_b_13') | |
// (17, 16, 'sp4_r_v_b_29') | |
// (17, 17, 'sp4_r_v_b_0') | |
// (17, 17, 'sp4_r_v_b_16') | |
// (17, 18, 'sp4_r_v_b_5') | |
// (18, 11, 'sp4_v_t_45') | |
// (18, 12, 'local_g2_5') | |
// (18, 12, 'lutff_7/in_0') | |
// (18, 12, 'sp4_v_b_45') | |
// (18, 13, 'local_g2_0') | |
// (18, 13, 'lutff_4/in_2') | |
// (18, 13, 'lutff_5/in_1') | |
// (18, 13, 'lutff_6/in_2') | |
// (18, 13, 'sp4_h_r_0') | |
// (18, 13, 'sp4_v_b_32') | |
// (18, 13, 'sp4_v_t_37') | |
// (18, 14, 'local_g0_4') | |
// (18, 14, 'lutff_2/in_2') | |
// (18, 14, 'neigh_op_top_4') | |
// (18, 14, 'sp4_h_l_46') | |
// (18, 14, 'sp4_v_b_21') | |
// (18, 14, 'sp4_v_b_37') | |
// (18, 14, 'sp4_v_t_40') | |
// (18, 15, 'lutff_4/out') | |
// (18, 15, 'sp4_h_l_41') | |
// (18, 15, 'sp4_h_r_24') | |
// (18, 15, 'sp4_h_r_40') | |
// (18, 15, 'sp4_h_r_8') | |
// (18, 15, 'sp4_v_b_24') | |
// (18, 15, 'sp4_v_b_40') | |
// (18, 15, 'sp4_v_b_8') | |
// (18, 16, 'neigh_op_bot_4') | |
// (18, 16, 'sp4_v_b_13') | |
// (18, 16, 'sp4_v_b_29') | |
// (18, 17, 'sp4_v_b_0') | |
// (18, 17, 'sp4_v_b_16') | |
// (18, 18, 'sp4_v_b_5') | |
// (19, 12, 'sp4_r_v_b_43') | |
// (19, 13, 'sp4_h_r_13') | |
// (19, 13, 'sp4_r_v_b_30') | |
// (19, 14, 'neigh_op_tnl_4') | |
// (19, 14, 'sp4_r_v_b_19') | |
// (19, 15, 'neigh_op_lft_4') | |
// (19, 15, 'sp4_h_l_40') | |
// (19, 15, 'sp4_h_r_21') | |
// (19, 15, 'sp4_h_r_37') | |
// (19, 15, 'sp4_r_v_b_6') | |
// (19, 16, 'neigh_op_bnl_4') | |
// (20, 11, 'sp4_v_t_43') | |
// (20, 12, 'local_g2_3') | |
// (20, 12, 'lutff_0/in_3') | |
// (20, 12, 'lutff_1/in_2') | |
// (20, 12, 'lutff_7/in_0') | |
// (20, 12, 'sp4_v_b_43') | |
// (20, 13, 'local_g3_0') | |
// (20, 13, 'lutff_0/in_3') | |
// (20, 13, 'sp4_h_r_24') | |
// (20, 13, 'sp4_v_b_30') | |
// (20, 14, 'sp4_v_b_19') | |
// (20, 15, 'sp4_h_l_37') | |
// (20, 15, 'sp4_h_r_32') | |
// (20, 15, 'sp4_v_b_6') | |
// (21, 13, 'sp4_h_r_37') | |
// (21, 15, 'sp4_h_r_45') | |
// (22, 13, 'sp4_h_l_37') | |
// (22, 15, 'sp4_h_l_45') | |
wire n471; | |
// (14, 13, 'neigh_op_tnr_0') | |
// (14, 14, 'neigh_op_rgt_0') | |
// (14, 15, 'neigh_op_bnr_0') | |
// (15, 13, 'neigh_op_top_0') | |
// (15, 14, 'local_g1_0') | |
// (15, 14, 'lutff_0/out') | |
// (15, 14, 'lutff_2/in_3') | |
// (15, 14, 'lutff_5/in_0') | |
// (15, 15, 'neigh_op_bot_0') | |
// (16, 13, 'neigh_op_tnl_0') | |
// (16, 14, 'neigh_op_lft_0') | |
// (16, 15, 'neigh_op_bnl_0') | |
wire n472; | |
// (14, 13, 'neigh_op_tnr_2') | |
// (14, 14, 'neigh_op_rgt_2') | |
// (14, 14, 'sp4_h_r_9') | |
// (14, 15, 'neigh_op_bnr_2') | |
// (15, 12, 'sp4_r_v_b_45') | |
// (15, 13, 'neigh_op_top_2') | |
// (15, 13, 'sp4_r_v_b_32') | |
// (15, 14, 'lutff_2/out') | |
// (15, 14, 'sp4_h_r_20') | |
// (15, 14, 'sp4_h_r_4') | |
// (15, 14, 'sp4_r_v_b_21') | |
// (15, 15, 'neigh_op_bot_2') | |
// (15, 15, 'sp4_r_v_b_8') | |
// (16, 11, 'sp4_v_t_45') | |
// (16, 12, 'sp4_v_b_45') | |
// (16, 13, 'neigh_op_tnl_2') | |
// (16, 13, 'sp4_v_b_32') | |
// (16, 14, 'neigh_op_lft_2') | |
// (16, 14, 'sp4_h_r_17') | |
// (16, 14, 'sp4_h_r_33') | |
// (16, 14, 'sp4_v_b_21') | |
// (16, 15, 'local_g3_2') | |
// (16, 15, 'lutff_0/in_1') | |
// (16, 15, 'lutff_2/in_3') | |
// (16, 15, 'lutff_7/in_2') | |
// (16, 15, 'neigh_op_bnl_2') | |
// (16, 15, 'sp4_h_r_8') | |
// (16, 15, 'sp4_v_b_8') | |
// (17, 14, 'sp4_h_r_28') | |
// (17, 14, 'sp4_h_r_44') | |
// (17, 15, 'local_g1_5') | |
// (17, 15, 'lutff_6/in_2') | |
// (17, 15, 'sp4_h_r_21') | |
// (17, 15, 'sp4_r_v_b_39') | |
// (17, 16, 'local_g1_2') | |
// (17, 16, 'lutff_1/in_2') | |
// (17, 16, 'lutff_3/in_2') | |
// (17, 16, 'lutff_6/in_1') | |
// (17, 16, 'lutff_7/in_0') | |
// (17, 16, 'sp4_r_v_b_26') | |
// (17, 17, 'sp4_r_v_b_15') | |
// (17, 18, 'sp4_r_v_b_2') | |
// (18, 14, 'sp4_h_l_44') | |
// (18, 14, 'sp4_h_r_41') | |
// (18, 14, 'sp4_v_t_39') | |
// (18, 15, 'local_g2_0') | |
// (18, 15, 'lutff_3/in_3') | |
// (18, 15, 'sp4_h_r_32') | |
// (18, 15, 'sp4_r_v_b_44') | |
// (18, 15, 'sp4_v_b_39') | |
// (18, 16, 'sp4_r_v_b_33') | |
// (18, 16, 'sp4_v_b_26') | |
// (18, 17, 'sp4_r_v_b_20') | |
// (18, 17, 'sp4_v_b_15') | |
// (18, 18, 'sp4_r_v_b_9') | |
// (18, 18, 'sp4_v_b_2') | |
// (19, 14, 'sp4_h_l_41') | |
// (19, 14, 'sp4_v_t_44') | |
// (19, 15, 'local_g2_5') | |
// (19, 15, 'local_g3_5') | |
// (19, 15, 'ram/MASK_10') | |
// (19, 15, 'ram/MASK_11') | |
// (19, 15, 'ram/MASK_12') | |
// (19, 15, 'ram/MASK_13') | |
// (19, 15, 'ram/MASK_14') | |
// (19, 15, 'ram/MASK_15') | |
// (19, 15, 'ram/MASK_8') | |
// (19, 15, 'ram/MASK_9') | |
// (19, 15, 'sp4_h_r_45') | |
// (19, 15, 'sp4_v_b_44') | |
// (19, 16, 'local_g2_1') | |
// (19, 16, 'local_g3_1') | |
// (19, 16, 'ram/MASK_0') | |
// (19, 16, 'ram/MASK_1') | |
// (19, 16, 'ram/MASK_2') | |
// (19, 16, 'ram/MASK_3') | |
// (19, 16, 'ram/MASK_4') | |
// (19, 16, 'ram/MASK_5') | |
// (19, 16, 'ram/MASK_6') | |
// (19, 16, 'ram/MASK_7') | |
// (19, 16, 'sp4_v_b_33') | |
// (19, 17, 'sp4_v_b_20') | |
// (19, 18, 'sp4_v_b_9') | |
// (20, 15, 'sp4_h_l_45') | |
wire n473; | |
// (14, 13, 'neigh_op_tnr_3') | |
// (14, 14, 'neigh_op_rgt_3') | |
// (14, 15, 'neigh_op_bnr_3') | |
// (15, 13, 'neigh_op_top_3') | |
// (15, 14, 'lutff_3/out') | |
// (15, 14, 'sp4_h_r_6') | |
// (15, 15, 'neigh_op_bot_3') | |
// (16, 13, 'neigh_op_tnl_3') | |
// (16, 14, 'neigh_op_lft_3') | |
// (16, 14, 'sp4_h_r_19') | |
// (16, 15, 'neigh_op_bnl_3') | |
// (17, 14, 'sp4_h_r_30') | |
// (18, 14, 'sp4_h_r_43') | |
// (18, 15, 'sp4_r_v_b_43') | |
// (18, 16, 'sp4_r_v_b_30') | |
// (18, 17, 'sp4_r_v_b_19') | |
// (18, 18, 'sp4_r_v_b_6') | |
// (19, 14, 'sp4_h_l_43') | |
// (19, 14, 'sp4_v_t_43') | |
// (19, 15, 'local_g3_3') | |
// (19, 15, 'ram/WDATA_10') | |
// (19, 15, 'sp4_v_b_43') | |
// (19, 16, 'sp4_v_b_30') | |
// (19, 17, 'sp4_v_b_19') | |
// (19, 18, 'sp4_v_b_6') | |
wire n474; | |
// (14, 13, 'neigh_op_tnr_5') | |
// (14, 14, 'neigh_op_rgt_5') | |
// (14, 15, 'neigh_op_bnr_5') | |
// (15, 13, 'neigh_op_top_5') | |
// (15, 14, 'lutff_5/out') | |
// (15, 14, 'sp4_r_v_b_43') | |
// (15, 15, 'neigh_op_bot_5') | |
// (15, 15, 'sp4_r_v_b_30') | |
// (15, 16, 'sp4_r_v_b_19') | |
// (15, 17, 'sp4_r_v_b_6') | |
// (16, 13, 'neigh_op_tnl_5') | |
// (16, 13, 'sp4_v_t_43') | |
// (16, 14, 'neigh_op_lft_5') | |
// (16, 14, 'sp4_v_b_43') | |
// (16, 15, 'local_g2_5') | |
// (16, 15, 'lutff_7/in_0') | |
// (16, 15, 'neigh_op_bnl_5') | |
// (16, 15, 'sp4_v_b_30') | |
// (16, 16, 'local_g0_3') | |
// (16, 16, 'lutff_1/in_2') | |
// (16, 16, 'lutff_2/in_1') | |
// (16, 16, 'lutff_3/in_2') | |
// (16, 16, 'lutff_4/in_1') | |
// (16, 16, 'lutff_5/in_2') | |
// (16, 16, 'lutff_6/in_1') | |
// (16, 16, 'lutff_7/in_2') | |
// (16, 16, 'sp4_v_b_19') | |
// (16, 17, 'sp4_v_b_6') | |
reg n475 = 0; | |
// (14, 13, 'neigh_op_tnr_7') | |
// (14, 14, 'neigh_op_rgt_7') | |
// (14, 15, 'neigh_op_bnr_7') | |
// (15, 13, 'local_g0_7') | |
// (15, 13, 'lutff_6/in_1') | |
// (15, 13, 'neigh_op_top_7') | |
// (15, 14, 'lutff_7/out') | |
// (15, 15, 'neigh_op_bot_7') | |
// (16, 13, 'neigh_op_tnl_7') | |
// (16, 14, 'neigh_op_lft_7') | |
// (16, 15, 'neigh_op_bnl_7') | |
wire n476; | |
// (14, 13, 'sp4_h_r_8') | |
// (15, 13, 'local_g0_5') | |
// (15, 13, 'lutff_1/in_0') | |
// (15, 13, 'sp4_h_r_21') | |
// (16, 13, 'sp4_h_r_32') | |
// (17, 13, 'sp4_h_r_45') | |
// (18, 13, 'sp4_h_l_45') | |
// (18, 13, 'sp4_h_r_8') | |
// (19, 12, 'neigh_op_tnr_0') | |
// (19, 13, 'neigh_op_rgt_0') | |
// (19, 13, 'sp4_h_r_21') | |
// (19, 14, 'neigh_op_bnr_0') | |
// (20, 12, 'neigh_op_top_0') | |
// (20, 13, 'lutff_0/out') | |
// (20, 13, 'sp4_h_r_32') | |
// (20, 14, 'neigh_op_bot_0') | |
// (21, 12, 'neigh_op_tnl_0') | |
// (21, 13, 'neigh_op_lft_0') | |
// (21, 13, 'sp4_h_r_45') | |
// (21, 14, 'neigh_op_bnl_0') | |
// (22, 13, 'sp4_h_l_45') | |
wire n477; | |
// (14, 13, 'sp4_r_v_b_36') | |
// (14, 14, 'sp4_r_v_b_25') | |
// (14, 15, 'sp4_r_v_b_12') | |
// (14, 16, 'sp4_r_v_b_1') | |
// (15, 12, 'sp4_v_t_36') | |
// (15, 13, 'sp4_v_b_36') | |
// (15, 14, 'sp4_v_b_25') | |
// (15, 15, 'local_g0_4') | |
// (15, 15, 'lutff_0/in_0') | |
// (15, 15, 'sp4_v_b_12') | |
// (15, 16, 'sp4_h_r_8') | |
// (15, 16, 'sp4_v_b_1') | |
// (16, 16, 'sp4_h_r_21') | |
// (17, 16, 'sp4_h_r_32') | |
// (18, 15, 'neigh_op_tnr_0') | |
// (18, 16, 'neigh_op_rgt_0') | |
// (18, 16, 'sp4_h_r_45') | |
// (18, 17, 'neigh_op_bnr_0') | |
// (19, 15, 'neigh_op_top_0') | |
// (19, 16, 'ram/RDATA_7') | |
// (19, 16, 'sp4_h_l_45') | |
// (19, 16, 'sp4_h_r_0') | |
// (19, 17, 'neigh_op_bot_0') | |
// (20, 15, 'neigh_op_tnl_0') | |
// (20, 16, 'neigh_op_lft_0') | |
// (20, 16, 'sp4_h_r_13') | |
// (20, 17, 'neigh_op_bnl_0') | |
// (21, 16, 'sp4_h_r_24') | |
// (22, 16, 'sp4_h_r_37') | |
// (23, 16, 'sp4_h_l_37') | |
wire n478; | |
// (14, 13, 'sp4_r_v_b_41') | |
// (14, 14, 'sp4_r_v_b_28') | |
// (14, 15, 'local_g3_1') | |
// (14, 15, 'lutff_3/in_3') | |
// (14, 15, 'sp4_r_v_b_17') | |
// (14, 16, 'sp4_r_v_b_4') | |
// (15, 12, 'sp4_v_t_41') | |
// (15, 13, 'sp4_v_b_41') | |
// (15, 14, 'sp4_v_b_28') | |
// (15, 15, 'sp4_v_b_17') | |
// (15, 16, 'sp4_h_r_4') | |
// (15, 16, 'sp4_v_b_4') | |
// (16, 16, 'sp4_h_r_17') | |
// (17, 16, 'sp4_h_r_28') | |
// (18, 15, 'neigh_op_tnr_4') | |
// (18, 16, 'neigh_op_rgt_4') | |
// (18, 16, 'sp4_h_r_41') | |
// (18, 17, 'neigh_op_bnr_4') | |
// (19, 15, 'neigh_op_top_4') | |
// (19, 16, 'ram/RDATA_3') | |
// (19, 16, 'sp4_h_l_41') | |
// (19, 16, 'sp4_h_r_8') | |
// (19, 17, 'neigh_op_bot_4') | |
// (20, 15, 'neigh_op_tnl_4') | |
// (20, 16, 'neigh_op_lft_4') | |
// (20, 16, 'sp4_h_r_21') | |
// (20, 17, 'neigh_op_bnl_4') | |
// (21, 16, 'sp4_h_r_32') | |
// (22, 16, 'sp4_h_r_45') | |
// (23, 16, 'sp4_h_l_45') | |
wire n479; | |
// (14, 13, 'sp4_r_v_b_42') | |
// (14, 14, 'local_g0_7') | |
// (14, 14, 'lutff_5/in_2') | |
// (14, 14, 'sp4_r_v_b_31') | |
// (14, 15, 'local_g3_2') | |
// (14, 15, 'lutff_7/in_2') | |
// (14, 15, 'sp4_r_v_b_18') | |
// (14, 16, 'sp4_r_v_b_7') | |
// (15, 12, 'sp4_v_t_42') | |
// (15, 13, 'sp4_v_b_42') | |
// (15, 14, 'sp4_v_b_31') | |
// (15, 15, 'sp4_v_b_18') | |
// (15, 16, 'sp4_h_r_2') | |
// (15, 16, 'sp4_v_b_7') | |
// (16, 16, 'sp4_h_r_15') | |
// (17, 16, 'sp4_h_r_26') | |
// (18, 15, 'neigh_op_tnr_1') | |
// (18, 16, 'neigh_op_rgt_1') | |
// (18, 16, 'sp4_h_r_39') | |
// (18, 17, 'neigh_op_bnr_1') | |
// (19, 15, 'neigh_op_top_1') | |
// (19, 16, 'ram/RDATA_6') | |
// (19, 16, 'sp4_h_l_39') | |
// (19, 16, 'sp4_h_r_2') | |
// (19, 17, 'neigh_op_bot_1') | |
// (20, 15, 'neigh_op_tnl_1') | |
// (20, 16, 'neigh_op_lft_1') | |
// (20, 16, 'sp4_h_r_15') | |
// (20, 17, 'neigh_op_bnl_1') | |
// (21, 16, 'sp4_h_r_26') | |
// (22, 16, 'sp4_h_r_39') | |
// (23, 16, 'sp4_h_l_39') | |
wire n480; | |
// (14, 14, 'neigh_op_tnr_1') | |
// (14, 15, 'neigh_op_rgt_1') | |
// (14, 16, 'neigh_op_bnr_1') | |
// (15, 13, 'sp4_r_v_b_43') | |
// (15, 14, 'neigh_op_top_1') | |
// (15, 14, 'sp4_r_v_b_30') | |
// (15, 15, 'local_g3_1') | |
// (15, 15, 'lutff_1/out') | |
// (15, 15, 'lutff_7/in_1') | |
// (15, 15, 'sp4_r_v_b_19') | |
// (15, 16, 'neigh_op_bot_1') | |
// (15, 16, 'sp4_r_v_b_6') | |
// (16, 12, 'sp4_v_t_43') | |
// (16, 13, 'sp4_v_b_43') | |
// (16, 14, 'neigh_op_tnl_1') | |
// (16, 14, 'sp4_v_b_30') | |
// (16, 15, 'neigh_op_lft_1') | |
// (16, 15, 'sp4_v_b_19') | |
// (16, 16, 'neigh_op_bnl_1') | |
// (16, 16, 'sp4_h_r_0') | |
// (16, 16, 'sp4_v_b_6') | |
// (17, 16, 'sp4_h_r_13') | |
// (18, 16, 'sp4_h_r_24') | |
// (19, 16, 'local_g3_5') | |
// (19, 16, 'ram/WDATA_4') | |
// (19, 16, 'sp4_h_r_37') | |
// (20, 16, 'sp4_h_l_37') | |
reg n481 = 0; | |
// (14, 14, 'neigh_op_tnr_2') | |
// (14, 15, 'neigh_op_rgt_2') | |
// (14, 16, 'neigh_op_bnr_2') | |
// (15, 14, 'neigh_op_top_2') | |
// (15, 15, 'local_g0_2') | |
// (15, 15, 'lutff_0/in_2') | |
// (15, 15, 'lutff_2/out') | |
// (15, 16, 'neigh_op_bot_2') | |
// (16, 14, 'neigh_op_tnl_2') | |
// (16, 15, 'neigh_op_lft_2') | |
// (16, 16, 'neigh_op_bnl_2') | |
wire n482; | |
// (14, 14, 'neigh_op_tnr_5') | |
// (14, 15, 'neigh_op_rgt_5') | |
// (14, 16, 'neigh_op_bnr_5') | |
// (15, 14, 'neigh_op_top_5') | |
// (15, 15, 'local_g1_5') | |
// (15, 15, 'lutff_2/in_2') | |
// (15, 15, 'lutff_5/out') | |
// (15, 15, 'sp4_h_r_10') | |
// (15, 16, 'neigh_op_bot_5') | |
// (16, 14, 'neigh_op_tnl_5') | |
// (16, 15, 'neigh_op_lft_5') | |
// (16, 15, 'sp4_h_r_23') | |
// (16, 16, 'neigh_op_bnl_5') | |
// (17, 15, 'sp4_h_r_34') | |
// (18, 15, 'sp4_h_r_47') | |
// (18, 16, 'sp4_r_v_b_47') | |
// (18, 17, 'sp4_r_v_b_34') | |
// (18, 18, 'sp4_r_v_b_23') | |
// (18, 19, 'sp4_r_v_b_10') | |
// (19, 15, 'sp4_h_l_47') | |
// (19, 15, 'sp4_v_t_47') | |
// (19, 16, 'local_g2_7') | |
// (19, 16, 'ram/WDATA_7') | |
// (19, 16, 'sp4_v_b_47') | |
// (19, 17, 'sp4_v_b_34') | |
// (19, 18, 'sp4_v_b_23') | |
// (19, 19, 'sp4_v_b_10') | |
wire n483; | |
// (14, 14, 'neigh_op_tnr_6') | |
// (14, 15, 'neigh_op_rgt_6') | |
// (14, 15, 'sp4_h_r_1') | |
// (14, 16, 'neigh_op_bnr_6') | |
// (15, 13, 'sp4_r_v_b_37') | |
// (15, 14, 'neigh_op_top_6') | |
// (15, 14, 'sp4_r_v_b_24') | |
// (15, 15, 'lutff_6/out') | |
// (15, 15, 'sp4_h_r_12') | |
// (15, 15, 'sp4_r_v_b_13') | |
// (15, 16, 'neigh_op_bot_6') | |
// (15, 16, 'sp4_r_v_b_0') | |
// (16, 12, 'sp4_v_t_37') | |
// (16, 13, 'sp4_v_b_37') | |
// (16, 14, 'neigh_op_tnl_6') | |
// (16, 14, 'sp4_v_b_24') | |
// (16, 15, 'neigh_op_lft_6') | |
// (16, 15, 'sp4_h_r_25') | |
// (16, 15, 'sp4_v_b_13') | |
// (16, 16, 'neigh_op_bnl_6') | |
// (16, 16, 'sp4_h_r_6') | |
// (16, 16, 'sp4_v_b_0') | |
// (17, 15, 'local_g2_4') | |
// (17, 15, 'lutff_2/in_2') | |
// (17, 15, 'sp4_h_r_36') | |
// (17, 16, 'sp4_h_r_19') | |
// (18, 15, 'sp4_h_l_36') | |
// (18, 16, 'sp4_h_r_30') | |
// (19, 16, 'local_g2_3') | |
// (19, 16, 'ram/WDATA_5') | |
// (19, 16, 'sp4_h_r_43') | |
// (20, 16, 'sp4_h_l_43') | |
reg n484 = 0; | |
// (14, 14, 'neigh_op_tnr_7') | |
// (14, 15, 'neigh_op_rgt_7') | |
// (14, 16, 'neigh_op_bnr_7') | |
// (15, 14, 'neigh_op_top_7') | |
// (15, 15, 'local_g3_7') | |
// (15, 15, 'lutff_4/in_2') | |
// (15, 15, 'lutff_7/out') | |
// (15, 16, 'neigh_op_bot_7') | |
// (16, 14, 'neigh_op_tnl_7') | |
// (16, 15, 'neigh_op_lft_7') | |
// (16, 16, 'neigh_op_bnl_7') | |
wire n485; | |
// (14, 15, 'local_g0_7') | |
// (14, 15, 'lutff_0/in_1') | |
// (14, 15, 'sp4_h_r_7') | |
// (15, 15, 'sp4_h_r_18') | |
// (16, 12, 'local_g3_7') | |
// (16, 12, 'lutff_5/in_1') | |
// (16, 12, 'sp4_r_v_b_47') | |
// (16, 13, 'sp4_r_v_b_34') | |
// (16, 14, 'neigh_op_tnr_5') | |
// (16, 14, 'sp4_r_v_b_23') | |
// (16, 15, 'neigh_op_rgt_5') | |
// (16, 15, 'sp4_h_r_31') | |
// (16, 15, 'sp4_r_v_b_10') | |
// (16, 16, 'neigh_op_bnr_5') | |
// (17, 11, 'sp4_v_t_47') | |
// (17, 12, 'sp4_v_b_47') | |
// (17, 13, 'sp4_v_b_34') | |
// (17, 14, 'neigh_op_top_5') | |
// (17, 14, 'sp4_v_b_23') | |
// (17, 15, 'lutff_5/out') | |
// (17, 15, 'sp4_h_r_42') | |
// (17, 15, 'sp4_v_b_10') | |
// (17, 16, 'neigh_op_bot_5') | |
// (18, 14, 'neigh_op_tnl_5') | |
// (18, 15, 'neigh_op_lft_5') | |
// (18, 15, 'sp4_h_l_42') | |
// (18, 16, 'neigh_op_bnl_5') | |
wire n486; | |
// (14, 15, 'sp4_h_r_8') | |
// (15, 14, 'neigh_op_tnr_0') | |
// (15, 15, 'neigh_op_rgt_0') | |
// (15, 15, 'sp4_h_r_21') | |
// (15, 16, 'neigh_op_bnr_0') | |
// (16, 13, 'sp4_r_v_b_41') | |
// (16, 14, 'neigh_op_top_0') | |
// (16, 14, 'sp4_r_v_b_28') | |
// (16, 15, 'local_g1_0') | |
// (16, 15, 'lutff_0/out') | |
// (16, 15, 'lutff_1/in_2') | |
// (16, 15, 'sp4_h_r_32') | |
// (16, 15, 'sp4_r_v_b_17') | |
// (16, 16, 'neigh_op_bot_0') | |
// (16, 16, 'sp4_r_v_b_4') | |
// (17, 12, 'sp4_v_t_41') | |
// (17, 13, 'sp4_v_b_41') | |
// (17, 14, 'neigh_op_tnl_0') | |
// (17, 14, 'sp4_v_b_28') | |
// (17, 15, 'local_g0_0') | |
// (17, 15, 'lutff_0/in_2') | |
// (17, 15, 'neigh_op_lft_0') | |
// (17, 15, 'sp4_h_r_45') | |
// (17, 15, 'sp4_v_b_17') | |
// (17, 16, 'neigh_op_bnl_0') | |
// (17, 16, 'sp4_h_r_4') | |
// (17, 16, 'sp4_v_b_4') | |
// (18, 15, 'local_g1_4') | |
// (18, 15, 'lutff_2/in_3') | |
// (18, 15, 'sp4_h_l_45') | |
// (18, 15, 'sp4_h_r_4') | |
// (18, 16, 'sp4_h_r_17') | |
// (19, 15, 'sp4_h_r_17') | |
// (19, 16, 'local_g2_4') | |
// (19, 16, 'ram/WADDR_5') | |
// (19, 16, 'sp4_h_r_28') | |
// (20, 15, 'sp4_h_r_28') | |
// (20, 16, 'sp4_h_r_41') | |
// (21, 15, 'sp4_h_r_41') | |
// (21, 16, 'sp4_h_l_41') | |
// (22, 15, 'sp4_h_l_41') | |
wire \pins[3] ; | |
// (15, 0, 'io_0/PAD') | |
wire n488; | |
// (15, 1, 'neigh_op_bnr_0') | |
// (15, 1, 'neigh_op_bnr_4') | |
// (16, 0, 'io_0/D_IN_0') | |
// (16, 0, 'span12_vert_16') | |
// (16, 1, 'neigh_op_bot_0') | |
// (16, 1, 'neigh_op_bot_4') | |
// (16, 1, 'sp12_v_b_16') | |
// (16, 2, 'sp12_v_b_15') | |
// (16, 3, 'sp12_v_b_12') | |
// (16, 4, 'sp12_v_b_11') | |
// (16, 5, 'sp12_v_b_8') | |
// (16, 6, 'sp12_v_b_7') | |
// (16, 7, 'sp12_v_b_4') | |
// (16, 8, 'sp12_v_b_3') | |
// (16, 9, 'local_g2_0') | |
// (16, 9, 'lutff_3/in_1') | |
// (16, 9, 'sp12_v_b_0') | |
// (17, 1, 'neigh_op_bnl_0') | |
// (17, 1, 'neigh_op_bnl_4') | |
reg n489 = 0; | |
// (15, 1, 'neigh_op_tnr_2') | |
// (15, 1, 'sp4_r_v_b_17') | |
// (15, 2, 'neigh_op_rgt_2') | |
// (15, 2, 'sp4_r_v_b_4') | |
// (15, 3, 'neigh_op_bnr_2') | |
// (16, 0, 'io_0/D_OUT_0') | |
// (16, 0, 'local_g1_1') | |
// (16, 0, 'span4_vert_17') | |
// (16, 1, 'neigh_op_top_2') | |
// (16, 1, 'sp4_v_b_17') | |
// (16, 2, 'lutff_2/out') | |
// (16, 2, 'sp4_v_b_4') | |
// (16, 3, 'neigh_op_bot_2') | |
// (17, 1, 'neigh_op_tnl_2') | |
// (17, 2, 'neigh_op_lft_2') | |
// (17, 3, 'neigh_op_bnl_2') | |
wire n490; | |
// (15, 5, 'neigh_op_tnr_2') | |
// (15, 6, 'neigh_op_rgt_2') | |
// (15, 7, 'neigh_op_bnr_2') | |
// (16, 5, 'neigh_op_top_2') | |
// (16, 6, 'lutff_2/out') | |
// (16, 7, 'local_g1_2') | |
// (16, 7, 'lutff_7/in_0') | |
// (16, 7, 'neigh_op_bot_2') | |
// (17, 5, 'neigh_op_tnl_2') | |
// (17, 6, 'neigh_op_lft_2') | |
// (17, 7, 'neigh_op_bnl_2') | |
wire n491; | |
// (15, 5, 'neigh_op_tnr_3') | |
// (15, 6, 'neigh_op_rgt_3') | |
// (15, 7, 'neigh_op_bnr_3') | |
// (16, 5, 'neigh_op_top_3') | |
// (16, 6, 'lutff_3/out') | |
// (16, 7, 'local_g0_3') | |
// (16, 7, 'lutff_3/in_0') | |
// (16, 7, 'neigh_op_bot_3') | |
// (17, 5, 'neigh_op_tnl_3') | |
// (17, 6, 'neigh_op_lft_3') | |
// (17, 7, 'neigh_op_bnl_3') | |
wire n492; | |
// (15, 5, 'neigh_op_tnr_4') | |
// (15, 5, 'sp4_r_v_b_37') | |
// (15, 6, 'neigh_op_rgt_4') | |
// (15, 6, 'sp4_r_v_b_24') | |
// (15, 7, 'neigh_op_bnr_4') | |
// (15, 7, 'sp4_r_v_b_13') | |
// (15, 8, 'sp4_r_v_b_0') | |
// (16, 4, 'sp4_v_t_37') | |
// (16, 5, 'neigh_op_top_4') | |
// (16, 5, 'sp4_v_b_37') | |
// (16, 6, 'lutff_4/out') | |
// (16, 6, 'sp4_v_b_24') | |
// (16, 7, 'neigh_op_bot_4') | |
// (16, 7, 'sp4_v_b_13') | |
// (16, 8, 'local_g0_0') | |
// (16, 8, 'lutff_1/in_1') | |
// (16, 8, 'sp4_v_b_0') | |
// (17, 5, 'neigh_op_tnl_4') | |
// (17, 6, 'neigh_op_lft_4') | |
// (17, 7, 'neigh_op_bnl_4') | |
wire n493; | |
// (15, 5, 'neigh_op_tnr_5') | |
// (15, 6, 'neigh_op_rgt_5') | |
// (15, 7, 'neigh_op_bnr_5') | |
// (16, 5, 'neigh_op_top_5') | |
// (16, 6, 'lutff_5/out') | |
// (16, 7, 'local_g1_5') | |
// (16, 7, 'lutff_5/in_1') | |
// (16, 7, 'neigh_op_bot_5') | |
// (17, 5, 'neigh_op_tnl_5') | |
// (17, 6, 'neigh_op_lft_5') | |
// (17, 7, 'neigh_op_bnl_5') | |
wire n494; | |
// (15, 5, 'neigh_op_tnr_6') | |
// (15, 6, 'neigh_op_rgt_6') | |
// (15, 7, 'neigh_op_bnr_6') | |
// (16, 5, 'neigh_op_top_6') | |
// (16, 6, 'lutff_6/out') | |
// (16, 7, 'local_g0_6') | |
// (16, 7, 'lutff_0/in_2') | |
// (16, 7, 'neigh_op_bot_6') | |
// (17, 5, 'neigh_op_tnl_6') | |
// (17, 6, 'neigh_op_lft_6') | |
// (17, 7, 'neigh_op_bnl_6') | |
wire n495; | |
// (15, 5, 'neigh_op_tnr_7') | |
// (15, 6, 'neigh_op_rgt_7') | |
// (15, 6, 'sp4_r_v_b_46') | |
// (15, 7, 'neigh_op_bnr_7') | |
// (15, 7, 'sp4_r_v_b_35') | |
// (15, 8, 'sp4_r_v_b_22') | |
// (15, 9, 'sp4_r_v_b_11') | |
// (16, 5, 'neigh_op_top_7') | |
// (16, 5, 'sp4_v_t_46') | |
// (16, 6, 'lutff_7/out') | |
// (16, 6, 'sp4_v_b_46') | |
// (16, 7, 'neigh_op_bot_7') | |
// (16, 7, 'sp4_v_b_35') | |
// (16, 8, 'local_g0_6') | |
// (16, 8, 'lutff_4/in_2') | |
// (16, 8, 'sp4_v_b_22') | |
// (16, 9, 'sp4_v_b_11') | |
// (17, 5, 'neigh_op_tnl_7') | |
// (17, 6, 'neigh_op_lft_7') | |
// (17, 7, 'neigh_op_bnl_7') | |
wire n496; | |
// (15, 5, 'sp4_r_v_b_41') | |
// (15, 6, 'sp4_r_v_b_28') | |
// (15, 7, 'neigh_op_tnr_2') | |
// (15, 7, 'sp4_r_v_b_17') | |
// (15, 8, 'neigh_op_rgt_2') | |
// (15, 8, 'sp4_r_v_b_4') | |
// (15, 9, 'neigh_op_bnr_2') | |
// (16, 4, 'sp4_v_t_41') | |
// (16, 5, 'sp4_v_b_41') | |
// (16, 6, 'local_g3_4') | |
// (16, 6, 'lutff_1/in_2') | |
// (16, 6, 'lutff_2/in_1') | |
// (16, 6, 'lutff_3/in_2') | |
// (16, 6, 'lutff_4/in_1') | |
// (16, 6, 'lutff_5/in_2') | |
// (16, 6, 'lutff_6/in_1') | |
// (16, 6, 'lutff_7/in_0') | |
// (16, 6, 'sp4_v_b_28') | |
// (16, 7, 'neigh_op_top_2') | |
// (16, 7, 'sp4_v_b_17') | |
// (16, 8, 'lutff_2/out') | |
// (16, 8, 'sp4_v_b_4') | |
// (16, 9, 'neigh_op_bot_2') | |
// (17, 7, 'neigh_op_tnl_2') | |
// (17, 8, 'neigh_op_lft_2') | |
// (17, 9, 'neigh_op_bnl_2') | |
reg n497 = 0; | |
// (15, 5, 'sp4_r_v_b_43') | |
// (15, 6, 'sp4_r_v_b_30') | |
// (15, 7, 'neigh_op_tnr_3') | |
// (15, 7, 'sp4_r_v_b_19') | |
// (15, 8, 'neigh_op_rgt_3') | |
// (15, 8, 'sp4_r_v_b_6') | |
// (15, 9, 'neigh_op_bnr_3') | |
// (16, 4, 'sp4_v_t_43') | |
// (16, 5, 'sp4_v_b_43') | |
// (16, 6, 'local_g2_6') | |
// (16, 6, 'lutff_7/in_1') | |
// (16, 6, 'sp4_v_b_30') | |
// (16, 7, 'neigh_op_top_3') | |
// (16, 7, 'sp4_v_b_19') | |
// (16, 8, 'local_g2_3') | |
// (16, 8, 'lutff_3/out') | |
// (16, 8, 'lutff_4/in_3') | |
// (16, 8, 'sp4_v_b_6') | |
// (16, 9, 'neigh_op_bot_3') | |
// (17, 7, 'neigh_op_tnl_3') | |
// (17, 8, 'neigh_op_lft_3') | |
// (17, 9, 'neigh_op_bnl_3') | |
reg n498 = 0; | |
// (15, 5, 'sp4_r_v_b_47') | |
// (15, 6, 'sp4_r_v_b_34') | |
// (15, 7, 'neigh_op_tnr_5') | |
// (15, 7, 'sp4_r_v_b_23') | |
// (15, 8, 'neigh_op_rgt_5') | |
// (15, 8, 'sp4_r_v_b_10') | |
// (15, 9, 'neigh_op_bnr_5') | |
// (16, 4, 'sp4_v_t_47') | |
// (16, 5, 'sp4_v_b_47') | |
// (16, 6, 'local_g2_2') | |
// (16, 6, 'lutff_0/in_2') | |
// (16, 6, 'sp4_v_b_34') | |
// (16, 7, 'neigh_op_top_5') | |
// (16, 7, 'sp4_v_b_23') | |
// (16, 8, 'local_g2_5') | |
// (16, 8, 'lutff_5/out') | |
// (16, 8, 'lutff_7/in_0') | |
// (16, 8, 'sp4_v_b_10') | |
// (16, 9, 'local_g1_5') | |
// (16, 9, 'lutff_5/in_3') | |
// (16, 9, 'lutff_7/in_1') | |
// (16, 9, 'neigh_op_bot_5') | |
// (17, 7, 'neigh_op_tnl_5') | |
// (17, 8, 'neigh_op_lft_5') | |
// (17, 9, 'neigh_op_bnl_5') | |
wire n499; | |
// (15, 6, 'neigh_op_tnr_0') | |
// (15, 7, 'neigh_op_rgt_0') | |
// (15, 8, 'neigh_op_bnr_0') | |
// (16, 6, 'neigh_op_top_0') | |
// (16, 7, 'local_g2_0') | |
// (16, 7, 'lutff_0/out') | |
// (16, 7, 'lutff_4/in_2') | |
// (16, 7, 'sp4_h_r_0') | |
// (16, 8, 'neigh_op_bot_0') | |
// (17, 6, 'neigh_op_tnl_0') | |
// (17, 7, 'neigh_op_lft_0') | |
// (17, 7, 'sp4_h_r_13') | |
// (17, 8, 'local_g3_0') | |
// (17, 8, 'lutff_6/in_3') | |
// (17, 8, 'neigh_op_bnl_0') | |
// (18, 7, 'sp4_h_r_24') | |
// (19, 7, 'sp4_h_r_37') | |
// (19, 8, 'sp4_r_v_b_37') | |
// (19, 9, 'sp4_r_v_b_24') | |
// (19, 10, 'local_g2_5') | |
// (19, 10, 'ram/WADDR_6') | |
// (19, 10, 'sp4_r_v_b_13') | |
// (19, 11, 'sp4_r_v_b_0') | |
// (20, 7, 'sp4_h_l_37') | |
// (20, 7, 'sp4_v_t_37') | |
// (20, 8, 'sp4_v_b_37') | |
// (20, 9, 'local_g2_0') | |
// (20, 9, 'lutff_4/in_2') | |
// (20, 9, 'sp4_v_b_24') | |
// (20, 10, 'sp4_v_b_13') | |
// (20, 11, 'sp4_v_b_0') | |
reg n500 = 0; | |
// (15, 6, 'neigh_op_tnr_1') | |
// (15, 7, 'neigh_op_rgt_1') | |
// (15, 8, 'neigh_op_bnr_1') | |
// (16, 6, 'local_g1_1') | |
// (16, 6, 'lutff_3/in_1') | |
// (16, 6, 'neigh_op_top_1') | |
// (16, 7, 'local_g1_1') | |
// (16, 7, 'lutff_1/out') | |
// (16, 7, 'lutff_3/in_1') | |
// (16, 8, 'neigh_op_bot_1') | |
// (17, 6, 'neigh_op_tnl_1') | |
// (17, 7, 'neigh_op_lft_1') | |
// (17, 8, 'neigh_op_bnl_1') | |
reg n501 = 0; | |
// (15, 6, 'neigh_op_tnr_2') | |
// (15, 7, 'neigh_op_rgt_2') | |
// (15, 8, 'neigh_op_bnr_2') | |
// (16, 6, 'local_g0_2') | |
// (16, 6, 'lutff_2/in_2') | |
// (16, 6, 'neigh_op_top_2') | |
// (16, 7, 'local_g2_2') | |
// (16, 7, 'lutff_2/out') | |
// (16, 7, 'lutff_7/in_1') | |
// (16, 8, 'neigh_op_bot_2') | |
// (17, 6, 'neigh_op_tnl_2') | |
// (17, 7, 'neigh_op_lft_2') | |
// (17, 8, 'neigh_op_bnl_2') | |
wire n502; | |
// (15, 6, 'neigh_op_tnr_3') | |
// (15, 7, 'neigh_op_rgt_3') | |
// (15, 7, 'sp4_h_r_11') | |
// (15, 8, 'neigh_op_bnr_3') | |
// (16, 6, 'neigh_op_top_3') | |
// (16, 7, 'local_g1_3') | |
// (16, 7, 'lutff_1/in_1') | |
// (16, 7, 'lutff_3/out') | |
// (16, 7, 'sp4_h_r_22') | |
// (16, 7, 'sp4_h_r_6') | |
// (16, 8, 'neigh_op_bot_3') | |
// (17, 6, 'neigh_op_tnl_3') | |
// (17, 7, 'neigh_op_lft_3') | |
// (17, 7, 'sp4_h_r_19') | |
// (17, 7, 'sp4_h_r_35') | |
// (17, 8, 'local_g2_3') | |
// (17, 8, 'lutff_3/in_0') | |
// (17, 8, 'neigh_op_bnl_3') | |
// (18, 7, 'sp4_h_r_30') | |
// (18, 7, 'sp4_h_r_46') | |
// (18, 8, 'sp4_r_v_b_41') | |
// (18, 9, 'sp4_r_v_b_28') | |
// (18, 10, 'sp4_r_v_b_17') | |
// (18, 11, 'sp4_r_v_b_4') | |
// (19, 7, 'sp4_h_l_46') | |
// (19, 7, 'sp4_h_r_43') | |
// (19, 7, 'sp4_v_t_41') | |
// (19, 8, 'sp4_r_v_b_43') | |
// (19, 8, 'sp4_v_b_41') | |
// (19, 9, 'sp4_r_v_b_30') | |
// (19, 9, 'sp4_v_b_28') | |
// (19, 10, 'local_g1_1') | |
// (19, 10, 'ram/WADDR_3') | |
// (19, 10, 'sp4_r_v_b_19') | |
// (19, 10, 'sp4_v_b_17') | |
// (19, 11, 'sp4_r_v_b_6') | |
// (19, 11, 'sp4_v_b_4') | |
// (20, 7, 'sp4_h_l_43') | |
// (20, 7, 'sp4_v_t_43') | |
// (20, 8, 'sp4_v_b_43') | |
// (20, 9, 'local_g2_6') | |
// (20, 9, 'lutff_1/in_1') | |
// (20, 9, 'sp4_v_b_30') | |
// (20, 10, 'sp4_v_b_19') | |
// (20, 11, 'sp4_v_b_6') | |
reg n503 = 0; | |
// (15, 6, 'neigh_op_tnr_4') | |
// (15, 7, 'neigh_op_rgt_4') | |
// (15, 8, 'neigh_op_bnr_4') | |
// (16, 6, 'local_g0_4') | |
// (16, 6, 'lutff_6/in_2') | |
// (16, 6, 'neigh_op_top_4') | |
// (16, 7, 'local_g2_4') | |
// (16, 7, 'lutff_0/in_0') | |
// (16, 7, 'lutff_4/out') | |
// (16, 8, 'neigh_op_bot_4') | |
// (17, 6, 'neigh_op_tnl_4') | |
// (17, 7, 'neigh_op_lft_4') | |
// (17, 8, 'neigh_op_bnl_4') | |
wire n504; | |
// (15, 6, 'neigh_op_tnr_5') | |
// (15, 7, 'neigh_op_rgt_5') | |
// (15, 8, 'neigh_op_bnr_5') | |
// (16, 6, 'neigh_op_top_5') | |
// (16, 6, 'sp4_r_v_b_38') | |
// (16, 7, 'local_g3_5') | |
// (16, 7, 'lutff_5/out') | |
// (16, 7, 'lutff_6/in_0') | |
// (16, 7, 'sp4_h_r_10') | |
// (16, 7, 'sp4_r_v_b_27') | |
// (16, 8, 'neigh_op_bot_5') | |
// (16, 8, 'sp4_r_v_b_14') | |
// (16, 9, 'sp4_r_v_b_3') | |
// (17, 5, 'sp4_v_t_38') | |
// (17, 6, 'neigh_op_tnl_5') | |
// (17, 6, 'sp4_v_b_38') | |
// (17, 7, 'neigh_op_lft_5') | |
// (17, 7, 'sp4_h_r_23') | |
// (17, 7, 'sp4_v_b_27') | |
// (17, 8, 'local_g3_5') | |
// (17, 8, 'lutff_3/in_3') | |
// (17, 8, 'neigh_op_bnl_5') | |
// (17, 8, 'sp4_v_b_14') | |
// (17, 9, 'sp4_h_r_9') | |
// (17, 9, 'sp4_v_b_3') | |
// (18, 7, 'sp4_h_r_34') | |
// (18, 9, 'local_g0_4') | |
// (18, 9, 'lutff_2/in_0') | |
// (18, 9, 'sp4_h_r_20') | |
// (19, 7, 'sp4_h_r_47') | |
// (19, 8, 'sp4_r_v_b_38') | |
// (19, 9, 'sp4_h_r_33') | |
// (19, 9, 'sp4_r_v_b_27') | |
// (19, 10, 'local_g2_6') | |
// (19, 10, 'ram/WADDR_5') | |
// (19, 10, 'sp4_r_v_b_14') | |
// (19, 11, 'sp4_r_v_b_3') | |
// (20, 7, 'sp4_h_l_47') | |
// (20, 7, 'sp4_v_t_38') | |
// (20, 8, 'sp4_v_b_38') | |
// (20, 9, 'sp4_h_r_44') | |
// (20, 9, 'sp4_v_b_27') | |
// (20, 10, 'sp4_v_b_14') | |
// (20, 11, 'sp4_v_b_3') | |
// (21, 9, 'sp4_h_l_44') | |
reg n505 = 0; | |
// (15, 6, 'neigh_op_tnr_6') | |
// (15, 7, 'neigh_op_rgt_6') | |
// (15, 8, 'neigh_op_bnr_6') | |
// (16, 6, 'local_g0_6') | |
// (16, 6, 'lutff_5/in_1') | |
// (16, 6, 'neigh_op_top_6') | |
// (16, 7, 'local_g2_6') | |
// (16, 7, 'lutff_5/in_3') | |
// (16, 7, 'lutff_6/out') | |
// (16, 8, 'neigh_op_bot_6') | |
// (17, 6, 'neigh_op_tnl_6') | |
// (17, 7, 'neigh_op_lft_6') | |
// (17, 8, 'neigh_op_bnl_6') | |
wire n506; | |
// (15, 6, 'neigh_op_tnr_7') | |
// (15, 7, 'neigh_op_rgt_7') | |
// (15, 7, 'sp4_h_r_3') | |
// (15, 8, 'neigh_op_bnr_7') | |
// (16, 6, 'neigh_op_top_7') | |
// (16, 7, 'local_g0_7') | |
// (16, 7, 'lutff_2/in_3') | |
// (16, 7, 'lutff_7/out') | |
// (16, 7, 'sp4_h_r_14') | |
// (16, 7, 'sp4_r_v_b_47') | |
// (16, 8, 'neigh_op_bot_7') | |
// (16, 8, 'sp4_r_v_b_34') | |
// (16, 9, 'sp4_r_v_b_23') | |
// (16, 10, 'sp4_r_v_b_10') | |
// (17, 6, 'neigh_op_tnl_7') | |
// (17, 6, 'sp4_v_t_47') | |
// (17, 7, 'neigh_op_lft_7') | |
// (17, 7, 'sp4_h_r_27') | |
// (17, 7, 'sp4_v_b_47') | |
// (17, 8, 'local_g3_7') | |
// (17, 8, 'lutff_3/in_1') | |
// (17, 8, 'neigh_op_bnl_7') | |
// (17, 8, 'sp4_v_b_34') | |
// (17, 9, 'sp4_v_b_23') | |
// (17, 10, 'sp4_h_r_10') | |
// (17, 10, 'sp4_v_b_10') | |
// (18, 7, 'sp4_h_r_38') | |
// (18, 8, 'sp4_r_v_b_45') | |
// (18, 9, 'sp4_r_v_b_32') | |
// (18, 10, 'sp4_h_r_23') | |
// (18, 10, 'sp4_r_v_b_21') | |
// (18, 11, 'sp4_r_v_b_8') | |
// (19, 7, 'sp4_h_l_38') | |
// (19, 7, 'sp4_v_t_45') | |
// (19, 8, 'sp4_v_b_45') | |
// (19, 9, 'sp4_v_b_32') | |
// (19, 10, 'local_g0_5') | |
// (19, 10, 'ram/WADDR_2') | |
// (19, 10, 'sp4_h_r_34') | |
// (19, 10, 'sp4_v_b_21') | |
// (19, 11, 'sp4_v_b_8') | |
// (20, 7, 'sp4_r_v_b_41') | |
// (20, 8, 'sp4_r_v_b_28') | |
// (20, 9, 'local_g3_1') | |
// (20, 9, 'lutff_7/in_1') | |
// (20, 9, 'sp4_r_v_b_17') | |
// (20, 10, 'sp4_h_r_47') | |
// (20, 10, 'sp4_r_v_b_4') | |
// (21, 6, 'sp4_v_t_41') | |
// (21, 7, 'sp4_v_b_41') | |
// (21, 8, 'sp4_v_b_28') | |
// (21, 9, 'sp4_v_b_17') | |
// (21, 10, 'sp4_h_l_47') | |
// (21, 10, 'sp4_v_b_4') | |
reg n507 = 0; | |
// (15, 6, 'sp4_r_v_b_36') | |
// (15, 7, 'neigh_op_tnr_6') | |
// (15, 7, 'sp4_r_v_b_25') | |
// (15, 8, 'neigh_op_rgt_6') | |
// (15, 8, 'sp4_r_v_b_12') | |
// (15, 9, 'neigh_op_bnr_6') | |
// (15, 9, 'sp4_r_v_b_1') | |
// (16, 5, 'sp4_v_t_36') | |
// (16, 6, 'local_g2_4') | |
// (16, 6, 'lutff_4/in_2') | |
// (16, 6, 'sp4_v_b_36') | |
// (16, 7, 'neigh_op_top_6') | |
// (16, 7, 'sp4_v_b_25') | |
// (16, 8, 'local_g1_6') | |
// (16, 8, 'lutff_1/in_0') | |
// (16, 8, 'lutff_6/out') | |
// (16, 8, 'sp4_v_b_12') | |
// (16, 9, 'neigh_op_bot_6') | |
// (16, 9, 'sp4_v_b_1') | |
// (17, 7, 'neigh_op_tnl_6') | |
// (17, 8, 'neigh_op_lft_6') | |
// (17, 9, 'neigh_op_bnl_6') | |
wire n508; | |
// (15, 6, 'sp4_r_v_b_38') | |
// (15, 7, 'neigh_op_tnr_7') | |
// (15, 7, 'sp4_r_v_b_27') | |
// (15, 8, 'neigh_op_rgt_7') | |
// (15, 8, 'sp4_h_r_3') | |
// (15, 8, 'sp4_r_v_b_14') | |
// (15, 9, 'neigh_op_bnr_7') | |
// (15, 9, 'sp4_r_v_b_3') | |
// (16, 5, 'sp4_v_t_38') | |
// (16, 6, 'sp4_v_b_38') | |
// (16, 7, 'neigh_op_top_7') | |
// (16, 7, 'sp4_v_b_27') | |
// (16, 8, 'local_g2_7') | |
// (16, 8, 'lutff_0/in_1') | |
// (16, 8, 'lutff_7/out') | |
// (16, 8, 'sp4_h_r_14') | |
// (16, 8, 'sp4_v_b_14') | |
// (16, 9, 'neigh_op_bot_7') | |
// (16, 9, 'sp4_h_r_9') | |
// (16, 9, 'sp4_v_b_3') | |
// (17, 7, 'neigh_op_tnl_7') | |
// (17, 8, 'local_g1_7') | |
// (17, 8, 'lutff_4/in_0') | |
// (17, 8, 'neigh_op_lft_7') | |
// (17, 8, 'sp4_h_r_27') | |
// (17, 9, 'neigh_op_bnl_7') | |
// (17, 9, 'sp4_h_r_20') | |
// (18, 8, 'sp4_h_r_38') | |
// (18, 9, 'local_g2_1') | |
// (18, 9, 'lutff_6/in_3') | |
// (18, 9, 'sp4_h_r_33') | |
// (18, 9, 'sp4_r_v_b_45') | |
// (18, 10, 'sp4_r_v_b_32') | |
// (18, 11, 'sp4_r_v_b_21') | |
// (18, 12, 'sp4_r_v_b_8') | |
// (19, 8, 'sp4_h_l_38') | |
// (19, 8, 'sp4_v_t_45') | |
// (19, 9, 'sp4_h_r_44') | |
// (19, 9, 'sp4_v_b_45') | |
// (19, 10, 'local_g2_0') | |
// (19, 10, 'ram/WADDR_1') | |
// (19, 10, 'sp4_v_b_32') | |
// (19, 11, 'sp4_v_b_21') | |
// (19, 12, 'sp4_v_b_8') | |
// (20, 9, 'sp4_h_l_44') | |
reg n509 = 0; | |
// (15, 6, 'sp4_r_v_b_40') | |
// (15, 7, 'neigh_op_tnr_0') | |
// (15, 7, 'sp4_r_v_b_29') | |
// (15, 8, 'neigh_op_rgt_0') | |
// (15, 8, 'sp4_r_v_b_16') | |
// (15, 9, 'neigh_op_bnr_0') | |
// (15, 9, 'sp4_r_v_b_5') | |
// (16, 5, 'sp4_v_t_40') | |
// (16, 6, 'local_g2_0') | |
// (16, 6, 'lutff_1/in_1') | |
// (16, 6, 'sp4_v_b_40') | |
// (16, 7, 'neigh_op_top_0') | |
// (16, 7, 'sp4_v_b_29') | |
// (16, 8, 'local_g1_0') | |
// (16, 8, 'lutff_0/out') | |
// (16, 8, 'lutff_7/in_2') | |
// (16, 8, 'sp4_v_b_16') | |
// (16, 9, 'neigh_op_bot_0') | |
// (16, 9, 'sp4_v_b_5') | |
// (17, 7, 'neigh_op_tnl_0') | |
// (17, 8, 'neigh_op_lft_0') | |
// (17, 9, 'neigh_op_bnl_0') | |
wire n510; | |
// (15, 7, 'neigh_op_tnr_1') | |
// (15, 8, 'neigh_op_rgt_1') | |
// (15, 8, 'sp4_h_r_7') | |
// (15, 9, 'neigh_op_bnr_1') | |
// (16, 6, 'sp4_r_v_b_43') | |
// (16, 7, 'neigh_op_top_1') | |
// (16, 7, 'sp4_r_v_b_30') | |
// (16, 8, 'local_g0_1') | |
// (16, 8, 'lutff_1/out') | |
// (16, 8, 'lutff_6/in_1') | |
// (16, 8, 'sp4_h_r_18') | |
// (16, 8, 'sp4_r_v_b_19') | |
// (16, 9, 'neigh_op_bot_1') | |
// (16, 9, 'sp4_r_v_b_6') | |
// (17, 5, 'sp4_v_t_43') | |
// (17, 6, 'sp4_v_b_43') | |
// (17, 7, 'neigh_op_tnl_1') | |
// (17, 7, 'sp4_v_b_30') | |
// (17, 8, 'local_g1_1') | |
// (17, 8, 'lutff_6/in_2') | |
// (17, 8, 'neigh_op_lft_1') | |
// (17, 8, 'sp4_h_r_31') | |
// (17, 8, 'sp4_v_b_19') | |
// (17, 9, 'neigh_op_bnl_1') | |
// (17, 9, 'sp4_h_r_6') | |
// (17, 9, 'sp4_v_b_6') | |
// (18, 8, 'sp4_h_r_42') | |
// (18, 9, 'local_g1_3') | |
// (18, 9, 'lutff_3/in_1') | |
// (18, 9, 'sp4_h_r_19') | |
// (18, 9, 'sp4_r_v_b_37') | |
// (18, 10, 'sp4_r_v_b_24') | |
// (18, 11, 'sp4_r_v_b_13') | |
// (18, 12, 'sp4_r_v_b_0') | |
// (19, 8, 'sp4_h_l_42') | |
// (19, 8, 'sp4_v_t_37') | |
// (19, 9, 'sp4_h_r_30') | |
// (19, 9, 'sp4_v_b_37') | |
// (19, 10, 'local_g3_0') | |
// (19, 10, 'ram/WADDR_4') | |
// (19, 10, 'sp4_v_b_24') | |
// (19, 11, 'sp4_v_b_13') | |
// (19, 12, 'sp4_v_b_0') | |
// (20, 9, 'sp4_h_r_43') | |
// (21, 9, 'sp4_h_l_43') | |
reg n511 = 0; | |
// (15, 8, 'neigh_op_tnr_3') | |
// (15, 9, 'neigh_op_rgt_3') | |
// (15, 10, 'neigh_op_bnr_3') | |
// (16, 8, 'neigh_op_top_3') | |
// (16, 9, 'lutff_3/out') | |
// (16, 10, 'local_g1_3') | |
// (16, 10, 'lutff_1/in_1') | |
// (16, 10, 'neigh_op_bot_3') | |
// (17, 8, 'neigh_op_tnl_3') | |
// (17, 9, 'neigh_op_lft_3') | |
// (17, 10, 'neigh_op_bnl_3') | |
wire n512; | |
// (15, 8, 'neigh_op_tnr_4') | |
// (15, 9, 'neigh_op_rgt_4') | |
// (15, 9, 'sp4_r_v_b_40') | |
// (15, 10, 'neigh_op_bnr_4') | |
// (15, 10, 'sp4_r_v_b_29') | |
// (15, 11, 'sp4_r_v_b_16') | |
// (15, 12, 'sp4_r_v_b_5') | |
// (16, 6, 'sp4_r_v_b_44') | |
// (16, 7, 'sp4_r_v_b_33') | |
// (16, 8, 'neigh_op_top_4') | |
// (16, 8, 'sp4_h_r_10') | |
// (16, 8, 'sp4_r_v_b_20') | |
// (16, 8, 'sp4_v_t_40') | |
// (16, 9, 'lutff_4/out') | |
// (16, 9, 'sp4_r_v_b_9') | |
// (16, 9, 'sp4_v_b_40') | |
// (16, 10, 'neigh_op_bot_4') | |
// (16, 10, 'sp4_v_b_29') | |
// (16, 11, 'sp4_v_b_16') | |
// (16, 12, 'sp4_v_b_5') | |
// (17, 5, 'sp4_v_t_44') | |
// (17, 6, 'sp4_v_b_44') | |
// (17, 7, 'sp4_v_b_33') | |
// (17, 8, 'local_g3_4') | |
// (17, 8, 'lutff_2/in_1') | |
// (17, 8, 'neigh_op_tnl_4') | |
// (17, 8, 'sp4_h_r_23') | |
// (17, 8, 'sp4_v_b_20') | |
// (17, 9, 'neigh_op_lft_4') | |
// (17, 9, 'sp4_h_r_3') | |
// (17, 9, 'sp4_v_b_9') | |
// (17, 10, 'neigh_op_bnl_4') | |
// (18, 8, 'sp4_h_r_34') | |
// (18, 9, 'local_g0_6') | |
// (18, 9, 'lutff_7/in_3') | |
// (18, 9, 'sp4_h_r_14') | |
// (19, 8, 'sp4_h_r_47') | |
// (19, 9, 'sp4_h_r_27') | |
// (19, 9, 'sp4_r_v_b_38') | |
// (19, 10, 'local_g1_3') | |
// (19, 10, 'ram/WCLKE') | |
// (19, 10, 'sp4_r_v_b_27') | |
// (19, 11, 'sp4_r_v_b_14') | |
// (19, 12, 'sp4_r_v_b_3') | |
// (20, 8, 'sp4_h_l_47') | |
// (20, 8, 'sp4_v_t_38') | |
// (20, 9, 'sp4_h_r_38') | |
// (20, 9, 'sp4_v_b_38') | |
// (20, 10, 'sp4_v_b_27') | |
// (20, 11, 'sp4_v_b_14') | |
// (20, 12, 'sp4_v_b_3') | |
// (21, 9, 'sp4_h_l_38') | |
wire n513; | |
// (15, 8, 'neigh_op_tnr_7') | |
// (15, 9, 'neigh_op_rgt_7') | |
// (15, 10, 'neigh_op_bnr_7') | |
// (16, 8, 'neigh_op_top_7') | |
// (16, 9, 'local_g2_7') | |
// (16, 9, 'lutff_5/in_2') | |
// (16, 9, 'lutff_7/out') | |
// (16, 10, 'neigh_op_bot_7') | |
// (17, 8, 'neigh_op_tnl_7') | |
// (17, 9, 'neigh_op_lft_7') | |
// (17, 10, 'neigh_op_bnl_7') | |
wire n514; | |
// (15, 8, 'sp4_r_v_b_47') | |
// (15, 9, 'sp4_r_v_b_34') | |
// (15, 10, 'local_g3_7') | |
// (15, 10, 'lutff_4/in_0') | |
// (15, 10, 'lutff_5/in_3') | |
// (15, 10, 'sp4_r_v_b_23') | |
// (15, 11, 'sp4_r_v_b_10') | |
// (16, 7, 'sp4_v_t_47') | |
// (16, 8, 'sp4_v_b_47') | |
// (16, 9, 'sp4_v_b_34') | |
// (16, 10, 'sp4_v_b_23') | |
// (16, 11, 'sp4_h_r_10') | |
// (16, 11, 'sp4_v_b_10') | |
// (17, 10, 'neigh_op_tnr_1') | |
// (17, 11, 'neigh_op_rgt_1') | |
// (17, 11, 'sp4_h_r_23') | |
// (17, 12, 'neigh_op_bnr_1') | |
// (18, 10, 'neigh_op_top_1') | |
// (18, 11, 'lutff_1/out') | |
// (18, 11, 'sp4_h_r_34') | |
// (18, 12, 'neigh_op_bot_1') | |
// (19, 10, 'neigh_op_tnl_1') | |
// (19, 11, 'neigh_op_lft_1') | |
// (19, 11, 'sp4_h_r_47') | |
// (19, 12, 'neigh_op_bnl_1') | |
// (20, 11, 'sp4_h_l_47') | |
wire n515; | |
// (15, 9, 'neigh_op_tnr_1') | |
// (15, 10, 'local_g3_1') | |
// (15, 10, 'lutff_6/in_0') | |
// (15, 10, 'neigh_op_rgt_1') | |
// (15, 11, 'neigh_op_bnr_1') | |
// (16, 9, 'neigh_op_top_1') | |
// (16, 10, 'lutff_1/out') | |
// (16, 11, 'neigh_op_bot_1') | |
// (17, 9, 'neigh_op_tnl_1') | |
// (17, 10, 'neigh_op_lft_1') | |
// (17, 11, 'neigh_op_bnl_1') | |
wire n516; | |
// (15, 9, 'neigh_op_tnr_2') | |
// (15, 10, 'neigh_op_rgt_2') | |
// (15, 11, 'neigh_op_bnr_2') | |
// (16, 9, 'neigh_op_top_2') | |
// (16, 10, 'local_g0_2') | |
// (16, 10, 'lutff_2/out') | |
// (16, 10, 'lutff_7/in_3') | |
// (16, 11, 'neigh_op_bot_2') | |
// (17, 9, 'neigh_op_tnl_2') | |
// (17, 10, 'neigh_op_lft_2') | |
// (17, 11, 'neigh_op_bnl_2') | |
wire n517; | |
// (15, 9, 'neigh_op_tnr_4') | |
// (15, 10, 'neigh_op_rgt_4') | |
// (15, 11, 'neigh_op_bnr_4') | |
// (16, 9, 'neigh_op_top_4') | |
// (16, 10, 'local_g1_4') | |
// (16, 10, 'lutff_4/out') | |
// (16, 10, 'lutff_7/in_2') | |
// (16, 11, 'neigh_op_bot_4') | |
// (17, 9, 'neigh_op_tnl_4') | |
// (17, 10, 'neigh_op_lft_4') | |
// (17, 11, 'neigh_op_bnl_4') | |
reg n518 = 0; | |
// (15, 9, 'neigh_op_tnr_5') | |
// (15, 10, 'neigh_op_rgt_5') | |
// (15, 11, 'neigh_op_bnr_5') | |
// (16, 9, 'neigh_op_top_5') | |
// (16, 10, 'lutff_5/out') | |
// (16, 11, 'neigh_op_bot_5') | |
// (17, 9, 'neigh_op_tnl_5') | |
// (17, 10, 'local_g0_5') | |
// (17, 10, 'lutff_6/in_1') | |
// (17, 10, 'neigh_op_lft_5') | |
// (17, 11, 'neigh_op_bnl_5') | |
wire n519; | |
// (15, 9, 'neigh_op_tnr_7') | |
// (15, 10, 'neigh_op_rgt_7') | |
// (15, 11, 'neigh_op_bnr_7') | |
// (16, 9, 'neigh_op_top_7') | |
// (16, 10, 'lutff_7/out') | |
// (16, 11, 'local_g0_7') | |
// (16, 11, 'lutff_4/in_1') | |
// (16, 11, 'neigh_op_bot_7') | |
// (17, 9, 'neigh_op_tnl_7') | |
// (17, 10, 'neigh_op_lft_7') | |
// (17, 11, 'neigh_op_bnl_7') | |
wire n520; | |
// (15, 9, 'sp4_h_r_7') | |
// (16, 9, 'sp4_h_r_18') | |
// (17, 9, 'local_g3_7') | |
// (17, 9, 'lutff_5/in_3') | |
// (17, 9, 'sp4_h_r_31') | |
// (18, 9, 'neigh_op_tnr_5') | |
// (18, 9, 'sp4_h_r_42') | |
// (18, 10, 'neigh_op_rgt_5') | |
// (18, 10, 'sp4_r_v_b_42') | |
// (18, 11, 'neigh_op_bnr_5') | |
// (18, 11, 'sp4_r_v_b_31') | |
// (18, 12, 'sp4_r_v_b_18') | |
// (18, 13, 'sp4_r_v_b_7') | |
// (19, 9, 'neigh_op_top_5') | |
// (19, 9, 'sp4_h_l_42') | |
// (19, 9, 'sp4_v_t_42') | |
// (19, 10, 'ram/RDATA_2') | |
// (19, 10, 'sp4_v_b_42') | |
// (19, 11, 'neigh_op_bot_5') | |
// (19, 11, 'sp4_v_b_31') | |
// (19, 12, 'sp4_v_b_18') | |
// (19, 13, 'sp4_v_b_7') | |
// (20, 9, 'neigh_op_tnl_5') | |
// (20, 10, 'neigh_op_lft_5') | |
// (20, 11, 'neigh_op_bnl_5') | |
wire n521; | |
// (15, 9, 'sp4_r_v_b_38') | |
// (15, 10, 'sp4_r_v_b_27') | |
// (15, 11, 'sp4_r_v_b_14') | |
// (15, 12, 'sp4_r_v_b_3') | |
// (16, 8, 'sp4_v_t_38') | |
// (16, 9, 'sp4_v_b_38') | |
// (16, 10, 'local_g3_3') | |
// (16, 10, 'lutff_1/in_3') | |
// (16, 10, 'sp4_v_b_27') | |
// (16, 11, 'sp4_v_b_14') | |
// (16, 12, 'sp4_h_r_3') | |
// (16, 12, 'sp4_v_b_3') | |
// (17, 12, 'sp4_h_r_14') | |
// (18, 11, 'neigh_op_tnr_3') | |
// (18, 12, 'neigh_op_rgt_3') | |
// (18, 12, 'sp4_h_r_27') | |
// (18, 13, 'neigh_op_bnr_3') | |
// (19, 11, 'neigh_op_top_3') | |
// (19, 12, 'ram/RDATA_4') | |
// (19, 12, 'sp4_h_r_38') | |
// (19, 13, 'neigh_op_bot_3') | |
// (20, 11, 'neigh_op_tnl_3') | |
// (20, 12, 'neigh_op_lft_3') | |
// (20, 12, 'sp4_h_l_38') | |
// (20, 13, 'neigh_op_bnl_3') | |
wire n522; | |
// (15, 9, 'sp4_r_v_b_45') | |
// (15, 10, 'sp4_r_v_b_32') | |
// (15, 11, 'local_g3_5') | |
// (15, 11, 'lutff_6/in_0') | |
// (15, 11, 'sp4_r_v_b_21') | |
// (15, 12, 'sp4_r_v_b_8') | |
// (16, 8, 'sp4_h_r_8') | |
// (16, 8, 'sp4_v_t_45') | |
// (16, 9, 'sp4_v_b_45') | |
// (16, 10, 'sp4_v_b_32') | |
// (16, 11, 'sp4_v_b_21') | |
// (16, 12, 'sp4_v_b_8') | |
// (17, 8, 'sp4_h_r_21') | |
// (17, 11, 'sp4_r_v_b_45') | |
// (17, 12, 'sp4_r_v_b_32') | |
// (17, 13, 'sp4_r_v_b_21') | |
// (17, 14, 'sp4_r_v_b_8') | |
// (18, 8, 'sp4_h_r_32') | |
// (18, 10, 'sp4_h_r_2') | |
// (18, 10, 'sp4_v_t_45') | |
// (18, 11, 'local_g2_5') | |
// (18, 11, 'lutff_5/in_0') | |
// (18, 11, 'sp4_v_b_45') | |
// (18, 12, 'sp4_v_b_32') | |
// (18, 13, 'sp4_v_b_21') | |
// (18, 14, 'sp4_v_b_8') | |
// (19, 8, 'sp4_h_r_45') | |
// (19, 9, 'neigh_op_tnr_5') | |
// (19, 9, 'sp4_r_v_b_39') | |
// (19, 10, 'neigh_op_rgt_5') | |
// (19, 10, 'sp4_h_r_15') | |
// (19, 10, 'sp4_r_v_b_26') | |
// (19, 11, 'local_g0_5') | |
// (19, 11, 'neigh_op_bnr_5') | |
// (19, 11, 'ram/WDATA_9') | |
// (19, 11, 'sp4_r_v_b_15') | |
// (19, 12, 'sp4_r_v_b_2') | |
// (20, 8, 'sp4_h_l_45') | |
// (20, 8, 'sp4_v_t_39') | |
// (20, 9, 'neigh_op_top_5') | |
// (20, 9, 'sp4_v_b_39') | |
// (20, 10, 'lutff_5/out') | |
// (20, 10, 'sp4_h_r_26') | |
// (20, 10, 'sp4_v_b_26') | |
// (20, 11, 'local_g1_5') | |
// (20, 11, 'lutff_1/in_3') | |
// (20, 11, 'neigh_op_bot_5') | |
// (20, 11, 'sp4_v_b_15') | |
// (20, 12, 'sp4_v_b_2') | |
// (21, 9, 'neigh_op_tnl_5') | |
// (21, 10, 'neigh_op_lft_5') | |
// (21, 10, 'sp4_h_r_39') | |
// (21, 11, 'neigh_op_bnl_5') | |
// (22, 10, 'sp4_h_l_39') | |
wire n523; | |
// (15, 9, 'sp4_r_v_b_47') | |
// (15, 10, 'sp4_r_v_b_34') | |
// (15, 11, 'local_g3_7') | |
// (15, 11, 'lutff_4/in_2') | |
// (15, 11, 'sp4_r_v_b_23') | |
// (15, 12, 'sp4_r_v_b_10') | |
// (16, 8, 'sp4_v_t_47') | |
// (16, 9, 'sp4_v_b_47') | |
// (16, 10, 'sp4_v_b_34') | |
// (16, 11, 'sp4_v_b_23') | |
// (16, 12, 'sp4_h_r_5') | |
// (16, 12, 'sp4_v_b_10') | |
// (17, 12, 'sp4_h_r_16') | |
// (18, 11, 'neigh_op_tnr_4') | |
// (18, 12, 'neigh_op_rgt_4') | |
// (18, 12, 'sp4_h_r_29') | |
// (18, 13, 'neigh_op_bnr_4') | |
// (19, 11, 'neigh_op_top_4') | |
// (19, 12, 'ram/RDATA_3') | |
// (19, 12, 'sp4_h_r_40') | |
// (19, 13, 'neigh_op_bot_4') | |
// (20, 11, 'neigh_op_tnl_4') | |
// (20, 12, 'neigh_op_lft_4') | |
// (20, 12, 'sp4_h_l_40') | |
// (20, 13, 'neigh_op_bnl_4') | |
wire n524; | |
// (15, 10, 'neigh_op_tnr_0') | |
// (15, 11, 'neigh_op_rgt_0') | |
// (15, 12, 'neigh_op_bnr_0') | |
// (16, 10, 'neigh_op_top_0') | |
// (16, 11, 'local_g1_0') | |
// (16, 11, 'lutff_0/out') | |
// (16, 11, 'lutff_5/in_0') | |
// (16, 12, 'neigh_op_bot_0') | |
// (17, 10, 'neigh_op_tnl_0') | |
// (17, 11, 'neigh_op_lft_0') | |
// (17, 12, 'neigh_op_bnl_0') | |
reg n525 = 0; | |
// (15, 10, 'neigh_op_tnr_1') | |
// (15, 11, 'neigh_op_rgt_1') | |
// (15, 12, 'neigh_op_bnr_1') | |
// (16, 10, 'neigh_op_top_1') | |
// (16, 11, 'lutff_1/out') | |
// (16, 12, 'neigh_op_bot_1') | |
// (17, 10, 'neigh_op_tnl_1') | |
// (17, 11, 'local_g0_1') | |
// (17, 11, 'lutff_1/in_0') | |
// (17, 11, 'neigh_op_lft_1') | |
// (17, 12, 'neigh_op_bnl_1') | |
reg n526 = 0; | |
// (15, 10, 'neigh_op_tnr_2') | |
// (15, 11, 'neigh_op_rgt_2') | |
// (15, 12, 'neigh_op_bnr_2') | |
// (16, 10, 'neigh_op_top_2') | |
// (16, 11, 'lutff_2/out') | |
// (16, 12, 'neigh_op_bot_2') | |
// (17, 10, 'neigh_op_tnl_2') | |
// (17, 11, 'local_g1_2') | |
// (17, 11, 'lutff_3/in_0') | |
// (17, 11, 'neigh_op_lft_2') | |
// (17, 12, 'neigh_op_bnl_2') | |
reg n527 = 0; | |
// (15, 10, 'neigh_op_tnr_3') | |
// (15, 11, 'neigh_op_rgt_3') | |
// (15, 12, 'neigh_op_bnr_3') | |
// (16, 10, 'local_g0_3') | |
// (16, 10, 'lutff_0/in_3') | |
// (16, 10, 'neigh_op_top_3') | |
// (16, 11, 'lutff_3/out') | |
// (16, 12, 'neigh_op_bot_3') | |
// (17, 10, 'neigh_op_tnl_3') | |
// (17, 11, 'neigh_op_lft_3') | |
// (17, 12, 'neigh_op_bnl_3') | |
reg n528 = 0; | |
// (15, 10, 'neigh_op_tnr_4') | |
// (15, 11, 'neigh_op_rgt_4') | |
// (15, 12, 'neigh_op_bnr_4') | |
// (16, 10, 'neigh_op_top_4') | |
// (16, 11, 'lutff_4/out') | |
// (16, 12, 'neigh_op_bot_4') | |
// (17, 10, 'neigh_op_tnl_4') | |
// (17, 11, 'local_g1_4') | |
// (17, 11, 'lutff_7/in_2') | |
// (17, 11, 'neigh_op_lft_4') | |
// (17, 12, 'neigh_op_bnl_4') | |
wire n529; | |
// (15, 10, 'neigh_op_tnr_5') | |
// (15, 11, 'neigh_op_rgt_5') | |
// (15, 12, 'neigh_op_bnr_5') | |
// (16, 10, 'neigh_op_top_5') | |
// (16, 11, 'local_g2_5') | |
// (16, 11, 'lutff_2/in_3') | |
// (16, 11, 'lutff_5/out') | |
// (16, 12, 'neigh_op_bot_5') | |
// (17, 10, 'neigh_op_tnl_5') | |
// (17, 11, 'neigh_op_lft_5') | |
// (17, 12, 'neigh_op_bnl_5') | |
wire n530; | |
// (15, 10, 'neigh_op_tnr_7') | |
// (15, 11, 'neigh_op_rgt_7') | |
// (15, 12, 'neigh_op_bnr_7') | |
// (16, 10, 'neigh_op_top_7') | |
// (16, 11, 'local_g3_7') | |
// (16, 11, 'lutff_5/in_3') | |
// (16, 11, 'lutff_7/out') | |
// (16, 12, 'neigh_op_bot_7') | |
// (17, 10, 'neigh_op_tnl_7') | |
// (17, 11, 'neigh_op_lft_7') | |
// (17, 12, 'neigh_op_bnl_7') | |
wire n531; | |
// (15, 10, 'sp4_h_r_9') | |
// (16, 10, 'local_g0_4') | |
// (16, 10, 'lutff_0/in_0') | |
// (16, 10, 'sp4_h_r_20') | |
// (17, 10, 'sp4_h_r_33') | |
// (18, 10, 'sp4_h_r_44') | |
// (19, 9, 'neigh_op_tnr_2') | |
// (19, 10, 'neigh_op_rgt_2') | |
// (19, 10, 'sp4_h_l_44') | |
// (19, 10, 'sp4_h_r_9') | |
// (19, 11, 'neigh_op_bnr_2') | |
// (20, 9, 'neigh_op_top_2') | |
// (20, 10, 'lutff_2/out') | |
// (20, 10, 'sp4_h_r_20') | |
// (20, 11, 'neigh_op_bot_2') | |
// (21, 9, 'neigh_op_tnl_2') | |
// (21, 10, 'neigh_op_lft_2') | |
// (21, 10, 'sp4_h_r_33') | |
// (21, 11, 'neigh_op_bnl_2') | |
// (22, 10, 'sp4_h_r_44') | |
// (23, 10, 'sp4_h_l_44') | |
wire n532; | |
// (15, 10, 'sp4_r_v_b_47') | |
// (15, 11, 'sp4_r_v_b_34') | |
// (15, 12, 'sp4_r_v_b_23') | |
// (15, 13, 'sp4_r_v_b_10') | |
// (16, 9, 'sp4_h_r_10') | |
// (16, 9, 'sp4_v_t_47') | |
// (16, 10, 'sp4_v_b_47') | |
// (16, 11, 'sp4_v_b_34') | |
// (16, 12, 'local_g1_7') | |
// (16, 12, 'lutff_4/in_0') | |
// (16, 12, 'sp4_v_b_23') | |
// (16, 13, 'local_g1_0') | |
// (16, 13, 'lutff_3/in_2') | |
// (16, 13, 'sp4_h_r_8') | |
// (16, 13, 'sp4_v_b_10') | |
// (17, 7, 'sp4_r_v_b_42') | |
// (17, 8, 'neigh_op_tnr_1') | |
// (17, 8, 'sp4_r_v_b_31') | |
// (17, 9, 'neigh_op_rgt_1') | |
// (17, 9, 'sp4_h_r_23') | |
// (17, 9, 'sp4_r_v_b_18') | |
// (17, 10, 'neigh_op_bnr_1') | |
// (17, 10, 'sp4_r_v_b_7') | |
// (17, 11, 'sp4_r_v_b_42') | |
// (17, 12, 'sp4_r_v_b_31') | |
// (17, 13, 'local_g3_2') | |
// (17, 13, 'lutff_3/in_2') | |
// (17, 13, 'sp4_h_r_21') | |
// (17, 13, 'sp4_r_v_b_18') | |
// (17, 14, 'sp4_r_v_b_7') | |
// (18, 6, 'sp4_v_t_42') | |
// (18, 7, 'sp4_v_b_42') | |
// (18, 8, 'neigh_op_top_1') | |
// (18, 8, 'sp4_r_v_b_46') | |
// (18, 8, 'sp4_v_b_31') | |
// (18, 9, 'lutff_1/out') | |
// (18, 9, 'sp4_h_r_34') | |
// (18, 9, 'sp4_r_v_b_35') | |
// (18, 9, 'sp4_v_b_18') | |
// (18, 10, 'neigh_op_bot_1') | |
// (18, 10, 'sp4_r_v_b_22') | |
// (18, 10, 'sp4_v_b_7') | |
// (18, 10, 'sp4_v_t_42') | |
// (18, 11, 'sp4_r_v_b_11') | |
// (18, 11, 'sp4_v_b_42') | |
// (18, 12, 'sp4_v_b_31') | |
// (18, 13, 'sp4_h_r_32') | |
// (18, 13, 'sp4_v_b_18') | |
// (18, 14, 'sp4_v_b_7') | |
// (19, 7, 'sp4_v_t_46') | |
// (19, 8, 'neigh_op_tnl_1') | |
// (19, 8, 'sp4_v_b_46') | |
// (19, 9, 'neigh_op_lft_1') | |
// (19, 9, 'sp4_h_r_47') | |
// (19, 9, 'sp4_v_b_35') | |
// (19, 10, 'neigh_op_bnl_1') | |
// (19, 10, 'sp4_r_v_b_38') | |
// (19, 10, 'sp4_v_b_22') | |
// (19, 11, 'local_g0_3') | |
// (19, 11, 'ram/WDATA_13') | |
// (19, 11, 'sp4_r_v_b_27') | |
// (19, 11, 'sp4_v_b_11') | |
// (19, 12, 'sp4_r_v_b_14') | |
// (19, 13, 'sp4_h_r_45') | |
// (19, 13, 'sp4_r_v_b_3') | |
// (20, 9, 'sp4_h_l_47') | |
// (20, 9, 'sp4_v_t_38') | |
// (20, 10, 'sp4_v_b_38') | |
// (20, 11, 'sp4_v_b_27') | |
// (20, 12, 'sp4_v_b_14') | |
// (20, 13, 'sp4_h_l_45') | |
// (20, 13, 'sp4_v_b_3') | |
wire n533; | |
// (15, 11, 'neigh_op_tnr_1') | |
// (15, 12, 'neigh_op_rgt_1') | |
// (15, 13, 'neigh_op_bnr_1') | |
// (16, 11, 'neigh_op_top_1') | |
// (16, 12, 'local_g2_1') | |
// (16, 12, 'lutff_1/out') | |
// (16, 12, 'lutff_2/in_3') | |
// (16, 13, 'neigh_op_bot_1') | |
// (17, 11, 'neigh_op_tnl_1') | |
// (17, 12, 'neigh_op_lft_1') | |
// (17, 13, 'neigh_op_bnl_1') | |
reg n534 = 0; | |
// (15, 11, 'neigh_op_tnr_2') | |
// (15, 12, 'neigh_op_rgt_2') | |
// (15, 13, 'neigh_op_bnr_2') | |
// (16, 11, 'neigh_op_top_2') | |
// (16, 12, 'lutff_2/out') | |
// (16, 12, 'sp4_h_r_4') | |
// (16, 13, 'neigh_op_bot_2') | |
// (17, 11, 'neigh_op_tnl_2') | |
// (17, 12, 'neigh_op_lft_2') | |
// (17, 12, 'sp4_h_r_17') | |
// (17, 13, 'neigh_op_bnl_2') | |
// (18, 12, 'local_g2_4') | |
// (18, 12, 'lutff_3/in_1') | |
// (18, 12, 'sp4_h_r_28') | |
// (19, 12, 'sp4_h_r_41') | |
// (20, 12, 'sp4_h_l_41') | |
wire n535; | |
// (15, 11, 'neigh_op_tnr_5') | |
// (15, 12, 'neigh_op_rgt_5') | |
// (15, 13, 'neigh_op_bnr_5') | |
// (16, 11, 'local_g0_5') | |
// (16, 11, 'lutff_3/in_0') | |
// (16, 11, 'neigh_op_top_5') | |
// (16, 12, 'lutff_5/out') | |
// (16, 13, 'neigh_op_bot_5') | |
// (17, 11, 'neigh_op_tnl_5') | |
// (17, 12, 'neigh_op_lft_5') | |
// (17, 13, 'neigh_op_bnl_5') | |
wire n536; | |
// (15, 11, 'neigh_op_tnr_6') | |
// (15, 12, 'local_g2_6') | |
// (15, 12, 'lutff_1/in_1') | |
// (15, 12, 'neigh_op_rgt_6') | |
// (15, 13, 'neigh_op_bnr_6') | |
// (16, 11, 'neigh_op_top_6') | |
// (16, 12, 'lutff_6/out') | |
// (16, 13, 'neigh_op_bot_6') | |
// (17, 11, 'neigh_op_tnl_6') | |
// (17, 12, 'neigh_op_lft_6') | |
// (17, 13, 'neigh_op_bnl_6') | |
wire n537; | |
// (15, 11, 'sp4_h_r_2') | |
// (16, 11, 'local_g1_7') | |
// (16, 11, 'lutff_6/in_0') | |
// (16, 11, 'sp4_h_r_15') | |
// (17, 9, 'neigh_op_tnr_7') | |
// (17, 10, 'neigh_op_rgt_7') | |
// (17, 11, 'local_g0_7') | |
// (17, 11, 'lutff_6/in_3') | |
// (17, 11, 'neigh_op_bnr_7') | |
// (17, 11, 'sp4_h_r_26') | |
// (18, 8, 'sp4_r_v_b_39') | |
// (18, 9, 'neigh_op_top_7') | |
// (18, 9, 'sp4_r_v_b_26') | |
// (18, 10, 'lutff_7/out') | |
// (18, 10, 'sp4_r_v_b_15') | |
// (18, 11, 'neigh_op_bot_7') | |
// (18, 11, 'sp4_h_r_39') | |
// (18, 11, 'sp4_r_v_b_2') | |
// (19, 7, 'sp4_v_t_39') | |
// (19, 8, 'sp4_v_b_39') | |
// (19, 9, 'neigh_op_tnl_7') | |
// (19, 9, 'sp4_v_b_26') | |
// (19, 10, 'neigh_op_lft_7') | |
// (19, 10, 'sp4_v_b_15') | |
// (19, 11, 'local_g2_7') | |
// (19, 11, 'neigh_op_bnl_7') | |
// (19, 11, 'ram/WDATA_11') | |
// (19, 11, 'sp4_h_l_39') | |
// (19, 11, 'sp4_h_r_2') | |
// (19, 11, 'sp4_v_b_2') | |
// (20, 11, 'sp4_h_r_15') | |
// (21, 11, 'local_g3_2') | |
// (21, 11, 'lutff_0/in_3') | |
// (21, 11, 'sp4_h_r_26') | |
// (22, 11, 'sp4_h_r_39') | |
// (23, 11, 'sp4_h_l_39') | |
wire n538; | |
// (15, 12, 'local_g1_0') | |
// (15, 12, 'lutff_6/in_1') | |
// (15, 12, 'sp4_h_r_8') | |
// (16, 11, 'neigh_op_tnr_0') | |
// (16, 12, 'neigh_op_rgt_0') | |
// (16, 12, 'sp4_h_r_21') | |
// (16, 13, 'neigh_op_bnr_0') | |
// (17, 11, 'neigh_op_top_0') | |
// (17, 12, 'lutff_0/out') | |
// (17, 12, 'sp4_h_r_32') | |
// (17, 13, 'neigh_op_bot_0') | |
// (18, 11, 'neigh_op_tnl_0') | |
// (18, 12, 'neigh_op_lft_0') | |
// (18, 12, 'sp4_h_r_45') | |
// (18, 13, 'neigh_op_bnl_0') | |
// (19, 12, 'sp4_h_l_45') | |
wire n539; | |
// (15, 12, 'neigh_op_tnr_0') | |
// (15, 13, 'neigh_op_rgt_0') | |
// (15, 14, 'neigh_op_bnr_0') | |
// (16, 12, 'neigh_op_top_0') | |
// (16, 13, 'local_g0_0') | |
// (16, 13, 'lutff_0/out') | |
// (16, 13, 'lutff_1/in_1') | |
// (16, 14, 'neigh_op_bot_0') | |
// (17, 12, 'neigh_op_tnl_0') | |
// (17, 13, 'neigh_op_lft_0') | |
// (17, 14, 'neigh_op_bnl_0') | |
reg n540 = 0; | |
// (15, 12, 'neigh_op_tnr_1') | |
// (15, 13, 'neigh_op_rgt_1') | |
// (15, 14, 'neigh_op_bnr_1') | |
// (16, 12, 'local_g0_1') | |
// (16, 12, 'lutff_3/in_0') | |
// (16, 12, 'neigh_op_top_1') | |
// (16, 13, 'lutff_1/out') | |
// (16, 14, 'neigh_op_bot_1') | |
// (17, 12, 'neigh_op_tnl_1') | |
// (17, 13, 'neigh_op_lft_1') | |
// (17, 14, 'neigh_op_bnl_1') | |
wire n541; | |
// (15, 12, 'neigh_op_tnr_2') | |
// (15, 13, 'neigh_op_rgt_2') | |
// (15, 14, 'neigh_op_bnr_2') | |
// (16, 12, 'neigh_op_top_2') | |
// (16, 13, 'local_g2_2') | |
// (16, 13, 'lutff_0/in_0') | |
// (16, 13, 'lutff_2/out') | |
// (16, 14, 'neigh_op_bot_2') | |
// (17, 12, 'neigh_op_tnl_2') | |
// (17, 13, 'neigh_op_lft_2') | |
// (17, 14, 'neigh_op_bnl_2') | |
wire n542; | |
// (15, 12, 'neigh_op_tnr_3') | |
// (15, 13, 'neigh_op_rgt_3') | |
// (15, 14, 'neigh_op_bnr_3') | |
// (16, 12, 'neigh_op_top_3') | |
// (16, 13, 'local_g3_3') | |
// (16, 13, 'lutff_1/in_3') | |
// (16, 13, 'lutff_3/out') | |
// (16, 14, 'neigh_op_bot_3') | |
// (17, 12, 'neigh_op_tnl_3') | |
// (17, 13, 'neigh_op_lft_3') | |
// (17, 14, 'neigh_op_bnl_3') | |
wire n543; | |
// (15, 12, 'neigh_op_tnr_6') | |
// (15, 13, 'neigh_op_rgt_6') | |
// (15, 14, 'neigh_op_bnr_6') | |
// (16, 12, 'neigh_op_top_6') | |
// (16, 13, 'local_g0_6') | |
// (16, 13, 'lutff_0/in_2') | |
// (16, 13, 'lutff_6/out') | |
// (16, 14, 'neigh_op_bot_6') | |
// (17, 12, 'neigh_op_tnl_6') | |
// (17, 13, 'neigh_op_lft_6') | |
// (17, 14, 'neigh_op_bnl_6') | |
wire n544; | |
// (15, 12, 'sp4_h_r_6') | |
// (16, 12, 'local_g0_3') | |
// (16, 12, 'lutff_6/in_3') | |
// (16, 12, 'sp4_h_r_19') | |
// (17, 12, 'sp4_h_r_30') | |
// (18, 12, 'sp4_h_r_43') | |
// (19, 11, 'neigh_op_tnr_7') | |
// (19, 12, 'neigh_op_rgt_7') | |
// (19, 12, 'sp4_h_l_43') | |
// (19, 12, 'sp4_h_r_3') | |
// (19, 13, 'neigh_op_bnr_7') | |
// (20, 11, 'neigh_op_top_7') | |
// (20, 12, 'lutff_7/out') | |
// (20, 12, 'sp4_h_r_14') | |
// (20, 13, 'neigh_op_bot_7') | |
// (21, 11, 'neigh_op_tnl_7') | |
// (21, 12, 'neigh_op_lft_7') | |
// (21, 12, 'sp4_h_r_27') | |
// (21, 13, 'neigh_op_bnl_7') | |
// (22, 12, 'sp4_h_r_38') | |
// (23, 12, 'sp4_h_l_38') | |
wire n545; | |
// (15, 13, 'local_g2_4') | |
// (15, 13, 'lutff_6/in_2') | |
// (15, 13, 'sp4_r_v_b_36') | |
// (15, 14, 'sp4_r_v_b_25') | |
// (15, 15, 'sp4_r_v_b_12') | |
// (15, 16, 'sp4_r_v_b_1') | |
// (16, 12, 'sp4_h_r_7') | |
// (16, 12, 'sp4_v_t_36') | |
// (16, 13, 'sp4_v_b_36') | |
// (16, 14, 'sp4_v_b_25') | |
// (16, 15, 'sp4_v_b_12') | |
// (16, 16, 'sp4_v_b_1') | |
// (17, 12, 'sp4_h_r_18') | |
// (18, 11, 'neigh_op_tnr_5') | |
// (18, 12, 'neigh_op_rgt_5') | |
// (18, 12, 'sp4_h_r_31') | |
// (18, 13, 'neigh_op_bnr_5') | |
// (19, 11, 'neigh_op_top_5') | |
// (19, 12, 'ram/RDATA_2') | |
// (19, 12, 'sp4_h_r_42') | |
// (19, 13, 'neigh_op_bot_5') | |
// (20, 11, 'neigh_op_tnl_5') | |
// (20, 12, 'neigh_op_lft_5') | |
// (20, 12, 'sp4_h_l_42') | |
// (20, 13, 'neigh_op_bnl_5') | |
reg n546 = 0; | |
// (15, 13, 'neigh_op_tnr_1') | |
// (15, 14, 'neigh_op_rgt_1') | |
// (15, 15, 'neigh_op_bnr_1') | |
// (16, 13, 'neigh_op_top_1') | |
// (16, 14, 'local_g2_1') | |
// (16, 14, 'lutff_1/out') | |
// (16, 14, 'lutff_2/in_3') | |
// (16, 15, 'neigh_op_bot_1') | |
// (17, 13, 'neigh_op_tnl_1') | |
// (17, 14, 'neigh_op_lft_1') | |
// (17, 15, 'neigh_op_bnl_1') | |
wire n547; | |
// (15, 13, 'sp4_h_r_9') | |
// (16, 13, 'local_g0_4') | |
// (16, 13, 'lutff_3/in_1') | |
// (16, 13, 'sp4_h_r_20') | |
// (17, 12, 'neigh_op_tnr_6') | |
// (17, 13, 'neigh_op_rgt_6') | |
// (17, 13, 'sp4_h_r_33') | |
// (17, 14, 'neigh_op_bnr_6') | |
// (18, 12, 'neigh_op_top_6') | |
// (18, 13, 'lutff_6/out') | |
// (18, 13, 'sp4_h_r_44') | |
// (18, 14, 'neigh_op_bot_6') | |
// (19, 12, 'neigh_op_tnl_6') | |
// (19, 13, 'neigh_op_lft_6') | |
// (19, 13, 'sp4_h_l_44') | |
// (19, 14, 'neigh_op_bnl_6') | |
wire n548; | |
// (15, 13, 'sp4_r_v_b_45') | |
// (15, 14, 'sp4_r_v_b_32') | |
// (15, 15, 'local_g3_5') | |
// (15, 15, 'lutff_4/in_0') | |
// (15, 15, 'sp4_r_v_b_21') | |
// (15, 16, 'sp4_r_v_b_8') | |
// (16, 12, 'sp4_v_t_45') | |
// (16, 13, 'sp4_v_b_45') | |
// (16, 14, 'sp4_v_b_32') | |
// (16, 15, 'sp4_v_b_21') | |
// (16, 16, 'sp4_h_r_3') | |
// (16, 16, 'sp4_v_b_8') | |
// (17, 16, 'sp4_h_r_14') | |
// (18, 15, 'neigh_op_tnr_3') | |
// (18, 16, 'neigh_op_rgt_3') | |
// (18, 16, 'sp4_h_r_27') | |
// (18, 17, 'neigh_op_bnr_3') | |
// (19, 15, 'neigh_op_top_3') | |
// (19, 16, 'ram/RDATA_4') | |
// (19, 16, 'sp4_h_r_38') | |
// (19, 17, 'neigh_op_bot_3') | |
// (20, 15, 'neigh_op_tnl_3') | |
// (20, 16, 'neigh_op_lft_3') | |
// (20, 16, 'sp4_h_l_38') | |
// (20, 17, 'neigh_op_bnl_3') | |
reg n549 = 0; | |
// (15, 14, 'neigh_op_tnr_1') | |
// (15, 15, 'neigh_op_rgt_1') | |
// (15, 16, 'neigh_op_bnr_1') | |
// (16, 14, 'neigh_op_top_1') | |
// (16, 15, 'local_g2_1') | |
// (16, 15, 'lutff_0/in_3') | |
// (16, 15, 'lutff_1/out') | |
// (16, 16, 'local_g1_1') | |
// (16, 16, 'lutff_5/in_1') | |
// (16, 16, 'neigh_op_bot_1') | |
// (17, 14, 'neigh_op_tnl_1') | |
// (17, 15, 'neigh_op_lft_1') | |
// (17, 16, 'neigh_op_bnl_1') | |
wire n550; | |
// (15, 14, 'neigh_op_tnr_2') | |
// (15, 15, 'neigh_op_rgt_2') | |
// (15, 16, 'neigh_op_bnr_2') | |
// (16, 13, 'sp4_r_v_b_45') | |
// (16, 14, 'neigh_op_top_2') | |
// (16, 14, 'sp4_r_v_b_32') | |
// (16, 15, 'local_g1_2') | |
// (16, 15, 'lutff_2/out') | |
// (16, 15, 'lutff_3/in_0') | |
// (16, 15, 'sp4_h_r_4') | |
// (16, 15, 'sp4_r_v_b_21') | |
// (16, 16, 'neigh_op_bot_2') | |
// (16, 16, 'sp4_r_v_b_8') | |
// (17, 12, 'sp4_v_t_45') | |
// (17, 13, 'sp4_v_b_45') | |
// (17, 14, 'neigh_op_tnl_2') | |
// (17, 14, 'sp4_v_b_32') | |
// (17, 15, 'local_g0_2') | |
// (17, 15, 'lutff_7/in_3') | |
// (17, 15, 'neigh_op_lft_2') | |
// (17, 15, 'sp4_h_r_17') | |
// (17, 15, 'sp4_v_b_21') | |
// (17, 16, 'neigh_op_bnl_2') | |
// (17, 16, 'sp4_h_r_2') | |
// (17, 16, 'sp4_v_b_8') | |
// (18, 15, 'sp4_h_r_28') | |
// (18, 16, 'sp4_h_r_15') | |
// (19, 15, 'sp4_h_r_41') | |
// (19, 16, 'local_g2_2') | |
// (19, 16, 'ram/WADDR_7') | |
// (19, 16, 'sp4_h_r_26') | |
// (20, 15, 'local_g0_0') | |
// (20, 15, 'lutff_6/in_2') | |
// (20, 15, 'sp4_h_l_41') | |
// (20, 15, 'sp4_h_r_0') | |
// (20, 16, 'sp4_h_r_39') | |
// (21, 15, 'sp4_h_r_13') | |
// (21, 16, 'sp4_h_l_39') | |
// (22, 15, 'sp4_h_r_24') | |
// (23, 15, 'sp4_h_r_37') | |
// (24, 15, 'sp4_h_l_37') | |
reg n551 = 0; | |
// (15, 14, 'neigh_op_tnr_3') | |
// (15, 15, 'neigh_op_rgt_3') | |
// (15, 16, 'neigh_op_bnr_3') | |
// (16, 14, 'neigh_op_top_3') | |
// (16, 15, 'local_g0_3') | |
// (16, 15, 'lutff_2/in_1') | |
// (16, 15, 'lutff_3/out') | |
// (16, 16, 'local_g1_3') | |
// (16, 16, 'lutff_7/in_1') | |
// (16, 16, 'neigh_op_bot_3') | |
// (17, 14, 'neigh_op_tnl_3') | |
// (17, 15, 'neigh_op_lft_3') | |
// (17, 16, 'neigh_op_bnl_3') | |
reg n552 = 0; | |
// (15, 14, 'neigh_op_tnr_5') | |
// (15, 15, 'neigh_op_rgt_5') | |
// (15, 16, 'neigh_op_bnr_5') | |
// (16, 14, 'neigh_op_top_5') | |
// (16, 15, 'local_g3_5') | |
// (16, 15, 'lutff_5/out') | |
// (16, 15, 'lutff_7/in_1') | |
// (16, 16, 'local_g1_5') | |
// (16, 16, 'lutff_1/in_1') | |
// (16, 16, 'neigh_op_bot_5') | |
// (17, 14, 'neigh_op_tnl_5') | |
// (17, 15, 'neigh_op_lft_5') | |
// (17, 16, 'neigh_op_bnl_5') | |
wire n553; | |
// (15, 14, 'neigh_op_tnr_7') | |
// (15, 15, 'neigh_op_rgt_7') | |
// (15, 15, 'sp4_h_r_3') | |
// (15, 16, 'neigh_op_bnr_7') | |
// (16, 13, 'sp4_r_v_b_39') | |
// (16, 14, 'neigh_op_top_7') | |
// (16, 14, 'sp4_r_v_b_26') | |
// (16, 15, 'local_g2_7') | |
// (16, 15, 'lutff_5/in_0') | |
// (16, 15, 'lutff_7/out') | |
// (16, 15, 'sp4_h_r_14') | |
// (16, 15, 'sp4_r_v_b_15') | |
// (16, 16, 'neigh_op_bot_7') | |
// (16, 16, 'sp4_r_v_b_2') | |
// (17, 12, 'sp4_v_t_39') | |
// (17, 13, 'sp4_v_b_39') | |
// (17, 14, 'neigh_op_tnl_7') | |
// (17, 14, 'sp4_v_b_26') | |
// (17, 15, 'neigh_op_lft_7') | |
// (17, 15, 'sp4_h_r_27') | |
// (17, 15, 'sp4_v_b_15') | |
// (17, 16, 'neigh_op_bnl_7') | |
// (17, 16, 'sp4_h_r_8') | |
// (17, 16, 'sp4_v_b_2') | |
// (18, 15, 'local_g2_6') | |
// (18, 15, 'lutff_0/in_2') | |
// (18, 15, 'lutff_7/in_1') | |
// (18, 15, 'sp4_h_r_38') | |
// (18, 16, 'sp4_h_r_21') | |
// (19, 15, 'sp4_h_l_38') | |
// (19, 16, 'local_g2_0') | |
// (19, 16, 'ram/WADDR_1') | |
// (19, 16, 'sp4_h_r_32') | |
// (20, 16, 'sp4_h_r_45') | |
// (21, 16, 'sp4_h_l_45') | |
wire n554; | |
// (15, 15, 'neigh_op_tnr_2') | |
// (15, 16, 'neigh_op_rgt_2') | |
// (15, 17, 'neigh_op_bnr_2') | |
// (16, 15, 'neigh_op_top_2') | |
// (16, 16, 'lutff_2/out') | |
// (16, 17, 'neigh_op_bot_2') | |
// (17, 15, 'neigh_op_tnl_2') | |
// (17, 16, 'local_g0_2') | |
// (17, 16, 'lutff_7/in_3') | |
// (17, 16, 'neigh_op_lft_2') | |
// (17, 17, 'neigh_op_bnl_2') | |
wire n555; | |
// (15, 15, 'neigh_op_tnr_3') | |
// (15, 16, 'neigh_op_rgt_3') | |
// (15, 17, 'neigh_op_bnr_3') | |
// (16, 15, 'neigh_op_top_3') | |
// (16, 16, 'lutff_3/out') | |
// (16, 17, 'neigh_op_bot_3') | |
// (17, 15, 'neigh_op_tnl_3') | |
// (17, 16, 'local_g0_3') | |
// (17, 16, 'lutff_3/in_0') | |
// (17, 16, 'neigh_op_lft_3') | |
// (17, 17, 'neigh_op_bnl_3') | |
wire n556; | |
// (15, 15, 'neigh_op_tnr_4') | |
// (15, 16, 'neigh_op_rgt_4') | |
// (15, 17, 'neigh_op_bnr_4') | |
// (16, 15, 'neigh_op_top_4') | |
// (16, 16, 'lutff_4/out') | |
// (16, 17, 'neigh_op_bot_4') | |
// (17, 15, 'neigh_op_tnl_4') | |
// (17, 16, 'local_g1_4') | |
// (17, 16, 'lutff_1/in_0') | |
// (17, 16, 'neigh_op_lft_4') | |
// (17, 17, 'neigh_op_bnl_4') | |
wire n557; | |
// (15, 15, 'neigh_op_tnr_5') | |
// (15, 16, 'neigh_op_rgt_5') | |
// (15, 17, 'neigh_op_bnr_5') | |
// (16, 15, 'local_g1_5') | |
// (16, 15, 'lutff_0/in_0') | |
// (16, 15, 'neigh_op_top_5') | |
// (16, 16, 'lutff_5/out') | |
// (16, 17, 'neigh_op_bot_5') | |
// (17, 15, 'neigh_op_tnl_5') | |
// (17, 16, 'neigh_op_lft_5') | |
// (17, 17, 'neigh_op_bnl_5') | |
wire n558; | |
// (15, 15, 'neigh_op_tnr_6') | |
// (15, 16, 'neigh_op_rgt_6') | |
// (15, 17, 'neigh_op_bnr_6') | |
// (16, 15, 'neigh_op_top_6') | |
// (16, 16, 'lutff_6/out') | |
// (16, 17, 'neigh_op_bot_6') | |
// (17, 15, 'neigh_op_tnl_6') | |
// (17, 16, 'local_g1_6') | |
// (17, 16, 'lutff_6/in_3') | |
// (17, 16, 'neigh_op_lft_6') | |
// (17, 17, 'neigh_op_bnl_6') | |
wire n559; | |
// (15, 15, 'neigh_op_tnr_7') | |
// (15, 16, 'neigh_op_rgt_7') | |
// (15, 17, 'neigh_op_bnr_7') | |
// (16, 15, 'local_g1_7') | |
// (16, 15, 'lutff_2/in_0') | |
// (16, 15, 'neigh_op_top_7') | |
// (16, 16, 'lutff_7/out') | |
// (16, 17, 'neigh_op_bot_7') | |
// (17, 15, 'neigh_op_tnl_7') | |
// (17, 16, 'neigh_op_lft_7') | |
// (17, 17, 'neigh_op_bnl_7') | |
wire n560; | |
// (15, 15, 'sp4_h_r_7') | |
// (16, 15, 'sp4_h_r_18') | |
// (17, 15, 'local_g3_7') | |
// (17, 15, 'lutff_5/in_1') | |
// (17, 15, 'sp4_h_r_31') | |
// (18, 15, 'neigh_op_tnr_2') | |
// (18, 15, 'sp4_h_r_42') | |
// (18, 16, 'neigh_op_rgt_2') | |
// (18, 16, 'sp4_r_v_b_36') | |
// (18, 17, 'neigh_op_bnr_2') | |
// (18, 17, 'sp4_r_v_b_25') | |
// (18, 18, 'sp4_r_v_b_12') | |
// (18, 19, 'sp4_r_v_b_1') | |
// (19, 15, 'neigh_op_top_2') | |
// (19, 15, 'sp4_h_l_42') | |
// (19, 15, 'sp4_v_t_36') | |
// (19, 16, 'ram/RDATA_5') | |
// (19, 16, 'sp4_v_b_36') | |
// (19, 17, 'neigh_op_bot_2') | |
// (19, 17, 'sp4_v_b_25') | |
// (19, 18, 'sp4_v_b_12') | |
// (19, 19, 'sp4_v_b_1') | |
// (20, 15, 'neigh_op_tnl_2') | |
// (20, 16, 'neigh_op_lft_2') | |
// (20, 17, 'neigh_op_bnl_2') | |
wire n561; | |
// (15, 16, 'sp4_h_r_6') | |
// (16, 15, 'neigh_op_tnr_7') | |
// (16, 16, 'neigh_op_rgt_7') | |
// (16, 16, 'sp4_h_r_19') | |
// (16, 17, 'neigh_op_bnr_7') | |
// (17, 15, 'local_g0_7') | |
// (17, 15, 'lutff_0/in_3') | |
// (17, 15, 'neigh_op_top_7') | |
// (17, 16, 'local_g0_7') | |
// (17, 16, 'lutff_5/in_0') | |
// (17, 16, 'lutff_7/out') | |
// (17, 16, 'sp4_h_r_30') | |
// (17, 16, 'sp4_r_v_b_47') | |
// (17, 17, 'neigh_op_bot_7') | |
// (17, 17, 'sp4_r_v_b_34') | |
// (17, 18, 'sp4_r_v_b_23') | |
// (17, 19, 'sp4_r_v_b_10') | |
// (18, 15, 'neigh_op_tnl_7') | |
// (18, 15, 'sp4_h_r_10') | |
// (18, 15, 'sp4_v_t_47') | |
// (18, 16, 'neigh_op_lft_7') | |
// (18, 16, 'sp4_h_r_43') | |
// (18, 16, 'sp4_v_b_47') | |
// (18, 17, 'neigh_op_bnl_7') | |
// (18, 17, 'sp4_v_b_34') | |
// (18, 18, 'sp4_v_b_23') | |
// (18, 19, 'sp4_v_b_10') | |
// (19, 15, 'sp4_h_r_23') | |
// (19, 16, 'local_g0_1') | |
// (19, 16, 'ram/WADDR_2') | |
// (19, 16, 'sp4_h_l_43') | |
// (19, 16, 'sp4_h_r_9') | |
// (20, 15, 'local_g2_2') | |
// (20, 15, 'lutff_0/in_0') | |
// (20, 15, 'sp4_h_r_34') | |
// (20, 16, 'sp4_h_r_20') | |
// (21, 15, 'sp4_h_r_47') | |
// (21, 16, 'sp4_h_r_33') | |
// (22, 15, 'sp4_h_l_47') | |
// (22, 16, 'sp4_h_r_44') | |
// (23, 16, 'sp4_h_l_44') | |
wire \pins[4] ; | |
// (16, 0, 'io_0/PAD') | |
wire n563; | |
// (16, 6, 'lutff_1/cout') | |
// (16, 6, 'lutff_2/in_3') | |
wire n564; | |
// (16, 6, 'lutff_2/cout') | |
// (16, 6, 'lutff_3/in_3') | |
wire n565; | |
// (16, 6, 'lutff_3/cout') | |
// (16, 6, 'lutff_4/in_3') | |
wire n566; | |
// (16, 6, 'lutff_4/cout') | |
// (16, 6, 'lutff_5/in_3') | |
wire n567; | |
// (16, 6, 'lutff_5/cout') | |
// (16, 6, 'lutff_6/in_3') | |
wire n568; | |
// (16, 6, 'lutff_6/cout') | |
// (16, 6, 'lutff_7/in_3') | |
reg n569 = 0; | |
// (16, 7, 'neigh_op_tnr_2') | |
// (16, 8, 'neigh_op_rgt_2') | |
// (16, 9, 'neigh_op_bnr_2') | |
// (17, 7, 'neigh_op_top_2') | |
// (17, 8, 'lutff_2/out') | |
// (17, 8, 'sp4_h_r_4') | |
// (17, 8, 'sp4_r_v_b_37') | |
// (17, 9, 'local_g0_2') | |
// (17, 9, 'local_g1_2') | |
// (17, 9, 'lutff_0/in_1') | |
// (17, 9, 'lutff_5/in_0') | |
// (17, 9, 'lutff_6/in_0') | |
// (17, 9, 'lutff_7/in_1') | |
// (17, 9, 'neigh_op_bot_2') | |
// (17, 9, 'sp4_r_v_b_24') | |
// (17, 10, 'local_g2_5') | |
// (17, 10, 'lutff_1/in_0') | |
// (17, 10, 'sp4_r_v_b_13') | |
// (17, 11, 'sp4_r_v_b_0') | |
// (18, 7, 'neigh_op_tnl_2') | |
// (18, 7, 'sp4_v_t_37') | |
// (18, 8, 'neigh_op_lft_2') | |
// (18, 8, 'sp4_h_r_17') | |
// (18, 8, 'sp4_v_b_37') | |
// (18, 9, 'local_g2_2') | |
// (18, 9, 'lutff_0/in_0') | |
// (18, 9, 'lutff_1/in_3') | |
// (18, 9, 'neigh_op_bnl_2') | |
// (18, 9, 'sp4_v_b_24') | |
// (18, 10, 'local_g0_5') | |
// (18, 10, 'lutff_0/in_1') | |
// (18, 10, 'lutff_6/in_3') | |
// (18, 10, 'lutff_7/in_2') | |
// (18, 10, 'sp4_v_b_13') | |
// (18, 11, 'sp4_v_b_0') | |
// (19, 8, 'sp4_h_r_28') | |
// (20, 8, 'sp4_h_r_41') | |
// (20, 9, 'local_g3_4') | |
// (20, 9, 'lutff_0/in_1') | |
// (20, 9, 'lutff_6/in_3') | |
// (20, 9, 'sp4_r_v_b_44') | |
// (20, 10, 'local_g0_2') | |
// (20, 10, 'lutff_5/in_3') | |
// (20, 10, 'lutff_6/in_0') | |
// (20, 10, 'lutff_7/in_1') | |
// (20, 10, 'sp4_r_v_b_33') | |
// (20, 11, 'local_g3_4') | |
// (20, 11, 'lutff_6/in_1') | |
// (20, 11, 'sp4_r_v_b_20') | |
// (20, 12, 'sp4_r_v_b_9') | |
// (21, 8, 'sp4_h_l_41') | |
// (21, 8, 'sp4_v_t_44') | |
// (21, 9, 'sp4_v_b_44') | |
// (21, 10, 'sp4_v_b_33') | |
// (21, 11, 'sp4_v_b_20') | |
// (21, 12, 'sp4_v_b_9') | |
wire n570; | |
// (16, 7, 'neigh_op_tnr_3') | |
// (16, 8, 'neigh_op_rgt_3') | |
// (16, 9, 'neigh_op_bnr_3') | |
// (17, 7, 'neigh_op_top_3') | |
// (17, 8, 'local_g0_3') | |
// (17, 8, 'lutff_3/out') | |
// (17, 8, 'lutff_4/in_3') | |
// (17, 9, 'neigh_op_bot_3') | |
// (18, 7, 'neigh_op_tnl_3') | |
// (18, 8, 'neigh_op_lft_3') | |
// (18, 9, 'neigh_op_bnl_3') | |
wire n571; | |
// (16, 7, 'neigh_op_tnr_4') | |
// (16, 8, 'neigh_op_rgt_4') | |
// (16, 9, 'neigh_op_bnr_4') | |
// (17, 7, 'neigh_op_top_4') | |
// (17, 8, 'local_g2_4') | |
// (17, 8, 'lutff_4/out') | |
// (17, 8, 'lutff_global/s_r') | |
// (17, 9, 'neigh_op_bot_4') | |
// (18, 7, 'neigh_op_tnl_4') | |
// (18, 8, 'neigh_op_lft_4') | |
// (18, 9, 'neigh_op_bnl_4') | |
wire n572; | |
// (16, 7, 'neigh_op_tnr_6') | |
// (16, 8, 'neigh_op_rgt_6') | |
// (16, 9, 'neigh_op_bnr_6') | |
// (17, 7, 'neigh_op_top_6') | |
// (17, 8, 'local_g1_6') | |
// (17, 8, 'lutff_3/in_2') | |
// (17, 8, 'lutff_6/out') | |
// (17, 9, 'neigh_op_bot_6') | |
// (18, 7, 'neigh_op_tnl_6') | |
// (18, 8, 'neigh_op_lft_6') | |
// (18, 9, 'neigh_op_bnl_6') | |
wire n573; | |
// (16, 7, 'sp4_r_v_b_44') | |
// (16, 8, 'sp4_r_v_b_33') | |
// (16, 9, 'sp4_r_v_b_20') | |
// (16, 10, 'sp4_r_v_b_9') | |
// (17, 6, 'sp4_v_t_44') | |
// (17, 7, 'sp4_v_b_44') | |
// (17, 8, 'sp4_v_b_33') | |
// (17, 9, 'local_g1_4') | |
// (17, 9, 'lutff_6/in_3') | |
// (17, 9, 'sp4_v_b_20') | |
// (17, 10, 'sp4_h_r_4') | |
// (17, 10, 'sp4_v_b_9') | |
// (18, 9, 'neigh_op_tnr_6') | |
// (18, 10, 'neigh_op_rgt_6') | |
// (18, 10, 'sp4_h_r_17') | |
// (18, 11, 'neigh_op_bnr_6') | |
// (19, 9, 'neigh_op_top_6') | |
// (19, 10, 'ram/RDATA_1') | |
// (19, 10, 'sp4_h_r_28') | |
// (19, 11, 'neigh_op_bot_6') | |
// (20, 9, 'neigh_op_tnl_6') | |
// (20, 10, 'neigh_op_lft_6') | |
// (20, 10, 'sp4_h_r_41') | |
// (20, 11, 'neigh_op_bnl_6') | |
// (21, 10, 'sp4_h_l_41') | |
wire n574; | |
// (16, 7, 'sp4_r_v_b_46') | |
// (16, 8, 'sp4_r_v_b_35') | |
// (16, 9, 'sp4_r_v_b_22') | |
// (16, 10, 'sp4_r_v_b_11') | |
// (17, 6, 'sp4_v_t_46') | |
// (17, 7, 'sp4_v_b_46') | |
// (17, 8, 'sp4_v_b_35') | |
// (17, 9, 'local_g1_6') | |
// (17, 9, 'lutff_0/in_3') | |
// (17, 9, 'sp4_v_b_22') | |
// (17, 10, 'sp4_h_r_6') | |
// (17, 10, 'sp4_v_b_11') | |
// (18, 9, 'neigh_op_tnr_7') | |
// (18, 10, 'neigh_op_rgt_7') | |
// (18, 10, 'sp4_h_r_19') | |
// (18, 11, 'neigh_op_bnr_7') | |
// (19, 9, 'neigh_op_top_7') | |
// (19, 10, 'ram/RDATA_0') | |
// (19, 10, 'sp4_h_r_30') | |
// (19, 11, 'neigh_op_bot_7') | |
// (20, 9, 'neigh_op_tnl_7') | |
// (20, 10, 'neigh_op_lft_7') | |
// (20, 10, 'sp4_h_r_43') | |
// (20, 11, 'neigh_op_bnl_7') | |
// (21, 10, 'sp4_h_l_43') | |
reg n575 = 0; | |
// (16, 8, 'neigh_op_tnr_1') | |
// (16, 9, 'neigh_op_rgt_1') | |
// (16, 10, 'neigh_op_bnr_1') | |
// (17, 8, 'neigh_op_top_1') | |
// (17, 9, 'local_g1_1') | |
// (17, 9, 'lutff_0/in_0') | |
// (17, 9, 'lutff_1/out') | |
// (17, 10, 'neigh_op_bot_1') | |
// (18, 8, 'neigh_op_tnl_1') | |
// (18, 9, 'neigh_op_lft_1') | |
// (18, 10, 'neigh_op_bnl_1') | |
reg n576 = 0; | |
// (16, 8, 'neigh_op_tnr_2') | |
// (16, 9, 'neigh_op_rgt_2') | |
// (16, 10, 'neigh_op_bnr_2') | |
// (17, 8, 'neigh_op_top_2') | |
// (17, 9, 'local_g2_2') | |
// (17, 9, 'lutff_2/out') | |
// (17, 9, 'lutff_6/in_2') | |
// (17, 10, 'neigh_op_bot_2') | |
// (18, 8, 'neigh_op_tnl_2') | |
// (18, 9, 'neigh_op_lft_2') | |
// (18, 10, 'neigh_op_bnl_2') | |
reg n577 = 0; | |
// (16, 8, 'neigh_op_tnr_3') | |
// (16, 9, 'neigh_op_rgt_3') | |
// (16, 10, 'neigh_op_bnr_3') | |
// (17, 8, 'neigh_op_top_3') | |
// (17, 9, 'local_g0_3') | |
// (17, 9, 'lutff_3/out') | |
// (17, 9, 'lutff_5/in_2') | |
// (17, 10, 'neigh_op_bot_3') | |
// (18, 8, 'neigh_op_tnl_3') | |
// (18, 9, 'neigh_op_lft_3') | |
// (18, 10, 'neigh_op_bnl_3') | |
reg n578 = 0; | |
// (16, 8, 'neigh_op_tnr_4') | |
// (16, 9, 'neigh_op_rgt_4') | |
// (16, 10, 'neigh_op_bnr_4') | |
// (17, 8, 'neigh_op_top_4') | |
// (17, 9, 'local_g3_4') | |
// (17, 9, 'lutff_4/out') | |
// (17, 9, 'lutff_7/in_2') | |
// (17, 10, 'neigh_op_bot_4') | |
// (18, 8, 'neigh_op_tnl_4') | |
// (18, 9, 'neigh_op_lft_4') | |
// (18, 10, 'neigh_op_bnl_4') | |
reg n579 = 0; | |
// (16, 9, 'neigh_op_tnr_4') | |
// (16, 10, 'neigh_op_rgt_4') | |
// (16, 11, 'neigh_op_bnr_4') | |
// (17, 9, 'neigh_op_top_4') | |
// (17, 10, 'local_g2_4') | |
// (17, 10, 'lutff_1/in_1') | |
// (17, 10, 'lutff_4/out') | |
// (17, 11, 'neigh_op_bot_4') | |
// (18, 9, 'neigh_op_tnl_4') | |
// (18, 10, 'neigh_op_lft_4') | |
// (18, 11, 'neigh_op_bnl_4') | |
reg n580 = 0; | |
// (16, 9, 'neigh_op_tnr_5') | |
// (16, 10, 'neigh_op_rgt_5') | |
// (16, 11, 'neigh_op_bnr_5') | |
// (17, 9, 'neigh_op_top_5') | |
// (17, 10, 'lutff_5/out') | |
// (17, 11, 'local_g1_5') | |
// (17, 11, 'lutff_5/in_1') | |
// (17, 11, 'neigh_op_bot_5') | |
// (18, 9, 'neigh_op_tnl_5') | |
// (18, 10, 'neigh_op_lft_5') | |
// (18, 11, 'neigh_op_bnl_5') | |
reg n581 = 0; | |
// (16, 9, 'neigh_op_tnr_6') | |
// (16, 10, 'neigh_op_rgt_6') | |
// (16, 11, 'neigh_op_bnr_6') | |
// (17, 9, 'neigh_op_top_6') | |
// (17, 10, 'local_g2_6') | |
// (17, 10, 'lutff_2/in_0') | |
// (17, 10, 'lutff_6/out') | |
// (17, 11, 'neigh_op_bot_6') | |
// (18, 9, 'neigh_op_tnl_6') | |
// (18, 10, 'neigh_op_lft_6') | |
// (18, 11, 'neigh_op_bnl_6') | |
wire n582; | |
// (16, 9, 'sp4_h_r_0') | |
// (17, 8, 'neigh_op_tnr_4') | |
// (17, 9, 'neigh_op_rgt_4') | |
// (17, 9, 'sp4_h_r_13') | |
// (17, 10, 'neigh_op_bnr_4') | |
// (18, 8, 'neigh_op_top_4') | |
// (18, 9, 'lutff_4/out') | |
// (18, 9, 'sp4_h_r_24') | |
// (18, 10, 'neigh_op_bot_4') | |
// (19, 8, 'neigh_op_tnl_4') | |
// (19, 9, 'local_g3_5') | |
// (19, 9, 'neigh_op_lft_4') | |
// (19, 9, 'ram/RADDR_7') | |
// (19, 9, 'sp4_h_r_37') | |
// (19, 10, 'neigh_op_bnl_4') | |
// (20, 9, 'sp4_h_l_37') | |
wire n583; | |
// (16, 9, 'sp4_r_v_b_36') | |
// (16, 10, 'sp4_r_v_b_25') | |
// (16, 11, 'sp4_r_v_b_12') | |
// (16, 12, 'sp4_r_v_b_1') | |
// (17, 8, 'sp4_v_t_36') | |
// (17, 9, 'sp4_v_b_36') | |
// (17, 10, 'local_g2_1') | |
// (17, 10, 'lutff_2/in_3') | |
// (17, 10, 'sp4_v_b_25') | |
// (17, 11, 'sp4_v_b_12') | |
// (17, 12, 'sp4_h_r_8') | |
// (17, 12, 'sp4_v_b_1') | |
// (18, 11, 'neigh_op_tnr_0') | |
// (18, 12, 'neigh_op_rgt_0') | |
// (18, 12, 'sp4_h_r_21') | |
// (18, 13, 'neigh_op_bnr_0') | |
// (19, 11, 'neigh_op_top_0') | |
// (19, 12, 'ram/RDATA_7') | |
// (19, 12, 'sp4_h_r_32') | |
// (19, 13, 'neigh_op_bot_0') | |
// (20, 11, 'neigh_op_tnl_0') | |
// (20, 12, 'neigh_op_lft_0') | |
// (20, 12, 'sp4_h_r_45') | |
// (20, 13, 'neigh_op_bnl_0') | |
// (21, 12, 'sp4_h_l_45') | |
wire n584; | |
// (16, 10, 'local_g1_0') | |
// (16, 10, 'lutff_3/in_0') | |
// (16, 10, 'sp4_h_r_8') | |
// (17, 9, 'neigh_op_tnr_0') | |
// (17, 10, 'neigh_op_rgt_0') | |
// (17, 10, 'sp4_h_r_21') | |
// (17, 11, 'local_g1_0') | |
// (17, 11, 'lutff_0/in_1') | |
// (17, 11, 'neigh_op_bnr_0') | |
// (18, 9, 'neigh_op_top_0') | |
// (18, 10, 'lutff_0/out') | |
// (18, 10, 'sp4_h_r_32') | |
// (18, 11, 'local_g0_0') | |
// (18, 11, 'lutff_7/in_1') | |
// (18, 11, 'neigh_op_bot_0') | |
// (19, 9, 'neigh_op_tnl_0') | |
// (19, 10, 'neigh_op_lft_0') | |
// (19, 10, 'sp4_h_r_45') | |
// (19, 11, 'local_g2_0') | |
// (19, 11, 'neigh_op_bnl_0') | |
// (19, 11, 'ram/WDATA_12') | |
// (20, 10, 'sp4_h_l_45') | |
reg n585 = 0; | |
// (16, 10, 'neigh_op_tnr_0') | |
// (16, 11, 'neigh_op_rgt_0') | |
// (16, 12, 'neigh_op_bnr_0') | |
// (17, 10, 'local_g0_0') | |
// (17, 10, 'lutff_5/in_1') | |
// (17, 10, 'neigh_op_top_0') | |
// (17, 11, 'lutff_0/out') | |
// (17, 12, 'neigh_op_bot_0') | |
// (18, 10, 'neigh_op_tnl_0') | |
// (18, 11, 'neigh_op_lft_0') | |
// (18, 12, 'neigh_op_bnl_0') | |
reg n586 = 0; | |
// (16, 10, 'neigh_op_tnr_4') | |
// (16, 11, 'neigh_op_rgt_4') | |
// (16, 12, 'neigh_op_bnr_4') | |
// (17, 10, 'neigh_op_top_4') | |
// (17, 11, 'lutff_4/out') | |
// (17, 12, 'local_g1_4') | |
// (17, 12, 'lutff_4/in_3') | |
// (17, 12, 'neigh_op_bot_4') | |
// (18, 10, 'neigh_op_tnl_4') | |
// (18, 11, 'neigh_op_lft_4') | |
// (18, 12, 'neigh_op_bnl_4') | |
wire n587; | |
// (16, 10, 'neigh_op_tnr_5') | |
// (16, 11, 'neigh_op_rgt_5') | |
// (16, 12, 'neigh_op_bnr_5') | |
// (17, 10, 'neigh_op_top_5') | |
// (17, 11, 'local_g0_5') | |
// (17, 11, 'lutff_5/out') | |
// (17, 11, 'lutff_7/in_0') | |
// (17, 12, 'neigh_op_bot_5') | |
// (18, 10, 'neigh_op_tnl_5') | |
// (18, 11, 'neigh_op_lft_5') | |
// (18, 12, 'neigh_op_bnl_5') | |
wire n588; | |
// (16, 10, 'neigh_op_tnr_6') | |
// (16, 11, 'local_g3_6') | |
// (16, 11, 'lutff_2/in_1') | |
// (16, 11, 'neigh_op_rgt_6') | |
// (16, 12, 'neigh_op_bnr_6') | |
// (17, 10, 'neigh_op_top_6') | |
// (17, 11, 'lutff_6/out') | |
// (17, 12, 'neigh_op_bot_6') | |
// (18, 10, 'neigh_op_tnl_6') | |
// (18, 11, 'neigh_op_lft_6') | |
// (18, 12, 'neigh_op_bnl_6') | |
wire n589; | |
// (16, 11, 'local_g1_2') | |
// (16, 11, 'lutff_1/in_0') | |
// (16, 11, 'sp4_h_r_2') | |
// (17, 11, 'sp4_h_r_15') | |
// (18, 11, 'sp4_h_r_26') | |
// (19, 10, 'neigh_op_tnr_1') | |
// (19, 11, 'neigh_op_rgt_1') | |
// (19, 11, 'sp4_h_r_39') | |
// (19, 12, 'neigh_op_bnr_1') | |
// (20, 10, 'neigh_op_top_1') | |
// (20, 11, 'lutff_1/out') | |
// (20, 11, 'sp4_h_l_39') | |
// (20, 11, 'sp4_h_r_2') | |
// (20, 12, 'neigh_op_bot_1') | |
// (21, 10, 'neigh_op_tnl_1') | |
// (21, 11, 'neigh_op_lft_1') | |
// (21, 11, 'sp4_h_r_15') | |
// (21, 12, 'neigh_op_bnl_1') | |
// (22, 11, 'sp4_h_r_26') | |
// (23, 11, 'sp4_h_r_39') | |
// (24, 11, 'sp4_h_l_39') | |
wire n590; | |
// (16, 11, 'local_g1_6') | |
// (16, 11, 'lutff_4/in_3') | |
// (16, 11, 'sp4_h_r_6') | |
// (17, 10, 'neigh_op_tnr_7') | |
// (17, 11, 'neigh_op_rgt_7') | |
// (17, 11, 'sp4_h_r_19') | |
// (17, 12, 'neigh_op_bnr_7') | |
// (18, 10, 'neigh_op_top_7') | |
// (18, 11, 'lutff_7/out') | |
// (18, 11, 'sp4_h_r_30') | |
// (18, 12, 'neigh_op_bot_7') | |
// (19, 10, 'neigh_op_tnl_7') | |
// (19, 11, 'neigh_op_lft_7') | |
// (19, 11, 'sp4_h_r_43') | |
// (19, 12, 'neigh_op_bnl_7') | |
// (20, 11, 'sp4_h_l_43') | |
wire n591; | |
// (16, 11, 'neigh_op_tnr_1') | |
// (16, 12, 'local_g3_1') | |
// (16, 12, 'lutff_3/in_1') | |
// (16, 12, 'neigh_op_rgt_1') | |
// (16, 13, 'neigh_op_bnr_1') | |
// (17, 11, 'neigh_op_top_1') | |
// (17, 12, 'lutff_1/out') | |
// (17, 13, 'neigh_op_bot_1') | |
// (18, 11, 'neigh_op_tnl_1') | |
// (18, 12, 'neigh_op_lft_1') | |
// (18, 13, 'neigh_op_bnl_1') | |
reg n592 = 0; | |
// (16, 11, 'neigh_op_tnr_4') | |
// (16, 12, 'neigh_op_rgt_4') | |
// (16, 13, 'neigh_op_bnr_4') | |
// (17, 11, 'neigh_op_top_4') | |
// (17, 12, 'local_g0_4') | |
// (17, 12, 'lutff_0/in_0') | |
// (17, 12, 'lutff_4/out') | |
// (17, 13, 'neigh_op_bot_4') | |
// (18, 11, 'neigh_op_tnl_4') | |
// (18, 12, 'neigh_op_lft_4') | |
// (18, 13, 'neigh_op_bnl_4') | |
reg n593 = 0; | |
// (16, 11, 'neigh_op_tnr_5') | |
// (16, 12, 'neigh_op_rgt_5') | |
// (16, 13, 'neigh_op_bnr_5') | |
// (17, 11, 'neigh_op_top_5') | |
// (17, 12, 'local_g1_5') | |
// (17, 12, 'lutff_1/in_3') | |
// (17, 12, 'lutff_5/out') | |
// (17, 13, 'neigh_op_bot_5') | |
// (18, 11, 'neigh_op_tnl_5') | |
// (18, 12, 'neigh_op_lft_5') | |
// (18, 13, 'neigh_op_bnl_5') | |
wire n594; | |
// (16, 11, 'neigh_op_tnr_7') | |
// (16, 12, 'local_g2_7') | |
// (16, 12, 'lutff_2/in_1') | |
// (16, 12, 'neigh_op_rgt_7') | |
// (16, 13, 'neigh_op_bnr_7') | |
// (17, 11, 'neigh_op_top_7') | |
// (17, 12, 'lutff_7/out') | |
// (17, 13, 'neigh_op_bot_7') | |
// (18, 11, 'neigh_op_tnl_7') | |
// (18, 12, 'neigh_op_lft_7') | |
// (18, 13, 'neigh_op_bnl_7') | |
wire n595; | |
// (16, 11, 'sp4_h_r_3') | |
// (17, 11, 'local_g0_6') | |
// (17, 11, 'lutff_5/in_3') | |
// (17, 11, 'sp4_h_r_14') | |
// (18, 10, 'neigh_op_tnr_3') | |
// (18, 11, 'neigh_op_rgt_3') | |
// (18, 11, 'sp4_h_r_27') | |
// (18, 12, 'neigh_op_bnr_3') | |
// (19, 10, 'neigh_op_top_3') | |
// (19, 11, 'ram/RDATA_12') | |
// (19, 11, 'sp4_h_r_38') | |
// (19, 12, 'neigh_op_bot_3') | |
// (20, 10, 'neigh_op_tnl_3') | |
// (20, 11, 'neigh_op_lft_3') | |
// (20, 11, 'sp4_h_l_38') | |
// (20, 12, 'neigh_op_bnl_3') | |
wire n596; | |
// (16, 12, 'local_g1_1') | |
// (16, 12, 'lutff_0/in_0') | |
// (16, 12, 'lutff_6/in_0') | |
// (16, 12, 'sp4_h_r_1') | |
// (17, 11, 'sp4_h_r_9') | |
// (17, 12, 'sp4_h_r_12') | |
// (18, 11, 'local_g0_4') | |
// (18, 11, 'lutff_0/in_2') | |
// (18, 11, 'sp4_h_r_20') | |
// (18, 12, 'sp4_h_r_25') | |
// (19, 9, 'sp4_r_v_b_36') | |
// (19, 10, 'neigh_op_tnr_6') | |
// (19, 10, 'sp4_r_v_b_25') | |
// (19, 11, 'local_g1_1') | |
// (19, 11, 'neigh_op_rgt_6') | |
// (19, 11, 'ram/WDATA_8') | |
// (19, 11, 'sp4_h_r_1') | |
// (19, 11, 'sp4_h_r_33') | |
// (19, 11, 'sp4_r_v_b_12') | |
// (19, 12, 'neigh_op_bnr_6') | |
// (19, 12, 'sp4_h_r_36') | |
// (19, 12, 'sp4_r_v_b_1') | |
// (20, 8, 'sp4_v_t_36') | |
// (20, 9, 'sp4_v_b_36') | |
// (20, 10, 'neigh_op_top_6') | |
// (20, 10, 'sp4_v_b_25') | |
// (20, 11, 'lutff_6/out') | |
// (20, 11, 'sp4_h_r_12') | |
// (20, 11, 'sp4_h_r_44') | |
// (20, 11, 'sp4_v_b_12') | |
// (20, 12, 'neigh_op_bot_6') | |
// (20, 12, 'sp4_h_l_36') | |
// (20, 12, 'sp4_v_b_1') | |
// (21, 10, 'neigh_op_tnl_6') | |
// (21, 11, 'neigh_op_lft_6') | |
// (21, 11, 'sp4_h_l_44') | |
// (21, 11, 'sp4_h_r_25') | |
// (21, 12, 'neigh_op_bnl_6') | |
// (22, 11, 'sp4_h_r_36') | |
// (23, 11, 'sp4_h_l_36') | |
wire n597; | |
// (16, 12, 'neigh_op_tnr_2') | |
// (16, 13, 'neigh_op_rgt_2') | |
// (16, 13, 'sp4_h_r_9') | |
// (16, 14, 'neigh_op_bnr_2') | |
// (17, 12, 'neigh_op_top_2') | |
// (17, 13, 'lutff_2/out') | |
// (17, 13, 'sp4_h_r_20') | |
// (17, 14, 'neigh_op_bot_2') | |
// (18, 12, 'neigh_op_tnl_2') | |
// (18, 13, 'neigh_op_lft_2') | |
// (18, 13, 'sp4_h_r_33') | |
// (18, 14, 'neigh_op_bnl_2') | |
// (19, 13, 'sp4_h_r_44') | |
// (19, 14, 'sp4_r_v_b_40') | |
// (19, 15, 'local_g1_5') | |
// (19, 15, 'ram/WDATA_12') | |
// (19, 15, 'sp4_r_v_b_29') | |
// (19, 16, 'sp4_r_v_b_16') | |
// (19, 17, 'sp4_r_v_b_5') | |
// (20, 13, 'sp4_h_l_44') | |
// (20, 13, 'sp4_h_r_5') | |
// (20, 13, 'sp4_v_t_40') | |
// (20, 14, 'sp4_v_b_40') | |
// (20, 15, 'sp4_v_b_29') | |
// (20, 16, 'sp4_v_b_16') | |
// (20, 17, 'sp4_v_b_5') | |
// (21, 13, 'sp4_h_r_16') | |
// (22, 13, 'sp4_h_r_29') | |
// (23, 13, 'sp4_h_r_40') | |
// (24, 13, 'sp4_h_l_40') | |
reg n598 = 0; | |
// (16, 12, 'neigh_op_tnr_3') | |
// (16, 13, 'neigh_op_rgt_3') | |
// (16, 14, 'neigh_op_bnr_3') | |
// (17, 12, 'local_g1_3') | |
// (17, 12, 'lutff_5/in_1') | |
// (17, 12, 'neigh_op_top_3') | |
// (17, 13, 'lutff_3/out') | |
// (17, 14, 'neigh_op_bot_3') | |
// (18, 12, 'neigh_op_tnl_3') | |
// (18, 13, 'neigh_op_lft_3') | |
// (18, 14, 'neigh_op_bnl_3') | |
wire n599; | |
// (16, 12, 'neigh_op_tnr_6') | |
// (16, 12, 'sp4_r_v_b_41') | |
// (16, 13, 'neigh_op_rgt_6') | |
// (16, 13, 'sp4_r_v_b_28') | |
// (16, 14, 'neigh_op_bnr_6') | |
// (16, 14, 'sp4_r_v_b_17') | |
// (16, 15, 'sp4_r_v_b_4') | |
// (17, 11, 'sp4_v_t_41') | |
// (17, 12, 'neigh_op_top_6') | |
// (17, 12, 'sp4_v_b_41') | |
// (17, 13, 'lutff_6/out') | |
// (17, 13, 'sp4_v_b_28') | |
// (17, 14, 'neigh_op_bot_6') | |
// (17, 14, 'sp4_v_b_17') | |
// (17, 15, 'sp4_h_r_4') | |
// (17, 15, 'sp4_v_b_4') | |
// (18, 12, 'neigh_op_tnl_6') | |
// (18, 13, 'neigh_op_lft_6') | |
// (18, 14, 'neigh_op_bnl_6') | |
// (18, 15, 'sp4_h_r_17') | |
// (19, 15, 'local_g2_4') | |
// (19, 15, 'ram/WDATA_8') | |
// (19, 15, 'sp4_h_r_28') | |
// (20, 15, 'sp4_h_r_41') | |
// (21, 15, 'sp4_h_l_41') | |
wire n600; | |
// (16, 12, 'neigh_op_tnr_7') | |
// (16, 13, 'neigh_op_rgt_7') | |
// (16, 14, 'neigh_op_bnr_7') | |
// (17, 12, 'neigh_op_top_7') | |
// (17, 12, 'sp4_r_v_b_42') | |
// (17, 13, 'lutff_7/out') | |
// (17, 13, 'sp4_r_v_b_31') | |
// (17, 14, 'neigh_op_bot_7') | |
// (17, 14, 'sp4_r_v_b_18') | |
// (17, 15, 'sp4_r_v_b_7') | |
// (18, 11, 'sp4_v_t_42') | |
// (18, 12, 'neigh_op_tnl_7') | |
// (18, 12, 'sp4_v_b_42') | |
// (18, 13, 'neigh_op_lft_7') | |
// (18, 13, 'sp4_v_b_31') | |
// (18, 14, 'neigh_op_bnl_7') | |
// (18, 14, 'sp4_v_b_18') | |
// (18, 15, 'sp4_h_r_7') | |
// (18, 15, 'sp4_v_b_7') | |
// (19, 15, 'local_g1_2') | |
// (19, 15, 'ram/WDATA_11') | |
// (19, 15, 'sp4_h_r_18') | |
// (20, 15, 'sp4_h_r_31') | |
// (21, 15, 'sp4_h_r_42') | |
// (22, 15, 'sp4_h_l_42') | |
wire n601; | |
// (16, 12, 'sp4_h_r_6') | |
// (17, 12, 'local_g0_3') | |
// (17, 12, 'lutff_0/in_1') | |
// (17, 12, 'sp4_h_r_19') | |
// (18, 10, 'neigh_op_tnr_1') | |
// (18, 11, 'neigh_op_rgt_1') | |
// (18, 12, 'neigh_op_bnr_1') | |
// (18, 12, 'sp4_h_r_30') | |
// (19, 9, 'sp4_r_v_b_43') | |
// (19, 10, 'neigh_op_top_1') | |
// (19, 10, 'sp4_r_v_b_30') | |
// (19, 11, 'ram/RDATA_14') | |
// (19, 11, 'sp4_r_v_b_19') | |
// (19, 12, 'neigh_op_bot_1') | |
// (19, 12, 'sp4_h_r_43') | |
// (19, 12, 'sp4_r_v_b_6') | |
// (20, 8, 'sp4_v_t_43') | |
// (20, 9, 'sp4_v_b_43') | |
// (20, 10, 'neigh_op_tnl_1') | |
// (20, 10, 'sp4_v_b_30') | |
// (20, 11, 'neigh_op_lft_1') | |
// (20, 11, 'sp4_v_b_19') | |
// (20, 12, 'neigh_op_bnl_1') | |
// (20, 12, 'sp4_h_l_43') | |
// (20, 12, 'sp4_v_b_6') | |
wire n602; | |
// (16, 12, 'sp4_h_r_8') | |
// (17, 12, 'local_g0_5') | |
// (17, 12, 'lutff_1/in_0') | |
// (17, 12, 'sp4_h_r_21') | |
// (18, 10, 'neigh_op_tnr_2') | |
// (18, 11, 'neigh_op_rgt_2') | |
// (18, 12, 'neigh_op_bnr_2') | |
// (18, 12, 'sp4_h_r_32') | |
// (19, 9, 'sp4_r_v_b_45') | |
// (19, 10, 'neigh_op_top_2') | |
// (19, 10, 'sp4_r_v_b_32') | |
// (19, 11, 'ram/RDATA_13') | |
// (19, 11, 'sp4_r_v_b_21') | |
// (19, 12, 'neigh_op_bot_2') | |
// (19, 12, 'sp4_h_r_45') | |
// (19, 12, 'sp4_r_v_b_8') | |
// (20, 8, 'sp4_v_t_45') | |
// (20, 9, 'sp4_v_b_45') | |
// (20, 10, 'neigh_op_tnl_2') | |
// (20, 10, 'sp4_v_b_32') | |
// (20, 11, 'neigh_op_lft_2') | |
// (20, 11, 'sp4_v_b_21') | |
// (20, 12, 'neigh_op_bnl_2') | |
// (20, 12, 'sp4_h_l_45') | |
// (20, 12, 'sp4_v_b_8') | |
reg n603 = 0; | |
// (16, 13, 'neigh_op_tnr_3') | |
// (16, 14, 'neigh_op_rgt_3') | |
// (16, 15, 'neigh_op_bnr_3') | |
// (17, 13, 'neigh_op_top_3') | |
// (17, 14, 'local_g3_3') | |
// (17, 14, 'lutff_3/out') | |
// (17, 14, 'lutff_4/in_2') | |
// (17, 15, 'neigh_op_bot_3') | |
// (18, 13, 'neigh_op_tnl_3') | |
// (18, 14, 'neigh_op_lft_3') | |
// (18, 15, 'neigh_op_bnl_3') | |
wire n604; | |
// (16, 13, 'neigh_op_tnr_6') | |
// (16, 14, 'neigh_op_rgt_6') | |
// (16, 15, 'neigh_op_bnr_6') | |
// (17, 12, 'sp4_r_v_b_37') | |
// (17, 13, 'neigh_op_top_6') | |
// (17, 13, 'sp4_r_v_b_24') | |
// (17, 14, 'lutff_6/out') | |
// (17, 14, 'sp4_r_v_b_13') | |
// (17, 15, 'neigh_op_bot_6') | |
// (17, 15, 'sp4_r_v_b_0') | |
// (18, 11, 'sp4_v_t_37') | |
// (18, 12, 'sp4_v_b_37') | |
// (18, 13, 'neigh_op_tnl_6') | |
// (18, 13, 'sp4_v_b_24') | |
// (18, 14, 'neigh_op_lft_6') | |
// (18, 14, 'sp4_v_b_13') | |
// (18, 15, 'neigh_op_bnl_6') | |
// (18, 15, 'sp4_h_r_6') | |
// (18, 15, 'sp4_v_b_0') | |
// (19, 15, 'local_g0_3') | |
// (19, 15, 'ram/WDATA_13') | |
// (19, 15, 'sp4_h_r_19') | |
// (20, 15, 'sp4_h_r_30') | |
// (21, 15, 'sp4_h_r_43') | |
// (22, 15, 'sp4_h_l_43') | |
wire n605; | |
// (16, 14, 'local_g0_1') | |
// (16, 14, 'lutff_2/in_1') | |
// (16, 14, 'sp4_h_r_9') | |
// (17, 14, 'sp4_h_r_20') | |
// (18, 14, 'sp4_h_r_33') | |
// (18, 15, 'neigh_op_tnr_5') | |
// (18, 16, 'neigh_op_rgt_5') | |
// (18, 17, 'neigh_op_bnr_5') | |
// (19, 14, 'sp4_h_r_44') | |
// (19, 15, 'neigh_op_top_5') | |
// (19, 15, 'sp4_r_v_b_38') | |
// (19, 16, 'ram/RDATA_2') | |
// (19, 16, 'sp4_r_v_b_27') | |
// (19, 17, 'neigh_op_bot_5') | |
// (19, 17, 'sp4_r_v_b_14') | |
// (19, 18, 'sp4_r_v_b_3') | |
// (20, 14, 'sp4_h_l_44') | |
// (20, 14, 'sp4_v_t_38') | |
// (20, 15, 'neigh_op_tnl_5') | |
// (20, 15, 'sp4_v_b_38') | |
// (20, 16, 'neigh_op_lft_5') | |
// (20, 16, 'sp4_v_b_27') | |
// (20, 17, 'neigh_op_bnl_5') | |
// (20, 17, 'sp4_v_b_14') | |
// (20, 18, 'sp4_v_b_3') | |
wire n606; | |
// (16, 14, 'neigh_op_tnr_0') | |
// (16, 15, 'neigh_op_rgt_0') | |
// (16, 16, 'neigh_op_bnr_0') | |
// (17, 14, 'neigh_op_top_0') | |
// (17, 15, 'lutff_0/out') | |
// (17, 16, 'neigh_op_bot_0') | |
// (18, 14, 'neigh_op_tnl_0') | |
// (18, 15, 'local_g0_0') | |
// (18, 15, 'lutff_0/in_0') | |
// (18, 15, 'neigh_op_lft_0') | |
// (18, 16, 'neigh_op_bnl_0') | |
reg n607 = 0; | |
// (16, 14, 'neigh_op_tnr_2') | |
// (16, 15, 'neigh_op_rgt_2') | |
// (16, 16, 'neigh_op_bnr_2') | |
// (17, 14, 'neigh_op_top_2') | |
// (17, 15, 'local_g2_2') | |
// (17, 15, 'lutff_2/out') | |
// (17, 15, 'lutff_5/in_3') | |
// (17, 16, 'neigh_op_bot_2') | |
// (18, 14, 'neigh_op_tnl_2') | |
// (18, 15, 'neigh_op_lft_2') | |
// (18, 16, 'neigh_op_bnl_2') | |
wire n608; | |
// (16, 14, 'neigh_op_tnr_4') | |
// (16, 15, 'neigh_op_rgt_4') | |
// (16, 16, 'neigh_op_bnr_4') | |
// (17, 14, 'neigh_op_top_4') | |
// (17, 15, 'local_g1_4') | |
// (17, 15, 'lutff_4/out') | |
// (17, 15, 'lutff_6/in_1') | |
// (17, 16, 'neigh_op_bot_4') | |
// (18, 14, 'neigh_op_tnl_4') | |
// (18, 15, 'neigh_op_lft_4') | |
// (18, 16, 'neigh_op_bnl_4') | |
wire n609; | |
// (16, 14, 'neigh_op_tnr_6') | |
// (16, 15, 'neigh_op_rgt_6') | |
// (16, 15, 'sp4_h_r_1') | |
// (16, 16, 'neigh_op_bnr_6') | |
// (17, 13, 'sp4_r_v_b_37') | |
// (17, 14, 'neigh_op_top_6') | |
// (17, 14, 'sp4_r_v_b_24') | |
// (17, 15, 'local_g0_6') | |
// (17, 15, 'lutff_0/in_0') | |
// (17, 15, 'lutff_6/out') | |
// (17, 15, 'sp4_h_r_12') | |
// (17, 15, 'sp4_r_v_b_13') | |
// (17, 16, 'neigh_op_bot_6') | |
// (17, 16, 'sp4_r_v_b_0') | |
// (18, 12, 'sp4_v_t_37') | |
// (18, 13, 'sp4_v_b_37') | |
// (18, 14, 'neigh_op_tnl_6') | |
// (18, 14, 'sp4_v_b_24') | |
// (18, 15, 'neigh_op_lft_6') | |
// (18, 15, 'sp4_h_r_25') | |
// (18, 15, 'sp4_v_b_13') | |
// (18, 16, 'neigh_op_bnl_6') | |
// (18, 16, 'sp4_h_r_6') | |
// (18, 16, 'sp4_v_b_0') | |
// (19, 15, 'sp4_h_r_36') | |
// (19, 16, 'local_g0_3') | |
// (19, 16, 'ram/WADDR_0') | |
// (19, 16, 'sp4_h_r_19') | |
// (20, 15, 'local_g0_1') | |
// (20, 15, 'lutff_5/in_2') | |
// (20, 15, 'lutff_7/in_0') | |
// (20, 15, 'sp4_h_l_36') | |
// (20, 15, 'sp4_h_r_1') | |
// (20, 16, 'sp4_h_r_30') | |
// (21, 15, 'sp4_h_r_12') | |
// (21, 16, 'sp4_h_r_43') | |
// (22, 15, 'sp4_h_r_25') | |
// (22, 16, 'sp4_h_l_43') | |
// (23, 15, 'sp4_h_r_36') | |
// (24, 15, 'sp4_h_l_36') | |
wire n610; | |
// (16, 14, 'neigh_op_tnr_7') | |
// (16, 15, 'neigh_op_rgt_7') | |
// (16, 16, 'neigh_op_bnr_7') | |
// (17, 14, 'neigh_op_top_7') | |
// (17, 15, 'local_g2_7') | |
// (17, 15, 'lutff_0/in_1') | |
// (17, 15, 'lutff_7/out') | |
// (17, 16, 'neigh_op_bot_7') | |
// (18, 14, 'neigh_op_tnl_7') | |
// (18, 15, 'neigh_op_lft_7') | |
// (18, 16, 'neigh_op_bnl_7') | |
wire n611; | |
// (16, 14, 'sp4_h_r_11') | |
// (17, 14, 'local_g1_6') | |
// (17, 14, 'lutff_4/in_1') | |
// (17, 14, 'sp4_h_r_22') | |
// (18, 14, 'sp4_h_r_35') | |
// (18, 15, 'neigh_op_tnr_6') | |
// (18, 16, 'neigh_op_rgt_6') | |
// (18, 17, 'neigh_op_bnr_6') | |
// (19, 14, 'sp4_h_r_46') | |
// (19, 15, 'neigh_op_top_6') | |
// (19, 15, 'sp4_r_v_b_40') | |
// (19, 16, 'ram/RDATA_1') | |
// (19, 16, 'sp4_r_v_b_29') | |
// (19, 17, 'neigh_op_bot_6') | |
// (19, 17, 'sp4_r_v_b_16') | |
// (19, 18, 'sp4_r_v_b_5') | |
// (20, 14, 'sp4_h_l_46') | |
// (20, 14, 'sp4_v_t_40') | |
// (20, 15, 'neigh_op_tnl_6') | |
// (20, 15, 'sp4_v_b_40') | |
// (20, 16, 'neigh_op_lft_6') | |
// (20, 16, 'sp4_v_b_29') | |
// (20, 17, 'neigh_op_bnl_6') | |
// (20, 17, 'sp4_v_b_16') | |
// (20, 18, 'sp4_v_b_5') | |
reg n612 = 0; | |
// (16, 15, 'local_g0_6') | |
// (16, 15, 'lutff_7/in_3') | |
// (16, 15, 'sp4_h_r_6') | |
// (16, 16, 'local_g3_2') | |
// (16, 16, 'lutff_0/in_1') | |
// (16, 16, 'sp4_r_v_b_42') | |
// (16, 17, 'sp4_r_v_b_31') | |
// (16, 18, 'sp4_r_v_b_18') | |
// (16, 19, 'sp4_r_v_b_7') | |
// (17, 15, 'local_g1_7') | |
// (17, 15, 'lutff_4/in_2') | |
// (17, 15, 'lutff_6/in_0') | |
// (17, 15, 'sp4_h_r_19') | |
// (17, 15, 'sp4_h_r_7') | |
// (17, 15, 'sp4_v_t_42') | |
// (17, 16, 'sp4_v_b_42') | |
// (17, 17, 'sp4_v_b_31') | |
// (17, 18, 'sp4_v_b_18') | |
// (17, 19, 'sp4_v_b_7') | |
// (18, 15, 'sp4_h_r_18') | |
// (18, 15, 'sp4_h_r_30') | |
// (19, 14, 'neigh_op_tnr_5') | |
// (19, 15, 'neigh_op_rgt_5') | |
// (19, 15, 'sp4_h_r_31') | |
// (19, 15, 'sp4_h_r_43') | |
// (19, 16, 'neigh_op_bnr_5') | |
// (20, 14, 'neigh_op_top_5') | |
// (20, 15, 'lutff_5/out') | |
// (20, 15, 'sp4_h_l_43') | |
// (20, 15, 'sp4_h_r_10') | |
// (20, 15, 'sp4_h_r_42') | |
// (20, 16, 'neigh_op_bot_5') | |
// (21, 14, 'neigh_op_tnl_5') | |
// (21, 15, 'neigh_op_lft_5') | |
// (21, 15, 'sp4_h_l_42') | |
// (21, 15, 'sp4_h_r_23') | |
// (21, 16, 'neigh_op_bnl_5') | |
// (22, 15, 'sp4_h_r_34') | |
// (23, 15, 'sp4_h_r_47') | |
// (24, 15, 'sp4_h_l_47') | |
reg n613 = 0; | |
// (16, 15, 'neigh_op_tnr_0') | |
// (16, 16, 'local_g2_0') | |
// (16, 16, 'lutff_4/in_2') | |
// (16, 16, 'neigh_op_rgt_0') | |
// (16, 17, 'neigh_op_bnr_0') | |
// (17, 15, 'neigh_op_top_0') | |
// (17, 16, 'local_g2_0') | |
// (17, 16, 'lutff_0/out') | |
// (17, 16, 'lutff_1/in_3') | |
// (17, 17, 'neigh_op_bot_0') | |
// (18, 15, 'neigh_op_tnl_0') | |
// (18, 16, 'neigh_op_lft_0') | |
// (18, 17, 'neigh_op_bnl_0') | |
wire n614; | |
// (16, 15, 'neigh_op_tnr_1') | |
// (16, 16, 'neigh_op_rgt_1') | |
// (16, 16, 'sp4_h_r_7') | |
// (16, 17, 'neigh_op_bnr_1') | |
// (17, 15, 'local_g0_1') | |
// (17, 15, 'lutff_7/in_2') | |
// (17, 15, 'neigh_op_top_1') | |
// (17, 16, 'local_g2_1') | |
// (17, 16, 'lutff_0/in_3') | |
// (17, 16, 'lutff_1/out') | |
// (17, 16, 'sp4_h_r_18') | |
// (17, 17, 'neigh_op_bot_1') | |
// (18, 15, 'local_g3_1') | |
// (18, 15, 'lutff_1/in_3') | |
// (18, 15, 'neigh_op_tnl_1') | |
// (18, 16, 'neigh_op_lft_1') | |
// (18, 16, 'sp4_h_r_31') | |
// (18, 17, 'neigh_op_bnl_1') | |
// (19, 16, 'local_g3_2') | |
// (19, 16, 'ram/WADDR_4') | |
// (19, 16, 'sp4_h_r_42') | |
// (20, 16, 'sp4_h_l_42') | |
reg n615 = 0; | |
// (16, 15, 'neigh_op_tnr_2') | |
// (16, 16, 'local_g2_2') | |
// (16, 16, 'lutff_3/in_1') | |
// (16, 16, 'neigh_op_rgt_2') | |
// (16, 17, 'neigh_op_bnr_2') | |
// (17, 15, 'neigh_op_top_2') | |
// (17, 16, 'local_g2_2') | |
// (17, 16, 'lutff_2/out') | |
// (17, 16, 'lutff_3/in_1') | |
// (17, 17, 'neigh_op_bot_2') | |
// (18, 15, 'neigh_op_tnl_2') | |
// (18, 16, 'neigh_op_lft_2') | |
// (18, 17, 'neigh_op_bnl_2') | |
wire n616; | |
// (16, 15, 'neigh_op_tnr_3') | |
// (16, 16, 'neigh_op_rgt_3') | |
// (16, 17, 'neigh_op_bnr_3') | |
// (17, 15, 'local_g1_3') | |
// (17, 15, 'lutff_7/in_1') | |
// (17, 15, 'neigh_op_top_3') | |
// (17, 16, 'local_g2_3') | |
// (17, 16, 'lutff_2/in_1') | |
// (17, 16, 'lutff_3/out') | |
// (17, 16, 'sp4_h_r_6') | |
// (17, 17, 'neigh_op_bot_3') | |
// (18, 15, 'local_g3_3') | |
// (18, 15, 'lutff_6/in_2') | |
// (18, 15, 'neigh_op_tnl_3') | |
// (18, 16, 'neigh_op_lft_3') | |
// (18, 16, 'sp4_h_r_19') | |
// (18, 17, 'neigh_op_bnl_3') | |
// (19, 16, 'local_g2_6') | |
// (19, 16, 'ram/WADDR_3') | |
// (19, 16, 'sp4_h_r_30') | |
// (20, 16, 'sp4_h_r_43') | |
// (21, 16, 'sp4_h_l_43') | |
reg n617 = 0; | |
// (16, 15, 'neigh_op_tnr_4') | |
// (16, 16, 'local_g2_4') | |
// (16, 16, 'lutff_6/in_2') | |
// (16, 16, 'neigh_op_rgt_4') | |
// (16, 17, 'neigh_op_bnr_4') | |
// (17, 15, 'neigh_op_top_4') | |
// (17, 16, 'local_g0_4') | |
// (17, 16, 'lutff_4/out') | |
// (17, 16, 'lutff_6/in_2') | |
// (17, 17, 'neigh_op_bot_4') | |
// (18, 15, 'neigh_op_tnl_4') | |
// (18, 16, 'neigh_op_lft_4') | |
// (18, 17, 'neigh_op_bnl_4') | |
reg n618 = 0; | |
// (16, 15, 'neigh_op_tnr_5') | |
// (16, 16, 'local_g3_5') | |
// (16, 16, 'lutff_2/in_2') | |
// (16, 16, 'neigh_op_rgt_5') | |
// (16, 17, 'neigh_op_bnr_5') | |
// (17, 15, 'neigh_op_top_5') | |
// (17, 16, 'local_g2_5') | |
// (17, 16, 'lutff_5/out') | |
// (17, 16, 'lutff_7/in_2') | |
// (17, 17, 'neigh_op_bot_5') | |
// (18, 15, 'neigh_op_tnl_5') | |
// (18, 16, 'neigh_op_lft_5') | |
// (18, 17, 'neigh_op_bnl_5') | |
wire n619; | |
// (16, 15, 'neigh_op_tnr_6') | |
// (16, 16, 'neigh_op_rgt_6') | |
// (16, 16, 'sp4_h_r_1') | |
// (16, 17, 'neigh_op_bnr_6') | |
// (17, 15, 'local_g1_6') | |
// (17, 15, 'lutff_7/in_0') | |
// (17, 15, 'neigh_op_top_6') | |
// (17, 16, 'local_g3_6') | |
// (17, 16, 'lutff_4/in_3') | |
// (17, 16, 'lutff_6/out') | |
// (17, 16, 'sp4_h_r_12') | |
// (17, 17, 'neigh_op_bot_6') | |
// (18, 15, 'local_g3_6') | |
// (18, 15, 'lutff_5/in_2') | |
// (18, 15, 'neigh_op_tnl_6') | |
// (18, 16, 'neigh_op_lft_6') | |
// (18, 16, 'sp4_h_r_25') | |
// (18, 17, 'neigh_op_bnl_6') | |
// (19, 16, 'local_g3_4') | |
// (19, 16, 'ram/WADDR_6') | |
// (19, 16, 'sp4_h_r_36') | |
// (20, 16, 'sp4_h_l_36') | |
wire n620; | |
// (16, 16, 'lutff_1/cout') | |
// (16, 16, 'lutff_2/in_3') | |
wire n621; | |
// (16, 16, 'lutff_2/cout') | |
// (16, 16, 'lutff_3/in_3') | |
wire n622; | |
// (16, 16, 'lutff_3/cout') | |
// (16, 16, 'lutff_4/in_3') | |
wire n623; | |
// (16, 16, 'lutff_4/cout') | |
// (16, 16, 'lutff_5/in_3') | |
wire n624; | |
// (16, 16, 'lutff_5/cout') | |
// (16, 16, 'lutff_6/in_3') | |
wire n625; | |
// (16, 16, 'lutff_6/cout') | |
// (16, 16, 'lutff_7/in_3') | |
reg n626 = 0; | |
// (17, 2, 'neigh_op_tnr_7') | |
// (17, 3, 'neigh_op_rgt_7') | |
// (17, 4, 'local_g0_7') | |
// (17, 4, 'lutff_5/in_2') | |
// (17, 4, 'neigh_op_bnr_7') | |
// (18, 2, 'neigh_op_top_7') | |
// (18, 3, 'lutff_7/out') | |
// (18, 4, 'neigh_op_bot_7') | |
// (19, 2, 'neigh_op_tnl_7') | |
// (19, 3, 'neigh_op_lft_7') | |
// (19, 4, 'neigh_op_bnl_7') | |
wire SCK; | |
// (17, 3, 'sp4_h_r_8') | |
// (18, 3, 'local_g0_5') | |
// (18, 3, 'lutff_7/in_2') | |
// (18, 3, 'sp4_h_r_21') | |
// (19, 3, 'sp4_h_r_32') | |
// (20, 3, 'sp4_h_r_45') | |
// (21, 3, 'sp4_h_l_45') | |
// (21, 3, 'sp4_h_r_8') | |
// (22, 3, 'sp4_h_r_21') | |
// (23, 1, 'neigh_op_bnr_0') | |
// (23, 1, 'neigh_op_bnr_4') | |
// (23, 3, 'sp4_h_r_32') | |
// (24, 0, 'io_0/D_IN_0') | |
// (24, 0, 'io_0/PAD') | |
// (24, 0, 'span4_horz_r_0') | |
// (24, 1, 'neigh_op_bot_0') | |
// (24, 1, 'neigh_op_bot_4') | |
// (24, 1, 'sp4_r_v_b_32') | |
// (24, 2, 'sp4_r_v_b_21') | |
// (24, 3, 'sp4_h_r_45') | |
// (24, 3, 'sp4_r_v_b_8') | |
// (25, 1, 'sp4_v_b_32') | |
// (25, 2, 'sp4_v_b_21') | |
// (25, 3, 'sp4_h_l_45') | |
// (25, 3, 'sp4_v_b_8') | |
wire n628; | |
// (17, 7, 'neigh_op_tnr_1') | |
// (17, 8, 'neigh_op_rgt_1') | |
// (17, 9, 'neigh_op_bnr_1') | |
// (18, 7, 'neigh_op_top_1') | |
// (18, 8, 'lutff_1/out') | |
// (18, 9, 'neigh_op_bot_1') | |
// (19, 7, 'neigh_op_tnl_1') | |
// (19, 8, 'neigh_op_lft_1') | |
// (19, 9, 'local_g2_1') | |
// (19, 9, 'neigh_op_bnl_1') | |
// (19, 9, 'ram/RADDR_0') | |
wire n629; | |
// (17, 7, 'sp4_r_v_b_46') | |
// (17, 8, 'sp4_r_v_b_35') | |
// (17, 9, 'local_g3_6') | |
// (17, 9, 'lutff_7/in_0') | |
// (17, 9, 'sp4_r_v_b_22') | |
// (17, 10, 'sp4_r_v_b_11') | |
// (18, 6, 'sp4_v_t_46') | |
// (18, 7, 'sp4_v_b_46') | |
// (18, 8, 'sp4_v_b_35') | |
// (18, 9, 'neigh_op_tnr_3') | |
// (18, 9, 'sp4_v_b_22') | |
// (18, 10, 'neigh_op_rgt_3') | |
// (18, 10, 'sp4_h_r_11') | |
// (18, 10, 'sp4_v_b_11') | |
// (18, 11, 'neigh_op_bnr_3') | |
// (19, 9, 'neigh_op_top_3') | |
// (19, 10, 'ram/RDATA_4') | |
// (19, 10, 'sp4_h_r_22') | |
// (19, 11, 'neigh_op_bot_3') | |
// (20, 9, 'neigh_op_tnl_3') | |
// (20, 10, 'neigh_op_lft_3') | |
// (20, 10, 'sp4_h_r_35') | |
// (20, 11, 'neigh_op_bnl_3') | |
// (21, 10, 'sp4_h_r_46') | |
// (22, 10, 'sp4_h_l_46') | |
wire n630; | |
// (17, 8, 'neigh_op_tnr_2') | |
// (17, 9, 'neigh_op_rgt_2') | |
// (17, 10, 'neigh_op_bnr_2') | |
// (18, 8, 'neigh_op_top_2') | |
// (18, 9, 'lutff_2/out') | |
// (18, 10, 'neigh_op_bot_2') | |
// (19, 8, 'neigh_op_tnl_2') | |
// (19, 9, 'local_g0_2') | |
// (19, 9, 'neigh_op_lft_2') | |
// (19, 9, 'ram/RADDR_5') | |
// (19, 10, 'neigh_op_bnl_2') | |
wire n631; | |
// (17, 8, 'neigh_op_tnr_3') | |
// (17, 9, 'neigh_op_rgt_3') | |
// (17, 10, 'neigh_op_bnr_3') | |
// (18, 8, 'neigh_op_top_3') | |
// (18, 9, 'lutff_3/out') | |
// (18, 10, 'neigh_op_bot_3') | |
// (19, 8, 'neigh_op_tnl_3') | |
// (19, 9, 'local_g0_3') | |
// (19, 9, 'neigh_op_lft_3') | |
// (19, 9, 'ram/RADDR_4') | |
// (19, 10, 'neigh_op_bnl_3') | |
reg n632 = 0; | |
// (17, 8, 'neigh_op_tnr_5') | |
// (17, 9, 'neigh_op_rgt_5') | |
// (17, 10, 'neigh_op_bnr_5') | |
// (18, 8, 'neigh_op_top_5') | |
// (18, 9, 'local_g0_5') | |
// (18, 9, 'lutff_1/in_0') | |
// (18, 9, 'lutff_5/out') | |
// (18, 10, 'neigh_op_bot_5') | |
// (19, 8, 'neigh_op_tnl_5') | |
// (19, 9, 'neigh_op_lft_5') | |
// (19, 10, 'neigh_op_bnl_5') | |
wire n633; | |
// (17, 8, 'neigh_op_tnr_6') | |
// (17, 9, 'neigh_op_rgt_6') | |
// (17, 10, 'neigh_op_bnr_6') | |
// (18, 8, 'neigh_op_top_6') | |
// (18, 9, 'lutff_6/out') | |
// (18, 10, 'neigh_op_bot_6') | |
// (19, 8, 'neigh_op_tnl_6') | |
// (19, 9, 'local_g0_6') | |
// (19, 9, 'neigh_op_lft_6') | |
// (19, 9, 'ram/RADDR_1') | |
// (19, 10, 'neigh_op_bnl_6') | |
wire n634; | |
// (17, 8, 'neigh_op_tnr_7') | |
// (17, 9, 'neigh_op_rgt_7') | |
// (17, 10, 'neigh_op_bnr_7') | |
// (18, 8, 'neigh_op_top_7') | |
// (18, 9, 'lutff_7/out') | |
// (18, 10, 'neigh_op_bot_7') | |
// (19, 8, 'neigh_op_tnl_7') | |
// (19, 9, 'local_g0_7') | |
// (19, 9, 'local_g1_7') | |
// (19, 9, 'neigh_op_lft_7') | |
// (19, 9, 'ram/MASK_10') | |
// (19, 9, 'ram/MASK_11') | |
// (19, 9, 'ram/MASK_12') | |
// (19, 9, 'ram/MASK_13') | |
// (19, 9, 'ram/MASK_14') | |
// (19, 9, 'ram/MASK_15') | |
// (19, 9, 'ram/MASK_8') | |
// (19, 9, 'ram/MASK_9') | |
// (19, 10, 'local_g2_7') | |
// (19, 10, 'local_g3_7') | |
// (19, 10, 'neigh_op_bnl_7') | |
// (19, 10, 'ram/MASK_0') | |
// (19, 10, 'ram/MASK_1') | |
// (19, 10, 'ram/MASK_2') | |
// (19, 10, 'ram/MASK_3') | |
// (19, 10, 'ram/MASK_4') | |
// (19, 10, 'ram/MASK_5') | |
// (19, 10, 'ram/MASK_6') | |
// (19, 10, 'ram/MASK_7') | |
reg n635 = 0; | |
// (17, 9, 'neigh_op_tnr_1') | |
// (17, 10, 'neigh_op_rgt_1') | |
// (17, 11, 'neigh_op_bnr_1') | |
// (18, 9, 'neigh_op_top_1') | |
// (18, 10, 'local_g2_1') | |
// (18, 10, 'lutff_0/in_3') | |
// (18, 10, 'lutff_1/out') | |
// (18, 11, 'neigh_op_bot_1') | |
// (19, 9, 'neigh_op_tnl_1') | |
// (19, 10, 'neigh_op_lft_1') | |
// (19, 11, 'neigh_op_bnl_1') | |
reg n636 = 0; | |
// (17, 9, 'neigh_op_tnr_2') | |
// (17, 10, 'neigh_op_rgt_2') | |
// (17, 10, 'sp4_h_r_9') | |
// (17, 11, 'neigh_op_bnr_2') | |
// (18, 9, 'neigh_op_top_2') | |
// (18, 10, 'lutff_2/out') | |
// (18, 10, 'sp4_h_r_20') | |
// (18, 11, 'neigh_op_bot_2') | |
// (19, 9, 'neigh_op_tnl_2') | |
// (19, 10, 'neigh_op_lft_2') | |
// (19, 10, 'sp4_h_r_33') | |
// (19, 11, 'neigh_op_bnl_2') | |
// (20, 10, 'local_g3_4') | |
// (20, 10, 'lutff_5/in_0') | |
// (20, 10, 'sp4_h_r_44') | |
// (21, 10, 'sp4_h_l_44') | |
reg n637 = 0; | |
// (17, 9, 'neigh_op_tnr_3') | |
// (17, 10, 'neigh_op_rgt_3') | |
// (17, 11, 'neigh_op_bnr_3') | |
// (18, 9, 'neigh_op_top_3') | |
// (18, 10, 'local_g0_3') | |
// (18, 10, 'lutff_3/out') | |
// (18, 10, 'lutff_7/in_0') | |
// (18, 11, 'neigh_op_bot_3') | |
// (19, 9, 'neigh_op_tnl_3') | |
// (19, 10, 'neigh_op_lft_3') | |
// (19, 11, 'neigh_op_bnl_3') | |
reg n638 = 0; | |
// (17, 9, 'neigh_op_tnr_5') | |
// (17, 10, 'neigh_op_rgt_5') | |
// (17, 11, 'neigh_op_bnr_5') | |
// (18, 9, 'neigh_op_top_5') | |
// (18, 10, 'local_g1_5') | |
// (18, 10, 'lutff_5/out') | |
// (18, 10, 'lutff_6/in_2') | |
// (18, 11, 'neigh_op_bot_5') | |
// (19, 9, 'neigh_op_tnl_5') | |
// (19, 10, 'neigh_op_lft_5') | |
// (19, 11, 'neigh_op_bnl_5') | |
reg n639 = 0; | |
// (17, 9, 'sp4_h_r_1') | |
// (18, 9, 'local_g1_4') | |
// (18, 9, 'lutff_0/in_3') | |
// (18, 9, 'sp4_h_r_12') | |
// (19, 8, 'neigh_op_tnr_2') | |
// (19, 9, 'neigh_op_rgt_2') | |
// (19, 9, 'sp4_h_r_25') | |
// (19, 10, 'neigh_op_bnr_2') | |
// (20, 8, 'neigh_op_top_2') | |
// (20, 9, 'lutff_2/out') | |
// (20, 9, 'sp4_h_r_36') | |
// (20, 10, 'neigh_op_bot_2') | |
// (21, 8, 'neigh_op_tnl_2') | |
// (21, 9, 'neigh_op_lft_2') | |
// (21, 9, 'sp4_h_l_36') | |
// (21, 10, 'neigh_op_bnl_2') | |
wire n640; | |
// (17, 10, 'local_g1_0') | |
// (17, 10, 'lutff_1/in_2') | |
// (17, 10, 'sp4_h_r_0') | |
// (18, 9, 'neigh_op_tnr_4') | |
// (18, 10, 'neigh_op_rgt_4') | |
// (18, 10, 'sp4_h_r_13') | |
// (18, 11, 'neigh_op_bnr_4') | |
// (19, 9, 'neigh_op_top_4') | |
// (19, 10, 'ram/RDATA_3') | |
// (19, 10, 'sp4_h_r_24') | |
// (19, 11, 'neigh_op_bot_4') | |
// (20, 9, 'neigh_op_tnl_4') | |
// (20, 10, 'neigh_op_lft_4') | |
// (20, 10, 'sp4_h_r_37') | |
// (20, 11, 'neigh_op_bnl_4') | |
// (21, 10, 'sp4_h_l_37') | |
reg n641 = 0; | |
// (17, 10, 'neigh_op_tnr_0') | |
// (17, 11, 'neigh_op_rgt_0') | |
// (17, 12, 'neigh_op_bnr_0') | |
// (18, 10, 'neigh_op_top_0') | |
// (18, 11, 'lutff_0/out') | |
// (18, 12, 'local_g0_0') | |
// (18, 12, 'lutff_6/in_2') | |
// (18, 12, 'neigh_op_bot_0') | |
// (19, 10, 'neigh_op_tnl_0') | |
// (19, 11, 'neigh_op_lft_0') | |
// (19, 12, 'neigh_op_bnl_0') | |
wire n642; | |
// (17, 10, 'neigh_op_tnr_2') | |
// (17, 11, 'local_g2_2') | |
// (17, 11, 'lutff_1/in_3') | |
// (17, 11, 'neigh_op_rgt_2') | |
// (17, 12, 'neigh_op_bnr_2') | |
// (18, 10, 'neigh_op_top_2') | |
// (18, 11, 'lutff_2/out') | |
// (18, 12, 'neigh_op_bot_2') | |
// (19, 10, 'neigh_op_tnl_2') | |
// (19, 11, 'neigh_op_lft_2') | |
// (19, 12, 'neigh_op_bnl_2') | |
reg n643 = 0; | |
// (17, 10, 'neigh_op_tnr_3') | |
// (17, 11, 'neigh_op_rgt_3') | |
// (17, 12, 'neigh_op_bnr_3') | |
// (18, 10, 'neigh_op_top_3') | |
// (18, 11, 'lutff_3/out') | |
// (18, 11, 'sp4_h_r_6') | |
// (18, 12, 'neigh_op_bot_3') | |
// (19, 10, 'neigh_op_tnl_3') | |
// (19, 11, 'neigh_op_lft_3') | |
// (19, 11, 'sp4_h_r_19') | |
// (19, 12, 'neigh_op_bnl_3') | |
// (20, 11, 'local_g3_6') | |
// (20, 11, 'lutff_0/in_1') | |
// (20, 11, 'sp4_h_r_30') | |
// (21, 11, 'sp4_h_r_43') | |
// (22, 11, 'sp4_h_l_43') | |
wire n644; | |
// (17, 10, 'neigh_op_tnr_4') | |
// (17, 11, 'local_g2_4') | |
// (17, 11, 'lutff_3/in_1') | |
// (17, 11, 'neigh_op_rgt_4') | |
// (17, 12, 'neigh_op_bnr_4') | |
// (18, 10, 'neigh_op_top_4') | |
// (18, 11, 'lutff_4/out') | |
// (18, 12, 'neigh_op_bot_4') | |
// (19, 10, 'neigh_op_tnl_4') | |
// (19, 11, 'neigh_op_lft_4') | |
// (19, 12, 'neigh_op_bnl_4') | |
reg n645 = 0; | |
// (17, 10, 'neigh_op_tnr_5') | |
// (17, 11, 'neigh_op_rgt_5') | |
// (17, 12, 'neigh_op_bnr_5') | |
// (18, 10, 'neigh_op_top_5') | |
// (18, 11, 'lutff_5/out') | |
// (18, 12, 'local_g0_5') | |
// (18, 12, 'lutff_4/in_1') | |
// (18, 12, 'neigh_op_bot_5') | |
// (19, 10, 'neigh_op_tnl_5') | |
// (19, 11, 'neigh_op_lft_5') | |
// (19, 12, 'neigh_op_bnl_5') | |
wire n646; | |
// (17, 10, 'neigh_op_tnr_6') | |
// (17, 11, 'neigh_op_rgt_6') | |
// (17, 11, 'sp4_h_r_1') | |
// (17, 12, 'neigh_op_bnr_6') | |
// (18, 10, 'neigh_op_top_6') | |
// (18, 11, 'lutff_6/out') | |
// (18, 11, 'sp4_h_r_12') | |
// (18, 12, 'neigh_op_bot_6') | |
// (19, 10, 'neigh_op_tnl_6') | |
// (19, 11, 'local_g0_6') | |
// (19, 11, 'local_g2_1') | |
// (19, 11, 'neigh_op_lft_6') | |
// (19, 11, 'ram/MASK_10') | |
// (19, 11, 'ram/MASK_11') | |
// (19, 11, 'ram/MASK_12') | |
// (19, 11, 'ram/MASK_13') | |
// (19, 11, 'ram/MASK_14') | |
// (19, 11, 'ram/MASK_15') | |
// (19, 11, 'ram/MASK_8') | |
// (19, 11, 'ram/MASK_9') | |
// (19, 11, 'sp4_h_r_25') | |
// (19, 12, 'local_g2_6') | |
// (19, 12, 'local_g3_6') | |
// (19, 12, 'neigh_op_bnl_6') | |
// (19, 12, 'ram/MASK_0') | |
// (19, 12, 'ram/MASK_1') | |
// (19, 12, 'ram/MASK_2') | |
// (19, 12, 'ram/MASK_3') | |
// (19, 12, 'ram/MASK_4') | |
// (19, 12, 'ram/MASK_5') | |
// (19, 12, 'ram/MASK_6') | |
// (19, 12, 'ram/MASK_7') | |
// (20, 11, 'sp4_h_r_36') | |
// (21, 11, 'sp4_h_l_36') | |
wire n647; | |
// (17, 11, 'local_g3_7') | |
// (17, 11, 'lutff_6/in_0') | |
// (17, 11, 'neigh_op_tnr_7') | |
// (17, 12, 'neigh_op_rgt_7') | |
// (17, 13, 'neigh_op_bnr_7') | |
// (18, 11, 'neigh_op_top_7') | |
// (18, 12, 'lutff_7/out') | |
// (18, 13, 'neigh_op_bot_7') | |
// (19, 11, 'neigh_op_tnl_7') | |
// (19, 12, 'neigh_op_lft_7') | |
// (19, 13, 'neigh_op_bnl_7') | |
reg n648 = 0; | |
// (17, 11, 'neigh_op_tnr_2') | |
// (17, 12, 'neigh_op_rgt_2') | |
// (17, 12, 'sp4_h_r_9') | |
// (17, 13, 'neigh_op_bnr_2') | |
// (18, 11, 'neigh_op_top_2') | |
// (18, 12, 'lutff_2/out') | |
// (18, 12, 'sp4_h_r_20') | |
// (18, 13, 'neigh_op_bot_2') | |
// (19, 11, 'neigh_op_tnl_2') | |
// (19, 12, 'neigh_op_lft_2') | |
// (19, 12, 'sp4_h_r_33') | |
// (19, 13, 'neigh_op_bnl_2') | |
// (20, 9, 'sp4_r_v_b_38') | |
// (20, 10, 'sp4_r_v_b_27') | |
// (20, 11, 'local_g2_6') | |
// (20, 11, 'lutff_6/in_0') | |
// (20, 11, 'sp4_r_v_b_14') | |
// (20, 12, 'sp4_h_r_44') | |
// (20, 12, 'sp4_r_v_b_3') | |
// (21, 8, 'sp4_v_t_38') | |
// (21, 9, 'sp4_v_b_38') | |
// (21, 10, 'sp4_v_b_27') | |
// (21, 11, 'sp4_v_b_14') | |
// (21, 12, 'sp4_h_l_44') | |
// (21, 12, 'sp4_v_b_3') | |
reg n649 = 0; | |
// (17, 11, 'neigh_op_tnr_4') | |
// (17, 12, 'neigh_op_rgt_4') | |
// (17, 13, 'neigh_op_bnr_4') | |
// (18, 11, 'local_g1_4') | |
// (18, 11, 'lutff_2/in_3') | |
// (18, 11, 'neigh_op_top_4') | |
// (18, 12, 'lutff_4/out') | |
// (18, 13, 'neigh_op_bot_4') | |
// (19, 11, 'neigh_op_tnl_4') | |
// (19, 12, 'neigh_op_lft_4') | |
// (19, 13, 'neigh_op_bnl_4') | |
wire n650; | |
// (17, 11, 'neigh_op_tnr_5') | |
// (17, 12, 'local_g3_5') | |
// (17, 12, 'lutff_2/in_2') | |
// (17, 12, 'neigh_op_rgt_5') | |
// (17, 13, 'neigh_op_bnr_5') | |
// (18, 11, 'neigh_op_top_5') | |
// (18, 12, 'lutff_5/out') | |
// (18, 13, 'neigh_op_bot_5') | |
// (19, 11, 'neigh_op_tnl_5') | |
// (19, 12, 'neigh_op_lft_5') | |
// (19, 13, 'neigh_op_bnl_5') | |
reg n651 = 0; | |
// (17, 11, 'neigh_op_tnr_6') | |
// (17, 12, 'neigh_op_rgt_6') | |
// (17, 13, 'neigh_op_bnr_6') | |
// (18, 11, 'neigh_op_top_6') | |
// (18, 12, 'local_g2_6') | |
// (18, 12, 'lutff_5/in_1') | |
// (18, 12, 'lutff_6/out') | |
// (18, 13, 'neigh_op_bot_6') | |
// (19, 11, 'neigh_op_tnl_6') | |
// (19, 12, 'neigh_op_lft_6') | |
// (19, 13, 'neigh_op_bnl_6') | |
reg n652 = 0; | |
// (17, 11, 'sp4_h_r_11') | |
// (18, 11, 'local_g0_6') | |
// (18, 11, 'lutff_4/in_0') | |
// (18, 11, 'sp4_h_r_22') | |
// (19, 10, 'neigh_op_tnr_7') | |
// (19, 11, 'neigh_op_rgt_7') | |
// (19, 11, 'sp4_h_r_35') | |
// (19, 12, 'neigh_op_bnr_7') | |
// (20, 10, 'neigh_op_top_7') | |
// (20, 11, 'lutff_7/out') | |
// (20, 11, 'sp4_h_r_46') | |
// (20, 12, 'neigh_op_bot_7') | |
// (21, 10, 'neigh_op_tnl_7') | |
// (21, 11, 'neigh_op_lft_7') | |
// (21, 11, 'sp4_h_l_46') | |
// (21, 12, 'neigh_op_bnl_7') | |
wire n653; | |
// (17, 12, 'local_g3_4') | |
// (17, 12, 'lutff_7/in_2') | |
// (17, 12, 'neigh_op_tnr_4') | |
// (17, 13, 'neigh_op_rgt_4') | |
// (17, 14, 'neigh_op_bnr_4') | |
// (18, 12, 'neigh_op_top_4') | |
// (18, 13, 'lutff_4/out') | |
// (18, 14, 'neigh_op_bot_4') | |
// (19, 12, 'neigh_op_tnl_4') | |
// (19, 13, 'neigh_op_lft_4') | |
// (19, 14, 'neigh_op_bnl_4') | |
reg n654 = 0; | |
// (17, 12, 'neigh_op_tnr_2') | |
// (17, 13, 'neigh_op_rgt_2') | |
// (17, 14, 'neigh_op_bnr_2') | |
// (18, 12, 'neigh_op_top_2') | |
// (18, 13, 'local_g2_2') | |
// (18, 13, 'lutff_2/out') | |
// (18, 13, 'lutff_4/in_0') | |
// (18, 14, 'neigh_op_bot_2') | |
// (19, 12, 'neigh_op_tnl_2') | |
// (19, 13, 'neigh_op_lft_2') | |
// (19, 14, 'neigh_op_bnl_2') | |
reg n655 = 0; | |
// (17, 12, 'neigh_op_tnr_3') | |
// (17, 13, 'neigh_op_rgt_3') | |
// (17, 14, 'neigh_op_bnr_3') | |
// (18, 12, 'neigh_op_top_3') | |
// (18, 13, 'local_g1_3') | |
// (18, 13, 'lutff_3/out') | |
// (18, 13, 'lutff_6/in_0') | |
// (18, 14, 'neigh_op_bot_3') | |
// (19, 12, 'neigh_op_tnl_3') | |
// (19, 13, 'neigh_op_lft_3') | |
// (19, 14, 'neigh_op_bnl_3') | |
wire n656; | |
// (17, 12, 'neigh_op_tnr_5') | |
// (17, 13, 'neigh_op_rgt_5') | |
// (17, 14, 'neigh_op_bnr_5') | |
// (18, 12, 'local_g1_5') | |
// (18, 12, 'lutff_0/in_0') | |
// (18, 12, 'neigh_op_top_5') | |
// (18, 13, 'lutff_5/out') | |
// (18, 14, 'neigh_op_bot_5') | |
// (19, 12, 'neigh_op_tnl_5') | |
// (19, 13, 'neigh_op_lft_5') | |
// (19, 14, 'neigh_op_bnl_5') | |
reg n657 = 0; | |
// (17, 12, 'neigh_op_tnr_7') | |
// (17, 13, 'neigh_op_rgt_7') | |
// (17, 14, 'neigh_op_bnr_7') | |
// (18, 12, 'neigh_op_top_7') | |
// (18, 13, 'local_g1_7') | |
// (18, 13, 'lutff_5/in_3') | |
// (18, 13, 'lutff_7/out') | |
// (18, 14, 'neigh_op_bot_7') | |
// (19, 12, 'neigh_op_tnl_7') | |
// (19, 13, 'neigh_op_lft_7') | |
// (19, 14, 'neigh_op_bnl_7') | |
wire n658; | |
// (17, 12, 'sp4_h_r_3') | |
// (18, 12, 'local_g1_6') | |
// (18, 12, 'lutff_3/in_0') | |
// (18, 12, 'sp4_h_r_14') | |
// (19, 10, 'neigh_op_tnr_3') | |
// (19, 11, 'neigh_op_rgt_3') | |
// (19, 12, 'neigh_op_bnr_3') | |
// (19, 12, 'sp4_h_r_27') | |
// (20, 9, 'sp4_r_v_b_47') | |
// (20, 10, 'neigh_op_top_3') | |
// (20, 10, 'sp4_r_v_b_34') | |
// (20, 11, 'lutff_3/out') | |
// (20, 11, 'sp4_r_v_b_23') | |
// (20, 12, 'neigh_op_bot_3') | |
// (20, 12, 'sp4_h_r_38') | |
// (20, 12, 'sp4_r_v_b_10') | |
// (21, 8, 'sp4_v_t_47') | |
// (21, 9, 'sp4_v_b_47') | |
// (21, 10, 'neigh_op_tnl_3') | |
// (21, 10, 'sp4_v_b_34') | |
// (21, 11, 'neigh_op_lft_3') | |
// (21, 11, 'sp4_v_b_23') | |
// (21, 12, 'neigh_op_bnl_3') | |
// (21, 12, 'sp4_h_l_38') | |
// (21, 12, 'sp4_v_b_10') | |
reg n659 = 0; | |
// (17, 12, 'sp4_h_r_5') | |
// (18, 12, 'local_g1_0') | |
// (18, 12, 'lutff_7/in_2') | |
// (18, 12, 'sp4_h_r_16') | |
// (19, 11, 'neigh_op_tnr_4') | |
// (19, 12, 'neigh_op_rgt_4') | |
// (19, 12, 'sp4_h_r_29') | |
// (19, 13, 'neigh_op_bnr_4') | |
// (20, 11, 'neigh_op_top_4') | |
// (20, 12, 'lutff_4/out') | |
// (20, 12, 'sp4_h_r_40') | |
// (20, 13, 'neigh_op_bot_4') | |
// (21, 11, 'neigh_op_tnl_4') | |
// (21, 12, 'neigh_op_lft_4') | |
// (21, 12, 'sp4_h_l_40') | |
// (21, 13, 'neigh_op_bnl_4') | |
wire n660; | |
// (17, 12, 'sp4_r_v_b_40') | |
// (17, 13, 'sp4_r_v_b_29') | |
// (17, 14, 'neigh_op_tnr_0') | |
// (17, 14, 'sp4_r_v_b_16') | |
// (17, 15, 'neigh_op_rgt_0') | |
// (17, 15, 'sp4_r_v_b_5') | |
// (17, 16, 'neigh_op_bnr_0') | |
// (18, 11, 'sp4_v_t_40') | |
// (18, 12, 'sp4_v_b_40') | |
// (18, 13, 'sp4_v_b_29') | |
// (18, 14, 'neigh_op_top_0') | |
// (18, 14, 'sp4_v_b_16') | |
// (18, 15, 'local_g1_5') | |
// (18, 15, 'lutff_0/out') | |
// (18, 15, 'lutff_global/s_r') | |
// (18, 15, 'sp4_h_r_0') | |
// (18, 15, 'sp4_v_b_5') | |
// (18, 16, 'neigh_op_bot_0') | |
// (19, 14, 'neigh_op_tnl_0') | |
// (19, 15, 'neigh_op_lft_0') | |
// (19, 15, 'sp4_h_r_13') | |
// (19, 16, 'neigh_op_bnl_0') | |
// (20, 15, 'sp4_h_r_24') | |
// (21, 15, 'sp4_h_r_37') | |
// (22, 15, 'sp4_h_l_37') | |
wire n661; | |
// (17, 14, 'neigh_op_tnr_1') | |
// (17, 15, 'neigh_op_rgt_1') | |
// (17, 16, 'neigh_op_bnr_1') | |
// (18, 14, 'neigh_op_top_1') | |
// (18, 15, 'lutff_1/out') | |
// (18, 16, 'neigh_op_bot_1') | |
// (19, 14, 'neigh_op_tnl_1') | |
// (19, 15, 'local_g0_1') | |
// (19, 15, 'neigh_op_lft_1') | |
// (19, 15, 'ram/RADDR_4') | |
// (19, 16, 'neigh_op_bnl_1') | |
wire n662; | |
// (17, 14, 'neigh_op_tnr_2') | |
// (17, 15, 'neigh_op_rgt_2') | |
// (17, 16, 'neigh_op_bnr_2') | |
// (18, 14, 'neigh_op_top_2') | |
// (18, 15, 'lutff_2/out') | |
// (18, 16, 'neigh_op_bot_2') | |
// (19, 14, 'neigh_op_tnl_2') | |
// (19, 15, 'local_g0_2') | |
// (19, 15, 'neigh_op_lft_2') | |
// (19, 15, 'ram/RADDR_5') | |
// (19, 16, 'neigh_op_bnl_2') | |
wire n663; | |
// (17, 14, 'neigh_op_tnr_3') | |
// (17, 15, 'neigh_op_rgt_3') | |
// (17, 16, 'neigh_op_bnr_3') | |
// (18, 14, 'neigh_op_top_3') | |
// (18, 15, 'local_g2_3') | |
// (18, 15, 'lutff_3/out') | |
// (18, 15, 'lutff_4/in_1') | |
// (18, 16, 'neigh_op_bot_3') | |
// (19, 14, 'neigh_op_tnl_3') | |
// (19, 15, 'neigh_op_lft_3') | |
// (19, 16, 'local_g3_3') | |
// (19, 16, 'neigh_op_bnl_3') | |
// (19, 16, 'ram/WCLKE') | |
wire n664; | |
// (17, 14, 'neigh_op_tnr_5') | |
// (17, 15, 'neigh_op_rgt_5') | |
// (17, 16, 'neigh_op_bnr_5') | |
// (18, 14, 'neigh_op_top_5') | |
// (18, 15, 'lutff_5/out') | |
// (18, 16, 'neigh_op_bot_5') | |
// (19, 14, 'neigh_op_tnl_5') | |
// (19, 15, 'local_g0_5') | |
// (19, 15, 'neigh_op_lft_5') | |
// (19, 15, 'ram/RADDR_6') | |
// (19, 16, 'neigh_op_bnl_5') | |
wire n665; | |
// (17, 14, 'neigh_op_tnr_6') | |
// (17, 15, 'neigh_op_rgt_6') | |
// (17, 16, 'neigh_op_bnr_6') | |
// (18, 14, 'neigh_op_top_6') | |
// (18, 15, 'lutff_6/out') | |
// (18, 16, 'neigh_op_bot_6') | |
// (19, 14, 'neigh_op_tnl_6') | |
// (19, 15, 'local_g0_6') | |
// (19, 15, 'neigh_op_lft_6') | |
// (19, 15, 'ram/RADDR_3') | |
// (19, 16, 'neigh_op_bnl_6') | |
wire n666; | |
// (17, 14, 'neigh_op_tnr_7') | |
// (17, 15, 'neigh_op_rgt_7') | |
// (17, 16, 'neigh_op_bnr_7') | |
// (18, 14, 'neigh_op_top_7') | |
// (18, 15, 'lutff_7/out') | |
// (18, 16, 'neigh_op_bot_7') | |
// (19, 14, 'neigh_op_tnl_7') | |
// (19, 15, 'local_g1_7') | |
// (19, 15, 'neigh_op_lft_7') | |
// (19, 15, 'ram/RADDR_1') | |
// (19, 16, 'neigh_op_bnl_7') | |
wire n667; | |
// (18, 8, 'neigh_op_tnr_0') | |
// (18, 9, 'neigh_op_rgt_0') | |
// (18, 10, 'neigh_op_bnr_0') | |
// (19, 8, 'neigh_op_top_0') | |
// (19, 9, 'ram/RDATA_15') | |
// (19, 10, 'neigh_op_bot_0') | |
// (20, 8, 'neigh_op_tnl_0') | |
// (20, 9, 'neigh_op_lft_0') | |
// (20, 10, 'local_g3_0') | |
// (20, 10, 'lutff_6/in_1') | |
// (20, 10, 'neigh_op_bnl_0') | |
wire n668; | |
// (18, 8, 'neigh_op_tnr_1') | |
// (18, 9, 'neigh_op_rgt_1') | |
// (18, 10, 'local_g0_1') | |
// (18, 10, 'lutff_6/in_1') | |
// (18, 10, 'neigh_op_bnr_1') | |
// (19, 8, 'neigh_op_top_1') | |
// (19, 9, 'ram/RDATA_14') | |
// (19, 10, 'neigh_op_bot_1') | |
// (20, 8, 'neigh_op_tnl_1') | |
// (20, 9, 'neigh_op_lft_1') | |
// (20, 10, 'neigh_op_bnl_1') | |
wire n669; | |
// (18, 8, 'neigh_op_tnr_2') | |
// (18, 9, 'local_g3_2') | |
// (18, 9, 'lutff_1/in_2') | |
// (18, 9, 'neigh_op_rgt_2') | |
// (18, 10, 'neigh_op_bnr_2') | |
// (19, 8, 'neigh_op_top_2') | |
// (19, 9, 'ram/RDATA_13') | |
// (19, 10, 'neigh_op_bot_2') | |
// (20, 8, 'neigh_op_tnl_2') | |
// (20, 9, 'neigh_op_lft_2') | |
// (20, 10, 'neigh_op_bnl_2') | |
wire n670; | |
// (18, 8, 'neigh_op_tnr_3') | |
// (18, 9, 'neigh_op_rgt_3') | |
// (18, 10, 'local_g1_3') | |
// (18, 10, 'lutff_0/in_0') | |
// (18, 10, 'neigh_op_bnr_3') | |
// (19, 8, 'neigh_op_top_3') | |
// (19, 9, 'ram/RDATA_12') | |
// (19, 10, 'neigh_op_bot_3') | |
// (20, 8, 'neigh_op_tnl_3') | |
// (20, 9, 'neigh_op_lft_3') | |
// (20, 10, 'neigh_op_bnl_3') | |
wire n671; | |
// (18, 8, 'neigh_op_tnr_4') | |
// (18, 9, 'neigh_op_rgt_4') | |
// (18, 10, 'local_g0_4') | |
// (18, 10, 'lutff_7/in_3') | |
// (18, 10, 'neigh_op_bnr_4') | |
// (19, 8, 'neigh_op_top_4') | |
// (19, 9, 'ram/RDATA_11') | |
// (19, 10, 'neigh_op_bot_4') | |
// (20, 8, 'neigh_op_tnl_4') | |
// (20, 9, 'neigh_op_lft_4') | |
// (20, 10, 'neigh_op_bnl_4') | |
wire n672; | |
// (18, 8, 'neigh_op_tnr_5') | |
// (18, 9, 'neigh_op_rgt_5') | |
// (18, 10, 'neigh_op_bnr_5') | |
// (19, 8, 'neigh_op_top_5') | |
// (19, 9, 'ram/RDATA_10') | |
// (19, 10, 'neigh_op_bot_5') | |
// (20, 8, 'neigh_op_tnl_5') | |
// (20, 9, 'neigh_op_lft_5') | |
// (20, 10, 'local_g2_5') | |
// (20, 10, 'lutff_7/in_2') | |
// (20, 10, 'neigh_op_bnl_5') | |
wire n673; | |
// (18, 8, 'neigh_op_tnr_6') | |
// (18, 9, 'neigh_op_rgt_6') | |
// (18, 10, 'neigh_op_bnr_6') | |
// (19, 8, 'neigh_op_top_6') | |
// (19, 9, 'ram/RDATA_9') | |
// (19, 10, 'neigh_op_bot_6') | |
// (20, 8, 'neigh_op_tnl_6') | |
// (20, 9, 'neigh_op_lft_6') | |
// (20, 10, 'local_g2_6') | |
// (20, 10, 'lutff_5/in_1') | |
// (20, 10, 'neigh_op_bnl_6') | |
wire n674; | |
// (18, 8, 'neigh_op_tnr_7') | |
// (18, 9, 'neigh_op_rgt_7') | |
// (18, 10, 'neigh_op_bnr_7') | |
// (19, 8, 'neigh_op_top_7') | |
// (19, 9, 'ram/RDATA_8') | |
// (19, 9, 'sp4_r_v_b_47') | |
// (19, 10, 'neigh_op_bot_7') | |
// (19, 10, 'sp4_r_v_b_34') | |
// (19, 11, 'sp4_r_v_b_23') | |
// (19, 12, 'sp4_r_v_b_10') | |
// (20, 8, 'neigh_op_tnl_7') | |
// (20, 8, 'sp4_v_t_47') | |
// (20, 9, 'neigh_op_lft_7') | |
// (20, 9, 'sp4_v_b_47') | |
// (20, 10, 'neigh_op_bnl_7') | |
// (20, 10, 'sp4_v_b_34') | |
// (20, 11, 'local_g0_7') | |
// (20, 11, 'lutff_6/in_3') | |
// (20, 11, 'sp4_v_b_23') | |
// (20, 12, 'sp4_v_b_10') | |
wire n675; | |
// (18, 9, 'local_g3_1') | |
// (18, 9, 'lutff_0/in_2') | |
// (18, 9, 'neigh_op_tnr_1') | |
// (18, 10, 'neigh_op_rgt_1') | |
// (18, 11, 'neigh_op_bnr_1') | |
// (19, 9, 'neigh_op_top_1') | |
// (19, 10, 'ram/RDATA_6') | |
// (19, 11, 'neigh_op_bot_1') | |
// (20, 9, 'neigh_op_tnl_1') | |
// (20, 10, 'neigh_op_lft_1') | |
// (20, 11, 'neigh_op_bnl_1') | |
wire n676; | |
// (18, 9, 'neigh_op_tnr_0') | |
// (18, 10, 'neigh_op_rgt_0') | |
// (18, 11, 'neigh_op_bnr_0') | |
// (19, 9, 'neigh_op_top_0') | |
// (19, 10, 'ram/RDATA_7') | |
// (19, 11, 'neigh_op_bot_0') | |
// (20, 9, 'local_g3_0') | |
// (20, 9, 'lutff_0/in_3') | |
// (20, 9, 'neigh_op_tnl_0') | |
// (20, 10, 'neigh_op_lft_0') | |
// (20, 11, 'neigh_op_bnl_0') | |
wire n677; | |
// (18, 9, 'neigh_op_tnr_2') | |
// (18, 10, 'neigh_op_rgt_2') | |
// (18, 11, 'neigh_op_bnr_2') | |
// (19, 9, 'neigh_op_top_2') | |
// (19, 10, 'ram/RDATA_5') | |
// (19, 11, 'neigh_op_bot_2') | |
// (20, 9, 'local_g2_2') | |
// (20, 9, 'lutff_6/in_2') | |
// (20, 9, 'neigh_op_tnl_2') | |
// (20, 10, 'neigh_op_lft_2') | |
// (20, 11, 'neigh_op_bnl_2') | |
wire n678; | |
// (18, 9, 'sp4_r_v_b_40') | |
// (18, 10, 'sp4_r_v_b_29') | |
// (18, 11, 'local_g3_0') | |
// (18, 11, 'lutff_7/in_2') | |
// (18, 11, 'sp4_r_v_b_16') | |
// (18, 12, 'sp4_r_v_b_5') | |
// (19, 8, 'sp4_v_t_40') | |
// (19, 9, 'sp4_v_b_40') | |
// (19, 10, 'sp4_v_b_29') | |
// (19, 11, 'neigh_op_tnr_0') | |
// (19, 11, 'sp4_v_b_16') | |
// (19, 12, 'neigh_op_rgt_0') | |
// (19, 12, 'sp4_h_r_5') | |
// (19, 12, 'sp4_v_b_5') | |
// (19, 13, 'neigh_op_bnr_0') | |
// (20, 11, 'neigh_op_top_0') | |
// (20, 12, 'lutff_0/out') | |
// (20, 12, 'sp4_h_r_16') | |
// (20, 13, 'neigh_op_bot_0') | |
// (21, 11, 'neigh_op_tnl_0') | |
// (21, 12, 'neigh_op_lft_0') | |
// (21, 12, 'sp4_h_r_29') | |
// (21, 13, 'neigh_op_bnl_0') | |
// (22, 12, 'sp4_h_r_40') | |
// (23, 12, 'sp4_h_l_40') | |
wire n679; | |
// (18, 10, 'neigh_op_tnr_0') | |
// (18, 11, 'neigh_op_rgt_0') | |
// (18, 12, 'neigh_op_bnr_0') | |
// (19, 10, 'neigh_op_top_0') | |
// (19, 11, 'ram/RDATA_15') | |
// (19, 12, 'neigh_op_bot_0') | |
// (20, 10, 'neigh_op_tnl_0') | |
// (20, 11, 'local_g1_0') | |
// (20, 11, 'lutff_3/in_0') | |
// (20, 11, 'neigh_op_lft_0') | |
// (20, 12, 'neigh_op_bnl_0') | |
wire n680; | |
// (18, 10, 'neigh_op_tnr_4') | |
// (18, 11, 'local_g3_4') | |
// (18, 11, 'lutff_4/in_3') | |
// (18, 11, 'neigh_op_rgt_4') | |
// (18, 12, 'neigh_op_bnr_4') | |
// (19, 10, 'neigh_op_top_4') | |
// (19, 11, 'ram/RDATA_11') | |
// (19, 12, 'neigh_op_bot_4') | |
// (20, 10, 'neigh_op_tnl_4') | |
// (20, 11, 'neigh_op_lft_4') | |
// (20, 12, 'neigh_op_bnl_4') | |
wire n681; | |
// (18, 10, 'neigh_op_tnr_6') | |
// (18, 11, 'local_g2_6') | |
// (18, 11, 'lutff_2/in_2') | |
// (18, 11, 'neigh_op_rgt_6') | |
// (18, 12, 'neigh_op_bnr_6') | |
// (19, 10, 'neigh_op_top_6') | |
// (19, 11, 'ram/RDATA_9') | |
// (19, 12, 'neigh_op_bot_6') | |
// (20, 10, 'neigh_op_tnl_6') | |
// (20, 11, 'neigh_op_lft_6') | |
// (20, 12, 'neigh_op_bnl_6') | |
wire n682; | |
// (18, 10, 'neigh_op_tnr_7') | |
// (18, 11, 'neigh_op_rgt_7') | |
// (18, 12, 'local_g0_7') | |
// (18, 12, 'lutff_5/in_2') | |
// (18, 12, 'neigh_op_bnr_7') | |
// (19, 10, 'neigh_op_top_7') | |
// (19, 11, 'ram/RDATA_8') | |
// (19, 12, 'neigh_op_bot_7') | |
// (20, 10, 'neigh_op_tnl_7') | |
// (20, 11, 'neigh_op_lft_7') | |
// (20, 12, 'neigh_op_bnl_7') | |
reg n683 = 0; | |
// (18, 11, 'local_g1_0') | |
// (18, 11, 'lutff_1/in_0') | |
// (18, 11, 'sp4_h_r_8') | |
// (19, 10, 'neigh_op_tnr_0') | |
// (19, 11, 'neigh_op_rgt_0') | |
// (19, 11, 'sp4_h_r_21') | |
// (19, 12, 'neigh_op_bnr_0') | |
// (20, 10, 'neigh_op_top_0') | |
// (20, 11, 'lutff_0/out') | |
// (20, 11, 'sp4_h_r_32') | |
// (20, 12, 'neigh_op_bot_0') | |
// (21, 10, 'neigh_op_tnl_0') | |
// (21, 11, 'neigh_op_lft_0') | |
// (21, 11, 'sp4_h_r_45') | |
// (21, 12, 'neigh_op_bnl_0') | |
// (22, 11, 'sp4_h_l_45') | |
wire n684; | |
// (18, 11, 'local_g3_1') | |
// (18, 11, 'lutff_1/in_3') | |
// (18, 11, 'neigh_op_tnr_1') | |
// (18, 12, 'neigh_op_rgt_1') | |
// (18, 13, 'neigh_op_bnr_1') | |
// (19, 11, 'neigh_op_top_1') | |
// (19, 12, 'ram/RDATA_6') | |
// (19, 13, 'neigh_op_bot_1') | |
// (20, 11, 'neigh_op_tnl_1') | |
// (20, 12, 'neigh_op_lft_1') | |
// (20, 13, 'neigh_op_bnl_1') | |
wire n685; | |
// (18, 11, 'neigh_op_tnr_2') | |
// (18, 12, 'neigh_op_rgt_2') | |
// (18, 13, 'neigh_op_bnr_2') | |
// (19, 9, 'sp4_r_v_b_40') | |
// (19, 10, 'sp4_r_v_b_29') | |
// (19, 11, 'neigh_op_top_2') | |
// (19, 11, 'sp4_r_v_b_16') | |
// (19, 12, 'ram/RDATA_5') | |
// (19, 12, 'sp4_r_v_b_5') | |
// (19, 13, 'neigh_op_bot_2') | |
// (20, 8, 'sp4_v_t_40') | |
// (20, 9, 'sp4_v_b_40') | |
// (20, 10, 'local_g3_5') | |
// (20, 10, 'lutff_2/in_0') | |
// (20, 10, 'sp4_v_b_29') | |
// (20, 11, 'neigh_op_tnl_2') | |
// (20, 11, 'sp4_v_b_16') | |
// (20, 12, 'neigh_op_lft_2') | |
// (20, 12, 'sp4_v_b_5') | |
// (20, 13, 'neigh_op_bnl_2') | |
wire n686; | |
// (18, 12, 'local_g3_5') | |
// (18, 12, 'lutff_7/in_3') | |
// (18, 12, 'sp4_r_v_b_45') | |
// (18, 13, 'sp4_r_v_b_32') | |
// (18, 14, 'neigh_op_tnr_4') | |
// (18, 14, 'sp4_r_v_b_21') | |
// (18, 15, 'neigh_op_rgt_4') | |
// (18, 15, 'sp4_r_v_b_8') | |
// (18, 16, 'neigh_op_bnr_4') | |
// (19, 11, 'sp4_v_t_45') | |
// (19, 12, 'sp4_v_b_45') | |
// (19, 13, 'sp4_v_b_32') | |
// (19, 14, 'neigh_op_top_4') | |
// (19, 14, 'sp4_v_b_21') | |
// (19, 15, 'ram/RDATA_11') | |
// (19, 15, 'sp4_v_b_8') | |
// (19, 16, 'neigh_op_bot_4') | |
// (20, 14, 'neigh_op_tnl_4') | |
// (20, 15, 'neigh_op_lft_4') | |
// (20, 16, 'neigh_op_bnl_4') | |
wire n687; | |
// (18, 12, 'sp4_r_v_b_41') | |
// (18, 13, 'local_g1_4') | |
// (18, 13, 'lutff_6/in_3') | |
// (18, 13, 'sp4_r_v_b_28') | |
// (18, 14, 'neigh_op_tnr_2') | |
// (18, 14, 'sp4_r_v_b_17') | |
// (18, 15, 'neigh_op_rgt_2') | |
// (18, 15, 'sp4_r_v_b_4') | |
// (18, 16, 'neigh_op_bnr_2') | |
// (19, 11, 'sp4_v_t_41') | |
// (19, 12, 'sp4_v_b_41') | |
// (19, 13, 'sp4_v_b_28') | |
// (19, 14, 'neigh_op_top_2') | |
// (19, 14, 'sp4_v_b_17') | |
// (19, 15, 'ram/RDATA_13') | |
// (19, 15, 'sp4_v_b_4') | |
// (19, 16, 'neigh_op_bot_2') | |
// (20, 14, 'neigh_op_tnl_2') | |
// (20, 15, 'neigh_op_lft_2') | |
// (20, 16, 'neigh_op_bnl_2') | |
wire n688; | |
// (18, 13, 'local_g3_0') | |
// (18, 13, 'lutff_4/in_3') | |
// (18, 13, 'sp4_r_v_b_40') | |
// (18, 14, 'neigh_op_tnr_0') | |
// (18, 14, 'sp4_r_v_b_29') | |
// (18, 15, 'neigh_op_rgt_0') | |
// (18, 15, 'sp4_r_v_b_16') | |
// (18, 16, 'neigh_op_bnr_0') | |
// (18, 16, 'sp4_r_v_b_5') | |
// (19, 12, 'sp4_v_t_40') | |
// (19, 13, 'sp4_v_b_40') | |
// (19, 14, 'neigh_op_top_0') | |
// (19, 14, 'sp4_v_b_29') | |
// (19, 15, 'ram/RDATA_15') | |
// (19, 15, 'sp4_v_b_16') | |
// (19, 16, 'neigh_op_bot_0') | |
// (19, 16, 'sp4_v_b_5') | |
// (20, 14, 'neigh_op_tnl_0') | |
// (20, 15, 'neigh_op_lft_0') | |
// (20, 16, 'neigh_op_bnl_0') | |
wire n689; | |
// (18, 13, 'local_g3_2') | |
// (18, 13, 'lutff_5/in_0') | |
// (18, 13, 'sp4_r_v_b_42') | |
// (18, 14, 'neigh_op_tnr_1') | |
// (18, 14, 'sp4_r_v_b_31') | |
// (18, 15, 'neigh_op_rgt_1') | |
// (18, 15, 'sp4_r_v_b_18') | |
// (18, 16, 'neigh_op_bnr_1') | |
// (18, 16, 'sp4_r_v_b_7') | |
// (19, 12, 'sp4_v_t_42') | |
// (19, 13, 'sp4_v_b_42') | |
// (19, 14, 'neigh_op_top_1') | |
// (19, 14, 'sp4_v_b_31') | |
// (19, 15, 'ram/RDATA_14') | |
// (19, 15, 'sp4_v_b_18') | |
// (19, 16, 'neigh_op_bot_1') | |
// (19, 16, 'sp4_v_b_7') | |
// (20, 14, 'neigh_op_tnl_1') | |
// (20, 15, 'neigh_op_lft_1') | |
// (20, 16, 'neigh_op_bnl_1') | |
reg n690 = 0; | |
// (18, 14, 'local_g1_0') | |
// (18, 14, 'lutff_2/in_1') | |
// (18, 14, 'sp4_h_r_0') | |
// (19, 13, 'neigh_op_tnr_4') | |
// (19, 14, 'neigh_op_rgt_4') | |
// (19, 14, 'sp4_h_r_13') | |
// (19, 15, 'neigh_op_bnr_4') | |
// (20, 13, 'neigh_op_top_4') | |
// (20, 14, 'lutff_4/out') | |
// (20, 14, 'sp4_h_r_24') | |
// (20, 15, 'neigh_op_bot_4') | |
// (21, 13, 'neigh_op_tnl_4') | |
// (21, 14, 'neigh_op_lft_4') | |
// (21, 14, 'sp4_h_r_37') | |
// (21, 15, 'neigh_op_bnl_4') | |
// (22, 14, 'sp4_h_l_37') | |
wire n691; | |
// (18, 14, 'local_g2_6') | |
// (18, 14, 'lutff_2/in_0') | |
// (18, 14, 'sp4_r_v_b_38') | |
// (18, 15, 'neigh_op_tnr_7') | |
// (18, 15, 'sp4_r_v_b_27') | |
// (18, 16, 'neigh_op_rgt_7') | |
// (18, 16, 'sp4_r_v_b_14') | |
// (18, 17, 'neigh_op_bnr_7') | |
// (18, 17, 'sp4_r_v_b_3') | |
// (19, 13, 'sp4_v_t_38') | |
// (19, 14, 'sp4_v_b_38') | |
// (19, 15, 'neigh_op_top_7') | |
// (19, 15, 'sp4_v_b_27') | |
// (19, 16, 'ram/RDATA_0') | |
// (19, 16, 'sp4_v_b_14') | |
// (19, 17, 'neigh_op_bot_7') | |
// (19, 17, 'sp4_v_b_3') | |
// (20, 15, 'neigh_op_tnl_7') | |
// (20, 16, 'neigh_op_lft_7') | |
// (20, 17, 'neigh_op_bnl_7') | |
wire n692; | |
// (18, 14, 'neigh_op_tnr_3') | |
// (18, 15, 'neigh_op_rgt_3') | |
// (18, 16, 'neigh_op_bnr_3') | |
// (19, 12, 'sp4_r_v_b_42') | |
// (19, 13, 'sp4_r_v_b_31') | |
// (19, 14, 'neigh_op_top_3') | |
// (19, 14, 'sp4_r_v_b_18') | |
// (19, 15, 'ram/RDATA_12') | |
// (19, 15, 'sp4_r_v_b_7') | |
// (19, 16, 'neigh_op_bot_3') | |
// (20, 11, 'sp4_v_t_42') | |
// (20, 12, 'local_g2_2') | |
// (20, 12, 'lutff_0/in_0') | |
// (20, 12, 'sp4_v_b_42') | |
// (20, 13, 'sp4_v_b_31') | |
// (20, 14, 'neigh_op_tnl_3') | |
// (20, 14, 'sp4_v_b_18') | |
// (20, 15, 'neigh_op_lft_3') | |
// (20, 15, 'sp4_v_b_7') | |
// (20, 16, 'neigh_op_bnl_3') | |
wire n693; | |
// (18, 14, 'neigh_op_tnr_5') | |
// (18, 15, 'neigh_op_rgt_5') | |
// (18, 16, 'neigh_op_bnr_5') | |
// (19, 12, 'sp4_r_v_b_46') | |
// (19, 13, 'sp4_r_v_b_35') | |
// (19, 14, 'neigh_op_top_5') | |
// (19, 14, 'sp4_r_v_b_22') | |
// (19, 15, 'ram/RDATA_10') | |
// (19, 15, 'sp4_r_v_b_11') | |
// (19, 16, 'neigh_op_bot_5') | |
// (20, 11, 'sp4_v_t_46') | |
// (20, 12, 'sp4_v_b_46') | |
// (20, 13, 'local_g2_3') | |
// (20, 13, 'lutff_0/in_1') | |
// (20, 13, 'sp4_v_b_35') | |
// (20, 14, 'neigh_op_tnl_5') | |
// (20, 14, 'sp4_v_b_22') | |
// (20, 15, 'neigh_op_lft_5') | |
// (20, 15, 'sp4_v_b_11') | |
// (20, 16, 'neigh_op_bnl_5') | |
wire n694; | |
// (18, 14, 'neigh_op_tnr_6') | |
// (18, 15, 'neigh_op_rgt_6') | |
// (18, 16, 'neigh_op_bnr_6') | |
// (19, 13, 'sp4_r_v_b_37') | |
// (19, 14, 'neigh_op_top_6') | |
// (19, 14, 'sp4_r_v_b_24') | |
// (19, 15, 'ram/RDATA_9') | |
// (19, 15, 'sp4_r_v_b_13') | |
// (19, 16, 'neigh_op_bot_6') | |
// (19, 16, 'sp4_r_v_b_0') | |
// (20, 12, 'local_g0_0') | |
// (20, 12, 'lutff_1/in_1') | |
// (20, 12, 'sp4_h_r_0') | |
// (20, 12, 'sp4_v_t_37') | |
// (20, 13, 'sp4_v_b_37') | |
// (20, 14, 'neigh_op_tnl_6') | |
// (20, 14, 'sp4_v_b_24') | |
// (20, 15, 'neigh_op_lft_6') | |
// (20, 15, 'sp4_v_b_13') | |
// (20, 16, 'neigh_op_bnl_6') | |
// (20, 16, 'sp4_v_b_0') | |
// (21, 12, 'sp4_h_r_13') | |
// (22, 12, 'sp4_h_r_24') | |
// (23, 12, 'sp4_h_r_37') | |
// (24, 12, 'sp4_h_l_37') | |
wire n695; | |
// (18, 14, 'neigh_op_tnr_7') | |
// (18, 15, 'neigh_op_rgt_7') | |
// (18, 16, 'neigh_op_bnr_7') | |
// (19, 13, 'sp4_r_v_b_39') | |
// (19, 14, 'neigh_op_top_7') | |
// (19, 14, 'sp4_r_v_b_26') | |
// (19, 15, 'ram/RDATA_8') | |
// (19, 15, 'sp4_r_v_b_15') | |
// (19, 16, 'neigh_op_bot_7') | |
// (19, 16, 'sp4_r_v_b_2') | |
// (20, 12, 'local_g0_2') | |
// (20, 12, 'lutff_7/in_3') | |
// (20, 12, 'sp4_h_r_2') | |
// (20, 12, 'sp4_v_t_39') | |
// (20, 13, 'sp4_v_b_39') | |
// (20, 14, 'neigh_op_tnl_7') | |
// (20, 14, 'sp4_v_b_26') | |
// (20, 15, 'neigh_op_lft_7') | |
// (20, 15, 'sp4_v_b_15') | |
// (20, 16, 'neigh_op_bnl_7') | |
// (20, 16, 'sp4_v_b_2') | |
// (21, 12, 'sp4_h_r_15') | |
// (22, 12, 'sp4_h_r_26') | |
// (23, 12, 'sp4_h_r_39') | |
// (24, 12, 'sp4_h_l_39') | |
wire MOSI; | |
// (19, 1, 'sp4_h_r_9') | |
// (20, 1, 'sp4_h_r_20') | |
// (21, 1, 'local_g3_1') | |
// (21, 1, 'lutff_6/in_0') | |
// (21, 1, 'sp4_h_r_33') | |
// (22, 1, 'neigh_op_bnr_2') | |
// (22, 1, 'neigh_op_bnr_6') | |
// (22, 1, 'sp4_h_r_44') | |
// (22, 1, 'sp4_r_v_b_4') | |
// (23, 0, 'io_1/D_IN_0') | |
// (23, 0, 'io_1/PAD') | |
// (23, 0, 'span4_vert_4') | |
// (23, 1, 'neigh_op_bot_2') | |
// (23, 1, 'neigh_op_bot_6') | |
// (23, 1, 'sp4_h_l_44') | |
// (23, 1, 'sp4_v_b_4') | |
// (24, 1, 'neigh_op_bnl_2') | |
// (24, 1, 'neigh_op_bnl_6') | |
wire n697; | |
// (19, 8, 'neigh_op_tnr_1') | |
// (19, 9, 'local_g3_1') | |
// (19, 9, 'neigh_op_rgt_1') | |
// (19, 9, 'ram/RADDR_3') | |
// (19, 10, 'neigh_op_bnr_1') | |
// (20, 8, 'neigh_op_top_1') | |
// (20, 9, 'lutff_1/out') | |
// (20, 10, 'neigh_op_bot_1') | |
// (21, 8, 'neigh_op_tnl_1') | |
// (21, 9, 'neigh_op_lft_1') | |
// (21, 10, 'neigh_op_bnl_1') | |
reg n698 = 0; | |
// (19, 8, 'neigh_op_tnr_3') | |
// (19, 9, 'neigh_op_rgt_3') | |
// (19, 10, 'neigh_op_bnr_3') | |
// (20, 8, 'neigh_op_top_3') | |
// (20, 9, 'local_g1_3') | |
// (20, 9, 'lutff_0/in_0') | |
// (20, 9, 'lutff_3/out') | |
// (20, 10, 'neigh_op_bot_3') | |
// (21, 8, 'neigh_op_tnl_3') | |
// (21, 9, 'neigh_op_lft_3') | |
// (21, 10, 'neigh_op_bnl_3') | |
wire n699; | |
// (19, 8, 'neigh_op_tnr_4') | |
// (19, 9, 'local_g3_4') | |
// (19, 9, 'neigh_op_rgt_4') | |
// (19, 9, 'ram/RADDR_6') | |
// (19, 10, 'neigh_op_bnr_4') | |
// (20, 8, 'neigh_op_top_4') | |
// (20, 9, 'lutff_4/out') | |
// (20, 10, 'neigh_op_bot_4') | |
// (21, 8, 'neigh_op_tnl_4') | |
// (21, 9, 'neigh_op_lft_4') | |
// (21, 10, 'neigh_op_bnl_4') | |
reg n700 = 0; | |
// (19, 8, 'neigh_op_tnr_5') | |
// (19, 9, 'neigh_op_rgt_5') | |
// (19, 10, 'neigh_op_bnr_5') | |
// (20, 8, 'neigh_op_top_5') | |
// (20, 9, 'local_g2_5') | |
// (20, 9, 'lutff_5/out') | |
// (20, 9, 'lutff_6/in_1') | |
// (20, 10, 'neigh_op_bot_5') | |
// (21, 8, 'neigh_op_tnl_5') | |
// (21, 9, 'neigh_op_lft_5') | |
// (21, 10, 'neigh_op_bnl_5') | |
wire n701; | |
// (19, 8, 'neigh_op_tnr_7') | |
// (19, 9, 'local_g2_7') | |
// (19, 9, 'neigh_op_rgt_7') | |
// (19, 9, 'ram/RADDR_2') | |
// (19, 10, 'neigh_op_bnr_7') | |
// (20, 8, 'neigh_op_top_7') | |
// (20, 9, 'lutff_7/out') | |
// (20, 10, 'neigh_op_bot_7') | |
// (21, 8, 'neigh_op_tnl_7') | |
// (21, 9, 'neigh_op_lft_7') | |
// (21, 10, 'neigh_op_bnl_7') | |
reg n702 = 0; | |
// (19, 9, 'neigh_op_tnr_1') | |
// (19, 10, 'neigh_op_rgt_1') | |
// (19, 11, 'neigh_op_bnr_1') | |
// (20, 9, 'neigh_op_top_1') | |
// (20, 10, 'local_g3_1') | |
// (20, 10, 'lutff_1/out') | |
// (20, 10, 'lutff_7/in_3') | |
// (20, 11, 'neigh_op_bot_1') | |
// (21, 9, 'neigh_op_tnl_1') | |
// (21, 10, 'neigh_op_lft_1') | |
// (21, 11, 'neigh_op_bnl_1') | |
reg n703 = 0; | |
// (19, 9, 'neigh_op_tnr_3') | |
// (19, 10, 'neigh_op_rgt_3') | |
// (19, 11, 'neigh_op_bnr_3') | |
// (20, 9, 'neigh_op_top_3') | |
// (20, 10, 'local_g1_3') | |
// (20, 10, 'lutff_2/in_2') | |
// (20, 10, 'lutff_3/out') | |
// (20, 11, 'neigh_op_bot_3') | |
// (21, 9, 'neigh_op_tnl_3') | |
// (21, 10, 'neigh_op_lft_3') | |
// (21, 11, 'neigh_op_bnl_3') | |
reg n704 = 0; | |
// (19, 9, 'neigh_op_tnr_4') | |
// (19, 10, 'neigh_op_rgt_4') | |
// (19, 11, 'neigh_op_bnr_4') | |
// (20, 9, 'neigh_op_top_4') | |
// (20, 10, 'local_g0_4') | |
// (20, 10, 'lutff_4/out') | |
// (20, 10, 'lutff_6/in_2') | |
// (20, 11, 'neigh_op_bot_4') | |
// (21, 9, 'neigh_op_tnl_4') | |
// (21, 10, 'neigh_op_lft_4') | |
// (21, 11, 'neigh_op_bnl_4') | |
reg n705 = 0; | |
// (19, 10, 'neigh_op_tnr_2') | |
// (19, 11, 'neigh_op_rgt_2') | |
// (19, 12, 'neigh_op_bnr_2') | |
// (20, 10, 'neigh_op_top_2') | |
// (20, 11, 'local_g1_2') | |
// (20, 11, 'lutff_2/out') | |
// (20, 11, 'lutff_3/in_2') | |
// (20, 12, 'neigh_op_bot_2') | |
// (21, 10, 'neigh_op_tnl_2') | |
// (21, 11, 'neigh_op_lft_2') | |
// (21, 12, 'neigh_op_bnl_2') | |
wire n706; | |
// (19, 11, 'neigh_op_tnr_1') | |
// (19, 12, 'neigh_op_rgt_1') | |
// (19, 13, 'neigh_op_bnr_1') | |
// (20, 11, 'local_g1_1') | |
// (20, 11, 'lutff_1/in_1') | |
// (20, 11, 'neigh_op_top_1') | |
// (20, 12, 'lutff_1/out') | |
// (20, 13, 'neigh_op_bot_1') | |
// (21, 11, 'neigh_op_tnl_1') | |
// (21, 12, 'neigh_op_lft_1') | |
// (21, 13, 'neigh_op_bnl_1') | |
reg n707 = 0; | |
// (19, 11, 'neigh_op_tnr_2') | |
// (19, 12, 'neigh_op_rgt_2') | |
// (19, 13, 'neigh_op_bnr_2') | |
// (20, 11, 'neigh_op_top_2') | |
// (20, 12, 'local_g1_2') | |
// (20, 12, 'lutff_0/in_1') | |
// (20, 12, 'lutff_2/out') | |
// (20, 13, 'neigh_op_bot_2') | |
// (21, 11, 'neigh_op_tnl_2') | |
// (21, 12, 'neigh_op_lft_2') | |
// (21, 13, 'neigh_op_bnl_2') | |
reg n708 = 0; | |
// (19, 11, 'neigh_op_tnr_3') | |
// (19, 12, 'neigh_op_rgt_3') | |
// (19, 13, 'neigh_op_bnr_3') | |
// (20, 11, 'neigh_op_top_3') | |
// (20, 12, 'local_g0_3') | |
// (20, 12, 'lutff_3/out') | |
// (20, 12, 'lutff_7/in_2') | |
// (20, 13, 'neigh_op_bot_3') | |
// (21, 11, 'neigh_op_tnl_3') | |
// (21, 12, 'neigh_op_lft_3') | |
// (21, 13, 'neigh_op_bnl_3') | |
reg n709 = 0; | |
// (19, 11, 'neigh_op_tnr_5') | |
// (19, 12, 'neigh_op_rgt_5') | |
// (19, 13, 'neigh_op_bnr_5') | |
// (20, 11, 'neigh_op_top_5') | |
// (20, 12, 'local_g2_5') | |
// (20, 12, 'lutff_1/in_0') | |
// (20, 12, 'lutff_5/out') | |
// (20, 13, 'neigh_op_bot_5') | |
// (21, 11, 'neigh_op_tnl_5') | |
// (21, 12, 'neigh_op_lft_5') | |
// (21, 13, 'neigh_op_bnl_5') | |
reg n710 = 0; | |
// (19, 11, 'neigh_op_tnr_6') | |
// (19, 12, 'neigh_op_rgt_6') | |
// (19, 13, 'neigh_op_bnr_6') | |
// (20, 11, 'neigh_op_top_6') | |
// (20, 12, 'lutff_6/out') | |
// (20, 13, 'local_g0_6') | |
// (20, 13, 'lutff_0/in_2') | |
// (20, 13, 'neigh_op_bot_6') | |
// (21, 11, 'neigh_op_tnl_6') | |
// (21, 12, 'neigh_op_lft_6') | |
// (21, 13, 'neigh_op_bnl_6') | |
wire n711; | |
// (19, 12, 'neigh_op_tnr_6') | |
// (19, 13, 'neigh_op_rgt_6') | |
// (19, 13, 'sp4_r_v_b_44') | |
// (19, 14, 'neigh_op_bnr_6') | |
// (19, 14, 'sp4_r_v_b_33') | |
// (19, 15, 'local_g3_4') | |
// (19, 15, 'ram/WDATA_9') | |
// (19, 15, 'sp4_r_v_b_20') | |
// (19, 16, 'sp4_r_v_b_9') | |
// (20, 12, 'neigh_op_top_6') | |
// (20, 12, 'sp4_v_t_44') | |
// (20, 13, 'lutff_6/out') | |
// (20, 13, 'sp4_v_b_44') | |
// (20, 14, 'neigh_op_bot_6') | |
// (20, 14, 'sp4_v_b_33') | |
// (20, 15, 'sp4_v_b_20') | |
// (20, 16, 'sp4_v_b_9') | |
// (21, 12, 'neigh_op_tnl_6') | |
// (21, 13, 'neigh_op_lft_6') | |
// (21, 14, 'neigh_op_bnl_6') | |
wire n712; | |
// (19, 13, 'neigh_op_tnr_0') | |
// (19, 14, 'neigh_op_rgt_0') | |
// (19, 15, 'local_g0_0') | |
// (19, 15, 'neigh_op_bnr_0') | |
// (19, 15, 'ram/WDATA_14') | |
// (20, 13, 'neigh_op_top_0') | |
// (20, 14, 'lutff_0/out') | |
// (20, 15, 'neigh_op_bot_0') | |
// (21, 13, 'neigh_op_tnl_0') | |
// (21, 14, 'neigh_op_lft_0') | |
// (21, 15, 'neigh_op_bnl_0') | |
wire n713; | |
// (19, 14, 'neigh_op_tnr_0') | |
// (19, 15, 'local_g3_0') | |
// (19, 15, 'neigh_op_rgt_0') | |
// (19, 15, 'ram/RADDR_2') | |
// (19, 16, 'neigh_op_bnr_0') | |
// (20, 14, 'neigh_op_top_0') | |
// (20, 15, 'lutff_0/out') | |
// (20, 16, 'neigh_op_bot_0') | |
// (21, 14, 'neigh_op_tnl_0') | |
// (21, 15, 'neigh_op_lft_0') | |
// (21, 16, 'neigh_op_bnl_0') | |
wire n714; | |
// (19, 14, 'neigh_op_tnr_1') | |
// (19, 15, 'local_g2_1') | |
// (19, 15, 'neigh_op_rgt_1') | |
// (19, 15, 'ram/WDATA_15') | |
// (19, 16, 'neigh_op_bnr_1') | |
// (20, 14, 'neigh_op_top_1') | |
// (20, 15, 'lutff_1/out') | |
// (20, 16, 'neigh_op_bot_1') | |
// (21, 14, 'neigh_op_tnl_1') | |
// (21, 15, 'neigh_op_lft_1') | |
// (21, 16, 'neigh_op_bnl_1') | |
wire n715; | |
// (19, 14, 'neigh_op_tnr_6') | |
// (19, 15, 'local_g2_6') | |
// (19, 15, 'neigh_op_rgt_6') | |
// (19, 15, 'ram/RADDR_7') | |
// (19, 16, 'neigh_op_bnr_6') | |
// (20, 14, 'neigh_op_top_6') | |
// (20, 15, 'lutff_6/out') | |
// (20, 16, 'neigh_op_bot_6') | |
// (21, 14, 'neigh_op_tnl_6') | |
// (21, 15, 'neigh_op_lft_6') | |
// (21, 16, 'neigh_op_bnl_6') | |
wire n716; | |
// (19, 14, 'neigh_op_tnr_7') | |
// (19, 15, 'local_g2_7') | |
// (19, 15, 'neigh_op_rgt_7') | |
// (19, 15, 'ram/RADDR_0') | |
// (19, 16, 'neigh_op_bnr_7') | |
// (20, 14, 'neigh_op_top_7') | |
// (20, 15, 'lutff_7/out') | |
// (20, 16, 'neigh_op_bot_7') | |
// (21, 14, 'neigh_op_tnl_7') | |
// (21, 15, 'neigh_op_lft_7') | |
// (21, 16, 'neigh_op_bnl_7') | |
reg n717 = 0; | |
// (20, 9, 'neigh_op_tnr_4') | |
// (20, 10, 'local_g2_4') | |
// (20, 10, 'lutff_3/in_1') | |
// (20, 10, 'neigh_op_rgt_4') | |
// (20, 11, 'neigh_op_bnr_4') | |
// (21, 9, 'neigh_op_top_4') | |
// (21, 10, 'lutff_4/out') | |
// (21, 11, 'neigh_op_bot_4') | |
// (22, 9, 'neigh_op_tnl_4') | |
// (22, 10, 'neigh_op_lft_4') | |
// (22, 11, 'neigh_op_bnl_4') | |
reg n718 = 0; | |
// (20, 10, 'neigh_op_tnr_0') | |
// (20, 11, 'local_g3_0') | |
// (20, 11, 'lutff_7/in_0') | |
// (20, 11, 'neigh_op_rgt_0') | |
// (20, 12, 'neigh_op_bnr_0') | |
// (21, 10, 'neigh_op_top_0') | |
// (21, 11, 'lutff_0/out') | |
// (21, 12, 'neigh_op_bot_0') | |
// (22, 10, 'neigh_op_tnl_0') | |
// (22, 11, 'neigh_op_lft_0') | |
// (22, 12, 'neigh_op_bnl_0') | |
reg n719 = 0; | |
// (20, 10, 'neigh_op_tnr_7') | |
// (20, 11, 'local_g3_7') | |
// (20, 11, 'lutff_2/in_0') | |
// (20, 11, 'neigh_op_rgt_7') | |
// (20, 12, 'neigh_op_bnr_7') | |
// (21, 10, 'neigh_op_top_7') | |
// (21, 11, 'lutff_7/out') | |
// (21, 12, 'neigh_op_bot_7') | |
// (22, 10, 'neigh_op_tnl_7') | |
// (22, 11, 'neigh_op_lft_7') | |
// (22, 12, 'neigh_op_bnl_7') | |
wire nCS; | |
// (23, 1, 'neigh_op_bnr_2') | |
// (23, 1, 'neigh_op_bnr_6') | |
// (23, 1, 'sp4_r_v_b_44') | |
// (23, 2, 'sp4_r_v_b_33') | |
// (23, 3, 'sp4_r_v_b_20') | |
// (23, 4, 'local_g2_1') | |
// (23, 4, 'lutff_1/in_2') | |
// (23, 4, 'sp4_r_v_b_9') | |
// (24, 0, 'io_1/D_IN_0') | |
// (24, 0, 'io_1/PAD') | |
// (24, 0, 'span4_vert_44') | |
// (24, 1, 'neigh_op_bot_2') | |
// (24, 1, 'neigh_op_bot_6') | |
// (24, 1, 'sp4_v_b_44') | |
// (24, 2, 'sp4_v_b_33') | |
// (24, 3, 'sp4_v_b_20') | |
// (24, 4, 'sp4_v_b_9') | |
wire open_0; | |
wire open_1; | |
wire open_2; | |
wire open_3; | |
wire open_4; | |
wire open_5; | |
wire open_6; | |
wire open_7; | |
wire open_8; | |
wire open_9; | |
wire open_10; | |
wire open_11; | |
wire open_12; | |
wire open_13; | |
wire open_14; | |
wire open_15; | |
wire open_16; | |
wire open_17; | |
wire open_18; | |
wire open_19; | |
wire open_20; | |
wire open_21; | |
wire open_22; | |
wire open_23; | |
wire open_24; | |
wire open_25; | |
wire open_26; | |
wire open_27; | |
wire open_28; | |
wire open_29; | |
wire open_30; | |
wire open_31; | |
wire n721; | |
// (16, 6, 'lutff_0/cout') | |
wire n722; | |
// (16, 16, 'lutff_0/cout') | |
wire n723; | |
// (5, 13, 'lutff_0/cout') | |
wire n724; | |
// (3, 11, 'lutff_0/cout') | |
wire n725; | |
// (10, 16, 'lutff_0/cout') | |
wire n726; | |
// (13, 10, 'lutff_0/cout') | |
wire n727; | |
// (9, 7, 'lutff_0/cout') | |
wire n728; | |
// (18, 11, 'lutff_6/lout') | |
wire n729; | |
// (13, 12, 'lutff_5/lout') | |
wire n730; | |
// (16, 16, 'lutff_2/lout') | |
wire n731; | |
// (16, 7, 'lutff_3/lout') | |
wire n732; | |
// (7, 12, 'lutff_4/lout') | |
wire n733; | |
// (10, 16, 'lutff_7/lout') | |
wire n734; | |
// (13, 10, 'lutff_4/lout') | |
wire n735; | |
// (15, 13, 'lutff_0/lout') | |
wire n736; | |
// (10, 11, 'lutff_6/lout') | |
wire n737; | |
// (18, 12, 'lutff_0/lout') | |
wire n738; | |
// (16, 8, 'lutff_7/lout') | |
wire n739; | |
// (14, 12, 'lutff_4/lout') | |
wire n740; | |
// (11, 13, 'lutff_4/lout') | |
wire n741; | |
// (12, 12, 'lutff_1/lout') | |
wire n742; | |
// (14, 11, 'lutff_7/lout') | |
wire n743; | |
// (20, 9, 'lutff_7/lout') | |
wire n744; | |
// (10, 12, 'lutff_0/lout') | |
wire n745; | |
// (11, 15, 'lutff_5/lout') | |
wire n746; | |
// (7, 13, 'lutff_3/lout') | |
wire n747; | |
// (16, 11, 'lutff_3/lout') | |
wire n748; | |
// (14, 9, 'lutff_2/lout') | |
wire n749; | |
// (7, 11, 'lutff_3/lout') | |
wire n750; | |
// (17, 14, 'lutff_6/lout') | |
wire n751; | |
// (12, 15, 'lutff_5/lout') | |
wire n752; | |
// (18, 9, 'lutff_5/lout') | |
wire n753; | |
// (21, 11, 'lutff_0/lout') | |
wire n754; | |
// (12, 9, 'lutff_4/lout') | |
wire n755; | |
// (14, 10, 'lutff_0/lout') | |
wire n756; | |
// (7, 14, 'lutff_7/lout') | |
wire n757; | |
// (17, 9, 'lutff_0/lout') | |
wire n758; | |
// (15, 15, 'lutff_1/lout') | |
wire n759; | |
// (10, 9, 'lutff_5/lout') | |
wire n760; | |
// (18, 10, 'lutff_1/lout') | |
wire n761; | |
// (13, 13, 'lutff_6/lout') | |
wire n762; | |
// (11, 9, 'lutff_1/lout') | |
wire n763; | |
// (16, 6, 'lutff_0/out') | |
wire n764; | |
// (16, 6, 'lutff_0/lout') | |
wire n765; | |
// (16, 6, 'carry_in_mux') | |
// Carry-In for (16 6) | |
assign n765 = 1; | |
wire n766; | |
// (13, 11, 'lutff_3/lout') | |
wire n767; | |
// (20, 11, 'lutff_2/lout') | |
wire n768; | |
// (18, 15, 'lutff_1/lout') | |
wire n769; | |
// (5, 13, 'lutff_6/lout') | |
wire n770; | |
// (16, 13, 'lutff_6/lout') | |
wire n771; | |
// (14, 15, 'lutff_5/lout') | |
wire n772; | |
// (11, 10, 'lutff_5/lout') | |
wire n773; | |
// (17, 12, 'lutff_5/lout') | |
wire n774; | |
// (15, 10, 'lutff_4/lout') | |
wire n775; | |
// (5, 11, 'lutff_3/lout') | |
wire n776; | |
// (10, 15, 'lutff_1/lout') | |
wire n777; | |
// (11, 12, 'lutff_4/lout') | |
wire n778; | |
// (16, 10, 'lutff_0/lout') | |
wire n779; | |
// (12, 11, 'lutff_7/lout') | |
wire n780; | |
// (3, 10, 'lutff_5/lout') | |
wire n781; | |
// (15, 9, 'lutff_2/lout') | |
wire n782; | |
// (9, 7, 'lutff_4/lout') | |
wire n783; | |
// (12, 14, 'lutff_6/lout') | |
wire n784; | |
// (10, 17, 'lutff_5/lout') | |
wire n785; | |
// (10, 14, 'lutff_6/lout') | |
wire n786; | |
// (15, 12, 'lutff_0/lout') | |
wire n787; | |
// (13, 9, 'lutff_4/lout') | |
wire n788; | |
// (17, 10, 'lutff_1/lout') | |
wire n789; | |
// (13, 14, 'lutff_7/lout') | |
wire n790; | |
// (16, 15, 'lutff_5/lout') | |
wire n791; | |
// (14, 13, 'lutff_4/lout') | |
wire n792; | |
// (20, 12, 'lutff_5/lout') | |
wire n793; | |
// (13, 12, 'lutff_2/lout') | |
wire n794; | |
// (20, 10, 'lutff_1/lout') | |
wire n795; | |
// (10, 13, 'lutff_0/lout') | |
wire n796; | |
// (11, 14, 'lutff_7/lout') | |
wire n797; | |
// (5, 14, 'lutff_7/lout') | |
wire n798; | |
// (16, 12, 'lutff_1/lout') | |
wire n799; | |
// (14, 14, 'lutff_2/lout') | |
wire n800; | |
// (17, 11, 'lutff_6/lout') | |
wire n801; | |
// (11, 11, 'lutff_6/lout') | |
wire n802; | |
// (15, 13, 'lutff_7/lout') | |
wire n803; | |
// (17, 13, 'lutff_6/lout') | |
wire n804; | |
// (15, 11, 'lutff_7/lout') | |
wire n805; | |
// (17, 16, 'lutff_5/lout') | |
wire n806; | |
// (20, 15, 'lutff_1/lout') | |
wire n807; | |
// (11, 13, 'lutff_3/lout') | |
wire n808; | |
// (12, 10, 'lutff_4/lout') | |
wire n809; | |
// (14, 11, 'lutff_0/lout') | |
wire n810; | |
// (3, 11, 'lutff_6/lout') | |
wire n811; | |
// (15, 14, 'lutff_3/lout') | |
wire n812; | |
// (12, 13, 'lutff_7/lout') | |
wire n813; | |
// (18, 11, 'lutff_7/lout') | |
wire n814; | |
// (16, 16, 'lutff_1/out') | |
wire n815; | |
// (16, 16, 'lutff_1/lout') | |
wire n816; | |
// (14, 2, 'lutff_2/lout') | |
wire n817; | |
// (4, 10, 'lutff_4/lout') | |
wire n818; | |
// (16, 7, 'lutff_0/lout') | |
wire n819; | |
// (7, 12, 'lutff_5/lout') | |
wire n820; | |
// (10, 16, 'lutff_6/lout') | |
wire n821; | |
// (13, 10, 'lutff_5/lout') | |
wire n822; | |
// (18, 12, 'lutff_3/lout') | |
wire n823; | |
// (16, 8, 'lutff_6/lout') | |
wire n824; | |
// (14, 10, 'lutff_7/lout') | |
wire n825; | |
// (14, 12, 'lutff_7/lout') | |
wire n826; | |
// (12, 12, 'lutff_0/lout') | |
wire n827; | |
// (13, 13, 'lutff_1/lout') | |
wire n828; | |
// (20, 9, 'lutff_0/lout') | |
wire n829; | |
// (10, 12, 'lutff_3/lout') | |
wire n830; | |
// (7, 13, 'lutff_2/lout') | |
wire n831; | |
// (16, 11, 'lutff_0/lout') | |
wire n832; | |
// (14, 9, 'lutff_3/lout') | |
wire n833; | |
// (5, 13, 'lutff_1/out') | |
wire n834; | |
// (5, 13, 'lutff_1/lout') | |
wire n835; | |
// (18, 9, 'lutff_2/lout') | |
wire n836; | |
// (11, 10, 'lutff_2/lout') | |
wire n837; | |
// (21, 11, 'lutff_7/lout') | |
wire n838; | |
// (12, 9, 'lutff_5/lout') | |
wire n839; | |
// (17, 9, 'lutff_3/lout') | |
wire n840; | |
// (15, 15, 'lutff_0/lout') | |
wire n841; | |
// (10, 9, 'lutff_2/lout') | |
wire n842; | |
// (18, 10, 'lutff_0/lout') | |
wire n843; | |
// (12, 14, 'lutff_1/lout') | |
wire n844; | |
// (9, 7, 'lutff_3/lout') | |
wire n845; | |
// (16, 6, 'lutff_3/lout') | |
wire n846; | |
// (13, 11, 'lutff_2/lout') | |
wire n847; | |
// (20, 11, 'lutff_3/lout') | |
wire n848; | |
// (10, 10, 'lutff_0/lout') | |
wire n849; | |
// (18, 15, 'lutff_2/lout') | |
wire n850; | |
// (10, 7, 'lutff_7/lout') | |
wire n851; | |
// (16, 13, 'lutff_7/lout') | |
wire n852; | |
// (17, 12, 'lutff_2/lout') | |
wire n853; | |
// (15, 10, 'lutff_5/lout') | |
wire n854; | |
// (13, 14, 'lutff_0/lout') | |
wire n855; | |
// (11, 12, 'lutff_5/lout') | |
wire n856; | |
// (12, 11, 'lutff_4/lout') | |
wire n857; | |
// (16, 10, 'lutff_3/lout') | |
wire n858; | |
// (9, 12, 'lutff_2/lout') | |
wire n859; | |
// (17, 15, 'lutff_0/lout') | |
wire n860; | |
// (15, 9, 'lutff_1/lout') | |
wire n861; | |
// (18, 8, 'lutff_1/lout') | |
wire n862; | |
// (11, 11, 'lutff_1/lout') | |
wire n863; | |
// (13, 15, 'lutff_7/lout') | |
wire n864; | |
// (17, 16, 'lutff_2/lout') | |
wire n865; | |
// (10, 14, 'lutff_5/lout') | |
wire n866; | |
// (15, 12, 'lutff_1/lout') | |
wire n867; | |
// (17, 10, 'lutff_2/lout') | |
wire n868; | |
// (3, 11, 'lutff_1/out') | |
wire n869; | |
// (3, 11, 'lutff_1/lout') | |
wire n870; | |
// (16, 15, 'lutff_2/lout') | |
wire n871; | |
// (14, 13, 'lutff_5/lout') | |
wire n872; | |
// (12, 13, 'lutff_0/lout') | |
wire n873; | |
// (20, 12, 'lutff_4/lout') | |
wire n874; | |
// (13, 12, 'lutff_3/lout') | |
wire n875; | |
// (10, 13, 'lutff_1/lout') | |
wire n876; | |
// (11, 14, 'lutff_4/lout') | |
wire n877; | |
// (16, 12, 'lutff_0/lout') | |
wire n878; | |
// (17, 11, 'lutff_5/lout') | |
wire n879; | |
// (15, 13, 'lutff_6/lout') | |
wire n880; | |
// (4, 13, 'lutff_0/lout') | |
wire n881; | |
// (17, 13, 'lutff_1/lout') | |
wire n882; | |
// (15, 11, 'lutff_6/lout') | |
wire n883; | |
// (5, 12, 'lutff_3/lout') | |
wire n884; | |
// (20, 15, 'lutff_6/lout') | |
wire n885; | |
// (11, 13, 'lutff_2/lout') | |
wire n886; | |
// (12, 12, 'lutff_7/lout') | |
wire n887; | |
// (12, 10, 'lutff_7/lout') | |
wire n888; | |
// (14, 11, 'lutff_1/lout') | |
wire n889; | |
// (9, 13, 'lutff_1/lout') | |
wire n890; | |
// (15, 14, 'lutff_0/lout') | |
wire n891; | |
// (18, 11, 'lutff_0/lout') | |
wire n892; | |
// (16, 16, 'lutff_0/out') | |
wire n893; | |
// (16, 16, 'lutff_0/lout') | |
wire n894; | |
// (16, 16, 'carry_in_mux') | |
// Carry-In for (16 16) | |
assign n894 = 1; | |
wire n895; | |
// (16, 7, 'lutff_1/lout') | |
wire n896; | |
// (10, 16, 'lutff_1/out') | |
wire n897; | |
// (10, 16, 'lutff_1/lout') | |
wire n898; | |
// (13, 10, 'lutff_6/lout') | |
wire n899; | |
// (18, 12, 'lutff_2/lout') | |
wire n900; | |
// (16, 8, 'lutff_5/lout') | |
wire n901; | |
// (16, 14, 'lutff_1/lout') | |
wire n902; | |
// (14, 12, 'lutff_6/lout') | |
wire n903; | |
// (13, 13, 'lutff_0/lout') | |
wire n904; | |
// (11, 9, 'lutff_7/lout') | |
wire n905; | |
// (20, 9, 'lutff_1/lout') | |
wire n906; | |
// (10, 12, 'lutff_2/lout') | |
wire n907; | |
// (11, 15, 'lutff_7/lout') | |
wire n908; | |
// (7, 13, 'lutff_1/lout') | |
wire n909; | |
// (16, 11, 'lutff_1/lout') | |
wire n910; | |
// (5, 13, 'lutff_0/out') | |
wire n911; | |
// (5, 13, 'lutff_0/lout') | |
wire n912; | |
// (5, 13, 'carry_in_mux') | |
// Carry-In for (5 13) | |
assign n912 = 1; | |
wire n913; | |
// (18, 9, 'lutff_3/lout') | |
wire n914; | |
// (21, 1, 'lutff_6/lout') | |
wire n915; | |
// (11, 10, 'lutff_3/lout') | |
wire n916; | |
// (12, 9, 'lutff_6/lout') | |
wire n917; | |
// (17, 9, 'lutff_2/lout') | |
wire n918; | |
// (18, 10, 'lutff_7/lout') | |
wire n919; | |
// (3, 10, 'lutff_3/lout') | |
wire n920; | |
// (12, 14, 'lutff_0/lout') | |
wire n921; | |
// (9, 7, 'lutff_2/lout') | |
wire n922; | |
// (16, 6, 'lutff_2/lout') | |
wire n923; | |
// (13, 11, 'lutff_1/lout') | |
wire n924; | |
// (20, 11, 'lutff_0/lout') | |
wire n925; | |
// (10, 10, 'lutff_7/lout') | |
wire n926; | |
// (18, 15, 'lutff_3/lout') | |
wire n927; | |
// (16, 13, 'lutff_0/lout') | |
wire n928; | |
// (14, 15, 'lutff_7/lout') | |
wire n929; | |
// (15, 10, 'lutff_2/lout') | |
wire n930; | |
// (11, 12, 'lutff_6/lout') | |
wire n931; | |
// (16, 10, 'lutff_2/lout') | |
wire n932; | |
// (12, 11, 'lutff_5/lout') | |
wire n933; | |
// (17, 15, 'lutff_7/lout') | |
wire n934; | |
// (15, 9, 'lutff_0/lout') | |
wire n935; | |
// (5, 14, 'lutff_1/lout') | |
wire n936; | |
// (11, 11, 'lutff_0/lout') | |
wire n937; | |
// (17, 16, 'lutff_3/lout') | |
wire n938; | |
// (13, 9, 'lutff_6/lout') | |
wire n939; | |
// (10, 14, 'lutff_4/lout') | |
wire n940; | |
// (15, 12, 'lutff_2/lout') | |
wire n941; | |
// (18, 13, 'lutff_6/lout') | |
wire n942; | |
// (3, 11, 'lutff_0/out') | |
wire n943; | |
// (3, 11, 'lutff_0/lout') | |
wire n944; | |
// (3, 11, 'carry_in_mux') | |
// Carry-In for (3 11) | |
assign n944 = 1; | |
wire n945; | |
// (16, 15, 'lutff_3/lout') | |
wire n946; | |
// (14, 13, 'lutff_2/lout') | |
wire n947; | |
// (12, 13, 'lutff_1/lout') | |
wire n948; | |
// (20, 12, 'lutff_3/lout') | |
wire n949; | |
// (13, 12, 'lutff_0/lout') | |
wire n950; | |
// (16, 16, 'lutff_7/lout') | |
wire n951; | |
// (20, 10, 'lutff_3/lout') | |
wire n952; | |
// (10, 13, 'lutff_6/lout') | |
wire n953; | |
// (11, 14, 'lutff_5/lout') | |
wire n954; | |
// (16, 7, 'lutff_6/lout') | |
wire n955; | |
// (16, 12, 'lutff_7/lout') | |
wire n956; | |
// (14, 14, 'lutff_0/lout') | |
wire n957; | |
// (5, 19, 'lutff_1/lout') | |
wire n958; | |
// (4, 13, 'lutff_1/lout') | |
wire n959; | |
// (15, 13, 'lutff_5/lout') | |
wire n960; | |
// (17, 11, 'lutff_4/lout') | |
wire n961; | |
// (15, 11, 'lutff_1/lout') | |
wire n962; | |
// (5, 12, 'lutff_0/lout') | |
wire n963; | |
// (20, 15, 'lutff_7/lout') | |
wire n964; | |
// (11, 13, 'lutff_1/lout') | |
wire n965; | |
// (12, 12, 'lutff_6/lout') | |
wire n966; | |
// (12, 10, 'lutff_6/lout') | |
wire n967; | |
// (14, 11, 'lutff_2/lout') | |
wire n968; | |
// (16, 9, 'lutff_3/lout') | |
wire n969; | |
// (17, 8, 'lutff_6/lout') | |
wire n970; | |
// (18, 11, 'lutff_1/lout') | |
wire n971; | |
// (14, 2, 'lutff_0/lout') | |
wire n972; | |
// (10, 16, 'lutff_0/out') | |
wire n973; | |
// (10, 16, 'lutff_0/lout') | |
wire n974; | |
// (10, 16, 'carry_in_mux') | |
// Carry-In for (10 16) | |
assign n974 = 1; | |
wire n975; | |
// (13, 10, 'lutff_7/lout') | |
wire n976; | |
// (18, 12, 'lutff_5/lout') | |
wire n977; | |
// (16, 8, 'lutff_4/lout') | |
wire n978; | |
// (14, 10, 'lutff_5/lout') | |
wire n979; | |
// (14, 12, 'lutff_1/lout') | |
wire n980; | |
// (13, 13, 'lutff_3/lout') | |
wire n981; | |
// (11, 9, 'lutff_6/lout') | |
wire n982; | |
// (20, 9, 'lutff_2/lout') | |
wire n983; | |
// (10, 12, 'lutff_5/lout') | |
wire n984; | |
// (16, 6, 'lutff_5/lout') | |
wire n985; | |
// (7, 13, 'lutff_0/lout') | |
wire n986; | |
// (16, 11, 'lutff_6/lout') | |
wire n987; | |
// (14, 9, 'lutff_1/lout') | |
wire n988; | |
// (5, 13, 'lutff_3/lout') | |
wire n989; | |
// (10, 7, 'lutff_1/lout') | |
wire n990; | |
// (18, 9, 'lutff_0/lout') | |
wire n991; | |
// (20, 14, 'lutff_4/lout') | |
wire n992; | |
// (11, 10, 'lutff_0/lout') | |
wire n993; | |
// (12, 9, 'lutff_7/lout') | |
wire n994; | |
// (17, 9, 'lutff_5/lout') | |
wire n995; | |
// (15, 15, 'lutff_2/lout') | |
wire n996; | |
// (18, 10, 'lutff_6/lout') | |
wire n997; | |
// (3, 10, 'lutff_0/lout') | |
wire n998; | |
// (9, 7, 'lutff_1/out') | |
wire n999; | |
// (9, 7, 'lutff_1/lout') | |
wire n1000; | |
// (13, 11, 'lutff_0/lout') | |
wire n1001; | |
// (20, 11, 'lutff_1/lout') | |
wire n1002; | |
// (18, 15, 'lutff_4/lout') | |
wire n1003; | |
// (16, 13, 'lutff_1/lout') | |
wire n1004; | |
// (14, 15, 'lutff_0/lout') | |
wire n1005; | |
// (17, 12, 'lutff_0/lout') | |
wire n1006; | |
// (15, 10, 'lutff_3/lout') | |
wire n1007; | |
// (10, 15, 'lutff_4/lout') | |
wire n1008; | |
// (11, 12, 'lutff_7/lout') | |
wire n1009; | |
// (12, 11, 'lutff_2/lout') | |
wire n1010; | |
// (16, 10, 'lutff_5/lout') | |
wire n1011; | |
// (9, 12, 'lutff_0/lout') | |
wire n1012; | |
// (17, 15, 'lutff_6/lout') | |
wire n1013; | |
// (7, 10, 'lutff_4/lout') | |
wire n1014; | |
// (11, 11, 'lutff_3/lout') | |
wire n1015; | |
// (17, 16, 'lutff_0/lout') | |
wire n1016; | |
// (13, 9, 'lutff_1/lout') | |
wire n1017; | |
// (10, 14, 'lutff_3/lout') | |
wire n1018; | |
// (15, 12, 'lutff_3/lout') | |
wire n1019; | |
// (17, 10, 'lutff_4/lout') | |
wire n1020; | |
// (18, 13, 'lutff_7/lout') | |
wire n1021; | |
// (3, 11, 'lutff_3/lout') | |
wire n1022; | |
// (16, 15, 'lutff_0/lout') | |
wire n1023; | |
// (7, 20, 'lutff_5/lout') | |
wire n1024; | |
// (14, 13, 'lutff_3/lout') | |
wire n1025; | |
// (12, 13, 'lutff_2/lout') | |
wire n1026; | |
// (20, 12, 'lutff_2/lout') | |
wire n1027; | |
// (13, 12, 'lutff_1/lout') | |
wire n1028; | |
// (16, 16, 'lutff_6/lout') | |
wire n1029; | |
// (20, 10, 'lutff_2/lout') | |
wire n1030; | |
// (10, 13, 'lutff_7/lout') | |
wire n1031; | |
// (11, 14, 'lutff_2/lout') | |
wire n1032; | |
// (16, 7, 'lutff_7/lout') | |
wire n1033; | |
// (16, 12, 'lutff_6/lout') | |
wire n1034; | |
// (17, 11, 'lutff_3/lout') | |
wire n1035; | |
// (15, 13, 'lutff_4/lout') | |
wire n1036; | |
// (4, 13, 'lutff_2/lout') | |
wire n1037; | |
// (12, 3, 'lutff_1/lout') | |
wire n1038; | |
// (17, 13, 'lutff_3/lout') | |
wire n1039; | |
// (15, 11, 'lutff_0/lout') | |
wire n1040; | |
// (11, 13, 'lutff_0/lout') | |
wire n1041; | |
// (12, 12, 'lutff_5/lout') | |
wire n1042; | |
// (7, 19, 'lutff_2/lout') | |
wire n1043; | |
// (16, 9, 'lutff_4/lout') | |
wire n1044; | |
// (14, 11, 'lutff_3/lout') | |
wire n1045; | |
// (12, 10, 'lutff_1/lout') | |
wire n1046; | |
// (18, 11, 'lutff_2/lout') | |
wire n1047; | |
// (12, 15, 'lutff_1/lout') | |
wire n1048; | |
// (15, 7, 'lutff_0/lout') | |
wire n1049; | |
// (10, 16, 'lutff_3/lout') | |
wire n1050; | |
// (9, 8, 'lutff_7/lout') | |
wire n1051; | |
// (13, 10, 'lutff_0/out') | |
wire n1052; | |
// (13, 10, 'lutff_0/lout') | |
wire n1053; | |
// (13, 10, 'carry_in_mux') | |
// Carry-In for (13 10) | |
assign n1053 = 1; | |
wire n1054; | |
// (10, 11, 'lutff_2/lout') | |
wire n1055; | |
// (18, 12, 'lutff_4/lout') | |
wire n1056; | |
// (16, 8, 'lutff_3/lout') | |
wire n1057; | |
// (14, 10, 'lutff_4/lout') | |
wire n1058; | |
// (14, 12, 'lutff_0/lout') | |
wire n1059; | |
// (13, 13, 'lutff_2/lout') | |
wire n1060; | |
// (20, 9, 'lutff_3/lout') | |
wire n1061; | |
// (10, 12, 'lutff_4/lout') | |
wire n1062; | |
// (16, 6, 'lutff_4/lout') | |
wire n1063; | |
// (16, 11, 'lutff_7/lout') | |
wire n1064; | |
// (14, 9, 'lutff_6/lout') | |
wire n1065; | |
// (20, 11, 'lutff_6/lout') | |
wire n1066; | |
// (5, 13, 'lutff_2/lout') | |
wire n1067; | |
// (18, 9, 'lutff_1/lout') | |
wire n1068; | |
// (11, 10, 'lutff_1/lout') | |
wire n1069; | |
// (12, 9, 'lutff_0/lout') | |
wire n1070; | |
// (17, 9, 'lutff_4/lout') | |
wire n1071; | |
// (15, 15, 'lutff_5/lout') | |
wire n1072; | |
// (18, 10, 'lutff_5/lout') | |
wire n1073; | |
// (3, 10, 'lutff_1/lout') | |
wire n1074; | |
// (12, 14, 'lutff_2/lout') | |
wire n1075; | |
// (9, 7, 'lutff_0/out') | |
wire n1076; | |
// (9, 7, 'lutff_0/lout') | |
wire n1077; | |
// (9, 7, 'carry_in_mux') | |
// Carry-In for (9 7) | |
assign n1077 = 1; | |
wire n1078; | |
// (13, 11, 'lutff_7/lout') | |
wire n1079; | |
// (18, 15, 'lutff_5/lout') | |
wire n1080; | |
// (16, 13, 'lutff_2/lout') | |
wire n1081; | |
// (14, 15, 'lutff_1/lout') | |
wire n1082; | |
// (17, 12, 'lutff_1/lout') | |
wire n1083; | |
// (15, 10, 'lutff_0/lout') | |
wire n1084; | |
// (13, 14, 'lutff_3/lout') | |
wire n1085; | |
// (10, 15, 'lutff_5/lout') | |
wire n1086; | |
// (11, 12, 'lutff_0/lout') | |
wire n1087; | |
// (16, 10, 'lutff_4/lout') | |
wire n1088; | |
// (12, 11, 'lutff_3/lout') | |
wire n1089; | |
// (20, 10, 'lutff_5/lout') | |
wire n1090; | |
// (9, 12, 'lutff_1/lout') | |
wire n1091; | |
// (17, 15, 'lutff_5/lout') | |
wire n1092; | |
// (15, 9, 'lutff_6/lout') | |
wire n1093; | |
// (18, 14, 'lutff_2/lout') | |
wire n1094; | |
// (5, 14, 'lutff_3/lout') | |
wire n1095; | |
// (20, 13, 'lutff_6/lout') | |
wire n1096; | |
// (11, 11, 'lutff_2/lout') | |
wire n1097; | |
// (13, 15, 'lutff_4/lout') | |
wire n1098; | |
// (17, 16, 'lutff_1/lout') | |
wire n1099; | |
// (10, 14, 'lutff_2/lout') | |
wire n1100; | |
// (15, 12, 'lutff_4/lout') | |
wire n1101; | |
// (13, 9, 'lutff_0/lout') | |
wire n1102; | |
// (17, 10, 'lutff_5/lout') | |
wire n1103; | |
// (7, 19, 'lutff_5/lout') | |
wire n1104; | |
// (21, 10, 'lutff_4/lout') | |
wire n1105; | |
// (18, 13, 'lutff_4/lout') | |
wire n1106; | |
// (3, 11, 'lutff_2/lout') | |
wire n1107; | |
// (16, 15, 'lutff_1/lout') | |
wire n1108; | |
// (14, 13, 'lutff_0/lout') | |
wire n1109; | |
// (12, 13, 'lutff_3/lout') | |
wire n1110; | |
// (20, 12, 'lutff_1/lout') | |
wire n1111; | |
// (13, 12, 'lutff_6/lout') | |
wire n1112; | |
// (16, 16, 'lutff_5/lout') | |
wire n1113; | |
// (10, 13, 'lutff_4/lout') | |
wire n1114; | |
// (11, 14, 'lutff_3/lout') | |
wire n1115; | |
// (16, 7, 'lutff_4/lout') | |
wire n1116; | |
// (16, 12, 'lutff_5/lout') | |
wire n1117; | |
// (14, 14, 'lutff_6/lout') | |
wire n1118; | |
// (15, 13, 'lutff_3/lout') | |
wire n1119; | |
// (17, 13, 'lutff_2/lout') | |
wire n1120; | |
// (15, 11, 'lutff_3/lout') | |
wire n1121; | |
// (5, 12, 'lutff_6/lout') | |
wire n1122; | |
// (10, 4, 'lutff_2/lout') | |
wire n1123; | |
// (20, 15, 'lutff_5/lout') | |
wire n1124; | |
// (11, 13, 'lutff_7/lout') | |
wire n1125; | |
// (12, 12, 'lutff_4/lout') | |
wire n1126; | |
// (12, 10, 'lutff_0/out') | |
wire n1127; | |
// (12, 10, 'lutff_0/lout') | |
wire n1128; | |
// (12, 10, 'carry_in_mux') | |
// Carry-In for (12 10) | |
assign n1128 = 1; | |
wire n1129; | |
// (14, 11, 'lutff_4/lout') | |
wire n1130; | |
// (16, 9, 'lutff_5/lout') | |
wire n1131; | |
// (20, 9, 'lutff_4/lout') | |
wire n1132; | |
// (17, 8, 'lutff_4/lout') | |
wire n1133; | |
// (15, 14, 'lutff_7/lout') | |
wire n1134; | |
// (18, 11, 'lutff_3/lout') | |
wire n1135; | |
// (12, 15, 'lutff_6/lout') | |
wire n1136; | |
// (18, 9, 'lutff_6/lout') | |
wire n1137; | |
// (10, 16, 'lutff_2/lout') | |
wire n1138; | |
// (9, 8, 'lutff_4/lout') | |
wire n1139; | |
// (13, 10, 'lutff_1/lout') | |
wire n1140; | |
// (10, 11, 'lutff_3/lout') | |
wire n1141; | |
// (18, 12, 'lutff_7/lout') | |
wire n1142; | |
// (16, 8, 'lutff_2/lout') | |
wire n1143; | |
// (14, 10, 'lutff_3/lout') | |
wire n1144; | |
// (16, 14, 'lutff_2/lout') | |
wire n1145; | |
// (14, 12, 'lutff_3/lout') | |
wire n1146; | |
// (5, 10, 'lutff_1/lout') | |
wire n1147; | |
// (13, 13, 'lutff_5/lout') | |
wire n1148; | |
// (11, 9, 'lutff_4/lout') | |
wire n1149; | |
// (10, 12, 'lutff_7/lout') | |
wire n1150; | |
// (16, 6, 'lutff_7/lout') | |
wire n1151; | |
// (16, 11, 'lutff_4/lout') | |
wire n1152; | |
// (14, 9, 'lutff_7/lout') | |
wire n1153; | |
// (20, 11, 'lutff_7/lout') | |
wire n1154; | |
// (17, 14, 'lutff_3/lout') | |
wire n1155; | |
// (5, 13, 'lutff_5/lout') | |
wire n1156; | |
// (10, 7, 'lutff_3/lout') | |
wire n1157; | |
// (11, 10, 'lutff_6/lout') | |
wire n1158; | |
// (12, 9, 'lutff_1/lout') | |
wire n1159; | |
// (17, 9, 'lutff_7/lout') | |
wire n1160; | |
// (15, 15, 'lutff_4/lout') | |
wire n1161; | |
// (9, 12, 'lutff_6/lout') | |
wire n1162; | |
// (12, 14, 'lutff_5/lout') | |
wire n1163; | |
// (9, 7, 'lutff_7/lout') | |
wire n1164; | |
// (9, 9, 'lutff_7/lout') | |
wire n1165; | |
// (13, 11, 'lutff_6/lout') | |
wire n1166; | |
// (10, 10, 'lutff_4/lout') | |
wire n1167; | |
// (18, 15, 'lutff_6/lout') | |
wire n1168; | |
// (16, 13, 'lutff_3/lout') | |
wire n1169; | |
// (15, 10, 'lutff_1/lout') | |
wire n1170; | |
// (13, 14, 'lutff_4/lout') | |
wire n1171; | |
// (10, 15, 'lutff_6/lout') | |
wire n1172; | |
// (11, 12, 'lutff_1/lout') | |
wire n1173; | |
// (16, 10, 'lutff_7/lout') | |
wire n1174; | |
// (12, 11, 'lutff_0/lout') | |
wire n1175; | |
// (17, 4, 'lutff_5/lout') | |
wire n1176; | |
// (20, 10, 'lutff_4/lout') | |
wire n1177; | |
// (17, 15, 'lutff_4/lout') | |
wire n1178; | |
// (15, 9, 'lutff_5/lout') | |
wire n1179; | |
// (20, 13, 'lutff_7/lout') | |
wire n1180; | |
// (11, 11, 'lutff_5/lout') | |
wire n1181; | |
// (17, 16, 'lutff_6/lout') | |
wire n1182; | |
// (10, 14, 'lutff_1/lout') | |
wire n1183; | |
// (15, 12, 'lutff_5/lout') | |
wire n1184; | |
// (13, 9, 'lutff_3/lout') | |
wire n1185; | |
// (17, 10, 'lutff_6/lout') | |
wire n1186; | |
// (18, 13, 'lutff_5/lout') | |
wire n1187; | |
// (3, 11, 'lutff_5/lout') | |
wire n1188; | |
// (14, 13, 'lutff_1/lout') | |
wire n1189; | |
// (12, 13, 'lutff_4/lout') | |
wire n1190; | |
// (18, 11, 'lutff_4/lout') | |
wire n1191; | |
// (20, 12, 'lutff_0/lout') | |
wire n1192; | |
// (13, 12, 'lutff_7/lout') | |
wire n1193; | |
// (16, 16, 'lutff_4/lout') | |
wire n1194; | |
// (10, 13, 'lutff_5/lout') | |
wire n1195; | |
// (11, 14, 'lutff_0/lout') | |
wire n1196; | |
// (16, 7, 'lutff_5/lout') | |
wire n1197; | |
// (10, 16, 'lutff_5/lout') | |
wire n1198; | |
// (16, 12, 'lutff_4/lout') | |
wire n1199; | |
// (17, 11, 'lutff_1/lout') | |
wire n1200; | |
// (15, 13, 'lutff_2/lout') | |
wire n1201; | |
// (14, 14, 'lutff_5/lout') | |
wire n1202; | |
// (10, 11, 'lutff_4/lout') | |
wire n1203; | |
// (15, 11, 'lutff_2/lout') | |
wire n1204; | |
// (11, 13, 'lutff_6/lout') | |
wire n1205; | |
// (12, 12, 'lutff_3/lout') | |
wire n1206; | |
// (16, 9, 'lutff_6/lout') | |
wire n1207; | |
// (14, 11, 'lutff_5/lout') | |
wire n1208; | |
// (12, 10, 'lutff_3/lout') | |
wire n1209; | |
// (20, 9, 'lutff_5/lout') | |
wire n1210; | |
// (7, 13, 'lutff_5/lout') | |
wire n1211; | |
// (17, 14, 'lutff_4/lout') | |
wire n1212; | |
// (12, 15, 'lutff_7/lout') | |
wire n1213; | |
// (18, 9, 'lutff_7/lout') | |
wire n1214; | |
// (13, 10, 'lutff_2/lout') | |
wire n1215; | |
// (18, 3, 'lutff_7/lout') | |
wire n1216; | |
// (18, 12, 'lutff_6/lout') | |
wire n1217; | |
// (16, 8, 'lutff_1/lout') | |
wire n1218; | |
// (14, 10, 'lutff_2/lout') | |
wire n1219; | |
// (14, 12, 'lutff_2/lout') | |
wire n1220; | |
// (18, 10, 'lutff_3/lout') | |
wire n1221; | |
// (13, 13, 'lutff_4/lout') | |
wire n1222; | |
// (11, 9, 'lutff_3/lout') | |
wire n1223; | |
// (10, 12, 'lutff_6/lout') | |
wire n1224; | |
// (16, 6, 'lutff_6/lout') | |
wire n1225; | |
// (16, 11, 'lutff_5/lout') | |
wire n1226; | |
// (14, 9, 'lutff_4/lout') | |
wire n1227; | |
// (5, 20, 'lutff_7/lout') | |
wire n1228; | |
// (20, 11, 'lutff_4/lout') | |
wire n1229; | |
// (5, 13, 'lutff_4/lout') | |
wire n1230; | |
// (11, 10, 'lutff_7/lout') | |
wire n1231; | |
// (17, 12, 'lutff_7/lout') | |
wire n1232; | |
// (15, 10, 'lutff_6/lout') | |
wire n1233; | |
// (17, 9, 'lutff_6/lout') | |
wire n1234; | |
// (15, 15, 'lutff_7/lout') | |
wire n1235; | |
// (3, 10, 'lutff_7/lout') | |
wire n1236; | |
// (12, 14, 'lutff_4/lout') | |
wire n1237; | |
// (9, 7, 'lutff_6/lout') | |
wire n1238; | |
// (20, 13, 'lutff_0/lout') | |
wire n1239; | |
// (13, 11, 'lutff_5/lout') | |
wire n1240; | |
// (18, 15, 'lutff_7/lout') | |
wire n1241; | |
// (14, 15, 'lutff_3/lout') | |
wire n1242; | |
// (18, 13, 'lutff_2/lout') | |
wire n1243; | |
// (13, 14, 'lutff_5/lout') | |
wire n1244; | |
// (16, 15, 'lutff_7/lout') | |
wire n1245; | |
// (14, 13, 'lutff_6/lout') | |
wire n1246; | |
// (10, 15, 'lutff_7/lout') | |
wire n1247; | |
// (11, 12, 'lutff_2/lout') | |
wire n1248; | |
// (20, 12, 'lutff_7/lout') | |
wire n1249; | |
// (12, 11, 'lutff_1/lout') | |
wire n1250; | |
// (20, 10, 'lutff_7/lout') | |
wire n1251; | |
// (10, 13, 'lutff_2/lout') | |
wire n1252; | |
// (15, 9, 'lutff_4/lout') | |
wire n1253; | |
// (16, 12, 'lutff_3/lout') | |
wire n1254; | |
// (11, 11, 'lutff_4/lout') | |
wire n1255; | |
// (15, 11, 'lutff_5/lout') | |
wire n1256; | |
// (13, 15, 'lutff_2/lout') | |
wire n1257; | |
// (17, 16, 'lutff_7/lout') | |
wire n1258; | |
// (23, 4, 'lutff_1/lout') | |
wire n1259; | |
// (10, 14, 'lutff_0/lout') | |
wire n1260; | |
// (13, 9, 'lutff_2/lout') | |
wire n1261; | |
// (15, 12, 'lutff_6/lout') | |
wire n1262; | |
// (3, 11, 'lutff_4/lout') | |
wire n1263; | |
// (17, 8, 'lutff_2/lout') | |
wire n1264; | |
// (12, 13, 'lutff_5/lout') | |
wire n1265; | |
// (18, 11, 'lutff_5/lout') | |
wire n1266; | |
// (13, 12, 'lutff_4/lout') | |
wire n1267; | |
// (16, 16, 'lutff_3/lout') | |
wire n1268; | |
// (11, 14, 'lutff_1/lout') | |
wire n1269; | |
// (16, 7, 'lutff_2/lout') | |
wire n1270; | |
// (10, 16, 'lutff_4/lout') | |
wire n1271; | |
// (14, 14, 'lutff_4/lout') | |
wire n1272; | |
// (15, 13, 'lutff_1/lout') | |
wire n1273; | |
// (4, 13, 'lutff_5/lout') | |
wire n1274; | |
// (17, 11, 'lutff_0/lout') | |
wire n1275; | |
// (10, 11, 'lutff_5/lout') | |
wire n1276; | |
// (14, 12, 'lutff_5/lout') | |
wire n1277; | |
// (11, 13, 'lutff_5/lout') | |
wire n1278; | |
// (12, 12, 'lutff_2/lout') | |
wire n1279; | |
// (16, 9, 'lutff_7/lout') | |
wire n1280; | |
// (14, 11, 'lutff_6/lout') | |
wire n1281; | |
// (12, 10, 'lutff_2/lout') | |
wire n1282; | |
// (20, 9, 'lutff_6/lout') | |
wire n1283; | |
// (10, 12, 'lutff_1/lout') | |
wire n1284; | |
// (15, 14, 'lutff_5/lout') | |
wire n1285; | |
// (7, 13, 'lutff_4/lout') | |
wire n1286; | |
// (16, 11, 'lutff_2/lout') | |
wire n1287; | |
// (12, 15, 'lutff_4/lout') | |
wire n1288; | |
// (18, 9, 'lutff_4/lout') | |
wire n1289; | |
// (20, 14, 'lutff_0/lout') | |
wire n1290; | |
// (13, 10, 'lutff_3/lout') | |
wire n1291; | |
// (16, 8, 'lutff_0/lout') | |
wire n1292; | |
// (14, 10, 'lutff_1/lout') | |
wire n1293; | |
// (17, 9, 'lutff_1/lout') | |
wire n1294; | |
// (18, 10, 'lutff_2/lout') | |
wire n1295; | |
// (13, 13, 'lutff_7/lout') | |
wire n1296; | |
// (16, 6, 'lutff_1/out') | |
wire n1297; | |
// (16, 6, 'lutff_1/lout') | |
wire n1298; | |
// (14, 9, 'lutff_5/lout') | |
wire n1299; | |
// (15, 2, 'lutff_0/lout') | |
wire n1300; | |
// (18, 15, 'lutff_0/lout') | |
wire n1301; | |
// (5, 13, 'lutff_7/lout') | |
wire n1302; | |
// (14, 15, 'lutff_4/lout') | |
wire n1303; | |
// (11, 10, 'lutff_4/lout') | |
wire n1304; | |
// (17, 12, 'lutff_4/lout') | |
wire n1305; | |
// (15, 10, 'lutff_7/lout') | |
wire n1306; | |
// (10, 15, 'lutff_0/lout') | |
wire n1307; | |
// (15, 15, 'lutff_6/lout') | |
wire n1308; | |
// (8, 13, 'lutff_5/lout') | |
wire n1309; | |
// (16, 10, 'lutff_1/lout') | |
wire n1310; | |
// (12, 11, 'lutff_6/lout') | |
wire n1311; | |
// (9, 12, 'lutff_4/lout') | |
wire n1312; | |
// (17, 15, 'lutff_2/lout') | |
wire n1313; | |
// (12, 14, 'lutff_7/lout') | |
wire n1314; | |
// (9, 7, 'lutff_5/lout') | |
wire n1315; | |
// (13, 11, 'lutff_4/lout') | |
wire n1316; | |
// (10, 14, 'lutff_7/lout') | |
wire n1317; | |
// (13, 9, 'lutff_5/lout') | |
wire n1318; | |
// (18, 13, 'lutff_3/lout') | |
wire n1319; | |
// (13, 14, 'lutff_6/lout') | |
wire n1320; | |
// (14, 13, 'lutff_7/lout') | |
wire n1321; | |
// (7, 20, 'lutff_1/lout') | |
wire n1322; | |
// (8, 7, 'lutff_1/lout') | |
wire n1323; | |
// (11, 12, 'lutff_3/lout') | |
wire n1324; | |
// (20, 12, 'lutff_6/lout') | |
wire n1325; | |
// (20, 10, 'lutff_6/lout') | |
wire n1326; | |
// (10, 13, 'lutff_3/lout') | |
wire n1327; | |
// (11, 14, 'lutff_6/lout') | |
wire n1328; | |
// (5, 14, 'lutff_6/lout') | |
wire n1329; | |
// (16, 12, 'lutff_2/lout') | |
wire n1330; | |
// (14, 14, 'lutff_3/lout') | |
wire n1331; | |
// (17, 11, 'lutff_7/lout') | |
wire n1332; | |
// (11, 11, 'lutff_7/lout') | |
wire n1333; | |
// (16, 2, 'lutff_2/lout') | |
wire n1334; | |
// (17, 13, 'lutff_7/lout') | |
wire n1335; | |
// (15, 11, 'lutff_4/lout') | |
wire n1336; | |
// (17, 16, 'lutff_4/lout') | |
wire n1337; | |
// (20, 15, 'lutff_0/lout') | |
wire n1338; | |
// (15, 12, 'lutff_7/lout') | |
wire n1339; | |
// (12, 10, 'lutff_5/lout') | |
wire n1340; | |
// (3, 11, 'lutff_7/lout') | |
wire n1341; | |
// (17, 8, 'lutff_3/lout') | |
wire n1342; | |
// (15, 14, 'lutff_2/lout') | |
wire n1343; | |
// (12, 13, 'lutff_6/lout') | |
tran(\pins [0], \pins[0] ); | |
tran(\pins [1], \pins[1] ); | |
tran(\pins [2], \pins[2] ); | |
tran(\pins [3], \pins[3] ); | |
tran(\pins [4], \pins[4] ); | |
// Debug Symbols | |
wire \_top.cpu_top.reset_$glb_sr = n1; | |
wire \_$abc$3290$n174_$glb_ce = n2; | |
wire \_clk = pin_23; | |
wire \_$abc$3290$n244_$glb_ce = n4; | |
wire \_$abc$3290$n163 = n5; | |
wire \_$PACKER_VCC_NET = n6; | |
wire \_reset_counter[1] = n7; | |
wire \_$abc$3290$n445_1 = n8; | |
wire \_reset = n9; | |
wire \_$abc$3290$n444_1 = n10; | |
wire \_reset_counter[2] = n11; | |
wire \_reset_counter[3] = n12; | |
wire \_reset_counter[4] = n13; | |
wire \_reset_counter[5] = n14; | |
wire \_reset_counter[6] = n15; | |
wire \_reset_counter[7] = n16; | |
wire \_$abc$3290$n153 = n17; | |
wire \_top.idata_write[7] = n18; | |
wire \_reset_counter[0] = n19; | |
wire \_$auto$alumacc.cc:474:replace_alu$637.C[2] = n20; | |
wire \_$auto$alumacc.cc:474:replace_alu$637.C[3] = n21; | |
wire \_$auto$alumacc.cc:474:replace_alu$637.C[4] = n22; | |
wire \_$auto$alumacc.cc:474:replace_alu$637.C[5] = n23; | |
wire \_$auto$alumacc.cc:474:replace_alu$637.C[6] = n24; | |
wire \_$auto$alumacc.cc:474:replace_alu$637.C[7] = n25; | |
wire \_top.idata_write[6] = n26; | |
wire \_top.idata_write[5] = n27; | |
wire \_top.idata_write[8] = n28; | |
wire \_top.cpu_top.idata[13] = n29; | |
wire \_top.cpu_top.idata[0] = n30; | |
wire \_top.iaddr_write[1] = n31; | |
wire \_pins[0] = n32; | |
wire \_top.cpu_top.membus.gpio.enable[0] = n33; | |
wire \_top.cpu_top.membus.gpio.pin_out[0] = n34; | |
wire \_top.spi.nCS_s[2] = n35; | |
wire \_top.cpu_top.pins[10] = n36; | |
wire \_$abc$3290$n817 = n37; | |
wire \_top.iaddr_write[0] = n38; | |
wire \_top.cpu_top.membus.gpio_data_read[10] = n39; | |
wire \_top.new_transfer = n40; | |
wire \_top.iaddr_write[2] = n41; | |
wire \_top.iaddr_write[3] = n42; | |
wire \_top.iaddr_write[4] = n43; | |
wire \_top.iaddr_write[5] = n44; | |
wire \_top.iaddr_write[6] = n45; | |
wire \_top.iaddr_write[7] = n46; | |
wire \_top.idata_write[4] = n47; | |
wire \_top.idata_write[12] = n48; | |
wire \_top.idata_write[15] = n49; | |
wire \_top.idata_write[13] = n50; | |
wire \_top.idata_write[11] = n51; | |
wire \_top.cpu_top.iaddr[7] = n52; | |
wire \_top.cpu_top.idata[11] = n53; | |
wire \_top.cpu_top.idata[10] = n54; | |
wire \_top.cpu_top.idata[8] = n55; | |
wire \_top.cpu_top.idata[15] = n56; | |
wire \_top.cpu_top.idata[2] = n57; | |
wire \_top.cpu_top.idata[1] = n58; | |
wire \_top.idata_write[10] = n59; | |
wire \_pins[1] = n60; | |
wire \_top.cpu_top.membus.gpio.enable[1] = n61; | |
wire \_top.cpu_top.membus.gpio.pin_out[1] = n62; | |
wire \_top.spi.nCS_s[1] = n64; | |
wire \_top.i_write = n65; | |
wire \_top.cpu_top.dD[10] = n66; | |
wire \_top.cpu_top.iaddr[2] = n67; | |
wire \_top.cpu_top.iaddr[0] = n68; | |
wire \_top.cpu_top.idata[12] = n69; | |
wire \_top.cpu_top.idata[14] = n70; | |
wire \_top.cpu_top.idata[9] = n71; | |
wire \_top.idata_write[0] = n72; | |
wire \_$auto$alumacc.cc:474:replace_alu$640.C[2] = n73; | |
wire \_$auto$alumacc.cc:474:replace_alu$640.C[3] = n74; | |
wire \_$auto$alumacc.cc:474:replace_alu$640.C[4] = n75; | |
wire \_$auto$alumacc.cc:474:replace_alu$640.C[5] = n76; | |
wire \_$auto$alumacc.cc:474:replace_alu$640.C[6] = n77; | |
wire \_$auto$alumacc.cc:474:replace_alu$640.C[7] = n78; | |
wire \_top.cpu_top.idata[7] = n79; | |
wire \_top.cpu_top.idata[6] = n80; | |
wire \_top.cpu_top.idata[5] = n81; | |
wire \_top.cpu_top.idata[4] = n82; | |
wire \_top.cpu_top.idata[3] = n83; | |
wire \_top.idata_write[14] = n84; | |
wire \_pins[2] = n85; | |
wire \_top.cpu_top.dD[1] = n86; | |
wire \_$abc$3290$n246 = n87; | |
wire \_top.cpu_top.membus.gpio.enable[2] = n88; | |
wire \_$abc$3290$n158 = n90; | |
wire \_top.cpu_top.iaddr[6] = n91; | |
wire \_top.cpu_top.iaddr[4] = n92; | |
wire \_top.idata_write[2] = n93; | |
wire \_top.idata_write[1] = n94; | |
wire \_top.idata_write[3] = n95; | |
wire \_top.idata_write[9] = n96; | |
wire \_top.cpu_top.iaddr[5] = n97; | |
wire \_top.cpu_top.iaddr[3] = n98; | |
wire \_top.cpu_top.iaddr[1] = n99; | |
wire \_top.cpu_top.dD[0] = n100; | |
wire \_top.cpu_top.membus.gpio.pin_out[2] = n101; | |
wire \_top.spi.numbits[1] = n103; | |
wire \_$abc$3290$n172 = n104; | |
wire \_top.cpu_top.membus.gpio_data_read[1] = n105; | |
wire \_$abc$3290$n617_1 = n106; | |
wire \_top.cpu_top.dD[2] = n107; | |
wire \_$abc$3290$n775 = n108; | |
wire \_$abc$3290$n777 = n109; | |
wire \_$abc$3290$n490_1 = n110; | |
wire \_top.spi.numbits[2] = n111; | |
wire \_top.spi.numbits[3] = n112; | |
wire \_top.spi.numbits[0] = n113; | |
wire \_$abc$3290$n771 = n114; | |
wire \_$abc$3290$n171 = n115; | |
wire \_$abc$3290$n414_1 = n116; | |
wire \_$abc$3290$n622_1 = n117; | |
wire \_$abc$3290$n416_1 = n118; | |
wire \_$abc$3290$n419_1 = n119; | |
wire \_$abc$3290$n425_1 = n120; | |
wire \_$abc$3290$n418_1 = n121; | |
wire \_$abc$3290$n703_1 = n122; | |
wire \_$abc$3290$n417_1 = n123; | |
wire \_$abc$3290$n621 = n124; | |
wire \_$abc$3290$n611 = n125; | |
wire \_$abc$3290$n535 = n126; | |
wire \_$abc$3290$n610 = n127; | |
wire \_$abc$3290$n620_1 = n128; | |
wire \_top.cpu_top.cpu.cpu_execute.ip_inc[4] = n129; | |
wire \_top.cpu_top.cpu.cpu_execute.ip_inc[5] = n130; | |
wire \_top.cpu_top.cpu.cpu_execute.ip_inc[7] = n131; | |
wire \_top.spi.nCS_s[0] = n132; | |
wire \_top.spi.SCK_s[1] = n133; | |
wire \_top.spi.SCK_s[2] = n134; | |
wire \_$abc$3290$n174 = n2; | |
wire \_$auto$alumacc.cc:474:replace_alu$652.C[2] = n135; | |
wire \_$auto$alumacc.cc:474:replace_alu$652.C[3] = n136; | |
wire \_$abc$3290$n684 = n137; | |
wire \_top.cpu_top.reset = n1; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[7] = n138; | |
wire \_$abc$3290$n685_1 = n139; | |
wire \_top.spi.MOSI_s[1] = n140; | |
wire \_$abc$3290$n686 = n141; | |
wire \_$abc$3290$n704 = n142; | |
wire \_top.cpu_top.cpu.mem_read = n143; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.mem_read_r = n144; | |
wire \_$abc$3290$n825 = n145; | |
wire \_$abc$3290$n678 = n146; | |
wire \_$abc$3290$n626_1 = n147; | |
wire \_$abc$3290$n609 = n148; | |
wire \_$abc$3290$n422_1 = n149; | |
wire \_$abc$3290$n421_1 = n150; | |
wire \_$abc$3290$n618 = n151; | |
wire \_$abc$3290$n731 = n152; | |
wire \_$abc$3290$n830 = n153; | |
wire \_top.cpu_top.cpu.cpu_execute.IP[7] = n154; | |
wire \_$abc$3290$n623_1 = n155; | |
wire \_$abc$3290$n604 = n156; | |
wire \_$abc$3290$n601 = n157; | |
wire \_$abc$3290$n564_1 = n158; | |
wire \_$abc$3290$n560_1 = n159; | |
wire \_top.cpu_top.membus.mem_data_read[1] = n160; | |
wire \_$abc$3290$n614_1 = n161; | |
wire \_top.cpu_top.membus.mem_sel_read = n162; | |
wire \_$abc$3290$n822 = n163; | |
wire \_$abc$3290$n572_1 = n164; | |
wire \_top.cpu_top.cpu.cpu_execute.IP[1] = n165; | |
wire \_$abc$3290$n496_1 = n166; | |
wire \_$abc$3290$n575_1 = n167; | |
wire \_top.cpu_top.cpu.cpu_execute.IP[2] = n168; | |
wire \_$abc$3290$n615_1 = n169; | |
wire \_$abc$3290$n619_1 = n170; | |
wire \_top.cpu_top.cpu.cpu_execute.ip_inc[2] = n171; | |
wire \_top.cpu_top.cpu.cpu_execute.IP[6] = n172; | |
wire \_top.cpu_top.cpu.cpu_execute.IP[3] = n173; | |
wire \_top.cpu_top.cpu.cpu_execute.IP[5] = n174; | |
wire \_top.cpu_top.cpu.cpu_execute.IP[4] = n175; | |
wire \_top.cpu_top.cpu.cpu_execute.ip_inc[3] = n176; | |
wire \_top.cpu_top.cpu.cpu_execute.ip_inc[6] = n177; | |
wire \_$abc$3290$n592 = n178; | |
wire \_$abc$3290$n823 = n179; | |
wire \_$abc$3290$n631_1 = n180; | |
wire \_$abc$3290$n608 = n181; | |
wire \_$abc$3290$n630 = n182; | |
wire \_$abc$3290$n632_1 = n183; | |
wire \_$abc$3290$n629_1 = n184; | |
wire \_$abc$3290$n637 = n185; | |
wire \_$abc$3290$n650_1 = n186; | |
wire \_$abc$3290$n642 = n187; | |
wire \_$abc$3290$n653_1 = n188; | |
wire \_$abc$3290$n655_1 = n189; | |
wire \_$abc$3290$n656_1 = n190; | |
wire \_$abc$3290$n625_1 = n191; | |
wire \_$abc$3290$n654 = n192; | |
wire \_$abc$3290$n634_1 = n193; | |
wire \_$abc$3290$n638 = n194; | |
wire \_$abc$3290$n714 = n195; | |
wire \_top.cpu_top.cpu.inc = n196; | |
wire \_$abc$3290$n723 = n197; | |
wire \_$abc$3290$n722 = n198; | |
wire \_$abc$3290$n732 = n199; | |
wire \_$abc$3290$n470_1 = n200; | |
wire \_$abc$3290$n619 = n201; | |
wire \_$abc$3290$n622 = n202; | |
wire \_$abc$3290$n826 = n203; | |
wire \_$abc$3290$n625 = n204; | |
wire \_$abc$3290$n561_1 = n205; | |
wire \_$abc$3290$n643 = n206; | |
wire \_$abc$3290$n644 = n207; | |
wire \_$abc$3290$n633 = n208; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[1] = n209; | |
wire \_$abc$3290$n398_1 = n210; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[10] = n211; | |
wire \_$abc$3290$n713_1 = n212; | |
wire \_top.cpu_top.membus.mem_data_read[10] = n213; | |
wire \_$abc$3290$n835 = n214; | |
wire \_$abc$3290$n646 = n215; | |
wire \_$abc$3290$n659 = n216; | |
wire \_$abc$3290$n649 = n217; | |
wire \_$abc$3290$n652 = n218; | |
wire \_$abc$3290$n635_1 = n219; | |
wire \_$abc$3290$n641_1 = n220; | |
wire \_$abc$3290$n624 = n221; | |
wire \_$abc$3290$n649_1 = n222; | |
wire \_$abc$3290$n616_1 = n223; | |
wire \_$abc$3290$n706 = n224; | |
wire \_$abc$3290$n602 = n225; | |
wire \_$abc$3290$n568_1 = n226; | |
wire \_top.cpu_top.cpu.cpu_execute.IP[0] = n227; | |
wire \_$abc$3290$n580 = n228; | |
wire \_$abc$3290$n577_1 = n229; | |
wire \_$abc$3290$n573_1 = n230; | |
wire \_top.cpu_top.cpu.cpu_execute.ip_inc[0] = n231; | |
wire \_$abc$3290$n587 = n232; | |
wire \_$abc$3290$n582 = n233; | |
wire \_$abc$3290$n567_1 = n234; | |
wire \_$abc$3290$n574_1 = n235; | |
wire \_$abc$3290$n583 = n236; | |
wire \_$auto$alumacc.cc:474:replace_alu$643.C[2] = n237; | |
wire \_$auto$alumacc.cc:474:replace_alu$643.C[3] = n238; | |
wire \_$auto$alumacc.cc:474:replace_alu$643.C[4] = n239; | |
wire \_$auto$alumacc.cc:474:replace_alu$643.C[5] = n240; | |
wire \_$auto$alumacc.cc:474:replace_alu$643.C[6] = n241; | |
wire \_$auto$alumacc.cc:474:replace_alu$643.C[7] = n242; | |
wire \_$abc$3290$n682_1 = n243; | |
wire \_$abc$3290$n681_1 = n244; | |
wire \_$abc$3290$n680 = n245; | |
wire \_$abc$3290$n617 = n246; | |
wire \_$abc$3290$n679 = n247; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[1] = n248; | |
wire \_$abc$3290$n620 = n249; | |
wire \_$abc$3290$n623 = n250; | |
wire \_$abc$3290$n626 = n251; | |
wire \_$abc$3290$n629 = n252; | |
wire \_$abc$3290$n632 = n253; | |
wire \_$abc$3290$n635 = n254; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[8] = n255; | |
wire \_$abc$3290$n683 = n256; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[15] = n257; | |
wire \_$abc$3290$n616 = n258; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[4] = n259; | |
wire \_$abc$3290$n641 = n260; | |
wire \_$abc$3290$n647 = n261; | |
wire \_$abc$3290$n650 = n262; | |
wire \_$abc$3290$n653 = n263; | |
wire \_$abc$3290$n656 = n264; | |
wire \_$abc$3290$n662 = n265; | |
wire \_$abc$3290$n828 = n266; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[5] = n267; | |
wire \_$abc$3290$n824 = n268; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[6] = n269; | |
wire \_top.cpu_top.dD[7] = n270; | |
wire \_$abc$3290$n639 = n271; | |
wire \_$abc$3290$n658_1 = n272; | |
wire \_$abc$3290$n657 = n273; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[4] = n274; | |
wire \_$abc$3290$n694 = n275; | |
wire \_$abc$3290$n695_1 = n276; | |
wire \_$abc$3290$n638_1 = n277; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[11] = n278; | |
wire \_$abc$3290$n832 = n279; | |
wire \_top.cpu_top.membus.mem.w_strobe = n280; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[3] = n281; | |
wire \_$abc$3290$n637_1 = n282; | |
wire \_$abc$3290$n647_1 = n283; | |
wire \_$abc$3290$n640_1 = n284; | |
wire \_$abc$3290$n648 = n285; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[2] = n286; | |
wire \_$abc$3290$n646_1 = n287; | |
wire \_$abc$3290$n645 = n288; | |
wire \_$abc$3290$n534 = n289; | |
wire \_$abc$3290$n570_1 = n290; | |
wire \_$abc$3290$n643_1 = n291; | |
wire \_$abc$3290$n565_1 = n292; | |
wire \_$abc$3290$n578_1 = n293; | |
wire \_$abc$3290$n590 = n294; | |
wire \_$abc$3290$n827 = n295; | |
wire \_$abc$3290$n585 = n296; | |
wire \_$abc$3290$n597 = n297; | |
wire \_$abc$3290$n599 = n298; | |
wire \_$abc$3290$n595 = n299; | |
wire \_$abc$3290$n579 = n300; | |
wire \_top.spi.MOSI_s[0] = n301; | |
wire \_top.cpu_top.membus.mem_sel_write = n302; | |
wire \_$abc$3290$n821 = n303; | |
wire \_$abc$3290$n613_1 = n304; | |
wire \_$abc$3290$n612_1 = n305; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[7] = n306; | |
wire \_$abc$3290$n607 = n307; | |
wire \_$abc$3290$n606 = n308; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[0] = n309; | |
wire \_$abc$3290$n628 = n310; | |
wire \_$abc$3290$n631 = n311; | |
wire \_$abc$3290$n634 = n312; | |
wire \_top.cpu_top.daddr[0] = n313; | |
wire \_top.cpu_top.daddr[1] = n314; | |
wire \_$abc$3290$n661_1 = n315; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[14] = n316; | |
wire \_$abc$3290$n834 = n317; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[13] = n318; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[2] = n319; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[1] = n320; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[2] = n321; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[3] = n322; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[4] = n323; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[5] = n324; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[6] = n325; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[7] = n326; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[8] = n327; | |
wire \_$abc$3290$n640 = n328; | |
wire \_$abc$3290$n655 = n329; | |
wire \_$abc$3290$n658 = n330; | |
wire \_top.cpu_top.daddr[4] = n331; | |
wire \_top.cpu_top.cpu.cpu_execute.TOS[15] = n332; | |
wire \_top.cpu_top.cpu.cpu_execute.TOS[14] = n333; | |
wire \_top.cpu_top.daddr[5] = n334; | |
wire \_top.cpu_top.daddr[7] = n335; | |
wire \_$abc$3290$n829 = n336; | |
wire \_$abc$3290$n833 = n337; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[9] = n338; | |
wire \_$abc$3290$n831 = n339; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[12] = n340; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_comb.arg[10] = n341; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[9] = n342; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[10] = n343; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[11] = n344; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[12] = n345; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[13] = n346; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[14] = n347; | |
wire \_$auto$alumacc.cc:474:replace_alu$658.C[15] = n348; | |
wire \_$abc$3290$n661 = n349; | |
wire \_top.cpu_top.cpu.cpu_execute.TOS[13] = n350; | |
wire \_$abc$3290$n757 = n351; | |
wire \_$abc$3290$n659_1 = n352; | |
wire \_$abc$3290$n707_1 = n353; | |
wire \_top.cpu_top.cpu.cpu_execute.TOS[9] = n354; | |
wire \_top.cpu_top.cpu.cpu_execute.TOS[10] = n355; | |
wire \_$abc$3290$n603 = n356; | |
wire \_$abc$3290$n401_1 = n357; | |
wire \_$abc$3290$n464_1 = n358; | |
wire \_$abc$3290$n708 = n359; | |
wire \_$abc$3290$n710 = n360; | |
wire \_$abc$3290$n709_1 = n361; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[0] = n362; | |
wire \_$abc$3290$n589 = n363; | |
wire \_top.cpu_top.membus.gpio_data_read[0] = n364; | |
wire \_$abc$3290$n588 = n365; | |
wire \_$abc$3290$n627 = n366; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[2] = n367; | |
wire \_$abc$3290$n429_1 = n368; | |
wire \_top.cpu_top.cpu.rstack_ip_sel = n369; | |
wire \_$abc$3290$n566_1 = n370; | |
wire \_top.cpu_top.membus.mem_data_read[0] = n371; | |
wire \_$abc$3290$n424 = n372; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[6] = n373; | |
wire \_$abc$3290$n593 = n374; | |
wire \_$abc$3290$n598 = n375; | |
wire \_top.cpu_top.membus.gpio.enable[3] = n376; | |
wire \_top.cpu_top.membus.gpio.enable[4] = n377; | |
wire \_top.cpu_top.dD[3] = n378; | |
wire \_top.cpu_top.dD[4] = n379; | |
wire \_$abc$3290$n672 = n380; | |
wire \_$abc$3290$n669 = n381; | |
wire \_$abc$3290$n670 = n382; | |
wire \_$abc$3290$n671 = n383; | |
wire \_top.cpu_top.daddr[6] = n384; | |
wire \_top.cpu_top.cpu.cpu_execute.TOS[12] = n385; | |
wire \_$abc$3290$n666 = n386; | |
wire \_top.cpu_top.daddr[8] = n387; | |
wire \_$abc$3290$n676 = n388; | |
wire \_top.cpu_top.dD[6] = n389; | |
wire \_top.cpu_top.cpu.cpu_execute.TOS[11] = n390; | |
wire \_top.cpu_top.daddr[2] = n391; | |
wire \_top.cpu_top.daddr[3] = n392; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[1] = n393; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[2] = n394; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[3] = n395; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[4] = n396; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[5] = n397; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[6] = n398; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[7] = n399; | |
wire \_$abc$3290$n741 = n400; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[6] = n401; | |
wire \_$abc$3290$n675 = n402; | |
wire \_$abc$3290$n749 = n403; | |
wire \_$abc$3290$n673 = n404; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[8] = n405; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[9] = n406; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[10] = n407; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[11] = n408; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[12] = n409; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[13] = n410; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[14] = n411; | |
wire \_$auto$alumacc.cc:474:replace_alu$655.C[15] = n412; | |
wire \_$abc$3290$n754 = n413; | |
wire \_$abc$3290$n745 = n414; | |
wire \_$abc$3290$n752 = n415; | |
wire \_$abc$3290$n753 = n416; | |
wire \_$abc$3290$n746 = n417; | |
wire \_$abc$3290$n744 = n418; | |
wire \_top.cpu_top.dD[15] = n419; | |
wire \_$abc$3290$n674 = n420; | |
wire \_$abc$3290$n740 = n421; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[3] = n422; | |
wire \_$abc$3290$n483_1 = n423; | |
wire \_$abc$3290$n562 = n424; | |
wire \_$abc$3290$n563_1 = n425; | |
wire \_$abc$3290$n651 = n426; | |
wire \_$abc$3290$n711_1 = n427; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[0] = n428; | |
wire \_$abc$3290$n244 = n4; | |
wire \_$abc$3290$n487_1 = n429; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[1] = n430; | |
wire \_$abc$3290$n569_1 = n431; | |
wire \_$abc$3290$n327 = n432; | |
wire \_$abc$3290$n584 = n433; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[3] = n434; | |
wire \_$abc$3290$n321 = n435; | |
wire \_pins[3] = n436; | |
wire \_top.cpu_top.membus.gpio.pin_out[3] = n437; | |
wire \_top.cpu_top.membus.gpio_data_read[3] = n438; | |
wire \_$abc$3290$n662_1 = n439; | |
wire \_$abc$3290$n663 = n440; | |
wire \_$abc$3290$n664 = n441; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP_result[7] = n442; | |
wire \_$abc$3290$n411_1 = n443; | |
wire \_$abc$3290$n486_1 = n444; | |
wire \_$abc$3290$n726 = n445; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP_result[0] = n446; | |
wire \_top.cpu_top.dD[5] = n447; | |
wire \_$abc$3290$n699_1 = n448; | |
wire \_$abc$3290$n697_1 = n449; | |
wire \_$abc$3290$n717 = n450; | |
wire \_$abc$3290$n700 = n451; | |
wire \_$abc$3290$n403_1 = n452; | |
wire \_$abc$3290$n665 = n453; | |
wire \_$abc$3290$n698 = n454; | |
wire \_$abc$3290$n413_1 = n455; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[14] = n456; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[8] = n457; | |
wire \_$abc$3290$n688 = n458; | |
wire \_$abc$3290$n691_1 = n459; | |
wire \_$abc$3290$n743 = n460; | |
wire \_$abc$3290$n689_1 = n461; | |
wire \_$abc$3290$n690 = n462; | |
wire \_top.cpu_top.dD[14] = n463; | |
wire \_$abc$3290$n485_1 = n464; | |
wire \_$abc$3290$n735 = n465; | |
wire \_$abc$3290$n484_1 = n466; | |
wire \_$abc$3290$n404_1 = n467; | |
wire \_$abc$3290$n400_1 = n468; | |
wire \_$abc$3290$n747 = n469; | |
wire \_$abc$3290$n259 = n470; | |
wire \_$abc$3290$n428_1 = n471; | |
wire \_$abc$3290$n818 = n472; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[10] = n473; | |
wire \_top.cpu_top.cpu.rdec = n474; | |
wire \_top.cpu_top.membus.gpio_data_read[2] = n475; | |
wire \_$abc$3290$n712 = n476; | |
wire \_$abc$3290$n338 = n477; | |
wire \_$abc$3290$n320 = n478; | |
wire \_$abc$3290$n326 = n479; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[4] = n480; | |
wire \_$abc$3290$n339 = n481; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[7] = n482; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[5] = n483; | |
wire \_$abc$3290$n330 = n484; | |
wire \_$abc$3290$n594 = n485; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP_result[5] = n486; | |
wire \_pins[4] = n488; | |
wire \_top.cpu_top.membus.gpio.pin_out[4] = n489; | |
wire \_$abc$3290$n564 = n490; | |
wire \_$abc$3290$n566 = n491; | |
wire \_$abc$3290$n568 = n492; | |
wire \_$abc$3290$n570 = n493; | |
wire \_$abc$3290$n572 = n494; | |
wire \_$abc$3290$n574 = n495; | |
wire \_top.cpu_top.cpu.pdec = n496; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP[7] = n497; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP[0] = n498; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP_result[6] = n499; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP[3] = n500; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP[2] = n501; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP_result[3] = n502; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP[6] = n503; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP_result[5] = n504; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP[5] = n505; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP_result[2] = n506; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP[4] = n507; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP_result[1] = n508; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP[1] = n509; | |
wire \_top.cpu_top.cpu.cpu_execute.pstack.SP_result[4] = n510; | |
wire \_top.cpu_top.membus.gpio_data_read[4] = n511; | |
wire \_top.cpu_top.cpu.pupdate = n512; | |
wire \_$abc$3290$n560 = n513; | |
wire \_$abc$3290$n410_1 = n514; | |
wire \_$abc$3290$n406_1 = n515; | |
wire \_$abc$3290$n728 = n516; | |
wire \_$abc$3290$n727 = n517; | |
wire \_top.cpu_top.pins[7] = n518; | |
wire \_$abc$3290$n725 = n519; | |
wire \_$abc$3290$n396 = n520; | |
wire \_top.cpu_top.membus.mem_data_read[4] = n521; | |
wire \_top.cpu_top.dD[9] = n522; | |
wire \_top.cpu_top.membus.mem_data_read[3] = n523; | |
wire \_$abc$3290$n718 = n524; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[9] = n525; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[11] = n526; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[5] = n527; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[12] = n528; | |
wire \_$abc$3290$n716 = n529; | |
wire \_$abc$3290$n719 = n530; | |
wire \_$abc$3290$n408_1 = n531; | |
wire \_top.cpu_top.dD[13] = n532; | |
wire \_$abc$3290$n751 = n533; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[15] = n534; | |
wire \_$abc$3290$n667 = n535; | |
wire \_$abc$3290$n692 = n536; | |
wire \_top.cpu_top.dD[11] = n537; | |
wire \_$abc$3290$n478_1 = n538; | |
wire \_$abc$3290$n734 = n539; | |
wire \_top.cpu_top.cpu.cpu_execute.tos_mem.TOS_r[13] = n540; | |
wire \_$abc$3290$n737 = n541; | |
wire \_$abc$3290$n738 = n542; | |
wire \_$abc$3290$n736 = n543; | |
wire \_$abc$3290$n693_1 = n544; | |
wire \_top.cpu_top.membus.mem_data_read[2] = n545; | |
wire \_$abc$3290$n318 = n546; | |
wire \_$abc$3290$n739 = n547; | |
wire \_$abc$3290$n329 = n548; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP[5] = n549; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP_result[7] = n550; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP[7] = n551; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP[1] = n552; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP_result[1] = n553; | |
wire \_$abc$3290$n546 = n554; | |
wire \_$abc$3290$n548 = n555; | |
wire \_$abc$3290$n550 = n556; | |
wire \_$abc$3290$n552 = n557; | |
wire \_$abc$3290$n554 = n558; | |
wire \_$abc$3290$n556 = n559; | |
wire \_$abc$3290$n323 = n560; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP_result[2] = n561; | |
wire \_$auto$alumacc.cc:474:replace_alu$646.C[2] = n563; | |
wire \_$auto$alumacc.cc:474:replace_alu$646.C[3] = n564; | |
wire \_$auto$alumacc.cc:474:replace_alu$646.C[4] = n565; | |
wire \_$auto$alumacc.cc:474:replace_alu$646.C[5] = n566; | |
wire \_$auto$alumacc.cc:474:replace_alu$646.C[6] = n567; | |
wire \_$auto$alumacc.cc:474:replace_alu$646.C[7] = n568; | |
wire \_$abc$3290$n263 = n569; | |
wire \_$abc$3290$n453_1 = n570; | |
wire \_$abc$3290$n203 = n571; | |
wire \_$abc$3290$n454_1 = n572; | |
wire \_$abc$3290$n399 = n573; | |
wire \_$abc$3290$n402 = n574; | |
wire \_$abc$3290$n403 = n575; | |
wire \_$abc$3290$n400 = n576; | |
wire \_$abc$3290$n397 = n577; | |
wire \_$abc$3290$n266 = n578; | |
wire \_$abc$3290$n394 = n579; | |
wire \_top.cpu_top.membus.gpio_data_read[12] = n580; | |
wire \_top.cpu_top.membus.gpio_data_read[7] = n581; | |
wire \_$abc$3290$n446 = n582; | |
wire \_top.cpu_top.membus.mem_data_read[7] = n583; | |
wire \_top.cpu_top.dD[12] = n584; | |
wire \_top.cpu_top.pins[12] = n585; | |
wire \_top.cpu_top.pins[14] = n586; | |
wire \_$abc$3290$n474_1 = n587; | |
wire \_$abc$3290$n720 = n588; | |
wire \_$abc$3290$n701_1 = n589; | |
wire \_$abc$3290$n729 = n590; | |
wire \_$abc$3290$n476_1 = n591; | |
wire \_top.cpu_top.membus.gpio_data_read[14] = n592; | |
wire \_top.cpu_top.membus.gpio_data_read[13] = n593; | |
wire \_$abc$3290$n755 = n594; | |
wire \_top.cpu_top.membus.mem_data_read[12] = n595; | |
wire \_top.cpu_top.dD[8] = n596; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[12] = n597; | |
wire \_top.cpu_top.pins[13] = n598; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[8] = n599; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[11] = n600; | |
wire \_top.cpu_top.membus.mem_data_read[14] = n601; | |
wire \_top.cpu_top.membus.mem_data_read[13] = n602; | |
wire \_$abc$3290$n333 = n603; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[13] = n604; | |
wire \_$abc$3290$n317 = n605; | |
wire \_$abc$3290$n432_1 = n606; | |
wire \_$abc$3290$n324 = n607; | |
wire \_$abc$3290$n542 = n608; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP_result[0] = n609; | |
wire \_$abc$3290$n433_1 = n610; | |
wire \_$abc$3290$n332 = n611; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP[0] = n612; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP[4] = n613; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP_result[4] = n614; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP[3] = n615; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP_result[3] = n616; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP[6] = n617; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP[2] = n618; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack.SP_result[6] = n619; | |
wire \_$auto$alumacc.cc:474:replace_alu$649.C[2] = n620; | |
wire \_$auto$alumacc.cc:474:replace_alu$649.C[3] = n621; | |
wire \_$auto$alumacc.cc:474:replace_alu$649.C[4] = n622; | |
wire \_$auto$alumacc.cc:474:replace_alu$649.C[5] = n623; | |
wire \_$auto$alumacc.cc:474:replace_alu$649.C[6] = n624; | |
wire \_$auto$alumacc.cc:474:replace_alu$649.C[7] = n625; | |
wire \_top.spi.SCK_s[0] = n626; | |
wire \_SCK = SCK; | |
wire \_$abc$3290$n432 = n628; | |
wire \_$abc$3290$n265 = n629; | |
wire \_$abc$3290$n442 = n630; | |
wire \_$abc$3290$n440 = n631; | |
wire \_$abc$3290$n483 = n632; | |
wire \_$abc$3290$n434 = n633; | |
wire \_$abc$3290$n26 = n634; | |
wire \_$abc$3290$n481 = n635; | |
wire \_$abc$3290$n451 = n636; | |
wire \_$abc$3290$n578 = n637; | |
wire \_$abc$3290$n613 = n638; | |
wire \_$abc$3290$n615 = n639; | |
wire \_$abc$3290$n393 = n640; | |
wire \_top.cpu_top.pins[8] = n641; | |
wire \_$abc$3290$n468_1 = n642; | |
wire \_top.cpu_top.pins[6] = n643; | |
wire \_$abc$3290$n472_1 = n644; | |
wire \_top.cpu_top.pins[9] = n645; | |
wire \_$abc$3290$n820 = n646; | |
wire \_$abc$3290$n721 = n647; | |
wire \_$abc$3290$n768 = n648; | |
wire \_top.cpu_top.membus.gpio_data_read[9] = n649; | |
wire \_$abc$3290$n466_1 = n650; | |
wire \_top.cpu_top.membus.gpio_data_read[8] = n651; | |
wire \_top.cpu_top.membus.gpio_data_read[11] = n652; | |
wire \_$abc$3290$n756 = n653; | |
wire \_$abc$3290$n429 = n654; | |
wire \_$abc$3290$n258 = n655; | |
wire \_$abc$3290$n748 = n656; | |
wire \_$abc$3290$n502 = n657; | |
wire \_$abc$3290$n480_1 = n658; | |
wire \_$abc$3290$n426 = n659; | |
wire \_$abc$3290$n55 = n660; | |
wire \_$abc$3290$n415 = n661; | |
wire \_$abc$3290$n417 = n662; | |
wire \_top.cpu_top.cpu.rchange = n663; | |
wire \_$abc$3290$n419 = n664; | |
wire \_$abc$3290$n413 = n665; | |
wire \_$abc$3290$n409 = n666; | |
wire \_$abc$3290$n575 = n667; | |
wire \_$abc$3290$n612 = n668; | |
wire \_$abc$3290$n482 = n669; | |
wire \_$abc$3290$n480 = n670; | |
wire \_$abc$3290$n577 = n671; | |
wire \_$abc$3290$n453 = n672; | |
wire \_$abc$3290$n450 = n673; | |
wire \_$abc$3290$n767 = n674; | |
wire \_$abc$3290$n614 = n675; | |
wire \_$abc$3290$n557 = n676; | |
wire \_$abc$3290$n261 = n677; | |
wire \_$abc$3290$n730 = n678; | |
wire \_top.cpu_top.membus.mem_data_read[15] = n679; | |
wire \_top.cpu_top.membus.mem_data_read[11] = n680; | |
wire \_top.cpu_top.membus.mem_data_read[9] = n681; | |
wire \_top.cpu_top.membus.mem_data_read[8] = n682; | |
wire \_top.cpu_top.membus.gpio_data_read[6] = n683; | |
wire \_top.cpu_top.membus.mem_data_read[6] = n684; | |
wire \_top.cpu_top.membus.mem_data_read[5] = n685; | |
wire \_$abc$3290$n425 = n686; | |
wire \_$abc$3290$n257 = n687; | |
wire \_$abc$3290$n428 = n688; | |
wire \_$abc$3290$n501 = n689; | |
wire \_$abc$3290$n682 = n690; | |
wire \_$abc$3290$n681 = n691; | |
wire \_$abc$3290$n769 = n692; | |
wire \_$abc$3290$n447 = n693; | |
wire \_$abc$3290$n335 = n694; | |
wire \_$abc$3290$n422 = n695; | |
wire \_MOSI = MOSI; | |
wire \_$abc$3290$n438 = n697; | |
wire \_$abc$3290$n558 = n698; | |
wire \_$abc$3290$n444 = n699; | |
wire \_$abc$3290$n262 = n700; | |
wire \_$abc$3290$n436 = n701; | |
wire \_$abc$3290$n454 = n702; | |
wire \_top.cpu_top.membus.gpio_data_read[5] = n703; | |
wire \_$abc$3290$n576 = n704; | |
wire \_top.cpu_top.membus.gpio_data_read[15] = n705; | |
wire \_$abc$3290$n702 = n706; | |
wire \_$abc$3290$n770 = n707; | |
wire \_$abc$3290$n423 = n708; | |
wire \_$abc$3290$n336 = n709; | |
wire \_$abc$3290$n448 = n710; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[9] = n711; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[14] = n712; | |
wire \_$abc$3290$n411 = n713; | |
wire \_top.cpu_top.cpu.cpu_execute.rstack_result[15] = n714; | |
wire \_$abc$3290$n421 = n715; | |
wire \_$abc$3290$n407 = n716; | |
wire \_top.cpu_top.pins[5] = n717; | |
wire \_top.cpu_top.pins[11] = n718; | |
wire \_top.cpu_top.pins[15] = n719; | |
wire \_nCS = nCS; | |
// IO Cell (4, 21, 0) | |
// PAD = \pins[0] | |
// D_IN_0 = n32 | |
// D_IN_1 = | |
// D_OUT_0 = n34 | |
// D_OUT_1 = 0 | |
// OUT_ENB = n33 | |
// CLK_EN = 1 | |
// IN_CLK = 0 | |
// OUT_CLK = 0 | |
// LATCH = 0 | |
// TYPE = 100101 (LSB:MSB) | |
assign n32 = \pins[0] ; | |
assign \pins[0] = n33 ? n34 : 1'bz; | |
// IO Cell (16, 0, 0) | |
// PAD = \pins[4] | |
// D_IN_0 = n488 | |
// D_IN_1 = | |
// D_OUT_0 = n489 | |
// D_OUT_1 = 0 | |
// OUT_ENB = n377 | |
// CLK_EN = 1 | |
// IN_CLK = 0 | |
// OUT_CLK = 0 | |
// LATCH = 0 | |
// TYPE = 100101 (LSB:MSB) | |
assign n488 = \pins[4] ; | |
assign \pins[4] = n377 ? n489 : 1'bz; | |
// IO Cell (6, 21, 0) | |
// PAD = \pins[2] | |
// D_IN_0 = n85 | |
// D_IN_1 = | |
// D_OUT_0 = n101 | |
// D_OUT_1 = 0 | |
// OUT_ENB = n88 | |
// CLK_EN = 1 | |
// IN_CLK = 0 | |
// OUT_CLK = 0 | |
// LATCH = 0 | |
// TYPE = 100101 (LSB:MSB) | |
assign n85 = \pins[2] ; | |
assign \pins[2] = n88 ? n101 : 1'bz; | |
// IO Cell (19, 21, 0) | |
// PAD = pin_23 | |
// D_IN_0 = | |
// D_IN_1 = | |
// D_OUT_0 = 0 | |
// D_OUT_1 = 0 | |
// OUT_ENB = 1 | |
// CLK_EN = 1 | |
// IN_CLK = 0 | |
// OUT_CLK = 0 | |
// LATCH = 0 | |
// TYPE = 000000 (LSB:MSB) | |
// IO Cell (5, 21, 0) | |
// PAD = \pins[1] | |
// D_IN_0 = n60 | |
// D_IN_1 = | |
// D_OUT_0 = n62 | |
// D_OUT_1 = 0 | |
// OUT_ENB = n61 | |
// CLK_EN = 1 | |
// IN_CLK = 0 | |
// OUT_CLK = 0 | |
// LATCH = 0 | |
// TYPE = 100101 (LSB:MSB) | |
assign n60 = \pins[1] ; | |
assign \pins[1] = n61 ? n62 : 1'bz; | |
// IO Cell (15, 0, 0) | |
// PAD = \pins[3] | |
// D_IN_0 = n436 | |
// D_IN_1 = | |
// D_OUT_0 = n437 | |
// D_OUT_1 = 0 | |
// OUT_ENB = n376 | |
// CLK_EN = 1 | |
// IN_CLK = 0 | |
// OUT_CLK = 0 | |
// LATCH = 0 | |
// TYPE = 100101 (LSB:MSB) | |
assign n436 = \pins[3] ; | |
assign \pins[3] = n376 ? n437 : 1'bz; | |
// RAM TILE 19 9 | |
SB_RAM40_4K #( | |
.READ_MODE(0), | |
.WRITE_MODE(0), | |
.INIT_0(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_1(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_2(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_3(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_4(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_5(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_6(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_7(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_8(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_9(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_A(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_B(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_C(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_D(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_E(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_F(256'h0000000000000000000000000000000000000000000000000000000000000000) | |
) ram40_19_9 ( | |
.WADDR({1'b0, 1'b0, 1'b0, n442, n499, n504, n510, n502, n506, n508, n446}), | |
.RADDR({1'b0, 1'b0, 1'b0, n582, n699, n630, n631, n697, n701, n633, n628}), | |
.MASK({n634, n634, n634, n634, n634, n634, n634, n634, n634, n634, n634, n634, n634, n634, n634, n634}), | |
.WDATA({n332, n333, n350, n385, n390, n355, n354, n387, n335, n384, n334, n331, n392, n391, n314, n313}), | |
.RDATA({n667, n668, n669, n670, n671, n672, n673, n674, n676, n675, n677, n629, n640, n520, n573, n574}), | |
.WE(n6), | |
.WCLKE(n512), | |
.WCLK(pin_23), | |
.RE(n6), | |
.RCLKE(n6), | |
.RCLK(pin_23) | |
); | |
// RAM TILE 19 11 | |
SB_RAM40_4K #( | |
.READ_MODE(0), | |
.WRITE_MODE(0), | |
.INIT_0(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_1(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_2(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_3(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_4(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_5(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_6(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_7(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_8(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_9(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_A(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_B(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_C(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_D(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_E(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_F(256'h0000000000000000000000000000000000000000000000000000000000000000) | |
) ram40_19_11 ( | |
.WADDR({1'b0, 1'b0, 1'b0, n335, n384, n334, n331, n392, n391, n314, n313}), | |
.RADDR({1'b0, 1'b0, 1'b0, n335, n384, n334, n331, n392, n391, n314, n313}), | |
.MASK({n646, n646, n646, n646, n646, n646, n646, n646, n646, n646, n646, n646, n646, n646, n646, n646}), | |
.WDATA({n419, n463, n532, n584, n537, n66, n522, n596, n270, n389, n447, n379, n378, n107, n86, n100}), | |
.RDATA({n679, n601, n602, n595, n680, n213, n681, n682, n583, n684, n685, n521, n523, n545, n160, n371}), | |
.WE(n6), | |
.WCLKE(n280), | |
.WCLK(pin_23), | |
.RE(n6), | |
.RCLKE(n6), | |
.RCLK(pin_23) | |
); | |
// RAM TILE 6 13 | |
SB_RAM40_4K #( | |
.READ_MODE(0), | |
.WRITE_MODE(0), | |
.INIT_0(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_1(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_2(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_3(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_4(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_5(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_6(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_7(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_8(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_9(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_A(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_B(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_C(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_D(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_E(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_F(256'h0000000000000000000000000000000000000000000000000000000000000000) | |
) ram40_6_13 ( | |
.WADDR({1'b0, 1'b0, 1'b0, n46, n45, n44, n43, n42, n41, n31, n38}), | |
.RADDR({1'b0, 1'b0, 1'b0, n52, n91, n97, n92, n98, n67, n99, n68}), | |
.MASK({n37, n37, n37, n37, n37, n37, n37, n37, n37, n37, n37, n37, n37, n37, n37, n37}), | |
.WDATA({n49, n84, n50, n48, n51, n59, n96, n28, n18, n26, n27, n47, n95, n93, n94, n72}), | |
.RDATA({n56, n70, n29, n69, n53, n54, n71, n55, n79, n80, n81, n82, n83, n57, n58, n30}), | |
.WE(n6), | |
.WCLKE(n65), | |
.WCLK(pin_23), | |
.RE(n6), | |
.RCLKE(n6), | |
.RCLK(pin_23) | |
); | |
// RAM TILE 19 15 | |
SB_RAM40_4K #( | |
.READ_MODE(0), | |
.WRITE_MODE(0), | |
.INIT_0(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_1(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_2(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_3(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_4(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_5(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_6(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_7(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_8(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_9(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_A(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_B(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_C(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_D(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_E(256'h0000000000000000000000000000000000000000000000000000000000000000), | |
.INIT_F(256'h0000000000000000000000000000000000000000000000000000000000000000) | |
) ram40_19_15 ( | |
.WADDR({1'b0, 1'b0, 1'b0, n550, n619, n486, n614, n616, n561, n553, n609}), | |
.RADDR({1'b0, 1'b0, 1'b0, n715, n664, n662, n661, n665, n713, n666, n716}), | |
.MASK({n472, n472, n472, n472, n472, n472, n472, n472, n472, n472, n472, n472, n472, n472, n472, n472}), | |
.WDATA({n714, n712, n604, n597, n600, n473, n711, n599, n482, n373, n483, n480, n434, n367, n430, n428}), | |
.RDATA({n688, n689, n687, n692, n686, n693, n694, n695, n477, n479, n560, n548, n478, n605, n611, n691}), | |
.WE(n6), | |
.WCLKE(n663), | |
.WCLK(pin_23), | |
.RE(n6), | |
.RCLKE(n6), | |
.RCLK(pin_23) | |
); | |
assign n764 = /* LUT 16 6 0 */ 1'b0; | |
assign n815 = /* LUT 16 16 1 */ 1'b0; | |
assign n834 = /* LUT 5 13 1 */ 1'b0; | |
assign n869 = /* LUT 3 11 1 */ 1'b0; | |
assign n893 = /* LUT 16 16 0 */ 1'b0; | |
assign n897 = /* LUT 10 16 1 */ 1'b0; | |
assign n911 = /* LUT 5 13 0 */ 1'b0; | |
assign n943 = /* LUT 3 11 0 */ 1'b0; | |
assign n973 = /* LUT 10 16 0 */ 1'b0; | |
assign n999 = /* LUT 9 7 1 */ 1'b0; | |
assign n1052 = /* LUT 13 10 0 */ 1'b0; | |
assign n1076 = /* LUT 9 7 0 */ 1'b0; | |
assign n1127 = /* LUT 12 10 0 */ 1'b0; | |
assign n1297 = /* LUT 16 6 1 */ 1'b0; | |
assign n728 = /* LUT 18 11 6 */ !n280; | |
assign n729 = /* LUT 13 12 5 */ (n363 ? (n169 ? 1'b0 : (n379 ? n106 : 1'b0)) : (n169 ? 1'b1 : (n379 ? n106 : 1'b0))); | |
assign n730 = /* LUT 16 16 2 */ (n620 ? (n618 ? n474 : !n474) : (n618 ? !n474 : n474)); | |
assign n731 = /* LUT 16 7 3 */ (n372 ? n500 : n491); | |
assign n732 = /* LUT 7 12 4 */ (n65 ? (n40 ? 1'b1 : n38) : n40); | |
assign n733 = /* LUT 10 16 7 */ (n242 ? !n154 : n154); | |
assign n734 = /* LUT 13 10 4 */ (n395 ? (n392 ? n281 : !n281) : (n392 ? !n281 : n281)); | |
assign n735 = /* LUT 15 13 0 */ (n357 ? 1'b0 : (n468 ? 1'b0 : (n467 ? 1'b0 : !n452))); | |
assign n736 = /* LUT 10 11 6 */ n143; | |
assign n737 = /* LUT 18 12 0 */ (n463 ? (n106 ? 1'b0 : !n656) : !n656); | |
assign n738 = /* LUT 16 8 7 */ (n120 ? (n509 ? (n372 ? 1'b1 : !n498) : (n372 ? 1'b0 : n498)) : (n509 ? (n372 ? 1'b1 : n498) : (n372 ? 1'b0 : !n498))); | |
assign n739 = /* LUT 14 12 4 */ (n316 ? (n127 ? (n125 ? 1'b0 : !n317) : (n125 ? n317 : 1'b1)) : (n127 ? !n317 : 1'b1)); | |
assign n740 = /* LUT 11 13 4 */ (n56 ? 1'b0 : (n155 ? (n205 ? !n124 : 1'b0) : !n124)); | |
assign n741 = /* LUT 12 12 1 */ (n252 ? (n310 ? n124 : (n124 ? n147 : 1'b0)) : (n310 ? (n124 ? !n147 : 1'b0) : 1'b0)); | |
assign n742 = /* LUT 14 11 7 */ !n268; | |
assign n743 = /* LUT 20 9 7 */ (n506 ? !n1 : 1'b0); | |
assign n744 = /* LUT 10 12 0 */ (n70 ? (n71 ? (n56 ? !n29 : 1'b0) : 1'b0) : (n71 ? (n56 ? 1'b1 : !n29) : 1'b0)); | |
assign n745 = /* LUT 11 15 5 */ (n177 ? (n159 ? 1'b1 : n297) : (n159 ? 1'b0 : n297)); | |
assign n746 = /* LUT 7 13 3 */ n93; | |
assign n747 = /* LUT 16 11 3 */ (n128 ? (n315 ? 1'b1 : (n453 ? n535 : 1'b1)) : !n453); | |
assign n748 = /* LUT 14 9 2 */ (n161 ? (n170 ? !n266 : 1'b1) : 1'b0); | |
assign n749 = /* LUT 7 11 3 */ n36; | |
assign n750 = /* LUT 17 14 6 */ (n369 ? 1'b0 : !n337); | |
assign n751 = /* LUT 12 15 5 */ (n295 ? (n226 ? 1'b1 : !n177) : (n226 ? n69 : !n177)); | |
assign n752 = /* LUT 18 9 5 */ n350; | |
assign n753 = /* LUT 21 11 0 */ n537; | |
assign n754 = /* LUT 12 9 4 */ (n170 ? 1'b0 : (n127 ? (n244 ? 1'b0 : !n266) : !n244)); | |
assign n755 = /* LUT 14 10 0 */ (n289 ? n378 : 1'b0); | |
assign n756 = /* LUT 7 14 7 */ n50; | |
assign n757 = /* LUT 17 9 0 */ (n574 ? (n569 ? n575 : 1'b1) : (n569 ? n575 : 1'b0)); | |
assign n758 = /* LUT 15 15 1 */ (n369 ? n129 : !n145); | |
assign n759 = /* LUT 10 9 5 */ n140; | |
assign n760 = /* LUT 18 10 1 */ n385; | |
assign n761 = /* LUT 13 13 6 */ (n153 ? 1'b0 : (n125 ? n66 : 1'b0)); | |
assign n762 = /* LUT 11 9 1 */ (n127 ? (n163 ? 1'b0 : (n248 ? !n125 : 1'b1)) : (n163 ? 1'b1 : (n248 ? !n125 : 1'b1))); | |
assign n766 = /* LUT 13 11 3 */ (n407 ? (n355 ? n341 : !n341) : (n355 ? !n341 : n341)); | |
assign n767 = /* LUT 20 11 2 */ n719; | |
assign n768 = /* LUT 18 15 1 */ (n614 ? !n1 : 1'b0); | |
assign n769 = /* LUT 5 13 6 */ (n77 ? !n45 : n45); | |
assign n770 = /* LUT 16 13 6 */ (n318 ? (n127 ? (n125 ? 1'b0 : !n337) : (n125 ? n337 : 1'b1)) : (n127 ? !n337 : 1'b1)); | |
assign n771 = /* LUT 14 15 5 */ n434; | |
assign n772 = /* LUT 11 10 5 */ (n147 ? (n124 ? n246 : 1'b0) : (n124 ? n258 : 1'b0)); | |
assign n773 = /* LUT 17 12 5 */ n598; | |
assign n774 = /* LUT 15 10 4 */ (n443 ? 1'b0 : !n514); | |
assign n775 = /* LUT 5 11 3 */ n66; | |
assign n776 = /* LUT 10 15 1 */ (n178 ? (n130 ? 1'b1 : !n159) : (n130 ? n159 : 1'b0)); | |
assign n777 = /* LUT 11 12 4 */ (n106 ? 1'b0 : !n169); | |
assign n778 = /* LUT 16 10 0 */ (n527 ? (n144 ? n531 : 1'b0) : (n144 ? n531 : 1'b1)); | |
assign n779 = /* LUT 12 11 7 */ (n348 ? (n214 ? n257 : !n257) : (n214 ? !n257 : n257)); | |
assign n780 = /* LUT 3 10 5 */ (n11 ? (n13 ? (n7 ? n12 : 1'b0) : 1'b0) : 1'b0); | |
assign n781 = /* LUT 15 9 2 */ (n127 ? (n125 ? (n267 ? 1'b0 : !n203) : !n203) : (n125 ? (n267 ? n203 : 1'b1) : 1'b1)); | |
assign n782 = /* LUT 9 7 4 */ (n111 ? (n112 ? (n103 ? n113 : 1'b0) : 1'b0) : 1'b0); | |
assign n783 = /* LUT 12 14 6 */ (n300 ? n234 : 1'b0); | |
assign n784 = /* LUT 10 17 5 */ 1'b1; | |
assign n785 = /* LUT 10 14 6 */ (n123 ? (n58 ? !n226 : 1'b0) : !n226); | |
assign n786 = /* LUT 15 12 0 */ (n460 ? 1'b1 : (n56 ? (n403 ? 1'b1 : n70) : n403)); | |
assign n787 = /* LUT 13 9 4 */ (n309 ? (n181 ? (n148 ? 1'b1 : n303) : n148) : (n181 ? !n303 : (n148 ? !n303 : 1'b0))); | |
assign n788 = /* LUT 17 10 1 */ (n640 ? (n579 ? 1'b1 : !n569) : (n579 ? n569 : 1'b0)); | |
assign n789 = /* LUT 13 14 7 */ (n234 ? !n431 : 1'b0); | |
assign n790 = /* LUT 16 15 5 */ n553; | |
assign n791 = /* LUT 14 13 4 */ (n466 ? (n429 ? (n425 ? n424 : 1'b0) : 1'b0) : 1'b0); | |
assign n792 = /* LUT 20 12 5 */ n354; | |
assign n793 = /* LUT 13 12 2 */ (n66 ? n289 : 1'b0); | |
assign n794 = /* LUT 20 10 1 */ n355; | |
assign n795 = /* LUT 10 13 0 */ n52; | |
assign n796 = /* LUT 11 14 7 */ (n227 ? !n6 : n6); | |
assign n797 = /* LUT 5 14 7 */ n59; | |
assign n798 = /* LUT 16 12 1 */ (n214 ? (n415 ? 1'b0 : (n170 ? 1'b0 : n161)) : (n415 ? (n170 ? n161 : 1'b0) : n161)); | |
assign n799 = /* LUT 14 14 2 */ (n163 ? (n423 ? !n303 : 1'b0) : 1'b0); | |
assign n800 = /* LUT 17 11 6 */ (n537 ? (n106 ? 1'b0 : !n647) : !n647); | |
assign n801 = /* LUT 11 11 6 */ (n199 ? 1'b0 : (n69 ? !n56 : 1'b1)); | |
assign n802 = /* LUT 15 13 7 */ (n452 ? 1'b0 : !n467); | |
assign n803 = /* LUT 17 13 6 */ (n369 ? 1'b0 : !n302); | |
assign n804 = /* LUT 15 11 7 */ (n336 ? (n338 ? (n148 ? 1'b1 : n181) : 1'b0) : (n338 ? n148 : (n148 ? 1'b1 : n181))); | |
assign n805 = /* LUT 17 16 5 */ n561; | |
assign n806 = /* LUT 20 15 1 */ (n214 ? 1'b0 : !n369); | |
assign n807 = /* LUT 11 13 3 */ (n191 ? 1'b0 : (n30 ? !n56 : 1'b1)); | |
assign n808 = /* LUT 12 10 4 */ (n323 ? (n145 ? n259 : !n259) : (n145 ? !n259 : n259)); | |
assign n809 = /* LUT 14 11 0 */ (n147 ? (n124 ? n264 : 1'b0) : (n124 ? n329 : 1'b0)); | |
assign n810 = /* LUT 3 11 6 */ (n24 ? !n15 : n15); | |
assign n811 = /* LUT 15 14 3 */ (n369 ? 1'b0 : !n153); | |
assign n812 = /* LUT 12 13 7 */ (n285 ? (n287 ? 1'b1 : (n170 ? 1'b1 : !n283)) : 1'b0); | |
assign n813 = /* LUT 18 11 7 */ (n678 ? 1'b0 : (n584 ? !n106 : 1'b1)); | |
assign n816 = /* LUT 14 2 2 */ n379; | |
assign n817 = /* LUT 4 10 4 */ (n19 ? !n6 : n6); | |
assign n818 = /* LUT 16 7 0 */ (n372 ? n503 : n494); | |
assign n819 = /* LUT 7 12 5 */ !n31; | |
assign n820 = /* LUT 10 16 6 */ (n241 ? !n172 : n172); | |
assign n821 = /* LUT 13 10 5 */ (n396 ? (n259 ? n331 : !n331) : (n259 ? !n331 : n331)); | |
assign n822 = /* LUT 18 12 3 */ (n144 ? n658 : !n534); | |
assign n823 = /* LUT 16 8 6 */ n510; | |
assign n824 = /* LUT 14 10 7 */ (n124 ? (n312 ? (n254 ? 1'b1 : !n147) : (n254 ? n147 : 1'b0)) : 1'b0); | |
assign n825 = /* LUT 14 12 7 */ (n414 ? (n214 ? n170 : 1'b0) : (n214 ? (n417 ? 1'b1 : n170) : (n417 ? !n170 : 1'b0))); | |
assign n826 = /* LUT 12 12 0 */ (n179 ? !n127 : (n125 ? !n319 : 1'b1)); | |
assign n827 = /* LUT 13 13 1 */ (n371 ? (n364 ? 1'b0 : !n162) : (n364 ? n162 : 1'b1)); | |
assign n828 = /* LUT 20 9 0 */ (n676 ? (n569 ? n698 : 1'b1) : (n569 ? n698 : 1'b0)); | |
assign n829 = /* LUT 10 12 3 */ (n54 ? (n121 ? 1'b0 : (n149 ? 1'b0 : n126)) : 1'b0); | |
assign n830 = /* LUT 7 13 2 */ n96; | |
assign n831 = /* LUT 16 11 0 */ (n127 ? (n125 ? (n339 ? 1'b0 : !n278) : !n339) : (n125 ? (n339 ? 1'b1 : !n278) : 1'b1)); | |
assign n832 = /* LUT 14 9 3 */ (n382 ? n380 : (n380 ? (n383 ? n170 : 1'b1) : 1'b0)); | |
assign n835 = /* LUT 18 9 2 */ (n1 ? 1'b0 : n504); | |
assign n836 = /* LUT 11 10 2 */ (n170 ? n190 : (n192 ? n190 : (n189 ? 1'b0 : n190))); | |
assign n837 = /* LUT 21 11 7 */ n419; | |
assign n838 = /* LUT 12 9 5 */ (n309 ? (n6 ? n303 : !n303) : (n6 ? !n303 : n303)); | |
assign n839 = /* LUT 17 9 3 */ n391; | |
assign n840 = /* LUT 15 15 0 */ (n481 ? (n470 ? 1'b0 : !n477) : (n470 ? 1'b1 : !n477)); | |
assign n841 = /* LUT 10 9 2 */ (n9 ? 1'b1 : !n64); | |
assign n842 = /* LUT 18 10 0 */ (n635 ? (n569 ? 1'b1 : n670) : (n569 ? 1'b0 : n670)); | |
assign n843 = /* LUT 12 14 1 */ (n231 ? (n226 ? (n69 ? 1'b1 : n303) : 1'b0) : (n226 ? (n69 ? 1'b1 : n303) : 1'b1)); | |
assign n844 = /* LUT 9 7 3 */ (n136 ? !n112 : n112); | |
assign n845 = /* LUT 16 6 3 */ (n564 ? (n496 ? n500 : !n500) : (n496 ? !n500 : n500)); | |
assign n846 = /* LUT 13 11 2 */ (n406 ? (n338 ? n354 : !n354) : (n338 ? !n354 : n354)); | |
assign n847 = /* LUT 20 11 3 */ (n162 ? !n679 : !n705); | |
assign n848 = /* LUT 10 10 0 */ (n139 ? 1'b0 : (n146 ? !n141 : (n141 ? n137 : 1'b1))); | |
assign n849 = /* LUT 18 15 2 */ (n486 ? !n1 : 1'b0); | |
assign n850 = /* LUT 10 7 7 */ (n134 ? n64 : (n64 ? 1'b1 : n133)); | |
assign n851 = /* LUT 16 13 7 */ n302; | |
assign n852 = /* LUT 17 12 2 */ (n650 ? (n144 ? 1'b1 : !n457) : (n144 ? 1'b0 : !n457)); | |
assign n853 = /* LUT 15 10 5 */ (n514 ? 1'b0 : (n116 ? 1'b0 : (n443 ? 1'b0 : !n455))); | |
assign n854 = /* LUT 13 14 0 */ (n234 ? !n363 : 1'b0); | |
assign n855 = /* LUT 11 12 5 */ (n144 ? n210 : !n209); | |
assign n856 = /* LUT 12 11 4 */ (n345 ? (n279 ? n340 : !n340) : (n279 ? !n340 : n340)); | |
assign n857 = /* LUT 16 10 3 */ (n289 ? n584 : 1'b0); | |
assign n858 = /* LUT 9 12 2 */ (n70 ? (n54 ? (n56 ? !n29 : 1'b0) : 1'b0) : (n54 ? (n56 ? 1'b1 : !n29) : 1'b0)); | |
assign n859 = /* LUT 17 15 0 */ (n561 ? 1'b0 : (n486 ? 1'b0 : (n610 ? !n609 : 1'b0))); | |
assign n860 = /* LUT 15 9 1 */ !n266; | |
assign n861 = /* LUT 18 8 1 */ (n1 ? 1'b0 : n446); | |
assign n862 = /* LUT 11 11 1 */ (n147 ? (n124 ? !n261 : 1'b0) : (n124 ? !n215 : 1'b0)); | |
assign n863 = /* LUT 13 15 7 */ (n295 ? (n177 ? n369 : 1'b0) : (n177 ? 1'b1 : !n369)); | |
assign n864 = /* LUT 17 16 2 */ n616; | |
assign n865 = /* LUT 10 14 5 */ (n159 ? n129 : n232); | |
assign n866 = /* LUT 15 12 1 */ (n128 ? (n458 ? 1'b1 : (n536 ? !n275 : 1'b1)) : !n275); | |
assign n867 = /* LUT 17 10 2 */ (n583 ? (n162 ? n144 : (n144 ? n581 : 1'b0)) : (n162 ? 1'b0 : (n144 ? n581 : 1'b0))); | |
assign n870 = /* LUT 16 15 2 */ (n472 ? n551 : n559); | |
assign n871 = /* LUT 14 13 5 */ (n336 ? (n153 ? (n302 ? n339 : 1'b0) : 1'b0) : 1'b0); | |
assign n872 = /* LUT 12 13 0 */ (n284 ? (n170 ? 1'b1 : (n277 ? 1'b1 : !n271)) : 1'b0); | |
assign n873 = /* LUT 20 12 4 */ n390; | |
assign n874 = /* LUT 13 12 3 */ (n147 ? (n124 ? n265 : 1'b0) : (n124 ? n349 : 1'b0)); | |
assign n875 = /* LUT 10 13 1 */ (n126 ? (n54 ? 1'b0 : (n55 ? n149 : 1'b0)) : 1'b0); | |
assign n876 = /* LUT 11 14 4 */ (n226 ? (n235 ? (n69 ? 1'b1 : n163) : (n69 ? 1'b0 : n163)) : 1'b1); | |
assign n877 = /* LUT 16 12 0 */ (n289 ? n596 : 1'b0); | |
assign n878 = /* LUT 17 11 5 */ (n595 ? (n162 ? 1'b0 : !n580) : (n162 ? 1'b1 : !n580)); | |
assign n879 = /* LUT 15 13 6 */ (n162 ? (n545 ? n144 : 1'b0) : (n475 ? n144 : 1'b0)); | |
assign n880 = /* LUT 4 13 0 */ n27; | |
assign n881 = /* LUT 17 13 1 */ !n317; | |
assign n882 = /* LUT 15 11 6 */ (n289 ? n522 : 1'b0); | |
assign n883 = /* LUT 5 12 3 */ (n38 ? !n6 : n6); | |
assign n884 = /* LUT 20 15 6 */ (n1 ? 1'b0 : n550); | |
assign n885 = /* LUT 11 13 2 */ (n53 ? 1'b0 : (n149 ? n55 : 1'b0)); | |
assign n886 = /* LUT 12 12 7 */ (n148 ? (n179 ? n319 : 1'b1) : (n179 ? (n181 ? n319 : 1'b0) : (n181 ? !n319 : 1'b0))); | |
assign n887 = /* LUT 12 10 7 */ (n326 ? (n306 ? n266 : !n266) : (n306 ? !n266 : n266)); | |
assign n888 = /* LUT 14 11 1 */ (n128 ? (n404 ? (n402 ? n381 : 1'b1) : 1'b1) : !n402); | |
assign n889 = /* LUT 9 13 1 */ (n70 ? !n56 : (n56 ? 1'b0 : n29)); | |
assign n890 = /* LUT 15 14 0 */ (n29 ? 1'b0 : !n70); | |
assign n891 = /* LUT 18 11 0 */ n596; | |
assign n895 = /* LUT 16 7 1 */ n502; | |
assign n898 = /* LUT 13 10 6 */ (n397 ? (n267 ? n334 : !n334) : (n267 ? !n334 : n334)); | |
assign n899 = /* LUT 18 12 2 */ n387; | |
assign n900 = /* LUT 16 8 5 */ n446; | |
assign n901 = /* LUT 16 14 1 */ n367; | |
assign n902 = /* LUT 14 12 6 */ (n463 ? (n118 ? (n126 ? !n150 : 1'b0) : !n150) : 1'b0); | |
assign n903 = /* LUT 13 13 0 */ (n286 ? !n144 : 1'b0); | |
assign n904 = /* LUT 11 9 7 */ (n180 ? (n182 ? n183 : (n170 ? n183 : 1'b0)) : n183); | |
assign n905 = /* LUT 20 9 1 */ (n502 ? !n1 : 1'b0); | |
assign n906 = /* LUT 10 12 2 */ (n121 ? 1'b0 : !n149); | |
assign n907 = /* LUT 11 15 7 */ (n123 ? n83 : (n236 ? 1'b1 : !n296)); | |
assign n908 = /* LUT 7 13 1 */ n72; | |
assign n909 = /* LUT 16 11 1 */ (n128 ? (n122 ? (n449 ? 1'b1 : !n589) : 1'b1) : !n122); | |
assign n913 = /* LUT 18 9 3 */ (n510 ? !n1 : 1'b0); | |
assign n914 = /* LUT 21 1 6 */ MOSI; | |
assign n915 = /* LUT 11 10 3 */ (n259 ? (n127 ? (n145 ? 1'b0 : !n125) : (n145 ? 1'b1 : !n125)) : (n127 ? !n145 : 1'b1)); | |
assign n916 = /* LUT 12 9 6 */ (n181 ? (n266 ? n306 : (n306 ? n148 : 1'b1)) : (n266 ? (n306 ? n148 : 1'b0) : n148)); | |
assign n917 = /* LUT 17 9 2 */ n314; | |
assign n918 = /* LUT 18 10 7 */ (n671 ? (n569 ? n637 : 1'b1) : (n569 ? n637 : 1'b0)); | |
assign n919 = /* LUT 3 10 3 */ (n8 ? !n10 : 1'b1); | |
assign n920 = /* LUT 12 14 0 */ (n123 ? n82 : (n294 ? n365 : 1'b1)); | |
assign n921 = /* LUT 9 7 2 */ (n135 ? !n111 : n111); | |
assign n922 = /* LUT 16 6 2 */ (n563 ? (n501 ? n496 : !n496) : (n501 ? !n496 : n496)); | |
assign n923 = /* LUT 13 11 1 */ (n405 ? (n387 ? n255 : !n255) : (n387 ? !n255 : n255)); | |
assign n924 = /* LUT 20 11 0 */ n643; | |
assign n925 = /* LUT 10 10 7 */ (n138 ? !n144 : 1'b0); | |
assign n926 = /* LUT 18 15 3 */ !n472; | |
assign n927 = /* LUT 16 13 0 */ (n170 ? n541 : (n543 ? (n465 ? n541 : 1'b0) : n541)); | |
assign n928 = /* LUT 14 15 7 */ (n470 ? (n234 ? n432 : 1'b0) : (n479 ? n234 : 1'b0)); | |
assign n929 = /* LUT 15 10 2 */ (n401 ? !n144 : 1'b0); | |
assign n930 = /* LUT 11 12 6 */ (n124 ? 1'b0 : (n54 ? !n56 : 1'b1)); | |
assign n931 = /* LUT 16 10 2 */ (n337 ? (n161 ? !n170 : 1'b0) : n161); | |
assign n932 = /* LUT 12 11 5 */ (n346 ? (n337 ? n318 : !n318) : (n337 ? !n318 : n318)); | |
assign n933 = /* LUT 17 15 7 */ (n550 ? 1'b0 : (n614 ? 1'b0 : (n616 ? 1'b0 : !n619))); | |
assign n934 = /* LUT 15 9 0 */ (n267 ? (n148 ? 1'b1 : (n181 ? n203 : 1'b0)) : (n148 ? !n203 : (n181 ? !n203 : 1'b0))); | |
assign n935 = /* LUT 5 14 1 */ n51; | |
assign n936 = /* LUT 11 11 0 */ (n144 ? n200 : !n211); | |
assign n937 = /* LUT 17 16 3 */ (n472 ? n615 : n555); | |
assign n938 = /* LUT 13 9 6 */ (n289 ? n100 : 1'b0); | |
assign n939 = /* LUT 10 14 4 */ (n227 ? n165 : !n165); | |
assign n940 = /* LUT 15 12 2 */ (n462 ? (n459 ? (n170 ? 1'b1 : n461) : 1'b0) : n459); | |
assign n941 = /* LUT 18 13 6 */ (n687 ? (n470 ? (n169 ? n655 : 1'b0) : n169) : (n470 ? (n169 ? n655 : 1'b0) : 1'b0)); | |
assign n945 = /* LUT 16 15 3 */ n550; | |
assign n946 = /* LUT 14 13 2 */ (n466 ? (n302 ? 1'b0 : n150) : 1'b0); | |
assign n947 = /* LUT 12 13 1 */ (n125 ? (n268 ? !n127 : !n281) : (n268 ? !n127 : 1'b1)); | |
assign n948 = /* LUT 20 12 3 */ n387; | |
assign n949 = /* LUT 13 12 0 */ (n412 ? (n257 ? n332 : !n332) : (n257 ? !n332 : n332)); | |
assign n950 = /* LUT 16 16 7 */ (n625 ? (n474 ? n551 : !n551) : (n474 ? !n551 : n551)); | |
assign n951 = /* LUT 20 10 3 */ n717; | |
assign n952 = /* LUT 10 13 6 */ (n56 ? 1'b0 : (n205 ? 1'b1 : !n155)); | |
assign n953 = /* LUT 11 14 5 */ (n169 ? !n235 : (n106 ? n86 : 1'b0)); | |
assign n954 = /* LUT 16 7 6 */ n504; | |
assign n955 = /* LUT 16 12 7 */ !n339; | |
assign n956 = /* LUT 14 14 0 */ (n303 ? (n369 ? n231 : 1'b0) : (n369 ? n231 : 1'b1)); | |
assign n957 = /* LUT 5 19 1 */ n86; | |
assign n958 = /* LUT 4 13 1 */ n47; | |
assign n959 = /* LUT 15 13 5 */ (n144 ? 1'b0 : n422); | |
assign n960 = /* LUT 17 11 4 */ n463; | |
assign n961 = /* LUT 15 11 1 */ (n451 ? (n448 ? (n454 ? 1'b1 : n170) : 1'b1) : 1'b0); | |
assign n962 = /* LUT 5 12 0 */ !n65; | |
assign n963 = /* LUT 20 15 7 */ (n1 ? 1'b0 : n609); | |
assign n964 = /* LUT 11 13 1 */ (n54 ? 1'b0 : n223); | |
assign n965 = /* LUT 12 12 6 */ (n147 ? (n124 ? n260 : 1'b0) : (n124 ? n328 : 1'b0)); | |
assign n966 = /* LUT 12 10 6 */ (n325 ? (n269 ? n295 : !n295) : (n269 ? !n295 : n295)); | |
assign n967 = /* LUT 14 11 2 */ (n56 ? (n388 ? 1'b0 : !n80) : !n388); | |
assign n968 = /* LUT 16 9 3 */ n488; | |
assign n969 = /* LUT 17 8 6 */ (n499 ? 1'b0 : (n510 ? 1'b0 : (n446 ? 1'b0 : !n442))); | |
assign n970 = /* LUT 18 11 1 */ (n684 ? (n162 ? n144 : (n144 ? n683 : 1'b0)) : (n162 ? 1'b0 : (n144 ? n683 : 1'b0))); | |
assign n971 = /* LUT 14 2 0 */ n378; | |
assign n975 = /* LUT 13 10 7 */ (n398 ? (n269 ? n384 : !n384) : (n269 ? !n384 : n384)); | |
assign n976 = /* LUT 18 12 5 */ (n682 ? (n651 ? 1'b0 : !n162) : (n651 ? n162 : 1'b1)); | |
assign n977 = /* LUT 16 8 4 */ (n497 ? (n495 ? 1'b1 : n372) : (n495 ? !n372 : 1'b0)); | |
assign n978 = /* LUT 14 10 5 */ !n302; | |
assign n979 = /* LUT 14 12 1 */ (n181 ? (n148 ? (n317 ? n316 : 1'b1) : (n317 ? n316 : !n316)) : (n148 ? (n317 ? n316 : 1'b1) : 1'b0)); | |
assign n980 = /* LUT 13 13 3 */ (n170 ? 1'b0 : (n361 ? 1'b0 : (n127 ? !n153 : 1'b1))); | |
assign n981 = /* LUT 11 9 6 */ (n170 ? (n179 ? 1'b0 : n161) : n161); | |
assign n982 = /* LUT 20 9 2 */ n384; | |
assign n983 = /* LUT 10 12 5 */ (n56 ? (n53 ? 1'b0 : (n29 ? !n70 : 1'b1)) : (n53 ? 1'b0 : (n29 ? 1'b0 : !n70))); | |
assign n984 = /* LUT 16 6 5 */ (n566 ? (n496 ? n505 : !n505) : (n496 ? !n505 : n505)); | |
assign n985 = /* LUT 7 13 0 */ n94; | |
assign n986 = /* LUT 16 11 6 */ (n289 ? n537 : 1'b0); | |
assign n987 = /* LUT 14 9 1 */ !n163; | |
assign n988 = /* LUT 5 13 3 */ (n74 ? !n42 : n42); | |
assign n989 = /* LUT 10 7 1 */ n133; | |
assign n990 = /* LUT 18 9 0 */ (n639 ? (n675 ? 1'b1 : n569) : (n675 ? !n569 : 1'b0)); | |
assign n991 = /* LUT 20 14 4 */ n428; | |
assign n992 = /* LUT 11 10 0 */ (n204 ? (n251 ? n124 : (n124 ? !n147 : 1'b0)) : (n251 ? (n124 ? n147 : 1'b0) : 1'b0)); | |
assign n993 = /* LUT 12 9 7 */ (n247 ? (n256 ? !n243 : 1'b0) : (n245 ? n256 : (n256 ? !n243 : 1'b0))); | |
assign n994 = /* LUT 17 9 5 */ (n520 ? (n577 ? 1'b1 : !n569) : (n577 ? n569 : 1'b0)); | |
assign n995 = /* LUT 15 15 2 */ n482; | |
assign n996 = /* LUT 18 10 6 */ (n569 ? n638 : n668); | |
assign n997 = /* LUT 3 10 0 */ !n7; | |
assign n1000 = /* LUT 13 11 0 */ (n399 ? (n335 ? n306 : !n306) : (n335 ? !n306 : n306)); | |
assign n1001 = /* LUT 20 11 1 */ (n522 ? (n706 ? 1'b0 : !n106) : !n706); | |
assign n1002 = /* LUT 18 15 4 */ n663; | |
assign n1003 = /* LUT 16 13 1 */ (n542 ? (n128 ? (n539 ? 1'b1 : !n421) : !n421) : (n128 ? 1'b1 : !n421)); | |
assign n1004 = /* LUT 14 15 0 */ (n485 ? 1'b0 : n234); | |
assign n1005 = /* LUT 17 12 0 */ (n162 ? !n601 : !n592); | |
assign n1006 = /* LUT 15 10 3 */ !n145; | |
assign n1007 = /* LUT 10 15 4 */ (n176 ? (n159 ? 1'b1 : n233) : (n159 ? 1'b0 : n233)); | |
assign n1008 = /* LUT 11 12 7 */ (n55 ? 1'b0 : (n126 ? (n149 ? n54 : 1'b0) : 1'b0)); | |
assign n1009 = /* LUT 12 11 2 */ (n343 ? (n153 ? n341 : !n341) : (n153 ? !n341 : n341)); | |
assign n1010 = /* LUT 16 10 5 */ n270; | |
assign n1011 = /* LUT 9 12 0 */ (n53 ? (n54 ? n123 : 1'b1) : (n54 ? 1'b1 : n123)); | |
assign n1012 = /* LUT 17 15 6 */ (n472 ? n612 : n608); | |
assign n1013 = /* LUT 7 10 4 */ (n35 ? !n64 : 1'b0); | |
assign n1014 = /* LUT 11 11 3 */ (n262 ? (n217 ? n124 : (n147 ? n124 : 1'b0)) : (n217 ? (n147 ? 1'b0 : n124) : 1'b0)); | |
assign n1015 = /* LUT 17 16 0 */ n614; | |
assign n1016 = /* LUT 13 9 1 */ (n86 ? n289 : 1'b0); | |
assign n1017 = /* LUT 10 14 3 */ n99; | |
assign n1018 = /* LUT 15 12 3 */ (n336 ? (n170 ? 1'b0 : n161) : n161); | |
assign n1019 = /* LUT 17 10 4 */ n392; | |
assign n1020 = /* LUT 18 13 7 */ n333; | |
assign n1021 = /* LUT 3 11 3 */ (n21 ? !n12 : n12); | |
assign n1022 = /* LUT 16 15 0 */ (n549 ? (n472 ? 1'b1 : n557) : (n472 ? 1'b0 : n557)); | |
assign n1023 = /* LUT 7 20 5 */ n107; | |
assign n1024 = /* LUT 14 13 3 */ (n214 ? (n279 ? (n337 ? n317 : 1'b0) : 1'b0) : 1'b0); | |
assign n1025 = /* LUT 12 13 2 */ (n268 ? (n170 ? 1'b0 : n161) : n161); | |
assign n1026 = /* LUT 20 12 2 */ n385; | |
assign n1027 = /* LUT 13 12 1 */ !n337; | |
assign n1028 = /* LUT 16 16 6 */ (n624 ? (n617 ? n474 : !n474) : (n617 ? !n474 : n474)); | |
assign n1029 = /* LUT 20 10 2 */ (n703 ? (n162 ? !n685 : 1'b0) : (n162 ? !n685 : 1'b1)); | |
assign n1030 = /* LUT 10 13 7 */ (n205 ? 1'b0 : n158); | |
assign n1031 = /* LUT 11 14 2 */ (n123 ? !n57 : (n228 ? n293 : 1'b1)); | |
assign n1032 = /* LUT 16 7 7 */ (n372 ? n501 : n490); | |
assign n1033 = /* LUT 16 12 6 */ (n544 ? 1'b0 : (n106 ? !n596 : 1'b1)); | |
assign n1034 = /* LUT 17 11 3 */ (n144 ? n644 : !n526); | |
assign n1035 = /* LUT 15 13 4 */ (n444 ? (n145 ? (n464 ? n203 : 1'b0) : 1'b0) : 1'b0); | |
assign n1036 = /* LUT 4 13 2 */ n18; | |
assign n1037 = /* LUT 12 3 1 */ n301; | |
assign n1038 = /* LUT 17 13 3 */ n532; | |
assign n1039 = /* LUT 15 11 0 */ (n125 ? (n127 ? (n338 ? 1'b0 : !n336) : (n338 ? n336 : 1'b1)) : (n127 ? !n336 : 1'b1)); | |
assign n1040 = /* LUT 11 13 0 */ (n56 ? (n187 ? 1'b0 : !n57) : !n187); | |
assign n1041 = /* LUT 12 12 5 */ (n56 ? (n276 ? 1'b0 : !n55) : !n276); | |
assign n1042 = /* LUT 7 19 2 */ n107; | |
assign n1043 = /* LUT 16 9 4 */ (n372 ? !n120 : n120); | |
assign n1044 = /* LUT 14 11 3 */ (n124 ? (n330 ? (n216 ? 1'b1 : !n147) : (n216 ? n147 : 1'b0)) : 1'b0); | |
assign n1045 = /* LUT 12 10 1 */ (n320 ? (n248 ? n163 : !n163) : (n248 ? !n163 : n163)); | |
assign n1046 = /* LUT 18 11 2 */ (n649 ? (n681 ? 1'b0 : n162) : (n681 ? !n162 : 1'b1)); | |
assign n1047 = /* LUT 12 15 1 */ (n69 ? (n226 ? 1'b1 : !n176) : (n226 ? n268 : !n176)); | |
assign n1048 = /* LUT 15 7 0 */ n436; | |
assign n1049 = /* LUT 10 16 3 */ (n238 ? !n173 : n173); | |
assign n1050 = /* LUT 9 8 7 */ (n113 ? !n6 : n6); | |
assign n1054 = /* LUT 10 11 2 */ (n124 ? 1'b0 : (n79 ? !n56 : 1'b1)); | |
assign n1055 = /* LUT 18 12 4 */ n645; | |
assign n1056 = /* LUT 16 8 3 */ n442; | |
assign n1057 = /* LUT 14 10 4 */ (n253 ? (n124 ? (n147 ? 1'b1 : n311) : 1'b0) : (n124 ? (n147 ? 1'b0 : n311) : 1'b0)); | |
assign n1058 = /* LUT 14 12 0 */ (n257 ? (n125 ? !n214 : 1'b0) : 1'b0); | |
assign n1059 = /* LUT 13 13 2 */ (n362 ? (n144 ? n358 : 1'b0) : (n144 ? n358 : 1'b1)); | |
assign n1060 = /* LUT 20 9 3 */ n335; | |
assign n1061 = /* LUT 10 12 4 */ (n149 ? 1'b0 : (n117 ? 1'b0 : !n56)); | |
assign n1062 = /* LUT 16 6 4 */ (n565 ? (n507 ? n496 : !n496) : (n507 ? !n496 : n496)); | |
assign n1063 = /* LUT 16 11 7 */ (n279 ? (n161 ? !n170 : 1'b0) : n161); | |
assign n1064 = /* LUT 14 9 6 */ (n181 ? (n295 ? n269 : (n269 ? n148 : 1'b1)) : (n295 ? (n269 ? n148 : 1'b0) : n148)); | |
assign n1065 = /* LUT 20 11 6 */ (n674 ? (n569 ? n648 : 1'b1) : (n569 ? n648 : 1'b0)); | |
assign n1066 = /* LUT 5 13 2 */ (n73 ? !n41 : n41); | |
assign n1067 = /* LUT 18 9 1 */ (n569 ? n632 : n669); | |
assign n1068 = /* LUT 11 10 1 */ (n202 ? (n147 ? (n250 ? n124 : 1'b0) : n124) : (n147 ? (n250 ? n124 : 1'b0) : 1'b0)); | |
assign n1069 = /* LUT 12 9 0 */ (n170 ? (n161 ? !n302 : 1'b0) : n161); | |
assign n1070 = /* LUT 17 9 4 */ n331; | |
assign n1071 = /* LUT 15 15 5 */ (n369 ? n131 : !n266); | |
assign n1072 = /* LUT 18 10 5 */ n333; | |
assign n1073 = /* LUT 3 10 1 */ (n16 ? (n15 ? (n19 ? n14 : 1'b0) : 1'b0) : 1'b0); | |
assign n1074 = /* LUT 12 14 2 */ (n169 ? !n300 : (n106 ? n107 : 1'b0)); | |
assign n1078 = /* LUT 13 11 7 */ (n411 ? (n333 ? n316 : !n316) : (n333 ? !n316 : n316)); | |
assign n1079 = /* LUT 18 15 5 */ (n619 ? !n1 : 1'b0); | |
assign n1080 = /* LUT 16 13 2 */ (n161 ? (n317 ? !n170 : 1'b1) : 1'b0); | |
assign n1081 = /* LUT 14 15 1 */ n373; | |
assign n1082 = /* LUT 17 12 1 */ (n593 ? (n162 ? !n602 : 1'b0) : (n162 ? !n602 : 1'b1)); | |
assign n1083 = /* LUT 15 10 0 */ (n116 ? 1'b0 : !n455); | |
assign n1084 = /* LUT 13 14 3 */ (n169 ? !n431 : (n100 ? n106 : 1'b0)); | |
assign n1085 = /* LUT 10 15 5 */ n98; | |
assign n1086 = /* LUT 11 12 0 */ (n56 ? (n193 ? 1'b0 : !n58) : !n193); | |
assign n1087 = /* LUT 16 10 4 */ (n340 ? (n125 ? (n127 ? 1'b0 : n279) : (n127 ? !n279 : 1'b1)) : (n127 ? !n279 : 1'b1)); | |
assign n1088 = /* LUT 12 11 3 */ (n344 ? (n339 ? n278 : !n278) : (n339 ? !n278 : n278)); | |
assign n1089 = /* LUT 20 10 5 */ (n569 ? n636 : n673); | |
assign n1090 = /* LUT 9 12 1 */ (n121 ? (n71 ? n123 : 1'b1) : 1'b0); | |
assign n1091 = /* LUT 17 15 5 */ (n607 ? (n560 ? 1'b0 : !n470) : (n560 ? n470 : 1'b1)); | |
assign n1092 = /* LUT 15 9 6 */ (n440 ? (n439 ? n441 : (n170 ? n441 : 1'b0)) : n441); | |
assign n1093 = /* LUT 18 14 2 */ (n470 ? !n690 : !n691); | |
assign n1094 = /* LUT 5 14 3 */ n84; | |
assign n1095 = /* LUT 20 13 6 */ (n336 ? 1'b0 : !n369); | |
assign n1096 = /* LUT 11 11 2 */ (n150 ? 1'b1 : n143); | |
assign n1097 = /* LUT 13 15 4 */ (n234 ? !n433 : 1'b0); | |
assign n1098 = /* LUT 17 16 1 */ (n613 ? (n472 ? 1'b1 : n556) : (n472 ? 1'b0 : n556)); | |
assign n1099 = /* LUT 10 14 2 */ (n166 ? (n159 ? 1'b0 : n164) : (n159 ? 1'b1 : (n164 ? 1'b1 : n167))); | |
assign n1100 = /* LUT 15 12 4 */ (n469 ? (n128 ? (n161 ? !n418 : 1'b0) : 1'b0) : n128); | |
assign n1101 = /* LUT 13 9 0 */ (n161 ? (n170 ? !n163 : 1'b1) : 1'b0); | |
assign n1102 = /* LUT 17 10 5 */ n585; | |
assign n1103 = /* LUT 7 19 5 */ n100; | |
assign n1104 = /* LUT 21 10 4 */ n447; | |
assign n1105 = /* LUT 18 13 4 */ (n688 ? (n470 ? (n169 ? n654 : 1'b0) : n169) : (n470 ? (n169 ? n654 : 1'b0) : 1'b0)); | |
assign n1106 = /* LUT 3 11 2 */ (n20 ? !n11 : n11); | |
assign n1107 = /* LUT 16 15 1 */ n486; | |
assign n1108 = /* LUT 14 13 0 */ (n56 ? (n400 ? 1'b0 : !n29) : !n400); | |
assign n1109 = /* LUT 12 13 3 */ (n161 ? (n145 ? !n170 : 1'b1) : 1'b0); | |
assign n1110 = /* LUT 20 12 1 */ (n169 ? (n470 ? n709 : n694) : 1'b0); | |
assign n1111 = /* LUT 13 12 6 */ (n181 ? (n341 ? (n153 ? 1'b1 : n148) : !n153) : (n341 ? n148 : (n153 ? 1'b0 : n148))); | |
assign n1112 = /* LUT 16 16 5 */ (n623 ? (n474 ? n549 : !n549) : (n474 ? !n549 : n549)); | |
assign n1113 = /* LUT 10 13 4 */ (n123 ? n79 : !n225); | |
assign n1114 = /* LUT 11 14 3 */ (n81 ? (n56 ? 1'b0 : (n82 ? n69 : 1'b1)) : (n56 ? 1'b0 : n69)); | |
assign n1115 = /* LUT 16 7 4 */ n499; | |
assign n1116 = /* LUT 16 12 5 */ (n447 ? (n106 ? (n485 ? !n169 : 1'b1) : (n485 ? 1'b0 : n169)) : (n485 ? 1'b0 : n169)); | |
assign n1117 = /* LUT 14 14 6 */ (n166 ? (n369 ? 1'b0 : !n163) : (n369 ? 1'b1 : !n163)); | |
assign n1118 = /* LUT 15 13 3 */ (n468 ? 1'b0 : !n357); | |
assign n1119 = /* LUT 17 13 2 */ (n369 ? 1'b0 : !n279); | |
assign n1120 = /* LUT 15 11 3 */ (n153 ? (n170 ? 1'b0 : n161) : n161); | |
assign n1121 = /* LUT 5 12 6 */ (n65 ? 1'b1 : n40); | |
assign n1122 = /* LUT 10 4 2 */ n132; | |
assign n1123 = /* LUT 20 15 5 */ n609; | |
assign n1124 = /* LUT 11 13 7 */ (n126 ? (n55 ? 1'b0 : (n54 ? 1'b0 : n149)) : 1'b0); | |
assign n1125 = /* LUT 12 12 4 */ (n188 ? (n273 ? n128 : 1'b1) : (n273 ? (n352 ? n128 : 1'b0) : 1'b1)); | |
assign n1129 = /* LUT 14 11 4 */ !n153; | |
assign n1130 = /* LUT 16 9 5 */ (n498 ? (n513 ? 1'b1 : n372) : (n513 ? !n372 : 1'b0)); | |
assign n1131 = /* LUT 20 9 4 */ (n499 ? !n1 : 1'b0); | |
assign n1132 = /* LUT 17 8 4 */ (n570 ? (n1 ? n508 : 1'b0) : n1); | |
assign n1133 = /* LUT 15 14 7 */ n85; | |
assign n1134 = /* LUT 18 11 3 */ n389; | |
assign n1135 = /* LUT 12 15 6 */ (n203 ? (n226 ? 1'b1 : !n130) : (n226 ? n69 : !n130)); | |
assign n1136 = /* LUT 18 9 6 */ (n508 ? !n1 : 1'b0); | |
assign n1137 = /* LUT 10 16 2 */ (n237 ? !n168 : n168); | |
assign n1138 = /* LUT 9 8 4 */ (n114 ? !n110 : 1'b0); | |
assign n1139 = /* LUT 13 10 1 */ (n196 ? (n309 ? n313 : !n313) : (n309 ? !n313 : n313)); | |
assign n1140 = /* LUT 10 11 3 */ (n124 ? (n206 ? (n147 ? n207 : 1'b1) : (n147 ? n207 : 1'b0)) : 1'b0); | |
assign n1141 = /* LUT 18 12 7 */ (n686 ? (n659 ? n169 : (n169 ? !n470 : 1'b0)) : (n659 ? (n169 ? n470 : 1'b0) : 1'b0)); | |
assign n1142 = /* LUT 16 8 2 */ (n120 ? 1'b0 : !n372); | |
assign n1143 = /* LUT 14 10 3 */ (n379 ? n289 : 1'b0); | |
assign n1144 = /* LUT 16 14 2 */ (n546 ? (n470 ? 1'b0 : !n605) : (n470 ? 1'b1 : !n605)); | |
assign n1145 = /* LUT 14 12 3 */ (n214 ? (n148 ? n257 : (n181 ? n257 : 1'b0)) : (n148 ? 1'b1 : (n181 ? !n257 : 1'b0))); | |
assign n1146 = /* LUT 5 10 1 */ n64; | |
assign n1147 = /* LUT 13 13 5 */ (n353 ? (n360 ? 1'b0 : !n427) : (n359 ? !n427 : (n360 ? 1'b0 : !n427))); | |
assign n1148 = /* LUT 11 9 4 */ (n163 ? (n181 ? n248 : (n148 ? n248 : 1'b0)) : (n181 ? (n148 ? 1'b1 : !n248) : n148)); | |
assign n1149 = /* LUT 10 12 7 */ (n126 ? 1'b0 : (n151 ? !n119 : 1'b0)); | |
assign n1150 = /* LUT 16 6 7 */ (n568 ? (n497 ? n496 : !n496) : (n497 ? !n496 : n496)); | |
assign n1151 = /* LUT 16 11 4 */ (n590 ? (n128 ? (n519 ? 1'b1 : !n152) : !n152) : (n128 ? 1'b1 : !n152)); | |
assign n1152 = /* LUT 14 9 7 */ (n295 ? !n127 : (n269 ? !n125 : 1'b1)); | |
assign n1153 = /* LUT 20 11 7 */ n718; | |
assign n1154 = /* LUT 17 14 3 */ n430; | |
assign n1155 = /* LUT 5 13 5 */ (n76 ? !n44 : n44); | |
assign n1156 = /* LUT 10 7 3 */ (n134 ? 1'b0 : (n64 ? 1'b0 : n133)); | |
assign n1157 = /* LUT 11 10 6 */ (n181 ? (n145 ? n259 : (n148 ? 1'b1 : !n259)) : (n145 ? (n148 ? n259 : 1'b0) : n148)); | |
assign n1158 = /* LUT 12 9 1 */ (n125 ? (n270 ? !n266 : 1'b0) : 1'b0); | |
assign n1159 = /* LUT 17 9 7 */ (n578 ? (n569 ? 1'b1 : n629) : (n569 ? 1'b0 : n629)); | |
assign n1160 = /* LUT 15 15 4 */ (n484 ? (n470 ? 1'b0 : !n548) : (n470 ? 1'b1 : !n548)); | |
assign n1161 = /* LUT 9 12 6 */ (n55 ? (n70 ? (n56 ? 1'b0 : !n29) : (n56 ? 1'b0 : n29)) : (n70 ? !n29 : 1'b1)); | |
assign n1162 = /* LUT 12 14 5 */ (n370 ? (n30 ? 1'b1 : !n123) : (n30 ? (n290 ? n123 : 1'b1) : (n290 ? 1'b0 : !n123))); | |
assign n1163 = /* LUT 9 7 7 */ (n64 ? n115 : (n115 ? n113 : 1'b0)); | |
assign n1164 = /* LUT 9 9 7 */ (n2 ? n110 : 1'b0); | |
assign n1165 = /* LUT 13 11 6 */ (n410 ? (n318 ? n350 : !n350) : (n318 ? !n350 : n350)); | |
assign n1166 = /* LUT 10 10 4 */ (n124 ? (n147 ? !n194 : !n185) : 1'b0); | |
assign n1167 = /* LUT 18 15 6 */ (n616 ? !n1 : 1'b0); | |
assign n1168 = /* LUT 16 13 3 */ (n106 ? (n532 ? 1'b0 : !n547) : !n547); | |
assign n1169 = /* LUT 15 10 1 */ !n179; | |
assign n1170 = /* LUT 13 14 4 */ (n171 ? (n369 ? 1'b1 : !n179) : (n369 ? 1'b0 : !n179)); | |
assign n1171 = /* LUT 10 15 6 */ n97; | |
assign n1172 = /* LUT 11 12 1 */ (n128 ? (n208 ? (n219 ? 1'b1 : n184) : 1'b1) : !n208); | |
assign n1173 = /* LUT 16 10 7 */ (n516 ? (n517 ? (n170 ? 1'b1 : n445) : 1'b1) : 1'b0); | |
assign n1174 = /* LUT 12 11 0 */ (n327 ? (n302 ? n255 : !n255) : (n302 ? !n255 : n255)); | |
assign n1175 = /* LUT 17 4 5 */ n626; | |
assign n1176 = /* LUT 20 10 4 */ n332; | |
assign n1177 = /* LUT 17 15 4 */ (n6 ? !n612 : n612); | |
assign n1178 = /* LUT 15 9 5 */ (n170 ? (n161 ? !n295 : 1'b0) : n161); | |
assign n1179 = /* LUT 20 13 7 */ !n214; | |
assign n1180 = /* LUT 11 11 5 */ (n147 ? (n263 ? n124 : 1'b0) : (n218 ? n124 : 1'b0)); | |
assign n1181 = /* LUT 17 16 6 */ (n558 ? (n617 ? 1'b1 : !n472) : (n617 ? n472 : 1'b0)); | |
assign n1182 = /* LUT 10 14 1 */ (n123 ? n58 : !n230); | |
assign n1183 = /* LUT 15 12 5 */ (n302 ? (n148 ? n255 : (n181 ? n255 : 1'b0)) : (n148 ? 1'b1 : (n181 ? !n255 : 1'b0))); | |
assign n1184 = /* LUT 13 9 3 */ (n270 ? n289 : 1'b0); | |
assign n1185 = /* LUT 17 10 6 */ n518; | |
assign n1186 = /* LUT 18 13 5 */ (n657 ? (n169 ? (n470 ? 1'b1 : n689) : 1'b0) : (n169 ? (n470 ? 1'b0 : n689) : 1'b0)); | |
assign n1187 = /* LUT 3 11 5 */ (n23 ? !n14 : n14); | |
assign n1188 = /* LUT 14 13 1 */ (n288 ? (n222 ? n128 : 1'b1) : (n426 ? (n222 ? n128 : 1'b1) : !n222)); | |
assign n1189 = /* LUT 12 13 4 */ (n282 ? (n128 ? 1'b1 : !n220) : (n128 ? (n220 ? n291 : 1'b1) : !n220)); | |
assign n1190 = /* LUT 18 11 4 */ (n680 ? (n162 ? 1'b0 : !n652) : (n162 ? 1'b1 : !n652)); | |
assign n1191 = /* LUT 20 12 0 */ (n470 ? (n169 ? n707 : 1'b0) : (n169 ? n692 : 1'b0)); | |
assign n1192 = /* LUT 13 12 7 */ (n289 ? n107 : 1'b0); | |
assign n1193 = /* LUT 16 16 4 */ (n622 ? (n613 ? n474 : !n474) : (n613 ? !n474 : n474)); | |
assign n1194 = /* LUT 10 13 5 */ (n70 ? n29 : 1'b0); | |
assign n1195 = /* LUT 11 14 0 */ n68; | |
assign n1196 = /* LUT 16 7 5 */ (n505 ? (n493 ? 1'b1 : n372) : (n493 ? !n372 : 1'b0)); | |
assign n1197 = /* LUT 10 16 5 */ (n240 ? !n174 : n174); | |
assign n1198 = /* LUT 16 12 4 */ (n289 ? n532 : 1'b0); | |
assign n1199 = /* LUT 17 11 1 */ (n642 ? (n144 ? 1'b1 : !n525) : (n144 ? 1'b0 : !n525)); | |
assign n1200 = /* LUT 15 13 2 */ (n148 ? (n318 ? 1'b1 : !n337) : (n318 ? (n337 ? n181 : 1'b0) : (n337 ? 1'b0 : n181))); | |
assign n1201 = /* LUT 14 14 5 */ (n432 ? (n479 ? n169 : (n169 ? n470 : 1'b0)) : (n479 ? (n169 ? !n470 : 1'b0) : 1'b0)); | |
assign n1202 = /* LUT 10 11 4 */ (n119 ? (n118 ? n53 : 1'b0) : 1'b0); | |
assign n1203 = /* LUT 15 11 2 */ (n181 ? (n339 ? n278 : (n278 ? n148 : 1'b1)) : (n339 ? (n278 ? n148 : 1'b0) : n148)); | |
assign n1204 = /* LUT 11 13 6 */ (n55 ? 1'b0 : (n149 ? !n126 : 1'b0)); | |
assign n1205 = /* LUT 12 12 3 */ (n56 ? (n82 ? 1'b0 : !n272) : !n272); | |
assign n1206 = /* LUT 16 9 6 */ !n203; | |
assign n1207 = /* LUT 14 11 5 */ (n302 ? n150 : 1'b0); | |
assign n1208 = /* LUT 12 10 3 */ (n322 ? (n281 ? n268 : !n268) : (n281 ? !n268 : n268)); | |
assign n1209 = /* LUT 20 9 5 */ n334; | |
assign n1210 = /* LUT 7 13 5 */ n95; | |
assign n1211 = /* LUT 17 14 4 */ (n603 ? (n611 ? 1'b0 : !n470) : (n611 ? n470 : 1'b1)); | |
assign n1212 = /* LUT 12 15 7 */ (n123 ? n81 : (n374 ? 1'b1 : !n299)); | |
assign n1213 = /* LUT 18 9 7 */ !n512; | |
assign n1214 = /* LUT 13 10 2 */ (n393 ? (n248 ? n314 : !n314) : (n248 ? !n314 : n314)); | |
assign n1215 = /* LUT 18 3 7 */ SCK; | |
assign n1216 = /* LUT 18 12 6 */ n641; | |
assign n1217 = /* LUT 16 8 1 */ (n372 ? n507 : n492); | |
assign n1218 = /* LUT 14 10 2 */ !n279; | |
assign n1219 = /* LUT 14 12 2 */ (n413 ? 1'b0 : (n214 ? (n416 ? 1'b0 : !n127) : !n416)); | |
assign n1220 = /* LUT 18 10 3 */ n390; | |
assign n1221 = /* LUT 13 13 4 */ (n339 ? (n161 ? !n170 : 1'b0) : n161); | |
assign n1222 = /* LUT 11 9 3 */ (n127 ? 1'b0 : !n125); | |
assign n1223 = /* LUT 10 12 6 */ (n126 ? n151 : 1'b0); | |
assign n1224 = /* LUT 16 6 6 */ (n567 ? (n503 ? n496 : !n496) : (n503 ? !n496 : n496)); | |
assign n1225 = /* LUT 16 11 5 */ (n530 ? (n170 ? 1'b1 : (n450 ? 1'b1 : !n524)) : 1'b0); | |
assign n1226 = /* LUT 14 9 4 */ !n303; | |
assign n1227 = /* LUT 5 20 7 */ n86; | |
assign n1228 = /* LUT 20 11 4 */ !n336; | |
assign n1229 = /* LUT 5 13 4 */ (n75 ? !n43 : n43); | |
assign n1230 = /* LUT 11 10 7 */ (n147 ? (n124 ? n249 : 1'b0) : (n124 ? n201 : 1'b0)); | |
assign n1231 = /* LUT 17 12 7 */ (n419 ? (n653 ? 1'b0 : !n106) : !n653); | |
assign n1232 = /* LUT 15 10 6 */ (n144 ? n515 : !n274); | |
assign n1233 = /* LUT 17 9 6 */ (n573 ? (n576 ? 1'b1 : !n569) : (n576 ? n569 : 1'b0)); | |
assign n1234 = /* LUT 15 15 7 */ n480; | |
assign n1235 = /* LUT 3 10 7 */ (n19 ? n9 : 1'b0); | |
assign n1236 = /* LUT 12 14 4 */ (n226 ? n69 : 1'b0); | |
assign n1237 = /* LUT 9 7 6 */ (n109 ? !n110 : 1'b0); | |
assign n1238 = /* LUT 20 13 0 */ (n470 ? n710 : n693); | |
assign n1239 = /* LUT 13 11 5 */ (n409 ? (n385 ? n340 : !n340) : (n385 ? !n340 : n340)); | |
assign n1240 = /* LUT 18 15 7 */ (n553 ? !n1 : 1'b0); | |
assign n1241 = /* LUT 14 15 3 */ (n478 ? (n435 ? 1'b0 : n470) : (n435 ? !n470 : 1'b1)); | |
assign n1242 = /* LUT 18 13 2 */ n332; | |
assign n1243 = /* LUT 13 14 5 */ (n82 ? !n70 : (n29 ? !n70 : 1'b0)); | |
assign n1244 = /* LUT 16 15 7 */ (n612 ? (n472 ? n552 : (n552 ? n474 : !n474)) : (n472 ? n552 : (n552 ? !n474 : n474))); | |
assign n1245 = /* LUT 14 13 6 */ (n169 ? !n433 : (n378 ? n106 : 1'b0)); | |
assign n1246 = /* LUT 10 15 7 */ n92; | |
assign n1247 = /* LUT 11 12 2 */ (n160 ? (n105 ? 1'b0 : !n162) : (n105 ? n162 : 1'b1)); | |
assign n1248 = /* LUT 20 12 7 */ (n695 ? (n708 ? n169 : (n169 ? !n470 : 1'b0)) : (n708 ? (n169 ? n470 : 1'b0) : 1'b0)); | |
assign n1249 = /* LUT 12 11 1 */ (n342 ? (n336 ? n338 : !n338) : (n336 ? !n338 : n338)); | |
assign n1250 = /* LUT 20 10 7 */ (n702 ? (n672 ? 1'b1 : n569) : (n672 ? !n569 : 1'b0)); | |
assign n1251 = /* LUT 10 13 2 */ (n131 ? (n156 ? 1'b1 : (n157 ? 1'b1 : n159)) : (n157 ? !n159 : 1'b0)); | |
assign n1252 = /* LUT 15 9 4 */ (n447 ? n289 : 1'b0); | |
assign n1253 = /* LUT 16 12 3 */ (n144 ? n591 : !n540); | |
assign n1254 = /* LUT 11 11 4 */ (n53 ? (n197 ? 1'b0 : !n56) : !n197); | |
assign n1255 = /* LUT 15 11 5 */ (n56 ? (n81 ? 1'b0 : !n386) : !n386); | |
assign n1256 = /* LUT 13 15 2 */ n32; | |
assign n1257 = /* LUT 17 16 7 */ (n554 ? (n618 ? 1'b1 : !n472) : (n618 ? n472 : 1'b0)); | |
assign n1258 = /* LUT 23 4 1 */ nCS; | |
assign n1259 = /* LUT 10 14 0 */ (n159 ? n171 : !n229); | |
assign n1260 = /* LUT 13 9 2 */ (n125 ? (n303 ? !n127 : !n309) : (n303 ? !n127 : 1'b1)); | |
assign n1261 = /* LUT 15 12 6 */ (n456 ? (n538 ? n144 : 1'b0) : (n538 ? 1'b1 : !n144)); | |
assign n1262 = /* LUT 3 11 4 */ (n22 ? !n13 : n13); | |
assign n1263 = /* LUT 17 8 2 */ n512; | |
assign n1264 = /* LUT 12 13 5 */ (n181 ? (n268 ? n281 : (n148 ? 1'b1 : !n281)) : (n268 ? (n148 ? n281 : 1'b0) : n148)); | |
assign n1265 = /* LUT 18 11 5 */ n522; | |
assign n1266 = /* LUT 13 12 4 */ (n118 ? (n126 ? !n150 : 1'b0) : !n150); | |
assign n1267 = /* LUT 16 16 3 */ (n621 ? (n474 ? n615 : !n615) : (n474 ? !n615 : n615)); | |
assign n1268 = /* LUT 11 14 1 */ (n179 ? (n226 ? n69 : n171) : (n226 ? 1'b1 : n171)); | |
assign n1269 = /* LUT 16 7 2 */ n506; | |
assign n1270 = /* LUT 10 16 4 */ (n239 ? !n175 : n175); | |
assign n1271 = /* LUT 14 14 4 */ (n163 ? n303 : 1'b0); | |
assign n1272 = /* LUT 15 13 1 */ (n66 ? (n106 ? (n169 ? n476 : 1'b1) : (n169 ? n476 : 1'b0)) : (n169 ? n476 : 1'b0)); | |
assign n1273 = /* LUT 4 13 5 */ n26; | |
assign n1274 = /* LUT 17 11 0 */ n584; | |
assign n1275 = /* LUT 10 11 5 */ (n142 ? 1'b0 : (n56 ? !n71 : 1'b1)); | |
assign n1276 = /* LUT 14 12 5 */ (n118 ? (n126 ? (n150 ? 1'b0 : n419) : 1'b0) : (n150 ? 1'b0 : n419)); | |
assign n1277 = /* LUT 11 13 5 */ (n56 ? (n186 ? 1'b0 : !n83) : !n186); | |
assign n1278 = /* LUT 12 12 2 */ (n169 ? n356 : (n106 ? !n270 : 1'b1)); | |
assign n1279 = /* LUT 16 9 7 */ (n6 ? !n498 : n498); | |
assign n1280 = /* LUT 14 11 6 */ (n106 ? (n420 ? 1'b0 : !n389) : !n420); | |
assign n1281 = /* LUT 12 10 2 */ (n321 ? (n319 ? n179 : !n179) : (n319 ? !n179 : n179)); | |
assign n1282 = /* LUT 20 9 6 */ (n569 ? n700 : n677); | |
assign n1283 = /* LUT 10 12 1 */ (n53 ? (n119 ? (n149 ? 1'b0 : !n121) : 1'b0) : 1'b0); | |
assign n1284 = /* LUT 15 14 5 */ (n368 ? (n56 ? 1'b0 : (n81 ? n471 : 1'b0)) : 1'b0); | |
assign n1285 = /* LUT 7 13 4 */ n28; | |
assign n1286 = /* LUT 16 11 2 */ (n529 ? (n128 ? 1'b1 : !n198) : (n128 ? (n588 ? !n198 : 1'b1) : !n198)); | |
assign n1287 = /* LUT 12 15 4 */ (n375 ? (n80 ? 1'b1 : !n123) : (n80 ? (n298 ? n123 : 1'b1) : (n298 ? 1'b0 : !n123))); | |
assign n1288 = /* LUT 18 9 4 */ (n1 ? 1'b0 : n442); | |
assign n1289 = /* LUT 20 14 0 */ (n369 ? 1'b0 : !n317); | |
assign n1290 = /* LUT 13 10 3 */ (n394 ? (n319 ? n391 : !n391) : (n319 ? !n391 : n391)); | |
assign n1291 = /* LUT 16 8 0 */ n508; | |
assign n1292 = /* LUT 14 10 1 */ !n295; | |
assign n1293 = /* LUT 17 9 1 */ n313; | |
assign n1294 = /* LUT 18 10 2 */ n354; | |
assign n1295 = /* LUT 13 13 7 */ (n366 ? (n221 ? n128 : 1'b1) : (n221 ? (n128 ? n308 : 1'b0) : 1'b1)); | |
assign n1298 = /* LUT 14 9 5 */ (n389 ? n289 : 1'b0); | |
assign n1299 = /* LUT 15 2 0 */ n378; | |
assign n1300 = /* LUT 18 15 0 */ (n1 ? (n553 ? 1'b1 : !n606) : 1'b0); | |
assign n1301 = /* LUT 5 13 7 */ (n78 ? !n46 : n46); | |
assign n1302 = /* LUT 14 15 4 */ (n268 ? (n369 ? n176 : 1'b0) : (n369 ? n176 : 1'b1)); | |
assign n1303 = /* LUT 11 10 4 */ (n203 ? (n161 ? !n170 : 1'b0) : n161); | |
assign n1304 = /* LUT 17 12 4 */ n586; | |
assign n1305 = /* LUT 15 10 7 */ (n181 ? (n279 ? n340 : (n148 ? 1'b1 : !n340)) : (n279 ? (n148 ? n340 : 1'b0) : n148)); | |
assign n1306 = /* LUT 10 15 0 */ n91; | |
assign n1307 = /* LUT 15 15 6 */ (n369 ? n130 : !n203); | |
assign n1308 = /* LUT 8 13 5 */ n60; | |
assign n1309 = /* LUT 16 10 1 */ (n521 ? (n162 ? 1'b0 : !n511) : (n162 ? 1'b1 : !n511)); | |
assign n1310 = /* LUT 12 11 6 */ (n347 ? (n316 ? n317 : !n317) : (n316 ? !n317 : n317)); | |
assign n1311 = /* LUT 9 12 4 */ (n79 ? (n29 ? (n56 ? 1'b1 : !n70) : (n56 ? 1'b1 : n70)) : (n29 ? (n56 ? 1'b1 : !n70) : 1'b1)); | |
assign n1312 = /* LUT 17 15 2 */ n483; | |
assign n1313 = /* LUT 12 14 7 */ (n129 ? (n226 ? (n145 ? 1'b1 : n69) : 1'b0) : (n226 ? (n145 ? 1'b1 : n69) : 1'b1)); | |
assign n1314 = /* LUT 9 7 5 */ (n110 ? 1'b0 : n108); | |
assign n1315 = /* LUT 13 11 4 */ (n408 ? (n278 ? n390 : !n390) : (n278 ? !n390 : n390)); | |
assign n1316 = /* LUT 10 14 7 */ n67; | |
assign n1317 = /* LUT 13 9 5 */ (n304 ? (n170 ? 1'b1 : (n305 ? n307 : 1'b1)) : 1'b0); | |
assign n1318 = /* LUT 18 13 3 */ n350; | |
assign n1319 = /* LUT 13 14 6 */ (n82 ? (n29 ? !n70 : 1'b0) : (n29 ? (n70 ? n81 : 1'b1) : n81)); | |
assign n1320 = /* LUT 14 13 7 */ (n29 ? (n56 ? 1'b0 : !n70) : (n56 ? 1'b0 : (n70 ? 1'b1 : !n80))); | |
assign n1321 = /* LUT 7 20 1 */ n100; | |
assign n1322 = /* LUT 8 7 1 */ !n103; | |
assign n1323 = /* LUT 11 12 3 */ (n195 ? 1'b0 : (n137 ? (n224 ? !n212 : 1'b1) : !n212)); | |
assign n1324 = /* LUT 20 12 6 */ n355; | |
assign n1325 = /* LUT 20 10 6 */ (n704 ? (n667 ? 1'b1 : n569) : (n667 ? !n569 : 1'b0)); | |
assign n1326 = /* LUT 10 13 3 */ (n123 ? (n79 ? !n226 : 1'b0) : !n226); | |
assign n1327 = /* LUT 11 14 6 */ (n159 ? n231 : n292); | |
assign n1328 = /* LUT 5 14 6 */ n48; | |
assign n1329 = /* LUT 16 12 2 */ (n533 ? (n351 ? 1'b1 : n128) : (n351 ? 1'b1 : (n594 ? 1'b0 : n128))); | |
assign n1330 = /* LUT 14 14 3 */ (n429 ? n423 : 1'b0); | |
assign n1331 = /* LUT 17 11 7 */ (n144 ? n587 : !n528); | |
assign n1332 = /* LUT 11 11 7 */ (n39 ? (n213 ? 1'b0 : n162) : (n213 ? !n162 : 1'b1)); | |
assign n1333 = /* LUT 16 2 2 */ n379; | |
assign n1334 = /* LUT 17 13 7 */ (n369 ? 1'b0 : !n339); | |
assign n1335 = /* LUT 15 11 4 */ (n438 ? (n523 ? n144 : (n144 ? !n162 : 1'b0)) : (n523 ? (n144 ? n162 : 1'b0) : 1'b0)); | |
assign n1336 = /* LUT 17 16 4 */ n619; | |
assign n1337 = /* LUT 20 15 0 */ (n1 ? 1'b0 : n561); | |
assign n1338 = /* LUT 15 12 7 */ (n125 ? (n127 ? (n302 ? 1'b0 : !n255) : (n302 ? 1'b1 : !n255)) : (n127 ? !n302 : 1'b1)); | |
assign n1339 = /* LUT 12 10 5 */ (n324 ? (n203 ? n267 : !n267) : (n203 ? !n267 : n267)); | |
assign n1340 = /* LUT 3 11 7 */ (n25 ? !n16 : n16); | |
assign n1341 = /* LUT 17 8 3 */ (n504 ? 1'b0 : (n572 ? (n506 ? 1'b0 : !n502) : 1'b0)); | |
assign n1342 = /* LUT 15 14 2 */ (n471 ? (n368 ? n56 : (n56 ? 1'b1 : !n81)) : (n368 ? n56 : 1'b1)); | |
assign n1343 = /* LUT 12 13 6 */ (n226 ? (n69 ? n356 : n266) : 1'b1); | |
assign n621 = /* CARRY 16 16 2 */ (n474 & n618) | ((n474 | n618) & n620); | |
assign n396 = /* CARRY 13 10 4 */ (n281 & n392) | ((n281 | n392) & n395); | |
assign n721 = /* CARRY 16 6 0 */ (1'b0 & n498) | ((1'b0 | n498) & n765); | |
assign n408 = /* CARRY 13 11 3 */ (n341 & n355) | ((n341 | n355) & n407); | |
assign n78 = /* CARRY 5 13 6 */ (n45 & 1'b0) | ((n45 | 1'b0) & n77); | |
assign n324 = /* CARRY 12 10 4 */ (n259 & n145) | ((n259 | n145) & n323); | |
assign n25 = /* CARRY 3 11 6 */ (1'b0 & n15) | ((1'b0 | n15) & n24); | |
assign n620 = /* CARRY 16 16 1 */ (n552 & n474) | ((n552 | n474) & n722); | |
assign n242 = /* CARRY 10 16 6 */ (1'b0 & n172) | ((1'b0 | n172) & n241); | |
assign n397 = /* CARRY 13 10 5 */ (n331 & n259) | ((n331 | n259) & n396); | |
assign n73 = /* CARRY 5 13 1 */ (1'b0 & n31) | ((1'b0 | n31) & n723); | |
assign n565 = /* CARRY 16 6 3 */ (n500 & n496) | ((n500 | n496) & n564); | |
assign n407 = /* CARRY 13 11 2 */ (n354 & n338) | ((n354 | n338) & n406); | |
assign n346 = /* CARRY 12 11 4 */ (n340 & n279) | ((n340 | n279) & n345); | |
assign n20 = /* CARRY 3 11 1 */ (n7 & 1'b0) | ((n7 | 1'b0) & n724); | |
assign n327 = /* CARRY 12 10 7 */ (n266 & n306) | ((n266 | n306) & n326); | |
assign n722 = /* CARRY 16 16 0 */ (n612 & 1'b0) | ((n612 | 1'b0) & n894); | |
assign n237 = /* CARRY 10 16 1 */ (1'b0 & n165) | ((1'b0 | n165) & n725); | |
assign n398 = /* CARRY 13 10 6 */ (n334 & n267) | ((n334 | n267) & n397); | |
assign n723 = /* CARRY 5 13 0 */ (1'b0 & n38) | ((1'b0 | n38) & n912); | |
assign n136 = /* CARRY 9 7 2 */ (n111 & 1'b0) | ((n111 | 1'b0) & n135); | |
assign n564 = /* CARRY 16 6 2 */ (n496 & n501) | ((n496 | n501) & n563); | |
assign n406 = /* CARRY 13 11 1 */ (n255 & n387) | ((n255 | n387) & n405); | |
assign n347 = /* CARRY 12 11 5 */ (n318 & n337) | ((n318 | n337) & n346); | |
assign n724 = /* CARRY 3 11 0 */ (1'b0 & n19) | ((1'b0 | n19) & n944); | |
assign n326 = /* CARRY 12 10 6 */ (n295 & n269) | ((n295 | n269) & n325); | |
assign n725 = /* CARRY 10 16 0 */ (1'b0 & n227) | ((1'b0 | n227) & n974); | |
assign n399 = /* CARRY 13 10 7 */ (n384 & n269) | ((n384 | n269) & n398); | |
assign n567 = /* CARRY 16 6 5 */ (n505 & n496) | ((n505 | n496) & n566); | |
assign n75 = /* CARRY 5 13 3 */ (1'b0 & n42) | ((1'b0 | n42) & n74); | |
assign n135 = /* CARRY 9 7 1 */ (1'b0 & n103) | ((1'b0 | n103) & n727); | |
assign n405 = /* CARRY 13 11 0 */ (n306 & n335) | ((n306 | n335) & n399); | |
assign n344 = /* CARRY 12 11 2 */ (n341 & n153) | ((n341 | n153) & n343); | |
assign n22 = /* CARRY 3 11 3 */ (n12 & 1'b0) | ((n12 | 1'b0) & n21); | |
assign n625 = /* CARRY 16 16 6 */ (n474 & n617) | ((n474 | n617) & n624); | |
assign n321 = /* CARRY 12 10 1 */ (n163 & n248) | ((n163 | n248) & n320); | |
assign n239 = /* CARRY 10 16 3 */ (n173 & 1'b0) | ((n173 | 1'b0) & n238); | |
assign n726 = /* CARRY 13 10 0 */ (1'b0 & n196) | ((1'b0 | n196) & n1053); | |
assign n566 = /* CARRY 16 6 4 */ (n496 & n507) | ((n496 | n507) & n565); | |
assign n74 = /* CARRY 5 13 2 */ (n41 & 1'b0) | ((n41 | 1'b0) & n73); | |
assign n727 = /* CARRY 9 7 0 */ (1'b0 & n113) | ((1'b0 | n113) & n1077); | |
assign n412 = /* CARRY 13 11 7 */ (n316 & n333) | ((n316 | n333) & n411); | |
assign n345 = /* CARRY 12 11 3 */ (n278 & n339) | ((n278 | n339) & n344); | |
assign n21 = /* CARRY 3 11 2 */ (1'b0 & n11) | ((1'b0 | n11) & n20); | |
assign n624 = /* CARRY 16 16 5 */ (n549 & n474) | ((n549 | n474) & n623); | |
assign n320 = /* CARRY 12 10 0 */ (n303 & n309) | ((n303 | n309) & n1128); | |
assign n238 = /* CARRY 10 16 2 */ (1'b0 & n168) | ((1'b0 | n168) & n237); | |
assign n393 = /* CARRY 13 10 1 */ (n313 & n309) | ((n313 | n309) & n726); | |
assign n77 = /* CARRY 5 13 5 */ (1'b0 & n44) | ((1'b0 | n44) & n76); | |
assign n411 = /* CARRY 13 11 6 */ (n350 & n318) | ((n350 | n318) & n410); | |
assign n342 = /* CARRY 12 11 0 */ (n255 & n302) | ((n255 | n302) & n327); | |
assign n24 = /* CARRY 3 11 5 */ (n14 & 1'b0) | ((n14 | 1'b0) & n23); | |
assign n623 = /* CARRY 16 16 4 */ (n474 & n613) | ((n474 | n613) & n622); | |
assign n241 = /* CARRY 10 16 5 */ (n174 & 1'b0) | ((n174 | 1'b0) & n240); | |
assign n323 = /* CARRY 12 10 3 */ (n268 & n281) | ((n268 | n281) & n322); | |
assign n394 = /* CARRY 13 10 2 */ (n314 & n248) | ((n314 | n248) & n393); | |
assign n568 = /* CARRY 16 6 6 */ (n496 & n503) | ((n496 | n503) & n567); | |
assign n76 = /* CARRY 5 13 4 */ (n43 & 1'b0) | ((n43 | 1'b0) & n75); | |
assign n410 = /* CARRY 13 11 5 */ (n340 & n385) | ((n340 | n385) & n409); | |
assign n343 = /* CARRY 12 11 1 */ (n338 & n336) | ((n338 | n336) & n342); | |
assign n23 = /* CARRY 3 11 4 */ (1'b0 & n13) | ((1'b0 | n13) & n22); | |
assign n622 = /* CARRY 16 16 3 */ (n615 & n474) | ((n615 | n474) & n621); | |
assign n240 = /* CARRY 10 16 4 */ (n175 & 1'b0) | ((n175 | 1'b0) & n239); | |
assign n322 = /* CARRY 12 10 2 */ (n179 & n319) | ((n179 | n319) & n321); | |
assign n395 = /* CARRY 13 10 3 */ (n391 & n319) | ((n391 | n319) & n394); | |
assign n563 = /* CARRY 16 6 1 */ (n509 & n496) | ((n509 | n496) & n721); | |
assign n348 = /* CARRY 12 11 6 */ (n317 & n316) | ((n317 | n316) & n347); | |
assign n409 = /* CARRY 13 11 4 */ (n390 & n278) | ((n390 | n278) & n408); | |
assign n325 = /* CARRY 12 10 5 */ (n267 & n203) | ((n267 | n203) & n324); | |
/* FF 18 11 6 */ assign n646 = n728; | |
/* FF 13 12 5 */ assign n352 = n729; | |
/* FF 16 16 2 */ assign n554 = n730; | |
/* FF 16 7 3 */ assign n502 = n731; | |
/* FF 7 12 4 */ assign n90 = n732; | |
/* FF 10 16 7 */ assign n131 = n733; | |
/* FF 13 10 4 */ assign n204 = n734; | |
/* FF 15 13 0 */ assign n464 = n735; | |
/* FF 10 11 6 */ always @(posedge pin_23, posedge n1) if (n1) n144 <= 1'b0; else if (1'b1) n144 <= n736; | |
/* FF 18 12 0 */ assign n469 = n737; | |
/* FF 16 8 7 */ assign n508 = n738; | |
/* FF 14 12 4 */ assign n417 = n739; | |
/* FF 11 13 4 */ assign n128 = n740; | |
/* FF 12 12 1 */ assign n272 = n741; | |
/* FF 14 11 7 */ assign n392 = n742; | |
/* FF 20 9 7 */ assign n701 = n743; | |
/* FF 10 12 0 */ assign n149 = n744; | |
/* FF 11 15 5 */ assign n91 = n745; | |
/* FF 7 13 3 */ always @(posedge pin_23) if (n2) n95 <= 1'b0 ? 1'b0 : n746; | |
/* FF 16 11 3 */ always @(posedge pin_23) if (1'b1) n527 <= 1'b0 ? 1'b0 : n747; | |
/* FF 14 9 2 */ assign n380 = n748; | |
/* FF 7 11 3 */ always @(posedge pin_23) if (1'b1) n39 <= 1'b0 ? 1'b0 : n749; | |
/* FF 17 14 6 */ assign n604 = n750; | |
/* FF 12 15 5 */ assign n298 = n751; | |
/* FF 18 9 5 */ always @(posedge pin_23) if (1'b1) n632 <= 1'b0 ? 1'b0 : n752; | |
/* FF 21 11 0 */ always @(posedge pin_23, posedge n1) if (n1) n718 <= 1'b0; else if (n4) n718 <= n753; | |
/* FF 12 9 4 */ assign n245 = n754; | |
/* FF 14 10 0 */ assign n281 = n755; | |
/* FF 7 14 7 */ always @(posedge pin_23) if (n2) n84 <= 1'b0 ? 1'b0 : n756; | |
/* FF 17 9 0 */ assign n100 = n757; | |
/* FF 15 15 1 */ assign n480 = n758; | |
/* FF 10 9 5 */ always @(posedge pin_23) if (n2) n72 <= 1'b0 ? 1'b0 : n759; | |
/* FF 18 10 1 */ always @(posedge pin_23) if (1'b1) n635 <= 1'b0 ? 1'b0 : n760; | |
/* FF 13 13 6 */ assign n361 = n761; | |
/* FF 11 9 1 */ assign n180 = n762; | |
/* FF 16 6 0 */ assign n763 = n764; | |
/* FF 13 11 3 */ assign n215 = n766; | |
/* FF 20 11 2 */ always @(posedge pin_23) if (1'b1) n705 <= 1'b0 ? 1'b0 : n767; | |
/* FF 18 15 1 */ assign n661 = n768; | |
/* FF 5 13 6 */ always @(posedge pin_23) if (n17) n45 <= n40 ? 1'b0 : n769; | |
/* FF 16 13 6 */ assign n543 = n770; | |
/* FF 14 15 5 */ always @(posedge pin_23) if (1'b1) n435 <= 1'b0 ? 1'b0 : n771; | |
/* FF 11 10 5 */ assign n191 = n772; | |
/* FF 17 12 5 */ always @(posedge pin_23) if (1'b1) n593 <= 1'b0 ? 1'b0 : n773; | |
/* FF 15 10 4 */ assign n295 = n774; | |
/* FF 5 11 3 */ always @(posedge pin_23, posedge n1) if (n1) n36 <= 1'b0; else if (n4) n36 <= n775; | |
/* FF 10 15 1 */ assign n97 = n776; | |
/* FF 11 12 4 */ assign n161 = n777; | |
/* FF 16 10 0 */ assign n203 = n778; | |
/* FF 12 11 7 */ assign n265 = n779; | |
/* FF 3 10 5 */ assign n10 = n780; | |
/* FF 15 9 2 */ assign n440 = n781; | |
/* FF 9 7 4 */ assign n110 = n782; | |
/* FF 12 14 6 */ assign n293 = n783; | |
/* FF 10 17 5 */ assign n6 = n784; | |
/* FF 10 14 6 */ assign n167 = n785; | |
/* FF 15 12 0 */ always @(posedge pin_23) if (1'b1) n456 <= 1'b0 ? 1'b0 : n786; | |
/* FF 13 9 4 */ assign n307 = n787; | |
/* FF 17 10 1 */ assign n378 = n788; | |
/* FF 13 14 7 */ assign n370 = n789; | |
/* FF 16 15 5 */ always @(posedge pin_23) if (1'b1) n552 <= n1 ? 1'b0 : n790; | |
/* FF 14 13 4 */ assign n205 = n791; | |
/* FF 20 12 5 */ always @(posedge pin_23) if (1'b1) n709 <= n369 ? 1'b0 : n792; | |
/* FF 13 12 2 */ assign n341 = n793; | |
/* FF 20 10 1 */ always @(posedge pin_23) if (1'b1) n702 <= 1'b0 ? 1'b0 : n794; | |
/* FF 10 13 0 */ always @(posedge pin_23, posedge n1) if (n1) n154 <= 1'b1; else if (1'b1) n154 <= n795; | |
/* FF 11 14 7 */ assign n231 = n796; | |
/* FF 5 14 7 */ always @(posedge pin_23) if (n2) n51 <= 1'b0 ? 1'b0 : n797; | |
/* FF 16 12 1 */ assign n533 = n798; | |
/* FF 14 14 2 */ assign n87 = n799; | |
/* FF 17 11 6 */ assign n588 = n800; | |
/* FF 11 11 6 */ assign n152 = n801; | |
/* FF 15 13 7 */ assign n268 = n802; | |
/* FF 17 13 6 */ assign n599 = n803; | |
/* FF 15 11 7 */ assign n454 = n804; | |
/* FF 17 16 5 */ always @(posedge pin_23) if (1'b1) n618 <= n1 ? 1'b0 : n805; | |
/* FF 20 15 1 */ assign n714 = n806; | |
/* FF 11 13 3 */ assign n221 = n807; | |
/* FF 12 10 4 */ assign n252 = n808; | |
/* FF 14 11 0 */ assign n400 = n809; | |
/* FF 3 11 6 */ always @(posedge pin_23) if (n9) n15 <= 1'b0 ? 1'b0 : n810; | |
/* FF 15 14 3 */ assign n473 = n811; | |
/* FF 12 13 7 */ assign n288 = n812; | |
/* FF 18 11 7 */ assign n590 = n813; | |
/* FF 16 16 1 */ assign n814 = n815; | |
/* FF 14 2 2 */ always @(posedge pin_23, posedge n1) if (n1) n377 <= 1'b0; else if (n87) n377 <= n816; | |
/* FF 4 10 4 */ always @(posedge pin_23) if (n9) n19 <= 1'b0 ? 1'b0 : n817; | |
/* FF 16 7 0 */ assign n499 = n818; | |
/* FF 7 12 5 */ always @(posedge pin_23) if (n90) n31 <= n40 ? 1'b0 : n819; | |
/* FF 10 16 6 */ assign n177 = n820; | |
/* FF 13 10 5 */ assign n310 = n821; | |
/* FF 18 12 3 */ assign n214 = n822; | |
/* FF 16 8 6 */ always @(posedge pin_23) if (1'b1) n507 <= n1 ? 1'b0 : n823; | |
/* FF 14 10 7 */ assign n388 = n824; | |
/* FF 14 12 7 */ assign n418 = n825; | |
/* FF 12 12 0 */ assign n271 = n826; | |
/* FF 13 13 1 */ assign n358 = n827; | |
/* FF 20 9 0 */ assign n270 = n828; | |
/* FF 10 12 3 */ assign n148 = n829; | |
/* FF 7 13 2 */ always @(posedge pin_23) if (n2) n59 <= 1'b0 ? 1'b0 : n830; | |
/* FF 16 11 0 */ assign n524 = n831; | |
/* FF 14 9 3 */ assign n381 = n832; | |
/* FF 5 13 1 */ assign n833 = n834; | |
/* FF 18 9 2 */ assign n630 = n835; | |
/* FF 11 10 2 */ assign n188 = n836; | |
/* FF 21 11 7 */ always @(posedge pin_23, posedge n1) if (n1) n719 <= 1'b0; else if (n4) n719 <= n837; | |
/* FF 12 9 5 */ assign n246 = n838; | |
/* FF 17 9 3 */ always @(posedge pin_23) if (1'b1) n577 <= 1'b0 ? 1'b0 : n839; | |
/* FF 15 15 0 */ assign n356 = n840; | |
/* FF 10 9 2 */ assign n1 = n841; | |
/* FF 18 10 0 */ assign n584 = n842; | |
/* FF 12 14 1 */ assign n290 = n843; | |
/* FF 9 7 3 */ assign n109 = n844; | |
/* FF 16 6 3 */ assign n491 = n845; | |
/* FF 13 11 2 */ assign n206 = n846; | |
/* FF 20 11 3 */ assign n658 = n847; | |
/* FF 10 10 0 */ always @(posedge pin_23) if (1'b1) n138 <= 1'b0 ? 1'b0 : n848; | |
/* FF 18 15 2 */ assign n662 = n849; | |
/* FF 10 7 7 */ assign n115 = n850; | |
/* FF 16 13 7 */ always @(posedge pin_23) if (1'b1) n162 <= 1'b0 ? 1'b0 : n851; | |
/* FF 17 12 2 */ assign n302 = n852; | |
/* FF 15 10 5 */ assign n444 = n853; | |
/* FF 13 14 0 */ assign n365 = n854; | |
/* FF 11 12 5 */ assign n163 = n855; | |
/* FF 12 11 4 */ assign n263 = n856; | |
/* FF 16 10 3 */ assign n340 = n857; | |
/* FF 9 12 2 */ assign n119 = n858; | |
/* FF 17 15 0 */ assign n606 = n859; | |
/* FF 15 9 1 */ assign n335 = n860; | |
/* FF 18 8 1 */ assign n628 = n861; | |
/* FF 11 11 1 */ assign n195 = n862; | |
/* FF 13 15 7 */ assign n373 = n863; | |
/* FF 17 16 2 */ always @(posedge pin_23) if (1'b1) n615 <= n1 ? 1'b0 : n864; | |
/* FF 10 14 5 */ assign n92 = n865; | |
/* FF 15 12 1 */ always @(posedge pin_23) if (1'b1) n457 <= 1'b0 ? 1'b0 : n866; | |
/* FF 17 10 2 */ assign n455 = n867; | |
/* FF 3 11 1 */ assign n868 = n869; | |
/* FF 16 15 2 */ assign n550 = n870; | |
/* FF 14 13 5 */ assign n425 = n871; | |
/* FF 12 13 0 */ assign n282 = n872; | |
/* FF 20 12 4 */ always @(posedge pin_23) if (1'b1) n659 <= n369 ? 1'b0 : n873; | |
/* FF 13 12 3 */ assign n351 = n874; | |
/* FF 10 13 1 */ assign n155 = n875; | |
/* FF 11 14 4 */ assign n230 = n876; | |
/* FF 16 12 0 */ assign n255 = n877; | |
/* FF 17 11 5 */ assign n587 = n878; | |
/* FF 15 13 6 */ assign n468 = n879; | |
/* FF 4 13 0 */ always @(posedge pin_23) if (n2) n26 <= 1'b0 ? 1'b0 : n880; | |
/* FF 17 13 1 */ assign n333 = n881; | |
/* FF 15 11 6 */ assign n338 = n882; | |
/* FF 5 12 3 */ always @(posedge pin_23) if (n17) n38 <= n40 ? 1'b0 : n883; | |
/* FF 20 15 6 */ assign n715 = n884; | |
/* FF 11 13 2 */ assign n127 = n885; | |
/* FF 12 12 7 */ assign n277 = n886; | |
/* FF 12 10 7 */ assign n194 = n887; | |
/* FF 14 11 1 */ always @(posedge pin_23) if (1'b1) n401 <= 1'b0 ? 1'b0 : n888; | |
/* FF 9 13 1 */ assign n123 = n889; | |
/* FF 15 14 0 */ assign n471 = n890; | |
/* FF 18 11 0 */ always @(posedge pin_23, posedge n1) if (n1) n641 <= 1'b0; else if (n4) n641 <= n891; | |
/* FF 16 16 0 */ assign n892 = n893; | |
/* FF 16 7 1 */ always @(posedge pin_23) if (1'b1) n500 <= n1 ? 1'b0 : n895; | |
/* FF 10 16 1 */ assign n896 = n897; | |
/* FF 13 10 6 */ assign n311 = n898; | |
/* FF 18 12 2 */ always @(posedge pin_23) if (1'b1) n648 <= 1'b0 ? 1'b0 : n899; | |
/* FF 16 8 5 */ always @(posedge pin_23) if (1'b1) n498 <= n1 ? 1'b0 : n900; | |
/* FF 16 14 1 */ always @(posedge pin_23) if (1'b1) n546 <= 1'b0 ? 1'b0 : n901; | |
/* FF 14 12 6 */ assign n316 = n902; | |
/* FF 13 13 0 */ assign n357 = n903; | |
/* FF 11 9 7 */ assign n184 = n904; | |
/* FF 20 9 1 */ assign n697 = n905; | |
/* FF 10 12 2 */ assign n151 = n906; | |
/* FF 11 15 7 */ assign n233 = n907; | |
/* FF 7 13 1 */ always @(posedge pin_23) if (n2) n94 <= 1'b0 ? 1'b0 : n908; | |
/* FF 16 11 1 */ always @(posedge pin_23) if (1'b1) n525 <= 1'b0 ? 1'b0 : n909; | |
/* FF 5 13 0 */ assign n910 = n911; | |
/* FF 18 9 3 */ assign n631 = n913; | |
/* FF 21 1 6 */ always @(posedge pin_23) if (1'b1) n301 <= 1'b0 ? 1'b0 : n914; | |
/* FF 11 10 3 */ assign n189 = n915; | |
/* FF 12 9 6 */ assign n247 = n916; | |
/* FF 17 9 2 */ always @(posedge pin_23) if (1'b1) n576 <= 1'b0 ? 1'b0 : n917; | |
/* FF 18 10 7 */ assign n537 = n918; | |
/* FF 3 10 3 */ assign n9 = n919; | |
/* FF 12 14 0 */ assign n232 = n920; | |
/* FF 9 7 2 */ assign n108 = n921; | |
/* FF 16 6 2 */ assign n490 = n922; | |
/* FF 13 11 1 */ assign n328 = n923; | |
/* FF 20 11 0 */ always @(posedge pin_23) if (1'b1) n683 <= 1'b0 ? 1'b0 : n924; | |
/* FF 10 10 7 */ assign n116 = n925; | |
/* FF 18 15 3 */ assign n663 = n926; | |
/* FF 16 13 0 */ assign n539 = n927; | |
/* FF 14 15 7 */ assign n375 = n928; | |
/* FF 15 10 2 */ assign n443 = n929; | |
/* FF 11 12 6 */ assign n212 = n930; | |
/* FF 16 10 2 */ assign n516 = n931; | |
/* FF 12 11 5 */ assign n264 = n932; | |
/* FF 17 15 7 */ assign n610 = n933; | |
/* FF 15 9 0 */ assign n439 = n934; | |
/* FF 5 14 1 */ always @(posedge pin_23) if (n2) n48 <= 1'b0 ? 1'b0 : n935; | |
/* FF 11 11 0 */ assign n153 = n936; | |
/* FF 17 16 3 */ assign n616 = n937; | |
/* FF 13 9 6 */ assign n309 = n938; | |
/* FF 10 14 4 */ assign n166 = n939; | |
/* FF 15 12 2 */ assign n458 = n940; | |
/* FF 18 13 6 */ assign n547 = n941; | |
/* FF 3 11 0 */ assign n942 = n943; | |
/* FF 16 15 3 */ always @(posedge pin_23) if (1'b1) n551 <= n1 ? 1'b0 : n945; | |
/* FF 14 13 2 */ assign n423 = n946; | |
/* FF 12 13 1 */ assign n283 = n947; | |
/* FF 20 12 3 */ always @(posedge pin_23) if (1'b1) n708 <= n369 ? 1'b0 : n948; | |
/* FF 13 12 0 */ assign n349 = n949; | |
/* FF 16 16 7 */ assign n559 = n950; | |
/* FF 20 10 3 */ always @(posedge pin_23) if (1'b1) n703 <= 1'b0 ? 1'b0 : n951; | |
/* FF 10 13 6 */ assign n137 = n952; | |
/* FF 11 14 5 */ assign n219 = n953; | |
/* FF 16 7 6 */ always @(posedge pin_23) if (1'b1) n505 <= n1 ? 1'b0 : n954; | |
/* FF 16 12 7 */ assign n390 = n955; | |
/* FF 14 14 0 */ assign n428 = n956; | |
/* FF 5 19 1 */ always @(posedge pin_23, posedge n1) if (n1) n61 <= 1'b0; else if (n87) n61 <= n957; | |
/* FF 4 13 1 */ always @(posedge pin_23) if (n2) n27 <= 1'b0 ? 1'b0 : n958; | |
/* FF 15 13 5 */ assign n467 = n959; | |
/* FF 17 11 4 */ always @(posedge pin_23, posedge n1) if (n1) n586 <= 1'b0; else if (n4) n586 <= n960; | |
/* FF 15 11 1 */ assign n449 = n961; | |
/* FF 5 12 0 */ assign n37 = n962; | |
/* FF 20 15 7 */ assign n716 = n963; | |
/* FF 11 13 1 */ assign n169 = n964; | |
/* FF 12 12 6 */ assign n276 = n965; | |
/* FF 12 10 6 */ assign n254 = n966; | |
/* FF 14 11 2 */ assign n402 = n967; | |
/* FF 16 9 3 */ always @(posedge pin_23) if (1'b1) n511 <= 1'b0 ? 1'b0 : n968; | |
/* FF 17 8 6 */ assign n572 = n969; | |
/* FF 18 11 1 */ assign n514 = n970; | |
/* FF 14 2 0 */ always @(posedge pin_23, posedge n1) if (n1) n376 <= 1'b0; else if (n87) n376 <= n971; | |
/* FF 10 16 0 */ assign n972 = n973; | |
/* FF 13 10 7 */ assign n312 = n975; | |
/* FF 18 12 5 */ assign n650 = n976; | |
/* FF 16 8 4 */ assign n442 = n977; | |
/* FF 14 10 5 */ assign n387 = n978; | |
/* FF 14 12 1 */ assign n414 = n979; | |
/* FF 13 13 3 */ assign n359 = n980; | |
/* FF 11 9 6 */ assign n183 = n981; | |
/* FF 20 9 2 */ always @(posedge pin_23) if (1'b1) n639 <= 1'b0 ? 1'b0 : n982; | |
/* FF 10 12 5 */ assign n126 = n983; | |
/* FF 16 6 5 */ assign n493 = n984; | |
/* FF 7 13 0 */ always @(posedge pin_23) if (n2) n93 <= 1'b0 ? 1'b0 : n985; | |
/* FF 16 11 6 */ assign n278 = n986; | |
/* FF 14 9 1 */ assign n314 = n987; | |
/* FF 5 13 3 */ always @(posedge pin_23) if (n17) n42 <= n40 ? 1'b0 : n988; | |
/* FF 10 7 1 */ always @(posedge pin_23) if (1'b1) n134 <= 1'b0 ? 1'b0 : n989; | |
/* FF 18 9 0 */ assign n389 = n990; | |
/* FF 20 14 4 */ always @(posedge pin_23) if (1'b1) n690 <= 1'b0 ? 1'b0 : n991; | |
/* FF 11 10 0 */ assign n186 = n992; | |
/* FF 12 9 7 */ assign n146 = n993; | |
/* FF 17 9 5 */ assign n107 = n994; | |
/* FF 15 15 2 */ always @(posedge pin_23) if (1'b1) n481 <= 1'b0 ? 1'b0 : n995; | |
/* FF 18 10 6 */ assign n463 = n996; | |
/* FF 3 10 0 */ always @(posedge pin_23) if (n5) n7 <= 1'b0 ? 1'b0 : n997; | |
/* FF 9 7 1 */ assign n998 = n999; | |
/* FF 13 11 0 */ assign n185 = n1000; | |
/* FF 20 11 1 */ assign n589 = n1001; | |
/* FF 18 15 4 */ always @(posedge pin_23) if (1'b1) n470 <= n660 ? 1'b0 : n1002; | |
/* FF 16 13 1 */ always @(posedge pin_23) if (1'b1) n540 <= 1'b0 ? 1'b0 : n1003; | |
/* FF 14 15 0 */ assign n374 = n1004; | |
/* FF 17 12 0 */ assign n538 = n1005; | |
/* FF 15 10 3 */ assign n331 = n1006; | |
/* FF 10 15 4 */ assign n98 = n1007; | |
/* FF 11 12 7 */ assign n125 = n1008; | |
/* FF 12 11 2 */ assign n261 = n1009; | |
/* FF 16 10 5 */ always @(posedge pin_23, posedge n1) if (n1) n518 <= 1'b0; else if (n4) n518 <= n1010; | |
/* FF 9 12 0 */ assign n117 = n1011; | |
/* FF 17 15 6 */ assign n609 = n1012; | |
/* FF 7 10 4 */ always @(posedge pin_23, posedge n9) if (n9) n40 <= 1'b0; else if (1'b1) n40 <= n1013; | |
/* FF 11 11 3 */ assign n197 = n1014; | |
/* FF 17 16 0 */ always @(posedge pin_23) if (1'b1) n613 <= n1 ? 1'b0 : n1015; | |
/* FF 13 9 1 */ assign n248 = n1016; | |
/* FF 10 14 3 */ always @(posedge pin_23, posedge n1) if (n1) n165 <= 1'b1; else if (1'b1) n165 <= n1017; | |
/* FF 15 12 3 */ assign n459 = n1018; | |
/* FF 17 10 4 */ always @(posedge pin_23) if (1'b1) n579 <= 1'b0 ? 1'b0 : n1019; | |
/* FF 18 13 7 */ always @(posedge pin_23) if (1'b1) n657 <= n369 ? 1'b0 : n1020; | |
/* FF 3 11 3 */ always @(posedge pin_23) if (n9) n12 <= 1'b0 ? 1'b0 : n1021; | |
/* FF 16 15 0 */ assign n486 = n1022; | |
/* FF 7 20 5 */ always @(posedge pin_23, posedge n1) if (n1) n101 <= 1'b0; else if (n4) n101 <= n1023; | |
/* FF 14 13 3 */ assign n424 = n1024; | |
/* FF 12 13 2 */ assign n284 = n1025; | |
/* FF 20 12 2 */ always @(posedge pin_23) if (1'b1) n707 <= n369 ? 1'b0 : n1026; | |
/* FF 13 12 1 */ assign n350 = n1027; | |
/* FF 16 16 6 */ assign n558 = n1028; | |
/* FF 20 10 2 */ assign n531 = n1029; | |
/* FF 10 13 7 */ assign n159 = n1030; | |
/* FF 11 14 2 */ assign n229 = n1031; | |
/* FF 16 7 7 */ assign n506 = n1032; | |
/* FF 16 12 6 */ assign n536 = n1033; | |
/* FF 17 11 3 */ assign n339 = n1034; | |
/* FF 15 13 4 */ assign n466 = n1035; | |
/* FF 4 13 2 */ always @(posedge pin_23) if (n2) n28 <= 1'b0 ? 1'b0 : n1036; | |
/* FF 12 3 1 */ always @(posedge pin_23) if (1'b1) n140 <= 1'b0 ? 1'b0 : n1037; | |
/* FF 17 13 3 */ always @(posedge pin_23, posedge n1) if (n1) n598 <= 1'b0; else if (n4) n598 <= n1038; | |
/* FF 15 11 0 */ assign n448 = n1039; | |
/* FF 11 13 0 */ assign n220 = n1040; | |
/* FF 12 12 5 */ assign n275 = n1041; | |
/* FF 7 19 2 */ always @(posedge pin_23, posedge n1) if (n1) n88 <= 1'b0; else if (n87) n88 <= n1042; | |
/* FF 16 9 4 */ assign n512 = n1043; | |
/* FF 14 11 3 */ assign n403 = n1044; | |
/* FF 12 10 1 */ assign n249 = n1045; | |
/* FF 18 11 2 */ assign n642 = n1046; | |
/* FF 12 15 1 */ assign n296 = n1047; | |
/* FF 15 7 0 */ always @(posedge pin_23) if (1'b1) n438 <= 1'b0 ? 1'b0 : n1048; | |
/* FF 10 16 3 */ assign n176 = n1049; | |
/* FF 9 8 7 */ assign n114 = n1050; | |
/* FF 13 10 0 */ assign n1051 = n1052; | |
/* FF 10 11 2 */ assign n141 = n1054; | |
/* FF 18 12 4 */ always @(posedge pin_23) if (1'b1) n649 <= 1'b0 ? 1'b0 : n1055; | |
/* FF 16 8 3 */ always @(posedge pin_23) if (1'b1) n497 <= n1 ? 1'b0 : n1056; | |
/* FF 14 10 4 */ assign n386 = n1057; | |
/* FF 14 12 0 */ assign n413 = n1058; | |
/* FF 13 13 2 */ assign n303 = n1059; | |
/* FF 20 9 3 */ always @(posedge pin_23) if (1'b1) n698 <= 1'b0 ? 1'b0 : n1060; | |
/* FF 10 12 4 */ assign n124 = n1061; | |
/* FF 16 6 4 */ assign n492 = n1062; | |
/* FF 16 11 7 */ assign n530 = n1063; | |
/* FF 14 9 6 */ assign n382 = n1064; | |
/* FF 20 11 6 */ assign n596 = n1065; | |
/* FF 5 13 2 */ always @(posedge pin_23) if (n17) n41 <= n40 ? 1'b0 : n1066; | |
/* FF 18 9 1 */ assign n532 = n1067; | |
/* FF 11 10 1 */ assign n187 = n1068; | |
/* FF 12 9 0 */ assign n243 = n1069; | |
/* FF 17 9 4 */ always @(posedge pin_23) if (1'b1) n578 <= 1'b0 ? 1'b0 : n1070; | |
/* FF 15 15 5 */ assign n482 = n1071; | |
/* FF 18 10 5 */ always @(posedge pin_23) if (1'b1) n638 <= 1'b0 ? 1'b0 : n1072; | |
/* FF 3 10 1 */ assign n8 = n1073; | |
/* FF 12 14 2 */ assign n291 = n1074; | |
/* FF 9 7 0 */ assign n1075 = n1076; | |
/* FF 13 11 7 */ assign n330 = n1078; | |
/* FF 18 15 5 */ assign n664 = n1079; | |
/* FF 16 13 2 */ assign n541 = n1080; | |
/* FF 14 15 1 */ always @(posedge pin_23) if (1'b1) n432 <= 1'b0 ? 1'b0 : n1081; | |
/* FF 17 12 1 */ assign n591 = n1082; | |
/* FF 15 10 0 */ assign n266 = n1083; | |
/* FF 13 14 3 */ assign n366 = n1084; | |
/* FF 10 15 5 */ always @(posedge pin_23, posedge n1) if (n1) n173 <= 1'b1; else if (1'b1) n173 <= n1085; | |
/* FF 11 12 0 */ assign n208 = n1086; | |
/* FF 16 10 4 */ assign n517 = n1087; | |
/* FF 12 11 3 */ assign n262 = n1088; | |
/* FF 20 10 5 */ assign n522 = n1089; | |
/* FF 9 12 1 */ assign n118 = n1090; | |
/* FF 17 15 5 */ assign n485 = n1091; | |
/* FF 15 9 6 */ assign n315 = n1092; | |
/* FF 18 14 2 */ assign n431 = n1093; | |
/* FF 5 14 3 */ always @(posedge pin_23) if (n2) n49 <= 1'b0 ? 1'b0 : n1094; | |
/* FF 20 13 6 */ assign n711 = n1095; | |
/* FF 11 11 2 */ assign n196 = n1096; | |
/* FF 13 15 4 */ assign n236 = n1097; | |
/* FF 17 16 1 */ assign n614 = n1098; | |
/* FF 10 14 2 */ assign n99 = n1099; | |
/* FF 15 12 4 */ assign n460 = n1100; | |
/* FF 13 9 0 */ assign n304 = n1101; | |
/* FF 17 10 5 */ always @(posedge pin_23) if (1'b1) n580 <= 1'b0 ? 1'b0 : n1102; | |
/* FF 7 19 5 */ always @(posedge pin_23, posedge n1) if (n1) n33 <= 1'b0; else if (n87) n33 <= n1103; | |
/* FF 21 10 4 */ always @(posedge pin_23, posedge n1) if (n1) n717 <= 1'b0; else if (n4) n717 <= n1104; | |
/* FF 18 13 4 */ assign n653 = n1105; | |
/* FF 3 11 2 */ always @(posedge pin_23) if (n9) n11 <= 1'b0 ? 1'b0 : n1106; | |
/* FF 16 15 1 */ always @(posedge pin_23) if (1'b1) n549 <= n1 ? 1'b0 : n1107; | |
/* FF 14 13 0 */ assign n421 = n1108; | |
/* FF 12 13 3 */ assign n285 = n1109; | |
/* FF 20 12 1 */ assign n706 = n1110; | |
/* FF 13 12 6 */ assign n353 = n1111; | |
/* FF 16 16 5 */ assign n557 = n1112; | |
/* FF 10 13 4 */ assign n157 = n1113; | |
/* FF 11 14 3 */ assign n226 = n1114; | |
/* FF 16 7 4 */ always @(posedge pin_23) if (1'b1) n503 <= n1 ? 1'b0 : n1115; | |
/* FF 16 12 5 */ assign n535 = n1116; | |
/* FF 14 14 6 */ assign n430 = n1117; | |
/* FF 15 13 3 */ assign n179 = n1118; | |
/* FF 17 13 2 */ assign n597 = n1119; | |
/* FF 15 11 3 */ assign n451 = n1120; | |
/* FF 5 12 6 */ assign n17 = n1121; | |
/* FF 10 4 2 */ always @(posedge pin_23) if (1'b1) n64 <= 1'b0 ? 1'b0 : n1122; | |
/* FF 20 15 5 */ always @(posedge pin_23) if (1'b1) n612 <= n1 ? 1'b0 : n1123; | |
/* FF 11 13 7 */ assign n170 = n1124; | |
/* FF 12 12 4 */ always @(posedge pin_23) if (1'b1) n274 <= 1'b0 ? 1'b0 : n1125; | |
/* FF 12 10 0 */ assign n1126 = n1127; | |
/* FF 14 11 4 */ assign n355 = n1129; | |
/* FF 16 9 5 */ assign n446 = n1130; | |
/* FF 20 9 4 */ assign n699 = n1131; | |
/* FF 17 8 4 */ assign n571 = n1132; | |
/* FF 15 14 7 */ always @(posedge pin_23) if (1'b1) n475 <= 1'b0 ? 1'b0 : n1133; | |
/* FF 18 11 3 */ always @(posedge pin_23, posedge n1) if (n1) n643 <= 1'b0; else if (n4) n643 <= n1134; | |
/* FF 12 15 6 */ assign n299 = n1135; | |
/* FF 18 9 6 */ assign n633 = n1136; | |
/* FF 10 16 2 */ assign n171 = n1137; | |
/* FF 9 8 4 */ always @(posedge pin_23) if (n115) n113 <= n64 ? 1'b0 : n1138; | |
/* FF 13 10 1 */ assign n258 = n1139; | |
/* FF 10 11 3 */ assign n142 = n1140; | |
/* FF 18 12 7 */ assign n647 = n1141; | |
/* FF 16 8 2 */ assign n496 = n1142; | |
/* FF 14 10 3 */ assign n259 = n1143; | |
/* FF 16 14 2 */ assign n300 = n1144; | |
/* FF 14 12 3 */ assign n416 = n1145; | |
/* FF 5 10 1 */ always @(posedge pin_23) if (1'b1) n35 <= 1'b0 ? 1'b0 : n1146; | |
/* FF 13 13 5 */ assign n224 = n1147; | |
/* FF 11 9 4 */ assign n182 = n1148; | |
/* FF 10 12 7 */ assign n106 = n1149; | |
/* FF 16 6 7 */ assign n495 = n1150; | |
/* FF 16 11 4 */ always @(posedge pin_23) if (1'b1) n528 <= 1'b0 ? 1'b0 : n1151; | |
/* FF 14 9 7 */ assign n383 = n1152; | |
/* FF 20 11 7 */ always @(posedge pin_23) if (1'b1) n652 <= 1'b0 ? 1'b0 : n1153; | |
/* FF 17 14 3 */ always @(posedge pin_23) if (1'b1) n603 <= 1'b0 ? 1'b0 : n1154; | |
/* FF 5 13 5 */ always @(posedge pin_23) if (n17) n44 <= n40 ? 1'b0 : n1155; | |
/* FF 10 7 3 */ assign n2 = n1156; | |
/* FF 11 10 6 */ assign n192 = n1157; | |
/* FF 12 9 1 */ assign n244 = n1158; | |
/* FF 17 9 7 */ assign n379 = n1159; | |
/* FF 15 15 4 */ assign n363 = n1160; | |
/* FF 9 12 6 */ assign n121 = n1161; | |
/* FF 12 14 5 */ assign n292 = n1162; | |
/* FF 9 7 7 */ assign n104 = n1163; | |
/* FF 9 9 7 */ always @(posedge pin_23, posedge n9) if (n9) n65 <= 1'b0; else if (1'b1) n65 <= n1164; | |
/* FF 13 11 6 */ assign n329 = n1165; | |
/* FF 10 10 4 */ assign n139 = n1166; | |
/* FF 18 15 6 */ assign n665 = n1167; | |
/* FF 16 13 3 */ assign n542 = n1168; | |
/* FF 15 10 1 */ assign n391 = n1169; | |
/* FF 13 14 4 */ assign n367 = n1170; | |
/* FF 10 15 6 */ always @(posedge pin_23, posedge n1) if (n1) n174 <= 1'b1; else if (1'b1) n174 <= n1171; | |
/* FF 11 12 1 */ always @(posedge pin_23) if (1'b1) n209 <= 1'b0 ? 1'b0 : n1172; | |
/* FF 16 10 7 */ assign n519 = n1173; | |
/* FF 12 11 0 */ assign n260 = n1174; | |
/* FF 17 4 5 */ always @(posedge pin_23) if (1'b1) n133 <= 1'b0 ? 1'b0 : n1175; | |
/* FF 20 10 4 */ always @(posedge pin_23) if (1'b1) n704 <= 1'b0 ? 1'b0 : n1176; | |
/* FF 17 15 4 */ assign n608 = n1177; | |
/* FF 15 9 5 */ assign n441 = n1178; | |
/* FF 20 13 7 */ assign n332 = n1179; | |
/* FF 11 11 5 */ assign n199 = n1180; | |
/* FF 17 16 6 */ assign n619 = n1181; | |
/* FF 10 14 1 */ assign n164 = n1182; | |
/* FF 15 12 5 */ assign n461 = n1183; | |
/* FF 13 9 3 */ assign n306 = n1184; | |
/* FF 17 10 6 */ always @(posedge pin_23) if (1'b1) n581 <= 1'b0 ? 1'b0 : n1185; | |
/* FF 18 13 5 */ assign n656 = n1186; | |
/* FF 3 11 5 */ always @(posedge pin_23) if (n9) n14 <= 1'b0 ? 1'b0 : n1187; | |
/* FF 14 13 1 */ always @(posedge pin_23) if (1'b1) n422 <= 1'b0 ? 1'b0 : n1188; | |
/* FF 12 13 4 */ always @(posedge pin_23) if (1'b1) n286 <= 1'b0 ? 1'b0 : n1189; | |
/* FF 18 11 4 */ assign n644 = n1190; | |
/* FF 20 12 0 */ assign n678 = n1191; | |
/* FF 13 12 7 */ assign n319 = n1192; | |
/* FF 16 16 4 */ assign n556 = n1193; | |
/* FF 10 13 5 */ assign n158 = n1194; | |
/* FF 11 14 0 */ always @(posedge pin_23, posedge n1) if (n1) n227 <= 1'b1; else if (1'b1) n227 <= n1195; | |
/* FF 16 7 5 */ assign n504 = n1196; | |
/* FF 10 16 5 */ assign n130 = n1197; | |
/* FF 16 12 4 */ assign n318 = n1198; | |
/* FF 17 11 1 */ assign n336 = n1199; | |
/* FF 15 13 2 */ assign n465 = n1200; | |
/* FF 14 14 5 */ assign n420 = n1201; | |
/* FF 10 11 4 */ assign n143 = n1202; | |
/* FF 15 11 2 */ assign n450 = n1203; | |
/* FF 11 13 6 */ assign n223 = n1204; | |
/* FF 12 12 3 */ assign n273 = n1205; | |
/* FF 16 9 6 */ assign n334 = n1206; | |
/* FF 14 11 5 */ assign n280 = n1207; | |
/* FF 12 10 3 */ assign n251 = n1208; | |
/* FF 20 9 5 */ always @(posedge pin_23) if (1'b1) n700 <= 1'b0 ? 1'b0 : n1209; | |
/* FF 7 13 5 */ always @(posedge pin_23) if (n2) n47 <= 1'b0 ? 1'b0 : n1210; | |
/* FF 17 14 4 */ assign n235 = n1211; | |
/* FF 12 15 7 */ assign n178 = n1212; | |
/* FF 18 9 7 */ assign n634 = n1213; | |
/* FF 13 10 2 */ assign n201 = n1214; | |
/* FF 18 3 7 */ always @(posedge pin_23) if (1'b1) n626 <= 1'b0 ? 1'b0 : n1215; | |
/* FF 18 12 6 */ always @(posedge pin_23) if (1'b1) n651 <= 1'b0 ? 1'b0 : n1216; | |
/* FF 16 8 1 */ assign n510 = n1217; | |
/* FF 14 10 2 */ assign n385 = n1218; | |
/* FF 14 12 2 */ assign n415 = n1219; | |
/* FF 18 10 3 */ always @(posedge pin_23) if (1'b1) n637 <= 1'b0 ? 1'b0 : n1220; | |
/* FF 13 13 4 */ assign n360 = n1221; | |
/* FF 11 9 3 */ assign n181 = n1222; | |
/* FF 10 12 6 */ assign n147 = n1223; | |
/* FF 16 6 6 */ assign n494 = n1224; | |
/* FF 16 11 5 */ assign n529 = n1225; | |
/* FF 14 9 4 */ assign n313 = n1226; | |
/* FF 5 20 7 */ always @(posedge pin_23, posedge n1) if (n1) n62 <= 1'b0; else if (n4) n62 <= n1227; | |
/* FF 20 11 4 */ assign n354 = n1228; | |
/* FF 5 13 4 */ always @(posedge pin_23) if (n17) n43 <= n40 ? 1'b0 : n1229; | |
/* FF 11 10 7 */ assign n193 = n1230; | |
/* FF 17 12 7 */ assign n594 = n1231; | |
/* FF 15 10 6 */ assign n145 = n1232; | |
/* FF 17 9 6 */ assign n86 = n1233; | |
/* FF 15 15 7 */ always @(posedge pin_23) if (1'b1) n484 <= 1'b0 ? 1'b0 : n1234; | |
/* FF 3 10 7 */ assign n5 = n1235; | |
/* FF 12 14 4 */ assign n234 = n1236; | |
/* FF 9 7 6 */ always @(posedge pin_23) if (n115) n112 <= n64 ? 1'b0 : n1237; | |
/* FF 20 13 0 */ assign n476 = n1238; | |
/* FF 13 11 5 */ assign n218 = n1239; | |
/* FF 18 15 7 */ assign n666 = n1240; | |
/* FF 14 15 3 */ assign n433 = n1241; | |
/* FF 18 13 2 */ always @(posedge pin_23) if (1'b1) n654 <= n369 ? 1'b0 : n1242; | |
/* FF 13 14 5 */ assign n368 = n1243; | |
/* FF 16 15 7 */ assign n553 = n1244; | |
/* FF 14 13 6 */ assign n426 = n1245; | |
/* FF 10 15 7 */ always @(posedge pin_23, posedge n1) if (n1) n175 <= 1'b1; else if (1'b1) n175 <= n1246; | |
/* FF 11 12 2 */ assign n210 = n1247; | |
/* FF 20 12 7 */ assign n544 = n1248; | |
/* FF 12 11 1 */ assign n207 = n1249; | |
/* FF 20 10 7 */ assign n66 = n1250; | |
/* FF 10 13 2 */ assign n52 = n1251; | |
/* FF 15 9 4 */ assign n267 = n1252; | |
/* FF 16 12 3 */ assign n337 = n1253; | |
/* FF 11 11 4 */ assign n198 = n1254; | |
/* FF 15 11 5 */ assign n453 = n1255; | |
/* FF 13 15 2 */ always @(posedge pin_23) if (1'b1) n364 <= 1'b0 ? 1'b0 : n1256; | |
/* FF 17 16 7 */ assign n561 = n1257; | |
/* FF 23 4 1 */ always @(posedge pin_23) if (1'b1) n132 <= 1'b0 ? 1'b0 : n1258; | |
/* FF 10 14 0 */ assign n67 = n1259; | |
/* FF 13 9 2 */ assign n305 = n1260; | |
/* FF 15 12 6 */ assign n317 = n1261; | |
/* FF 3 11 4 */ always @(posedge pin_23) if (n9) n13 <= 1'b0 ? 1'b0 : n1262; | |
/* FF 17 8 2 */ always @(posedge pin_23) if (1'b1) n569 <= n571 ? 1'b0 : n1263; | |
/* FF 12 13 5 */ assign n287 = n1264; | |
/* FF 18 11 5 */ always @(posedge pin_23, posedge n1) if (n1) n645 <= 1'b0; else if (n4) n645 <= n1265; | |
/* FF 13 12 4 */ assign n289 = n1266; | |
/* FF 16 16 3 */ assign n555 = n1267; | |
/* FF 11 14 1 */ assign n228 = n1268; | |
/* FF 16 7 2 */ always @(posedge pin_23) if (1'b1) n501 <= n1 ? 1'b0 : n1269; | |
/* FF 10 16 4 */ assign n129 = n1270; | |
/* FF 14 14 4 */ assign n429 = n1271; | |
/* FF 15 13 1 */ assign n427 = n1272; | |
/* FF 4 13 5 */ always @(posedge pin_23) if (n2) n18 <= 1'b0 ? 1'b0 : n1273; | |
/* FF 17 11 0 */ always @(posedge pin_23, posedge n1) if (n1) n585 <= 1'b0; else if (n4) n585 <= n1274; | |
/* FF 10 11 5 */ assign n122 = n1275; | |
/* FF 14 12 5 */ assign n257 = n1276; | |
/* FF 11 13 5 */ assign n222 = n1277; | |
/* FF 12 12 2 */ assign n256 = n1278; | |
/* FF 16 9 7 */ assign n513 = n1279; | |
/* FF 14 11 6 */ assign n404 = n1280; | |
/* FF 12 10 2 */ assign n250 = n1281; | |
/* FF 20 9 6 */ assign n447 = n1282; | |
/* FF 10 12 1 */ assign n150 = n1283; | |
/* FF 15 14 5 */ assign n474 = n1284; | |
/* FF 7 13 4 */ always @(posedge pin_23) if (n2) n96 <= 1'b0 ? 1'b0 : n1285; | |
/* FF 16 11 2 */ always @(posedge pin_23) if (1'b1) n526 <= 1'b0 ? 1'b0 : n1286; | |
/* FF 12 15 4 */ assign n297 = n1287; | |
/* FF 18 9 4 */ assign n582 = n1288; | |
/* FF 20 14 0 */ assign n712 = n1289; | |
/* FF 13 10 3 */ assign n202 = n1290; | |
/* FF 16 8 0 */ always @(posedge pin_23) if (1'b1) n509 <= n1 ? 1'b0 : n1291; | |
/* FF 14 10 1 */ assign n384 = n1292; | |
/* FF 17 9 1 */ always @(posedge pin_23) if (1'b1) n575 <= 1'b0 ? 1'b0 : n1293; | |
/* FF 18 10 2 */ always @(posedge pin_23) if (1'b1) n636 <= 1'b0 ? 1'b0 : n1294; | |
/* FF 13 13 7 */ always @(posedge pin_23) if (1'b1) n362 <= 1'b0 ? 1'b0 : n1295; | |
/* FF 16 6 1 */ assign n1296 = n1297; | |
/* FF 14 9 5 */ assign n269 = n1298; | |
/* FF 15 2 0 */ always @(posedge pin_23, posedge n1) if (n1) n437 <= 1'b0; else if (n4) n437 <= n1299; | |
/* FF 18 15 0 */ assign n660 = n1300; | |
/* FF 5 13 7 */ always @(posedge pin_23) if (n17) n46 <= n40 ? 1'b0 : n1301; | |
/* FF 14 15 4 */ assign n434 = n1302; | |
/* FF 11 10 4 */ assign n190 = n1303; | |
/* FF 17 12 4 */ always @(posedge pin_23) if (1'b1) n592 <= 1'b0 ? 1'b0 : n1304; | |
/* FF 15 10 7 */ assign n445 = n1305; | |
/* FF 10 15 0 */ always @(posedge pin_23, posedge n1) if (n1) n172 <= 1'b1; else if (1'b1) n172 <= n1306; | |
/* FF 15 15 6 */ assign n483 = n1307; | |
/* FF 8 13 5 */ always @(posedge pin_23) if (1'b1) n105 <= 1'b0 ? 1'b0 : n1308; | |
/* FF 16 10 1 */ assign n515 = n1309; | |
/* FF 12 11 6 */ assign n216 = n1310; | |
/* FF 9 12 4 */ assign n120 = n1311; | |
/* FF 17 15 2 */ always @(posedge pin_23) if (1'b1) n607 <= 1'b0 ? 1'b0 : n1312; | |
/* FF 12 14 7 */ assign n294 = n1313; | |
/* FF 9 7 5 */ always @(posedge pin_23) if (n115) n111 <= n64 ? 1'b0 : n1314; | |
/* FF 13 11 4 */ assign n217 = n1315; | |
/* FF 10 14 7 */ always @(posedge pin_23, posedge n1) if (n1) n168 <= 1'b1; else if (1'b1) n168 <= n1316; | |
/* FF 13 9 5 */ assign n308 = n1317; | |
/* FF 18 13 3 */ always @(posedge pin_23) if (1'b1) n655 <= n369 ? 1'b0 : n1318; | |
/* FF 13 14 6 */ assign n369 = n1319; | |
/* FF 14 13 7 */ assign n372 = n1320; | |
/* FF 7 20 1 */ always @(posedge pin_23, posedge n1) if (n1) n34 <= 1'b0; else if (n4) n34 <= n1321; | |
/* FF 8 7 1 */ always @(posedge pin_23) if (n104) n103 <= n64 ? 1'b0 : n1322; | |
/* FF 11 12 3 */ always @(posedge pin_23) if (1'b1) n211 <= 1'b0 ? 1'b0 : n1323; | |
/* FF 20 12 6 */ always @(posedge pin_23) if (1'b1) n710 <= n369 ? 1'b0 : n1324; | |
/* FF 20 10 6 */ assign n419 = n1325; | |
/* FF 10 13 3 */ assign n156 = n1326; | |
/* FF 11 14 6 */ assign n68 = n1327; | |
/* FF 5 14 6 */ always @(posedge pin_23) if (n2) n50 <= 1'b0 ? 1'b0 : n1328; | |
/* FF 16 12 2 */ always @(posedge pin_23) if (1'b1) n534 <= 1'b0 ? 1'b0 : n1329; | |
/* FF 14 14 3 */ assign n4 = n1330; | |
/* FF 17 11 7 */ assign n279 = n1331; | |
/* FF 11 11 7 */ assign n200 = n1332; | |
/* FF 16 2 2 */ always @(posedge pin_23, posedge n1) if (n1) n489 <= 1'b0; else if (n4) n489 <= n1333; | |
/* FF 17 13 7 */ assign n600 = n1334; | |
/* FF 15 11 4 */ assign n452 = n1335; | |
/* FF 17 16 4 */ always @(posedge pin_23) if (1'b1) n617 <= n1 ? 1'b0 : n1336; | |
/* FF 20 15 0 */ assign n713 = n1337; | |
/* FF 15 12 7 */ assign n462 = n1338; | |
/* FF 12 10 5 */ assign n253 = n1339; | |
/* FF 3 11 7 */ always @(posedge pin_23) if (n9) n16 <= 1'b0 ? 1'b0 : n1340; | |
/* FF 17 8 3 */ assign n570 = n1341; | |
/* FF 15 14 2 */ assign n472 = n1342; | |
/* FF 12 13 6 */ assign n225 = n1343; | |
endmodule | |
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