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#!/bin/bash | |
set -eu | |
# gzip a user.bootfs to make a high-entropy test files | |
# make 10M, 1M, 100K, 10K test files | |
gzip -c < $FUCHSIA_BUILD_DIR/user.bootfs | dd of=test-file-10M bs=1M count=10 iflag=fullblock | |
dd if=test-file-10M of=test-file-1M bs=1M count=1 | |
dd if=test-file-10M of=test-file-100K bs=10K count=10 | |
dd if=test-file-10M of=test-file-10K bs=10K count=1 |
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int SIGNAL = A2; | |
void setup() { | |
// start serial port at 9600 bps and wait for port to open: | |
Serial.begin(9600); | |
while (!Serial) { | |
; // wait for serial port to connect. Needed for native USB port only | |
} | |
Serial.println("hello."); |
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import 'dart:async'; | |
import 'other.dart' show Error; | |
abstract class Wlan { | |
Future<Error> method(); | |
} | |
class WlanFuturize { | |
final Wlan _inner; |
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// Copyright 2018 The Fuchsia Authors. All rights reserved. | |
// Use of this source code is governed by a BSD-style license that can be | |
// found in the LICENSE file. | |
// | |
// WARNING: This file is machine generated by fidlgen. | |
library fidl_fidl_examples_events$async; | |
import 'dart:async'; | |
import 'dart:typed_data'; |
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import 'dart:async'; | |
class AsyncProxyController<T> { | |
} | |
class AsyncProxy<T> { | |
AsyncProxyController<T> ctrl; | |
} |
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require 'rdl' | |
require 'types/core' | |
extend RDL::Annotate | |
type '(String) -> nil', typecheck: :now | |
def greet(name) | |
puts "hello, #{name}." | |
end |
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<html> | |
<head> | |
<title>No Tunnel</title> | |
</head> | |
<body> | |
<h1>No Tunnel</h1> | |
<p>There is no tunnel configured for <i><script>document.write(location.host)</script></i>...</p> | |
<p>Create a tunnel with: | |
<code> |
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CFLAGS=$(shell pkg-config --cflags fontconfig) | |
LDFLAGS=$(shell pkg-config --libs fontconfig) | |
example: example.o |
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#include <iostream> | |
#include <string> | |
#include <vector> | |
void test_string_vector() { | |
std::vector<std::string> v; | |
const char* one = v.emplace_back("one").data(); | |
std::cout << "added one" << std::endl; | |
std::cout << "v.capacity() = " << v.capacity() << std::endl; |
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import typing, math | |
from nmigen import * | |
from nmigen.build import Platform | |
from nmigen.back.pysim import Simulator, Delay | |
class Pulse(Elaboratable): | |
def __init__(self, | |
frequency: float, | |
clock_frequency: typing.Optional[float], |