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| "cell_type": "code", | |
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| "input": [ | |
| "from skidl import *\n", | |
| "\n", | |
| "default_circuit.mini_reset()\n", | |
| "\n", | |
| "gnd = Net('GND') # Ground reference.\n", | |
| "vin = Net('VI') # Input voltage to the divider.\n", | |
| "vout = Net('VO') # Output voltage from the divider.\n", | |
| "r1, r2, r3 = 3 * Part('device', 'R', TEMPLATE) # Create two resistors.\n", | |
| "r1.value, r1.footprint = '1k', 'Resistors_SMD:R_0805' # Set resistor values\n", | |
| "r2.value, r2.footprint = '500R', 'Resistors_SMD:R_0805' # and footprints.\n", | |
| "r3.value, r2.footprint = '2k', 'Resistors_SMD:R_0805'\n", | |
| "r1[1] += vin # Connect the input to the first resistor.\n", | |
| "r2[2] += gnd # Connect the second resistor to ground.\n", | |
| "vin += r3[1]\n", | |
| "r3[2] += vout\n", | |
| "vout += r1[2], r2[1] # Output comes from the connection of the two resistors.\n", | |
| "\n", | |
| "generate_graph()" | |
| ], | |
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| "input": [ | |
| "from skidl import *\n", | |
| "\n", | |
| "default_circuit.mini_reset()\n", | |
| "# Define the voltage divider module.\n", | |
| "@subcircuit\n", | |
| "def vdiv(inp, outp):\n", | |
| " \"\"\"Divide inp voltage by 3 and place it on outp net.\"\"\"\n", | |
| " rup = Part('device', 'R', value='1K', footprint='Resistors_SMD:R_0805')\n", | |
| " rlo = Part('device','R', value='500', footprint='Resistors_SMD:R_0805')\n", | |
| " rup[1,2] += inp, outp\n", | |
| " rlo[1,2] += outp, gnd\n", | |
| "\n", | |
| "@subcircuit\n", | |
| "def multi_vdiv(repeat, inp, outp):\n", | |
| " \"\"\"Divide inp voltage by 3 ** repeat and place it on outp net.\"\"\"\n", | |
| " for _ in range(repeat):\n", | |
| " out_net = Net() # Create an output net for the current stage.\n", | |
| " vdiv(inp, out_net) # Instantiate a divider stage.\n", | |
| " inp = out_net # The output net becomes the input net for the next stage.\n", | |
| " outp += out_net # Connect the output from the last stage to the module output net.\n", | |
| "\n", | |
| "gnd = Net('GND') # GLobal ground net.\n", | |
| "input_net = Net('IN') # Net with the voltage to be divided.\n", | |
| "output_net = Net('OUT') # Net with the divided voltage.\n", | |
| "multi_vdiv(3, input_net, output_net) # Run the input through 3 voltage dividers.\n", | |
| "\n", | |
| "generate_graph(engine='circo')\n" | |
| ], | |
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| "output_type": "pyout", | |
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