phire

fex -n 500 --- https://browser.geekbench.com/v5/cpu/5960094
fex -n 500 -m --- https://browser.geekbench.com/v5/cpu/5960557

phire

class MatrixRow(Elaboratable):
    def __init__(self, num_values, num_sets, num_sets_per_row, row_id):
        self.num_values = num_values
        self.num_sets = num_sets
        self.id = row_id
        addr_width = (num_values-1).bit_length()

        self.addr = Array(Array(Signal(addr_width, name=f"row_addr_{i}_{j}") for j in range(num_sets_per_row)) for i in range(num_sets))
        self.row_set  = Array(Signal(name=f"row_set_{i}") for i in range(num_sets))

phire

IR 0x6f0190:
        (%ssa1) IRHeader #0x6f0190, %ssa2, #0
        (%ssa2) CodeBlock %ssa4, %ssa181, %ssa3
                (%ssa4 i0) Dummy
                %ssa5(GPR0) i64 = LoadContext #0x10, GPR
                %ssa6(GPR1) i64 = LoadContext #0x20, GPR
                %ssa7(GPR2) i64 = Add %ssa5(GPR0) i64, %ssa6(GPR1) i64
                %ssa8(GPR2) i8 = LoadMemTSO %ssa7(GPR2) i64, #0x1, #0x1, GPR
                (%ssa9 i64) StoreContext %ssa8(GPR2) i8, #0x48, GPR
                %ssa10(GPR3) i64 = Constant #0x1

phire

-   98.53%     0.00%  FIFO-GPU thread  libpthread-2.30.so             [.] start_thread                                                                                                                                                                 ▒
   - start_thread                                                                                                                                                                                                                                      ▒
        29.09% memcpy                                                                                                                                                                                                                                  ▒
      - 20.30% VertexManagerBase::Flush                                                                                                                                                                                                                ▒
         - 19.53% _mesa_Draw

phire

pop [dst]:
    M0  0   pc -> addr_buf
        1   pc + 1 -> pc
        2
        3   read instruction into IR
    M1  0   sp -> addr_buf
        1   sp + 1 -> sp
        2

phire

#include <type_traits>
#include <utility>

template<class ReturnType, class...Xs>
struct CallableBase {
    virtual ReturnType operator()(Xs...) const = 0;
    virtual ReturnType operator()(Xs...) = 0;
    virtual void copy(void*) const = 0;
};

phire

struct Instruction {
    const char* name;
    void (*execute)(m65816 &cpu); // Function that executes full instruciton
    void (*step)(m65816 &cpu); // Fuction that only executes a single cycle
    int cycle_count;

    Instruction(char *name, LiteralFn<bool(m65816, int)> fn) 
    : name(name), 
      execute(Execute<fn>), 
      step(Step<fn>),

phire

// g++ round_to_zero_overflow_test.cpp && ./a.out
// don't compile with optimisation, it might pre-caculate the result with the default rounding mode.
#include <stdio.h>
#include <limits>
#include <cfenv>

int main() {
    // the result of max_float + max_float is obviously infinity
    float test = std::numeric_limits<float>::max() + std::numeric_limits<float>::max();
    printf("%g\n", test); // prints "inf"

phire

/sys/kernel/debug/dri/0/v3d_ident:
Revision:   4.2.14.0
MMU:        yes
TFU:        yes
TSY:        yes
MSO:        yes
L3C:        no (0kb)
Core 0:
  Revision:     4.2
  Slices:       2

phire

// 32 bit add
module ieee754_add (
    input clk,
    input [31:0] src_a,
    input [31:0] src_b,
    input subtract,
    output reg [31:0] dest
);

// Extract the various fields we need