Rich Lane rlane

## gist:2338617
Dear Notch,

I'm writing to you on behalf of #0x10c-std community at Freenode IRC. We have been discussing various ideas for DCPU-16
for a couple of days now and in the process devised much improved DCPU-16 specification. Our rationale for changes is to
keep emulation complexity minimal, yet enable DCPU to be as flexible as possible for people to be able to do really cool
stuff with it.

As you see we also propose very simple interrupts mechanisim. We believe that it is vital for DCPU to become really
general-purpose processor since interrupts allow among many things: flexible timers or preemptive task-switching to
happen. However we kept the complexity minimal so DCPU is capable of only one interrupt handler. We believe the gains to DCPU capabilites are worth increased emulation cost.
	Dear Notch,

	I'm writing to you on behalf of #0x10c-std community at Freenode IRC. We have been discussing various ideas for DCPU-16
	for a couple of days now and in the process devised much improved DCPU-16 specification. Our rationale for changes is to
	keep emulation complexity minimal, yet enable DCPU to be as flexible as possible for people to be able to do really cool
	stuff with it.

	As you see we also propose very simple interrupts mechanisim. We believe that it is vital for DCPU to become really
	general-purpose processor since interrupts allow among many things: flexible timers or preemptive task-switching to
	happen. However we kept the complexity minimal so DCPU is capable of only one interrupt handler. We believe the gains to DCPU capabilites are worth increased emulation cost.