The basic flow of the process of compiling the linux kernel for the ADRV with customized pin layout and device configuration is as follows:
- Cloning the HDL repo, switching to a stable release (and obtaining the relevant release of Vivado HLx Design Suite).
- Executing
makein the relevant (ADRV9364Z7020) project directory to make the Vivado project for the SOM. - Patching the
system_top.vfiles andcommon/*.xdcfiles for the project as required, then synthesize, implement and generate the bitstream for the design. Go to File &rarr Export &rarr Export Hardware to export the.hdffile. - Follow the procedure here to build the device tree blob, which exposes the devices enabled in the HDL design phase to the Linux kernel. ~~Note that, you may need to edit the
.dtsor.dtsifiles generated during this process to enablesysfsdrivers for some de