sebbbi

void BFD2(inout ParticleSimulationData Particle, float3 Accel)
{
	float3 x = Particle.Position;
	float3 v = Particle.Velocity;

	float3 x1 = Particle.PositionPrev;
	float3 v1 = Particle.VelocityPrev;

	Particle.Position = (4.0/3.0) * x - (1.0/3.0) * x1 + 1.0 * ((8.0/9.0) * v - (2.0/9.0) * v1 + (4.0/9.0) * TimeStep2 * Accel);
	Particle.PositionPrev = x;

pervognsen

Let's study the similarities between two kinds of entropy coders.

ZPAQ-style binary arithmetic coder (taken from Fabian's mini_arith repository):

    int decode(uint32_t prob)
    {
        int bit;

        // Midpoint of active probability interval subdivided via prob
        uint32_t x = lo + ((uint64_t(hi - lo) * prob) >> kProbBits);

pervognsen

# Tensor product contractions with Einstein's summation notation. Examples:
# Matrix-matrix multiply is tensor(A, 'ij', B, 'jk')
# Matrix-vector multiply is tensor(A, 'ij', v, 'j')
# Matrix trace is tensor(A, 'ii')
# Matrix transpose is tensor(A, 'ji')
# Matrix diagonal is tensor('i', A, 'ii')
# Inner product is tensor(v, 'i', w, 'i')
# Outer product is tensor(v, 'i', w, 'j')
def tensor(*args, **kwargs):
    result = ''

johanthoren

FROM clojure:lein AS build

# TODO: Make sure to replace "foo" with actual value before running this!
ENV BIN_NAME="foo"

# The current versions to build against:
ENV MUSL_VERSION="1.2.2"
ENV ZLIB_VERSION="1.2.11"
ENV GRAALVM_VERSION="21.2.0"

rrika

// clang++
//   -x hip
//   test.cpp
//   -O3
//   --cuda-gpu-arch=gfx1010
//   --hip-device-lib=dummy.bc
//   --hip-device-lib-path=path_to_dummy_bc
//   -nogpuinc
//   -fuse-ld=lld
//   -fgpu-rdc

martinmoene

// Sean Parent. Inheritance Is The Base Class of Evil. Going Native 2013
// Video: https://www.youtube.com/watch?v=bIhUE5uUFOA
// Code : https://github.com/sean-parent/sean-parent.github.io/wiki/Papers-and-Presentations

/*
    Copyright 2013 Adobe Systems Incorporated
    Distributed under the MIT License (see license at
    http://stlab.adobe.com/licenses.html)

    This file is intended as example code and is not production quality.

pervognsen

import numpy as np

def plu_inplace(A):
    P = np.arange(len(A))
    for i in range(len(A)):
        j = i + np.argmax(np.abs(A[i:, i]))
        P[[i, j]], A[[i, j]] = P[[j, i]], A[[j, i]]
        A[i+1:, i] /= A[i, i]
        A[i+1:, i+1:] -= np.outer(A[i+1:, i], A[i, i+1:])
    return P, A, A

Morendil

Note: this content is reposted from my old Google Plus blog, which disappeared when Google took Plus down. It was originally published on 2016-05-18. My views and the way I express them may have evolved in the meantime. If you like this gist, though, take a look at Leprechauns of Software Engineering. (I have edited minor parts of this post for accuracy after having a few mistakes pointed out in the comments.)

Degrees of intellectual dishonesty

In the previous post, I said something along the lines of wanting to crawl into a hole when I encounter bullshit masquerading as empirical support for a claim, such as "defects cost more to fix the later you fix them".

It's a fair question to wonder why I should feel shame for my profession. It's a fair question who I feel ashamed for. So let's drill a little deeper, and dig into cases.

Before we do that, a disclaimer: I am not in the habit of judging people. In what follows, I only mean to condemn behaviours. Also, I gath

pervognsen

One thing that surprises newer programmers is that the older 8-bit microcomputers from the 70s and 80s were designed to run at the speed of random memory access to DRAM and ROM. The C64 was released in 1982 when I was born and its 6502 CPU ran at 1 MHz (give or take depending on NTSC vs PAL). It had a 2-stage pipelined design that was designed to overlap execution and instruction fetch for the current and next instruction. Cycle counting was simple to understand and master since it was based almost entirely on the number of memory accesses (1 cycle each), with a 1-cycle penalty for taken branches because of the pipelined instruction fetch for the next sequential instruction. So, the entire architecture was based on keeping the memory subsystem busy 100% of the time by issuing a read or write every cycle. One-byte instructions with no memory operands like INX still take the minimum 2 cycles per instruction and end up redundantly issuing the same memory request two cycles in a row.

alvinhochun

Control Flow Guard (CFG/CFGuard) for mingw-w64

Control Flow Guard is a security mitigation that verifies the target address of indirect calls. It works by having the compiler insert a check at indirect call sites to verify the validity of the call target, and also the linker write the necessary data and flags into the PE/COFF image to enable the feature on Windows' end.